diff options
225 files changed, 0 insertions, 60457 deletions
diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0001-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch b/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0001-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch deleted file mode 100644 index 5d25cf09..00000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0001-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch +++ /dev/null | |||
| @@ -1,340 +0,0 @@ | |||
| 1 | From 3721255965a94417996df6f2402a288aa09cb5b2 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | Date: Thu, 21 Jul 2011 14:29:42 +0200 | ||
| 4 | Subject: [PATCH 1/3] UNFINISHED: OMAP3: beagle: add support for expansionboards | ||
| 5 | |||
| 6 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 7 | --- | ||
| 8 | arch/arm/mach-omap2/board-omap3beagle.c | 266 +++++++++++++++++++++++++++++++ | ||
| 9 | 1 files changed, 266 insertions(+), 0 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 12 | index 32f5f89..f26a9a8 100644 | ||
| 13 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 14 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 15 | @@ -21,6 +21,7 @@ | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/leds.h> | ||
| 18 | #include <linux/gpio.h> | ||
| 19 | +#include <linux/irq.h> | ||
| 20 | #include <linux/input.h> | ||
| 21 | #include <linux/gpio_keys.h> | ||
| 22 | #include <linux/opp.h> | ||
| 23 | @@ -156,6 +157,167 @@ static void __init omap3_beagle_init_rev(void) | ||
| 24 | } | ||
| 25 | } | ||
| 26 | |||
| 27 | +char expansionboard_name[16]; | ||
| 28 | + | ||
| 29 | +#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) | ||
| 30 | +#include <linux/regulator/fixed.h> | ||
| 31 | +#include <linux/wl12xx.h> | ||
| 32 | + | ||
| 33 | +#define OMAP_BEAGLE_WLAN_EN_GPIO (139) | ||
| 34 | +#define OMAP_BEAGLE_BT_EN_GPIO (138) | ||
| 35 | +#define OMAP_BEAGLE_WLAN_IRQ_GPIO (137) | ||
| 36 | +#define OMAP_BEAGLE_FM_EN_BT_WU (136) | ||
| 37 | + | ||
| 38 | +struct wl12xx_platform_data omap_beagle_wlan_data __initdata = { | ||
| 39 | + .irq = OMAP_GPIO_IRQ(OMAP_BEAGLE_WLAN_IRQ_GPIO), | ||
| 40 | + .board_ref_clock = 2, /* 38.4 MHz */ | ||
| 41 | +}; | ||
| 42 | + | ||
| 43 | +static int gpios[] = {OMAP_BEAGLE_BT_EN_GPIO, OMAP_BEAGLE_FM_EN_BT_WU, -1}; | ||
| 44 | +static struct platform_device wl12xx_device = { | ||
| 45 | + .name = "kim", | ||
| 46 | + .id = -1, | ||
| 47 | + .dev.platform_data = &gpios, | ||
| 48 | +}; | ||
| 49 | + | ||
| 50 | +static struct omap2_hsmmc_info mmcbbt[] = { | ||
| 51 | + { | ||
| 52 | + .mmc = 1, | ||
| 53 | + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | ||
| 54 | + .gpio_wp = 29, | ||
| 55 | + }, | ||
| 56 | + { | ||
| 57 | + .name = "wl1271", | ||
| 58 | + .mmc = 2, | ||
| 59 | + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, | ||
| 60 | + .gpio_wp = -EINVAL, | ||
| 61 | + .gpio_cd = -EINVAL, | ||
| 62 | + .ocr_mask = MMC_VDD_165_195, | ||
| 63 | + .nonremovable = true, | ||
| 64 | + }, | ||
| 65 | + {} /* Terminator */ | ||
| 66 | + }; | ||
| 67 | + | ||
| 68 | +static struct regulator_consumer_supply beagle_vmmc2_supply = | ||
| 69 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); | ||
| 70 | + | ||
| 71 | +static struct regulator_init_data beagle_vmmc2 = { | ||
| 72 | + .constraints = { | ||
| 73 | + .min_uV = 1850000, | ||
| 74 | + .max_uV = 1850000, | ||
| 75 | + .apply_uV = true, | ||
| 76 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 77 | + | REGULATOR_MODE_STANDBY, | ||
| 78 | + .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 79 | + | REGULATOR_CHANGE_STATUS, | ||
| 80 | + }, | ||
| 81 | + .num_consumer_supplies = 1, | ||
| 82 | + .consumer_supplies = &beagle_vmmc2_supply, | ||
| 83 | +}; | ||
| 84 | + | ||
| 85 | +static struct fixed_voltage_config beagle_vwlan = { | ||
| 86 | + .supply_name = "vwl1271", | ||
| 87 | + .microvolts = 1800000, /* 1.8V */ | ||
| 88 | + .gpio = OMAP_BEAGLE_WLAN_EN_GPIO, | ||
| 89 | + .startup_delay = 70000, /* 70ms */ | ||
| 90 | + .enable_high = 1, | ||
| 91 | + .enabled_at_boot = 0, | ||
| 92 | + .init_data = &beagle_vmmc2, | ||
| 93 | +}; | ||
| 94 | + | ||
| 95 | +static struct platform_device omap_vwlan_device = { | ||
| 96 | + .name = "reg-fixed-voltage", | ||
| 97 | + .id = 1, | ||
| 98 | + .dev = { | ||
| 99 | + .platform_data = &beagle_vwlan, | ||
| 100 | + }, | ||
| 101 | +}; | ||
| 102 | +#endif | ||
| 103 | + | ||
| 104 | +#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) | ||
| 105 | + | ||
| 106 | +#include <plat/mcspi.h> | ||
| 107 | +#include <linux/spi/spi.h> | ||
| 108 | + | ||
| 109 | +#define OMAP3BEAGLE_GPIO_ENC28J60_IRQ 157 | ||
| 110 | + | ||
| 111 | +static struct omap2_mcspi_device_config enc28j60_spi_chip_info = { | ||
| 112 | + .turbo_mode = 0, | ||
| 113 | + .single_channel = 1, /* 0: slave, 1: master */ | ||
| 114 | +}; | ||
| 115 | + | ||
| 116 | +static struct spi_board_info omap3beagle_zippy_spi_board_info[] __initdata = { | ||
| 117 | + { | ||
| 118 | + .modalias = "enc28j60", | ||
| 119 | + .bus_num = 4, | ||
| 120 | + .chip_select = 0, | ||
| 121 | + .max_speed_hz = 20000000, | ||
| 122 | + .controller_data = &enc28j60_spi_chip_info, | ||
| 123 | + }, | ||
| 124 | +}; | ||
| 125 | + | ||
| 126 | +static void __init omap3beagle_enc28j60_init(void) | ||
| 127 | +{ | ||
| 128 | + if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, "ENC28J60_IRQ") == 0) && | ||
| 129 | + (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) { | ||
| 130 | + gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0); | ||
| 131 | + omap3beagle_zippy_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ); | ||
| 132 | + irq_set_irq_type(omap3beagle_zippy_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); | ||
| 133 | + } else { | ||
| 134 | + printk(KERN_ERR "could not obtain gpio for ENC28J60_IRQ\n"); | ||
| 135 | + return; | ||
| 136 | + } | ||
| 137 | + | ||
| 138 | + spi_register_board_info(omap3beagle_zippy_spi_board_info, | ||
| 139 | + ARRAY_SIZE(omap3beagle_zippy_spi_board_info)); | ||
| 140 | +} | ||
| 141 | + | ||
| 142 | +#else | ||
| 143 | +static inline void __init omap3beagle_enc28j60_init(void) { return; } | ||
| 144 | +#endif | ||
| 145 | + | ||
| 146 | +#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) | ||
| 147 | + | ||
| 148 | +#include <plat/mcspi.h> | ||
| 149 | +#include <linux/spi/spi.h> | ||
| 150 | + | ||
| 151 | +#define OMAP3BEAGLE_GPIO_KS8851_IRQ 157 | ||
| 152 | + | ||
| 153 | +static struct omap2_mcspi_device_config ks8851_spi_chip_info = { | ||
| 154 | + .turbo_mode = 0, | ||
| 155 | + .single_channel = 1, /* 0: slave, 1: master */ | ||
| 156 | +}; | ||
| 157 | + | ||
| 158 | +static struct spi_board_info omap3beagle_zippy2_spi_board_info[] __initdata = { | ||
| 159 | + { | ||
| 160 | + .modalias = "ks8851", | ||
| 161 | + .bus_num = 4, | ||
| 162 | + .chip_select = 0, | ||
| 163 | + .max_speed_hz = 36000000, | ||
| 164 | + .controller_data = &ks8851_spi_chip_info, | ||
| 165 | + }, | ||
| 166 | +}; | ||
| 167 | + | ||
| 168 | +static void __init omap3beagle_ks8851_init(void) | ||
| 169 | +{ | ||
| 170 | + if ((gpio_request(OMAP3BEAGLE_GPIO_KS8851_IRQ, "KS8851_IRQ") == 0) && | ||
| 171 | + (gpio_direction_input(OMAP3BEAGLE_GPIO_KS8851_IRQ) == 0)) { | ||
| 172 | + gpio_export(OMAP3BEAGLE_GPIO_KS8851_IRQ, 0); | ||
| 173 | + omap3beagle_zippy2_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_KS8851_IRQ); | ||
| 174 | + irq_set_irq_type(omap3beagle_zippy2_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); | ||
| 175 | + } else { | ||
| 176 | + printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n"); | ||
| 177 | + return; | ||
| 178 | + } | ||
| 179 | + | ||
| 180 | + spi_register_board_info(omap3beagle_zippy2_spi_board_info, | ||
| 181 | + ARRAY_SIZE(omap3beagle_zippy2_spi_board_info)); | ||
| 182 | +} | ||
| 183 | + | ||
| 184 | +#else | ||
| 185 | +static inline void __init omap3beagle_ks8851_init(void) { return; } | ||
| 186 | +#endif | ||
| 187 | + | ||
| 188 | static struct mtd_partition omap3beagle_nand_partitions[] = { | ||
| 189 | /* All the partition sizes are listed in terms of NAND block size */ | ||
| 190 | { | ||
| 191 | @@ -254,6 +416,12 @@ static struct omap2_hsmmc_info mmc[] = { | ||
| 192 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | ||
| 193 | .gpio_wp = -EINVAL, | ||
| 194 | }, | ||
| 195 | + { | ||
| 196 | + .mmc = 2, | ||
| 197 | + .caps = MMC_CAP_4_BIT_DATA, | ||
| 198 | + .transceiver = true, | ||
| 199 | + .ocr_mask = 0x00100000, /* 3.3V */ | ||
| 200 | + }, | ||
| 201 | {} /* Terminator */ | ||
| 202 | }; | ||
| 203 | |||
| 204 | @@ -277,7 +445,15 @@ static int beagle_twl_gpio_setup(struct device *dev, | ||
| 205 | mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; | ||
| 206 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | ||
| 207 | mmc[0].gpio_cd = gpio + 0; | ||
| 208 | +#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) | ||
| 209 | + if(!strcmp(expansionboard_name, "bbtoys-wifi")) { | ||
| 210 | + omap2_hsmmc_init(mmcbbt); | ||
| 211 | + } else { | ||
| 212 | + omap2_hsmmc_init(mmc); | ||
| 213 | + } | ||
| 214 | +#else | ||
| 215 | omap2_hsmmc_init(mmc); | ||
| 216 | +#endif | ||
| 217 | |||
| 218 | /* | ||
| 219 | * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active | ||
| 220 | @@ -375,6 +551,19 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { | ||
| 221 | }, | ||
| 222 | }; | ||
| 223 | |||
| 224 | +#if defined(CONFIG_RTC_DRV_DS1307) || \ | ||
| 225 | + defined(CONFIG_RTC_DRV_DS1307_MODULE) | ||
| 226 | + | ||
| 227 | +static struct i2c_board_info __initdata beagle_i2c2_zippy[] = { | ||
| 228 | + { | ||
| 229 | + I2C_BOARD_INFO("eeprom", 0x50), | ||
| 230 | + I2C_BOARD_INFO("ds1307", 0x68), | ||
| 231 | + }, | ||
| 232 | +}; | ||
| 233 | +#else | ||
| 234 | +static struct i2c_board_info __initdata beagle_i2c2_zippy[] = {}; | ||
| 235 | +#endif | ||
| 236 | + | ||
| 237 | static int __init omap3_beagle_i2c_init(void) | ||
| 238 | { | ||
| 239 | omap3_pmic_get_config(&beagle_twldata, | ||
| 240 | @@ -479,6 +668,15 @@ static struct omap_board_mux board_mux[] __initdata = { | ||
| 241 | }; | ||
| 242 | #endif | ||
| 243 | |||
| 244 | +static int __init expansionboard_setup(char *str) | ||
| 245 | +{ | ||
| 246 | + if (!str) | ||
| 247 | + return -EINVAL; | ||
| 248 | + strncpy(expansionboard_name, str, 16); | ||
| 249 | + printk(KERN_INFO "Beagle expansionboard: %s\n", expansionboard_name); | ||
| 250 | + return 0; | ||
| 251 | +} | ||
| 252 | + | ||
| 253 | static void __init beagle_opp_init(void) | ||
| 254 | { | ||
| 255 | int r = 0; | ||
| 256 | @@ -542,6 +740,72 @@ static void __init omap3_beagle_init(void) | ||
| 257 | /* REVISIT leave DVI powered down until it's needed ... */ | ||
| 258 | gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD"); | ||
| 259 | |||
| 260 | + if(!strcmp(expansionboard_name, "zippy")) | ||
| 261 | + { | ||
| 262 | + printk(KERN_INFO "Beagle expansionboard: initializing enc28j60\n"); | ||
| 263 | + omap3beagle_enc28j60_init(); | ||
| 264 | + printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n"); | ||
| 265 | + mmc[1].gpio_wp = 141; | ||
| 266 | + mmc[1].gpio_cd = 162; | ||
| 267 | + printk(KERN_INFO "Beagle expansionboard: registering I2C2 for zippy board\n"); | ||
| 268 | + omap_register_i2c_bus(2, 400, beagle_i2c2_zippy, | ||
| 269 | + ARRAY_SIZE(beagle_i2c2_zippy)); | ||
| 270 | + | ||
| 271 | + } | ||
| 272 | + | ||
| 273 | + if(!strcmp(expansionboard_name, "zippy2")) | ||
| 274 | + { | ||
| 275 | + printk(KERN_INFO "Beagle expansionboard: initializing ks_8851\n"); | ||
| 276 | + omap3beagle_ks8851_init(); | ||
| 277 | + printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n"); | ||
| 278 | + mmc[1].gpio_wp = 141; | ||
| 279 | + mmc[1].gpio_cd = 162; | ||
| 280 | + printk(KERN_INFO "Beagle expansionboard: registering I2C2 for zippy2 board\n"); | ||
| 281 | + omap_register_i2c_bus(2, 400, beagle_i2c2_zippy, | ||
| 282 | + ARRAY_SIZE(beagle_i2c2_zippy)); | ||
| 283 | + } | ||
| 284 | + | ||
| 285 | + if(!strcmp(expansionboard_name, "trainer")) | ||
| 286 | + { | ||
| 287 | + printk(KERN_INFO "Beagle expansionboard: exporting GPIOs 130-141,162 to userspace\n"); | ||
| 288 | + gpio_request(130, "sysfs"); | ||
| 289 | + gpio_export(130, 1); | ||
| 290 | + gpio_request(131, "sysfs"); | ||
| 291 | + gpio_export(131, 1); | ||
| 292 | + gpio_request(132, "sysfs"); | ||
| 293 | + gpio_export(132, 1); | ||
| 294 | + gpio_request(133, "sysfs"); | ||
| 295 | + gpio_export(133, 1); | ||
| 296 | + gpio_request(134, "sysfs"); | ||
| 297 | + gpio_export(134, 1); | ||
| 298 | + gpio_request(135, "sysfs"); | ||
| 299 | + gpio_export(135, 1); | ||
| 300 | + gpio_request(136, "sysfs"); | ||
| 301 | + gpio_export(136, 1); | ||
| 302 | + gpio_request(137, "sysfs"); | ||
| 303 | + gpio_export(137, 1); | ||
| 304 | + gpio_request(138, "sysfs"); | ||
| 305 | + gpio_export(138, 1); | ||
| 306 | + gpio_request(139, "sysfs"); | ||
| 307 | + gpio_export(139, 1); | ||
| 308 | + gpio_request(140, "sysfs"); | ||
| 309 | + gpio_export(140, 1); | ||
| 310 | + gpio_request(141, "sysfs"); | ||
| 311 | + gpio_export(141, 1); | ||
| 312 | + gpio_request(162, "sysfs"); | ||
| 313 | + gpio_export(162, 1); | ||
| 314 | + } | ||
| 315 | + | ||
| 316 | + if(!strcmp(expansionboard_name, "bbtoys-wifi")) | ||
| 317 | + { | ||
| 318 | + if (wl12xx_set_platform_data(&omap_beagle_wlan_data)) | ||
| 319 | + pr_err("error setting wl12xx data\n"); | ||
| 320 | + printk(KERN_INFO "Beagle expansionboard: registering wl12xx bt platform device\n"); | ||
| 321 | + platform_device_register(&wl12xx_device); | ||
| 322 | + printk(KERN_INFO "Beagle expansionboard: registering wl12xx wifi platform device\n"); | ||
| 323 | + platform_device_register(&omap_vwlan_device); | ||
| 324 | + } | ||
| 325 | + | ||
| 326 | usb_musb_init(NULL); | ||
| 327 | usbhs_init(&usbhs_bdata); | ||
| 328 | omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, | ||
| 329 | @@ -558,6 +822,8 @@ static void __init omap3_beagle_init(void) | ||
| 330 | beagle_opp_init(); | ||
| 331 | } | ||
| 332 | |||
| 333 | +early_param("buddy", expansionboard_setup); | ||
| 334 | + | ||
| 335 | MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") | ||
| 336 | /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ | ||
| 337 | .boot_params = 0x80000100, | ||
| 338 | -- | ||
| 339 | 1.6.6.1 | ||
| 340 | |||
diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch b/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch deleted file mode 100644 index ebc14562..00000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch +++ /dev/null | |||
| @@ -1,26 +0,0 @@ | |||
| 1 | From 6bdb8e890f8e5d11be3c4953d7d10f4a5f160cd4 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | Date: Thu, 21 Jul 2011 12:59:20 +0200 | ||
| 4 | Subject: [PATCH 2/3] HACK: OMAP3: beagle: switch to GPTIMER1 | ||
| 5 | |||
| 6 | Breaks with B3 and older due to clock noise | ||
| 7 | |||
| 8 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 9 | --- | ||
| 10 | arch/arm/mach-omap2/board-omap3beagle.c | 2 +- | ||
| 11 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 12 | |||
| 13 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 14 | index f26a9a8..a04f5a0 100644 | ||
| 15 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 16 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 17 | @@ -832,5 +832,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") | ||
| 18 | .init_early = omap3_beagle_init_early, | ||
| 19 | .init_irq = omap3_beagle_init_irq, | ||
| 20 | .init_machine = omap3_beagle_init, | ||
| 21 | - .timer = &omap3_secure_timer, | ||
| 22 | + .timer = &omap3_timer, | ||
| 23 | MACHINE_END | ||
| 24 | -- | ||
| 25 | 1.6.6.1 | ||
| 26 | |||
diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch b/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch deleted file mode 100644 index defd5173..00000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/beagle/0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch +++ /dev/null | |||
| @@ -1,31 +0,0 @@ | |||
| 1 | From 6667757c5f8a473b9cbbe5f6d64eee65a52aad54 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | Date: Wed, 25 May 2011 08:57:40 +0200 | ||
| 4 | Subject: [PATCH 3/3] OMAP3: beagle: HACK! add in 1GHz OPP | ||
| 5 | |||
| 6 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 7 | --- | ||
| 8 | arch/arm/mach-omap2/board-omap3beagle.c | 2 ++ | ||
| 9 | 1 files changed, 2 insertions(+), 0 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 12 | index a04f5a0..5e1d9f9 100644 | ||
| 13 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 14 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 15 | @@ -701,11 +701,13 @@ static void __init beagle_opp_init(void) | ||
| 16 | /* Enable MPU 1GHz and lower opps */ | ||
| 17 | dev = &mh->od->pdev.dev; | ||
| 18 | r = opp_enable(dev, 800000000); | ||
| 19 | + r |= opp_enable(dev, 1000000000); | ||
| 20 | /* TODO: MPU 1GHz needs SR and ABB */ | ||
| 21 | |||
| 22 | /* Enable IVA 800MHz and lower opps */ | ||
| 23 | dev = &dh->od->pdev.dev; | ||
| 24 | r |= opp_enable(dev, 660000000); | ||
| 25 | + r |= opp_enable(dev, 800000000); | ||
| 26 | /* TODO: DSP 800MHz needs SR and ABB */ | ||
| 27 | if (r) { | ||
| 28 | pr_err("%s: failed to enable higher opp %d\n", | ||
| 29 | -- | ||
| 30 | 1.6.6.1 | ||
| 31 | |||
diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/beagleboard/defconfig b/recipes-kernel/linux/linux-3.0+3.1rc/beagleboard/defconfig deleted file mode 100644 index 1942725f..00000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/beagleboard/defconfig +++ /dev/null | |||
| @@ -1,3517 +0,0 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux/arm 2.6.39 Kernel Configuration | ||
| 4 | # Sun Jun 5 11:03:19 2011 | ||
| 5 | # | ||
| 6 | CONFIG_ARM=y | ||
| 7 | CONFIG_HAVE_PWM=y | ||
| 8 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 9 | CONFIG_HAVE_SCHED_CLOCK=y | ||
| 10 | CONFIG_GENERIC_GPIO=y | ||
| 11 | # CONFIG_ARCH_USES_GETTIMEOFFSET is not set | ||
| 12 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 13 | CONFIG_KTIME_SCALAR=y | ||
| 14 | CONFIG_HAVE_PROC_CPU=y | ||
| 15 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 16 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 17 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 18 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 19 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 20 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 21 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 22 | CONFIG_ARCH_HAS_CPUFREQ=y | ||
| 23 | CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | ||
| 24 | CONFIG_GENERIC_HWEIGHT=y | ||
| 25 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 26 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 27 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 28 | # CONFIG_ARM_PATCH_PHYS_VIRT is not set | ||
| 29 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 30 | CONFIG_CONSTRUCTORS=y | ||
| 31 | CONFIG_HAVE_IRQ_WORK=y | ||
| 32 | CONFIG_IRQ_WORK=y | ||
| 33 | |||
| 34 | # | ||
| 35 | # General setup | ||
| 36 | # | ||
| 37 | CONFIG_EXPERIMENTAL=y | ||
| 38 | CONFIG_BROKEN_ON_SMP=y | ||
| 39 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 40 | CONFIG_CROSS_COMPILE="" | ||
| 41 | CONFIG_LOCALVERSION="" | ||
| 42 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 43 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 44 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 45 | CONFIG_HAVE_KERNEL_LZO=y | ||
| 46 | CONFIG_KERNEL_GZIP=y | ||
| 47 | # CONFIG_KERNEL_LZMA is not set | ||
| 48 | # CONFIG_KERNEL_LZO is not set | ||
| 49 | CONFIG_SWAP=y | ||
| 50 | CONFIG_SYSVIPC=y | ||
| 51 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 52 | CONFIG_POSIX_MQUEUE=y | ||
| 53 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
| 54 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 55 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 56 | CONFIG_FHANDLE=y | ||
| 57 | CONFIG_TASKSTATS=y | ||
| 58 | CONFIG_TASK_DELAY_ACCT=y | ||
| 59 | CONFIG_TASK_XACCT=y | ||
| 60 | CONFIG_TASK_IO_ACCOUNTING=y | ||
| 61 | # CONFIG_AUDIT is not set | ||
| 62 | CONFIG_HAVE_GENERIC_HARDIRQS=y | ||
| 63 | |||
| 64 | # | ||
| 65 | # IRQ subsystem | ||
| 66 | # | ||
| 67 | CONFIG_GENERIC_HARDIRQS=y | ||
| 68 | CONFIG_HAVE_SPARSE_IRQ=y | ||
| 69 | CONFIG_GENERIC_IRQ_SHOW=y | ||
| 70 | # CONFIG_SPARSE_IRQ is not set | ||
| 71 | |||
| 72 | # | ||
| 73 | # RCU Subsystem | ||
| 74 | # | ||
| 75 | CONFIG_TINY_RCU=y | ||
| 76 | # CONFIG_PREEMPT_RCU is not set | ||
| 77 | # CONFIG_RCU_TRACE is not set | ||
| 78 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 79 | CONFIG_IKCONFIG=y | ||
| 80 | CONFIG_IKCONFIG_PROC=y | ||
| 81 | CONFIG_LOG_BUF_SHIFT=16 | ||
| 82 | CONFIG_CGROUPS=y | ||
| 83 | # CONFIG_CGROUP_DEBUG is not set | ||
| 84 | CONFIG_CGROUP_NS=y | ||
| 85 | CONFIG_CGROUP_FREEZER=y | ||
| 86 | CONFIG_CGROUP_DEVICE=y | ||
| 87 | CONFIG_CPUSETS=y | ||
| 88 | CONFIG_PROC_PID_CPUSET=y | ||
| 89 | CONFIG_CGROUP_CPUACCT=y | ||
| 90 | CONFIG_RESOURCE_COUNTERS=y | ||
| 91 | CONFIG_CGROUP_MEM_RES_CTLR=y | ||
| 92 | CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y | ||
| 93 | CONFIG_CGROUP_MEM_RES_CTLR_SWAP_ENABLED=y | ||
| 94 | CONFIG_CGROUP_PERF=y | ||
| 95 | CONFIG_CGROUP_SCHED=y | ||
| 96 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 97 | CONFIG_RT_GROUP_SCHED=y | ||
| 98 | CONFIG_BLK_CGROUP=y | ||
| 99 | # CONFIG_DEBUG_BLK_CGROUP is not set | ||
| 100 | CONFIG_NAMESPACES=y | ||
| 101 | CONFIG_UTS_NS=y | ||
| 102 | CONFIG_IPC_NS=y | ||
| 103 | CONFIG_USER_NS=y | ||
| 104 | CONFIG_PID_NS=y | ||
| 105 | CONFIG_NET_NS=y | ||
| 106 | CONFIG_SCHED_AUTOGROUP=y | ||
| 107 | CONFIG_MM_OWNER=y | ||
| 108 | # CONFIG_SYSFS_DEPRECATED is not set | ||
| 109 | # CONFIG_RELAY is not set | ||
| 110 | CONFIG_BLK_DEV_INITRD=y | ||
| 111 | CONFIG_INITRAMFS_SOURCE="" | ||
| 112 | CONFIG_RD_GZIP=y | ||
| 113 | CONFIG_RD_BZIP2=y | ||
| 114 | CONFIG_RD_LZMA=y | ||
| 115 | CONFIG_RD_XZ=y | ||
| 116 | CONFIG_RD_LZO=y | ||
| 117 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 118 | CONFIG_SYSCTL=y | ||
| 119 | CONFIG_ANON_INODES=y | ||
| 120 | CONFIG_EXPERT=y | ||
| 121 | CONFIG_UID16=y | ||
| 122 | # CONFIG_SYSCTL_SYSCALL is not set | ||
| 123 | CONFIG_KALLSYMS=y | ||
| 124 | # CONFIG_KALLSYMS_ALL is not set | ||
| 125 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
| 126 | CONFIG_HOTPLUG=y | ||
| 127 | CONFIG_PRINTK=y | ||
| 128 | CONFIG_BUG=y | ||
| 129 | CONFIG_ELF_CORE=y | ||
| 130 | CONFIG_BASE_FULL=y | ||
| 131 | CONFIG_FUTEX=y | ||
| 132 | CONFIG_EPOLL=y | ||
| 133 | CONFIG_SIGNALFD=y | ||
| 134 | CONFIG_TIMERFD=y | ||
| 135 | CONFIG_EVENTFD=y | ||
| 136 | CONFIG_SHMEM=y | ||
| 137 | CONFIG_AIO=y | ||
| 138 | CONFIG_EMBEDDED=y | ||
| 139 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 140 | CONFIG_PERF_USE_VMALLOC=y | ||
| 141 | |||
| 142 | # | ||
| 143 | # Kernel Performance Events And Counters | ||
| 144 | # | ||
| 145 | CONFIG_PERF_EVENTS=y | ||
| 146 | # CONFIG_PERF_COUNTERS is not set | ||
| 147 | # CONFIG_DEBUG_PERF_USE_VMALLOC is not set | ||
| 148 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 149 | # CONFIG_COMPAT_BRK is not set | ||
| 150 | CONFIG_SLAB=y | ||
| 151 | # CONFIG_SLUB is not set | ||
| 152 | # CONFIG_SLOB is not set | ||
| 153 | CONFIG_PROFILING=y | ||
| 154 | CONFIG_OPROFILE=y | ||
| 155 | CONFIG_HAVE_OPROFILE=y | ||
| 156 | # CONFIG_KPROBES is not set | ||
| 157 | CONFIG_HAVE_KPROBES=y | ||
| 158 | CONFIG_HAVE_KRETPROBES=y | ||
| 159 | CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y | ||
| 160 | CONFIG_HAVE_CLK=y | ||
| 161 | CONFIG_HAVE_DMA_API_DEBUG=y | ||
| 162 | CONFIG_HAVE_HW_BREAKPOINT=y | ||
| 163 | |||
| 164 | # | ||
| 165 | # GCOV-based kernel profiling | ||
| 166 | # | ||
| 167 | # CONFIG_GCOV_KERNEL is not set | ||
| 168 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 169 | CONFIG_SLABINFO=y | ||
| 170 | CONFIG_RT_MUTEXES=y | ||
| 171 | CONFIG_BASE_SMALL=0 | ||
| 172 | CONFIG_MODULES=y | ||
| 173 | CONFIG_MODULE_FORCE_LOAD=y | ||
| 174 | CONFIG_MODULE_UNLOAD=y | ||
| 175 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
| 176 | CONFIG_MODVERSIONS=y | ||
| 177 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
| 178 | CONFIG_BLOCK=y | ||
| 179 | CONFIG_LBDAF=y | ||
| 180 | CONFIG_BLK_DEV_BSG=y | ||
| 181 | CONFIG_BLK_DEV_INTEGRITY=y | ||
| 182 | CONFIG_BLK_DEV_THROTTLING=y | ||
| 183 | |||
| 184 | # | ||
| 185 | # IO Schedulers | ||
| 186 | # | ||
| 187 | CONFIG_IOSCHED_NOOP=y | ||
| 188 | CONFIG_IOSCHED_DEADLINE=y | ||
| 189 | CONFIG_IOSCHED_CFQ=y | ||
| 190 | CONFIG_CFQ_GROUP_IOSCHED=y | ||
| 191 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 192 | CONFIG_DEFAULT_CFQ=y | ||
| 193 | # CONFIG_DEFAULT_NOOP is not set | ||
| 194 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 195 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
| 196 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
| 197 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
| 198 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
| 199 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
| 200 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
| 201 | CONFIG_INLINE_SPIN_UNLOCK=y | ||
| 202 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
| 203 | CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
| 204 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
| 205 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
| 206 | # CONFIG_INLINE_READ_LOCK is not set | ||
| 207 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
| 208 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
| 209 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
| 210 | CONFIG_INLINE_READ_UNLOCK=y | ||
| 211 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
| 212 | CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
| 213 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
| 214 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
| 215 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
| 216 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
| 217 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
| 218 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
| 219 | CONFIG_INLINE_WRITE_UNLOCK=y | ||
| 220 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
| 221 | CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
| 222 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
| 223 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
| 224 | CONFIG_FREEZER=y | ||
| 225 | |||
| 226 | # | ||
| 227 | # System Type | ||
| 228 | # | ||
| 229 | CONFIG_MMU=y | ||
| 230 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 231 | # CONFIG_ARCH_REALVIEW is not set | ||
| 232 | # CONFIG_ARCH_VERSATILE is not set | ||
| 233 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 234 | # CONFIG_ARCH_AT91 is not set | ||
| 235 | # CONFIG_ARCH_BCMRING is not set | ||
| 236 | # CONFIG_ARCH_CLPS711X is not set | ||
| 237 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 238 | # CONFIG_ARCH_GEMINI is not set | ||
| 239 | # CONFIG_ARCH_EBSA110 is not set | ||
| 240 | # CONFIG_ARCH_EP93XX is not set | ||
| 241 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 242 | # CONFIG_ARCH_MXC is not set | ||
| 243 | # CONFIG_ARCH_MXS is not set | ||
| 244 | # CONFIG_ARCH_STMP3XXX is not set | ||
| 245 | # CONFIG_ARCH_NETX is not set | ||
| 246 | # CONFIG_ARCH_H720X is not set | ||
| 247 | # CONFIG_ARCH_IOP13XX is not set | ||
| 248 | # CONFIG_ARCH_IOP32X is not set | ||
| 249 | # CONFIG_ARCH_IOP33X is not set | ||
| 250 | # CONFIG_ARCH_IXP23XX is not set | ||
| 251 | # CONFIG_ARCH_IXP2000 is not set | ||
| 252 | # CONFIG_ARCH_IXP4XX is not set | ||
| 253 | # CONFIG_ARCH_DOVE is not set | ||
| 254 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 255 | # CONFIG_ARCH_LOKI is not set | ||
| 256 | # CONFIG_ARCH_LPC32XX is not set | ||
| 257 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 258 | # CONFIG_ARCH_ORION5X is not set | ||
| 259 | # CONFIG_ARCH_MMP is not set | ||
| 260 | # CONFIG_ARCH_KS8695 is not set | ||
| 261 | # CONFIG_ARCH_NS9XXX is not set | ||
| 262 | # CONFIG_ARCH_W90X900 is not set | ||
| 263 | # CONFIG_ARCH_NUC93X is not set | ||
| 264 | # CONFIG_ARCH_TEGRA is not set | ||
| 265 | # CONFIG_ARCH_PNX4008 is not set | ||
| 266 | # CONFIG_ARCH_PXA is not set | ||
| 267 | # CONFIG_ARCH_MSM is not set | ||
| 268 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 269 | # CONFIG_ARCH_RPC is not set | ||
| 270 | # CONFIG_ARCH_SA1100 is not set | ||
| 271 | # CONFIG_ARCH_S3C2410 is not set | ||
| 272 | # CONFIG_ARCH_S3C64XX is not set | ||
| 273 | # CONFIG_ARCH_S5P64X0 is not set | ||
| 274 | # CONFIG_ARCH_S5P6442 is not set | ||
| 275 | # CONFIG_ARCH_S5PC100 is not set | ||
| 276 | # CONFIG_ARCH_S5PV210 is not set | ||
| 277 | # CONFIG_ARCH_EXYNOS4 is not set | ||
| 278 | # CONFIG_ARCH_SHARK is not set | ||
| 279 | # CONFIG_ARCH_TCC_926 is not set | ||
| 280 | # CONFIG_ARCH_U300 is not set | ||
| 281 | # CONFIG_ARCH_U8500 is not set | ||
| 282 | # CONFIG_ARCH_NOMADIK is not set | ||
| 283 | # CONFIG_ARCH_DAVINCI is not set | ||
| 284 | CONFIG_ARCH_OMAP=y | ||
| 285 | # CONFIG_PLAT_SPEAR is not set | ||
| 286 | # CONFIG_ARCH_VT8500 is not set | ||
| 287 | # CONFIG_GPIO_PCA953X is not set | ||
| 288 | # CONFIG_KEYBOARD_GPIO_POLLED is not set | ||
| 289 | |||
| 290 | # | ||
| 291 | # TI OMAP Common Features | ||
| 292 | # | ||
| 293 | CONFIG_ARCH_OMAP_OTG=y | ||
| 294 | # CONFIG_ARCH_OMAP1 is not set | ||
| 295 | CONFIG_ARCH_OMAP2PLUS=y | ||
| 296 | |||
| 297 | # | ||
| 298 | # OMAP Feature Selections | ||
| 299 | # | ||
| 300 | CONFIG_OMAP_SMARTREFLEX=y | ||
| 301 | CONFIG_OMAP_SMARTREFLEX_CLASS3=y | ||
| 302 | CONFIG_OMAP_RESET_CLOCKS=y | ||
| 303 | # CONFIG_OMAP_MUX is not set | ||
| 304 | CONFIG_OMAP_MCBSP=y | ||
| 305 | CONFIG_OMAP_MBOX_FWK=m | ||
| 306 | CONFIG_OMAP_MBOX_KFIFO_SIZE=256 | ||
| 307 | CONFIG_OMAP_IOMMU=y | ||
| 308 | CONFIG_OMAP_IOMMU_DEBUG=m | ||
| 309 | CONFIG_OMAP_32K_TIMER=y | ||
| 310 | # CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set | ||
| 311 | CONFIG_OMAP_32K_TIMER_HZ=128 | ||
| 312 | CONFIG_OMAP_DM_TIMER=y | ||
| 313 | # CONFIG_OMAP_PM_NONE is not set | ||
| 314 | CONFIG_OMAP_PM_NOOP=y | ||
| 315 | |||
| 316 | # | ||
| 317 | # TI OMAP2/3/4 Specific Features | ||
| 318 | # | ||
| 319 | CONFIG_ARCH_OMAP2PLUS_TYPICAL=y | ||
| 320 | # CONFIG_ARCH_OMAP2 is not set | ||
| 321 | CONFIG_ARCH_OMAP3=y | ||
| 322 | CONFIG_ARCH_OMAP4=y | ||
| 323 | CONFIG_SOC_OMAP3430=y | ||
| 324 | # CONFIG_SOC_OMAPTI816X is not set | ||
| 325 | CONFIG_OMAP_PACKAGE_CBB=y | ||
| 326 | |||
| 327 | # | ||
| 328 | # OMAP Board Type | ||
| 329 | # | ||
| 330 | CONFIG_MACH_OMAP3_BEAGLE=y | ||
| 331 | # CONFIG_MACH_DEVKIT8000 is not set | ||
| 332 | # CONFIG_MACH_OMAP_LDP is not set | ||
| 333 | # CONFIG_MACH_OMAP3530_LV_SOM is not set | ||
| 334 | # CONFIG_MACH_OMAP3_TORPEDO is not set | ||
| 335 | CONFIG_MACH_OVERO=y | ||
| 336 | CONFIG_MACH_OMAP3EVM=y | ||
| 337 | # CONFIG_MACH_OMAP3517EVM is not set | ||
| 338 | # CONFIG_MACH_CRANEBOARD is not set | ||
| 339 | # CONFIG_MACH_OMAP3_PANDORA is not set | ||
| 340 | CONFIG_MACH_OMAP3_TOUCHBOOK=y | ||
| 341 | # CONFIG_MACH_OMAP_3430SDP is not set | ||
| 342 | # CONFIG_MACH_NOKIA_RM680 is not set | ||
| 343 | # CONFIG_MACH_NOKIA_RX51 is not set | ||
| 344 | CONFIG_MACH_OMAP_ZOOM2=y | ||
| 345 | # CONFIG_MACH_OMAP_ZOOM3 is not set | ||
| 346 | # CONFIG_MACH_CM_T35 is not set | ||
| 347 | # CONFIG_MACH_CM_T3517 is not set | ||
| 348 | # CONFIG_MACH_IGEP0020 is not set | ||
| 349 | # CONFIG_MACH_IGEP0030 is not set | ||
| 350 | # CONFIG_MACH_SBC3530 is not set | ||
| 351 | # CONFIG_MACH_OMAP_3630SDP is not set | ||
| 352 | # CONFIG_OMAP3_EMU is not set | ||
| 353 | # CONFIG_OMAP3_SDRC_AC_TIMING is not set | ||
| 354 | |||
| 355 | # | ||
| 356 | # System MMU | ||
| 357 | # | ||
| 358 | |||
| 359 | # | ||
| 360 | # Processor Type | ||
| 361 | # | ||
| 362 | CONFIG_CPU_V7=y | ||
| 363 | CONFIG_CPU_32v6K=y | ||
| 364 | CONFIG_CPU_32v7=y | ||
| 365 | CONFIG_CPU_ABRT_EV7=y | ||
| 366 | CONFIG_CPU_PABRT_V7=y | ||
| 367 | CONFIG_CPU_CACHE_V7=y | ||
| 368 | CONFIG_CPU_CACHE_VIPT=y | ||
| 369 | CONFIG_CPU_COPY_V6=y | ||
| 370 | CONFIG_CPU_TLB_V7=y | ||
| 371 | CONFIG_CPU_HAS_ASID=y | ||
| 372 | CONFIG_CPU_CP15=y | ||
| 373 | CONFIG_CPU_CP15_MMU=y | ||
| 374 | |||
| 375 | # | ||
| 376 | # Processor Features | ||
| 377 | # | ||
| 378 | CONFIG_ARM_THUMB=y | ||
| 379 | CONFIG_ARM_THUMBEE=y | ||
| 380 | # CONFIG_SWP_EMULATE is not set | ||
| 381 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 382 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 383 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
| 384 | CONFIG_ARM_L1_CACHE_SHIFT_6=y | ||
| 385 | CONFIG_ARM_L1_CACHE_SHIFT=6 | ||
| 386 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 387 | CONFIG_ARM_ERRATA_430973=y | ||
| 388 | # CONFIG_ARM_ERRATA_458693 is not set | ||
| 389 | # CONFIG_ARM_ERRATA_460075 is not set | ||
| 390 | # CONFIG_ARM_ERRATA_743622 is not set | ||
| 391 | # CONFIG_ARM_ERRATA_754322 is not set | ||
| 392 | |||
| 393 | # | ||
| 394 | # Bus support | ||
| 395 | # | ||
| 396 | # CONFIG_PCI_SYSCALL is not set | ||
| 397 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 398 | # CONFIG_PCCARD is not set | ||
| 399 | |||
| 400 | # | ||
| 401 | # Kernel Features | ||
| 402 | # | ||
| 403 | CONFIG_TICK_ONESHOT=y | ||
| 404 | CONFIG_NO_HZ=y | ||
| 405 | CONFIG_HIGH_RES_TIMERS=y | ||
| 406 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 407 | CONFIG_VMSPLIT_3G=y | ||
| 408 | # CONFIG_VMSPLIT_2G is not set | ||
| 409 | # CONFIG_VMSPLIT_1G is not set | ||
| 410 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 411 | # CONFIG_PREEMPT_NONE is not set | ||
| 412 | CONFIG_PREEMPT_VOLUNTARY=y | ||
| 413 | # CONFIG_PREEMPT is not set | ||
| 414 | CONFIG_HZ=128 | ||
| 415 | # CONFIG_THUMB2_KERNEL is not set | ||
| 416 | CONFIG_AEABI=y | ||
| 417 | # CONFIG_OABI_COMPAT is not set | ||
| 418 | CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y | ||
| 419 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 420 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 421 | # CONFIG_HIGHMEM is not set | ||
| 422 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 423 | CONFIG_FLATMEM_MANUAL=y | ||
| 424 | CONFIG_FLATMEM=y | ||
| 425 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 426 | CONFIG_HAVE_MEMBLOCK=y | ||
| 427 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 428 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 429 | CONFIG_COMPACTION=y | ||
| 430 | CONFIG_MIGRATION=y | ||
| 431 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 432 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 433 | CONFIG_VIRT_TO_BUS=y | ||
| 434 | # CONFIG_KSM is not set | ||
| 435 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 436 | CONFIG_NEED_PER_CPU_KM=y | ||
| 437 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
| 438 | CONFIG_LEDS=y | ||
| 439 | CONFIG_ALIGNMENT_TRAP=y | ||
| 440 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 441 | # CONFIG_SECCOMP is not set | ||
| 442 | # CONFIG_CC_STACKPROTECTOR is not set | ||
| 443 | # CONFIG_DEPRECATED_PARAM_STRUCT is not set | ||
| 444 | |||
| 445 | # | ||
| 446 | # Boot options | ||
| 447 | # | ||
| 448 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 449 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 450 | CONFIG_CMDLINE=" debug " | ||
| 451 | # CONFIG_CMDLINE_FORCE is not set | ||
| 452 | # CONFIG_XIP_KERNEL is not set | ||
| 453 | CONFIG_KEXEC=y | ||
| 454 | CONFIG_ATAGS_PROC=y | ||
| 455 | # CONFIG_CRASH_DUMP is not set | ||
| 456 | CONFIG_AUTO_ZRELADDR=y | ||
| 457 | |||
| 458 | # | ||
| 459 | # CPU Power Management | ||
| 460 | # | ||
| 461 | CONFIG_CPU_FREQ=y | ||
| 462 | CONFIG_CPU_FREQ_TABLE=y | ||
| 463 | # CONFIG_CPU_FREQ_DEBUG is not set | ||
| 464 | CONFIG_CPU_FREQ_STAT=y | ||
| 465 | CONFIG_CPU_FREQ_STAT_DETAILS=y | ||
| 466 | CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y | ||
| 467 | # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
| 468 | # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set | ||
| 469 | # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | ||
| 470 | # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | ||
| 471 | # CONFIG_CPU_FREQ_DEFAULT_GOV_HOTPLUG is not set | ||
| 472 | CONFIG_CPU_FREQ_GOV_PERFORMANCE=y | ||
| 473 | CONFIG_CPU_FREQ_GOV_POWERSAVE=y | ||
| 474 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
| 475 | CONFIG_CPU_FREQ_GOV_ONDEMAND=y | ||
| 476 | CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y | ||
| 477 | CONFIG_CPU_IDLE=y | ||
| 478 | CONFIG_CPU_IDLE_GOV_LADDER=y | ||
| 479 | CONFIG_CPU_IDLE_GOV_MENU=y | ||
| 480 | |||
| 481 | # | ||
| 482 | # Floating point emulation | ||
| 483 | # | ||
| 484 | |||
| 485 | # | ||
| 486 | # At least one emulation must be selected | ||
| 487 | # | ||
| 488 | CONFIG_VFP=y | ||
| 489 | CONFIG_VFPv3=y | ||
| 490 | CONFIG_NEON=y | ||
| 491 | |||
| 492 | # | ||
| 493 | # Userspace binary formats | ||
| 494 | # | ||
| 495 | CONFIG_BINFMT_ELF=y | ||
| 496 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 497 | CONFIG_HAVE_AOUT=y | ||
| 498 | CONFIG_BINFMT_AOUT=m | ||
| 499 | CONFIG_BINFMT_MISC=y | ||
| 500 | |||
| 501 | # | ||
| 502 | # Power management options | ||
| 503 | # | ||
| 504 | CONFIG_SUSPEND=y | ||
| 505 | CONFIG_SUSPEND_FREEZER=y | ||
| 506 | CONFIG_PM_SLEEP=y | ||
| 507 | CONFIG_PM_RUNTIME=y | ||
| 508 | CONFIG_PM=y | ||
| 509 | CONFIG_PM_DEBUG=y | ||
| 510 | # CONFIG_PM_VERBOSE is not set | ||
| 511 | # CONFIG_PM_ADVANCED_DEBUG is not set | ||
| 512 | # CONFIG_PM_TEST_SUSPEND is not set | ||
| 513 | CONFIG_CAN_PM_TRACE=y | ||
| 514 | # CONFIG_APM_EMULATION is not set | ||
| 515 | CONFIG_ARCH_HAS_OPP=y | ||
| 516 | CONFIG_PM_OPP=y | ||
| 517 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 518 | CONFIG_NET=y | ||
| 519 | |||
| 520 | # | ||
| 521 | # Networking options | ||
| 522 | # | ||
| 523 | CONFIG_PACKET=y | ||
| 524 | CONFIG_UNIX=y | ||
| 525 | CONFIG_XFRM=y | ||
| 526 | # CONFIG_XFRM_USER is not set | ||
| 527 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 528 | # CONFIG_XFRM_MIGRATE is not set | ||
| 529 | # CONFIG_XFRM_STATISTICS is not set | ||
| 530 | CONFIG_XFRM_IPCOMP=m | ||
| 531 | CONFIG_NET_KEY=y | ||
| 532 | # CONFIG_NET_KEY_MIGRATE is not set | ||
| 533 | CONFIG_INET=y | ||
| 534 | # CONFIG_IP_MULTICAST is not set | ||
| 535 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 536 | CONFIG_IP_ROUTE_CLASSID=y | ||
| 537 | CONFIG_IP_PNP=y | ||
| 538 | CONFIG_IP_PNP_DHCP=y | ||
| 539 | CONFIG_IP_PNP_BOOTP=y | ||
| 540 | CONFIG_IP_PNP_RARP=y | ||
| 541 | CONFIG_NET_IPIP=m | ||
| 542 | CONFIG_NET_IPGRE_DEMUX=m | ||
| 543 | CONFIG_NET_IPGRE=m | ||
| 544 | # CONFIG_ARPD is not set | ||
| 545 | # CONFIG_SYN_COOKIES is not set | ||
| 546 | CONFIG_INET_AH=m | ||
| 547 | CONFIG_INET_ESP=m | ||
| 548 | CONFIG_INET_IPCOMP=m | ||
| 549 | CONFIG_INET_XFRM_TUNNEL=m | ||
| 550 | CONFIG_INET_TUNNEL=m | ||
| 551 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 552 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 553 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 554 | CONFIG_INET_LRO=y | ||
| 555 | CONFIG_INET_DIAG=m | ||
| 556 | CONFIG_INET_TCP_DIAG=m | ||
| 557 | CONFIG_TCP_CONG_ADVANCED=y | ||
| 558 | CONFIG_TCP_CONG_BIC=m | ||
| 559 | CONFIG_TCP_CONG_CUBIC=y | ||
| 560 | CONFIG_TCP_CONG_WESTWOOD=m | ||
| 561 | CONFIG_TCP_CONG_HTCP=m | ||
| 562 | CONFIG_TCP_CONG_HSTCP=m | ||
| 563 | CONFIG_TCP_CONG_HYBLA=m | ||
| 564 | CONFIG_TCP_CONG_VEGAS=m | ||
| 565 | CONFIG_TCP_CONG_SCALABLE=m | ||
| 566 | CONFIG_TCP_CONG_LP=m | ||
| 567 | CONFIG_TCP_CONG_VENO=m | ||
| 568 | CONFIG_TCP_CONG_YEAH=m | ||
| 569 | CONFIG_TCP_CONG_ILLINOIS=m | ||
| 570 | CONFIG_DEFAULT_CUBIC=y | ||
| 571 | # CONFIG_DEFAULT_RENO is not set | ||
| 572 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 573 | # CONFIG_TCP_MD5SIG is not set | ||
| 574 | CONFIG_IPV6=m | ||
| 575 | # CONFIG_IPV6_PRIVACY is not set | ||
| 576 | # CONFIG_IPV6_ROUTER_PREF is not set | ||
| 577 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
| 578 | CONFIG_INET6_AH=m | ||
| 579 | CONFIG_INET6_ESP=m | ||
| 580 | CONFIG_INET6_IPCOMP=m | ||
| 581 | CONFIG_IPV6_MIP6=m | ||
| 582 | CONFIG_INET6_XFRM_TUNNEL=m | ||
| 583 | CONFIG_INET6_TUNNEL=m | ||
| 584 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
| 585 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
| 586 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
| 587 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | ||
| 588 | CONFIG_IPV6_SIT=m | ||
| 589 | # CONFIG_IPV6_SIT_6RD is not set | ||
| 590 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
| 591 | CONFIG_IPV6_TUNNEL=m | ||
| 592 | CONFIG_IPV6_MULTIPLE_TABLES=y | ||
| 593 | CONFIG_IPV6_SUBTREES=y | ||
| 594 | CONFIG_IPV6_MROUTE=y | ||
| 595 | CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y | ||
| 596 | # CONFIG_IPV6_PIMSM_V2 is not set | ||
| 597 | # CONFIG_NETWORK_SECMARK is not set | ||
| 598 | CONFIG_NETWORK_PHY_TIMESTAMPING=y | ||
| 599 | CONFIG_NETFILTER=y | ||
| 600 | # CONFIG_NETFILTER_DEBUG is not set | ||
| 601 | CONFIG_NETFILTER_ADVANCED=y | ||
| 602 | CONFIG_BRIDGE_NETFILTER=y | ||
| 603 | |||
| 604 | # | ||
| 605 | # Core Netfilter Configuration | ||
| 606 | # | ||
| 607 | CONFIG_NETFILTER_NETLINK=m | ||
| 608 | CONFIG_NETFILTER_NETLINK_QUEUE=m | ||
| 609 | CONFIG_NETFILTER_NETLINK_LOG=m | ||
| 610 | CONFIG_NF_CONNTRACK=m | ||
| 611 | CONFIG_NF_CONNTRACK_MARK=y | ||
| 612 | CONFIG_NF_CONNTRACK_ZONES=y | ||
| 613 | CONFIG_NF_CONNTRACK_EVENTS=y | ||
| 614 | CONFIG_NF_CONNTRACK_TIMESTAMP=y | ||
| 615 | CONFIG_NF_CT_PROTO_DCCP=m | ||
| 616 | CONFIG_NF_CT_PROTO_GRE=m | ||
| 617 | CONFIG_NF_CT_PROTO_SCTP=m | ||
| 618 | CONFIG_NF_CT_PROTO_UDPLITE=m | ||
| 619 | CONFIG_NF_CONNTRACK_AMANDA=m | ||
| 620 | CONFIG_NF_CONNTRACK_FTP=m | ||
| 621 | CONFIG_NF_CONNTRACK_H323=m | ||
| 622 | CONFIG_NF_CONNTRACK_IRC=m | ||
| 623 | CONFIG_NF_CONNTRACK_BROADCAST=m | ||
| 624 | CONFIG_NF_CONNTRACK_NETBIOS_NS=m | ||
| 625 | CONFIG_NF_CONNTRACK_SNMP=m | ||
| 626 | CONFIG_NF_CONNTRACK_PPTP=m | ||
| 627 | CONFIG_NF_CONNTRACK_SANE=m | ||
| 628 | CONFIG_NF_CONNTRACK_SIP=m | ||
| 629 | CONFIG_NF_CONNTRACK_TFTP=m | ||
| 630 | CONFIG_NF_CT_NETLINK=m | ||
| 631 | # CONFIG_NETFILTER_TPROXY is not set | ||
| 632 | CONFIG_NETFILTER_XTABLES=m | ||
| 633 | |||
| 634 | # | ||
| 635 | # Xtables combined modules | ||
| 636 | # | ||
| 637 | CONFIG_NETFILTER_XT_MARK=m | ||
| 638 | CONFIG_NETFILTER_XT_CONNMARK=m | ||
| 639 | CONFIG_NETFILTER_XT_SET=m | ||
| 640 | |||
| 641 | # | ||
| 642 | # Xtables targets | ||
| 643 | # | ||
| 644 | CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m | ||
| 645 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m | ||
| 646 | CONFIG_NETFILTER_XT_TARGET_CONNMARK=m | ||
| 647 | CONFIG_NETFILTER_XT_TARGET_CT=m | ||
| 648 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set | ||
| 649 | CONFIG_NETFILTER_XT_TARGET_HL=m | ||
| 650 | CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m | ||
| 651 | # CONFIG_NETFILTER_XT_TARGET_LED is not set | ||
| 652 | CONFIG_NETFILTER_XT_TARGET_MARK=m | ||
| 653 | CONFIG_NETFILTER_XT_TARGET_NFLOG=m | ||
| 654 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | ||
| 655 | # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set | ||
| 656 | CONFIG_NETFILTER_XT_TARGET_RATEEST=m | ||
| 657 | CONFIG_NETFILTER_XT_TARGET_TEE=m | ||
| 658 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set | ||
| 659 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=m | ||
| 660 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set | ||
| 661 | |||
| 662 | # | ||
| 663 | # Xtables matches | ||
| 664 | # | ||
| 665 | CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m | ||
| 666 | # CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set | ||
| 667 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m | ||
| 668 | CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m | ||
| 669 | CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m | ||
| 670 | CONFIG_NETFILTER_XT_MATCH_CONNMARK=m | ||
| 671 | CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m | ||
| 672 | CONFIG_NETFILTER_XT_MATCH_CPU=m | ||
| 673 | CONFIG_NETFILTER_XT_MATCH_DCCP=m | ||
| 674 | CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m | ||
| 675 | CONFIG_NETFILTER_XT_MATCH_DSCP=m | ||
| 676 | CONFIG_NETFILTER_XT_MATCH_ESP=m | ||
| 677 | CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m | ||
| 678 | CONFIG_NETFILTER_XT_MATCH_HELPER=m | ||
| 679 | CONFIG_NETFILTER_XT_MATCH_HL=m | ||
| 680 | CONFIG_NETFILTER_XT_MATCH_IPRANGE=m | ||
| 681 | CONFIG_NETFILTER_XT_MATCH_IPVS=m | ||
| 682 | CONFIG_NETFILTER_XT_MATCH_LENGTH=m | ||
| 683 | CONFIG_NETFILTER_XT_MATCH_LIMIT=m | ||
| 684 | CONFIG_NETFILTER_XT_MATCH_MAC=m | ||
| 685 | CONFIG_NETFILTER_XT_MATCH_MARK=m | ||
| 686 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | ||
| 687 | # CONFIG_NETFILTER_XT_MATCH_OSF is not set | ||
| 688 | CONFIG_NETFILTER_XT_MATCH_OWNER=m | ||
| 689 | CONFIG_NETFILTER_XT_MATCH_POLICY=m | ||
| 690 | # CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set | ||
| 691 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | ||
| 692 | CONFIG_NETFILTER_XT_MATCH_QUOTA=m | ||
| 693 | CONFIG_NETFILTER_XT_MATCH_RATEEST=m | ||
| 694 | CONFIG_NETFILTER_XT_MATCH_REALM=m | ||
| 695 | CONFIG_NETFILTER_XT_MATCH_RECENT=m | ||
| 696 | CONFIG_NETFILTER_XT_MATCH_SCTP=m | ||
| 697 | CONFIG_NETFILTER_XT_MATCH_STATE=m | ||
| 698 | CONFIG_NETFILTER_XT_MATCH_STATISTIC=m | ||
| 699 | CONFIG_NETFILTER_XT_MATCH_STRING=m | ||
| 700 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m | ||
| 701 | CONFIG_NETFILTER_XT_MATCH_TIME=m | ||
| 702 | CONFIG_NETFILTER_XT_MATCH_U32=m | ||
| 703 | CONFIG_IP_SET=m | ||
| 704 | CONFIG_IP_SET_MAX=256 | ||
| 705 | # CONFIG_IP_SET_BITMAP_IP is not set | ||
| 706 | # CONFIG_IP_SET_BITMAP_IPMAC is not set | ||
| 707 | # CONFIG_IP_SET_BITMAP_PORT is not set | ||
| 708 | # CONFIG_IP_SET_HASH_IP is not set | ||
| 709 | # CONFIG_IP_SET_HASH_IPPORT is not set | ||
| 710 | # CONFIG_IP_SET_HASH_IPPORTIP is not set | ||
| 711 | # CONFIG_IP_SET_HASH_IPPORTNET is not set | ||
| 712 | # CONFIG_IP_SET_HASH_NET is not set | ||
| 713 | # CONFIG_IP_SET_HASH_NETPORT is not set | ||
| 714 | # CONFIG_IP_SET_LIST_SET is not set | ||
| 715 | CONFIG_IP_VS=m | ||
| 716 | CONFIG_IP_VS_IPV6=y | ||
| 717 | CONFIG_IP_VS_DEBUG=y | ||
| 718 | CONFIG_IP_VS_TAB_BITS=12 | ||
| 719 | |||
| 720 | # | ||
| 721 | # IPVS transport protocol load balancing support | ||
| 722 | # | ||
| 723 | CONFIG_IP_VS_PROTO_TCP=y | ||
| 724 | CONFIG_IP_VS_PROTO_UDP=y | ||
| 725 | CONFIG_IP_VS_PROTO_AH_ESP=y | ||
| 726 | CONFIG_IP_VS_PROTO_ESP=y | ||
| 727 | CONFIG_IP_VS_PROTO_AH=y | ||
| 728 | # CONFIG_IP_VS_PROTO_SCTP is not set | ||
| 729 | |||
| 730 | # | ||
| 731 | # IPVS scheduler | ||
| 732 | # | ||
| 733 | CONFIG_IP_VS_RR=m | ||
| 734 | CONFIG_IP_VS_WRR=m | ||
| 735 | CONFIG_IP_VS_LC=m | ||
| 736 | CONFIG_IP_VS_WLC=m | ||
| 737 | CONFIG_IP_VS_LBLC=m | ||
| 738 | CONFIG_IP_VS_LBLCR=m | ||
| 739 | CONFIG_IP_VS_DH=m | ||
| 740 | CONFIG_IP_VS_SH=m | ||
| 741 | CONFIG_IP_VS_SED=m | ||
| 742 | CONFIG_IP_VS_NQ=m | ||
| 743 | |||
| 744 | # | ||
| 745 | # IPVS application helper | ||
| 746 | # | ||
| 747 | CONFIG_IP_VS_FTP=m | ||
| 748 | CONFIG_IP_VS_NFCT=y | ||
| 749 | CONFIG_IP_VS_PE_SIP=m | ||
| 750 | |||
| 751 | # | ||
| 752 | # IP: Netfilter Configuration | ||
| 753 | # | ||
| 754 | CONFIG_NF_DEFRAG_IPV4=m | ||
| 755 | CONFIG_NF_CONNTRACK_IPV4=m | ||
| 756 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y | ||
| 757 | CONFIG_IP_NF_QUEUE=m | ||
| 758 | CONFIG_IP_NF_IPTABLES=m | ||
| 759 | CONFIG_IP_NF_MATCH_AH=m | ||
| 760 | CONFIG_IP_NF_MATCH_ECN=m | ||
| 761 | CONFIG_IP_NF_MATCH_TTL=m | ||
| 762 | CONFIG_IP_NF_FILTER=m | ||
| 763 | CONFIG_IP_NF_TARGET_REJECT=m | ||
| 764 | CONFIG_IP_NF_TARGET_LOG=m | ||
| 765 | CONFIG_IP_NF_TARGET_ULOG=m | ||
| 766 | CONFIG_NF_NAT=m | ||
| 767 | CONFIG_NF_NAT_NEEDED=y | ||
| 768 | CONFIG_IP_NF_TARGET_MASQUERADE=m | ||
| 769 | CONFIG_IP_NF_TARGET_NETMAP=m | ||
| 770 | CONFIG_IP_NF_TARGET_REDIRECT=m | ||
| 771 | CONFIG_NF_NAT_SNMP_BASIC=m | ||
| 772 | CONFIG_NF_NAT_PROTO_DCCP=m | ||
| 773 | CONFIG_NF_NAT_PROTO_GRE=m | ||
| 774 | CONFIG_NF_NAT_PROTO_UDPLITE=m | ||
| 775 | CONFIG_NF_NAT_PROTO_SCTP=m | ||
| 776 | CONFIG_NF_NAT_FTP=m | ||
| 777 | CONFIG_NF_NAT_IRC=m | ||
| 778 | CONFIG_NF_NAT_TFTP=m | ||
| 779 | CONFIG_NF_NAT_AMANDA=m | ||
| 780 | CONFIG_NF_NAT_PPTP=m | ||
| 781 | CONFIG_NF_NAT_H323=m | ||
| 782 | CONFIG_NF_NAT_SIP=m | ||
| 783 | CONFIG_IP_NF_MANGLE=m | ||
| 784 | CONFIG_IP_NF_TARGET_CLUSTERIP=m | ||
| 785 | CONFIG_IP_NF_TARGET_ECN=m | ||
| 786 | CONFIG_IP_NF_TARGET_TTL=m | ||
| 787 | CONFIG_IP_NF_RAW=m | ||
| 788 | CONFIG_IP_NF_ARPTABLES=m | ||
| 789 | CONFIG_IP_NF_ARPFILTER=m | ||
| 790 | CONFIG_IP_NF_ARP_MANGLE=m | ||
| 791 | |||
| 792 | # | ||
| 793 | # IPv6: Netfilter Configuration | ||
| 794 | # | ||
| 795 | CONFIG_NF_DEFRAG_IPV6=m | ||
| 796 | CONFIG_NF_CONNTRACK_IPV6=m | ||
| 797 | CONFIG_IP6_NF_QUEUE=m | ||
| 798 | CONFIG_IP6_NF_IPTABLES=m | ||
| 799 | CONFIG_IP6_NF_MATCH_AH=m | ||
| 800 | CONFIG_IP6_NF_MATCH_EUI64=m | ||
| 801 | CONFIG_IP6_NF_MATCH_FRAG=m | ||
| 802 | CONFIG_IP6_NF_MATCH_OPTS=m | ||
| 803 | CONFIG_IP6_NF_MATCH_HL=m | ||
| 804 | CONFIG_IP6_NF_MATCH_IPV6HEADER=m | ||
| 805 | CONFIG_IP6_NF_MATCH_MH=m | ||
| 806 | CONFIG_IP6_NF_MATCH_RT=m | ||
| 807 | CONFIG_IP6_NF_TARGET_HL=m | ||
| 808 | CONFIG_IP6_NF_TARGET_LOG=m | ||
| 809 | CONFIG_IP6_NF_FILTER=m | ||
| 810 | CONFIG_IP6_NF_TARGET_REJECT=m | ||
| 811 | CONFIG_IP6_NF_MANGLE=m | ||
| 812 | CONFIG_IP6_NF_RAW=m | ||
| 813 | # CONFIG_BRIDGE_NF_EBTABLES is not set | ||
| 814 | CONFIG_IP_DCCP=m | ||
| 815 | CONFIG_INET_DCCP_DIAG=m | ||
| 816 | |||
| 817 | # | ||
| 818 | # DCCP CCIDs Configuration (EXPERIMENTAL) | ||
| 819 | # | ||
| 820 | # CONFIG_IP_DCCP_CCID2_DEBUG is not set | ||
| 821 | CONFIG_IP_DCCP_CCID3=y | ||
| 822 | # CONFIG_IP_DCCP_CCID3_DEBUG is not set | ||
| 823 | CONFIG_IP_DCCP_TFRC_LIB=y | ||
| 824 | |||
| 825 | # | ||
| 826 | # DCCP Kernel Hacking | ||
| 827 | # | ||
| 828 | # CONFIG_IP_DCCP_DEBUG is not set | ||
| 829 | CONFIG_IP_SCTP=m | ||
| 830 | # CONFIG_SCTP_DBG_MSG is not set | ||
| 831 | # CONFIG_SCTP_DBG_OBJCNT is not set | ||
| 832 | # CONFIG_SCTP_HMAC_NONE is not set | ||
| 833 | # CONFIG_SCTP_HMAC_SHA1 is not set | ||
| 834 | CONFIG_SCTP_HMAC_MD5=y | ||
| 835 | # CONFIG_RDS is not set | ||
| 836 | CONFIG_TIPC=m | ||
| 837 | # CONFIG_TIPC_ADVANCED is not set | ||
| 838 | # CONFIG_TIPC_DEBUG is not set | ||
| 839 | CONFIG_ATM=m | ||
| 840 | CONFIG_ATM_CLIP=m | ||
| 841 | # CONFIG_ATM_CLIP_NO_ICMP is not set | ||
| 842 | CONFIG_ATM_LANE=m | ||
| 843 | CONFIG_ATM_MPOA=m | ||
| 844 | CONFIG_ATM_BR2684=m | ||
| 845 | # CONFIG_ATM_BR2684_IPFILTER is not set | ||
| 846 | CONFIG_L2TP=m | ||
| 847 | CONFIG_L2TP_DEBUGFS=m | ||
| 848 | CONFIG_L2TP_V3=y | ||
| 849 | CONFIG_L2TP_IP=m | ||
| 850 | CONFIG_L2TP_ETH=m | ||
| 851 | CONFIG_STP=m | ||
| 852 | CONFIG_GARP=m | ||
| 853 | CONFIG_BRIDGE=m | ||
| 854 | CONFIG_BRIDGE_IGMP_SNOOPING=y | ||
| 855 | # CONFIG_NET_DSA is not set | ||
| 856 | CONFIG_VLAN_8021Q=m | ||
| 857 | CONFIG_VLAN_8021Q_GVRP=y | ||
| 858 | # CONFIG_DECNET is not set | ||
| 859 | CONFIG_LLC=m | ||
| 860 | # CONFIG_LLC2 is not set | ||
| 861 | # CONFIG_IPX is not set | ||
| 862 | # CONFIG_ATALK is not set | ||
| 863 | # CONFIG_X25 is not set | ||
| 864 | # CONFIG_LAPB is not set | ||
| 865 | # CONFIG_ECONET is not set | ||
| 866 | CONFIG_WAN_ROUTER=m | ||
| 867 | # CONFIG_PHONET is not set | ||
| 868 | # CONFIG_IEEE802154 is not set | ||
| 869 | CONFIG_NET_SCHED=y | ||
| 870 | |||
| 871 | # | ||
| 872 | # Queueing/Scheduling | ||
| 873 | # | ||
| 874 | CONFIG_NET_SCH_CBQ=m | ||
| 875 | CONFIG_NET_SCH_HTB=m | ||
| 876 | CONFIG_NET_SCH_HFSC=m | ||
| 877 | CONFIG_NET_SCH_ATM=m | ||
| 878 | CONFIG_NET_SCH_PRIO=m | ||
| 879 | CONFIG_NET_SCH_MULTIQ=m | ||
| 880 | CONFIG_NET_SCH_RED=m | ||
| 881 | # CONFIG_NET_SCH_SFB is not set | ||
| 882 | CONFIG_NET_SCH_SFQ=m | ||
| 883 | CONFIG_NET_SCH_TEQL=m | ||
| 884 | CONFIG_NET_SCH_TBF=m | ||
| 885 | CONFIG_NET_SCH_GRED=m | ||
| 886 | CONFIG_NET_SCH_DSMARK=m | ||
| 887 | CONFIG_NET_SCH_NETEM=m | ||
| 888 | CONFIG_NET_SCH_DRR=m | ||
| 889 | CONFIG_NET_SCH_MQPRIO=m | ||
| 890 | CONFIG_NET_SCH_CHOKE=m | ||
| 891 | |||
| 892 | # | ||
| 893 | # Classification | ||
| 894 | # | ||
| 895 | CONFIG_NET_CLS=y | ||
| 896 | CONFIG_NET_CLS_BASIC=m | ||
| 897 | CONFIG_NET_CLS_TCINDEX=m | ||
| 898 | CONFIG_NET_CLS_ROUTE4=m | ||
| 899 | CONFIG_NET_CLS_FW=m | ||
| 900 | CONFIG_NET_CLS_U32=m | ||
| 901 | CONFIG_CLS_U32_PERF=y | ||
| 902 | CONFIG_CLS_U32_MARK=y | ||
| 903 | CONFIG_NET_CLS_RSVP=m | ||
| 904 | CONFIG_NET_CLS_RSVP6=m | ||
| 905 | CONFIG_NET_CLS_FLOW=m | ||
| 906 | CONFIG_NET_CLS_CGROUP=m | ||
| 907 | # CONFIG_NET_EMATCH is not set | ||
| 908 | # CONFIG_NET_CLS_ACT is not set | ||
| 909 | CONFIG_NET_CLS_IND=y | ||
| 910 | CONFIG_NET_SCH_FIFO=y | ||
| 911 | # CONFIG_DCB is not set | ||
| 912 | CONFIG_DNS_RESOLVER=y | ||
| 913 | # CONFIG_BATMAN_ADV is not set | ||
| 914 | |||
| 915 | # | ||
| 916 | # Network testing | ||
| 917 | # | ||
| 918 | # CONFIG_NET_PKTGEN is not set | ||
| 919 | # CONFIG_HAMRADIO is not set | ||
| 920 | CONFIG_CAN=m | ||
| 921 | CONFIG_CAN_RAW=m | ||
| 922 | CONFIG_CAN_BCM=m | ||
| 923 | |||
| 924 | # | ||
| 925 | # CAN Device Drivers | ||
| 926 | # | ||
| 927 | CONFIG_CAN_VCAN=m | ||
| 928 | CONFIG_CAN_SLCAN=m | ||
| 929 | # CONFIG_CAN_DEV is not set | ||
| 930 | # CONFIG_CAN_DEBUG_DEVICES is not set | ||
| 931 | CONFIG_IRDA=m | ||
| 932 | |||
| 933 | # | ||
| 934 | # IrDA protocols | ||
| 935 | # | ||
| 936 | CONFIG_IRLAN=m | ||
| 937 | CONFIG_IRNET=m | ||
| 938 | CONFIG_IRCOMM=m | ||
| 939 | CONFIG_IRDA_ULTRA=y | ||
| 940 | |||
| 941 | # | ||
| 942 | # IrDA options | ||
| 943 | # | ||
| 944 | CONFIG_IRDA_CACHE_LAST_LSAP=y | ||
| 945 | CONFIG_IRDA_FAST_RR=y | ||
| 946 | CONFIG_IRDA_DEBUG=y | ||
| 947 | |||
| 948 | # | ||
| 949 | # Infrared-port device drivers | ||
| 950 | # | ||
| 951 | |||
| 952 | # | ||
| 953 | # SIR device drivers | ||
| 954 | # | ||
| 955 | CONFIG_IRTTY_SIR=m | ||
| 956 | |||
| 957 | # | ||
| 958 | # Dongle support | ||
| 959 | # | ||
| 960 | CONFIG_DONGLE=y | ||
| 961 | CONFIG_ESI_DONGLE=m | ||
| 962 | CONFIG_ACTISYS_DONGLE=m | ||
| 963 | CONFIG_TEKRAM_DONGLE=m | ||
| 964 | CONFIG_TOIM3232_DONGLE=m | ||
| 965 | CONFIG_LITELINK_DONGLE=m | ||
| 966 | CONFIG_MA600_DONGLE=m | ||
| 967 | CONFIG_GIRBIL_DONGLE=m | ||
| 968 | CONFIG_MCP2120_DONGLE=m | ||
| 969 | CONFIG_OLD_BELKIN_DONGLE=m | ||
| 970 | # CONFIG_ACT200L_DONGLE is not set | ||
| 971 | CONFIG_KINGSUN_DONGLE=m | ||
| 972 | CONFIG_KSDAZZLE_DONGLE=m | ||
| 973 | CONFIG_KS959_DONGLE=m | ||
| 974 | |||
| 975 | # | ||
| 976 | # FIR device drivers | ||
| 977 | # | ||
| 978 | CONFIG_USB_IRDA=m | ||
| 979 | CONFIG_SIGMATEL_FIR=m | ||
| 980 | CONFIG_MCS_FIR=m | ||
| 981 | CONFIG_BT=y | ||
| 982 | CONFIG_BT_L2CAP=y | ||
| 983 | CONFIG_BT_SCO=y | ||
| 984 | CONFIG_BT_RFCOMM=m | ||
| 985 | CONFIG_BT_RFCOMM_TTY=y | ||
| 986 | CONFIG_BT_BNEP=m | ||
| 987 | CONFIG_BT_BNEP_MC_FILTER=y | ||
| 988 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
| 989 | CONFIG_BT_HIDP=m | ||
| 990 | |||
| 991 | # | ||
| 992 | # Bluetooth device drivers | ||
| 993 | # | ||
| 994 | CONFIG_BT_HCIBTUSB=y | ||
| 995 | CONFIG_BT_HCIBTSDIO=m | ||
| 996 | CONFIG_BT_HCIUART=y | ||
| 997 | CONFIG_BT_HCIUART_H4=y | ||
| 998 | CONFIG_BT_HCIUART_BCSP=y | ||
| 999 | CONFIG_BT_HCIUART_ATH3K=y | ||
| 1000 | CONFIG_BT_HCIUART_LL=y | ||
| 1001 | CONFIG_BT_HCIBCM203X=m | ||
| 1002 | CONFIG_BT_HCIBPA10X=m | ||
| 1003 | CONFIG_BT_HCIBFUSB=m | ||
| 1004 | # CONFIG_BT_HCIVHCI is not set | ||
| 1005 | CONFIG_BT_MRVL=m | ||
| 1006 | # CONFIG_BT_MRVL_SDIO is not set | ||
| 1007 | CONFIG_BT_ATH3K=m | ||
| 1008 | CONFIG_BT_WILINK=m | ||
| 1009 | CONFIG_AF_RXRPC=m | ||
| 1010 | # CONFIG_AF_RXRPC_DEBUG is not set | ||
| 1011 | # CONFIG_RXKAD is not set | ||
| 1012 | CONFIG_FIB_RULES=y | ||
| 1013 | CONFIG_WIRELESS=y | ||
| 1014 | CONFIG_WIRELESS_EXT=y | ||
| 1015 | CONFIG_WEXT_CORE=y | ||
| 1016 | CONFIG_WEXT_PROC=y | ||
| 1017 | CONFIG_WEXT_SPY=y | ||
| 1018 | CONFIG_WEXT_PRIV=y | ||
| 1019 | CONFIG_CFG80211=m | ||
| 1020 | CONFIG_NL80211_TESTMODE=y | ||
| 1021 | # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set | ||
| 1022 | # CONFIG_CFG80211_REG_DEBUG is not set | ||
| 1023 | CONFIG_CFG80211_DEFAULT_PS=y | ||
| 1024 | # CONFIG_CFG80211_DEBUGFS is not set | ||
| 1025 | # CONFIG_CFG80211_INTERNAL_REGDB is not set | ||
| 1026 | CONFIG_CFG80211_WEXT=y | ||
| 1027 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
| 1028 | CONFIG_LIB80211=y | ||
| 1029 | CONFIG_LIB80211_CRYPT_WEP=m | ||
| 1030 | CONFIG_LIB80211_CRYPT_CCMP=m | ||
| 1031 | CONFIG_LIB80211_CRYPT_TKIP=m | ||
| 1032 | # CONFIG_LIB80211_DEBUG is not set | ||
| 1033 | CONFIG_MAC80211=m | ||
| 1034 | CONFIG_MAC80211_HAS_RC=y | ||
| 1035 | CONFIG_MAC80211_RC_PID=y | ||
| 1036 | # CONFIG_MAC80211_RC_MINSTREL is not set | ||
| 1037 | CONFIG_MAC80211_RC_DEFAULT_PID=y | ||
| 1038 | CONFIG_MAC80211_RC_DEFAULT="pid" | ||
| 1039 | # CONFIG_MAC80211_MESH is not set | ||
| 1040 | CONFIG_MAC80211_LEDS=y | ||
| 1041 | # CONFIG_MAC80211_DEBUGFS is not set | ||
| 1042 | # CONFIG_MAC80211_DEBUG_MENU is not set | ||
| 1043 | CONFIG_WIMAX=m | ||
| 1044 | CONFIG_WIMAX_DEBUG_LEVEL=8 | ||
| 1045 | CONFIG_RFKILL=y | ||
| 1046 | CONFIG_RFKILL_LEDS=y | ||
| 1047 | CONFIG_RFKILL_INPUT=y | ||
| 1048 | CONFIG_NET_9P=m | ||
| 1049 | # CONFIG_NET_9P_DEBUG is not set | ||
| 1050 | # CONFIG_CAIF is not set | ||
| 1051 | CONFIG_CEPH_LIB=m | ||
| 1052 | # CONFIG_CEPH_LIB_PRETTYDEBUG is not set | ||
| 1053 | |||
| 1054 | # | ||
| 1055 | # Device Drivers | ||
| 1056 | # | ||
| 1057 | |||
| 1058 | # | ||
| 1059 | # Generic Driver Options | ||
| 1060 | # | ||
| 1061 | CONFIG_UEVENT_HELPER_PATH="" | ||
| 1062 | CONFIG_DEVTMPFS=y | ||
| 1063 | CONFIG_DEVTMPFS_MOUNT=y | ||
| 1064 | CONFIG_STANDALONE=y | ||
| 1065 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 1066 | CONFIG_FW_LOADER=y | ||
| 1067 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 1068 | CONFIG_EXTRA_FIRMWARE="" | ||
| 1069 | # CONFIG_DEBUG_DRIVER is not set | ||
| 1070 | # CONFIG_DEBUG_DEVRES is not set | ||
| 1071 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 1072 | # CONFIG_CONNECTOR is not set | ||
| 1073 | CONFIG_MTD=y | ||
| 1074 | # CONFIG_MTD_DEBUG is not set | ||
| 1075 | # CONFIG_MTD_TESTS is not set | ||
| 1076 | CONFIG_MTD_PARTITIONS=y | ||
| 1077 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 1078 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
| 1079 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 1080 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 1081 | |||
| 1082 | # | ||
| 1083 | # User Modules And Translation Layers | ||
| 1084 | # | ||
| 1085 | CONFIG_MTD_CHAR=y | ||
| 1086 | CONFIG_MTD_BLKDEVS=y | ||
| 1087 | CONFIG_MTD_BLOCK=y | ||
| 1088 | # CONFIG_FTL is not set | ||
| 1089 | # CONFIG_NFTL is not set | ||
| 1090 | # CONFIG_INFTL is not set | ||
| 1091 | # CONFIG_RFD_FTL is not set | ||
| 1092 | # CONFIG_SSFDC is not set | ||
| 1093 | CONFIG_SM_FTL=m | ||
| 1094 | # CONFIG_MTD_OOPS is not set | ||
| 1095 | CONFIG_MTD_SWAP=m | ||
| 1096 | |||
| 1097 | # | ||
| 1098 | # RAM/ROM/Flash chip drivers | ||
| 1099 | # | ||
| 1100 | # CONFIG_MTD_CFI is not set | ||
| 1101 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 1102 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 1103 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 1104 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 1105 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 1106 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 1107 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 1108 | CONFIG_MTD_CFI_I1=y | ||
| 1109 | CONFIG_MTD_CFI_I2=y | ||
| 1110 | # CONFIG_MTD_CFI_I4 is not set | ||
| 1111 | # CONFIG_MTD_CFI_I8 is not set | ||
| 1112 | # CONFIG_MTD_RAM is not set | ||
| 1113 | # CONFIG_MTD_ROM is not set | ||
| 1114 | # CONFIG_MTD_ABSENT is not set | ||
| 1115 | |||
| 1116 | # | ||
| 1117 | # Mapping drivers for chip access | ||
| 1118 | # | ||
| 1119 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 1120 | # CONFIG_MTD_PLATRAM is not set | ||
| 1121 | |||
| 1122 | # | ||
| 1123 | # Self-contained MTD device drivers | ||
| 1124 | # | ||
| 1125 | # CONFIG_MTD_DATAFLASH is not set | ||
| 1126 | # CONFIG_MTD_M25P80 is not set | ||
| 1127 | # CONFIG_MTD_SST25L is not set | ||
| 1128 | # CONFIG_MTD_SLRAM is not set | ||
| 1129 | # CONFIG_MTD_PHRAM is not set | ||
| 1130 | # CONFIG_MTD_MTDRAM is not set | ||
| 1131 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 1132 | |||
| 1133 | # | ||
| 1134 | # Disk-On-Chip Device Drivers | ||
| 1135 | # | ||
| 1136 | # CONFIG_MTD_DOC2000 is not set | ||
| 1137 | # CONFIG_MTD_DOC2001 is not set | ||
| 1138 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 1139 | CONFIG_MTD_NAND_ECC=y | ||
| 1140 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
| 1141 | CONFIG_MTD_NAND=y | ||
| 1142 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 1143 | # CONFIG_MTD_NAND_ECC_BCH is not set | ||
| 1144 | # CONFIG_MTD_SM_COMMON is not set | ||
| 1145 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
| 1146 | # CONFIG_MTD_NAND_GPIO is not set | ||
| 1147 | CONFIG_MTD_NAND_OMAP2=y | ||
| 1148 | CONFIG_MTD_NAND_IDS=y | ||
| 1149 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
| 1150 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
| 1151 | CONFIG_MTD_NAND_PLATFORM=y | ||
| 1152 | # CONFIG_MTD_ALAUDA is not set | ||
| 1153 | # CONFIG_MTD_ONENAND is not set | ||
| 1154 | |||
| 1155 | # | ||
| 1156 | # LPDDR flash memory drivers | ||
| 1157 | # | ||
| 1158 | # CONFIG_MTD_LPDDR is not set | ||
| 1159 | CONFIG_MTD_UBI=y | ||
| 1160 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||
| 1161 | CONFIG_MTD_UBI_BEB_RESERVE=1 | ||
| 1162 | # CONFIG_MTD_UBI_GLUEBI is not set | ||
| 1163 | # CONFIG_MTD_UBI_DEBUG is not set | ||
| 1164 | # CONFIG_PARPORT is not set | ||
| 1165 | CONFIG_BLK_DEV=y | ||
| 1166 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 1167 | CONFIG_BLK_DEV_LOOP=y | ||
| 1168 | CONFIG_BLK_DEV_CRYPTOLOOP=m | ||
| 1169 | |||
| 1170 | # | ||
| 1171 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
| 1172 | # | ||
| 1173 | # CONFIG_BLK_DEV_NBD is not set | ||
| 1174 | # CONFIG_BLK_DEV_UB is not set | ||
| 1175 | CONFIG_BLK_DEV_RAM=y | ||
| 1176 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 1177 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
| 1178 | # CONFIG_BLK_DEV_XIP is not set | ||
| 1179 | CONFIG_CDROM_PKTCDVD=m | ||
| 1180 | CONFIG_CDROM_PKTCDVD_BUFFERS=8 | ||
| 1181 | # CONFIG_CDROM_PKTCDVD_WCACHE is not set | ||
| 1182 | # CONFIG_ATA_OVER_ETH is not set | ||
| 1183 | # CONFIG_MG_DISK is not set | ||
| 1184 | # CONFIG_BLK_DEV_RBD is not set | ||
| 1185 | # CONFIG_SENSORS_LIS3LV02D is not set | ||
| 1186 | CONFIG_MISC_DEVICES=y | ||
| 1187 | # CONFIG_AD525X_DPOT is not set | ||
| 1188 | # CONFIG_ICS932S401 is not set | ||
| 1189 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 1190 | # CONFIG_APDS9802ALS is not set | ||
| 1191 | # CONFIG_ISL29003 is not set | ||
| 1192 | # CONFIG_ISL29020 is not set | ||
| 1193 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 1194 | CONFIG_SENSORS_BH1780=m | ||
| 1195 | # CONFIG_SENSORS_BH1770 is not set | ||
| 1196 | # CONFIG_SENSORS_APDS990X is not set | ||
| 1197 | CONFIG_HMC6352=m | ||
| 1198 | # CONFIG_DS1682 is not set | ||
| 1199 | # CONFIG_TI_DAC7512 is not set | ||
| 1200 | CONFIG_BMP085=m | ||
| 1201 | # CONFIG_C2PORT is not set | ||
| 1202 | |||
| 1203 | # | ||
| 1204 | # EEPROM support | ||
| 1205 | # | ||
| 1206 | CONFIG_EEPROM_AT24=m | ||
| 1207 | # CONFIG_EEPROM_AT25 is not set | ||
| 1208 | # CONFIG_EEPROM_LEGACY is not set | ||
| 1209 | # CONFIG_EEPROM_MAX6875 is not set | ||
| 1210 | CONFIG_EEPROM_93CX6=y | ||
| 1211 | CONFIG_IWMC3200TOP=m | ||
| 1212 | # CONFIG_IWMC3200TOP_DEBUG is not set | ||
| 1213 | # CONFIG_IWMC3200TOP_DEBUGFS is not set | ||
| 1214 | |||
| 1215 | # | ||
| 1216 | # Texas Instruments shared transport line discipline | ||
| 1217 | # | ||
| 1218 | CONFIG_TI_ST=m | ||
| 1219 | # CONFIG_SENSORS_LIS3_SPI is not set | ||
| 1220 | # CONFIG_SENSORS_LIS3_I2C is not set | ||
| 1221 | CONFIG_HAVE_IDE=y | ||
| 1222 | # CONFIG_IDE is not set | ||
| 1223 | |||
| 1224 | # | ||
| 1225 | # SCSI device support | ||
| 1226 | # | ||
| 1227 | CONFIG_SCSI_MOD=y | ||
| 1228 | CONFIG_RAID_ATTRS=m | ||
| 1229 | CONFIG_SCSI=y | ||
| 1230 | CONFIG_SCSI_DMA=y | ||
| 1231 | # CONFIG_SCSI_TGT is not set | ||
| 1232 | # CONFIG_SCSI_NETLINK is not set | ||
| 1233 | CONFIG_SCSI_PROC_FS=y | ||
| 1234 | |||
| 1235 | # | ||
| 1236 | # SCSI support type (disk, tape, CD-ROM) | ||
| 1237 | # | ||
| 1238 | CONFIG_BLK_DEV_SD=y | ||
| 1239 | # CONFIG_CHR_DEV_ST is not set | ||
| 1240 | # CONFIG_CHR_DEV_OSST is not set | ||
| 1241 | CONFIG_BLK_DEV_SR=y | ||
| 1242 | CONFIG_BLK_DEV_SR_VENDOR=y | ||
| 1243 | CONFIG_CHR_DEV_SG=y | ||
| 1244 | CONFIG_CHR_DEV_SCH=m | ||
| 1245 | CONFIG_SCSI_MULTI_LUN=y | ||
| 1246 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 1247 | # CONFIG_SCSI_LOGGING is not set | ||
| 1248 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 1249 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 1250 | |||
| 1251 | # | ||
| 1252 | # SCSI Transports | ||
| 1253 | # | ||
| 1254 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 1255 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 1256 | CONFIG_SCSI_ISCSI_ATTRS=m | ||
| 1257 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
| 1258 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 1259 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 1260 | CONFIG_SCSI_LOWLEVEL=y | ||
| 1261 | CONFIG_ISCSI_TCP=m | ||
| 1262 | CONFIG_ISCSI_BOOT_SYSFS=m | ||
| 1263 | # CONFIG_LIBFC is not set | ||
| 1264 | # CONFIG_LIBFCOE is not set | ||
| 1265 | # CONFIG_SCSI_DEBUG is not set | ||
| 1266 | # CONFIG_SCSI_DH is not set | ||
| 1267 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 1268 | # CONFIG_ATA is not set | ||
| 1269 | CONFIG_MD=y | ||
| 1270 | CONFIG_BLK_DEV_MD=m | ||
| 1271 | CONFIG_MD_LINEAR=m | ||
| 1272 | CONFIG_MD_RAID0=m | ||
| 1273 | CONFIG_MD_RAID1=m | ||
| 1274 | CONFIG_MD_RAID10=m | ||
| 1275 | CONFIG_MD_RAID456=m | ||
| 1276 | CONFIG_MD_MULTIPATH=m | ||
| 1277 | CONFIG_MD_FAULTY=m | ||
| 1278 | CONFIG_BLK_DEV_DM=m | ||
| 1279 | # CONFIG_DM_DEBUG is not set | ||
| 1280 | CONFIG_DM_CRYPT=m | ||
| 1281 | CONFIG_DM_SNAPSHOT=m | ||
| 1282 | CONFIG_DM_MIRROR=m | ||
| 1283 | CONFIG_DM_RAID=m | ||
| 1284 | # CONFIG_DM_LOG_USERSPACE is not set | ||
| 1285 | CONFIG_DM_ZERO=m | ||
| 1286 | CONFIG_DM_MULTIPATH=m | ||
| 1287 | # CONFIG_DM_MULTIPATH_QL is not set | ||
| 1288 | # CONFIG_DM_MULTIPATH_ST is not set | ||
| 1289 | CONFIG_DM_DELAY=m | ||
| 1290 | # CONFIG_DM_UEVENT is not set | ||
| 1291 | CONFIG_DM_FLAKEY=m | ||
| 1292 | CONFIG_TARGET_CORE=m | ||
| 1293 | CONFIG_TCM_IBLOCK=m | ||
| 1294 | CONFIG_TCM_FILEIO=m | ||
| 1295 | CONFIG_TCM_PSCSI=m | ||
| 1296 | CONFIG_LOOPBACK_TARGET=m | ||
| 1297 | # CONFIG_LOOPBACK_TARGET_CDB_DEBUG is not set | ||
| 1298 | CONFIG_NETDEVICES=y | ||
| 1299 | CONFIG_DUMMY=m | ||
| 1300 | CONFIG_BONDING=m | ||
| 1301 | CONFIG_MACVLAN=m | ||
| 1302 | CONFIG_MACVTAP=m | ||
| 1303 | CONFIG_EQUALIZER=m | ||
| 1304 | CONFIG_TUN=m | ||
| 1305 | CONFIG_VETH=m | ||
| 1306 | CONFIG_MII=y | ||
| 1307 | CONFIG_PHYLIB=y | ||
| 1308 | |||
| 1309 | # | ||
| 1310 | # MII PHY device drivers | ||
| 1311 | # | ||
| 1312 | # CONFIG_MARVELL_PHY is not set | ||
| 1313 | # CONFIG_DAVICOM_PHY is not set | ||
| 1314 | # CONFIG_QSEMI_PHY is not set | ||
| 1315 | # CONFIG_LXT_PHY is not set | ||
| 1316 | # CONFIG_CICADA_PHY is not set | ||
| 1317 | # CONFIG_VITESSE_PHY is not set | ||
| 1318 | # CONFIG_SMSC_PHY is not set | ||
| 1319 | # CONFIG_BROADCOM_PHY is not set | ||
| 1320 | CONFIG_BCM63XX_PHY=m | ||
| 1321 | # CONFIG_ICPLUS_PHY is not set | ||
| 1322 | # CONFIG_REALTEK_PHY is not set | ||
| 1323 | # CONFIG_NATIONAL_PHY is not set | ||
| 1324 | # CONFIG_STE10XP is not set | ||
| 1325 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 1326 | CONFIG_MICREL_PHY=m | ||
| 1327 | # CONFIG_FIXED_PHY is not set | ||
| 1328 | # CONFIG_MDIO_BITBANG is not set | ||
| 1329 | CONFIG_NET_ETHERNET=y | ||
| 1330 | # CONFIG_AX88796 is not set | ||
| 1331 | CONFIG_SMC91X=y | ||
| 1332 | # CONFIG_TI_DAVINCI_EMAC is not set | ||
| 1333 | CONFIG_TI_DAVINCI_MDIO=m | ||
| 1334 | CONFIG_TI_DAVINCI_CPDMA=m | ||
| 1335 | # CONFIG_DM9000 is not set | ||
| 1336 | CONFIG_ENC28J60=y | ||
| 1337 | # CONFIG_ENC28J60_WRITEVERIFY is not set | ||
| 1338 | # CONFIG_ETHOC is not set | ||
| 1339 | CONFIG_SMC911X=y | ||
| 1340 | CONFIG_SMSC911X=y | ||
| 1341 | # CONFIG_SMSC911X_ARCH_HOOKS is not set | ||
| 1342 | # CONFIG_DNET is not set | ||
| 1343 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 1344 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 1345 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 1346 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 1347 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 1348 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 1349 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 1350 | # CONFIG_B44 is not set | ||
| 1351 | CONFIG_KS8842=m | ||
| 1352 | CONFIG_KS8851=y | ||
| 1353 | # CONFIG_KS8851_MLL is not set | ||
| 1354 | # CONFIG_FTMAC100 is not set | ||
| 1355 | # CONFIG_NETDEV_1000 is not set | ||
| 1356 | # CONFIG_NETDEV_10000 is not set | ||
| 1357 | CONFIG_WLAN=y | ||
| 1358 | # CONFIG_LIBERTAS_THINFIRM is not set | ||
| 1359 | CONFIG_AT76C50X_USB=m | ||
| 1360 | CONFIG_USB_ZD1201=m | ||
| 1361 | CONFIG_USB_NET_RNDIS_WLAN=m | ||
| 1362 | CONFIG_RTL8187=m | ||
| 1363 | CONFIG_RTL8187_LEDS=y | ||
| 1364 | # CONFIG_MAC80211_HWSIM is not set | ||
| 1365 | # CONFIG_ATH_COMMON is not set | ||
| 1366 | CONFIG_B43=m | ||
| 1367 | # CONFIG_B43_SDIO is not set | ||
| 1368 | CONFIG_B43_PIO=y | ||
| 1369 | CONFIG_B43_PHY_N=y | ||
| 1370 | CONFIG_B43_PHY_LP=y | ||
| 1371 | CONFIG_B43_LEDS=y | ||
| 1372 | CONFIG_B43_HWRNG=y | ||
| 1373 | # CONFIG_B43_DEBUG is not set | ||
| 1374 | # CONFIG_B43LEGACY is not set | ||
| 1375 | CONFIG_HOSTAP=m | ||
| 1376 | CONFIG_HOSTAP_FIRMWARE=y | ||
| 1377 | CONFIG_HOSTAP_FIRMWARE_NVRAM=y | ||
| 1378 | # CONFIG_IWM is not set | ||
| 1379 | CONFIG_LIBERTAS=m | ||
| 1380 | CONFIG_LIBERTAS_USB=m | ||
| 1381 | # CONFIG_LIBERTAS_SDIO is not set | ||
| 1382 | # CONFIG_LIBERTAS_SPI is not set | ||
| 1383 | # CONFIG_LIBERTAS_DEBUG is not set | ||
| 1384 | # CONFIG_LIBERTAS_MESH is not set | ||
| 1385 | CONFIG_P54_COMMON=m | ||
| 1386 | CONFIG_P54_USB=m | ||
| 1387 | # CONFIG_P54_SPI is not set | ||
| 1388 | CONFIG_P54_LEDS=y | ||
| 1389 | CONFIG_RT2X00=m | ||
| 1390 | CONFIG_RT2500USB=m | ||
| 1391 | CONFIG_RT73USB=m | ||
| 1392 | # CONFIG_RT2800USB is not set | ||
| 1393 | CONFIG_RT2X00_LIB_USB=m | ||
| 1394 | CONFIG_RT2X00_LIB=m | ||
| 1395 | CONFIG_RT2X00_LIB_FIRMWARE=y | ||
| 1396 | CONFIG_RT2X00_LIB_CRYPTO=y | ||
| 1397 | CONFIG_RT2X00_LIB_LEDS=y | ||
| 1398 | # CONFIG_RT2X00_DEBUG is not set | ||
| 1399 | CONFIG_RTL8192CU=m | ||
| 1400 | CONFIG_RTLWIFI=m | ||
| 1401 | CONFIG_RTL8192C_COMMON=m | ||
| 1402 | CONFIG_WL1251=m | ||
| 1403 | CONFIG_WL1251_SPI=m | ||
| 1404 | CONFIG_WL1251_SDIO=m | ||
| 1405 | CONFIG_WL12XX_MENU=m | ||
| 1406 | CONFIG_WL12XX=m | ||
| 1407 | CONFIG_WL12XX_HT=y | ||
| 1408 | CONFIG_WL12XX_SPI=m | ||
| 1409 | CONFIG_WL12XX_SDIO=m | ||
| 1410 | # CONFIG_WL12XX_SDIO_TEST is not set | ||
| 1411 | CONFIG_WL12XX_PLATFORM_DATA=y | ||
| 1412 | CONFIG_ZD1211RW=m | ||
| 1413 | # CONFIG_ZD1211RW_DEBUG is not set | ||
| 1414 | |||
| 1415 | # | ||
| 1416 | # WiMAX Wireless Broadband devices | ||
| 1417 | # | ||
| 1418 | CONFIG_WIMAX_I2400M=m | ||
| 1419 | CONFIG_WIMAX_I2400M_USB=m | ||
| 1420 | CONFIG_WIMAX_I2400M_SDIO=m | ||
| 1421 | CONFIG_WIMAX_IWMC3200_SDIO=y | ||
| 1422 | CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 | ||
| 1423 | |||
| 1424 | # | ||
| 1425 | # USB Network Adapters | ||
| 1426 | # | ||
| 1427 | CONFIG_USB_CATC=y | ||
| 1428 | CONFIG_USB_KAWETH=y | ||
| 1429 | CONFIG_USB_PEGASUS=y | ||
| 1430 | CONFIG_USB_RTL8150=y | ||
| 1431 | CONFIG_USB_USBNET=y | ||
| 1432 | CONFIG_USB_NET_AX8817X=y | ||
| 1433 | CONFIG_USB_NET_CDCETHER=y | ||
| 1434 | # CONFIG_USB_NET_CDC_EEM is not set | ||
| 1435 | CONFIG_USB_NET_CDC_NCM=m | ||
| 1436 | CONFIG_USB_NET_DM9601=y | ||
| 1437 | CONFIG_USB_NET_SMSC75XX=m | ||
| 1438 | CONFIG_USB_NET_SMSC95XX=y | ||
| 1439 | CONFIG_USB_NET_GL620A=y | ||
| 1440 | CONFIG_USB_NET_NET1080=y | ||
| 1441 | CONFIG_USB_NET_PLUSB=y | ||
| 1442 | CONFIG_USB_NET_MCS7830=y | ||
| 1443 | CONFIG_USB_NET_RNDIS_HOST=y | ||
| 1444 | CONFIG_USB_NET_CDC_SUBSET=y | ||
| 1445 | CONFIG_USB_ALI_M5632=y | ||
| 1446 | CONFIG_USB_AN2720=y | ||
| 1447 | CONFIG_USB_BELKIN=y | ||
| 1448 | CONFIG_USB_ARMLINUX=y | ||
| 1449 | CONFIG_USB_EPSON2888=y | ||
| 1450 | CONFIG_USB_KC2190=y | ||
| 1451 | CONFIG_USB_NET_ZAURUS=y | ||
| 1452 | CONFIG_USB_NET_CX82310_ETH=m | ||
| 1453 | CONFIG_USB_HSO=m | ||
| 1454 | CONFIG_USB_NET_INT51X1=m | ||
| 1455 | CONFIG_USB_IPHETH=m | ||
| 1456 | CONFIG_USB_SIERRA_NET=m | ||
| 1457 | CONFIG_USB_VL600=m | ||
| 1458 | # CONFIG_WAN is not set | ||
| 1459 | CONFIG_ATM_DRIVERS=y | ||
| 1460 | # CONFIG_ATM_DUMMY is not set | ||
| 1461 | # CONFIG_ATM_TCP is not set | ||
| 1462 | |||
| 1463 | # | ||
| 1464 | # CAIF transport drivers | ||
| 1465 | # | ||
| 1466 | CONFIG_PPP=m | ||
| 1467 | CONFIG_PPP_MULTILINK=y | ||
| 1468 | CONFIG_PPP_FILTER=y | ||
| 1469 | CONFIG_PPP_ASYNC=m | ||
| 1470 | CONFIG_PPP_SYNC_TTY=m | ||
| 1471 | CONFIG_PPP_DEFLATE=m | ||
| 1472 | CONFIG_PPP_BSDCOMP=m | ||
| 1473 | CONFIG_PPP_MPPE=m | ||
| 1474 | CONFIG_PPPOE=m | ||
| 1475 | CONFIG_PPTP=m | ||
| 1476 | # CONFIG_PPPOATM is not set | ||
| 1477 | CONFIG_PPPOL2TP=m | ||
| 1478 | # CONFIG_SLIP is not set | ||
| 1479 | CONFIG_SLHC=m | ||
| 1480 | CONFIG_NETCONSOLE=m | ||
| 1481 | CONFIG_NETCONSOLE_DYNAMIC=y | ||
| 1482 | CONFIG_NETPOLL=y | ||
| 1483 | CONFIG_NETPOLL_TRAP=y | ||
| 1484 | CONFIG_NET_POLL_CONTROLLER=y | ||
| 1485 | # CONFIG_ISDN is not set | ||
| 1486 | # CONFIG_PHONE is not set | ||
| 1487 | |||
| 1488 | # | ||
| 1489 | # Input device support | ||
| 1490 | # | ||
| 1491 | CONFIG_INPUT=y | ||
| 1492 | CONFIG_INPUT_FF_MEMLESS=y | ||
| 1493 | CONFIG_INPUT_POLLDEV=y | ||
| 1494 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
| 1495 | |||
| 1496 | # | ||
| 1497 | # Userland interfaces | ||
| 1498 | # | ||
| 1499 | CONFIG_INPUT_MOUSEDEV=y | ||
| 1500 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
| 1501 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 1502 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 1503 | # CONFIG_INPUT_JOYDEV is not set | ||
| 1504 | CONFIG_INPUT_EVDEV=y | ||
| 1505 | # CONFIG_INPUT_EVBUG is not set | ||
| 1506 | |||
| 1507 | # | ||
| 1508 | # Input Device Drivers | ||
| 1509 | # | ||
| 1510 | CONFIG_INPUT_KEYBOARD=y | ||
| 1511 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 1512 | # CONFIG_KEYBOARD_ATKBD is not set | ||
| 1513 | CONFIG_KEYBOARD_QT1070=m | ||
| 1514 | CONFIG_KEYBOARD_QT2160=m | ||
| 1515 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 1516 | CONFIG_KEYBOARD_GPIO=y | ||
| 1517 | # CONFIG_KEYBOARD_TCA6416 is not set | ||
| 1518 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 1519 | # CONFIG_KEYBOARD_LM8323 is not set | ||
| 1520 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 1521 | CONFIG_KEYBOARD_MCS=m | ||
| 1522 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 1523 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 1524 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 1525 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 1526 | # CONFIG_KEYBOARD_TWL4030 is not set | ||
| 1527 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 1528 | CONFIG_INPUT_MOUSE=y | ||
| 1529 | CONFIG_MOUSE_PS2=y | ||
| 1530 | CONFIG_MOUSE_PS2_ALPS=y | ||
| 1531 | CONFIG_MOUSE_PS2_LOGIPS2PP=y | ||
| 1532 | CONFIG_MOUSE_PS2_SYNAPTICS=y | ||
| 1533 | CONFIG_MOUSE_PS2_TRACKPOINT=y | ||
| 1534 | # CONFIG_MOUSE_PS2_ELANTECH is not set | ||
| 1535 | # CONFIG_MOUSE_PS2_SENTELIC is not set | ||
| 1536 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | ||
| 1537 | # CONFIG_MOUSE_SERIAL is not set | ||
| 1538 | # CONFIG_MOUSE_APPLETOUCH is not set | ||
| 1539 | # CONFIG_MOUSE_BCM5974 is not set | ||
| 1540 | # CONFIG_MOUSE_VSXXXAA is not set | ||
| 1541 | # CONFIG_MOUSE_GPIO is not set | ||
| 1542 | # CONFIG_MOUSE_SYNAPTICS_I2C is not set | ||
| 1543 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 1544 | # CONFIG_INPUT_TABLET is not set | ||
| 1545 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
| 1546 | CONFIG_INPUT_MISC=y | ||
| 1547 | CONFIG_INPUT_AD714X=m | ||
| 1548 | CONFIG_INPUT_AD714X_I2C=m | ||
| 1549 | CONFIG_INPUT_AD714X_SPI=m | ||
| 1550 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
| 1551 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
| 1552 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
| 1553 | # CONFIG_INPUT_POWERMATE is not set | ||
| 1554 | # CONFIG_INPUT_YEALINK is not set | ||
| 1555 | # CONFIG_INPUT_CM109 is not set | ||
| 1556 | CONFIG_INPUT_TWL4030_PWRBUTTON=y | ||
| 1557 | CONFIG_INPUT_TWL4030_VIBRA=m | ||
| 1558 | CONFIG_INPUT_UINPUT=y | ||
| 1559 | CONFIG_INPUT_PCF8574=m | ||
| 1560 | CONFIG_INPUT_PWM_BEEPER=m | ||
| 1561 | # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set | ||
| 1562 | CONFIG_INPUT_ADXL34X=m | ||
| 1563 | CONFIG_INPUT_ADXL34X_I2C=m | ||
| 1564 | CONFIG_INPUT_ADXL34X_SPI=m | ||
| 1565 | CONFIG_INPUT_CMA3000=m | ||
| 1566 | CONFIG_INPUT_CMA3000_I2C=m | ||
| 1567 | |||
| 1568 | # | ||
| 1569 | # Hardware I/O ports | ||
| 1570 | # | ||
| 1571 | CONFIG_SERIO=y | ||
| 1572 | CONFIG_SERIO_SERPORT=y | ||
| 1573 | CONFIG_SERIO_LIBPS2=y | ||
| 1574 | # CONFIG_SERIO_RAW is not set | ||
| 1575 | # CONFIG_SERIO_ALTERA_PS2 is not set | ||
| 1576 | # CONFIG_SERIO_PS2MULT is not set | ||
| 1577 | # CONFIG_GAMEPORT is not set | ||
| 1578 | |||
| 1579 | # | ||
| 1580 | # Character devices | ||
| 1581 | # | ||
| 1582 | CONFIG_VT=y | ||
| 1583 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 1584 | CONFIG_VT_CONSOLE=y | ||
| 1585 | CONFIG_HW_CONSOLE=y | ||
| 1586 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
| 1587 | CONFIG_UNIX98_PTYS=y | ||
| 1588 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 1589 | # CONFIG_LEGACY_PTYS is not set | ||
| 1590 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 1591 | CONFIG_N_GSM=m | ||
| 1592 | CONFIG_DEVKMEM=y | ||
| 1593 | |||
| 1594 | # | ||
| 1595 | # Serial drivers | ||
| 1596 | # | ||
| 1597 | CONFIG_SERIAL_8250=y | ||
| 1598 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 1599 | CONFIG_SERIAL_8250_NR_UARTS=32 | ||
| 1600 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 1601 | CONFIG_SERIAL_8250_EXTENDED=y | ||
| 1602 | CONFIG_SERIAL_8250_MANY_PORTS=y | ||
| 1603 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
| 1604 | CONFIG_SERIAL_8250_DETECT_IRQ=y | ||
| 1605 | CONFIG_SERIAL_8250_RSA=y | ||
| 1606 | |||
| 1607 | # | ||
| 1608 | # Non-8250 serial port support | ||
| 1609 | # | ||
| 1610 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 1611 | # CONFIG_SERIAL_MAX3107 is not set | ||
| 1612 | CONFIG_SERIAL_CORE=y | ||
| 1613 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 1614 | CONFIG_SERIAL_OMAP=y | ||
| 1615 | CONFIG_SERIAL_OMAP_CONSOLE=y | ||
| 1616 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 1617 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 1618 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 1619 | CONFIG_SERIAL_IFX6X60=m | ||
| 1620 | CONFIG_TTY_PRINTK=y | ||
| 1621 | # CONFIG_HVC_DCC is not set | ||
| 1622 | # CONFIG_IPMI_HANDLER is not set | ||
| 1623 | CONFIG_HW_RANDOM=y | ||
| 1624 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 1625 | # CONFIG_R3964 is not set | ||
| 1626 | # CONFIG_RAW_DRIVER is not set | ||
| 1627 | # CONFIG_TCG_TPM is not set | ||
| 1628 | # CONFIG_RAMOOPS is not set | ||
| 1629 | CONFIG_I2C=y | ||
| 1630 | CONFIG_I2C_BOARDINFO=y | ||
| 1631 | CONFIG_I2C_COMPAT=y | ||
| 1632 | CONFIG_I2C_CHARDEV=y | ||
| 1633 | CONFIG_I2C_MUX=m | ||
| 1634 | |||
| 1635 | # | ||
| 1636 | # Multiplexer I2C Chip support | ||
| 1637 | # | ||
| 1638 | CONFIG_I2C_MUX_GPIO=m | ||
| 1639 | # CONFIG_I2C_MUX_PCA9541 is not set | ||
| 1640 | # CONFIG_I2C_MUX_PCA954x is not set | ||
| 1641 | CONFIG_I2C_HELPER_AUTO=y | ||
| 1642 | CONFIG_I2C_ALGOBIT=m | ||
| 1643 | |||
| 1644 | # | ||
| 1645 | # I2C Hardware Bus support | ||
| 1646 | # | ||
| 1647 | |||
| 1648 | # | ||
| 1649 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 1650 | # | ||
| 1651 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 1652 | # CONFIG_I2C_GPIO is not set | ||
| 1653 | # CONFIG_I2C_OCORES is not set | ||
| 1654 | CONFIG_I2C_OMAP=y | ||
| 1655 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 1656 | # CONFIG_I2C_PXA_PCI is not set | ||
| 1657 | # CONFIG_I2C_SIMTEC is not set | ||
| 1658 | # CONFIG_I2C_XILINX is not set | ||
| 1659 | |||
| 1660 | # | ||
| 1661 | # External I2C/SMBus adapter drivers | ||
| 1662 | # | ||
| 1663 | CONFIG_I2C_DIOLAN_U2C=m | ||
| 1664 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 1665 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 1666 | # CONFIG_I2C_TINY_USB is not set | ||
| 1667 | |||
| 1668 | # | ||
| 1669 | # Other I2C/SMBus bus drivers | ||
| 1670 | # | ||
| 1671 | # CONFIG_I2C_STUB is not set | ||
| 1672 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 1673 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 1674 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 1675 | CONFIG_SPI=y | ||
| 1676 | # CONFIG_SPI_DEBUG is not set | ||
| 1677 | CONFIG_SPI_MASTER=y | ||
| 1678 | |||
| 1679 | # | ||
| 1680 | # SPI Master Controller Drivers | ||
| 1681 | # | ||
| 1682 | # CONFIG_SPI_ALTERA is not set | ||
| 1683 | # CONFIG_SPI_BITBANG is not set | ||
| 1684 | # CONFIG_SPI_GPIO is not set | ||
| 1685 | # CONFIG_SPI_OC_TINY is not set | ||
| 1686 | CONFIG_SPI_OMAP24XX=y | ||
| 1687 | # CONFIG_SPI_PXA2XX_PCI is not set | ||
| 1688 | # CONFIG_SPI_XILINX is not set | ||
| 1689 | # CONFIG_SPI_DESIGNWARE is not set | ||
| 1690 | |||
| 1691 | # | ||
| 1692 | # SPI Protocol Masters | ||
| 1693 | # | ||
| 1694 | CONFIG_SPI_SPIDEV=y | ||
| 1695 | # CONFIG_SPI_TLE62X0 is not set | ||
| 1696 | |||
| 1697 | # | ||
| 1698 | # PPS support | ||
| 1699 | # | ||
| 1700 | # CONFIG_PPS is not set | ||
| 1701 | |||
| 1702 | # | ||
| 1703 | # PPS generators support | ||
| 1704 | # | ||
| 1705 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 1706 | CONFIG_GPIOLIB=y | ||
| 1707 | # CONFIG_DEBUG_GPIO is not set | ||
| 1708 | CONFIG_GPIO_SYSFS=y | ||
| 1709 | CONFIG_GPIO_MAX730X=m | ||
| 1710 | |||
| 1711 | # | ||
| 1712 | # Memory mapped GPIO expanders: | ||
| 1713 | # | ||
| 1714 | # CONFIG_GPIO_BASIC_MMIO is not set | ||
| 1715 | # CONFIG_GPIO_IT8761E is not set | ||
| 1716 | |||
| 1717 | # | ||
| 1718 | # I2C GPIO expanders: | ||
| 1719 | # | ||
| 1720 | CONFIG_GPIO_MAX7300=m | ||
| 1721 | # CONFIG_GPIO_MAX732X is not set | ||
| 1722 | # CONFIG_GPIO_PCF857X is not set | ||
| 1723 | # CONFIG_GPIO_SX150X is not set | ||
| 1724 | CONFIG_GPIO_TWL4030=y | ||
| 1725 | CONFIG_GPIO_ADP5588=m | ||
| 1726 | |||
| 1727 | # | ||
| 1728 | # PCI GPIO expanders: | ||
| 1729 | # | ||
| 1730 | |||
| 1731 | # | ||
| 1732 | # SPI GPIO expanders: | ||
| 1733 | # | ||
| 1734 | # CONFIG_GPIO_MAX7301 is not set | ||
| 1735 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 1736 | # CONFIG_GPIO_MC33880 is not set | ||
| 1737 | # CONFIG_GPIO_74X164 is not set | ||
| 1738 | |||
| 1739 | # | ||
| 1740 | # AC97 GPIO expanders: | ||
| 1741 | # | ||
| 1742 | |||
| 1743 | # | ||
| 1744 | # MODULbus GPIO expanders: | ||
| 1745 | # | ||
| 1746 | # CONFIG_W1 is not set | ||
| 1747 | CONFIG_POWER_SUPPLY=m | ||
| 1748 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
| 1749 | # CONFIG_PDA_POWER is not set | ||
| 1750 | CONFIG_TEST_POWER=m | ||
| 1751 | # CONFIG_BATTERY_DS2782 is not set | ||
| 1752 | # CONFIG_BATTERY_BQ20Z75 is not set | ||
| 1753 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 1754 | # CONFIG_BATTERY_MAX17040 is not set | ||
| 1755 | CONFIG_BATTERY_MAX17042=m | ||
| 1756 | CONFIG_CHARGER_ISP1704=m | ||
| 1757 | CONFIG_CHARGER_TWL4030=m | ||
| 1758 | CONFIG_CHARGER_GPIO=m | ||
| 1759 | CONFIG_HWMON=y | ||
| 1760 | # CONFIG_HWMON_VID is not set | ||
| 1761 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 1762 | |||
| 1763 | # | ||
| 1764 | # Native drivers | ||
| 1765 | # | ||
| 1766 | # CONFIG_SENSORS_AD7414 is not set | ||
| 1767 | # CONFIG_SENSORS_AD7418 is not set | ||
| 1768 | # CONFIG_SENSORS_ADCXX is not set | ||
| 1769 | # CONFIG_SENSORS_ADM1021 is not set | ||
| 1770 | # CONFIG_SENSORS_ADM1025 is not set | ||
| 1771 | # CONFIG_SENSORS_ADM1026 is not set | ||
| 1772 | # CONFIG_SENSORS_ADM1029 is not set | ||
| 1773 | # CONFIG_SENSORS_ADM1031 is not set | ||
| 1774 | # CONFIG_SENSORS_ADM9240 is not set | ||
| 1775 | CONFIG_SENSORS_ADT7411=m | ||
| 1776 | # CONFIG_SENSORS_ADT7462 is not set | ||
| 1777 | # CONFIG_SENSORS_ADT7470 is not set | ||
| 1778 | # CONFIG_SENSORS_ADT7475 is not set | ||
| 1779 | CONFIG_SENSORS_ASC7621=m | ||
| 1780 | # CONFIG_SENSORS_ATXP1 is not set | ||
| 1781 | CONFIG_SENSORS_DS620=m | ||
| 1782 | # CONFIG_SENSORS_DS1621 is not set | ||
| 1783 | # CONFIG_SENSORS_F71805F is not set | ||
| 1784 | # CONFIG_SENSORS_F71882FG is not set | ||
| 1785 | # CONFIG_SENSORS_F75375S is not set | ||
| 1786 | # CONFIG_SENSORS_G760A is not set | ||
| 1787 | # CONFIG_SENSORS_GL518SM is not set | ||
| 1788 | # CONFIG_SENSORS_GL520SM is not set | ||
| 1789 | CONFIG_SENSORS_GPIO_FAN=m | ||
| 1790 | # CONFIG_SENSORS_IT87 is not set | ||
| 1791 | CONFIG_SENSORS_JC42=m | ||
| 1792 | # CONFIG_SENSORS_LINEAGE is not set | ||
| 1793 | # CONFIG_SENSORS_LM63 is not set | ||
| 1794 | # CONFIG_SENSORS_LM70 is not set | ||
| 1795 | # CONFIG_SENSORS_LM73 is not set | ||
| 1796 | # CONFIG_SENSORS_LM75 is not set | ||
| 1797 | # CONFIG_SENSORS_LM77 is not set | ||
| 1798 | # CONFIG_SENSORS_LM78 is not set | ||
| 1799 | # CONFIG_SENSORS_LM80 is not set | ||
| 1800 | # CONFIG_SENSORS_LM83 is not set | ||
| 1801 | # CONFIG_SENSORS_LM85 is not set | ||
| 1802 | # CONFIG_SENSORS_LM87 is not set | ||
| 1803 | # CONFIG_SENSORS_LM90 is not set | ||
| 1804 | # CONFIG_SENSORS_LM92 is not set | ||
| 1805 | # CONFIG_SENSORS_LM93 is not set | ||
| 1806 | # CONFIG_SENSORS_LTC4151 is not set | ||
| 1807 | # CONFIG_SENSORS_LTC4215 is not set | ||
| 1808 | # CONFIG_SENSORS_LTC4245 is not set | ||
| 1809 | # CONFIG_SENSORS_LTC4261 is not set | ||
| 1810 | # CONFIG_SENSORS_LM95241 is not set | ||
| 1811 | # CONFIG_SENSORS_MAX1111 is not set | ||
| 1812 | # CONFIG_SENSORS_MAX1619 is not set | ||
| 1813 | # CONFIG_SENSORS_MAX6639 is not set | ||
| 1814 | # CONFIG_SENSORS_MAX6650 is not set | ||
| 1815 | # CONFIG_SENSORS_PC87360 is not set | ||
| 1816 | # CONFIG_SENSORS_PC87427 is not set | ||
| 1817 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 1818 | # CONFIG_PMBUS is not set | ||
| 1819 | # CONFIG_SENSORS_SHT15 is not set | ||
| 1820 | # CONFIG_SENSORS_SHT21 is not set | ||
| 1821 | CONFIG_SENSORS_SMM665=m | ||
| 1822 | # CONFIG_SENSORS_DME1737 is not set | ||
| 1823 | CONFIG_SENSORS_EMC1403=m | ||
| 1824 | CONFIG_SENSORS_EMC2103=m | ||
| 1825 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
| 1826 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
| 1827 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
| 1828 | # CONFIG_SENSORS_SCH5627 is not set | ||
| 1829 | # CONFIG_SENSORS_ADS1015 is not set | ||
| 1830 | # CONFIG_SENSORS_ADS7828 is not set | ||
| 1831 | CONFIG_SENSORS_ADS7871=m | ||
| 1832 | CONFIG_SENSORS_AMC6821=m | ||
| 1833 | # CONFIG_SENSORS_THMC50 is not set | ||
| 1834 | CONFIG_SENSORS_TMP102=m | ||
| 1835 | # CONFIG_SENSORS_TMP401 is not set | ||
| 1836 | # CONFIG_SENSORS_TMP421 is not set | ||
| 1837 | CONFIG_SENSORS_TWL4030_MADC=m | ||
| 1838 | # CONFIG_SENSORS_VT1211 is not set | ||
| 1839 | # CONFIG_SENSORS_W83781D is not set | ||
| 1840 | # CONFIG_SENSORS_W83791D is not set | ||
| 1841 | # CONFIG_SENSORS_W83792D is not set | ||
| 1842 | # CONFIG_SENSORS_W83793 is not set | ||
| 1843 | # CONFIG_SENSORS_W83795 is not set | ||
| 1844 | # CONFIG_SENSORS_W83L785TS is not set | ||
| 1845 | # CONFIG_SENSORS_W83L786NG is not set | ||
| 1846 | # CONFIG_SENSORS_W83627HF is not set | ||
| 1847 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 1848 | CONFIG_THERMAL=y | ||
| 1849 | CONFIG_THERMAL_HWMON=y | ||
| 1850 | CONFIG_WATCHDOG=y | ||
| 1851 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
| 1852 | |||
| 1853 | # | ||
| 1854 | # Watchdog Device Drivers | ||
| 1855 | # | ||
| 1856 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 1857 | CONFIG_OMAP_WATCHDOG=y | ||
| 1858 | # CONFIG_TWL4030_WATCHDOG is not set | ||
| 1859 | # CONFIG_MAX63XX_WATCHDOG is not set | ||
| 1860 | |||
| 1861 | # | ||
| 1862 | # USB-based Watchdog Cards | ||
| 1863 | # | ||
| 1864 | # CONFIG_USBPCWATCHDOG is not set | ||
| 1865 | CONFIG_SSB_POSSIBLE=y | ||
| 1866 | |||
| 1867 | # | ||
| 1868 | # Sonics Silicon Backplane | ||
| 1869 | # | ||
| 1870 | CONFIG_SSB=y | ||
| 1871 | CONFIG_SSB_BLOCKIO=y | ||
| 1872 | CONFIG_SSB_SDIOHOST_POSSIBLE=y | ||
| 1873 | # CONFIG_SSB_SDIOHOST is not set | ||
| 1874 | # CONFIG_SSB_SILENT is not set | ||
| 1875 | # CONFIG_SSB_DEBUG is not set | ||
| 1876 | CONFIG_MFD_SUPPORT=y | ||
| 1877 | CONFIG_MFD_CORE=y | ||
| 1878 | # CONFIG_MFD_88PM860X is not set | ||
| 1879 | # CONFIG_MFD_SM501 is not set | ||
| 1880 | # CONFIG_MFD_ASIC3 is not set | ||
| 1881 | # CONFIG_HTC_EGPIO is not set | ||
| 1882 | # CONFIG_HTC_PASIC3 is not set | ||
| 1883 | # CONFIG_HTC_I2CPLD is not set | ||
| 1884 | CONFIG_TPS6105X=m | ||
| 1885 | # CONFIG_TPS65010 is not set | ||
| 1886 | CONFIG_TPS6507X=m | ||
| 1887 | CONFIG_TWL4030_CORE=y | ||
| 1888 | CONFIG_TWL4030_MADC=m | ||
| 1889 | CONFIG_TWL4030_POWER=y | ||
| 1890 | CONFIG_TWL4030_SCRIPT=y | ||
| 1891 | CONFIG_TWL4030_CODEC=y | ||
| 1892 | CONFIG_TWL4030_POWEROFF=y | ||
| 1893 | CONFIG_TWL6030_PWM=m | ||
| 1894 | # CONFIG_MFD_STMPE is not set | ||
| 1895 | # CONFIG_MFD_TC3589X is not set | ||
| 1896 | # CONFIG_MFD_TMIO is not set | ||
| 1897 | # CONFIG_MFD_T7L66XB is not set | ||
| 1898 | # CONFIG_MFD_TC6387XB is not set | ||
| 1899 | # CONFIG_MFD_TC6393XB is not set | ||
| 1900 | # CONFIG_PMIC_DA903X is not set | ||
| 1901 | # CONFIG_PMIC_ADP5520 is not set | ||
| 1902 | # CONFIG_MFD_MAX8925 is not set | ||
| 1903 | # CONFIG_MFD_MAX8997 is not set | ||
| 1904 | # CONFIG_MFD_MAX8998 is not set | ||
| 1905 | # CONFIG_MFD_WM8400 is not set | ||
| 1906 | # CONFIG_MFD_WM831X_I2C is not set | ||
| 1907 | # CONFIG_MFD_WM831X_SPI is not set | ||
| 1908 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 1909 | # CONFIG_MFD_WM8994 is not set | ||
| 1910 | # CONFIG_MFD_PCF50633 is not set | ||
| 1911 | # CONFIG_MFD_MC13XXX is not set | ||
| 1912 | # CONFIG_ABX500_CORE is not set | ||
| 1913 | # CONFIG_EZX_PCAP is not set | ||
| 1914 | CONFIG_MFD_TPS6586X=y | ||
| 1915 | CONFIG_MFD_WL1273_CORE=m | ||
| 1916 | CONFIG_MFD_OMAP_USB_HOST=y | ||
| 1917 | CONFIG_REGULATOR=y | ||
| 1918 | # CONFIG_REGULATOR_DEBUG is not set | ||
| 1919 | CONFIG_REGULATOR_DUMMY=y | ||
| 1920 | CONFIG_REGULATOR_FIXED_VOLTAGE=y | ||
| 1921 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 1922 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
| 1923 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 1924 | # CONFIG_REGULATOR_MAX1586 is not set | ||
| 1925 | # CONFIG_REGULATOR_MAX8649 is not set | ||
| 1926 | # CONFIG_REGULATOR_MAX8660 is not set | ||
| 1927 | # CONFIG_REGULATOR_MAX8952 is not set | ||
| 1928 | CONFIG_REGULATOR_TWL4030=y | ||
| 1929 | # CONFIG_REGULATOR_LP3971 is not set | ||
| 1930 | # CONFIG_REGULATOR_LP3972 is not set | ||
| 1931 | CONFIG_REGULATOR_TPS6105X=m | ||
| 1932 | # CONFIG_REGULATOR_TPS65023 is not set | ||
| 1933 | # CONFIG_REGULATOR_TPS6507X is not set | ||
| 1934 | # CONFIG_REGULATOR_ISL6271A is not set | ||
| 1935 | # CONFIG_REGULATOR_AD5398 is not set | ||
| 1936 | CONFIG_REGULATOR_TPS6586X=m | ||
| 1937 | CONFIG_REGULATOR_TPS6524X=m | ||
| 1938 | CONFIG_MEDIA_SUPPORT=y | ||
| 1939 | |||
| 1940 | # | ||
| 1941 | # Multimedia core support | ||
| 1942 | # | ||
| 1943 | CONFIG_MEDIA_CONTROLLER=y | ||
| 1944 | CONFIG_VIDEO_DEV=y | ||
| 1945 | CONFIG_VIDEO_V4L2_COMMON=y | ||
| 1946 | CONFIG_VIDEO_V4L2_SUBDEV_API=y | ||
| 1947 | CONFIG_DVB_CORE=m | ||
| 1948 | CONFIG_VIDEO_MEDIA=m | ||
| 1949 | |||
| 1950 | # | ||
| 1951 | # Multimedia drivers | ||
| 1952 | # | ||
| 1953 | CONFIG_RC_CORE=m | ||
| 1954 | CONFIG_LIRC=m | ||
| 1955 | CONFIG_RC_MAP=m | ||
| 1956 | CONFIG_IR_NEC_DECODER=m | ||
| 1957 | CONFIG_IR_RC5_DECODER=m | ||
| 1958 | CONFIG_IR_RC6_DECODER=m | ||
| 1959 | CONFIG_IR_JVC_DECODER=m | ||
| 1960 | CONFIG_IR_SONY_DECODER=m | ||
| 1961 | CONFIG_IR_RC5_SZ_DECODER=m | ||
| 1962 | CONFIG_IR_LIRC_CODEC=m | ||
| 1963 | # CONFIG_IR_IMON is not set | ||
| 1964 | # CONFIG_IR_MCEUSB is not set | ||
| 1965 | # CONFIG_IR_STREAMZAP is not set | ||
| 1966 | CONFIG_RC_LOOPBACK=m | ||
| 1967 | CONFIG_MEDIA_ATTACH=y | ||
| 1968 | CONFIG_MEDIA_TUNER=m | ||
| 1969 | CONFIG_MEDIA_TUNER_CUSTOMISE=y | ||
| 1970 | |||
| 1971 | # | ||
| 1972 | # Customize TV tuners | ||
| 1973 | # | ||
| 1974 | CONFIG_MEDIA_TUNER_SIMPLE=m | ||
| 1975 | CONFIG_MEDIA_TUNER_TDA8290=m | ||
| 1976 | CONFIG_MEDIA_TUNER_TDA827X=m | ||
| 1977 | CONFIG_MEDIA_TUNER_TDA18271=m | ||
| 1978 | CONFIG_MEDIA_TUNER_TDA9887=m | ||
| 1979 | CONFIG_MEDIA_TUNER_TEA5761=m | ||
| 1980 | CONFIG_MEDIA_TUNER_TEA5767=m | ||
| 1981 | CONFIG_MEDIA_TUNER_MT20XX=m | ||
| 1982 | CONFIG_MEDIA_TUNER_MT2060=m | ||
| 1983 | CONFIG_MEDIA_TUNER_MT2266=m | ||
| 1984 | CONFIG_MEDIA_TUNER_MT2131=m | ||
| 1985 | CONFIG_MEDIA_TUNER_QT1010=m | ||
| 1986 | CONFIG_MEDIA_TUNER_XC2028=m | ||
| 1987 | CONFIG_MEDIA_TUNER_XC5000=m | ||
| 1988 | CONFIG_MEDIA_TUNER_MXL5005S=m | ||
| 1989 | CONFIG_MEDIA_TUNER_MXL5007T=m | ||
| 1990 | CONFIG_MEDIA_TUNER_MC44S803=m | ||
| 1991 | CONFIG_MEDIA_TUNER_MAX2165=m | ||
| 1992 | CONFIG_MEDIA_TUNER_TDA18218=m | ||
| 1993 | CONFIG_VIDEO_V4L2=y | ||
| 1994 | CONFIG_VIDEOBUF_GEN=y | ||
| 1995 | CONFIG_VIDEOBUF_VMALLOC=m | ||
| 1996 | CONFIG_VIDEOBUF_DMA_CONTIG=y | ||
| 1997 | CONFIG_VIDEOBUF_DVB=m | ||
| 1998 | CONFIG_VIDEO_TVEEPROM=m | ||
| 1999 | CONFIG_VIDEO_TUNER=m | ||
| 2000 | CONFIG_V4L2_MEM2MEM_DEV=m | ||
| 2001 | CONFIG_VIDEOBUF2_CORE=m | ||
| 2002 | CONFIG_VIDEOBUF2_MEMOPS=m | ||
| 2003 | CONFIG_VIDEOBUF2_VMALLOC=m | ||
| 2004 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
| 2005 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
| 2006 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
| 2007 | # CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | ||
| 2008 | CONFIG_VIDEO_IR_I2C=m | ||
| 2009 | |||
| 2010 | # | ||
| 2011 | # Encoders/decoders and other helper chips | ||
| 2012 | # | ||
| 2013 | |||
| 2014 | # | ||
| 2015 | # Audio decoders | ||
| 2016 | # | ||
| 2017 | # CONFIG_VIDEO_TVAUDIO is not set | ||
| 2018 | # CONFIG_VIDEO_TDA7432 is not set | ||
| 2019 | # CONFIG_VIDEO_TDA9840 is not set | ||
| 2020 | # CONFIG_VIDEO_TEA6415C is not set | ||
| 2021 | # CONFIG_VIDEO_TEA6420 is not set | ||
| 2022 | CONFIG_VIDEO_MSP3400=m | ||
| 2023 | # CONFIG_VIDEO_CS5345 is not set | ||
| 2024 | CONFIG_VIDEO_CS53L32A=m | ||
| 2025 | # CONFIG_VIDEO_M52790 is not set | ||
| 2026 | # CONFIG_VIDEO_TLV320AIC23B is not set | ||
| 2027 | CONFIG_VIDEO_WM8775=m | ||
| 2028 | # CONFIG_VIDEO_WM8739 is not set | ||
| 2029 | # CONFIG_VIDEO_VP27SMPX is not set | ||
| 2030 | |||
| 2031 | # | ||
| 2032 | # RDS decoders | ||
| 2033 | # | ||
| 2034 | # CONFIG_VIDEO_SAA6588 is not set | ||
| 2035 | |||
| 2036 | # | ||
| 2037 | # Video decoders | ||
| 2038 | # | ||
| 2039 | CONFIG_VIDEO_ADV7180=m | ||
| 2040 | # CONFIG_VIDEO_BT819 is not set | ||
| 2041 | # CONFIG_VIDEO_BT856 is not set | ||
| 2042 | # CONFIG_VIDEO_BT866 is not set | ||
| 2043 | # CONFIG_VIDEO_KS0127 is not set | ||
| 2044 | CONFIG_VIDEO_OV7670=m | ||
| 2045 | CONFIG_VIDEO_MT9P031=y | ||
| 2046 | CONFIG_VIDEO_MT9V011=m | ||
| 2047 | CONFIG_VIDEO_MT9V032=y | ||
| 2048 | # CONFIG_VIDEO_TCM825X is not set | ||
| 2049 | # CONFIG_VIDEO_SAA7110 is not set | ||
| 2050 | CONFIG_VIDEO_SAA711X=m | ||
| 2051 | # CONFIG_VIDEO_SAA717X is not set | ||
| 2052 | # CONFIG_VIDEO_SAA7191 is not set | ||
| 2053 | CONFIG_VIDEO_TVP514X=m | ||
| 2054 | CONFIG_VIDEO_TVP5150=m | ||
| 2055 | CONFIG_VIDEO_TVP7002=m | ||
| 2056 | # CONFIG_VIDEO_VPX3220 is not set | ||
| 2057 | |||
| 2058 | # | ||
| 2059 | # Video and audio decoders | ||
| 2060 | # | ||
| 2061 | CONFIG_VIDEO_CX25840=m | ||
| 2062 | |||
| 2063 | # | ||
| 2064 | # MPEG video encoders | ||
| 2065 | # | ||
| 2066 | CONFIG_VIDEO_CX2341X=m | ||
| 2067 | |||
| 2068 | # | ||
| 2069 | # Video encoders | ||
| 2070 | # | ||
| 2071 | # CONFIG_VIDEO_SAA7127 is not set | ||
| 2072 | # CONFIG_VIDEO_SAA7185 is not set | ||
| 2073 | # CONFIG_VIDEO_ADV7170 is not set | ||
| 2074 | # CONFIG_VIDEO_ADV7175 is not set | ||
| 2075 | # CONFIG_VIDEO_THS7303 is not set | ||
| 2076 | # CONFIG_VIDEO_ADV7343 is not set | ||
| 2077 | # CONFIG_VIDEO_AK881X is not set | ||
| 2078 | |||
| 2079 | # | ||
| 2080 | # Video improvement chips | ||
| 2081 | # | ||
| 2082 | # CONFIG_VIDEO_UPD64031A is not set | ||
| 2083 | # CONFIG_VIDEO_UPD64083 is not set | ||
| 2084 | CONFIG_VIDEO_VIVI=m | ||
| 2085 | CONFIG_VIDEO_VPSS_SYSTEM=m | ||
| 2086 | CONFIG_VIDEO_VPFE_CAPTURE=y | ||
| 2087 | CONFIG_VIDEO_DM6446_CCDC=m | ||
| 2088 | CONFIG_VIDEO_OMAP2_VOUT=y | ||
| 2089 | # CONFIG_VIDEO_CPIA2 is not set | ||
| 2090 | CONFIG_VIDEO_TIMBERDALE=m | ||
| 2091 | # CONFIG_VIDEO_AU0828 is not set | ||
| 2092 | CONFIG_VIDEO_SR030PC30=m | ||
| 2093 | CONFIG_VIDEO_NOON010PC30=m | ||
| 2094 | CONFIG_VIDEO_OMAP3=y | ||
| 2095 | CONFIG_VIDEO_OMAP3_DEBUG=y | ||
| 2096 | # CONFIG_SOC_CAMERA is not set | ||
| 2097 | CONFIG_V4L_USB_DRIVERS=y | ||
| 2098 | CONFIG_USB_VIDEO_CLASS=m | ||
| 2099 | CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y | ||
| 2100 | CONFIG_USB_GSPCA=m | ||
| 2101 | CONFIG_USB_M5602=m | ||
| 2102 | CONFIG_USB_STV06XX=m | ||
| 2103 | # CONFIG_USB_GL860 is not set | ||
| 2104 | CONFIG_USB_GSPCA_BENQ=m | ||
| 2105 | CONFIG_USB_GSPCA_CONEX=m | ||
| 2106 | CONFIG_USB_GSPCA_CPIA1=m | ||
| 2107 | CONFIG_USB_GSPCA_ETOMS=m | ||
| 2108 | CONFIG_USB_GSPCA_FINEPIX=m | ||
| 2109 | # CONFIG_USB_GSPCA_JEILINJ is not set | ||
| 2110 | CONFIG_USB_GSPCA_KONICA=m | ||
| 2111 | CONFIG_USB_GSPCA_MARS=m | ||
| 2112 | # CONFIG_USB_GSPCA_MR97310A is not set | ||
| 2113 | CONFIG_USB_GSPCA_NW80X=m | ||
| 2114 | CONFIG_USB_GSPCA_OV519=m | ||
| 2115 | CONFIG_USB_GSPCA_OV534=m | ||
| 2116 | CONFIG_USB_GSPCA_OV534_9=m | ||
| 2117 | CONFIG_USB_GSPCA_PAC207=m | ||
| 2118 | # CONFIG_USB_GSPCA_PAC7302 is not set | ||
| 2119 | CONFIG_USB_GSPCA_PAC7311=m | ||
| 2120 | CONFIG_USB_GSPCA_SN9C2028=m | ||
| 2121 | # CONFIG_USB_GSPCA_SN9C20X is not set | ||
| 2122 | CONFIG_USB_GSPCA_SONIXB=m | ||
| 2123 | CONFIG_USB_GSPCA_SONIXJ=m | ||
| 2124 | CONFIG_USB_GSPCA_SPCA500=m | ||
| 2125 | CONFIG_USB_GSPCA_SPCA501=m | ||
| 2126 | CONFIG_USB_GSPCA_SPCA505=m | ||
| 2127 | CONFIG_USB_GSPCA_SPCA506=m | ||
| 2128 | CONFIG_USB_GSPCA_SPCA508=m | ||
| 2129 | CONFIG_USB_GSPCA_SPCA561=m | ||
| 2130 | CONFIG_USB_GSPCA_SPCA1528=m | ||
| 2131 | # CONFIG_USB_GSPCA_SQ905 is not set | ||
| 2132 | # CONFIG_USB_GSPCA_SQ905C is not set | ||
| 2133 | CONFIG_USB_GSPCA_SQ930X=m | ||
| 2134 | CONFIG_USB_GSPCA_STK014=m | ||
| 2135 | # CONFIG_USB_GSPCA_STV0680 is not set | ||
| 2136 | CONFIG_USB_GSPCA_SUNPLUS=m | ||
| 2137 | CONFIG_USB_GSPCA_T613=m | ||
| 2138 | CONFIG_USB_GSPCA_TV8532=m | ||
| 2139 | CONFIG_USB_GSPCA_VC032X=m | ||
| 2140 | CONFIG_USB_GSPCA_VICAM=m | ||
| 2141 | CONFIG_USB_GSPCA_XIRLINK_CIT=m | ||
| 2142 | CONFIG_USB_GSPCA_ZC3XX=m | ||
| 2143 | CONFIG_VIDEO_PVRUSB2=m | ||
| 2144 | CONFIG_VIDEO_PVRUSB2_SYSFS=y | ||
| 2145 | CONFIG_VIDEO_PVRUSB2_DVB=y | ||
| 2146 | # CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set | ||
| 2147 | CONFIG_VIDEO_HDPVR=m | ||
| 2148 | CONFIG_VIDEO_EM28XX=m | ||
| 2149 | CONFIG_VIDEO_EM28XX_ALSA=m | ||
| 2150 | CONFIG_VIDEO_EM28XX_DVB=m | ||
| 2151 | CONFIG_VIDEO_TLG2300=m | ||
| 2152 | CONFIG_VIDEO_CX231XX=m | ||
| 2153 | CONFIG_VIDEO_CX231XX_RC=y | ||
| 2154 | # CONFIG_VIDEO_CX231XX_ALSA is not set | ||
| 2155 | CONFIG_VIDEO_CX231XX_DVB=m | ||
| 2156 | CONFIG_VIDEO_USBVISION=m | ||
| 2157 | CONFIG_USB_ET61X251=m | ||
| 2158 | CONFIG_USB_SN9C102=m | ||
| 2159 | CONFIG_USB_PWC=m | ||
| 2160 | # CONFIG_USB_PWC_DEBUG is not set | ||
| 2161 | CONFIG_USB_PWC_INPUT_EVDEV=y | ||
| 2162 | CONFIG_USB_ZR364XX=m | ||
| 2163 | CONFIG_USB_STKWEBCAM=m | ||
| 2164 | CONFIG_USB_S2255=m | ||
| 2165 | CONFIG_V4L_MEM2MEM_DRIVERS=y | ||
| 2166 | CONFIG_VIDEO_MEM2MEM_TESTDEV=m | ||
| 2167 | CONFIG_RADIO_ADAPTERS=y | ||
| 2168 | # CONFIG_I2C_SI4713 is not set | ||
| 2169 | # CONFIG_RADIO_SI4713 is not set | ||
| 2170 | # CONFIG_USB_DSBR is not set | ||
| 2171 | # CONFIG_RADIO_SI470X is not set | ||
| 2172 | # CONFIG_USB_MR800 is not set | ||
| 2173 | # CONFIG_RADIO_TEA5764 is not set | ||
| 2174 | CONFIG_RADIO_SAA7706H=m | ||
| 2175 | # CONFIG_RADIO_TEF6862 is not set | ||
| 2176 | CONFIG_RADIO_WL1273=m | ||
| 2177 | |||
| 2178 | # | ||
| 2179 | # Texas Instruments WL128x FM driver (ST based) | ||
| 2180 | # | ||
| 2181 | CONFIG_RADIO_WL128X=m | ||
| 2182 | CONFIG_DVB_MAX_ADAPTERS=8 | ||
| 2183 | CONFIG_DVB_DYNAMIC_MINORS=y | ||
| 2184 | CONFIG_DVB_CAPTURE_DRIVERS=y | ||
| 2185 | # CONFIG_TTPCI_EEPROM is not set | ||
| 2186 | |||
| 2187 | # | ||
| 2188 | # Supported USB Adapters | ||
| 2189 | # | ||
| 2190 | CONFIG_DVB_USB=m | ||
| 2191 | # CONFIG_DVB_USB_DEBUG is not set | ||
| 2192 | CONFIG_DVB_USB_A800=m | ||
| 2193 | CONFIG_DVB_USB_DIBUSB_MB=m | ||
| 2194 | # CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set | ||
| 2195 | CONFIG_DVB_USB_DIBUSB_MC=m | ||
| 2196 | CONFIG_DVB_USB_DIB0700=m | ||
| 2197 | CONFIG_DVB_USB_UMT_010=m | ||
| 2198 | CONFIG_DVB_USB_CXUSB=m | ||
| 2199 | CONFIG_DVB_USB_M920X=m | ||
| 2200 | CONFIG_DVB_USB_GL861=m | ||
| 2201 | CONFIG_DVB_USB_AU6610=m | ||
| 2202 | CONFIG_DVB_USB_DIGITV=m | ||
| 2203 | CONFIG_DVB_USB_VP7045=m | ||
| 2204 | CONFIG_DVB_USB_VP702X=m | ||
| 2205 | CONFIG_DVB_USB_GP8PSK=m | ||
| 2206 | CONFIG_DVB_USB_NOVA_T_USB2=m | ||
| 2207 | CONFIG_DVB_USB_TTUSB2=m | ||
| 2208 | CONFIG_DVB_USB_DTT200U=m | ||
| 2209 | CONFIG_DVB_USB_OPERA1=m | ||
| 2210 | CONFIG_DVB_USB_AF9005=m | ||
| 2211 | CONFIG_DVB_USB_AF9005_REMOTE=m | ||
| 2212 | CONFIG_DVB_USB_DW2102=m | ||
| 2213 | CONFIG_DVB_USB_CINERGY_T2=m | ||
| 2214 | CONFIG_DVB_USB_ANYSEE=m | ||
| 2215 | CONFIG_DVB_USB_DTV5100=m | ||
| 2216 | CONFIG_DVB_USB_AF9015=m | ||
| 2217 | # CONFIG_DVB_USB_CE6230 is not set | ||
| 2218 | # CONFIG_DVB_USB_FRIIO is not set | ||
| 2219 | # CONFIG_DVB_USB_EC168 is not set | ||
| 2220 | CONFIG_DVB_USB_AZ6027=m | ||
| 2221 | CONFIG_DVB_USB_LME2510=m | ||
| 2222 | CONFIG_DVB_USB_TECHNISAT_USB2=m | ||
| 2223 | # CONFIG_SMS_SIANO_MDTV is not set | ||
| 2224 | |||
| 2225 | # | ||
| 2226 | # Supported FlexCopII (B2C2) Adapters | ||
| 2227 | # | ||
| 2228 | CONFIG_DVB_B2C2_FLEXCOP=m | ||
| 2229 | CONFIG_DVB_B2C2_FLEXCOP_USB=m | ||
| 2230 | # CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set | ||
| 2231 | |||
| 2232 | # | ||
| 2233 | # Supported DVB Frontends | ||
| 2234 | # | ||
| 2235 | # CONFIG_DVB_FE_CUSTOMISE is not set | ||
| 2236 | |||
| 2237 | # | ||
| 2238 | # Multistandard (satellite) frontends | ||
| 2239 | # | ||
| 2240 | CONFIG_DVB_STB0899=m | ||
| 2241 | CONFIG_DVB_STB6100=m | ||
| 2242 | CONFIG_DVB_STV090x=m | ||
| 2243 | CONFIG_DVB_STV6110x=m | ||
| 2244 | |||
| 2245 | # | ||
| 2246 | # DVB-S (satellite) frontends | ||
| 2247 | # | ||
| 2248 | CONFIG_DVB_CX24123=m | ||
| 2249 | CONFIG_DVB_MT312=m | ||
| 2250 | CONFIG_DVB_ZL10039=m | ||
| 2251 | CONFIG_DVB_S5H1420=m | ||
| 2252 | CONFIG_DVB_STV0288=m | ||
| 2253 | CONFIG_DVB_STB6000=m | ||
| 2254 | CONFIG_DVB_STV0299=m | ||
| 2255 | CONFIG_DVB_STV6110=m | ||
| 2256 | CONFIG_DVB_STV0900=m | ||
| 2257 | CONFIG_DVB_TDA10086=m | ||
| 2258 | CONFIG_DVB_TUNER_ITD1000=m | ||
| 2259 | CONFIG_DVB_TUNER_CX24113=m | ||
| 2260 | CONFIG_DVB_TDA826X=m | ||
| 2261 | CONFIG_DVB_CX24116=m | ||
| 2262 | CONFIG_DVB_SI21XX=m | ||
| 2263 | CONFIG_DVB_DS3000=m | ||
| 2264 | |||
| 2265 | # | ||
| 2266 | # DVB-T (terrestrial) frontends | ||
| 2267 | # | ||
| 2268 | CONFIG_DVB_CX22702=m | ||
| 2269 | CONFIG_DVB_TDA1004X=m | ||
| 2270 | CONFIG_DVB_NXT6000=m | ||
| 2271 | CONFIG_DVB_MT352=m | ||
| 2272 | CONFIG_DVB_ZL10353=m | ||
| 2273 | CONFIG_DVB_DIB3000MB=m | ||
| 2274 | CONFIG_DVB_DIB3000MC=m | ||
| 2275 | CONFIG_DVB_DIB7000M=m | ||
| 2276 | CONFIG_DVB_DIB7000P=m | ||
| 2277 | CONFIG_DVB_TDA10048=m | ||
| 2278 | CONFIG_DVB_AF9013=m | ||
| 2279 | |||
| 2280 | # | ||
| 2281 | # DVB-C (cable) frontends | ||
| 2282 | # | ||
| 2283 | CONFIG_DVB_TDA10023=m | ||
| 2284 | CONFIG_DVB_STV0297=m | ||
| 2285 | |||
| 2286 | # | ||
| 2287 | # ATSC (North American/Korean Terrestrial/Cable DTV) frontends | ||
| 2288 | # | ||
| 2289 | CONFIG_DVB_NXT200X=m | ||
| 2290 | CONFIG_DVB_BCM3510=m | ||
| 2291 | CONFIG_DVB_LGDT330X=m | ||
| 2292 | CONFIG_DVB_LGDT3305=m | ||
| 2293 | CONFIG_DVB_S5H1409=m | ||
| 2294 | CONFIG_DVB_S5H1411=m | ||
| 2295 | |||
| 2296 | # | ||
| 2297 | # ISDB-T (terrestrial) frontends | ||
| 2298 | # | ||
| 2299 | CONFIG_DVB_S921=m | ||
| 2300 | CONFIG_DVB_DIB8000=m | ||
| 2301 | CONFIG_DVB_MB86A20S=m | ||
| 2302 | |||
| 2303 | # | ||
| 2304 | # Digital terrestrial only tuners/PLL | ||
| 2305 | # | ||
| 2306 | CONFIG_DVB_PLL=m | ||
| 2307 | CONFIG_DVB_TUNER_DIB0070=m | ||
| 2308 | CONFIG_DVB_TUNER_DIB0090=m | ||
| 2309 | |||
| 2310 | # | ||
| 2311 | # SEC control devices for DVB-S | ||
| 2312 | # | ||
| 2313 | CONFIG_DVB_LNBP21=m | ||
| 2314 | CONFIG_DVB_ISL6421=m | ||
| 2315 | CONFIG_DVB_LGS8GXX=m | ||
| 2316 | CONFIG_DVB_ATBM8830=m | ||
| 2317 | CONFIG_DVB_IX2505V=m | ||
| 2318 | |||
| 2319 | # | ||
| 2320 | # Tools to develop new frontends | ||
| 2321 | # | ||
| 2322 | # CONFIG_DVB_DUMMY_FE is not set | ||
| 2323 | |||
| 2324 | # | ||
| 2325 | # Graphics support | ||
| 2326 | # | ||
| 2327 | CONFIG_DRM=m | ||
| 2328 | # CONFIG_VGASTATE is not set | ||
| 2329 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 2330 | CONFIG_FB=y | ||
| 2331 | # CONFIG_FIRMWARE_EDID is not set | ||
| 2332 | # CONFIG_FB_DDC is not set | ||
| 2333 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 2334 | CONFIG_FB_CFB_FILLRECT=y | ||
| 2335 | CONFIG_FB_CFB_COPYAREA=y | ||
| 2336 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 2337 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 2338 | CONFIG_FB_SYS_FILLRECT=m | ||
| 2339 | CONFIG_FB_SYS_COPYAREA=m | ||
| 2340 | CONFIG_FB_SYS_IMAGEBLIT=m | ||
| 2341 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 2342 | CONFIG_FB_SYS_FOPS=m | ||
| 2343 | # CONFIG_FB_WMT_GE_ROPS is not set | ||
| 2344 | CONFIG_FB_DEFERRED_IO=y | ||
| 2345 | # CONFIG_FB_SVGALIB is not set | ||
| 2346 | # CONFIG_FB_MACMODES is not set | ||
| 2347 | # CONFIG_FB_BACKLIGHT is not set | ||
| 2348 | CONFIG_FB_MODE_HELPERS=y | ||
| 2349 | # CONFIG_FB_TILEBLITTING is not set | ||
| 2350 | |||
| 2351 | # | ||
| 2352 | # Frame buffer hardware drivers | ||
| 2353 | # | ||
| 2354 | # CONFIG_FB_S1D13XXX is not set | ||
| 2355 | # CONFIG_FB_TMIO is not set | ||
| 2356 | CONFIG_FB_UDL=m | ||
| 2357 | # CONFIG_FB_VIRTUAL is not set | ||
| 2358 | # CONFIG_FB_METRONOME is not set | ||
| 2359 | # CONFIG_FB_MB862XX is not set | ||
| 2360 | # CONFIG_FB_BROADSHEET is not set | ||
| 2361 | # CONFIG_FB_OMAP_BOOTLOADER_INIT is not set | ||
| 2362 | CONFIG_OMAP2_VRAM=y | ||
| 2363 | CONFIG_OMAP2_VRFB=y | ||
| 2364 | CONFIG_OMAP2_DSS=y | ||
| 2365 | CONFIG_OMAP2_VRAM_SIZE=14 | ||
| 2366 | CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y | ||
| 2367 | # CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set | ||
| 2368 | CONFIG_OMAP2_DSS_DPI=y | ||
| 2369 | # CONFIG_OMAP2_DSS_RFBI is not set | ||
| 2370 | CONFIG_OMAP2_DSS_VENC=y | ||
| 2371 | # CONFIG_OMAP2_DSS_SDI is not set | ||
| 2372 | CONFIG_OMAP2_DSS_DSI=y | ||
| 2373 | CONFIG_OMAP2_DSS_USE_DSI_PLL=y | ||
| 2374 | # CONFIG_OMAP2_DSS_FAKE_VSYNC is not set | ||
| 2375 | CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 | ||
| 2376 | CONFIG_FB_OMAP2=y | ||
| 2377 | CONFIG_FB_OMAP2_DEBUG_SUPPORT=y | ||
| 2378 | CONFIG_FB_OMAP2_NUM_FBS=2 | ||
| 2379 | |||
| 2380 | # | ||
| 2381 | # OMAP2/3 Display Device Drivers | ||
| 2382 | # | ||
| 2383 | CONFIG_PANEL_GENERIC_DPI=y | ||
| 2384 | # CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set | ||
| 2385 | CONFIG_PANEL_SHARP_LS037V7DW01=y | ||
| 2386 | CONFIG_PANEL_NEC_NL8048HL11_01B=y | ||
| 2387 | # CONFIG_PANEL_TAAL is not set | ||
| 2388 | CONFIG_PANEL_TPO_TD043MTEA1=m | ||
| 2389 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
| 2390 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
| 2391 | |||
| 2392 | # | ||
| 2393 | # Display device support | ||
| 2394 | # | ||
| 2395 | CONFIG_DISPLAY_SUPPORT=y | ||
| 2396 | |||
| 2397 | # | ||
| 2398 | # Display hardware drivers | ||
| 2399 | # | ||
| 2400 | |||
| 2401 | # | ||
| 2402 | # Console display driver support | ||
| 2403 | # | ||
| 2404 | CONFIG_DUMMY_CONSOLE=y | ||
| 2405 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 2406 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 2407 | CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y | ||
| 2408 | # CONFIG_FONTS is not set | ||
| 2409 | CONFIG_FONT_8x8=y | ||
| 2410 | CONFIG_FONT_8x16=y | ||
| 2411 | CONFIG_LOGO=y | ||
| 2412 | # CONFIG_LOGO_LINUX_MONO is not set | ||
| 2413 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
| 2414 | CONFIG_LOGO_LINUX_CLUT224=y | ||
| 2415 | CONFIG_SOUND=y | ||
| 2416 | CONFIG_SOUND_OSS_CORE=y | ||
| 2417 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y | ||
| 2418 | CONFIG_SND=y | ||
| 2419 | CONFIG_SND_TIMER=y | ||
| 2420 | CONFIG_SND_PCM=y | ||
| 2421 | CONFIG_SND_HWDEP=y | ||
| 2422 | CONFIG_SND_RAWMIDI=y | ||
| 2423 | CONFIG_SND_JACK=y | ||
| 2424 | CONFIG_SND_SEQUENCER=m | ||
| 2425 | # CONFIG_SND_SEQ_DUMMY is not set | ||
| 2426 | CONFIG_SND_OSSEMUL=y | ||
| 2427 | CONFIG_SND_MIXER_OSS=y | ||
| 2428 | CONFIG_SND_PCM_OSS=y | ||
| 2429 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
| 2430 | CONFIG_SND_SEQUENCER_OSS=y | ||
| 2431 | CONFIG_SND_HRTIMER=m | ||
| 2432 | CONFIG_SND_SEQ_HRTIMER_DEFAULT=y | ||
| 2433 | CONFIG_SND_DYNAMIC_MINORS=y | ||
| 2434 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 2435 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 2436 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 2437 | # CONFIG_SND_DEBUG is not set | ||
| 2438 | CONFIG_SND_RAWMIDI_SEQ=m | ||
| 2439 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
| 2440 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
| 2441 | # CONFIG_SND_SBAWE_SEQ is not set | ||
| 2442 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
| 2443 | CONFIG_SND_DRIVERS=y | ||
| 2444 | # CONFIG_SND_DUMMY is not set | ||
| 2445 | CONFIG_SND_ALOOP=m | ||
| 2446 | # CONFIG_SND_VIRMIDI is not set | ||
| 2447 | # CONFIG_SND_MTPAV is not set | ||
| 2448 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 2449 | # CONFIG_SND_MPU401 is not set | ||
| 2450 | # CONFIG_SND_ARM is not set | ||
| 2451 | CONFIG_SND_SPI=y | ||
| 2452 | CONFIG_SND_USB=y | ||
| 2453 | CONFIG_SND_USB_AUDIO=y | ||
| 2454 | CONFIG_SND_USB_UA101=m | ||
| 2455 | CONFIG_SND_USB_CAIAQ=m | ||
| 2456 | CONFIG_SND_USB_CAIAQ_INPUT=y | ||
| 2457 | CONFIG_SND_USB_6FIRE=m | ||
| 2458 | CONFIG_SND_SOC=y | ||
| 2459 | CONFIG_SND_SOC_CACHE_LZO=y | ||
| 2460 | CONFIG_SND_OMAP_SOC=y | ||
| 2461 | CONFIG_SND_OMAP_SOC_MCBSP=y | ||
| 2462 | CONFIG_SND_OMAP_SOC_OVERO=y | ||
| 2463 | CONFIG_SND_OMAP_SOC_OMAP3EVM=y | ||
| 2464 | CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y | ||
| 2465 | CONFIG_SND_OMAP_SOC_ZOOM2=y | ||
| 2466 | CONFIG_SND_SOC_I2C_AND_SPI=y | ||
| 2467 | # CONFIG_SND_SOC_ALL_CODECS is not set | ||
| 2468 | CONFIG_SND_SOC_TWL4030=y | ||
| 2469 | # CONFIG_SOUND_PRIME is not set | ||
| 2470 | CONFIG_HID_SUPPORT=y | ||
| 2471 | CONFIG_HID=y | ||
| 2472 | # CONFIG_HIDRAW is not set | ||
| 2473 | |||
| 2474 | # | ||
| 2475 | # USB Input Devices | ||
| 2476 | # | ||
| 2477 | CONFIG_USB_HID=y | ||
| 2478 | # CONFIG_HID_PID is not set | ||
| 2479 | # CONFIG_USB_HIDDEV is not set | ||
| 2480 | |||
| 2481 | # | ||
| 2482 | # Special HID drivers | ||
| 2483 | # | ||
| 2484 | # CONFIG_HID_3M_PCT is not set | ||
| 2485 | CONFIG_HID_A4TECH=y | ||
| 2486 | CONFIG_HID_ACRUX=m | ||
| 2487 | # CONFIG_HID_ACRUX_FF is not set | ||
| 2488 | CONFIG_HID_APPLE=y | ||
| 2489 | CONFIG_HID_BELKIN=y | ||
| 2490 | # CONFIG_HID_CANDO is not set | ||
| 2491 | CONFIG_HID_CHERRY=y | ||
| 2492 | CONFIG_HID_CHICONY=y | ||
| 2493 | # CONFIG_HID_PRODIKEYS is not set | ||
| 2494 | CONFIG_HID_CYPRESS=y | ||
| 2495 | # CONFIG_HID_DRAGONRISE is not set | ||
| 2496 | CONFIG_HID_EMS_FF=m | ||
| 2497 | # CONFIG_HID_ELECOM is not set | ||
| 2498 | CONFIG_HID_EZKEY=y | ||
| 2499 | CONFIG_HID_KEYTOUCH=m | ||
| 2500 | # CONFIG_HID_KYE is not set | ||
| 2501 | CONFIG_HID_UCLOGIC=m | ||
| 2502 | CONFIG_HID_WALTOP=m | ||
| 2503 | CONFIG_HID_GYRATION=y | ||
| 2504 | # CONFIG_HID_TWINHAN is not set | ||
| 2505 | # CONFIG_HID_KENSINGTON is not set | ||
| 2506 | CONFIG_HID_LCPOWER=m | ||
| 2507 | CONFIG_HID_LOGITECH=y | ||
| 2508 | # CONFIG_LOGITECH_FF is not set | ||
| 2509 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
| 2510 | # CONFIG_LOGIG940_FF is not set | ||
| 2511 | # CONFIG_LOGIWII_FF is not set | ||
| 2512 | CONFIG_HID_MAGICMOUSE=m | ||
| 2513 | CONFIG_HID_MICROSOFT=y | ||
| 2514 | # CONFIG_HID_MOSART is not set | ||
| 2515 | CONFIG_HID_MONTEREY=y | ||
| 2516 | CONFIG_HID_MULTITOUCH=m | ||
| 2517 | CONFIG_HID_NTRIG=y | ||
| 2518 | # CONFIG_HID_ORTEK is not set | ||
| 2519 | CONFIG_HID_PANTHERLORD=y | ||
| 2520 | # CONFIG_PANTHERLORD_FF is not set | ||
| 2521 | CONFIG_HID_PETALYNX=y | ||
| 2522 | CONFIG_HID_PICOLCD=m | ||
| 2523 | CONFIG_HID_PICOLCD_FB=y | ||
| 2524 | CONFIG_HID_PICOLCD_BACKLIGHT=y | ||
| 2525 | CONFIG_HID_PICOLCD_LEDS=y | ||
| 2526 | CONFIG_HID_QUANTA=m | ||
| 2527 | CONFIG_HID_ROCCAT=m | ||
| 2528 | CONFIG_HID_ROCCAT_COMMON=m | ||
| 2529 | CONFIG_HID_ROCCAT_ARVO=m | ||
| 2530 | CONFIG_HID_ROCCAT_KONE=m | ||
| 2531 | CONFIG_HID_ROCCAT_KONEPLUS=m | ||
| 2532 | CONFIG_HID_ROCCAT_KOVAPLUS=m | ||
| 2533 | # CONFIG_HID_ROCCAT_PYRA is not set | ||
| 2534 | CONFIG_HID_SAMSUNG=y | ||
| 2535 | CONFIG_HID_SONY=y | ||
| 2536 | CONFIG_HID_STANTUM=m | ||
| 2537 | CONFIG_HID_SUNPLUS=y | ||
| 2538 | # CONFIG_HID_GREENASIA is not set | ||
| 2539 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 2540 | CONFIG_HID_TOPSEED=y | ||
| 2541 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 2542 | # CONFIG_HID_WACOM is not set | ||
| 2543 | # CONFIG_HID_ZEROPLUS is not set | ||
| 2544 | # CONFIG_HID_ZYDACRON is not set | ||
| 2545 | CONFIG_USB_SUPPORT=y | ||
| 2546 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 2547 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 2548 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 2549 | CONFIG_USB=y | ||
| 2550 | # CONFIG_USB_DEBUG is not set | ||
| 2551 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 2552 | |||
| 2553 | # | ||
| 2554 | # Miscellaneous USB options | ||
| 2555 | # | ||
| 2556 | CONFIG_USB_DEVICEFS=y | ||
| 2557 | CONFIG_USB_DEVICE_CLASS=y | ||
| 2558 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 2559 | CONFIG_USB_SUSPEND=y | ||
| 2560 | CONFIG_USB_OTG=y | ||
| 2561 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 2562 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 2563 | CONFIG_USB_MON=y | ||
| 2564 | # CONFIG_USB_WUSB is not set | ||
| 2565 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 2566 | |||
| 2567 | # | ||
| 2568 | # USB Host Controller Drivers | ||
| 2569 | # | ||
| 2570 | # CONFIG_USB_C67X00_HCD is not set | ||
| 2571 | CONFIG_USB_EHCI_HCD=y | ||
| 2572 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
| 2573 | CONFIG_USB_EHCI_TT_NEWSCHED=y | ||
| 2574 | CONFIG_USB_EHCI_HCD_OMAP=y | ||
| 2575 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 2576 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 2577 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 2578 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 2579 | # CONFIG_USB_OHCI_HCD is not set | ||
| 2580 | # CONFIG_USB_U132_HCD is not set | ||
| 2581 | # CONFIG_USB_SL811_HCD is not set | ||
| 2582 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 2583 | # CONFIG_USB_HWA_HCD is not set | ||
| 2584 | CONFIG_USB_MUSB_HDRC=y | ||
| 2585 | # CONFIG_USB_MUSB_TUSB6010 is not set | ||
| 2586 | CONFIG_USB_MUSB_OMAP2PLUS=y | ||
| 2587 | # CONFIG_USB_MUSB_AM35X is not set | ||
| 2588 | # CONFIG_USB_MUSB_HOST is not set | ||
| 2589 | # CONFIG_USB_MUSB_PERIPHERAL is not set | ||
| 2590 | CONFIG_USB_MUSB_OTG=y | ||
| 2591 | CONFIG_USB_GADGET_MUSB_HDRC=y | ||
| 2592 | CONFIG_USB_MUSB_HDRC_HCD=y | ||
| 2593 | # CONFIG_MUSB_PIO_ONLY is not set | ||
| 2594 | CONFIG_USB_INVENTRA_DMA=y | ||
| 2595 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 2596 | # CONFIG_USB_MUSB_DEBUG is not set | ||
| 2597 | |||
| 2598 | # | ||
| 2599 | # USB Device Class drivers | ||
| 2600 | # | ||
| 2601 | CONFIG_USB_ACM=m | ||
| 2602 | CONFIG_USB_PRINTER=m | ||
| 2603 | CONFIG_USB_WDM=m | ||
| 2604 | CONFIG_USB_TMC=m | ||
| 2605 | |||
| 2606 | # | ||
| 2607 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 2608 | # | ||
| 2609 | |||
| 2610 | # | ||
| 2611 | # also be needed; see USB_STORAGE Help for more info | ||
| 2612 | # | ||
| 2613 | CONFIG_USB_STORAGE=y | ||
| 2614 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 2615 | CONFIG_USB_STORAGE_REALTEK=m | ||
| 2616 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 2617 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 2618 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 2619 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 2620 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 2621 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 2622 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 2623 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 2624 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 2625 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 2626 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 2627 | CONFIG_USB_STORAGE_ENE_UB6250=m | ||
| 2628 | CONFIG_USB_UAS=m | ||
| 2629 | # CONFIG_USB_LIBUSUAL is not set | ||
| 2630 | |||
| 2631 | # | ||
| 2632 | # USB Imaging devices | ||
| 2633 | # | ||
| 2634 | # CONFIG_USB_MDC800 is not set | ||
| 2635 | # CONFIG_USB_MICROTEK is not set | ||
| 2636 | |||
| 2637 | # | ||
| 2638 | # USB port drivers | ||
| 2639 | # | ||
| 2640 | CONFIG_USB_SERIAL=m | ||
| 2641 | CONFIG_USB_EZUSB=y | ||
| 2642 | CONFIG_USB_SERIAL_GENERIC=y | ||
| 2643 | CONFIG_USB_SERIAL_AIRCABLE=m | ||
| 2644 | CONFIG_USB_SERIAL_ARK3116=m | ||
| 2645 | CONFIG_USB_SERIAL_BELKIN=m | ||
| 2646 | CONFIG_USB_SERIAL_CH341=m | ||
| 2647 | # CONFIG_USB_SERIAL_WHITEHEAT is not set | ||
| 2648 | CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m | ||
| 2649 | # CONFIG_USB_SERIAL_CP210X is not set | ||
| 2650 | CONFIG_USB_SERIAL_CYPRESS_M8=m | ||
| 2651 | CONFIG_USB_SERIAL_EMPEG=m | ||
| 2652 | CONFIG_USB_SERIAL_FTDI_SIO=m | ||
| 2653 | CONFIG_USB_SERIAL_FUNSOFT=m | ||
| 2654 | CONFIG_USB_SERIAL_VISOR=m | ||
| 2655 | CONFIG_USB_SERIAL_IPAQ=m | ||
| 2656 | CONFIG_USB_SERIAL_IR=m | ||
| 2657 | CONFIG_USB_SERIAL_EDGEPORT=m | ||
| 2658 | CONFIG_USB_SERIAL_EDGEPORT_TI=m | ||
| 2659 | CONFIG_USB_SERIAL_GARMIN=m | ||
| 2660 | CONFIG_USB_SERIAL_IPW=m | ||
| 2661 | CONFIG_USB_SERIAL_IUU=m | ||
| 2662 | CONFIG_USB_SERIAL_KEYSPAN_PDA=m | ||
| 2663 | CONFIG_USB_SERIAL_KEYSPAN=m | ||
| 2664 | CONFIG_USB_SERIAL_KEYSPAN_MPR=y | ||
| 2665 | CONFIG_USB_SERIAL_KEYSPAN_USA28=y | ||
| 2666 | CONFIG_USB_SERIAL_KEYSPAN_USA28X=y | ||
| 2667 | CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y | ||
| 2668 | CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y | ||
| 2669 | CONFIG_USB_SERIAL_KEYSPAN_USA19=y | ||
| 2670 | CONFIG_USB_SERIAL_KEYSPAN_USA18X=y | ||
| 2671 | CONFIG_USB_SERIAL_KEYSPAN_USA19W=y | ||
| 2672 | CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y | ||
| 2673 | CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y | ||
| 2674 | CONFIG_USB_SERIAL_KEYSPAN_USA49W=y | ||
| 2675 | CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y | ||
| 2676 | CONFIG_USB_SERIAL_KLSI=m | ||
| 2677 | CONFIG_USB_SERIAL_KOBIL_SCT=m | ||
| 2678 | CONFIG_USB_SERIAL_MCT_U232=m | ||
| 2679 | CONFIG_USB_SERIAL_MOS7720=m | ||
| 2680 | CONFIG_USB_SERIAL_MOS7840=m | ||
| 2681 | CONFIG_USB_SERIAL_MOTOROLA=m | ||
| 2682 | CONFIG_USB_SERIAL_NAVMAN=m | ||
| 2683 | CONFIG_USB_SERIAL_PL2303=m | ||
| 2684 | CONFIG_USB_SERIAL_OTI6858=m | ||
| 2685 | CONFIG_USB_SERIAL_QCAUX=m | ||
| 2686 | # CONFIG_USB_SERIAL_QUALCOMM is not set | ||
| 2687 | CONFIG_USB_SERIAL_SPCP8X5=m | ||
| 2688 | CONFIG_USB_SERIAL_HP4X=m | ||
| 2689 | CONFIG_USB_SERIAL_SAFE=m | ||
| 2690 | # CONFIG_USB_SERIAL_SAFE_PADDED is not set | ||
| 2691 | CONFIG_USB_SERIAL_SAMBA=m | ||
| 2692 | CONFIG_USB_SERIAL_SIEMENS_MPI=m | ||
| 2693 | CONFIG_USB_SERIAL_SIERRAWIRELESS=m | ||
| 2694 | # CONFIG_USB_SERIAL_SYMBOL is not set | ||
| 2695 | # CONFIG_USB_SERIAL_TI is not set | ||
| 2696 | CONFIG_USB_SERIAL_CYBERJACK=m | ||
| 2697 | # CONFIG_USB_SERIAL_XIRCOM is not set | ||
| 2698 | # CONFIG_USB_SERIAL_OPTION is not set | ||
| 2699 | CONFIG_USB_SERIAL_OMNINET=m | ||
| 2700 | CONFIG_USB_SERIAL_OPTICON=m | ||
| 2701 | CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m | ||
| 2702 | CONFIG_USB_SERIAL_ZIO=m | ||
| 2703 | CONFIG_USB_SERIAL_SSU100=m | ||
| 2704 | CONFIG_USB_SERIAL_DEBUG=m | ||
| 2705 | |||
| 2706 | # | ||
| 2707 | # USB Miscellaneous drivers | ||
| 2708 | # | ||
| 2709 | CONFIG_USB_EMI62=m | ||
| 2710 | CONFIG_USB_EMI26=m | ||
| 2711 | # CONFIG_USB_ADUTUX is not set | ||
| 2712 | # CONFIG_USB_SEVSEG is not set | ||
| 2713 | # CONFIG_USB_RIO500 is not set | ||
| 2714 | CONFIG_USB_LEGOTOWER=m | ||
| 2715 | CONFIG_USB_LCD=m | ||
| 2716 | CONFIG_USB_LED=m | ||
| 2717 | CONFIG_USB_CYPRESS_CY7C63=m | ||
| 2718 | CONFIG_USB_CYTHERM=m | ||
| 2719 | CONFIG_USB_IDMOUSE=m | ||
| 2720 | CONFIG_USB_FTDI_ELAN=m | ||
| 2721 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 2722 | CONFIG_USB_SISUSBVGA=m | ||
| 2723 | CONFIG_USB_SISUSBVGA_CON=y | ||
| 2724 | CONFIG_USB_LD=m | ||
| 2725 | CONFIG_USB_TRANCEVIBRATOR=m | ||
| 2726 | # CONFIG_USB_IOWARRIOR is not set | ||
| 2727 | CONFIG_USB_TEST=m | ||
| 2728 | # CONFIG_USB_ISIGHTFW is not set | ||
| 2729 | CONFIG_USB_YUREX=m | ||
| 2730 | CONFIG_USB_ATM=m | ||
| 2731 | CONFIG_USB_SPEEDTOUCH=m | ||
| 2732 | CONFIG_USB_CXACRU=m | ||
| 2733 | CONFIG_USB_UEAGLEATM=m | ||
| 2734 | CONFIG_USB_XUSBATM=m | ||
| 2735 | CONFIG_USB_GADGET=y | ||
| 2736 | # CONFIG_USB_GADGET_DEBUG is not set | ||
| 2737 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
| 2738 | CONFIG_USB_GADGET_DEBUG_FS=y | ||
| 2739 | CONFIG_USB_GADGET_VBUS_DRAW=480 | ||
| 2740 | CONFIG_USB_GADGET_SELECTED=y | ||
| 2741 | # CONFIG_USB_GADGET_FUSB300 is not set | ||
| 2742 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 2743 | # CONFIG_USB_GADGET_R8A66597 is not set | ||
| 2744 | # CONFIG_USB_GADGET_PXA_U2O is not set | ||
| 2745 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 2746 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 2747 | CONFIG_USB_GADGET_DUALSPEED=y | ||
| 2748 | # CONFIG_USB_ZERO is not set | ||
| 2749 | # CONFIG_USB_AUDIO is not set | ||
| 2750 | CONFIG_USB_ETH=m | ||
| 2751 | CONFIG_USB_ETH_RNDIS=y | ||
| 2752 | # CONFIG_USB_ETH_EEM is not set | ||
| 2753 | CONFIG_USB_G_NCM=m | ||
| 2754 | # CONFIG_USB_GADGETFS is not set | ||
| 2755 | CONFIG_USB_FUNCTIONFS=m | ||
| 2756 | # CONFIG_USB_FUNCTIONFS_ETH is not set | ||
| 2757 | CONFIG_USB_FUNCTIONFS_RNDIS=y | ||
| 2758 | # CONFIG_USB_FUNCTIONFS_GENERIC is not set | ||
| 2759 | # CONFIG_USB_FILE_STORAGE is not set | ||
| 2760 | # CONFIG_USB_MASS_STORAGE is not set | ||
| 2761 | # CONFIG_USB_G_SERIAL is not set | ||
| 2762 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 2763 | # CONFIG_USB_G_PRINTER is not set | ||
| 2764 | # CONFIG_USB_CDC_COMPOSITE is not set | ||
| 2765 | # CONFIG_USB_G_MULTI is not set | ||
| 2766 | CONFIG_USB_G_HID=m | ||
| 2767 | CONFIG_USB_G_DBGP=m | ||
| 2768 | # CONFIG_USB_G_DBGP_PRINTK is not set | ||
| 2769 | CONFIG_USB_G_DBGP_SERIAL=y | ||
| 2770 | CONFIG_USB_G_WEBCAM=m | ||
| 2771 | |||
| 2772 | # | ||
| 2773 | # OTG and related infrastructure | ||
| 2774 | # | ||
| 2775 | CONFIG_USB_OTG_UTILS=y | ||
| 2776 | CONFIG_USB_GPIO_VBUS=y | ||
| 2777 | # CONFIG_ISP1301_OMAP is not set | ||
| 2778 | # CONFIG_USB_ULPI is not set | ||
| 2779 | CONFIG_TWL4030_USB=y | ||
| 2780 | CONFIG_TWL6030_USB=m | ||
| 2781 | CONFIG_NOP_USB_XCEIV=y | ||
| 2782 | CONFIG_MMC=y | ||
| 2783 | # CONFIG_MMC_DEBUG is not set | ||
| 2784 | CONFIG_MMC_UNSAFE_RESUME=y | ||
| 2785 | # CONFIG_MMC_CLKGATE is not set | ||
| 2786 | |||
| 2787 | # | ||
| 2788 | # MMC/SD/SDIO Card Drivers | ||
| 2789 | # | ||
| 2790 | CONFIG_MMC_BLOCK=y | ||
| 2791 | CONFIG_MMC_BLOCK_MINORS=8 | ||
| 2792 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 2793 | CONFIG_SDIO_UART=y | ||
| 2794 | # CONFIG_MMC_TEST is not set | ||
| 2795 | |||
| 2796 | # | ||
| 2797 | # MMC/SD/SDIO Host Controller Drivers | ||
| 2798 | # | ||
| 2799 | # CONFIG_MMC_SDHCI is not set | ||
| 2800 | # CONFIG_MMC_OMAP is not set | ||
| 2801 | CONFIG_MMC_OMAP_HS=y | ||
| 2802 | CONFIG_MMC_SPI=m | ||
| 2803 | # CONFIG_MMC_DW is not set | ||
| 2804 | CONFIG_MMC_USHC=m | ||
| 2805 | # CONFIG_MEMSTICK is not set | ||
| 2806 | CONFIG_NEW_LEDS=y | ||
| 2807 | CONFIG_LEDS_CLASS=y | ||
| 2808 | |||
| 2809 | # | ||
| 2810 | # LED drivers | ||
| 2811 | # | ||
| 2812 | # CONFIG_LEDS_LM3530 is not set | ||
| 2813 | # CONFIG_LEDS_PCA9532 is not set | ||
| 2814 | CONFIG_LEDS_GPIO=y | ||
| 2815 | CONFIG_LEDS_GPIO_PLATFORM=y | ||
| 2816 | # CONFIG_LEDS_LP3944 is not set | ||
| 2817 | CONFIG_LEDS_LP5521=m | ||
| 2818 | CONFIG_LEDS_LP5523=m | ||
| 2819 | # CONFIG_LEDS_PCA955X is not set | ||
| 2820 | # CONFIG_LEDS_DAC124S085 is not set | ||
| 2821 | CONFIG_LEDS_PWM=m | ||
| 2822 | CONFIG_LEDS_REGULATOR=m | ||
| 2823 | # CONFIG_LEDS_BD2802 is not set | ||
| 2824 | # CONFIG_LEDS_LT3593 is not set | ||
| 2825 | CONFIG_LEDS_TRIGGERS=y | ||
| 2826 | |||
| 2827 | # | ||
| 2828 | # LED Triggers | ||
| 2829 | # | ||
| 2830 | CONFIG_LEDS_TRIGGER_TIMER=m | ||
| 2831 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
| 2832 | CONFIG_LEDS_TRIGGER_BACKLIGHT=m | ||
| 2833 | CONFIG_LEDS_TRIGGER_GPIO=m | ||
| 2834 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=m | ||
| 2835 | |||
| 2836 | # | ||
| 2837 | # iptables trigger is under Netfilter config (LED target) | ||
| 2838 | # | ||
| 2839 | CONFIG_NFC_DEVICES=y | ||
| 2840 | CONFIG_PN544_NFC=m | ||
| 2841 | # CONFIG_ACCESSIBILITY is not set | ||
| 2842 | CONFIG_RTC_LIB=y | ||
| 2843 | CONFIG_RTC_CLASS=y | ||
| 2844 | CONFIG_RTC_HCTOSYS=y | ||
| 2845 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 2846 | # CONFIG_RTC_DEBUG is not set | ||
| 2847 | |||
| 2848 | # | ||
| 2849 | # RTC interfaces | ||
| 2850 | # | ||
| 2851 | CONFIG_RTC_INTF_SYSFS=y | ||
| 2852 | CONFIG_RTC_INTF_PROC=y | ||
| 2853 | CONFIG_RTC_INTF_DEV=y | ||
| 2854 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 2855 | # CONFIG_RTC_DRV_TEST is not set | ||
| 2856 | |||
| 2857 | # | ||
| 2858 | # I2C RTC drivers | ||
| 2859 | # | ||
| 2860 | CONFIG_RTC_DRV_DS1307=y | ||
| 2861 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 2862 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 2863 | # CONFIG_RTC_DRV_DS3232 is not set | ||
| 2864 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 2865 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 2866 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 2867 | # CONFIG_RTC_DRV_ISL12022 is not set | ||
| 2868 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 2869 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 2870 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 2871 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 2872 | CONFIG_RTC_DRV_BQ32K=m | ||
| 2873 | CONFIG_RTC_DRV_TWL4030=m | ||
| 2874 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 2875 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 2876 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 2877 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 2878 | |||
| 2879 | # | ||
| 2880 | # SPI RTC drivers | ||
| 2881 | # | ||
| 2882 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 2883 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 2884 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 2885 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 2886 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 2887 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 2888 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 2889 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 2890 | |||
| 2891 | # | ||
| 2892 | # Platform RTC drivers | ||
| 2893 | # | ||
| 2894 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 2895 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 2896 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 2897 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 2898 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 2899 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 2900 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 2901 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 2902 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 2903 | # CONFIG_RTC_DRV_MSM6242 is not set | ||
| 2904 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 2905 | # CONFIG_RTC_DRV_RP5C01 is not set | ||
| 2906 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 2907 | |||
| 2908 | # | ||
| 2909 | # on-CPU RTC drivers | ||
| 2910 | # | ||
| 2911 | # CONFIG_DMADEVICES is not set | ||
| 2912 | CONFIG_TIMB_DMA=m | ||
| 2913 | CONFIG_DMA_ENGINE=y | ||
| 2914 | # CONFIG_AUXDISPLAY is not set | ||
| 2915 | CONFIG_UIO=m | ||
| 2916 | CONFIG_UIO_PDRV=m | ||
| 2917 | CONFIG_UIO_PDRV_GENIRQ=m | ||
| 2918 | CONFIG_STAGING=y | ||
| 2919 | # CONFIG_STAGING_EXCLUDE_BUILD is not set | ||
| 2920 | # CONFIG_VIDEO_TM6000 is not set | ||
| 2921 | # CONFIG_USB_IP_COMMON is not set | ||
| 2922 | CONFIG_W35UND=m | ||
| 2923 | CONFIG_PRISM2_USB=m | ||
| 2924 | CONFIG_ECHO=m | ||
| 2925 | CONFIG_BRCM80211=m | ||
| 2926 | CONFIG_BRCMFMAC=y | ||
| 2927 | # CONFIG_BRCMDBG is not set | ||
| 2928 | CONFIG_RT2870=m | ||
| 2929 | # CONFIG_COMEDI is not set | ||
| 2930 | # CONFIG_ASUS_OLED is not set | ||
| 2931 | CONFIG_R8712U=m | ||
| 2932 | CONFIG_R8712_AP=y | ||
| 2933 | # CONFIG_TRANZPORT is not set | ||
| 2934 | # CONFIG_POHMELFS is not set | ||
| 2935 | # CONFIG_LINE6_USB is not set | ||
| 2936 | # CONFIG_USB_SERIAL_QUATECH2 is not set | ||
| 2937 | # CONFIG_USB_SERIAL_QUATECH_USB2 is not set | ||
| 2938 | # CONFIG_VT6656 is not set | ||
| 2939 | # CONFIG_IIO is not set | ||
| 2940 | CONFIG_XVMALLOC=y | ||
| 2941 | CONFIG_ZRAM=m | ||
| 2942 | # CONFIG_ZRAM_DEBUG is not set | ||
| 2943 | # CONFIG_FB_SM7XX is not set | ||
| 2944 | # CONFIG_LIRC_STAGING is not set | ||
| 2945 | # CONFIG_EASYCAP is not set | ||
| 2946 | # CONFIG_TIDSPBRIDGE is not set | ||
| 2947 | # CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL is not set | ||
| 2948 | CONFIG_MACH_NO_WESTBRIDGE=y | ||
| 2949 | # CONFIG_ATH6K_LEGACY is not set | ||
| 2950 | CONFIG_USB_ENESTORAGE=m | ||
| 2951 | CONFIG_BCM_WIMAX=m | ||
| 2952 | CONFIG_FT1000=m | ||
| 2953 | CONFIG_FT1000_USB=m | ||
| 2954 | |||
| 2955 | # | ||
| 2956 | # Speakup console speech | ||
| 2957 | # | ||
| 2958 | # CONFIG_SPEAKUP is not set | ||
| 2959 | CONFIG_TOUCHSCREEN_CLEARPAD_TM1217=m | ||
| 2960 | CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=m | ||
| 2961 | |||
| 2962 | # | ||
| 2963 | # Altera FPGA firmware download module | ||
| 2964 | # | ||
| 2965 | # CONFIG_ALTERA_STAPL is not set | ||
| 2966 | CONFIG_CLKDEV_LOOKUP=y | ||
| 2967 | |||
| 2968 | # | ||
| 2969 | # File systems | ||
| 2970 | # | ||
| 2971 | CONFIG_EXT2_FS=y | ||
| 2972 | CONFIG_EXT2_FS_XATTR=y | ||
| 2973 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
| 2974 | CONFIG_EXT2_FS_SECURITY=y | ||
| 2975 | # CONFIG_EXT2_FS_XIP is not set | ||
| 2976 | CONFIG_EXT3_FS=y | ||
| 2977 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 2978 | CONFIG_EXT3_FS_XATTR=y | ||
| 2979 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
| 2980 | # CONFIG_EXT3_FS_SECURITY is not set | ||
| 2981 | CONFIG_EXT4_FS=y | ||
| 2982 | CONFIG_EXT4_FS_XATTR=y | ||
| 2983 | CONFIG_EXT4_FS_POSIX_ACL=y | ||
| 2984 | CONFIG_EXT4_FS_SECURITY=y | ||
| 2985 | # CONFIG_EXT4_DEBUG is not set | ||
| 2986 | CONFIG_JBD=y | ||
| 2987 | # CONFIG_JBD_DEBUG is not set | ||
| 2988 | CONFIG_JBD2=y | ||
| 2989 | # CONFIG_JBD2_DEBUG is not set | ||
| 2990 | CONFIG_FS_MBCACHE=y | ||
| 2991 | CONFIG_REISERFS_FS=m | ||
| 2992 | # CONFIG_REISERFS_CHECK is not set | ||
| 2993 | CONFIG_REISERFS_PROC_INFO=y | ||
| 2994 | CONFIG_REISERFS_FS_XATTR=y | ||
| 2995 | # CONFIG_REISERFS_FS_POSIX_ACL is not set | ||
| 2996 | # CONFIG_REISERFS_FS_SECURITY is not set | ||
| 2997 | CONFIG_JFS_FS=m | ||
| 2998 | CONFIG_JFS_POSIX_ACL=y | ||
| 2999 | # CONFIG_JFS_SECURITY is not set | ||
| 3000 | # CONFIG_JFS_DEBUG is not set | ||
| 3001 | CONFIG_JFS_STATISTICS=y | ||
| 3002 | CONFIG_XFS_FS=m | ||
| 3003 | CONFIG_XFS_QUOTA=y | ||
| 3004 | CONFIG_XFS_POSIX_ACL=y | ||
| 3005 | CONFIG_XFS_RT=y | ||
| 3006 | # CONFIG_XFS_DEBUG is not set | ||
| 3007 | CONFIG_GFS2_FS=m | ||
| 3008 | CONFIG_GFS2_FS_LOCKING_DLM=y | ||
| 3009 | CONFIG_OCFS2_FS=m | ||
| 3010 | CONFIG_OCFS2_FS_O2CB=m | ||
| 3011 | CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m | ||
| 3012 | CONFIG_OCFS2_FS_STATS=y | ||
| 3013 | CONFIG_OCFS2_DEBUG_MASKLOG=y | ||
| 3014 | # CONFIG_OCFS2_DEBUG_FS is not set | ||
| 3015 | CONFIG_BTRFS_FS=m | ||
| 3016 | CONFIG_BTRFS_FS_POSIX_ACL=y | ||
| 3017 | CONFIG_NILFS2_FS=m | ||
| 3018 | CONFIG_FS_POSIX_ACL=y | ||
| 3019 | CONFIG_EXPORTFS=y | ||
| 3020 | CONFIG_FILE_LOCKING=y | ||
| 3021 | CONFIG_FSNOTIFY=y | ||
| 3022 | CONFIG_DNOTIFY=y | ||
| 3023 | CONFIG_INOTIFY_USER=y | ||
| 3024 | CONFIG_FANOTIFY=y | ||
| 3025 | CONFIG_QUOTA=y | ||
| 3026 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set | ||
| 3027 | CONFIG_PRINT_QUOTA_WARNING=y | ||
| 3028 | # CONFIG_QUOTA_DEBUG is not set | ||
| 3029 | CONFIG_QUOTA_TREE=y | ||
| 3030 | # CONFIG_QFMT_V1 is not set | ||
| 3031 | CONFIG_QFMT_V2=y | ||
| 3032 | CONFIG_QUOTACTL=y | ||
| 3033 | CONFIG_AUTOFS4_FS=y | ||
| 3034 | CONFIG_FUSE_FS=m | ||
| 3035 | CONFIG_CUSE=m | ||
| 3036 | CONFIG_GENERIC_ACL=y | ||
| 3037 | |||
| 3038 | # | ||
| 3039 | # Caches | ||
| 3040 | # | ||
| 3041 | CONFIG_FSCACHE=m | ||
| 3042 | CONFIG_FSCACHE_STATS=y | ||
| 3043 | CONFIG_FSCACHE_HISTOGRAM=y | ||
| 3044 | # CONFIG_FSCACHE_DEBUG is not set | ||
| 3045 | # CONFIG_FSCACHE_OBJECT_LIST is not set | ||
| 3046 | CONFIG_CACHEFILES=m | ||
| 3047 | # CONFIG_CACHEFILES_DEBUG is not set | ||
| 3048 | CONFIG_CACHEFILES_HISTOGRAM=y | ||
| 3049 | |||
| 3050 | # | ||
| 3051 | # CD-ROM/DVD Filesystems | ||
| 3052 | # | ||
| 3053 | CONFIG_ISO9660_FS=m | ||
| 3054 | CONFIG_JOLIET=y | ||
| 3055 | CONFIG_ZISOFS=y | ||
| 3056 | CONFIG_UDF_FS=m | ||
| 3057 | CONFIG_UDF_NLS=y | ||
| 3058 | |||
| 3059 | # | ||
| 3060 | # DOS/FAT/NT Filesystems | ||
| 3061 | # | ||
| 3062 | CONFIG_FAT_FS=y | ||
| 3063 | CONFIG_MSDOS_FS=y | ||
| 3064 | CONFIG_VFAT_FS=y | ||
| 3065 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 3066 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 3067 | CONFIG_NTFS_FS=m | ||
| 3068 | # CONFIG_NTFS_DEBUG is not set | ||
| 3069 | # CONFIG_NTFS_RW is not set | ||
| 3070 | |||
| 3071 | # | ||
| 3072 | # Pseudo filesystems | ||
| 3073 | # | ||
| 3074 | CONFIG_PROC_FS=y | ||
| 3075 | CONFIG_PROC_SYSCTL=y | ||
| 3076 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 3077 | CONFIG_SYSFS=y | ||
| 3078 | CONFIG_TMPFS=y | ||
| 3079 | CONFIG_TMPFS_POSIX_ACL=y | ||
| 3080 | # CONFIG_HUGETLB_PAGE is not set | ||
| 3081 | CONFIG_CONFIGFS_FS=m | ||
| 3082 | CONFIG_MISC_FILESYSTEMS=y | ||
| 3083 | CONFIG_ADFS_FS=m | ||
| 3084 | # CONFIG_ADFS_FS_RW is not set | ||
| 3085 | CONFIG_AFFS_FS=m | ||
| 3086 | # CONFIG_ECRYPT_FS is not set | ||
| 3087 | CONFIG_UNION_FS=m | ||
| 3088 | CONFIG_UNION_FS_XATTR=y | ||
| 3089 | # CONFIG_UNION_FS_DEBUG is not set | ||
| 3090 | CONFIG_HFS_FS=m | ||
| 3091 | CONFIG_HFSPLUS_FS=m | ||
| 3092 | CONFIG_BEFS_FS=m | ||
| 3093 | # CONFIG_BEFS_DEBUG is not set | ||
| 3094 | CONFIG_BFS_FS=m | ||
| 3095 | CONFIG_EFS_FS=m | ||
| 3096 | CONFIG_JFFS2_FS=y | ||
| 3097 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 3098 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 3099 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 3100 | CONFIG_JFFS2_SUMMARY=y | ||
| 3101 | CONFIG_JFFS2_FS_XATTR=y | ||
| 3102 | CONFIG_JFFS2_FS_POSIX_ACL=y | ||
| 3103 | CONFIG_JFFS2_FS_SECURITY=y | ||
| 3104 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
| 3105 | CONFIG_JFFS2_ZLIB=y | ||
| 3106 | CONFIG_JFFS2_LZO=y | ||
| 3107 | CONFIG_JFFS2_RTIME=y | ||
| 3108 | CONFIG_JFFS2_RUBIN=y | ||
| 3109 | # CONFIG_JFFS2_CMODE_NONE is not set | ||
| 3110 | # CONFIG_JFFS2_CMODE_PRIORITY is not set | ||
| 3111 | # CONFIG_JFFS2_CMODE_SIZE is not set | ||
| 3112 | CONFIG_JFFS2_CMODE_FAVOURLZO=y | ||
| 3113 | CONFIG_UBIFS_FS=y | ||
| 3114 | CONFIG_UBIFS_FS_XATTR=y | ||
| 3115 | CONFIG_UBIFS_FS_ADVANCED_COMPR=y | ||
| 3116 | CONFIG_UBIFS_FS_LZO=y | ||
| 3117 | CONFIG_UBIFS_FS_ZLIB=y | ||
| 3118 | # CONFIG_UBIFS_FS_DEBUG is not set | ||
| 3119 | CONFIG_LOGFS=m | ||
| 3120 | CONFIG_CRAMFS=m | ||
| 3121 | CONFIG_SQUASHFS=y | ||
| 3122 | # CONFIG_SQUASHFS_XATTR is not set | ||
| 3123 | CONFIG_SQUASHFS_LZO=y | ||
| 3124 | CONFIG_SQUASHFS_XZ=y | ||
| 3125 | # CONFIG_SQUASHFS_EMBEDDED is not set | ||
| 3126 | CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 | ||
| 3127 | CONFIG_VXFS_FS=m | ||
| 3128 | CONFIG_MINIX_FS=m | ||
| 3129 | CONFIG_OMFS_FS=m | ||
| 3130 | CONFIG_HPFS_FS=m | ||
| 3131 | CONFIG_QNX4FS_FS=m | ||
| 3132 | CONFIG_ROMFS_FS=m | ||
| 3133 | CONFIG_ROMFS_BACKED_BY_BLOCK=y | ||
| 3134 | # CONFIG_ROMFS_BACKED_BY_MTD is not set | ||
| 3135 | # CONFIG_ROMFS_BACKED_BY_BOTH is not set | ||
| 3136 | CONFIG_ROMFS_ON_BLOCK=y | ||
| 3137 | CONFIG_PSTORE=y | ||
| 3138 | CONFIG_SYSV_FS=m | ||
| 3139 | CONFIG_UFS_FS=m | ||
| 3140 | # CONFIG_UFS_FS_WRITE is not set | ||
| 3141 | # CONFIG_UFS_DEBUG is not set | ||
| 3142 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 3143 | CONFIG_NFS_FS=y | ||
| 3144 | CONFIG_NFS_V3=y | ||
| 3145 | CONFIG_NFS_V3_ACL=y | ||
| 3146 | CONFIG_NFS_V4=y | ||
| 3147 | CONFIG_NFS_V4_1=y | ||
| 3148 | CONFIG_PNFS_FILE_LAYOUT=y | ||
| 3149 | CONFIG_ROOT_NFS=y | ||
| 3150 | # CONFIG_NFS_USE_LEGACY_DNS is not set | ||
| 3151 | CONFIG_NFS_USE_KERNEL_DNS=y | ||
| 3152 | # CONFIG_NFS_USE_NEW_IDMAPPER is not set | ||
| 3153 | CONFIG_NFSD=m | ||
| 3154 | CONFIG_NFSD_DEPRECATED=y | ||
| 3155 | CONFIG_NFSD_V2_ACL=y | ||
| 3156 | CONFIG_NFSD_V3=y | ||
| 3157 | CONFIG_NFSD_V3_ACL=y | ||
| 3158 | CONFIG_NFSD_V4=y | ||
| 3159 | CONFIG_LOCKD=y | ||
| 3160 | CONFIG_LOCKD_V4=y | ||
| 3161 | CONFIG_NFS_ACL_SUPPORT=y | ||
| 3162 | CONFIG_NFS_COMMON=y | ||
| 3163 | CONFIG_SUNRPC=y | ||
| 3164 | CONFIG_SUNRPC_GSS=y | ||
| 3165 | CONFIG_RPCSEC_GSS_KRB5=m | ||
| 3166 | CONFIG_CEPH_FS=m | ||
| 3167 | CONFIG_CIFS=m | ||
| 3168 | CONFIG_CIFS_STATS=y | ||
| 3169 | CONFIG_CIFS_STATS2=y | ||
| 3170 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
| 3171 | # CONFIG_CIFS_UPCALL is not set | ||
| 3172 | CONFIG_CIFS_XATTR=y | ||
| 3173 | CONFIG_CIFS_POSIX=y | ||
| 3174 | # CONFIG_CIFS_DEBUG2 is not set | ||
| 3175 | CONFIG_CIFS_DFS_UPCALL=y | ||
| 3176 | CONFIG_CIFS_FSCACHE=y | ||
| 3177 | CONFIG_CIFS_ACL=y | ||
| 3178 | CONFIG_CIFS_EXPERIMENTAL=y | ||
| 3179 | CONFIG_NCP_FS=m | ||
| 3180 | # CONFIG_NCPFS_PACKET_SIGNING is not set | ||
| 3181 | # CONFIG_NCPFS_IOCTL_LOCKING is not set | ||
| 3182 | # CONFIG_NCPFS_STRONG is not set | ||
| 3183 | # CONFIG_NCPFS_NFS_NS is not set | ||
| 3184 | # CONFIG_NCPFS_OS2_NS is not set | ||
| 3185 | # CONFIG_NCPFS_SMALLDOS is not set | ||
| 3186 | # CONFIG_NCPFS_NLS is not set | ||
| 3187 | # CONFIG_NCPFS_EXTRAS is not set | ||
| 3188 | CONFIG_CODA_FS=m | ||
| 3189 | CONFIG_AFS_FS=m | ||
| 3190 | # CONFIG_AFS_DEBUG is not set | ||
| 3191 | # CONFIG_AFS_FSCACHE is not set | ||
| 3192 | CONFIG_9P_FS=m | ||
| 3193 | CONFIG_9P_FSCACHE=y | ||
| 3194 | CONFIG_9P_FS_POSIX_ACL=y | ||
| 3195 | |||
| 3196 | # | ||
| 3197 | # Partition Types | ||
| 3198 | # | ||
| 3199 | CONFIG_PARTITION_ADVANCED=y | ||
| 3200 | # CONFIG_ACORN_PARTITION is not set | ||
| 3201 | # CONFIG_OSF_PARTITION is not set | ||
| 3202 | # CONFIG_AMIGA_PARTITION is not set | ||
| 3203 | # CONFIG_ATARI_PARTITION is not set | ||
| 3204 | CONFIG_MAC_PARTITION=y | ||
| 3205 | CONFIG_MSDOS_PARTITION=y | ||
| 3206 | CONFIG_BSD_DISKLABEL=y | ||
| 3207 | CONFIG_MINIX_SUBPARTITION=y | ||
| 3208 | CONFIG_SOLARIS_X86_PARTITION=y | ||
| 3209 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 3210 | CONFIG_LDM_PARTITION=y | ||
| 3211 | CONFIG_LDM_DEBUG=y | ||
| 3212 | # CONFIG_SGI_PARTITION is not set | ||
| 3213 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 3214 | # CONFIG_SUN_PARTITION is not set | ||
| 3215 | # CONFIG_KARMA_PARTITION is not set | ||
| 3216 | CONFIG_EFI_PARTITION=y | ||
| 3217 | # CONFIG_SYSV68_PARTITION is not set | ||
| 3218 | CONFIG_NLS=y | ||
| 3219 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 3220 | CONFIG_NLS_CODEPAGE_437=y | ||
| 3221 | CONFIG_NLS_CODEPAGE_737=m | ||
| 3222 | CONFIG_NLS_CODEPAGE_775=m | ||
| 3223 | CONFIG_NLS_CODEPAGE_850=m | ||
| 3224 | CONFIG_NLS_CODEPAGE_852=m | ||
| 3225 | CONFIG_NLS_CODEPAGE_855=m | ||
| 3226 | CONFIG_NLS_CODEPAGE_857=m | ||
| 3227 | CONFIG_NLS_CODEPAGE_860=m | ||
| 3228 | CONFIG_NLS_CODEPAGE_861=m | ||
| 3229 | CONFIG_NLS_CODEPAGE_862=m | ||
| 3230 | CONFIG_NLS_CODEPAGE_863=m | ||
| 3231 | CONFIG_NLS_CODEPAGE_864=m | ||
| 3232 | CONFIG_NLS_CODEPAGE_865=m | ||
| 3233 | CONFIG_NLS_CODEPAGE_866=m | ||
| 3234 | CONFIG_NLS_CODEPAGE_869=m | ||
| 3235 | CONFIG_NLS_CODEPAGE_936=m | ||
| 3236 | CONFIG_NLS_CODEPAGE_950=m | ||
| 3237 | CONFIG_NLS_CODEPAGE_932=m | ||
| 3238 | CONFIG_NLS_CODEPAGE_949=m | ||
| 3239 | CONFIG_NLS_CODEPAGE_874=m | ||
| 3240 | CONFIG_NLS_ISO8859_8=m | ||
| 3241 | CONFIG_NLS_CODEPAGE_1250=m | ||
| 3242 | CONFIG_NLS_CODEPAGE_1251=m | ||
| 3243 | CONFIG_NLS_ASCII=m | ||
| 3244 | CONFIG_NLS_ISO8859_1=y | ||
| 3245 | CONFIG_NLS_ISO8859_2=m | ||
| 3246 | CONFIG_NLS_ISO8859_3=m | ||
| 3247 | CONFIG_NLS_ISO8859_4=m | ||
| 3248 | CONFIG_NLS_ISO8859_5=m | ||
| 3249 | CONFIG_NLS_ISO8859_6=m | ||
| 3250 | CONFIG_NLS_ISO8859_7=m | ||
| 3251 | CONFIG_NLS_ISO8859_9=m | ||
| 3252 | CONFIG_NLS_ISO8859_13=m | ||
| 3253 | CONFIG_NLS_ISO8859_14=m | ||
| 3254 | CONFIG_NLS_ISO8859_15=m | ||
| 3255 | CONFIG_NLS_KOI8_R=m | ||
| 3256 | CONFIG_NLS_KOI8_U=m | ||
| 3257 | CONFIG_NLS_UTF8=y | ||
| 3258 | CONFIG_DLM=m | ||
| 3259 | # CONFIG_DLM_DEBUG is not set | ||
| 3260 | |||
| 3261 | # | ||
| 3262 | # Kernel hacking | ||
| 3263 | # | ||
| 3264 | CONFIG_PRINTK_TIME=y | ||
| 3265 | CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 | ||
| 3266 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 3267 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 3268 | CONFIG_FRAME_WARN=1024 | ||
| 3269 | CONFIG_MAGIC_SYSRQ=y | ||
| 3270 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 3271 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 3272 | CONFIG_DEBUG_FS=y | ||
| 3273 | # CONFIG_HEADERS_CHECK is not set | ||
| 3274 | # CONFIG_DEBUG_SECTION_MISMATCH is not set | ||
| 3275 | CONFIG_DEBUG_KERNEL=y | ||
| 3276 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 3277 | # CONFIG_LOCKUP_DETECTOR is not set | ||
| 3278 | # CONFIG_HARDLOCKUP_DETECTOR is not set | ||
| 3279 | CONFIG_DETECT_HUNG_TASK=y | ||
| 3280 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 3281 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 3282 | CONFIG_SCHED_DEBUG=y | ||
| 3283 | CONFIG_SCHEDSTATS=y | ||
| 3284 | CONFIG_TIMER_STATS=y | ||
| 3285 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 3286 | # CONFIG_DEBUG_SLAB is not set | ||
| 3287 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 3288 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 3289 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 3290 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 3291 | CONFIG_DEBUG_MUTEXES=y | ||
| 3292 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 3293 | # CONFIG_PROVE_LOCKING is not set | ||
| 3294 | # CONFIG_SPARSE_RCU_POINTER is not set | ||
| 3295 | # CONFIG_LOCK_STAT is not set | ||
| 3296 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 3297 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 3298 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 3299 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 3300 | # CONFIG_DEBUG_INFO is not set | ||
| 3301 | # CONFIG_DEBUG_VM is not set | ||
| 3302 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 3303 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 3304 | # CONFIG_DEBUG_LIST is not set | ||
| 3305 | # CONFIG_TEST_LIST_SORT is not set | ||
| 3306 | # CONFIG_DEBUG_SG is not set | ||
| 3307 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 3308 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 3309 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 3310 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 3311 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 3312 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 3313 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 3314 | # CONFIG_LKDTM is not set | ||
| 3315 | # CONFIG_FAULT_INJECTION is not set | ||
| 3316 | # CONFIG_LATENCYTOP is not set | ||
| 3317 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 3318 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
| 3319 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 3320 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
| 3321 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 3322 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 3323 | CONFIG_HAVE_C_RECORDMCOUNT=y | ||
| 3324 | CONFIG_RING_BUFFER=y | ||
| 3325 | CONFIG_RING_BUFFER_ALLOW_SWAP=y | ||
| 3326 | CONFIG_TRACING_SUPPORT=y | ||
| 3327 | CONFIG_FTRACE=y | ||
| 3328 | # CONFIG_FUNCTION_TRACER is not set | ||
| 3329 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 3330 | # CONFIG_SCHED_TRACER is not set | ||
| 3331 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
| 3332 | CONFIG_BRANCH_PROFILE_NONE=y | ||
| 3333 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 3334 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 3335 | # CONFIG_STACK_TRACER is not set | ||
| 3336 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 3337 | # CONFIG_RING_BUFFER_BENCHMARK is not set | ||
| 3338 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 3339 | # CONFIG_DMA_API_DEBUG is not set | ||
| 3340 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 3341 | # CONFIG_ASYNC_RAID6_TEST is not set | ||
| 3342 | # CONFIG_SAMPLES is not set | ||
| 3343 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 3344 | # CONFIG_KGDB is not set | ||
| 3345 | # CONFIG_TEST_KSTRTOX is not set | ||
| 3346 | # CONFIG_STRICT_DEVMEM is not set | ||
| 3347 | CONFIG_ARM_UNWIND=y | ||
| 3348 | # CONFIG_DEBUG_USER is not set | ||
| 3349 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 3350 | # CONFIG_DEBUG_LL is not set | ||
| 3351 | # CONFIG_OC_ETM is not set | ||
| 3352 | |||
| 3353 | # | ||
| 3354 | # Security options | ||
| 3355 | # | ||
| 3356 | CONFIG_KEYS=y | ||
| 3357 | # CONFIG_KEYS_DEBUG_PROC_KEYS is not set | ||
| 3358 | # CONFIG_SECURITY_DMESG_RESTRICT is not set | ||
| 3359 | # CONFIG_SECURITY is not set | ||
| 3360 | # CONFIG_SECURITYFS is not set | ||
| 3361 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
| 3362 | CONFIG_DEFAULT_SECURITY="" | ||
| 3363 | CONFIG_XOR_BLOCKS=m | ||
| 3364 | CONFIG_ASYNC_CORE=m | ||
| 3365 | CONFIG_ASYNC_MEMCPY=m | ||
| 3366 | CONFIG_ASYNC_XOR=m | ||
| 3367 | CONFIG_ASYNC_PQ=m | ||
| 3368 | CONFIG_ASYNC_RAID6_RECOV=m | ||
| 3369 | CONFIG_CRYPTO=y | ||
| 3370 | |||
| 3371 | # | ||
| 3372 | # Crypto core or helper | ||
| 3373 | # | ||
| 3374 | CONFIG_CRYPTO_ALGAPI=y | ||
| 3375 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 3376 | CONFIG_CRYPTO_AEAD=m | ||
| 3377 | CONFIG_CRYPTO_AEAD2=y | ||
| 3378 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 3379 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 3380 | CONFIG_CRYPTO_HASH=y | ||
| 3381 | CONFIG_CRYPTO_HASH2=y | ||
| 3382 | CONFIG_CRYPTO_RNG=m | ||
| 3383 | CONFIG_CRYPTO_RNG2=y | ||
| 3384 | CONFIG_CRYPTO_PCOMP2=y | ||
| 3385 | CONFIG_CRYPTO_MANAGER=y | ||
| 3386 | CONFIG_CRYPTO_MANAGER2=y | ||
| 3387 | CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y | ||
| 3388 | CONFIG_CRYPTO_GF128MUL=m | ||
| 3389 | CONFIG_CRYPTO_NULL=m | ||
| 3390 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 3391 | CONFIG_CRYPTO_CRYPTD=m | ||
| 3392 | CONFIG_CRYPTO_AUTHENC=m | ||
| 3393 | CONFIG_CRYPTO_TEST=m | ||
| 3394 | |||
| 3395 | # | ||
| 3396 | # Authenticated Encryption with Associated Data | ||
| 3397 | # | ||
| 3398 | CONFIG_CRYPTO_CCM=m | ||
| 3399 | CONFIG_CRYPTO_GCM=m | ||
| 3400 | CONFIG_CRYPTO_SEQIV=m | ||
| 3401 | |||
| 3402 | # | ||
| 3403 | # Block modes | ||
| 3404 | # | ||
| 3405 | CONFIG_CRYPTO_CBC=y | ||
| 3406 | CONFIG_CRYPTO_CTR=m | ||
| 3407 | CONFIG_CRYPTO_CTS=m | ||
| 3408 | CONFIG_CRYPTO_ECB=y | ||
| 3409 | CONFIG_CRYPTO_LRW=m | ||
| 3410 | CONFIG_CRYPTO_PCBC=m | ||
| 3411 | CONFIG_CRYPTO_XTS=m | ||
| 3412 | |||
| 3413 | # | ||
| 3414 | # Hash modes | ||
| 3415 | # | ||
| 3416 | CONFIG_CRYPTO_HMAC=m | ||
| 3417 | CONFIG_CRYPTO_XCBC=m | ||
| 3418 | # CONFIG_CRYPTO_VMAC is not set | ||
| 3419 | |||
| 3420 | # | ||
| 3421 | # Digest | ||
| 3422 | # | ||
| 3423 | CONFIG_CRYPTO_CRC32C=y | ||
| 3424 | CONFIG_CRYPTO_GHASH=m | ||
| 3425 | CONFIG_CRYPTO_MD4=m | ||
| 3426 | CONFIG_CRYPTO_MD5=y | ||
| 3427 | CONFIG_CRYPTO_MICHAEL_MIC=y | ||
| 3428 | CONFIG_CRYPTO_RMD128=m | ||
| 3429 | CONFIG_CRYPTO_RMD160=m | ||
| 3430 | CONFIG_CRYPTO_RMD256=m | ||
| 3431 | CONFIG_CRYPTO_RMD320=m | ||
| 3432 | CONFIG_CRYPTO_SHA1=m | ||
| 3433 | CONFIG_CRYPTO_SHA256=m | ||
| 3434 | CONFIG_CRYPTO_SHA512=m | ||
| 3435 | CONFIG_CRYPTO_TGR192=m | ||
| 3436 | CONFIG_CRYPTO_WP512=m | ||
| 3437 | |||
| 3438 | # | ||
| 3439 | # Ciphers | ||
| 3440 | # | ||
| 3441 | CONFIG_CRYPTO_AES=y | ||
| 3442 | CONFIG_CRYPTO_ANUBIS=m | ||
| 3443 | CONFIG_CRYPTO_ARC4=y | ||
| 3444 | CONFIG_CRYPTO_BLOWFISH=m | ||
| 3445 | CONFIG_CRYPTO_CAMELLIA=m | ||
| 3446 | CONFIG_CRYPTO_CAST5=m | ||
| 3447 | CONFIG_CRYPTO_CAST6=m | ||
| 3448 | CONFIG_CRYPTO_DES=y | ||
| 3449 | CONFIG_CRYPTO_FCRYPT=m | ||
| 3450 | CONFIG_CRYPTO_KHAZAD=m | ||
| 3451 | CONFIG_CRYPTO_SALSA20=m | ||
| 3452 | CONFIG_CRYPTO_SEED=m | ||
| 3453 | CONFIG_CRYPTO_SERPENT=m | ||
| 3454 | CONFIG_CRYPTO_TEA=m | ||
| 3455 | CONFIG_CRYPTO_TWOFISH=m | ||
| 3456 | CONFIG_CRYPTO_TWOFISH_COMMON=m | ||
| 3457 | |||
| 3458 | # | ||
| 3459 | # Compression | ||
| 3460 | # | ||
| 3461 | CONFIG_CRYPTO_DEFLATE=y | ||
| 3462 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 3463 | CONFIG_CRYPTO_LZO=y | ||
| 3464 | |||
| 3465 | # | ||
| 3466 | # Random Number Generation | ||
| 3467 | # | ||
| 3468 | CONFIG_CRYPTO_ANSI_CPRNG=m | ||
| 3469 | CONFIG_CRYPTO_USER_API=m | ||
| 3470 | CONFIG_CRYPTO_USER_API_HASH=m | ||
| 3471 | CONFIG_CRYPTO_USER_API_SKCIPHER=m | ||
| 3472 | CONFIG_CRYPTO_HW=y | ||
| 3473 | CONFIG_CRYPTO_DEV_OMAP_SHAM=m | ||
| 3474 | CONFIG_CRYPTO_DEV_OMAP_AES=m | ||
| 3475 | # CONFIG_BINARY_PRINTF is not set | ||
| 3476 | |||
| 3477 | # | ||
| 3478 | # Library routines | ||
| 3479 | # | ||
| 3480 | CONFIG_RAID6_PQ=m | ||
| 3481 | CONFIG_BITREVERSE=y | ||
| 3482 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
| 3483 | CONFIG_CRC_CCITT=y | ||
| 3484 | CONFIG_CRC16=y | ||
| 3485 | CONFIG_CRC_T10DIF=y | ||
| 3486 | CONFIG_CRC_ITU_T=y | ||
| 3487 | CONFIG_CRC32=y | ||
| 3488 | CONFIG_CRC7=y | ||
| 3489 | CONFIG_LIBCRC32C=y | ||
| 3490 | CONFIG_ZLIB_INFLATE=y | ||
| 3491 | CONFIG_ZLIB_DEFLATE=y | ||
| 3492 | CONFIG_LZO_COMPRESS=y | ||
| 3493 | CONFIG_LZO_DECOMPRESS=y | ||
| 3494 | CONFIG_XZ_DEC=y | ||
| 3495 | CONFIG_XZ_DEC_X86=y | ||
| 3496 | CONFIG_XZ_DEC_POWERPC=y | ||
| 3497 | CONFIG_XZ_DEC_IA64=y | ||
| 3498 | CONFIG_XZ_DEC_ARM=y | ||
| 3499 | CONFIG_XZ_DEC_ARMTHUMB=y | ||
| 3500 | CONFIG_XZ_DEC_SPARC=y | ||
| 3501 | CONFIG_XZ_DEC_BCJ=y | ||
| 3502 | CONFIG_XZ_DEC_TEST=m | ||
| 3503 | CONFIG_DECOMPRESS_GZIP=y | ||
| 3504 | CONFIG_DECOMPRESS_BZIP2=y | ||
| 3505 | CONFIG_DECOMPRESS_LZMA=y | ||
| 3506 | CONFIG_DECOMPRESS_XZ=y | ||
| 3507 | CONFIG_DECOMPRESS_LZO=y | ||
| 3508 | CONFIG_TEXTSEARCH=y | ||
| 3509 | CONFIG_TEXTSEARCH_KMP=m | ||
| 3510 | CONFIG_TEXTSEARCH_BM=m | ||
| 3511 | CONFIG_TEXTSEARCH_FSM=m | ||
| 3512 | CONFIG_BTREE=y | ||
| 3513 | CONFIG_HAS_IOMEM=y | ||
| 3514 | CONFIG_HAS_IOPORT=y | ||
| 3515 | CONFIG_HAS_DMA=y | ||
| 3516 | CONFIG_NLATTR=y | ||
| 3517 | CONFIG_AVERAGE=y | ||
diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/fixes/vout.patch b/recipes-kernel/linux/linux-3.0+3.1rc/fixes/vout.patch deleted file mode 100644 index 5a145401..00000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/fixes/vout.patch +++ /dev/null | |||
| @@ -1,79 +0,0 @@ | |||
| 1 | Delivered-To: koen@dominion.thruhere.net | ||
| 2 | Received: by 10.236.157.72 with SMTP id n48cs4581yhk; | ||
| 3 | Fri, 5 Aug 2011 00:10:45 -0700 (PDT) | ||
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| 5 | Fri, 05 Aug 2011 00:10:45 -0700 (PDT) | ||
| 6 | Return-Path: <archit@ti.com> | ||
| 7 | Received: from bear.ext.ti.com (bear.ext.ti.com [192.94.94.41]) | ||
| 8 | by mx.google.com with ESMTPS id x20si3422127ani.205.2011.08.05.00.10.45 | ||
| 9 | (version=TLSv1/SSLv3 cipher=OTHER); | ||
| 10 | Fri, 05 Aug 2011 00:10:45 -0700 (PDT) | ||
| 11 | Received-SPF: pass (google.com: domain of archit@ti.com designates 192.94.94.41 as permitted sender) client-ip=192.94.94.41; | ||
| 12 | Authentication-Results: mx.google.com; spf=pass (google.com: domain of archit@ti.com designates 192.94.94.41 as permitted sender) smtp.mail=archit@ti.com | ||
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| 14 | by bear.ext.ti.com (8.13.7/8.13.7) with ESMTP id p757AiHb023389 | ||
| 15 | (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); | ||
| 16 | Fri, 5 Aug 2011 02:10:44 -0500 | ||
| 17 | Received: from dlep26.itg.ti.com (smtp-le.itg.ti.com [157.170.170.27]) | ||
| 18 | by dlep33.itg.ti.com (8.13.7/8.13.8) with ESMTP id p757AiWp004418; | ||
| 19 | Fri, 5 Aug 2011 02:10:44 -0500 (CDT) | ||
| 20 | Received: from dlee73.ent.ti.com (localhost [127.0.0.1]) | ||
| 21 | by dlep26.itg.ti.com (8.13.8/8.13.8) with ESMTP id p757AiBJ012377; | ||
| 22 | Fri, 5 Aug 2011 02:10:44 -0500 (CDT) | ||
| 23 | Received: from dlelxv23.itg.ti.com (172.17.1.198) by DLEE73.ent.ti.com | ||
| 24 | (157.170.170.88) with Microsoft SMTP Server id 8.3.106.1; Fri, 5 Aug 2011 | ||
| 25 | 02:10:44 -0500 | ||
| 26 | Received: from legion.dal.design.ti.com (legion.dal.design.ti.com | ||
| 27 | [128.247.22.53]) by dlelxv23.itg.ti.com (8.13.8/8.13.8) with ESMTP id | ||
| 28 | p757Ai9V018852; Fri, 5 Aug 2011 02:10:44 -0500 | ||
| 29 | Received: from localhost (a0393947pc.apr.dhcp.ti.com [172.24.137.144]) by | ||
| 30 | legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id p757Aef10060; | ||
| 31 | Fri, 5 Aug 2011 02:10:41 -0500 (CDT) | ||
| 32 | From: Archit Taneja <archit@ti.com> | ||
| 33 | To: <hvaibhav@ti.com>, <linux-media@vger.kernel.org> | ||
| 34 | CC: <koen@dominion.thruhere.net>, <tomi.valkeinen@ti.com>, | ||
| 35 | <linux-omap@vger.kernel.org>, Archit Taneja <archit@ti.com> | ||
| 36 | Subject: [PATCH] [media] OMAP_VOUT: Fix build break caused by update_mode removal in DSS2 | ||
| 37 | Date: Fri, 5 Aug 2011 12:49:21 +0530 | ||
| 38 | Message-ID: <1312528761-18241-1-git-send-email-archit@ti.com> | ||
| 39 | X-Mailer: git-send-email 1.7.1 | ||
| 40 | MIME-Version: 1.0 | ||
| 41 | Content-Type: text/plain | ||
| 42 | |||
| 43 | The DSS2 driver does not support the configuration of the update_mode of a | ||
| 44 | panel anymore. Remove the setting of update_mode done in omap_vout_probe(). | ||
| 45 | Ignore configuration of TE since omap_vout driver doesn't support manual update | ||
| 46 | displays anyway. | ||
| 47 | |||
| 48 | Signed-off-by: Archit Taneja <archit@ti.com> | ||
| 49 | --- | ||
| 50 | drivers/media/video/omap/omap_vout.c | 13 ------------- | ||
| 51 | 1 files changed, 0 insertions(+), 13 deletions(-) | ||
| 52 | |||
| 53 | diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c | ||
| 54 | index b5ef362..b3a5ecd 100644 | ||
| 55 | --- a/drivers/media/video/omap/omap_vout.c | ||
| 56 | +++ b/drivers/media/video/omap/omap_vout.c | ||
| 57 | @@ -2194,19 +2194,6 @@ static int __init omap_vout_probe(struct platform_device *pdev) | ||
| 58 | "'%s' Display already enabled\n", | ||
| 59 | def_display->name); | ||
| 60 | } | ||
| 61 | - /* set the update mode */ | ||
| 62 | - if (def_display->caps & | ||
| 63 | - OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) { | ||
| 64 | - if (dssdrv->enable_te) | ||
| 65 | - dssdrv->enable_te(def_display, 0); | ||
| 66 | - if (dssdrv->set_update_mode) | ||
| 67 | - dssdrv->set_update_mode(def_display, | ||
| 68 | - OMAP_DSS_UPDATE_MANUAL); | ||
| 69 | - } else { | ||
| 70 | - if (dssdrv->set_update_mode) | ||
| 71 | - dssdrv->set_update_mode(def_display, | ||
| 72 | - OMAP_DSS_UPDATE_AUTO); | ||
| 73 | - } | ||
| 74 | } | ||
| 75 | } | ||
| 76 | |||
| 77 | -- | ||
| 78 | 1.7.1 | ||
| 79 | |||
diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch b/recipes-kernel/linux/linux-3.0+3.1rc/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch deleted file mode 100644 index 38e96e35..00000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch +++ /dev/null | |||
| @@ -1,46 +0,0 @@ | |||
| 1 | From 428afa6e7a96419f6f17158a9ac38ab24d664997 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Keerthy <j-keerthy@ti.com> | ||
| 3 | Date: Wed, 4 May 2011 01:14:50 +0530 | ||
| 4 | Subject: [PATCH 1/2] Enabling Hwmon driver for twl4030-madc | ||
| 5 | |||
| 6 | Signed-off-by: Keerthy <j-keerthy@ti.com> | ||
| 7 | --- | ||
| 8 | drivers/mfd/twl-core.c | 15 +++++++++++++++ | ||
| 9 | 1 files changed, 15 insertions(+), 0 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c | ||
| 12 | index a2eddc7..81fcf18 100644 | ||
| 13 | --- a/drivers/mfd/twl-core.c | ||
| 14 | +++ b/drivers/mfd/twl-core.c | ||
| 15 | @@ -83,6 +83,13 @@ | ||
| 16 | #define twl_has_madc() false | ||
| 17 | #endif | ||
| 18 | |||
| 19 | +#if defined(CONFIG_SENSORS_TWL4030_MADC) ||\ | ||
| 20 | + defined(CONFIG_SENSORS_TWL4030_MADC_MODULE) | ||
| 21 | +#define twl_has_madc_hwmon() true | ||
| 22 | +#else | ||
| 23 | +#define twl_has_madc_hwmon() false | ||
| 24 | +#endif | ||
| 25 | + | ||
| 26 | #ifdef CONFIG_TWL4030_POWER | ||
| 27 | #define twl_has_power() true | ||
| 28 | #else | ||
| 29 | @@ -669,6 +676,14 @@ add_children(struct twl4030_platform_data *pdata, unsigned long features) | ||
| 30 | return PTR_ERR(child); | ||
| 31 | } | ||
| 32 | |||
| 33 | +if (twl_has_madc_hwmon()) { | ||
| 34 | + child = add_child(2, "twl4030_madc_hwmon", | ||
| 35 | + NULL, 0, | ||
| 36 | + true, pdata->irq_base + MADC_INTR_OFFSET, 0); | ||
| 37 | + if (IS_ERR(child)) | ||
| 38 | + return PTR_ERR(child); | ||
| 39 | + } | ||
| 40 | + | ||
| 41 | if (twl_has_rtc()) { | ||
| 42 | /* | ||
| 43 | * REVISIT platform_data here currently might expose the | ||
| 44 | -- | ||
| 45 | 1.6.6.1 | ||
| 46 | |||
diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/madc/0002-mfd-twl-core-enable-madc-clock.patch b/recipes-kernel/linux/linux-3.0+3.1rc/madc/0002-mfd-twl-core-enable-madc-clock.patch deleted file mode 100644 index 7dc8e543..00000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/madc/0002-mfd-twl-core-enable-madc-clock.patch +++ /dev/null | |||
| @@ -1,54 +0,0 @@ | |||
| 1 | From fbfdf09f148219d48ee35e830923ca75bbd0b91b Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Sat, 23 Jan 2010 06:26:54 -0800 | ||
| 4 | Subject: [PATCH 2/2] mfd: twl-core: enable madc clock | ||
| 5 | |||
| 6 | Now that the madc driver has been merged it is also necessary to enable the clock to the madc block | ||
| 7 | |||
| 8 | Signed-off-by: Steve Sakoman <steve@sakoman.com> | ||
| 9 | --- | ||
| 10 | drivers/mfd/twl-core.c | 8 ++++++++ | ||
| 11 | include/linux/i2c/twl.h | 1 + | ||
| 12 | 2 files changed, 9 insertions(+), 0 deletions(-) | ||
| 13 | |||
| 14 | diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c | ||
| 15 | index 81fcf18..08aa64f 100644 | ||
| 16 | --- a/drivers/mfd/twl-core.c | ||
| 17 | +++ b/drivers/mfd/twl-core.c | ||
| 18 | @@ -217,6 +217,11 @@ | ||
| 19 | |||
| 20 | /* Few power values */ | ||
| 21 | #define R_CFG_BOOT 0x05 | ||
| 22 | +#define R_GPBR1 0x0C | ||
| 23 | + | ||
| 24 | +/* MADC clock values for R_GPBR1 */ | ||
| 25 | +#define MADC_HFCLK_EN 0x80 | ||
| 26 | +#define DEFAULT_MADC_CLK_EN 0x10 | ||
| 27 | |||
| 28 | /* some fields in R_CFG_BOOT */ | ||
| 29 | #define HFCLK_FREQ_19p2_MHZ (1 << 0) | ||
| 30 | @@ -1151,6 +1156,9 @@ static void clocks_init(struct device *dev, | ||
| 31 | |||
| 32 | e |= unprotect_pm_master(); | ||
| 33 | /* effect->MADC+USB ck en */ | ||
| 34 | + if (twl_has_madc()) | ||
| 35 | + e |= twl_i2c_write_u8(TWL_MODULE_INTBR, | ||
| 36 | + MADC_HFCLK_EN | DEFAULT_MADC_CLK_EN, R_GPBR1); | ||
| 37 | e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT); | ||
| 38 | e |= protect_pm_master(); | ||
| 39 | |||
| 40 | diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h | ||
| 41 | index 114c0f6..f060751 100644 | ||
| 42 | --- a/include/linux/i2c/twl.h | ||
| 43 | +++ b/include/linux/i2c/twl.h | ||
| 44 | @@ -74,6 +74,7 @@ | ||
| 45 | |||
| 46 | #define TWL_MODULE_USB TWL4030_MODULE_USB | ||
| 47 | #define TWL_MODULE_AUDIO_VOICE TWL4030_MODULE_AUDIO_VOICE | ||
| 48 | +#define TWL_MODULE_INTBR TWL4030_MODULE_INTBR | ||
| 49 | #define TWL_MODULE_PIH TWL4030_MODULE_PIH | ||
| 50 | #define TWL_MODULE_MADC TWL4030_MODULE_MADC | ||
| 51 | #define TWL_MODULE_MAIN_CHARGE TWL4030_MODULE_MAIN_CHARGE | ||
| 52 | -- | ||
| 53 | 1.6.6.1 | ||
| 54 | |||
diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/patch.sh b/recipes-kernel/linux/linux-3.0+3.1rc/patch.sh deleted file mode 100644 index 50f146ed..00000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/patch.sh +++ /dev/null | |||
| @@ -1,27 +0,0 @@ | |||
| 1 | #!/bin/bash | ||
| 2 | # (c) 2009 - 2011 Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | # This script will take a set of directories with patches and make a git tree out of it | ||
| 4 | # After all the patches are applied it will output a SRC_URI fragment you can copy/paste into a recipe | ||
| 5 | |||
| 6 | TAG="mainline/master" | ||
| 7 | EXTRATAG="-3.1" | ||
| 8 | |||
| 9 | git fetch mainline | ||
| 10 | git am --abort | ||
| 11 | git reset --hard ${TAG} | ||
| 12 | rm export -rf | ||
| 13 | |||
| 14 | previous=${TAG} | ||
| 15 | PATCHSET="beagle madc sgx" | ||
| 16 | |||
| 17 | # apply patches | ||
| 18 | for patchset in ${PATCHSET} ; do | ||
| 19 | git am $patchset/* && git tag "${patchset}${EXTRATAG}" -f | ||
| 20 | done | ||
| 21 | |||
| 22 | # export patches and output SRC_URI for them | ||
| 23 | for patchset in ${PATCHSET} ; do | ||
| 24 | mkdir export/$patchset -p | ||
| 25 | ( cd export/$patchset && git format-patch ${previous}..${patchset}${EXTRATAG} >& /dev/null && for i in *.patch ; do echo " file://${patchset}/$i \\" ; done ) | ||
| 26 | previous=${patchset}${EXTRATAG} | ||
| 27 | done | ||
diff --git a/recipes-kernel/linux/linux-3.0+3.1rc/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch b/recipes-kernel/linux/linux-3.0+3.1rc/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch deleted file mode 100644 index 5d452292..00000000 --- a/recipes-kernel/linux/linux-3.0+3.1rc/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch +++ /dev/null | |||
| @@ -1,67 +0,0 @@ | |||
| 1 | From 927d1d96b5c4d3439a301b73804ade67b8cdd81a Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Vikram Pandita <vikram.pandita@ti.com> | ||
| 3 | Date: Tue, 31 May 2011 09:24:58 +0100 | ||
| 4 | Subject: [PATCH] ARM: L2: Add and export outer_clean_all | ||
| 5 | |||
| 6 | The Errata 588369 and 539766 demands that clean all operation be done | ||
| 7 | as clean each way at a time | ||
| 8 | |||
| 9 | This patch also raps the implementation under the CONFIG errata | ||
| 10 | macro so that for non-errata version silicon it can be disabled | ||
| 11 | |||
| 12 | Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> | ||
| 13 | Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 14 | Cc: Woodruff, Richard <r-woodruff2@ti.com> | ||
| 15 | --- | ||
| 16 | arch/arm/include/asm/outercache.h | 8 ++++++++ | ||
| 17 | arch/arm/mm/cache-l2x0.c | 1 + | ||
| 18 | 2 files changed, 9 insertions(+), 0 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h | ||
| 21 | index d838743..fa8cbd8 100644 | ||
| 22 | --- a/arch/arm/include/asm/outercache.h | ||
| 23 | +++ b/arch/arm/include/asm/outercache.h | ||
| 24 | @@ -28,6 +28,7 @@ struct outer_cache_fns { | ||
| 25 | void (*clean_range)(unsigned long, unsigned long); | ||
| 26 | void (*flush_range)(unsigned long, unsigned long); | ||
| 27 | void (*flush_all)(void); | ||
| 28 | + void (*clean_all)(void); | ||
| 29 | void (*inv_all)(void); | ||
| 30 | void (*disable)(void); | ||
| 31 | #ifdef CONFIG_OUTER_CACHE_SYNC | ||
| 32 | @@ -61,6 +62,11 @@ static inline void outer_flush_all(void) | ||
| 33 | if (outer_cache.flush_all) | ||
| 34 | outer_cache.flush_all(); | ||
| 35 | } | ||
| 36 | +static inline void outer_clean_all(void) | ||
| 37 | +{ | ||
| 38 | + if (outer_cache.clean_all) | ||
| 39 | + outer_cache.clean_all(); | ||
| 40 | +} | ||
| 41 | |||
| 42 | static inline void outer_inv_all(void) | ||
| 43 | { | ||
| 44 | @@ -97,6 +103,8 @@ static inline void outer_sync(void) | ||
| 45 | #else | ||
| 46 | static inline void outer_sync(void) | ||
| 47 | { } | ||
| 48 | +static inline void outer_clean_all(void) | ||
| 49 | +{ } | ||
| 50 | #endif | ||
| 51 | |||
| 52 | #endif /* __ASM_OUTERCACHE_H */ | ||
| 53 | diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c | ||
| 54 | index 44c0867..10b79d6 100644 | ||
| 55 | --- a/arch/arm/mm/cache-l2x0.c | ||
| 56 | +++ b/arch/arm/mm/cache-l2x0.c | ||
| 57 | @@ -346,6 +346,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | ||
| 58 | outer_cache.inv_all = l2x0_inv_all; | ||
| 59 | outer_cache.disable = l2x0_disable; | ||
| 60 | outer_cache.set_debug = l2x0_set_debug; | ||
| 61 | + outer_cache.clean_all = l2x0_clean_all; | ||
| 62 | |||
| 63 | printk(KERN_INFO "%s cache controller enabled\n", type); | ||
| 64 | printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n", | ||
| 65 | -- | ||
| 66 | 1.6.6.1 | ||
| 67 | |||
diff --git a/recipes-kernel/linux/linux-3.0/beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch b/recipes-kernel/linux/linux-3.0/beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch deleted file mode 100644 index d87aee16..00000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch +++ /dev/null | |||
| @@ -1,196 +0,0 @@ | |||
| 1 | From ba3e97075ad35eeaf35191c4e5c2b90de5d96209 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Fernandes, Joel A <joelagnel@ti.com> | ||
| 3 | Date: Tue, 7 Jun 2011 15:54:45 -0500 | ||
| 4 | Subject: [PATCH 01/10] OMAP3: beagle: add support for beagleboard xM revision C | ||
| 5 | |||
| 6 | OMAP3: beagle: add support for beagleboard xM revision C | ||
| 7 | |||
| 8 | The USB enable GPIO has been in beagleboard xM revision C. | ||
| 9 | The USER button has been moved since beagleboard xM. | ||
| 10 | Also, board specific initialization has been moved to beagle_config struct | ||
| 11 | and initialized in omap3_beagle_init_rev. Default values in struct are for xMC. | ||
| 12 | |||
| 13 | Signed-off-by: Joel A Fernandes <joelagnel@ti.com> | ||
| 14 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 15 | --- | ||
| 16 | arch/arm/mach-omap2/board-omap3beagle.c | 78 ++++++++++++++++++++----------- | ||
| 17 | 1 files changed, 51 insertions(+), 27 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 20 | index 34f8411..32f5f89 100644 | ||
| 21 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 22 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 23 | @@ -60,7 +60,8 @@ | ||
| 24 | * AXBX = GPIO173, GPIO172, GPIO171: 1 1 1 | ||
| 25 | * C1_3 = GPIO173, GPIO172, GPIO171: 1 1 0 | ||
| 26 | * C4 = GPIO173, GPIO172, GPIO171: 1 0 1 | ||
| 27 | - * XM = GPIO173, GPIO172, GPIO171: 0 0 0 | ||
| 28 | + * XMA/XMB = GPIO173, GPIO172, GPIO171: 0 0 0 | ||
| 29 | + * XMC = GPIO173, GPIO172, GPIO171: 0 1 0 | ||
| 30 | */ | ||
| 31 | enum { | ||
| 32 | OMAP3BEAGLE_BOARD_UNKN = 0, | ||
| 33 | @@ -68,14 +69,26 @@ enum { | ||
| 34 | OMAP3BEAGLE_BOARD_C1_3, | ||
| 35 | OMAP3BEAGLE_BOARD_C4, | ||
| 36 | OMAP3BEAGLE_BOARD_XM, | ||
| 37 | + OMAP3BEAGLE_BOARD_XMC, | ||
| 38 | }; | ||
| 39 | |||
| 40 | static u8 omap3_beagle_version; | ||
| 41 | |||
| 42 | -static u8 omap3_beagle_get_rev(void) | ||
| 43 | -{ | ||
| 44 | - return omap3_beagle_version; | ||
| 45 | -} | ||
| 46 | +/* | ||
| 47 | + * Board-specific configuration | ||
| 48 | + * Defaults to BeagleBoard-xMC | ||
| 49 | + */ | ||
| 50 | +static struct { | ||
| 51 | + int mmc1_gpio_wp; | ||
| 52 | + int usb_pwr_level; | ||
| 53 | + int reset_gpio; | ||
| 54 | + int usr_button_gpio; | ||
| 55 | +} beagle_config = { | ||
| 56 | + .mmc1_gpio_wp = -EINVAL, | ||
| 57 | + .usb_pwr_level = GPIOF_OUT_INIT_LOW, | ||
| 58 | + .reset_gpio = 129, | ||
| 59 | + .usr_button_gpio = 4, | ||
| 60 | +}; | ||
| 61 | |||
| 62 | static struct gpio omap3_beagle_rev_gpios[] __initdata = { | ||
| 63 | { 171, GPIOF_IN, "rev_id_0" }, | ||
| 64 | @@ -110,18 +123,32 @@ static void __init omap3_beagle_init_rev(void) | ||
| 65 | case 7: | ||
| 66 | printk(KERN_INFO "OMAP3 Beagle Rev: Ax/Bx\n"); | ||
| 67 | omap3_beagle_version = OMAP3BEAGLE_BOARD_AXBX; | ||
| 68 | + beagle_config.mmc1_gpio_wp = 29; | ||
| 69 | + beagle_config.reset_gpio = 170; | ||
| 70 | + beagle_config.usr_button_gpio = 7; | ||
| 71 | break; | ||
| 72 | case 6: | ||
| 73 | printk(KERN_INFO "OMAP3 Beagle Rev: C1/C2/C3\n"); | ||
| 74 | omap3_beagle_version = OMAP3BEAGLE_BOARD_C1_3; | ||
| 75 | + beagle_config.mmc1_gpio_wp = 23; | ||
| 76 | + beagle_config.reset_gpio = 170; | ||
| 77 | + beagle_config.usr_button_gpio = 7; | ||
| 78 | break; | ||
| 79 | case 5: | ||
| 80 | printk(KERN_INFO "OMAP3 Beagle Rev: C4\n"); | ||
| 81 | omap3_beagle_version = OMAP3BEAGLE_BOARD_C4; | ||
| 82 | + beagle_config.mmc1_gpio_wp = 23; | ||
| 83 | + beagle_config.reset_gpio = 170; | ||
| 84 | + beagle_config.usr_button_gpio = 7; | ||
| 85 | break; | ||
| 86 | case 0: | ||
| 87 | - printk(KERN_INFO "OMAP3 Beagle Rev: xM\n"); | ||
| 88 | + printk(KERN_INFO "OMAP3 Beagle Rev: xM Ax/Bx\n"); | ||
| 89 | omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; | ||
| 90 | + beagle_config.usb_pwr_level = GPIOF_OUT_INIT_HIGH; | ||
| 91 | + break; | ||
| 92 | + case 2: | ||
| 93 | + printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n"); | ||
| 94 | + omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC; | ||
| 95 | break; | ||
| 96 | default: | ||
| 97 | printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev); | ||
| 98 | @@ -225,7 +252,7 @@ static struct omap2_hsmmc_info mmc[] = { | ||
| 99 | { | ||
| 100 | .mmc = 1, | ||
| 101 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | ||
| 102 | - .gpio_wp = 29, | ||
| 103 | + .gpio_wp = -EINVAL, | ||
| 104 | }, | ||
| 105 | {} /* Terminator */ | ||
| 106 | }; | ||
| 107 | @@ -243,17 +270,11 @@ static struct gpio_led gpio_leds[]; | ||
| 108 | static int beagle_twl_gpio_setup(struct device *dev, | ||
| 109 | unsigned gpio, unsigned ngpio) | ||
| 110 | { | ||
| 111 | - int r, usb_pwr_level; | ||
| 112 | - | ||
| 113 | - if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { | ||
| 114 | - mmc[0].gpio_wp = -EINVAL; | ||
| 115 | - } else if ((omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C1_3) || | ||
| 116 | - (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_C4)) { | ||
| 117 | - omap_mux_init_gpio(23, OMAP_PIN_INPUT); | ||
| 118 | - mmc[0].gpio_wp = 23; | ||
| 119 | - } else { | ||
| 120 | - omap_mux_init_gpio(29, OMAP_PIN_INPUT); | ||
| 121 | - } | ||
| 122 | + int r; | ||
| 123 | + | ||
| 124 | + if (beagle_config.mmc1_gpio_wp != -EINVAL) | ||
| 125 | + omap_mux_init_gpio(beagle_config.mmc1_gpio_wp, OMAP_PIN_INPUT); | ||
| 126 | + mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; | ||
| 127 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | ||
| 128 | mmc[0].gpio_cd = gpio + 0; | ||
| 129 | omap2_hsmmc_init(mmc); | ||
| 130 | @@ -263,9 +284,8 @@ static int beagle_twl_gpio_setup(struct device *dev, | ||
| 131 | * high / others active low) | ||
| 132 | * DVI reset GPIO is different between beagle revisions | ||
| 133 | */ | ||
| 134 | - if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { | ||
| 135 | - usb_pwr_level = GPIOF_OUT_INIT_HIGH; | ||
| 136 | - beagle_dvi_device.reset_gpio = 129; | ||
| 137 | + /* Valid for all -xM revisions */ | ||
| 138 | + if (cpu_is_omap3630()) { | ||
| 139 | /* | ||
| 140 | * gpio + 1 on Xm controls the TFP410's enable line (active low) | ||
| 141 | * gpio + 2 control varies depending on the board rev as below: | ||
| 142 | @@ -283,8 +303,6 @@ static int beagle_twl_gpio_setup(struct device *dev, | ||
| 143 | pr_err("%s: unable to configure DVI_LDO_EN\n", | ||
| 144 | __func__); | ||
| 145 | } else { | ||
| 146 | - usb_pwr_level = GPIOF_OUT_INIT_LOW; | ||
| 147 | - beagle_dvi_device.reset_gpio = 170; | ||
| 148 | /* | ||
| 149 | * REVISIT: need ehci-omap hooks for external VBUS | ||
| 150 | * power switch and overcurrent detect | ||
| 151 | @@ -292,8 +310,10 @@ static int beagle_twl_gpio_setup(struct device *dev, | ||
| 152 | if (gpio_request_one(gpio + 1, GPIOF_IN, "EHCI_nOC")) | ||
| 153 | pr_err("%s: unable to configure EHCI_nOC\n", __func__); | ||
| 154 | } | ||
| 155 | + beagle_dvi_device.reset_gpio = beagle_config.reset_gpio; | ||
| 156 | |||
| 157 | - gpio_request_one(gpio + TWL4030_GPIO_MAX, usb_pwr_level, "nEN_USB_PWR"); | ||
| 158 | + gpio_request_one(gpio + TWL4030_GPIO_MAX, beagle_config.usb_pwr_level, | ||
| 159 | + "nEN_USB_PWR"); | ||
| 160 | |||
| 161 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ | ||
| 162 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | ||
| 163 | @@ -404,7 +424,8 @@ static struct platform_device leds_gpio = { | ||
| 164 | static struct gpio_keys_button gpio_buttons[] = { | ||
| 165 | { | ||
| 166 | .code = BTN_EXTRA, | ||
| 167 | - .gpio = 7, | ||
| 168 | + /* Dynamically assigned depending on board */ | ||
| 169 | + .gpio = -EINVAL, | ||
| 170 | .desc = "user", | ||
| 171 | .wakeup = 1, | ||
| 172 | }, | ||
| 173 | @@ -468,8 +489,8 @@ static void __init beagle_opp_init(void) | ||
| 174 | return; | ||
| 175 | } | ||
| 176 | |||
| 177 | - /* Custom OPP enabled for XM */ | ||
| 178 | - if (omap3_beagle_get_rev() == OMAP3BEAGLE_BOARD_XM) { | ||
| 179 | + /* Custom OPP enabled for all xM versions */ | ||
| 180 | + if (cpu_is_omap3630()) { | ||
| 181 | struct omap_hwmod *mh = omap_hwmod_lookup("mpu"); | ||
| 182 | struct omap_hwmod *dh = omap_hwmod_lookup("iva"); | ||
| 183 | struct device *dev; | ||
| 184 | @@ -509,6 +530,9 @@ static void __init omap3_beagle_init(void) | ||
| 185 | omap3_mux_init(board_mux, OMAP_PACKAGE_CBB); | ||
| 186 | omap3_beagle_init_rev(); | ||
| 187 | omap3_beagle_i2c_init(); | ||
| 188 | + | ||
| 189 | + gpio_buttons[0].gpio = beagle_config.usr_button_gpio; | ||
| 190 | + | ||
| 191 | platform_add_devices(omap3_beagle_devices, | ||
| 192 | ARRAY_SIZE(omap3_beagle_devices)); | ||
| 193 | omap_display_init(&beagle_dss_data); | ||
| 194 | -- | ||
| 195 | 1.7.2.5 | ||
| 196 | |||
diff --git a/recipes-kernel/linux/linux-3.0/beagle/0002-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch b/recipes-kernel/linux/linux-3.0/beagle/0002-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch deleted file mode 100644 index 321aeae0..00000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0002-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch +++ /dev/null | |||
| @@ -1,340 +0,0 @@ | |||
| 1 | From 73366785ad8400aa22ffc0822ecc701349477de9 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | Date: Thu, 21 Jul 2011 14:29:42 +0200 | ||
| 4 | Subject: [PATCH 02/10] UNFINISHED: OMAP3: beagle: add support for expansionboards | ||
| 5 | |||
| 6 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 7 | --- | ||
| 8 | arch/arm/mach-omap2/board-omap3beagle.c | 266 +++++++++++++++++++++++++++++++ | ||
| 9 | 1 files changed, 266 insertions(+), 0 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 12 | index 32f5f89..f26a9a8 100644 | ||
| 13 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 14 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 15 | @@ -21,6 +21,7 @@ | ||
| 16 | #include <linux/io.h> | ||
| 17 | #include <linux/leds.h> | ||
| 18 | #include <linux/gpio.h> | ||
| 19 | +#include <linux/irq.h> | ||
| 20 | #include <linux/input.h> | ||
| 21 | #include <linux/gpio_keys.h> | ||
| 22 | #include <linux/opp.h> | ||
| 23 | @@ -156,6 +157,167 @@ static void __init omap3_beagle_init_rev(void) | ||
| 24 | } | ||
| 25 | } | ||
| 26 | |||
| 27 | +char expansionboard_name[16]; | ||
| 28 | + | ||
| 29 | +#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) | ||
| 30 | +#include <linux/regulator/fixed.h> | ||
| 31 | +#include <linux/wl12xx.h> | ||
| 32 | + | ||
| 33 | +#define OMAP_BEAGLE_WLAN_EN_GPIO (139) | ||
| 34 | +#define OMAP_BEAGLE_BT_EN_GPIO (138) | ||
| 35 | +#define OMAP_BEAGLE_WLAN_IRQ_GPIO (137) | ||
| 36 | +#define OMAP_BEAGLE_FM_EN_BT_WU (136) | ||
| 37 | + | ||
| 38 | +struct wl12xx_platform_data omap_beagle_wlan_data __initdata = { | ||
| 39 | + .irq = OMAP_GPIO_IRQ(OMAP_BEAGLE_WLAN_IRQ_GPIO), | ||
| 40 | + .board_ref_clock = 2, /* 38.4 MHz */ | ||
| 41 | +}; | ||
| 42 | + | ||
| 43 | +static int gpios[] = {OMAP_BEAGLE_BT_EN_GPIO, OMAP_BEAGLE_FM_EN_BT_WU, -1}; | ||
| 44 | +static struct platform_device wl12xx_device = { | ||
| 45 | + .name = "kim", | ||
| 46 | + .id = -1, | ||
| 47 | + .dev.platform_data = &gpios, | ||
| 48 | +}; | ||
| 49 | + | ||
| 50 | +static struct omap2_hsmmc_info mmcbbt[] = { | ||
| 51 | + { | ||
| 52 | + .mmc = 1, | ||
| 53 | + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | ||
| 54 | + .gpio_wp = 29, | ||
| 55 | + }, | ||
| 56 | + { | ||
| 57 | + .name = "wl1271", | ||
| 58 | + .mmc = 2, | ||
| 59 | + .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_POWER_OFF_CARD, | ||
| 60 | + .gpio_wp = -EINVAL, | ||
| 61 | + .gpio_cd = -EINVAL, | ||
| 62 | + .ocr_mask = MMC_VDD_165_195, | ||
| 63 | + .nonremovable = true, | ||
| 64 | + }, | ||
| 65 | + {} /* Terminator */ | ||
| 66 | + }; | ||
| 67 | + | ||
| 68 | +static struct regulator_consumer_supply beagle_vmmc2_supply = | ||
| 69 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); | ||
| 70 | + | ||
| 71 | +static struct regulator_init_data beagle_vmmc2 = { | ||
| 72 | + .constraints = { | ||
| 73 | + .min_uV = 1850000, | ||
| 74 | + .max_uV = 1850000, | ||
| 75 | + .apply_uV = true, | ||
| 76 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 77 | + | REGULATOR_MODE_STANDBY, | ||
| 78 | + .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 79 | + | REGULATOR_CHANGE_STATUS, | ||
| 80 | + }, | ||
| 81 | + .num_consumer_supplies = 1, | ||
| 82 | + .consumer_supplies = &beagle_vmmc2_supply, | ||
| 83 | +}; | ||
| 84 | + | ||
| 85 | +static struct fixed_voltage_config beagle_vwlan = { | ||
| 86 | + .supply_name = "vwl1271", | ||
| 87 | + .microvolts = 1800000, /* 1.8V */ | ||
| 88 | + .gpio = OMAP_BEAGLE_WLAN_EN_GPIO, | ||
| 89 | + .startup_delay = 70000, /* 70ms */ | ||
| 90 | + .enable_high = 1, | ||
| 91 | + .enabled_at_boot = 0, | ||
| 92 | + .init_data = &beagle_vmmc2, | ||
| 93 | +}; | ||
| 94 | + | ||
| 95 | +static struct platform_device omap_vwlan_device = { | ||
| 96 | + .name = "reg-fixed-voltage", | ||
| 97 | + .id = 1, | ||
| 98 | + .dev = { | ||
| 99 | + .platform_data = &beagle_vwlan, | ||
| 100 | + }, | ||
| 101 | +}; | ||
| 102 | +#endif | ||
| 103 | + | ||
| 104 | +#if defined(CONFIG_ENC28J60) || defined(CONFIG_ENC28J60_MODULE) | ||
| 105 | + | ||
| 106 | +#include <plat/mcspi.h> | ||
| 107 | +#include <linux/spi/spi.h> | ||
| 108 | + | ||
| 109 | +#define OMAP3BEAGLE_GPIO_ENC28J60_IRQ 157 | ||
| 110 | + | ||
| 111 | +static struct omap2_mcspi_device_config enc28j60_spi_chip_info = { | ||
| 112 | + .turbo_mode = 0, | ||
| 113 | + .single_channel = 1, /* 0: slave, 1: master */ | ||
| 114 | +}; | ||
| 115 | + | ||
| 116 | +static struct spi_board_info omap3beagle_zippy_spi_board_info[] __initdata = { | ||
| 117 | + { | ||
| 118 | + .modalias = "enc28j60", | ||
| 119 | + .bus_num = 4, | ||
| 120 | + .chip_select = 0, | ||
| 121 | + .max_speed_hz = 20000000, | ||
| 122 | + .controller_data = &enc28j60_spi_chip_info, | ||
| 123 | + }, | ||
| 124 | +}; | ||
| 125 | + | ||
| 126 | +static void __init omap3beagle_enc28j60_init(void) | ||
| 127 | +{ | ||
| 128 | + if ((gpio_request(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, "ENC28J60_IRQ") == 0) && | ||
| 129 | + (gpio_direction_input(OMAP3BEAGLE_GPIO_ENC28J60_IRQ) == 0)) { | ||
| 130 | + gpio_export(OMAP3BEAGLE_GPIO_ENC28J60_IRQ, 0); | ||
| 131 | + omap3beagle_zippy_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_ENC28J60_IRQ); | ||
| 132 | + irq_set_irq_type(omap3beagle_zippy_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); | ||
| 133 | + } else { | ||
| 134 | + printk(KERN_ERR "could not obtain gpio for ENC28J60_IRQ\n"); | ||
| 135 | + return; | ||
| 136 | + } | ||
| 137 | + | ||
| 138 | + spi_register_board_info(omap3beagle_zippy_spi_board_info, | ||
| 139 | + ARRAY_SIZE(omap3beagle_zippy_spi_board_info)); | ||
| 140 | +} | ||
| 141 | + | ||
| 142 | +#else | ||
| 143 | +static inline void __init omap3beagle_enc28j60_init(void) { return; } | ||
| 144 | +#endif | ||
| 145 | + | ||
| 146 | +#if defined(CONFIG_KS8851) || defined(CONFIG_KS8851_MODULE) | ||
| 147 | + | ||
| 148 | +#include <plat/mcspi.h> | ||
| 149 | +#include <linux/spi/spi.h> | ||
| 150 | + | ||
| 151 | +#define OMAP3BEAGLE_GPIO_KS8851_IRQ 157 | ||
| 152 | + | ||
| 153 | +static struct omap2_mcspi_device_config ks8851_spi_chip_info = { | ||
| 154 | + .turbo_mode = 0, | ||
| 155 | + .single_channel = 1, /* 0: slave, 1: master */ | ||
| 156 | +}; | ||
| 157 | + | ||
| 158 | +static struct spi_board_info omap3beagle_zippy2_spi_board_info[] __initdata = { | ||
| 159 | + { | ||
| 160 | + .modalias = "ks8851", | ||
| 161 | + .bus_num = 4, | ||
| 162 | + .chip_select = 0, | ||
| 163 | + .max_speed_hz = 36000000, | ||
| 164 | + .controller_data = &ks8851_spi_chip_info, | ||
| 165 | + }, | ||
| 166 | +}; | ||
| 167 | + | ||
| 168 | +static void __init omap3beagle_ks8851_init(void) | ||
| 169 | +{ | ||
| 170 | + if ((gpio_request(OMAP3BEAGLE_GPIO_KS8851_IRQ, "KS8851_IRQ") == 0) && | ||
| 171 | + (gpio_direction_input(OMAP3BEAGLE_GPIO_KS8851_IRQ) == 0)) { | ||
| 172 | + gpio_export(OMAP3BEAGLE_GPIO_KS8851_IRQ, 0); | ||
| 173 | + omap3beagle_zippy2_spi_board_info[0].irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_GPIO_KS8851_IRQ); | ||
| 174 | + irq_set_irq_type(omap3beagle_zippy2_spi_board_info[0].irq, IRQ_TYPE_EDGE_FALLING); | ||
| 175 | + } else { | ||
| 176 | + printk(KERN_ERR "could not obtain gpio for KS8851_IRQ\n"); | ||
| 177 | + return; | ||
| 178 | + } | ||
| 179 | + | ||
| 180 | + spi_register_board_info(omap3beagle_zippy2_spi_board_info, | ||
| 181 | + ARRAY_SIZE(omap3beagle_zippy2_spi_board_info)); | ||
| 182 | +} | ||
| 183 | + | ||
| 184 | +#else | ||
| 185 | +static inline void __init omap3beagle_ks8851_init(void) { return; } | ||
| 186 | +#endif | ||
| 187 | + | ||
| 188 | static struct mtd_partition omap3beagle_nand_partitions[] = { | ||
| 189 | /* All the partition sizes are listed in terms of NAND block size */ | ||
| 190 | { | ||
| 191 | @@ -254,6 +416,12 @@ static struct omap2_hsmmc_info mmc[] = { | ||
| 192 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | ||
| 193 | .gpio_wp = -EINVAL, | ||
| 194 | }, | ||
| 195 | + { | ||
| 196 | + .mmc = 2, | ||
| 197 | + .caps = MMC_CAP_4_BIT_DATA, | ||
| 198 | + .transceiver = true, | ||
| 199 | + .ocr_mask = 0x00100000, /* 3.3V */ | ||
| 200 | + }, | ||
| 201 | {} /* Terminator */ | ||
| 202 | }; | ||
| 203 | |||
| 204 | @@ -277,7 +445,15 @@ static int beagle_twl_gpio_setup(struct device *dev, | ||
| 205 | mmc[0].gpio_wp = beagle_config.mmc1_gpio_wp; | ||
| 206 | /* gpio + 0 is "mmc0_cd" (input/IRQ) */ | ||
| 207 | mmc[0].gpio_cd = gpio + 0; | ||
| 208 | +#if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) | ||
| 209 | + if(!strcmp(expansionboard_name, "bbtoys-wifi")) { | ||
| 210 | + omap2_hsmmc_init(mmcbbt); | ||
| 211 | + } else { | ||
| 212 | + omap2_hsmmc_init(mmc); | ||
| 213 | + } | ||
| 214 | +#else | ||
| 215 | omap2_hsmmc_init(mmc); | ||
| 216 | +#endif | ||
| 217 | |||
| 218 | /* | ||
| 219 | * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active | ||
| 220 | @@ -375,6 +551,19 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { | ||
| 221 | }, | ||
| 222 | }; | ||
| 223 | |||
| 224 | +#if defined(CONFIG_RTC_DRV_DS1307) || \ | ||
| 225 | + defined(CONFIG_RTC_DRV_DS1307_MODULE) | ||
| 226 | + | ||
| 227 | +static struct i2c_board_info __initdata beagle_i2c2_zippy[] = { | ||
| 228 | + { | ||
| 229 | + I2C_BOARD_INFO("eeprom", 0x50), | ||
| 230 | + I2C_BOARD_INFO("ds1307", 0x68), | ||
| 231 | + }, | ||
| 232 | +}; | ||
| 233 | +#else | ||
| 234 | +static struct i2c_board_info __initdata beagle_i2c2_zippy[] = {}; | ||
| 235 | +#endif | ||
| 236 | + | ||
| 237 | static int __init omap3_beagle_i2c_init(void) | ||
| 238 | { | ||
| 239 | omap3_pmic_get_config(&beagle_twldata, | ||
| 240 | @@ -479,6 +668,15 @@ static struct omap_board_mux board_mux[] __initdata = { | ||
| 241 | }; | ||
| 242 | #endif | ||
| 243 | |||
| 244 | +static int __init expansionboard_setup(char *str) | ||
| 245 | +{ | ||
| 246 | + if (!str) | ||
| 247 | + return -EINVAL; | ||
| 248 | + strncpy(expansionboard_name, str, 16); | ||
| 249 | + printk(KERN_INFO "Beagle expansionboard: %s\n", expansionboard_name); | ||
| 250 | + return 0; | ||
| 251 | +} | ||
| 252 | + | ||
| 253 | static void __init beagle_opp_init(void) | ||
| 254 | { | ||
| 255 | int r = 0; | ||
| 256 | @@ -542,6 +740,72 @@ static void __init omap3_beagle_init(void) | ||
| 257 | /* REVISIT leave DVI powered down until it's needed ... */ | ||
| 258 | gpio_request_one(170, GPIOF_OUT_INIT_HIGH, "DVI_nPD"); | ||
| 259 | |||
| 260 | + if(!strcmp(expansionboard_name, "zippy")) | ||
| 261 | + { | ||
| 262 | + printk(KERN_INFO "Beagle expansionboard: initializing enc28j60\n"); | ||
| 263 | + omap3beagle_enc28j60_init(); | ||
| 264 | + printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n"); | ||
| 265 | + mmc[1].gpio_wp = 141; | ||
| 266 | + mmc[1].gpio_cd = 162; | ||
| 267 | + printk(KERN_INFO "Beagle expansionboard: registering I2C2 for zippy board\n"); | ||
| 268 | + omap_register_i2c_bus(2, 400, beagle_i2c2_zippy, | ||
| 269 | + ARRAY_SIZE(beagle_i2c2_zippy)); | ||
| 270 | + | ||
| 271 | + } | ||
| 272 | + | ||
| 273 | + if(!strcmp(expansionboard_name, "zippy2")) | ||
| 274 | + { | ||
| 275 | + printk(KERN_INFO "Beagle expansionboard: initializing ks_8851\n"); | ||
| 276 | + omap3beagle_ks8851_init(); | ||
| 277 | + printk(KERN_INFO "Beagle expansionboard: assigning GPIO 141 and 162 to MMC1\n"); | ||
| 278 | + mmc[1].gpio_wp = 141; | ||
| 279 | + mmc[1].gpio_cd = 162; | ||
| 280 | + printk(KERN_INFO "Beagle expansionboard: registering I2C2 for zippy2 board\n"); | ||
| 281 | + omap_register_i2c_bus(2, 400, beagle_i2c2_zippy, | ||
| 282 | + ARRAY_SIZE(beagle_i2c2_zippy)); | ||
| 283 | + } | ||
| 284 | + | ||
| 285 | + if(!strcmp(expansionboard_name, "trainer")) | ||
| 286 | + { | ||
| 287 | + printk(KERN_INFO "Beagle expansionboard: exporting GPIOs 130-141,162 to userspace\n"); | ||
| 288 | + gpio_request(130, "sysfs"); | ||
| 289 | + gpio_export(130, 1); | ||
| 290 | + gpio_request(131, "sysfs"); | ||
| 291 | + gpio_export(131, 1); | ||
| 292 | + gpio_request(132, "sysfs"); | ||
| 293 | + gpio_export(132, 1); | ||
| 294 | + gpio_request(133, "sysfs"); | ||
| 295 | + gpio_export(133, 1); | ||
| 296 | + gpio_request(134, "sysfs"); | ||
| 297 | + gpio_export(134, 1); | ||
| 298 | + gpio_request(135, "sysfs"); | ||
| 299 | + gpio_export(135, 1); | ||
| 300 | + gpio_request(136, "sysfs"); | ||
| 301 | + gpio_export(136, 1); | ||
| 302 | + gpio_request(137, "sysfs"); | ||
| 303 | + gpio_export(137, 1); | ||
| 304 | + gpio_request(138, "sysfs"); | ||
| 305 | + gpio_export(138, 1); | ||
| 306 | + gpio_request(139, "sysfs"); | ||
| 307 | + gpio_export(139, 1); | ||
| 308 | + gpio_request(140, "sysfs"); | ||
| 309 | + gpio_export(140, 1); | ||
| 310 | + gpio_request(141, "sysfs"); | ||
| 311 | + gpio_export(141, 1); | ||
| 312 | + gpio_request(162, "sysfs"); | ||
| 313 | + gpio_export(162, 1); | ||
| 314 | + } | ||
| 315 | + | ||
| 316 | + if(!strcmp(expansionboard_name, "bbtoys-wifi")) | ||
| 317 | + { | ||
| 318 | + if (wl12xx_set_platform_data(&omap_beagle_wlan_data)) | ||
| 319 | + pr_err("error setting wl12xx data\n"); | ||
| 320 | + printk(KERN_INFO "Beagle expansionboard: registering wl12xx bt platform device\n"); | ||
| 321 | + platform_device_register(&wl12xx_device); | ||
| 322 | + printk(KERN_INFO "Beagle expansionboard: registering wl12xx wifi platform device\n"); | ||
| 323 | + platform_device_register(&omap_vwlan_device); | ||
| 324 | + } | ||
| 325 | + | ||
| 326 | usb_musb_init(NULL); | ||
| 327 | usbhs_init(&usbhs_bdata); | ||
| 328 | omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, | ||
| 329 | @@ -558,6 +822,8 @@ static void __init omap3_beagle_init(void) | ||
| 330 | beagle_opp_init(); | ||
| 331 | } | ||
| 332 | |||
| 333 | +early_param("buddy", expansionboard_setup); | ||
| 334 | + | ||
| 335 | MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") | ||
| 336 | /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ | ||
| 337 | .boot_params = 0x80000100, | ||
| 338 | -- | ||
| 339 | 1.7.2.5 | ||
| 340 | |||
diff --git a/recipes-kernel/linux/linux-3.0/beagle/0003-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch b/recipes-kernel/linux/linux-3.0/beagle/0003-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch deleted file mode 100644 index 8a758efb..00000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0003-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch +++ /dev/null | |||
| @@ -1,26 +0,0 @@ | |||
| 1 | From a7e1724833070f01b82381f40b084fd33e46836d Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | Date: Thu, 21 Jul 2011 12:59:20 +0200 | ||
| 4 | Subject: [PATCH 03/10] HACK: OMAP3: beagle: switch to GPTIMER1 | ||
| 5 | |||
| 6 | Breaks with B3 and older due to clock noise | ||
| 7 | |||
| 8 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 9 | --- | ||
| 10 | arch/arm/mach-omap2/board-omap3beagle.c | 2 +- | ||
| 11 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 12 | |||
| 13 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 14 | index f26a9a8..a04f5a0 100644 | ||
| 15 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 16 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 17 | @@ -832,5 +832,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") | ||
| 18 | .init_early = omap3_beagle_init_early, | ||
| 19 | .init_irq = omap3_beagle_init_irq, | ||
| 20 | .init_machine = omap3_beagle_init, | ||
| 21 | - .timer = &omap3_secure_timer, | ||
| 22 | + .timer = &omap3_timer, | ||
| 23 | MACHINE_END | ||
| 24 | -- | ||
| 25 | 1.7.2.5 | ||
| 26 | |||
diff --git a/recipes-kernel/linux/linux-3.0/beagle/0004-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch b/recipes-kernel/linux/linux-3.0/beagle/0004-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch deleted file mode 100644 index aaa3dce3..00000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0004-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch +++ /dev/null | |||
| @@ -1,31 +0,0 @@ | |||
| 1 | From 6ebc5081aba3428762e4e055a154fdda9ebe442e Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | Date: Wed, 25 May 2011 08:57:40 +0200 | ||
| 4 | Subject: [PATCH 04/10] OMAP3: beagle: HACK! add in 1GHz OPP | ||
| 5 | |||
| 6 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 7 | --- | ||
| 8 | arch/arm/mach-omap2/board-omap3beagle.c | 2 ++ | ||
| 9 | 1 files changed, 2 insertions(+), 0 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 12 | index a04f5a0..5e1d9f9 100644 | ||
| 13 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 14 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 15 | @@ -701,11 +701,13 @@ static void __init beagle_opp_init(void) | ||
| 16 | /* Enable MPU 1GHz and lower opps */ | ||
| 17 | dev = &mh->od->pdev.dev; | ||
| 18 | r = opp_enable(dev, 800000000); | ||
| 19 | + r |= opp_enable(dev, 1000000000); | ||
| 20 | /* TODO: MPU 1GHz needs SR and ABB */ | ||
| 21 | |||
| 22 | /* Enable IVA 800MHz and lower opps */ | ||
| 23 | dev = &dh->od->pdev.dev; | ||
| 24 | r |= opp_enable(dev, 660000000); | ||
| 25 | + r |= opp_enable(dev, 800000000); | ||
| 26 | /* TODO: DSP 800MHz needs SR and ABB */ | ||
| 27 | if (r) { | ||
| 28 | pr_err("%s: failed to enable higher opp %d\n", | ||
| 29 | -- | ||
| 30 | 1.7.2.5 | ||
| 31 | |||
diff --git a/recipes-kernel/linux/linux-3.0/beagle/0005-omap3-Add-basic-support-for-720MHz-part.patch b/recipes-kernel/linux/linux-3.0/beagle/0005-omap3-Add-basic-support-for-720MHz-part.patch deleted file mode 100644 index 6930b6dc..00000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0005-omap3-Add-basic-support-for-720MHz-part.patch +++ /dev/null | |||
| @@ -1,202 +0,0 @@ | |||
| 1 | From f0a23fe6d3c8fc9bbb60a962114b64b923ca4515 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Sanjeev Premi <premi@ti.com> | ||
| 3 | Date: Tue, 18 Jan 2011 13:19:55 +0530 | ||
| 4 | Subject: [PATCH 05/10] omap3: Add basic support for 720MHz part | ||
| 5 | |||
| 6 | This patch adds support for new speed enhanced parts with ARM | ||
| 7 | and IVA running at 720MHz and 520MHz respectively. These parts | ||
| 8 | can be probed at run-time by reading PRODID.SKUID[3:0] at | ||
| 9 | 0x4830A20C [1]. | ||
| 10 | |||
| 11 | This patch specifically does following: | ||
| 12 | * Detect devices capable of 720MHz. | ||
| 13 | * Add new OPP | ||
| 14 | * Ensure that OPP is conditionally enabled. | ||
| 15 | * Check for presence of IVA before attempting to enable | ||
| 16 | the corresponding OPP. | ||
| 17 | |||
| 18 | [1] http://focus.ti.com/lit/ug/spruff1d/spruff1d.pdf | ||
| 19 | |||
| 20 | Signed-off-by: Sanjeev Premi <premi@ti.com> | ||
| 21 | --- | ||
| 22 | arch/arm/mach-omap2/control.h | 7 ++++ | ||
| 23 | arch/arm/mach-omap2/id.c | 10 +++++ | ||
| 24 | arch/arm/mach-omap2/opp3xxx_data.c | 63 ++++++++++++++++++++++++++++++++- | ||
| 25 | arch/arm/plat-omap/include/plat/cpu.h | 2 + | ||
| 26 | 4 files changed, 81 insertions(+), 1 deletions(-) | ||
| 27 | |||
| 28 | diff --git a/arch/arm/mach-omap2/control.h b/arch/arm/mach-omap2/control.h | ||
| 29 | index a016c8b..69d0b9c 100644 | ||
| 30 | --- a/arch/arm/mach-omap2/control.h | ||
| 31 | +++ b/arch/arm/mach-omap2/control.h | ||
| 32 | @@ -371,6 +371,13 @@ | ||
| 33 | #define FEAT_NEON 0 | ||
| 34 | #define FEAT_NEON_NONE 1 | ||
| 35 | |||
| 36 | +/* | ||
| 37 | + * Product ID register | ||
| 38 | + */ | ||
| 39 | +#define OMAP3_PRODID 0x020C | ||
| 40 | + | ||
| 41 | +#define OMAP3_SKUID_MASK 0x0f | ||
| 42 | +#define OMAP3_SKUID_720MHZ 0x08 | ||
| 43 | |||
| 44 | #ifndef __ASSEMBLY__ | ||
| 45 | #ifdef CONFIG_ARCH_OMAP2PLUS | ||
| 46 | diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c | ||
| 47 | index 2537090..b6ed78a 100644 | ||
| 48 | --- a/arch/arm/mach-omap2/id.c | ||
| 49 | +++ b/arch/arm/mach-omap2/id.c | ||
| 50 | @@ -210,6 +210,15 @@ static void __init omap3_check_features(void) | ||
| 51 | * TODO: Get additional info (where applicable) | ||
| 52 | * e.g. Size of L2 cache. | ||
| 53 | */ | ||
| 54 | + | ||
| 55 | + /* | ||
| 56 | + * Does it support 720MHz? | ||
| 57 | + */ | ||
| 58 | + status = (OMAP3_SKUID_MASK & read_tap_reg(OMAP3_PRODID)); | ||
| 59 | + | ||
| 60 | + if (status & OMAP3_SKUID_720MHZ) { | ||
| 61 | + omap3_features |= OMAP3_HAS_720MHZ; | ||
| 62 | + } | ||
| 63 | } | ||
| 64 | |||
| 65 | static void __init ti816x_check_features(void) | ||
| 66 | @@ -490,6 +499,7 @@ static void __init omap3_cpuinfo(void) | ||
| 67 | OMAP3_SHOW_FEATURE(neon); | ||
| 68 | OMAP3_SHOW_FEATURE(isp); | ||
| 69 | OMAP3_SHOW_FEATURE(192mhz_clk); | ||
| 70 | + OMAP3_SHOW_FEATURE(720mhz); | ||
| 71 | |||
| 72 | printk(")\n"); | ||
| 73 | } | ||
| 74 | diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c | ||
| 75 | index d95f3f9..44fbc84 100644 | ||
| 76 | --- a/arch/arm/mach-omap2/opp3xxx_data.c | ||
| 77 | +++ b/arch/arm/mach-omap2/opp3xxx_data.c | ||
| 78 | @@ -18,8 +18,10 @@ | ||
| 79 | * GNU General Public License for more details. | ||
| 80 | */ | ||
| 81 | #include <linux/module.h> | ||
| 82 | +#include <linux/opp.h> | ||
| 83 | |||
| 84 | #include <plat/cpu.h> | ||
| 85 | +#include <plat/omap_device.h> | ||
| 86 | |||
| 87 | #include "control.h" | ||
| 88 | #include "omap_opp_data.h" | ||
| 89 | @@ -98,6 +100,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[] = { | ||
| 90 | OPP_INITIALIZER("mpu", true, 550000000, OMAP3430_VDD_MPU_OPP4_UV), | ||
| 91 | /* MPU OPP5 */ | ||
| 92 | OPP_INITIALIZER("mpu", true, 600000000, OMAP3430_VDD_MPU_OPP5_UV), | ||
| 93 | + /* MPU OPP6 */ | ||
| 94 | + OPP_INITIALIZER("mpu", false, 720000000, 1350000), | ||
| 95 | |||
| 96 | /* | ||
| 97 | * L3 OPP1 - 41.5 MHz is disabled because: The voltage for that OPP is | ||
| 98 | @@ -123,6 +127,8 @@ static struct omap_opp_def __initdata omap34xx_opp_def_list[] = { | ||
| 99 | OPP_INITIALIZER("iva", true, 400000000, OMAP3430_VDD_MPU_OPP4_UV), | ||
| 100 | /* DSP OPP5 */ | ||
| 101 | OPP_INITIALIZER("iva", true, 430000000, OMAP3430_VDD_MPU_OPP5_UV), | ||
| 102 | + /* DSP OPP6 */ | ||
| 103 | + OPP_INITIALIZER("iva", false, 520000000, 1350000), | ||
| 104 | }; | ||
| 105 | |||
| 106 | static struct omap_opp_def __initdata omap36xx_opp_def_list[] = { | ||
| 107 | @@ -150,6 +156,57 @@ static struct omap_opp_def __initdata omap36xx_opp_def_list[] = { | ||
| 108 | OPP_INITIALIZER("iva", false, 800000000, OMAP3630_VDD_MPU_OPP1G_UV), | ||
| 109 | }; | ||
| 110 | |||
| 111 | + | ||
| 112 | +/** | ||
| 113 | + * omap3_opp_enable_720Mhz() - Enable the OPP corresponding to 720MHz | ||
| 114 | + * | ||
| 115 | + * This function would be executed only if the silicon is capable of | ||
| 116 | + * running at the 720MHz. | ||
| 117 | + */ | ||
| 118 | +static int __init omap3_opp_enable_720Mhz(void) | ||
| 119 | +{ | ||
| 120 | + int r = -ENODEV; | ||
| 121 | + struct omap_hwmod *oh_mpu = omap_hwmod_lookup("mpu"); | ||
| 122 | + struct omap_hwmod *oh_iva; | ||
| 123 | + struct platform_device *pdev; | ||
| 124 | + | ||
| 125 | + if (!oh_mpu || !oh_mpu->od) { | ||
| 126 | + goto err; | ||
| 127 | + } else { | ||
| 128 | + pdev = &oh_mpu->od->pdev; | ||
| 129 | + | ||
| 130 | + r = opp_enable(&pdev->dev, 720000000); | ||
| 131 | + if (r < 0) { | ||
| 132 | + dev_err(&pdev->dev, | ||
| 133 | + "opp_enable() failed for mpu@720MHz"); | ||
| 134 | + goto err; | ||
| 135 | + } | ||
| 136 | + } | ||
| 137 | + | ||
| 138 | + if (omap3_has_iva()) { | ||
| 139 | + oh_iva = omap_hwmod_lookup("iva"); | ||
| 140 | + | ||
| 141 | + if (!oh_iva || !oh_iva->od) { | ||
| 142 | + r = -ENODEV; | ||
| 143 | + goto err; | ||
| 144 | + } else { | ||
| 145 | + pdev = &oh_iva->od->pdev; | ||
| 146 | + | ||
| 147 | + r = opp_enable(&pdev->dev, 520000000); | ||
| 148 | + if (r < 0) { | ||
| 149 | + dev_err(&pdev->dev, | ||
| 150 | + "opp_enable() failed for iva@520MHz"); | ||
| 151 | + goto err; | ||
| 152 | + } | ||
| 153 | + } | ||
| 154 | + } | ||
| 155 | + | ||
| 156 | + dev_info(&pdev->dev, "Enabled OPP corresponding to 720MHz\n"); | ||
| 157 | + | ||
| 158 | +err: | ||
| 159 | + return r; | ||
| 160 | +} | ||
| 161 | + | ||
| 162 | /** | ||
| 163 | * omap3_opp_init() - initialize omap3 opp table | ||
| 164 | */ | ||
| 165 | @@ -163,10 +220,14 @@ int __init omap3_opp_init(void) | ||
| 166 | if (cpu_is_omap3630()) | ||
| 167 | r = omap_init_opp_table(omap36xx_opp_def_list, | ||
| 168 | ARRAY_SIZE(omap36xx_opp_def_list)); | ||
| 169 | - else | ||
| 170 | + else { | ||
| 171 | r = omap_init_opp_table(omap34xx_opp_def_list, | ||
| 172 | ARRAY_SIZE(omap34xx_opp_def_list)); | ||
| 173 | |||
| 174 | + if (omap3_has_720mhz()) | ||
| 175 | + r = omap3_opp_enable_720Mhz(); | ||
| 176 | + } | ||
| 177 | + | ||
| 178 | return r; | ||
| 179 | } | ||
| 180 | device_initcall(omap3_opp_init); | ||
| 181 | diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h | ||
| 182 | index 8198bb6..5204c1e 100644 | ||
| 183 | --- a/arch/arm/plat-omap/include/plat/cpu.h | ||
| 184 | +++ b/arch/arm/plat-omap/include/plat/cpu.h | ||
| 185 | @@ -478,6 +478,7 @@ extern u32 omap3_features; | ||
| 186 | #define OMAP3_HAS_192MHZ_CLK BIT(5) | ||
| 187 | #define OMAP3_HAS_IO_WAKEUP BIT(6) | ||
| 188 | #define OMAP3_HAS_SDRC BIT(7) | ||
| 189 | +#define OMAP3_HAS_720MHZ BIT(8) | ||
| 190 | |||
| 191 | #define OMAP3_HAS_FEATURE(feat,flag) \ | ||
| 192 | static inline unsigned int omap3_has_ ##feat(void) \ | ||
| 193 | @@ -493,5 +494,6 @@ OMAP3_HAS_FEATURE(isp, ISP) | ||
| 194 | OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK) | ||
| 195 | OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP) | ||
| 196 | OMAP3_HAS_FEATURE(sdrc, SDRC) | ||
| 197 | +OMAP3_HAS_FEATURE(720mhz, 720MHZ) | ||
| 198 | |||
| 199 | #endif | ||
| 200 | -- | ||
| 201 | 1.7.2.5 | ||
| 202 | |||
diff --git a/recipes-kernel/linux/linux-3.0/beagle/0006-ARM-OMAP2-beagleboard-make-wilink-init-look-more-lik.patch b/recipes-kernel/linux/linux-3.0/beagle/0006-ARM-OMAP2-beagleboard-make-wilink-init-look-more-lik.patch deleted file mode 100644 index b63f9f7d..00000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0006-ARM-OMAP2-beagleboard-make-wilink-init-look-more-lik.patch +++ /dev/null | |||
| @@ -1,32 +0,0 @@ | |||
| 1 | From d9242a243b61059cacde8ce1241b84fc787c57d1 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | Date: Thu, 20 Oct 2011 11:14:08 +0200 | ||
| 4 | Subject: [PATCH 06/10] ARM: OMAP2+: beagleboard: make wilink init look more like pandaboard | ||
| 5 | |||
| 6 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 7 | --- | ||
| 8 | arch/arm/mach-omap2/board-omap3beagle.c | 8 +------- | ||
| 9 | 1 files changed, 1 insertions(+), 7 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 12 | index 5e1d9f9..13fffb0 100644 | ||
| 13 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 14 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 15 | @@ -203,13 +203,7 @@ static struct regulator_consumer_supply beagle_vmmc2_supply = | ||
| 16 | |||
| 17 | static struct regulator_init_data beagle_vmmc2 = { | ||
| 18 | .constraints = { | ||
| 19 | - .min_uV = 1850000, | ||
| 20 | - .max_uV = 1850000, | ||
| 21 | - .apply_uV = true, | ||
| 22 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 23 | - | REGULATOR_MODE_STANDBY, | ||
| 24 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 25 | - | REGULATOR_CHANGE_STATUS, | ||
| 26 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
| 27 | }, | ||
| 28 | .num_consumer_supplies = 1, | ||
| 29 | .consumer_supplies = &beagle_vmmc2_supply, | ||
| 30 | -- | ||
| 31 | 1.7.2.5 | ||
| 32 | |||
diff --git a/recipes-kernel/linux/linux-3.0/beagle/0007-omap_hsmmc-Set-dto-to-max-value-of-14-to-avoid-SD-Ca.patch b/recipes-kernel/linux/linux-3.0/beagle/0007-omap_hsmmc-Set-dto-to-max-value-of-14-to-avoid-SD-Ca.patch deleted file mode 100644 index e79f513c..00000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0007-omap_hsmmc-Set-dto-to-max-value-of-14-to-avoid-SD-Ca.patch +++ /dev/null | |||
| @@ -1,33 +0,0 @@ | |||
| 1 | From 47be8c9046c22715ce646091dd9e98fa87fc86e1 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Mon, 18 Jul 2011 23:13:41 -0500 | ||
| 4 | Subject: [PATCH 07/10] omap_hsmmc: Set dto to max value of 14 to avoid SD Card timeouts | ||
| 5 | |||
| 6 | This fixes MMC errors due to timeouts on certain SD Cards following suggestions | ||
| 7 | to set dto to 14 by Jason Kridner and Steven Kipisz | ||
| 8 | |||
| 9 | Details of the issue: | ||
| 10 | http://talk.maemo.org/showthread.php?p=1000707#post1000707 | ||
| 11 | |||
| 12 | This fix was originally proposed by Sukumar Ghoral of TI. | ||
| 13 | --- | ||
| 14 | drivers/mmc/host/omap_hsmmc.c | 3 +++ | ||
| 15 | 1 files changed, 3 insertions(+), 0 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c | ||
| 18 | index dedf3da..a8a60d4 100644 | ||
| 19 | --- a/drivers/mmc/host/omap_hsmmc.c | ||
| 20 | +++ b/drivers/mmc/host/omap_hsmmc.c | ||
| 21 | @@ -1441,6 +1441,9 @@ static void set_data_timeout(struct omap_hsmmc_host *host, | ||
| 22 | dto = 14; | ||
| 23 | } | ||
| 24 | |||
| 25 | + /* Set dto to max value of 14 to avoid SD Card timeouts */ | ||
| 26 | + dto = 14; | ||
| 27 | + | ||
| 28 | reg &= ~DTO_MASK; | ||
| 29 | reg |= dto << DTO_SHIFT; | ||
| 30 | OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); | ||
| 31 | -- | ||
| 32 | 1.7.2.5 | ||
| 33 | |||
diff --git a/recipes-kernel/linux/linux-3.0/beagle/0008-OMAP2-add-cpu-id-register-to-MAC-address-helper.patch b/recipes-kernel/linux/linux-3.0/beagle/0008-OMAP2-add-cpu-id-register-to-MAC-address-helper.patch deleted file mode 100644 index b864c194..00000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0008-OMAP2-add-cpu-id-register-to-MAC-address-helper.patch +++ /dev/null | |||
| @@ -1,89 +0,0 @@ | |||
| 1 | From 2a9282daf94e8b9a1c8dc6fdf5b97461eb15348d Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Andy Green <andy@warmcat.com> | ||
| 3 | Date: Thu, 24 Mar 2011 21:27:29 +0000 | ||
| 4 | Subject: [PATCH 08/10] OMAP2+: add cpu id register to MAC address helper | ||
| 5 | |||
| 6 | Introduce a generic helper function that can set a MAC address using | ||
| 7 | data from the OMAP unique CPU ID register. | ||
| 8 | |||
| 9 | For comparison purposes this produces a MAC address of | ||
| 10 | |||
| 11 | 2e:40:70:f0:12:06 | ||
| 12 | |||
| 13 | for the ethernet device on my Panda. | ||
| 14 | |||
| 15 | Note that this patch requires the fix patch for CPU ID register | ||
| 16 | indexes previously posted to linux-omap, otherwise the CPU ID is | ||
| 17 | misread on Panda by the existing function to do it. This patch | ||
| 18 | is already on linux-omap. | ||
| 19 | |||
| 20 | "OMAP2+:Common CPU DIE ID reading code reads wrong registers for OMAP4430" | ||
| 21 | http://git.kernel.org/?p=linux/kernel/git/tmlind/linux-omap-2.6.git;a=commit;h=b235e007831dbf57710e59cd4a120e2f374eecb9 | ||
| 22 | |||
| 23 | Signed-off-by: Andy Green <andy.green@linaro.org> | ||
| 24 | --- | ||
| 25 | arch/arm/mach-omap2/id.c | 39 +++++++++++++++++++++++++++++++++ | ||
| 26 | arch/arm/mach-omap2/include/mach/id.h | 1 + | ||
| 27 | 2 files changed, 40 insertions(+), 0 deletions(-) | ||
| 28 | |||
| 29 | diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c | ||
| 30 | index b6ed78a..de993f1 100644 | ||
| 31 | --- a/arch/arm/mach-omap2/id.c | ||
| 32 | +++ b/arch/arm/mach-omap2/id.c | ||
| 33 | @@ -567,3 +567,42 @@ void __init omap2_set_globals_tap(struct omap_globals *omap2_globals) | ||
| 34 | else | ||
| 35 | tap_prod_id = 0x0208; | ||
| 36 | } | ||
| 37 | + | ||
| 38 | +/* | ||
| 39 | + * this uses the unique per-cpu info from the cpu fuses set at factory to | ||
| 40 | + * generate a 6-byte MAC address. Two bits in the generated code are used | ||
| 41 | + * to elaborate the generated address into four, so it can be used on multiple | ||
| 42 | + * network interfaces. | ||
| 43 | + */ | ||
| 44 | + | ||
| 45 | +void omap2_die_id_to_ethernet_mac(u8 *mac, int subtype) | ||
| 46 | +{ | ||
| 47 | + struct omap_die_id odi; | ||
| 48 | + u32 tap = read_tap_reg(OMAP_TAP_IDCODE); | ||
| 49 | + | ||
| 50 | + omap_get_die_id(&odi); | ||
| 51 | + | ||
| 52 | + mac[0] = odi.id_2; | ||
| 53 | + mac[1] = odi.id_2 >> 8; | ||
| 54 | + mac[2] = odi.id_1; | ||
| 55 | + mac[3] = odi.id_1 >> 8; | ||
| 56 | + mac[4] = odi.id_1 >> 16; | ||
| 57 | + mac[5] = odi.id_1 >> 24; | ||
| 58 | + | ||
| 59 | + /* XOR other chip-specific data with ID */ | ||
| 60 | + | ||
| 61 | + tap ^= odi.id_3; | ||
| 62 | + | ||
| 63 | + mac[0] ^= tap; | ||
| 64 | + mac[1] ^= tap >> 8; | ||
| 65 | + mac[2] ^= tap >> 16; | ||
| 66 | + mac[3] ^= tap >> 24; | ||
| 67 | + | ||
| 68 | + /* allow four MACs from this same basic data */ | ||
| 69 | + | ||
| 70 | + mac[1] = (mac[1] & ~0xc0) | ((subtype & 3) << 6); | ||
| 71 | + | ||
| 72 | + /* mark it as not multicast and outside official 80211 MAC namespace */ | ||
| 73 | + | ||
| 74 | + mac[0] = (mac[0] & ~1) | 2; | ||
| 75 | +} | ||
| 76 | diff --git a/arch/arm/mach-omap2/include/mach/id.h b/arch/arm/mach-omap2/include/mach/id.h | ||
| 77 | index 02ed3aa..373313a 100644 | ||
| 78 | --- a/arch/arm/mach-omap2/include/mach/id.h | ||
| 79 | +++ b/arch/arm/mach-omap2/include/mach/id.h | ||
| 80 | @@ -18,5 +18,6 @@ struct omap_die_id { | ||
| 81 | }; | ||
| 82 | |||
| 83 | void omap_get_die_id(struct omap_die_id *odi); | ||
| 84 | +void omap2_die_id_to_ethernet_mac(u8 *mac, int subtype); | ||
| 85 | |||
| 86 | #endif | ||
| 87 | -- | ||
| 88 | 1.7.2.5 | ||
| 89 | |||
diff --git a/recipes-kernel/linux/linux-3.0/beagle/0009-HACK-OMAP2-BeagleBoard-Fix-up-random-or-missing-MAC-.patch b/recipes-kernel/linux/linux-3.0/beagle/0009-HACK-OMAP2-BeagleBoard-Fix-up-random-or-missing-MAC-.patch deleted file mode 100644 index 3da12c74..00000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0009-HACK-OMAP2-BeagleBoard-Fix-up-random-or-missing-MAC-.patch +++ /dev/null | |||
| @@ -1,156 +0,0 @@ | |||
| 1 | From d0212d089b62cd7ebcd53104717180482e35ec1a Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Jason Kridner <jdk@ti.com> | ||
| 3 | Date: Thu, 15 Sep 2011 18:23:02 -0400 | ||
| 4 | Subject: [PATCH 09/10] HACK: OMAP2+: BeagleBoard: Fix up random or missing MAC addresses for eth0 and wlan0 | ||
| 5 | |||
| 6 | This was borrowed from the Panda implementation at http://patches.linaro.org/777/ | ||
| 7 | |||
| 8 | This patch registers a network device notifier callback to set the mac | ||
| 9 | addresses for the onboard network assets of the BeagleBoard correctly, despite the | ||
| 10 | drivers involved have used a random or all-zeros MAC address. | ||
| 11 | |||
| 12 | The technique was suggested by Alan Cox on lkml. | ||
| 13 | |||
| 14 | It works by device path so it corrects the MAC addresses even if the | ||
| 15 | drivers are in modules loaded in an order that changes their interface | ||
| 16 | name from usual (eg, the onboard module might be "wlan1" if there is a | ||
| 17 | USB wireless stick plugged in and its module is inserted first.) | ||
| 18 | |||
| 19 | Cc: Andy Green <andy@warmcat.com> | ||
| 20 | --- | ||
| 21 | arch/arm/mach-omap2/board-omap3beagle.c | 90 +++++++++++++++++++++++++++++++ | ||
| 22 | 1 files changed, 90 insertions(+), 0 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 25 | index 13fffb0..5ffe185 100644 | ||
| 26 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 27 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 28 | @@ -33,6 +33,8 @@ | ||
| 29 | |||
| 30 | #include <linux/regulator/machine.h> | ||
| 31 | #include <linux/i2c/twl.h> | ||
| 32 | +#include <linux/netdevice.h> | ||
| 33 | +#include <linux/if_ether.h> | ||
| 34 | |||
| 35 | #include <mach/hardware.h> | ||
| 36 | #include <asm/mach-types.h> | ||
| 37 | @@ -42,6 +44,7 @@ | ||
| 38 | |||
| 39 | #include <plat/board.h> | ||
| 40 | #include <plat/common.h> | ||
| 41 | +#include <mach/id.h> | ||
| 42 | #include <video/omapdss.h> | ||
| 43 | #include <video/omap-panel-generic-dpi.h> | ||
| 44 | #include <plat/gpmc.h> | ||
| 45 | @@ -91,6 +94,90 @@ static struct { | ||
| 46 | .usr_button_gpio = 4, | ||
| 47 | }; | ||
| 48 | |||
| 49 | +/* | ||
| 50 | + * This device path represents the onboard USB <-> Ethernet bridge | ||
| 51 | + * on the BeagleBoard-xM which needs a random or all-zeros | ||
| 52 | + * mac address replaced with a per-cpu stable generated one | ||
| 53 | + */ | ||
| 54 | + | ||
| 55 | +static const char * const xm_fixup_mac_device_paths[] = { | ||
| 56 | + "usb1/1-2/1-2.1/1-2.1:1.0", | ||
| 57 | +}; | ||
| 58 | + | ||
| 59 | +static int beagle_device_path_need_mac(struct device *dev) | ||
| 60 | +{ | ||
| 61 | + const char **try = (const char **) xm_fixup_mac_device_paths; | ||
| 62 | + const char *path; | ||
| 63 | + int count = ARRAY_SIZE(xm_fixup_mac_device_paths); | ||
| 64 | + const char *p; | ||
| 65 | + int len; | ||
| 66 | + struct device *devn; | ||
| 67 | + | ||
| 68 | + while (count--) { | ||
| 69 | + | ||
| 70 | + p = *try + strlen(*try); | ||
| 71 | + devn = dev; | ||
| 72 | + | ||
| 73 | + while (devn) { | ||
| 74 | + | ||
| 75 | + path = dev_name(devn); | ||
| 76 | + len = strlen(path); | ||
| 77 | + | ||
| 78 | + if ((p - *try) < len) { | ||
| 79 | + devn = NULL; | ||
| 80 | + continue; | ||
| 81 | + } | ||
| 82 | + | ||
| 83 | + p -= len; | ||
| 84 | + | ||
| 85 | + if (strncmp(path, p, len)) { | ||
| 86 | + devn = NULL; | ||
| 87 | + continue; | ||
| 88 | + } | ||
| 89 | + | ||
| 90 | + devn = devn->parent; | ||
| 91 | + if (p == *try) | ||
| 92 | + return count; | ||
| 93 | + | ||
| 94 | + if (devn != NULL && (p - *try) < 2) | ||
| 95 | + devn = NULL; | ||
| 96 | + | ||
| 97 | + p--; | ||
| 98 | + if (devn != NULL && *p != '/') | ||
| 99 | + devn = NULL; | ||
| 100 | + } | ||
| 101 | + | ||
| 102 | + try++; | ||
| 103 | + } | ||
| 104 | + | ||
| 105 | + return -ENOENT; | ||
| 106 | +} | ||
| 107 | + | ||
| 108 | +static int omap_beagle_netdev_event(struct notifier_block *this, | ||
| 109 | + unsigned long event, void *ptr) | ||
| 110 | +{ | ||
| 111 | + struct net_device *dev = ptr; | ||
| 112 | + struct sockaddr sa; | ||
| 113 | + int n; | ||
| 114 | + | ||
| 115 | + if (event != NETDEV_REGISTER) | ||
| 116 | + return NOTIFY_DONE; | ||
| 117 | + | ||
| 118 | + n = beagle_device_path_need_mac(dev->dev.parent); | ||
| 119 | + if (n >= 0) { | ||
| 120 | + sa.sa_family = dev->type; | ||
| 121 | + omap2_die_id_to_ethernet_mac(sa.sa_data, n); | ||
| 122 | + dev->netdev_ops->ndo_set_mac_address(dev, &sa); | ||
| 123 | + } | ||
| 124 | + | ||
| 125 | + return NOTIFY_DONE; | ||
| 126 | +} | ||
| 127 | + | ||
| 128 | +static struct notifier_block omap_beagle_netdev_notifier = { | ||
| 129 | + .notifier_call = omap_beagle_netdev_event, | ||
| 130 | + .priority = 1, | ||
| 131 | +}; | ||
| 132 | + | ||
| 133 | static struct gpio omap3_beagle_rev_gpios[] __initdata = { | ||
| 134 | { 171, GPIOF_IN, "rev_id_0" }, | ||
| 135 | { 172, GPIOF_IN, "rev_id_1" }, | ||
| 136 | @@ -146,14 +233,17 @@ static void __init omap3_beagle_init_rev(void) | ||
| 137 | printk(KERN_INFO "OMAP3 Beagle Rev: xM Ax/Bx\n"); | ||
| 138 | omap3_beagle_version = OMAP3BEAGLE_BOARD_XM; | ||
| 139 | beagle_config.usb_pwr_level = GPIOF_OUT_INIT_HIGH; | ||
| 140 | + register_netdevice_notifier(&omap_beagle_netdev_notifier); | ||
| 141 | break; | ||
| 142 | case 2: | ||
| 143 | printk(KERN_INFO "OMAP3 Beagle Rev: xM C\n"); | ||
| 144 | omap3_beagle_version = OMAP3BEAGLE_BOARD_XMC; | ||
| 145 | + register_netdevice_notifier(&omap_beagle_netdev_notifier); | ||
| 146 | break; | ||
| 147 | default: | ||
| 148 | printk(KERN_INFO "OMAP3 Beagle Rev: unknown %hd\n", beagle_rev); | ||
| 149 | omap3_beagle_version = OMAP3BEAGLE_BOARD_UNKN; | ||
| 150 | + register_netdevice_notifier(&omap_beagle_netdev_notifier); | ||
| 151 | } | ||
| 152 | } | ||
| 153 | |||
| 154 | -- | ||
| 155 | 1.7.2.5 | ||
| 156 | |||
diff --git a/recipes-kernel/linux/linux-3.0/beagle/0010-ARM-OMAP2-beagleboard-fix-mmc-write-protect-pin-when.patch b/recipes-kernel/linux/linux-3.0/beagle/0010-ARM-OMAP2-beagleboard-fix-mmc-write-protect-pin-when.patch deleted file mode 100644 index bcb7e4f2..00000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0010-ARM-OMAP2-beagleboard-fix-mmc-write-protect-pin-when.patch +++ /dev/null | |||
| @@ -1,26 +0,0 @@ | |||
| 1 | From 713c5b4ce910dacdd75e9616b0f989d643008536 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | Date: Wed, 19 Oct 2011 12:44:14 +0200 | ||
| 4 | Subject: [PATCH 10/10] ARM: OMAP2+: beagleboard: fix mmc write protect pin when using the wilink expansion board | ||
| 5 | |||
| 6 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 7 | --- | ||
| 8 | arch/arm/mach-omap2/board-omap3beagle.c | 2 +- | ||
| 9 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 12 | index 5ffe185..0124060 100644 | ||
| 13 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 14 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 15 | @@ -274,7 +274,7 @@ static struct omap2_hsmmc_info mmcbbt[] = { | ||
| 16 | { | ||
| 17 | .mmc = 1, | ||
| 18 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA, | ||
| 19 | - .gpio_wp = 29, | ||
| 20 | + .gpio_wp = -EINVAL, | ||
| 21 | }, | ||
| 22 | { | ||
| 23 | .name = "wl1271", | ||
| 24 | -- | ||
| 25 | 1.7.2.5 | ||
| 26 | |||
diff --git a/recipes-kernel/linux/linux-3.0/beagle/0011-beagleboard-reinstate-usage-of-hi-speed-PLL-divider.patch b/recipes-kernel/linux/linux-3.0/beagle/0011-beagleboard-reinstate-usage-of-hi-speed-PLL-divider.patch deleted file mode 100644 index 4d2a9780..00000000 --- a/recipes-kernel/linux/linux-3.0/beagle/0011-beagleboard-reinstate-usage-of-hi-speed-PLL-divider.patch +++ /dev/null | |||
| @@ -1,29 +0,0 @@ | |||
| 1 | From a2139a0efb9472a649465a1080799c73470fd201 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | Date: Wed, 25 Jan 2012 15:48:36 +0100 | ||
| 4 | Subject: [PATCH] beagleboard: reinstate usage of hi-speed PLL divider | ||
| 5 | |||
| 6 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 7 | --- | ||
| 8 | arch/arm/mach-omap2/board-omap3beagle.c | 5 +++++ | ||
| 9 | 1 files changed, 5 insertions(+), 0 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 12 | index 016d0985..c4c7a99 100644 | ||
| 13 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 14 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 15 | @@ -467,6 +467,11 @@ static struct omap_dss_device beagle_dvi_device = { | ||
| 16 | .driver_name = "generic_dpi_panel", | ||
| 17 | .data = &dvi_panel, | ||
| 18 | .phy.dpi.data_lines = 24, | ||
| 19 | + .clocks = { | ||
| 20 | + .dispc = { | ||
| 21 | + .dispc_fclk_src = OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, | ||
| 22 | + }, | ||
| 23 | + }, | ||
| 24 | .reset_gpio = -EINVAL, | ||
| 25 | }; | ||
| 26 | |||
| 27 | -- | ||
| 28 | 1.7.7.5 | ||
| 29 | |||
diff --git a/recipes-kernel/linux/linux-3.0/beagleboard/defconfig b/recipes-kernel/linux/linux-3.0/beagleboard/defconfig deleted file mode 100644 index 5be7772e..00000000 --- a/recipes-kernel/linux/linux-3.0/beagleboard/defconfig +++ /dev/null | |||
| @@ -1,3604 +0,0 @@ | |||
| 1 | # | ||
| 2 | # Automatically generated make config: don't edit | ||
| 3 | # Linux/arm 3.0.22 Kernel Configuration | ||
| 4 | # | ||
| 5 | CONFIG_ARM=y | ||
| 6 | CONFIG_HAVE_PWM=y | ||
| 7 | CONFIG_SYS_SUPPORTS_APM_EMULATION=y | ||
| 8 | CONFIG_HAVE_SCHED_CLOCK=y | ||
| 9 | CONFIG_GENERIC_GPIO=y | ||
| 10 | # CONFIG_ARCH_USES_GETTIMEOFFSET is not set | ||
| 11 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
| 12 | CONFIG_KTIME_SCALAR=y | ||
| 13 | CONFIG_HAVE_PROC_CPU=y | ||
| 14 | CONFIG_STACKTRACE_SUPPORT=y | ||
| 15 | CONFIG_HAVE_LATENCYTOP_SUPPORT=y | ||
| 16 | CONFIG_LOCKDEP_SUPPORT=y | ||
| 17 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
| 18 | CONFIG_HARDIRQS_SW_RESEND=y | ||
| 19 | CONFIG_GENERIC_IRQ_PROBE=y | ||
| 20 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
| 21 | CONFIG_ARCH_HAS_CPUFREQ=y | ||
| 22 | CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y | ||
| 23 | CONFIG_GENERIC_HWEIGHT=y | ||
| 24 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
| 25 | CONFIG_NEED_DMA_MAP_STATE=y | ||
| 26 | CONFIG_VECTORS_BASE=0xffff0000 | ||
| 27 | # CONFIG_ARM_PATCH_PHYS_VIRT is not set | ||
| 28 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
| 29 | CONFIG_HAVE_IRQ_WORK=y | ||
| 30 | CONFIG_IRQ_WORK=y | ||
| 31 | |||
| 32 | # | ||
| 33 | # General setup | ||
| 34 | # | ||
| 35 | CONFIG_EXPERIMENTAL=y | ||
| 36 | CONFIG_BROKEN_ON_SMP=y | ||
| 37 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
| 38 | CONFIG_CROSS_COMPILE="" | ||
| 39 | CONFIG_LOCALVERSION="" | ||
| 40 | # CONFIG_LOCALVERSION_AUTO is not set | ||
| 41 | CONFIG_HAVE_KERNEL_GZIP=y | ||
| 42 | CONFIG_HAVE_KERNEL_LZMA=y | ||
| 43 | CONFIG_HAVE_KERNEL_LZO=y | ||
| 44 | CONFIG_KERNEL_GZIP=y | ||
| 45 | # CONFIG_KERNEL_LZMA is not set | ||
| 46 | # CONFIG_KERNEL_LZO is not set | ||
| 47 | CONFIG_DEFAULT_HOSTNAME="beagleboard" | ||
| 48 | CONFIG_SWAP=y | ||
| 49 | CONFIG_SYSVIPC=y | ||
| 50 | CONFIG_SYSVIPC_SYSCTL=y | ||
| 51 | CONFIG_POSIX_MQUEUE=y | ||
| 52 | CONFIG_POSIX_MQUEUE_SYSCTL=y | ||
| 53 | CONFIG_BSD_PROCESS_ACCT=y | ||
| 54 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
| 55 | CONFIG_FHANDLE=y | ||
| 56 | CONFIG_TASKSTATS=y | ||
| 57 | CONFIG_TASK_DELAY_ACCT=y | ||
| 58 | CONFIG_TASK_XACCT=y | ||
| 59 | CONFIG_TASK_IO_ACCOUNTING=y | ||
| 60 | # CONFIG_AUDIT is not set | ||
| 61 | CONFIG_HAVE_GENERIC_HARDIRQS=y | ||
| 62 | |||
| 63 | # | ||
| 64 | # IRQ subsystem | ||
| 65 | # | ||
| 66 | CONFIG_GENERIC_HARDIRQS=y | ||
| 67 | CONFIG_HAVE_SPARSE_IRQ=y | ||
| 68 | CONFIG_GENERIC_IRQ_SHOW=y | ||
| 69 | CONFIG_GENERIC_IRQ_CHIP=y | ||
| 70 | # CONFIG_SPARSE_IRQ is not set | ||
| 71 | |||
| 72 | # | ||
| 73 | # RCU Subsystem | ||
| 74 | # | ||
| 75 | CONFIG_TINY_RCU=y | ||
| 76 | # CONFIG_PREEMPT_RCU is not set | ||
| 77 | # CONFIG_RCU_TRACE is not set | ||
| 78 | # CONFIG_TREE_RCU_TRACE is not set | ||
| 79 | CONFIG_IKCONFIG=y | ||
| 80 | CONFIG_IKCONFIG_PROC=y | ||
| 81 | CONFIG_LOG_BUF_SHIFT=16 | ||
| 82 | CONFIG_CGROUPS=y | ||
| 83 | # CONFIG_CGROUP_DEBUG is not set | ||
| 84 | CONFIG_CGROUP_FREEZER=y | ||
| 85 | CONFIG_CGROUP_DEVICE=y | ||
| 86 | CONFIG_CPUSETS=y | ||
| 87 | CONFIG_PROC_PID_CPUSET=y | ||
| 88 | CONFIG_CGROUP_CPUACCT=y | ||
| 89 | CONFIG_RESOURCE_COUNTERS=y | ||
| 90 | CONFIG_CGROUP_MEM_RES_CTLR=y | ||
| 91 | CONFIG_CGROUP_MEM_RES_CTLR_SWAP=y | ||
| 92 | CONFIG_CGROUP_MEM_RES_CTLR_SWAP_ENABLED=y | ||
| 93 | CONFIG_CGROUP_PERF=y | ||
| 94 | CONFIG_CGROUP_SCHED=y | ||
| 95 | CONFIG_FAIR_GROUP_SCHED=y | ||
| 96 | CONFIG_RT_GROUP_SCHED=y | ||
| 97 | CONFIG_BLK_CGROUP=y | ||
| 98 | # CONFIG_DEBUG_BLK_CGROUP is not set | ||
| 99 | CONFIG_NAMESPACES=y | ||
| 100 | CONFIG_UTS_NS=y | ||
| 101 | CONFIG_IPC_NS=y | ||
| 102 | CONFIG_USER_NS=y | ||
| 103 | CONFIG_PID_NS=y | ||
| 104 | CONFIG_NET_NS=y | ||
| 105 | CONFIG_SCHED_AUTOGROUP=y | ||
| 106 | CONFIG_MM_OWNER=y | ||
| 107 | # CONFIG_SYSFS_DEPRECATED is not set | ||
| 108 | # CONFIG_RELAY is not set | ||
| 109 | CONFIG_BLK_DEV_INITRD=y | ||
| 110 | CONFIG_INITRAMFS_SOURCE="" | ||
| 111 | CONFIG_RD_GZIP=y | ||
| 112 | CONFIG_RD_BZIP2=y | ||
| 113 | CONFIG_RD_LZMA=y | ||
| 114 | CONFIG_RD_XZ=y | ||
| 115 | CONFIG_RD_LZO=y | ||
| 116 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
| 117 | CONFIG_SYSCTL=y | ||
| 118 | CONFIG_ANON_INODES=y | ||
| 119 | CONFIG_EXPERT=y | ||
| 120 | CONFIG_UID16=y | ||
| 121 | # CONFIG_SYSCTL_SYSCALL is not set | ||
| 122 | CONFIG_KALLSYMS=y | ||
| 123 | # CONFIG_KALLSYMS_ALL is not set | ||
| 124 | CONFIG_HOTPLUG=y | ||
| 125 | CONFIG_PRINTK=y | ||
| 126 | CONFIG_BUG=y | ||
| 127 | CONFIG_ELF_CORE=y | ||
| 128 | CONFIG_BASE_FULL=y | ||
| 129 | CONFIG_FUTEX=y | ||
| 130 | CONFIG_EPOLL=y | ||
| 131 | CONFIG_SIGNALFD=y | ||
| 132 | CONFIG_TIMERFD=y | ||
| 133 | CONFIG_EVENTFD=y | ||
| 134 | CONFIG_SHMEM=y | ||
| 135 | CONFIG_AIO=y | ||
| 136 | CONFIG_EMBEDDED=y | ||
| 137 | CONFIG_HAVE_PERF_EVENTS=y | ||
| 138 | CONFIG_PERF_USE_VMALLOC=y | ||
| 139 | |||
| 140 | # | ||
| 141 | # Kernel Performance Events And Counters | ||
| 142 | # | ||
| 143 | CONFIG_PERF_EVENTS=y | ||
| 144 | # CONFIG_PERF_COUNTERS is not set | ||
| 145 | # CONFIG_DEBUG_PERF_USE_VMALLOC is not set | ||
| 146 | CONFIG_VM_EVENT_COUNTERS=y | ||
| 147 | # CONFIG_COMPAT_BRK is not set | ||
| 148 | CONFIG_SLAB=y | ||
| 149 | # CONFIG_SLUB is not set | ||
| 150 | # CONFIG_SLOB is not set | ||
| 151 | CONFIG_PROFILING=y | ||
| 152 | CONFIG_OPROFILE=m | ||
| 153 | CONFIG_HAVE_OPROFILE=y | ||
| 154 | # CONFIG_KPROBES is not set | ||
| 155 | CONFIG_HAVE_KPROBES=y | ||
| 156 | CONFIG_HAVE_KRETPROBES=y | ||
| 157 | CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y | ||
| 158 | CONFIG_HAVE_CLK=y | ||
| 159 | CONFIG_HAVE_DMA_API_DEBUG=y | ||
| 160 | CONFIG_HAVE_HW_BREAKPOINT=y | ||
| 161 | |||
| 162 | # | ||
| 163 | # GCOV-based kernel profiling | ||
| 164 | # | ||
| 165 | # CONFIG_GCOV_KERNEL is not set | ||
| 166 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
| 167 | CONFIG_SLABINFO=y | ||
| 168 | CONFIG_RT_MUTEXES=y | ||
| 169 | CONFIG_BASE_SMALL=0 | ||
| 170 | CONFIG_MODULES=y | ||
| 171 | CONFIG_MODULE_FORCE_LOAD=y | ||
| 172 | CONFIG_MODULE_UNLOAD=y | ||
| 173 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
| 174 | CONFIG_MODVERSIONS=y | ||
| 175 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
| 176 | CONFIG_BLOCK=y | ||
| 177 | CONFIG_LBDAF=y | ||
| 178 | CONFIG_BLK_DEV_BSG=y | ||
| 179 | CONFIG_BLK_DEV_INTEGRITY=y | ||
| 180 | CONFIG_BLK_DEV_THROTTLING=y | ||
| 181 | |||
| 182 | # | ||
| 183 | # IO Schedulers | ||
| 184 | # | ||
| 185 | CONFIG_IOSCHED_NOOP=y | ||
| 186 | CONFIG_IOSCHED_DEADLINE=y | ||
| 187 | CONFIG_IOSCHED_CFQ=y | ||
| 188 | CONFIG_CFQ_GROUP_IOSCHED=y | ||
| 189 | # CONFIG_DEFAULT_DEADLINE is not set | ||
| 190 | CONFIG_DEFAULT_CFQ=y | ||
| 191 | # CONFIG_DEFAULT_NOOP is not set | ||
| 192 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
| 193 | # CONFIG_INLINE_SPIN_TRYLOCK is not set | ||
| 194 | # CONFIG_INLINE_SPIN_TRYLOCK_BH is not set | ||
| 195 | # CONFIG_INLINE_SPIN_LOCK is not set | ||
| 196 | # CONFIG_INLINE_SPIN_LOCK_BH is not set | ||
| 197 | # CONFIG_INLINE_SPIN_LOCK_IRQ is not set | ||
| 198 | # CONFIG_INLINE_SPIN_LOCK_IRQSAVE is not set | ||
| 199 | CONFIG_INLINE_SPIN_UNLOCK=y | ||
| 200 | # CONFIG_INLINE_SPIN_UNLOCK_BH is not set | ||
| 201 | CONFIG_INLINE_SPIN_UNLOCK_IRQ=y | ||
| 202 | # CONFIG_INLINE_SPIN_UNLOCK_IRQRESTORE is not set | ||
| 203 | # CONFIG_INLINE_READ_TRYLOCK is not set | ||
| 204 | # CONFIG_INLINE_READ_LOCK is not set | ||
| 205 | # CONFIG_INLINE_READ_LOCK_BH is not set | ||
| 206 | # CONFIG_INLINE_READ_LOCK_IRQ is not set | ||
| 207 | # CONFIG_INLINE_READ_LOCK_IRQSAVE is not set | ||
| 208 | CONFIG_INLINE_READ_UNLOCK=y | ||
| 209 | # CONFIG_INLINE_READ_UNLOCK_BH is not set | ||
| 210 | CONFIG_INLINE_READ_UNLOCK_IRQ=y | ||
| 211 | # CONFIG_INLINE_READ_UNLOCK_IRQRESTORE is not set | ||
| 212 | # CONFIG_INLINE_WRITE_TRYLOCK is not set | ||
| 213 | # CONFIG_INLINE_WRITE_LOCK is not set | ||
| 214 | # CONFIG_INLINE_WRITE_LOCK_BH is not set | ||
| 215 | # CONFIG_INLINE_WRITE_LOCK_IRQ is not set | ||
| 216 | # CONFIG_INLINE_WRITE_LOCK_IRQSAVE is not set | ||
| 217 | CONFIG_INLINE_WRITE_UNLOCK=y | ||
| 218 | # CONFIG_INLINE_WRITE_UNLOCK_BH is not set | ||
| 219 | CONFIG_INLINE_WRITE_UNLOCK_IRQ=y | ||
| 220 | # CONFIG_INLINE_WRITE_UNLOCK_IRQRESTORE is not set | ||
| 221 | # CONFIG_MUTEX_SPIN_ON_OWNER is not set | ||
| 222 | CONFIG_FREEZER=y | ||
| 223 | |||
| 224 | # | ||
| 225 | # System Type | ||
| 226 | # | ||
| 227 | CONFIG_MMU=y | ||
| 228 | # CONFIG_ARCH_INTEGRATOR is not set | ||
| 229 | # CONFIG_ARCH_REALVIEW is not set | ||
| 230 | # CONFIG_ARCH_VERSATILE is not set | ||
| 231 | # CONFIG_ARCH_VEXPRESS is not set | ||
| 232 | # CONFIG_ARCH_AT91 is not set | ||
| 233 | # CONFIG_ARCH_BCMRING is not set | ||
| 234 | # CONFIG_ARCH_CLPS711X is not set | ||
| 235 | # CONFIG_ARCH_CNS3XXX is not set | ||
| 236 | # CONFIG_ARCH_GEMINI is not set | ||
| 237 | # CONFIG_ARCH_EBSA110 is not set | ||
| 238 | # CONFIG_ARCH_EP93XX is not set | ||
| 239 | # CONFIG_ARCH_FOOTBRIDGE is not set | ||
| 240 | # CONFIG_ARCH_MXC is not set | ||
| 241 | # CONFIG_ARCH_MXS is not set | ||
| 242 | # CONFIG_ARCH_NETX is not set | ||
| 243 | # CONFIG_ARCH_H720X is not set | ||
| 244 | # CONFIG_ARCH_IOP13XX is not set | ||
| 245 | # CONFIG_ARCH_IOP32X is not set | ||
| 246 | # CONFIG_ARCH_IOP33X is not set | ||
| 247 | # CONFIG_ARCH_IXP23XX is not set | ||
| 248 | # CONFIG_ARCH_IXP2000 is not set | ||
| 249 | # CONFIG_ARCH_IXP4XX is not set | ||
| 250 | # CONFIG_ARCH_DOVE is not set | ||
| 251 | # CONFIG_ARCH_KIRKWOOD is not set | ||
| 252 | # CONFIG_ARCH_LOKI is not set | ||
| 253 | # CONFIG_ARCH_LPC32XX is not set | ||
| 254 | # CONFIG_ARCH_MV78XX0 is not set | ||
| 255 | # CONFIG_ARCH_ORION5X is not set | ||
| 256 | # CONFIG_ARCH_MMP is not set | ||
| 257 | # CONFIG_ARCH_KS8695 is not set | ||
| 258 | # CONFIG_ARCH_W90X900 is not set | ||
| 259 | # CONFIG_ARCH_NUC93X is not set | ||
| 260 | # CONFIG_ARCH_TEGRA is not set | ||
| 261 | # CONFIG_ARCH_PNX4008 is not set | ||
| 262 | # CONFIG_ARCH_PXA is not set | ||
| 263 | # CONFIG_ARCH_MSM is not set | ||
| 264 | # CONFIG_ARCH_SHMOBILE is not set | ||
| 265 | # CONFIG_ARCH_RPC is not set | ||
| 266 | # CONFIG_ARCH_SA1100 is not set | ||
| 267 | # CONFIG_ARCH_S3C2410 is not set | ||
| 268 | # CONFIG_ARCH_S3C64XX is not set | ||
| 269 | # CONFIG_ARCH_S5P64X0 is not set | ||
| 270 | # CONFIG_ARCH_S5PC100 is not set | ||
| 271 | # CONFIG_ARCH_S5PV210 is not set | ||
| 272 | # CONFIG_ARCH_EXYNOS4 is not set | ||
| 273 | # CONFIG_ARCH_SHARK is not set | ||
| 274 | # CONFIG_ARCH_TCC_926 is not set | ||
| 275 | # CONFIG_ARCH_U300 is not set | ||
| 276 | # CONFIG_ARCH_U8500 is not set | ||
| 277 | # CONFIG_ARCH_NOMADIK is not set | ||
| 278 | # CONFIG_ARCH_DAVINCI is not set | ||
| 279 | CONFIG_ARCH_OMAP=y | ||
| 280 | # CONFIG_PLAT_SPEAR is not set | ||
| 281 | # CONFIG_ARCH_VT8500 is not set | ||
| 282 | # CONFIG_GPIO_PCA953X is not set | ||
| 283 | # CONFIG_KEYBOARD_GPIO_POLLED is not set | ||
| 284 | |||
| 285 | # | ||
| 286 | # TI OMAP Common Features | ||
| 287 | # | ||
| 288 | CONFIG_ARCH_OMAP_OTG=y | ||
| 289 | # CONFIG_ARCH_OMAP1 is not set | ||
| 290 | CONFIG_ARCH_OMAP2PLUS=y | ||
| 291 | |||
| 292 | # | ||
| 293 | # OMAP Feature Selections | ||
| 294 | # | ||
| 295 | CONFIG_OMAP_SMARTREFLEX=y | ||
| 296 | CONFIG_OMAP_SMARTREFLEX_CLASS3=y | ||
| 297 | CONFIG_OMAP_RESET_CLOCKS=y | ||
| 298 | CONFIG_OMAP_MUX=y | ||
| 299 | CONFIG_OMAP_MUX_DEBUG=y | ||
| 300 | CONFIG_OMAP_MUX_WARNINGS=y | ||
| 301 | CONFIG_OMAP_MCBSP=y | ||
| 302 | CONFIG_OMAP_MBOX_FWK=m | ||
| 303 | CONFIG_OMAP_MBOX_KFIFO_SIZE=256 | ||
| 304 | CONFIG_OMAP_IOMMU=y | ||
| 305 | CONFIG_OMAP_IOMMU_DEBUG=m | ||
| 306 | CONFIG_OMAP_32K_TIMER=y | ||
| 307 | # CONFIG_OMAP3_L2_AUX_SECURE_SAVE_RESTORE is not set | ||
| 308 | CONFIG_OMAP_32K_TIMER_HZ=128 | ||
| 309 | CONFIG_OMAP_DM_TIMER=y | ||
| 310 | CONFIG_OMAP_PM_NOOP=y | ||
| 311 | |||
| 312 | # | ||
| 313 | # TI OMAP2/3/4 Specific Features | ||
| 314 | # | ||
| 315 | CONFIG_ARCH_OMAP2PLUS_TYPICAL=y | ||
| 316 | # CONFIG_ARCH_OMAP2 is not set | ||
| 317 | CONFIG_ARCH_OMAP3=y | ||
| 318 | # CONFIG_ARCH_OMAP4 is not set | ||
| 319 | CONFIG_SOC_OMAP3430=y | ||
| 320 | # CONFIG_SOC_OMAPTI816X is not set | ||
| 321 | CONFIG_OMAP_PACKAGE_CBB=y | ||
| 322 | |||
| 323 | # | ||
| 324 | # OMAP Board Type | ||
| 325 | # | ||
| 326 | CONFIG_MACH_OMAP3_BEAGLE=y | ||
| 327 | # CONFIG_MACH_DEVKIT8000 is not set | ||
| 328 | # CONFIG_MACH_OMAP_LDP is not set | ||
| 329 | # CONFIG_MACH_OMAP3530_LV_SOM is not set | ||
| 330 | # CONFIG_MACH_OMAP3_TORPEDO is not set | ||
| 331 | CONFIG_MACH_OVERO=y | ||
| 332 | CONFIG_MACH_OMAP3EVM=y | ||
| 333 | # CONFIG_MACH_OMAP3517EVM is not set | ||
| 334 | # CONFIG_MACH_CRANEBOARD is not set | ||
| 335 | # CONFIG_MACH_OMAP3_PANDORA is not set | ||
| 336 | CONFIG_MACH_OMAP3_TOUCHBOOK=y | ||
| 337 | # CONFIG_MACH_OMAP_3430SDP is not set | ||
| 338 | # CONFIG_MACH_NOKIA_RM680 is not set | ||
| 339 | # CONFIG_MACH_NOKIA_RX51 is not set | ||
| 340 | CONFIG_MACH_OMAP_ZOOM2=y | ||
| 341 | # CONFIG_MACH_OMAP_ZOOM3 is not set | ||
| 342 | # CONFIG_MACH_CM_T35 is not set | ||
| 343 | # CONFIG_MACH_CM_T3517 is not set | ||
| 344 | # CONFIG_MACH_IGEP0020 is not set | ||
| 345 | # CONFIG_MACH_IGEP0030 is not set | ||
| 346 | # CONFIG_MACH_SBC3530 is not set | ||
| 347 | # CONFIG_MACH_OMAP_3630SDP is not set | ||
| 348 | # CONFIG_OMAP3_EMU is not set | ||
| 349 | # CONFIG_OMAP3_SDRC_AC_TIMING is not set | ||
| 350 | |||
| 351 | # | ||
| 352 | # System MMU | ||
| 353 | # | ||
| 354 | |||
| 355 | # | ||
| 356 | # Processor Type | ||
| 357 | # | ||
| 358 | CONFIG_CPU_V7=y | ||
| 359 | CONFIG_CPU_32v6K=y | ||
| 360 | CONFIG_CPU_32v7=y | ||
| 361 | CONFIG_CPU_ABRT_EV7=y | ||
| 362 | CONFIG_CPU_PABRT_V7=y | ||
| 363 | CONFIG_CPU_CACHE_V7=y | ||
| 364 | CONFIG_CPU_CACHE_VIPT=y | ||
| 365 | CONFIG_CPU_COPY_V6=y | ||
| 366 | CONFIG_CPU_TLB_V7=y | ||
| 367 | CONFIG_CPU_HAS_ASID=y | ||
| 368 | CONFIG_CPU_CP15=y | ||
| 369 | CONFIG_CPU_CP15_MMU=y | ||
| 370 | |||
| 371 | # | ||
| 372 | # Processor Features | ||
| 373 | # | ||
| 374 | CONFIG_ARM_THUMB=y | ||
| 375 | CONFIG_ARM_THUMBEE=y | ||
| 376 | # CONFIG_SWP_EMULATE is not set | ||
| 377 | # CONFIG_CPU_ICACHE_DISABLE is not set | ||
| 378 | # CONFIG_CPU_DCACHE_DISABLE is not set | ||
| 379 | # CONFIG_CPU_BPREDICT_DISABLE is not set | ||
| 380 | CONFIG_ARM_L1_CACHE_SHIFT_6=y | ||
| 381 | CONFIG_ARM_L1_CACHE_SHIFT=6 | ||
| 382 | CONFIG_ARM_DMA_MEM_BUFFERABLE=y | ||
| 383 | CONFIG_ARM_ERRATA_430973=y | ||
| 384 | # CONFIG_ARM_ERRATA_458693 is not set | ||
| 385 | # CONFIG_ARM_ERRATA_460075 is not set | ||
| 386 | # CONFIG_ARM_ERRATA_743622 is not set | ||
| 387 | # CONFIG_ARM_ERRATA_754322 is not set | ||
| 388 | |||
| 389 | # | ||
| 390 | # Bus support | ||
| 391 | # | ||
| 392 | # CONFIG_PCI_SYSCALL is not set | ||
| 393 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
| 394 | # CONFIG_PCCARD is not set | ||
| 395 | |||
| 396 | # | ||
| 397 | # Kernel Features | ||
| 398 | # | ||
| 399 | CONFIG_TICK_ONESHOT=y | ||
| 400 | CONFIG_NO_HZ=y | ||
| 401 | CONFIG_HIGH_RES_TIMERS=y | ||
| 402 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
| 403 | CONFIG_VMSPLIT_3G=y | ||
| 404 | # CONFIG_VMSPLIT_2G is not set | ||
| 405 | # CONFIG_VMSPLIT_1G is not set | ||
| 406 | CONFIG_PAGE_OFFSET=0xC0000000 | ||
| 407 | CONFIG_PREEMPT_NONE=y | ||
| 408 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
| 409 | # CONFIG_PREEMPT is not set | ||
| 410 | CONFIG_HZ=128 | ||
| 411 | # CONFIG_THUMB2_KERNEL is not set | ||
| 412 | CONFIG_AEABI=y | ||
| 413 | # CONFIG_OABI_COMPAT is not set | ||
| 414 | CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y | ||
| 415 | # CONFIG_ARCH_SPARSEMEM_DEFAULT is not set | ||
| 416 | # CONFIG_ARCH_SELECT_MEMORY_MODEL is not set | ||
| 417 | CONFIG_HAVE_ARCH_PFN_VALID=y | ||
| 418 | # CONFIG_HIGHMEM is not set | ||
| 419 | CONFIG_SELECT_MEMORY_MODEL=y | ||
| 420 | CONFIG_FLATMEM_MANUAL=y | ||
| 421 | CONFIG_FLATMEM=y | ||
| 422 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
| 423 | CONFIG_HAVE_MEMBLOCK=y | ||
| 424 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
| 425 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
| 426 | CONFIG_COMPACTION=y | ||
| 427 | CONFIG_MIGRATION=y | ||
| 428 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
| 429 | CONFIG_ZONE_DMA_FLAG=0 | ||
| 430 | CONFIG_VIRT_TO_BUS=y | ||
| 431 | # CONFIG_KSM is not set | ||
| 432 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
| 433 | CONFIG_NEED_PER_CPU_KM=y | ||
| 434 | # CONFIG_CLEANCACHE is not set | ||
| 435 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
| 436 | CONFIG_LEDS=y | ||
| 437 | CONFIG_ALIGNMENT_TRAP=y | ||
| 438 | # CONFIG_UACCESS_WITH_MEMCPY is not set | ||
| 439 | # CONFIG_SECCOMP is not set | ||
| 440 | # CONFIG_CC_STACKPROTECTOR is not set | ||
| 441 | # CONFIG_DEPRECATED_PARAM_STRUCT is not set | ||
| 442 | |||
| 443 | # | ||
| 444 | # Boot options | ||
| 445 | # | ||
| 446 | # CONFIG_USE_OF is not set | ||
| 447 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
| 448 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
| 449 | CONFIG_CMDLINE=" debug " | ||
| 450 | CONFIG_CMDLINE_FROM_BOOTLOADER=y | ||
| 451 | # CONFIG_CMDLINE_EXTEND is not set | ||
| 452 | # CONFIG_CMDLINE_FORCE is not set | ||
| 453 | # CONFIG_XIP_KERNEL is not set | ||
| 454 | CONFIG_KEXEC=y | ||
| 455 | CONFIG_ATAGS_PROC=y | ||
| 456 | # CONFIG_CRASH_DUMP is not set | ||
| 457 | CONFIG_AUTO_ZRELADDR=y | ||
| 458 | |||
| 459 | # | ||
| 460 | # CPU Power Management | ||
| 461 | # | ||
| 462 | |||
| 463 | # | ||
| 464 | # CPU Frequency scaling | ||
| 465 | # | ||
| 466 | CONFIG_CPU_FREQ=y | ||
| 467 | CONFIG_CPU_FREQ_TABLE=y | ||
| 468 | CONFIG_CPU_FREQ_STAT=y | ||
| 469 | CONFIG_CPU_FREQ_STAT_DETAILS=y | ||
| 470 | # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set | ||
| 471 | # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
| 472 | CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y | ||
| 473 | # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | ||
| 474 | # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | ||
| 475 | CONFIG_CPU_FREQ_GOV_PERFORMANCE=y | ||
| 476 | CONFIG_CPU_FREQ_GOV_POWERSAVE=y | ||
| 477 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
| 478 | CONFIG_CPU_FREQ_GOV_ONDEMAND=y | ||
| 479 | CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y | ||
| 480 | CONFIG_CPU_IDLE=y | ||
| 481 | CONFIG_CPU_IDLE_GOV_LADDER=y | ||
| 482 | CONFIG_CPU_IDLE_GOV_MENU=y | ||
| 483 | |||
| 484 | # | ||
| 485 | # Floating point emulation | ||
| 486 | # | ||
| 487 | |||
| 488 | # | ||
| 489 | # At least one emulation must be selected | ||
| 490 | # | ||
| 491 | CONFIG_VFP=y | ||
| 492 | CONFIG_VFPv3=y | ||
| 493 | CONFIG_NEON=y | ||
| 494 | |||
| 495 | # | ||
| 496 | # Userspace binary formats | ||
| 497 | # | ||
| 498 | CONFIG_BINFMT_ELF=y | ||
| 499 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
| 500 | CONFIG_HAVE_AOUT=y | ||
| 501 | CONFIG_BINFMT_AOUT=m | ||
| 502 | CONFIG_BINFMT_MISC=y | ||
| 503 | |||
| 504 | # | ||
| 505 | # Power management options | ||
| 506 | # | ||
| 507 | CONFIG_SUSPEND=y | ||
| 508 | CONFIG_SUSPEND_FREEZER=y | ||
| 509 | CONFIG_PM_SLEEP=y | ||
| 510 | CONFIG_PM_RUNTIME=y | ||
| 511 | CONFIG_PM=y | ||
| 512 | CONFIG_PM_DEBUG=y | ||
| 513 | # CONFIG_PM_ADVANCED_DEBUG is not set | ||
| 514 | # CONFIG_PM_TEST_SUSPEND is not set | ||
| 515 | CONFIG_CAN_PM_TRACE=y | ||
| 516 | # CONFIG_APM_EMULATION is not set | ||
| 517 | CONFIG_ARCH_HAS_OPP=y | ||
| 518 | CONFIG_PM_OPP=y | ||
| 519 | CONFIG_PM_RUNTIME_CLK=y | ||
| 520 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
| 521 | CONFIG_NET=y | ||
| 522 | |||
| 523 | # | ||
| 524 | # Networking options | ||
| 525 | # | ||
| 526 | CONFIG_PACKET=y | ||
| 527 | CONFIG_UNIX=y | ||
| 528 | CONFIG_XFRM=y | ||
| 529 | # CONFIG_XFRM_USER is not set | ||
| 530 | # CONFIG_XFRM_SUB_POLICY is not set | ||
| 531 | # CONFIG_XFRM_MIGRATE is not set | ||
| 532 | # CONFIG_XFRM_STATISTICS is not set | ||
| 533 | CONFIG_XFRM_IPCOMP=m | ||
| 534 | CONFIG_NET_KEY=y | ||
| 535 | # CONFIG_NET_KEY_MIGRATE is not set | ||
| 536 | CONFIG_INET=y | ||
| 537 | # CONFIG_IP_MULTICAST is not set | ||
| 538 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
| 539 | CONFIG_IP_ROUTE_CLASSID=y | ||
| 540 | CONFIG_IP_PNP=y | ||
| 541 | CONFIG_IP_PNP_DHCP=y | ||
| 542 | CONFIG_IP_PNP_BOOTP=y | ||
| 543 | CONFIG_IP_PNP_RARP=y | ||
| 544 | CONFIG_NET_IPIP=m | ||
| 545 | CONFIG_NET_IPGRE_DEMUX=m | ||
| 546 | CONFIG_NET_IPGRE=m | ||
| 547 | # CONFIG_ARPD is not set | ||
| 548 | # CONFIG_SYN_COOKIES is not set | ||
| 549 | CONFIG_INET_AH=m | ||
| 550 | CONFIG_INET_ESP=m | ||
| 551 | CONFIG_INET_IPCOMP=m | ||
| 552 | CONFIG_INET_XFRM_TUNNEL=m | ||
| 553 | CONFIG_INET_TUNNEL=m | ||
| 554 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
| 555 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
| 556 | CONFIG_INET_XFRM_MODE_BEET=y | ||
| 557 | CONFIG_INET_LRO=y | ||
| 558 | CONFIG_INET_DIAG=m | ||
| 559 | CONFIG_INET_TCP_DIAG=m | ||
| 560 | CONFIG_TCP_CONG_ADVANCED=y | ||
| 561 | CONFIG_TCP_CONG_BIC=m | ||
| 562 | CONFIG_TCP_CONG_CUBIC=y | ||
| 563 | CONFIG_TCP_CONG_WESTWOOD=m | ||
| 564 | CONFIG_TCP_CONG_HTCP=m | ||
| 565 | CONFIG_TCP_CONG_HSTCP=m | ||
| 566 | CONFIG_TCP_CONG_HYBLA=m | ||
| 567 | CONFIG_TCP_CONG_VEGAS=m | ||
| 568 | CONFIG_TCP_CONG_SCALABLE=m | ||
| 569 | CONFIG_TCP_CONG_LP=m | ||
| 570 | CONFIG_TCP_CONG_VENO=m | ||
| 571 | CONFIG_TCP_CONG_YEAH=m | ||
| 572 | CONFIG_TCP_CONG_ILLINOIS=m | ||
| 573 | CONFIG_DEFAULT_CUBIC=y | ||
| 574 | # CONFIG_DEFAULT_RENO is not set | ||
| 575 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
| 576 | # CONFIG_TCP_MD5SIG is not set | ||
| 577 | CONFIG_IPV6=m | ||
| 578 | # CONFIG_IPV6_PRIVACY is not set | ||
| 579 | # CONFIG_IPV6_ROUTER_PREF is not set | ||
| 580 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
| 581 | CONFIG_INET6_AH=m | ||
| 582 | CONFIG_INET6_ESP=m | ||
| 583 | CONFIG_INET6_IPCOMP=m | ||
| 584 | CONFIG_IPV6_MIP6=m | ||
| 585 | CONFIG_INET6_XFRM_TUNNEL=m | ||
| 586 | CONFIG_INET6_TUNNEL=m | ||
| 587 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
| 588 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
| 589 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
| 590 | CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m | ||
| 591 | CONFIG_IPV6_SIT=m | ||
| 592 | # CONFIG_IPV6_SIT_6RD is not set | ||
| 593 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
| 594 | CONFIG_IPV6_TUNNEL=m | ||
| 595 | CONFIG_IPV6_MULTIPLE_TABLES=y | ||
| 596 | CONFIG_IPV6_SUBTREES=y | ||
| 597 | CONFIG_IPV6_MROUTE=y | ||
| 598 | CONFIG_IPV6_MROUTE_MULTIPLE_TABLES=y | ||
| 599 | # CONFIG_IPV6_PIMSM_V2 is not set | ||
| 600 | # CONFIG_NETWORK_SECMARK is not set | ||
| 601 | CONFIG_NETWORK_PHY_TIMESTAMPING=y | ||
| 602 | CONFIG_NETFILTER=y | ||
| 603 | # CONFIG_NETFILTER_DEBUG is not set | ||
| 604 | CONFIG_NETFILTER_ADVANCED=y | ||
| 605 | CONFIG_BRIDGE_NETFILTER=y | ||
| 606 | |||
| 607 | # | ||
| 608 | # Core Netfilter Configuration | ||
| 609 | # | ||
| 610 | CONFIG_NETFILTER_NETLINK=m | ||
| 611 | CONFIG_NETFILTER_NETLINK_QUEUE=m | ||
| 612 | CONFIG_NETFILTER_NETLINK_LOG=m | ||
| 613 | CONFIG_NF_CONNTRACK=m | ||
| 614 | CONFIG_NF_CONNTRACK_MARK=y | ||
| 615 | CONFIG_NF_CONNTRACK_ZONES=y | ||
| 616 | CONFIG_NF_CONNTRACK_EVENTS=y | ||
| 617 | CONFIG_NF_CONNTRACK_TIMESTAMP=y | ||
| 618 | CONFIG_NF_CT_PROTO_DCCP=m | ||
| 619 | CONFIG_NF_CT_PROTO_GRE=m | ||
| 620 | CONFIG_NF_CT_PROTO_SCTP=m | ||
| 621 | CONFIG_NF_CT_PROTO_UDPLITE=m | ||
| 622 | CONFIG_NF_CONNTRACK_AMANDA=m | ||
| 623 | CONFIG_NF_CONNTRACK_FTP=m | ||
| 624 | CONFIG_NF_CONNTRACK_H323=m | ||
| 625 | CONFIG_NF_CONNTRACK_IRC=m | ||
| 626 | CONFIG_NF_CONNTRACK_BROADCAST=m | ||
| 627 | CONFIG_NF_CONNTRACK_NETBIOS_NS=m | ||
| 628 | CONFIG_NF_CONNTRACK_SNMP=m | ||
| 629 | CONFIG_NF_CONNTRACK_PPTP=m | ||
| 630 | CONFIG_NF_CONNTRACK_SANE=m | ||
| 631 | CONFIG_NF_CONNTRACK_SIP=m | ||
| 632 | CONFIG_NF_CONNTRACK_TFTP=m | ||
| 633 | CONFIG_NF_CT_NETLINK=m | ||
| 634 | # CONFIG_NETFILTER_TPROXY is not set | ||
| 635 | CONFIG_NETFILTER_XTABLES=m | ||
| 636 | |||
| 637 | # | ||
| 638 | # Xtables combined modules | ||
| 639 | # | ||
| 640 | CONFIG_NETFILTER_XT_MARK=m | ||
| 641 | CONFIG_NETFILTER_XT_CONNMARK=m | ||
| 642 | CONFIG_NETFILTER_XT_SET=m | ||
| 643 | |||
| 644 | # | ||
| 645 | # Xtables targets | ||
| 646 | # | ||
| 647 | CONFIG_NETFILTER_XT_TARGET_CHECKSUM=m | ||
| 648 | CONFIG_NETFILTER_XT_TARGET_CLASSIFY=m | ||
| 649 | CONFIG_NETFILTER_XT_TARGET_CONNMARK=m | ||
| 650 | CONFIG_NETFILTER_XT_TARGET_CT=m | ||
| 651 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set | ||
| 652 | CONFIG_NETFILTER_XT_TARGET_HL=m | ||
| 653 | CONFIG_NETFILTER_XT_TARGET_IDLETIMER=m | ||
| 654 | # CONFIG_NETFILTER_XT_TARGET_LED is not set | ||
| 655 | CONFIG_NETFILTER_XT_TARGET_MARK=m | ||
| 656 | CONFIG_NETFILTER_XT_TARGET_NFLOG=m | ||
| 657 | CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m | ||
| 658 | # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set | ||
| 659 | CONFIG_NETFILTER_XT_TARGET_RATEEST=m | ||
| 660 | CONFIG_NETFILTER_XT_TARGET_TEE=m | ||
| 661 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set | ||
| 662 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=m | ||
| 663 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set | ||
| 664 | |||
| 665 | # | ||
| 666 | # Xtables matches | ||
| 667 | # | ||
| 668 | CONFIG_NETFILTER_XT_MATCH_ADDRTYPE=m | ||
| 669 | # CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set | ||
| 670 | CONFIG_NETFILTER_XT_MATCH_COMMENT=m | ||
| 671 | CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m | ||
| 672 | CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m | ||
| 673 | CONFIG_NETFILTER_XT_MATCH_CONNMARK=m | ||
| 674 | CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m | ||
| 675 | CONFIG_NETFILTER_XT_MATCH_CPU=m | ||
| 676 | CONFIG_NETFILTER_XT_MATCH_DCCP=m | ||
| 677 | CONFIG_NETFILTER_XT_MATCH_DEVGROUP=m | ||
| 678 | CONFIG_NETFILTER_XT_MATCH_DSCP=m | ||
| 679 | CONFIG_NETFILTER_XT_MATCH_ESP=m | ||
| 680 | CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m | ||
| 681 | CONFIG_NETFILTER_XT_MATCH_HELPER=m | ||
| 682 | CONFIG_NETFILTER_XT_MATCH_HL=m | ||
| 683 | CONFIG_NETFILTER_XT_MATCH_IPRANGE=m | ||
| 684 | CONFIG_NETFILTER_XT_MATCH_IPVS=m | ||
| 685 | CONFIG_NETFILTER_XT_MATCH_LENGTH=m | ||
| 686 | CONFIG_NETFILTER_XT_MATCH_LIMIT=m | ||
| 687 | CONFIG_NETFILTER_XT_MATCH_MAC=m | ||
| 688 | CONFIG_NETFILTER_XT_MATCH_MARK=m | ||
| 689 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | ||
| 690 | # CONFIG_NETFILTER_XT_MATCH_OSF is not set | ||
| 691 | CONFIG_NETFILTER_XT_MATCH_OWNER=m | ||
| 692 | CONFIG_NETFILTER_XT_MATCH_POLICY=m | ||
| 693 | # CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set | ||
| 694 | CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m | ||
| 695 | CONFIG_NETFILTER_XT_MATCH_QUOTA=m | ||
| 696 | CONFIG_NETFILTER_XT_MATCH_RATEEST=m | ||
| 697 | CONFIG_NETFILTER_XT_MATCH_REALM=m | ||
| 698 | CONFIG_NETFILTER_XT_MATCH_RECENT=m | ||
| 699 | CONFIG_NETFILTER_XT_MATCH_SCTP=m | ||
| 700 | CONFIG_NETFILTER_XT_MATCH_STATE=m | ||
| 701 | CONFIG_NETFILTER_XT_MATCH_STATISTIC=m | ||
| 702 | CONFIG_NETFILTER_XT_MATCH_STRING=m | ||
| 703 | CONFIG_NETFILTER_XT_MATCH_TCPMSS=m | ||
| 704 | CONFIG_NETFILTER_XT_MATCH_TIME=m | ||
| 705 | CONFIG_NETFILTER_XT_MATCH_U32=m | ||
| 706 | CONFIG_IP_SET=m | ||
| 707 | CONFIG_IP_SET_MAX=256 | ||
| 708 | # CONFIG_IP_SET_BITMAP_IP is not set | ||
| 709 | # CONFIG_IP_SET_BITMAP_IPMAC is not set | ||
| 710 | # CONFIG_IP_SET_BITMAP_PORT is not set | ||
| 711 | # CONFIG_IP_SET_HASH_IP is not set | ||
| 712 | # CONFIG_IP_SET_HASH_IPPORT is not set | ||
| 713 | # CONFIG_IP_SET_HASH_IPPORTIP is not set | ||
| 714 | # CONFIG_IP_SET_HASH_IPPORTNET is not set | ||
| 715 | # CONFIG_IP_SET_HASH_NET is not set | ||
| 716 | # CONFIG_IP_SET_HASH_NETPORT is not set | ||
| 717 | # CONFIG_IP_SET_LIST_SET is not set | ||
| 718 | CONFIG_IP_VS=m | ||
| 719 | CONFIG_IP_VS_IPV6=y | ||
| 720 | CONFIG_IP_VS_DEBUG=y | ||
| 721 | CONFIG_IP_VS_TAB_BITS=12 | ||
| 722 | |||
| 723 | # | ||
| 724 | # IPVS transport protocol load balancing support | ||
| 725 | # | ||
| 726 | CONFIG_IP_VS_PROTO_TCP=y | ||
| 727 | CONFIG_IP_VS_PROTO_UDP=y | ||
| 728 | CONFIG_IP_VS_PROTO_AH_ESP=y | ||
| 729 | CONFIG_IP_VS_PROTO_ESP=y | ||
| 730 | CONFIG_IP_VS_PROTO_AH=y | ||
| 731 | # CONFIG_IP_VS_PROTO_SCTP is not set | ||
| 732 | |||
| 733 | # | ||
| 734 | # IPVS scheduler | ||
| 735 | # | ||
| 736 | CONFIG_IP_VS_RR=m | ||
| 737 | CONFIG_IP_VS_WRR=m | ||
| 738 | CONFIG_IP_VS_LC=m | ||
| 739 | CONFIG_IP_VS_WLC=m | ||
| 740 | CONFIG_IP_VS_LBLC=m | ||
| 741 | CONFIG_IP_VS_LBLCR=m | ||
| 742 | CONFIG_IP_VS_DH=m | ||
| 743 | CONFIG_IP_VS_SH=m | ||
| 744 | CONFIG_IP_VS_SED=m | ||
| 745 | CONFIG_IP_VS_NQ=m | ||
| 746 | |||
| 747 | # | ||
| 748 | # IPVS application helper | ||
| 749 | # | ||
| 750 | CONFIG_IP_VS_FTP=m | ||
| 751 | CONFIG_IP_VS_NFCT=y | ||
| 752 | CONFIG_IP_VS_PE_SIP=m | ||
| 753 | |||
| 754 | # | ||
| 755 | # IP: Netfilter Configuration | ||
| 756 | # | ||
| 757 | CONFIG_NF_DEFRAG_IPV4=m | ||
| 758 | CONFIG_NF_CONNTRACK_IPV4=m | ||
| 759 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y | ||
| 760 | CONFIG_IP_NF_QUEUE=m | ||
| 761 | CONFIG_IP_NF_IPTABLES=m | ||
| 762 | CONFIG_IP_NF_MATCH_AH=m | ||
| 763 | CONFIG_IP_NF_MATCH_ECN=m | ||
| 764 | CONFIG_IP_NF_MATCH_TTL=m | ||
| 765 | CONFIG_IP_NF_FILTER=m | ||
| 766 | CONFIG_IP_NF_TARGET_REJECT=m | ||
| 767 | CONFIG_IP_NF_TARGET_LOG=m | ||
| 768 | CONFIG_IP_NF_TARGET_ULOG=m | ||
| 769 | CONFIG_NF_NAT=m | ||
| 770 | CONFIG_NF_NAT_NEEDED=y | ||
| 771 | CONFIG_IP_NF_TARGET_MASQUERADE=m | ||
| 772 | CONFIG_IP_NF_TARGET_NETMAP=m | ||
| 773 | CONFIG_IP_NF_TARGET_REDIRECT=m | ||
| 774 | CONFIG_NF_NAT_SNMP_BASIC=m | ||
| 775 | CONFIG_NF_NAT_PROTO_DCCP=m | ||
| 776 | CONFIG_NF_NAT_PROTO_GRE=m | ||
| 777 | CONFIG_NF_NAT_PROTO_UDPLITE=m | ||
| 778 | CONFIG_NF_NAT_PROTO_SCTP=m | ||
| 779 | CONFIG_NF_NAT_FTP=m | ||
| 780 | CONFIG_NF_NAT_IRC=m | ||
| 781 | CONFIG_NF_NAT_TFTP=m | ||
| 782 | CONFIG_NF_NAT_AMANDA=m | ||
| 783 | CONFIG_NF_NAT_PPTP=m | ||
| 784 | CONFIG_NF_NAT_H323=m | ||
| 785 | CONFIG_NF_NAT_SIP=m | ||
| 786 | CONFIG_IP_NF_MANGLE=m | ||
| 787 | CONFIG_IP_NF_TARGET_CLUSTERIP=m | ||
| 788 | CONFIG_IP_NF_TARGET_ECN=m | ||
| 789 | CONFIG_IP_NF_TARGET_TTL=m | ||
| 790 | CONFIG_IP_NF_RAW=m | ||
| 791 | CONFIG_IP_NF_ARPTABLES=m | ||
| 792 | CONFIG_IP_NF_ARPFILTER=m | ||
| 793 | CONFIG_IP_NF_ARP_MANGLE=m | ||
| 794 | |||
| 795 | # | ||
| 796 | # IPv6: Netfilter Configuration | ||
| 797 | # | ||
| 798 | CONFIG_NF_DEFRAG_IPV6=m | ||
| 799 | CONFIG_NF_CONNTRACK_IPV6=m | ||
| 800 | CONFIG_IP6_NF_QUEUE=m | ||
| 801 | CONFIG_IP6_NF_IPTABLES=m | ||
| 802 | CONFIG_IP6_NF_MATCH_AH=m | ||
| 803 | CONFIG_IP6_NF_MATCH_EUI64=m | ||
| 804 | CONFIG_IP6_NF_MATCH_FRAG=m | ||
| 805 | CONFIG_IP6_NF_MATCH_OPTS=m | ||
| 806 | CONFIG_IP6_NF_MATCH_HL=m | ||
| 807 | CONFIG_IP6_NF_MATCH_IPV6HEADER=m | ||
| 808 | CONFIG_IP6_NF_MATCH_MH=m | ||
| 809 | CONFIG_IP6_NF_MATCH_RT=m | ||
| 810 | CONFIG_IP6_NF_TARGET_HL=m | ||
| 811 | CONFIG_IP6_NF_TARGET_LOG=m | ||
| 812 | CONFIG_IP6_NF_FILTER=m | ||
| 813 | CONFIG_IP6_NF_TARGET_REJECT=m | ||
| 814 | CONFIG_IP6_NF_MANGLE=m | ||
| 815 | CONFIG_IP6_NF_RAW=m | ||
| 816 | # CONFIG_BRIDGE_NF_EBTABLES is not set | ||
| 817 | CONFIG_IP_DCCP=m | ||
| 818 | CONFIG_INET_DCCP_DIAG=m | ||
| 819 | |||
| 820 | # | ||
| 821 | # DCCP CCIDs Configuration (EXPERIMENTAL) | ||
| 822 | # | ||
| 823 | # CONFIG_IP_DCCP_CCID2_DEBUG is not set | ||
| 824 | CONFIG_IP_DCCP_CCID3=y | ||
| 825 | # CONFIG_IP_DCCP_CCID3_DEBUG is not set | ||
| 826 | CONFIG_IP_DCCP_TFRC_LIB=y | ||
| 827 | |||
| 828 | # | ||
| 829 | # DCCP Kernel Hacking | ||
| 830 | # | ||
| 831 | # CONFIG_IP_DCCP_DEBUG is not set | ||
| 832 | CONFIG_IP_SCTP=m | ||
| 833 | # CONFIG_SCTP_DBG_MSG is not set | ||
| 834 | # CONFIG_SCTP_DBG_OBJCNT is not set | ||
| 835 | # CONFIG_SCTP_HMAC_NONE is not set | ||
| 836 | # CONFIG_SCTP_HMAC_SHA1 is not set | ||
| 837 | CONFIG_SCTP_HMAC_MD5=y | ||
| 838 | # CONFIG_RDS is not set | ||
| 839 | CONFIG_TIPC=m | ||
| 840 | # CONFIG_TIPC_ADVANCED is not set | ||
| 841 | # CONFIG_TIPC_DEBUG is not set | ||
| 842 | CONFIG_ATM=m | ||
| 843 | CONFIG_ATM_CLIP=m | ||
| 844 | # CONFIG_ATM_CLIP_NO_ICMP is not set | ||
| 845 | CONFIG_ATM_LANE=m | ||
| 846 | CONFIG_ATM_MPOA=m | ||
| 847 | CONFIG_ATM_BR2684=m | ||
| 848 | # CONFIG_ATM_BR2684_IPFILTER is not set | ||
| 849 | CONFIG_L2TP=m | ||
| 850 | CONFIG_L2TP_DEBUGFS=m | ||
| 851 | CONFIG_L2TP_V3=y | ||
| 852 | CONFIG_L2TP_IP=m | ||
| 853 | CONFIG_L2TP_ETH=m | ||
| 854 | CONFIG_STP=m | ||
| 855 | CONFIG_GARP=m | ||
| 856 | CONFIG_BRIDGE=m | ||
| 857 | CONFIG_BRIDGE_IGMP_SNOOPING=y | ||
| 858 | # CONFIG_NET_DSA is not set | ||
| 859 | CONFIG_VLAN_8021Q=m | ||
| 860 | CONFIG_VLAN_8021Q_GVRP=y | ||
| 861 | # CONFIG_DECNET is not set | ||
| 862 | CONFIG_LLC=m | ||
| 863 | # CONFIG_LLC2 is not set | ||
| 864 | # CONFIG_IPX is not set | ||
| 865 | # CONFIG_ATALK is not set | ||
| 866 | # CONFIG_X25 is not set | ||
| 867 | # CONFIG_LAPB is not set | ||
| 868 | # CONFIG_ECONET is not set | ||
| 869 | CONFIG_WAN_ROUTER=m | ||
| 870 | # CONFIG_PHONET is not set | ||
| 871 | # CONFIG_IEEE802154 is not set | ||
| 872 | CONFIG_NET_SCHED=y | ||
| 873 | |||
| 874 | # | ||
| 875 | # Queueing/Scheduling | ||
| 876 | # | ||
| 877 | CONFIG_NET_SCH_CBQ=m | ||
| 878 | CONFIG_NET_SCH_HTB=m | ||
| 879 | CONFIG_NET_SCH_HFSC=m | ||
| 880 | CONFIG_NET_SCH_ATM=m | ||
| 881 | CONFIG_NET_SCH_PRIO=m | ||
| 882 | CONFIG_NET_SCH_MULTIQ=m | ||
| 883 | CONFIG_NET_SCH_RED=m | ||
| 884 | # CONFIG_NET_SCH_SFB is not set | ||
| 885 | CONFIG_NET_SCH_SFQ=m | ||
| 886 | CONFIG_NET_SCH_TEQL=m | ||
| 887 | CONFIG_NET_SCH_TBF=m | ||
| 888 | CONFIG_NET_SCH_GRED=m | ||
| 889 | CONFIG_NET_SCH_DSMARK=m | ||
| 890 | CONFIG_NET_SCH_NETEM=m | ||
| 891 | CONFIG_NET_SCH_DRR=m | ||
| 892 | CONFIG_NET_SCH_MQPRIO=m | ||
| 893 | CONFIG_NET_SCH_CHOKE=m | ||
| 894 | # CONFIG_NET_SCH_QFQ is not set | ||
| 895 | |||
| 896 | # | ||
| 897 | # Classification | ||
| 898 | # | ||
| 899 | CONFIG_NET_CLS=y | ||
| 900 | CONFIG_NET_CLS_BASIC=m | ||
| 901 | CONFIG_NET_CLS_TCINDEX=m | ||
| 902 | CONFIG_NET_CLS_ROUTE4=m | ||
| 903 | CONFIG_NET_CLS_FW=m | ||
| 904 | CONFIG_NET_CLS_U32=m | ||
| 905 | CONFIG_CLS_U32_PERF=y | ||
| 906 | CONFIG_CLS_U32_MARK=y | ||
| 907 | CONFIG_NET_CLS_RSVP=m | ||
| 908 | CONFIG_NET_CLS_RSVP6=m | ||
| 909 | CONFIG_NET_CLS_FLOW=m | ||
| 910 | CONFIG_NET_CLS_CGROUP=m | ||
| 911 | # CONFIG_NET_EMATCH is not set | ||
| 912 | # CONFIG_NET_CLS_ACT is not set | ||
| 913 | CONFIG_NET_CLS_IND=y | ||
| 914 | CONFIG_NET_SCH_FIFO=y | ||
| 915 | # CONFIG_DCB is not set | ||
| 916 | CONFIG_DNS_RESOLVER=y | ||
| 917 | # CONFIG_BATMAN_ADV is not set | ||
| 918 | |||
| 919 | # | ||
| 920 | # Network testing | ||
| 921 | # | ||
| 922 | # CONFIG_NET_PKTGEN is not set | ||
| 923 | # CONFIG_HAMRADIO is not set | ||
| 924 | CONFIG_CAN=m | ||
| 925 | CONFIG_CAN_RAW=m | ||
| 926 | CONFIG_CAN_BCM=m | ||
| 927 | |||
| 928 | # | ||
| 929 | # CAN Device Drivers | ||
| 930 | # | ||
| 931 | CONFIG_CAN_VCAN=m | ||
| 932 | CONFIG_CAN_SLCAN=m | ||
| 933 | # CONFIG_CAN_DEV is not set | ||
| 934 | # CONFIG_CAN_DEBUG_DEVICES is not set | ||
| 935 | CONFIG_IRDA=m | ||
| 936 | |||
| 937 | # | ||
| 938 | # IrDA protocols | ||
| 939 | # | ||
| 940 | CONFIG_IRLAN=m | ||
| 941 | CONFIG_IRNET=m | ||
| 942 | CONFIG_IRCOMM=m | ||
| 943 | CONFIG_IRDA_ULTRA=y | ||
| 944 | |||
| 945 | # | ||
| 946 | # IrDA options | ||
| 947 | # | ||
| 948 | CONFIG_IRDA_CACHE_LAST_LSAP=y | ||
| 949 | CONFIG_IRDA_FAST_RR=y | ||
| 950 | CONFIG_IRDA_DEBUG=y | ||
| 951 | |||
| 952 | # | ||
| 953 | # Infrared-port device drivers | ||
| 954 | # | ||
| 955 | |||
| 956 | # | ||
| 957 | # SIR device drivers | ||
| 958 | # | ||
| 959 | CONFIG_IRTTY_SIR=m | ||
| 960 | |||
| 961 | # | ||
| 962 | # Dongle support | ||
| 963 | # | ||
| 964 | CONFIG_DONGLE=y | ||
| 965 | CONFIG_ESI_DONGLE=m | ||
| 966 | CONFIG_ACTISYS_DONGLE=m | ||
| 967 | CONFIG_TEKRAM_DONGLE=m | ||
| 968 | CONFIG_TOIM3232_DONGLE=m | ||
| 969 | CONFIG_LITELINK_DONGLE=m | ||
| 970 | CONFIG_MA600_DONGLE=m | ||
| 971 | CONFIG_GIRBIL_DONGLE=m | ||
| 972 | CONFIG_MCP2120_DONGLE=m | ||
| 973 | CONFIG_OLD_BELKIN_DONGLE=m | ||
| 974 | # CONFIG_ACT200L_DONGLE is not set | ||
| 975 | CONFIG_KINGSUN_DONGLE=m | ||
| 976 | CONFIG_KSDAZZLE_DONGLE=m | ||
| 977 | CONFIG_KS959_DONGLE=m | ||
| 978 | |||
| 979 | # | ||
| 980 | # FIR device drivers | ||
| 981 | # | ||
| 982 | CONFIG_USB_IRDA=m | ||
| 983 | CONFIG_SIGMATEL_FIR=m | ||
| 984 | CONFIG_MCS_FIR=m | ||
| 985 | CONFIG_BT=y | ||
| 986 | CONFIG_BT_L2CAP=y | ||
| 987 | CONFIG_BT_SCO=y | ||
| 988 | CONFIG_BT_RFCOMM=m | ||
| 989 | CONFIG_BT_RFCOMM_TTY=y | ||
| 990 | CONFIG_BT_BNEP=m | ||
| 991 | CONFIG_BT_BNEP_MC_FILTER=y | ||
| 992 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
| 993 | CONFIG_BT_HIDP=m | ||
| 994 | |||
| 995 | # | ||
| 996 | # Bluetooth device drivers | ||
| 997 | # | ||
| 998 | CONFIG_BT_HCIBTUSB=y | ||
| 999 | CONFIG_BT_HCIBTSDIO=m | ||
| 1000 | CONFIG_BT_HCIUART=y | ||
| 1001 | CONFIG_BT_HCIUART_H4=y | ||
| 1002 | CONFIG_BT_HCIUART_BCSP=y | ||
| 1003 | CONFIG_BT_HCIUART_ATH3K=y | ||
| 1004 | CONFIG_BT_HCIUART_LL=y | ||
| 1005 | CONFIG_BT_HCIBCM203X=m | ||
| 1006 | CONFIG_BT_HCIBPA10X=m | ||
| 1007 | CONFIG_BT_HCIBFUSB=m | ||
| 1008 | # CONFIG_BT_HCIVHCI is not set | ||
| 1009 | CONFIG_BT_MRVL=m | ||
| 1010 | # CONFIG_BT_MRVL_SDIO is not set | ||
| 1011 | CONFIG_BT_ATH3K=m | ||
| 1012 | CONFIG_BT_WILINK=m | ||
| 1013 | CONFIG_AF_RXRPC=m | ||
| 1014 | # CONFIG_AF_RXRPC_DEBUG is not set | ||
| 1015 | # CONFIG_RXKAD is not set | ||
| 1016 | CONFIG_FIB_RULES=y | ||
| 1017 | CONFIG_WIRELESS=y | ||
| 1018 | CONFIG_WIRELESS_EXT=y | ||
| 1019 | CONFIG_WEXT_CORE=y | ||
| 1020 | CONFIG_WEXT_PROC=y | ||
| 1021 | CONFIG_WEXT_SPY=y | ||
| 1022 | CONFIG_WEXT_PRIV=y | ||
| 1023 | CONFIG_CFG80211=m | ||
| 1024 | CONFIG_NL80211_TESTMODE=y | ||
| 1025 | # CONFIG_CFG80211_DEVELOPER_WARNINGS is not set | ||
| 1026 | # CONFIG_CFG80211_REG_DEBUG is not set | ||
| 1027 | CONFIG_CFG80211_DEFAULT_PS=y | ||
| 1028 | # CONFIG_CFG80211_DEBUGFS is not set | ||
| 1029 | # CONFIG_CFG80211_INTERNAL_REGDB is not set | ||
| 1030 | CONFIG_CFG80211_WEXT=y | ||
| 1031 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
| 1032 | CONFIG_LIB80211=y | ||
| 1033 | CONFIG_LIB80211_CRYPT_WEP=m | ||
| 1034 | CONFIG_LIB80211_CRYPT_CCMP=m | ||
| 1035 | CONFIG_LIB80211_CRYPT_TKIP=m | ||
| 1036 | # CONFIG_LIB80211_DEBUG is not set | ||
| 1037 | CONFIG_MAC80211=m | ||
| 1038 | CONFIG_MAC80211_HAS_RC=y | ||
| 1039 | CONFIG_MAC80211_RC_PID=y | ||
| 1040 | # CONFIG_MAC80211_RC_MINSTREL is not set | ||
| 1041 | CONFIG_MAC80211_RC_DEFAULT_PID=y | ||
| 1042 | CONFIG_MAC80211_RC_DEFAULT="pid" | ||
| 1043 | # CONFIG_MAC80211_MESH is not set | ||
| 1044 | CONFIG_MAC80211_LEDS=y | ||
| 1045 | # CONFIG_MAC80211_DEBUGFS is not set | ||
| 1046 | # CONFIG_MAC80211_DEBUG_MENU is not set | ||
| 1047 | CONFIG_WIMAX=m | ||
| 1048 | CONFIG_WIMAX_DEBUG_LEVEL=8 | ||
| 1049 | CONFIG_RFKILL=y | ||
| 1050 | CONFIG_RFKILL_LEDS=y | ||
| 1051 | CONFIG_RFKILL_INPUT=y | ||
| 1052 | # CONFIG_RFKILL_REGULATOR is not set | ||
| 1053 | # CONFIG_RFKILL_GPIO is not set | ||
| 1054 | CONFIG_NET_9P=m | ||
| 1055 | # CONFIG_NET_9P_DEBUG is not set | ||
| 1056 | # CONFIG_CAIF is not set | ||
| 1057 | CONFIG_CEPH_LIB=m | ||
| 1058 | # CONFIG_CEPH_LIB_PRETTYDEBUG is not set | ||
| 1059 | |||
| 1060 | # | ||
| 1061 | # Device Drivers | ||
| 1062 | # | ||
| 1063 | |||
| 1064 | # | ||
| 1065 | # Generic Driver Options | ||
| 1066 | # | ||
| 1067 | CONFIG_UEVENT_HELPER_PATH="" | ||
| 1068 | CONFIG_DEVTMPFS=y | ||
| 1069 | CONFIG_DEVTMPFS_MOUNT=y | ||
| 1070 | CONFIG_STANDALONE=y | ||
| 1071 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
| 1072 | CONFIG_FW_LOADER=y | ||
| 1073 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
| 1074 | CONFIG_EXTRA_FIRMWARE="" | ||
| 1075 | # CONFIG_DEBUG_DRIVER is not set | ||
| 1076 | # CONFIG_DEBUG_DEVRES is not set | ||
| 1077 | # CONFIG_SYS_HYPERVISOR is not set | ||
| 1078 | # CONFIG_CONNECTOR is not set | ||
| 1079 | CONFIG_MTD=y | ||
| 1080 | # CONFIG_MTD_DEBUG is not set | ||
| 1081 | # CONFIG_MTD_TESTS is not set | ||
| 1082 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
| 1083 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
| 1084 | # CONFIG_MTD_AFS_PARTS is not set | ||
| 1085 | # CONFIG_MTD_AR7_PARTS is not set | ||
| 1086 | |||
| 1087 | # | ||
| 1088 | # User Modules And Translation Layers | ||
| 1089 | # | ||
| 1090 | CONFIG_MTD_CHAR=y | ||
| 1091 | CONFIG_MTD_BLKDEVS=y | ||
| 1092 | CONFIG_MTD_BLOCK=y | ||
| 1093 | # CONFIG_FTL is not set | ||
| 1094 | # CONFIG_NFTL is not set | ||
| 1095 | # CONFIG_INFTL is not set | ||
| 1096 | # CONFIG_RFD_FTL is not set | ||
| 1097 | # CONFIG_SSFDC is not set | ||
| 1098 | CONFIG_SM_FTL=m | ||
| 1099 | # CONFIG_MTD_OOPS is not set | ||
| 1100 | CONFIG_MTD_SWAP=m | ||
| 1101 | |||
| 1102 | # | ||
| 1103 | # RAM/ROM/Flash chip drivers | ||
| 1104 | # | ||
| 1105 | # CONFIG_MTD_CFI is not set | ||
| 1106 | # CONFIG_MTD_JEDECPROBE is not set | ||
| 1107 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
| 1108 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
| 1109 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
| 1110 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
| 1111 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
| 1112 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
| 1113 | CONFIG_MTD_CFI_I1=y | ||
| 1114 | CONFIG_MTD_CFI_I2=y | ||
| 1115 | # CONFIG_MTD_CFI_I4 is not set | ||
| 1116 | # CONFIG_MTD_CFI_I8 is not set | ||
| 1117 | # CONFIG_MTD_RAM is not set | ||
| 1118 | # CONFIG_MTD_ROM is not set | ||
| 1119 | # CONFIG_MTD_ABSENT is not set | ||
| 1120 | |||
| 1121 | # | ||
| 1122 | # Mapping drivers for chip access | ||
| 1123 | # | ||
| 1124 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
| 1125 | # CONFIG_MTD_PLATRAM is not set | ||
| 1126 | |||
| 1127 | # | ||
| 1128 | # Self-contained MTD device drivers | ||
| 1129 | # | ||
| 1130 | # CONFIG_MTD_DATAFLASH is not set | ||
| 1131 | # CONFIG_MTD_M25P80 is not set | ||
| 1132 | # CONFIG_MTD_SST25L is not set | ||
| 1133 | # CONFIG_MTD_SLRAM is not set | ||
| 1134 | # CONFIG_MTD_PHRAM is not set | ||
| 1135 | # CONFIG_MTD_MTDRAM is not set | ||
| 1136 | # CONFIG_MTD_BLOCK2MTD is not set | ||
| 1137 | |||
| 1138 | # | ||
| 1139 | # Disk-On-Chip Device Drivers | ||
| 1140 | # | ||
| 1141 | # CONFIG_MTD_DOC2000 is not set | ||
| 1142 | # CONFIG_MTD_DOC2001 is not set | ||
| 1143 | # CONFIG_MTD_DOC2001PLUS is not set | ||
| 1144 | CONFIG_MTD_NAND_ECC=y | ||
| 1145 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
| 1146 | CONFIG_MTD_NAND=y | ||
| 1147 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
| 1148 | # CONFIG_MTD_NAND_ECC_BCH is not set | ||
| 1149 | # CONFIG_MTD_SM_COMMON is not set | ||
| 1150 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
| 1151 | # CONFIG_MTD_NAND_GPIO is not set | ||
| 1152 | CONFIG_MTD_NAND_OMAP2=y | ||
| 1153 | CONFIG_MTD_NAND_IDS=y | ||
| 1154 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
| 1155 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
| 1156 | CONFIG_MTD_NAND_PLATFORM=y | ||
| 1157 | # CONFIG_MTD_ALAUDA is not set | ||
| 1158 | # CONFIG_MTD_ONENAND is not set | ||
| 1159 | |||
| 1160 | # | ||
| 1161 | # LPDDR flash memory drivers | ||
| 1162 | # | ||
| 1163 | # CONFIG_MTD_LPDDR is not set | ||
| 1164 | CONFIG_MTD_UBI=y | ||
| 1165 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||
| 1166 | CONFIG_MTD_UBI_BEB_RESERVE=1 | ||
| 1167 | # CONFIG_MTD_UBI_GLUEBI is not set | ||
| 1168 | # CONFIG_MTD_UBI_DEBUG is not set | ||
| 1169 | # CONFIG_PARPORT is not set | ||
| 1170 | CONFIG_BLK_DEV=y | ||
| 1171 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
| 1172 | CONFIG_BLK_DEV_LOOP=y | ||
| 1173 | CONFIG_BLK_DEV_CRYPTOLOOP=m | ||
| 1174 | |||
| 1175 | # | ||
| 1176 | # DRBD disabled because PROC_FS, INET or CONNECTOR not selected | ||
| 1177 | # | ||
| 1178 | # CONFIG_BLK_DEV_NBD is not set | ||
| 1179 | # CONFIG_BLK_DEV_UB is not set | ||
| 1180 | CONFIG_BLK_DEV_RAM=y | ||
| 1181 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
| 1182 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
| 1183 | # CONFIG_BLK_DEV_XIP is not set | ||
| 1184 | CONFIG_CDROM_PKTCDVD=m | ||
| 1185 | CONFIG_CDROM_PKTCDVD_BUFFERS=8 | ||
| 1186 | # CONFIG_CDROM_PKTCDVD_WCACHE is not set | ||
| 1187 | # CONFIG_ATA_OVER_ETH is not set | ||
| 1188 | # CONFIG_MG_DISK is not set | ||
| 1189 | # CONFIG_BLK_DEV_RBD is not set | ||
| 1190 | # CONFIG_SENSORS_LIS3LV02D is not set | ||
| 1191 | CONFIG_MISC_DEVICES=y | ||
| 1192 | # CONFIG_AD525X_DPOT is not set | ||
| 1193 | # CONFIG_INTEL_MID_PTI is not set | ||
| 1194 | # CONFIG_ICS932S401 is not set | ||
| 1195 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
| 1196 | # CONFIG_APDS9802ALS is not set | ||
| 1197 | # CONFIG_ISL29003 is not set | ||
| 1198 | # CONFIG_ISL29020 is not set | ||
| 1199 | # CONFIG_SENSORS_TSL2550 is not set | ||
| 1200 | CONFIG_SENSORS_BH1780=m | ||
| 1201 | # CONFIG_SENSORS_BH1770 is not set | ||
| 1202 | # CONFIG_SENSORS_APDS990X is not set | ||
| 1203 | CONFIG_HMC6352=m | ||
| 1204 | # CONFIG_DS1682 is not set | ||
| 1205 | # CONFIG_TI_DAC7512 is not set | ||
| 1206 | CONFIG_BMP085=m | ||
| 1207 | # CONFIG_C2PORT is not set | ||
| 1208 | |||
| 1209 | # | ||
| 1210 | # EEPROM support | ||
| 1211 | # | ||
| 1212 | CONFIG_EEPROM_AT24=m | ||
| 1213 | # CONFIG_EEPROM_AT25 is not set | ||
| 1214 | # CONFIG_EEPROM_LEGACY is not set | ||
| 1215 | # CONFIG_EEPROM_MAX6875 is not set | ||
| 1216 | CONFIG_EEPROM_93CX6=y | ||
| 1217 | CONFIG_IWMC3200TOP=m | ||
| 1218 | # CONFIG_IWMC3200TOP_DEBUG is not set | ||
| 1219 | # CONFIG_IWMC3200TOP_DEBUGFS is not set | ||
| 1220 | |||
| 1221 | # | ||
| 1222 | # Texas Instruments shared transport line discipline | ||
| 1223 | # | ||
| 1224 | CONFIG_TI_ST=m | ||
| 1225 | # CONFIG_SENSORS_LIS3_SPI is not set | ||
| 1226 | # CONFIG_SENSORS_LIS3_I2C is not set | ||
| 1227 | CONFIG_HAVE_IDE=y | ||
| 1228 | # CONFIG_IDE is not set | ||
| 1229 | |||
| 1230 | # | ||
| 1231 | # SCSI device support | ||
| 1232 | # | ||
| 1233 | CONFIG_SCSI_MOD=y | ||
| 1234 | CONFIG_RAID_ATTRS=m | ||
| 1235 | CONFIG_SCSI=y | ||
| 1236 | CONFIG_SCSI_DMA=y | ||
| 1237 | # CONFIG_SCSI_TGT is not set | ||
| 1238 | # CONFIG_SCSI_NETLINK is not set | ||
| 1239 | CONFIG_SCSI_PROC_FS=y | ||
| 1240 | |||
| 1241 | # | ||
| 1242 | # SCSI support type (disk, tape, CD-ROM) | ||
| 1243 | # | ||
| 1244 | CONFIG_BLK_DEV_SD=y | ||
| 1245 | # CONFIG_CHR_DEV_ST is not set | ||
| 1246 | # CONFIG_CHR_DEV_OSST is not set | ||
| 1247 | CONFIG_BLK_DEV_SR=y | ||
| 1248 | CONFIG_BLK_DEV_SR_VENDOR=y | ||
| 1249 | CONFIG_CHR_DEV_SG=y | ||
| 1250 | CONFIG_CHR_DEV_SCH=m | ||
| 1251 | CONFIG_SCSI_MULTI_LUN=y | ||
| 1252 | # CONFIG_SCSI_CONSTANTS is not set | ||
| 1253 | # CONFIG_SCSI_LOGGING is not set | ||
| 1254 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
| 1255 | CONFIG_SCSI_WAIT_SCAN=m | ||
| 1256 | |||
| 1257 | # | ||
| 1258 | # SCSI Transports | ||
| 1259 | # | ||
| 1260 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
| 1261 | # CONFIG_SCSI_FC_ATTRS is not set | ||
| 1262 | CONFIG_SCSI_ISCSI_ATTRS=m | ||
| 1263 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
| 1264 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
| 1265 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
| 1266 | CONFIG_SCSI_LOWLEVEL=y | ||
| 1267 | CONFIG_ISCSI_TCP=m | ||
| 1268 | CONFIG_ISCSI_BOOT_SYSFS=m | ||
| 1269 | # CONFIG_LIBFC is not set | ||
| 1270 | # CONFIG_LIBFCOE is not set | ||
| 1271 | # CONFIG_SCSI_DEBUG is not set | ||
| 1272 | # CONFIG_SCSI_DH is not set | ||
| 1273 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
| 1274 | # CONFIG_ATA is not set | ||
| 1275 | CONFIG_MD=y | ||
| 1276 | CONFIG_BLK_DEV_MD=m | ||
| 1277 | CONFIG_MD_LINEAR=m | ||
| 1278 | CONFIG_MD_RAID0=m | ||
| 1279 | CONFIG_MD_RAID1=m | ||
| 1280 | CONFIG_MD_RAID10=m | ||
| 1281 | CONFIG_MD_RAID456=m | ||
| 1282 | CONFIG_MD_MULTIPATH=m | ||
| 1283 | CONFIG_MD_FAULTY=m | ||
| 1284 | CONFIG_BLK_DEV_DM=m | ||
| 1285 | # CONFIG_DM_DEBUG is not set | ||
| 1286 | CONFIG_DM_CRYPT=m | ||
| 1287 | CONFIG_DM_SNAPSHOT=m | ||
| 1288 | CONFIG_DM_MIRROR=m | ||
| 1289 | CONFIG_DM_RAID=m | ||
| 1290 | # CONFIG_DM_LOG_USERSPACE is not set | ||
| 1291 | CONFIG_DM_ZERO=m | ||
| 1292 | CONFIG_DM_MULTIPATH=m | ||
| 1293 | # CONFIG_DM_MULTIPATH_QL is not set | ||
| 1294 | # CONFIG_DM_MULTIPATH_ST is not set | ||
| 1295 | CONFIG_DM_DELAY=m | ||
| 1296 | # CONFIG_DM_UEVENT is not set | ||
| 1297 | CONFIG_DM_FLAKEY=m | ||
| 1298 | CONFIG_TARGET_CORE=m | ||
| 1299 | CONFIG_TCM_IBLOCK=m | ||
| 1300 | CONFIG_TCM_FILEIO=m | ||
| 1301 | CONFIG_TCM_PSCSI=m | ||
| 1302 | CONFIG_LOOPBACK_TARGET=m | ||
| 1303 | # CONFIG_LOOPBACK_TARGET_CDB_DEBUG is not set | ||
| 1304 | CONFIG_NETDEVICES=y | ||
| 1305 | CONFIG_DUMMY=m | ||
| 1306 | CONFIG_BONDING=m | ||
| 1307 | CONFIG_MACVLAN=m | ||
| 1308 | CONFIG_MACVTAP=m | ||
| 1309 | CONFIG_EQUALIZER=m | ||
| 1310 | CONFIG_TUN=m | ||
| 1311 | CONFIG_VETH=m | ||
| 1312 | CONFIG_MII=y | ||
| 1313 | CONFIG_PHYLIB=y | ||
| 1314 | |||
| 1315 | # | ||
| 1316 | # MII PHY device drivers | ||
| 1317 | # | ||
| 1318 | # CONFIG_MARVELL_PHY is not set | ||
| 1319 | # CONFIG_DAVICOM_PHY is not set | ||
| 1320 | # CONFIG_QSEMI_PHY is not set | ||
| 1321 | # CONFIG_LXT_PHY is not set | ||
| 1322 | # CONFIG_CICADA_PHY is not set | ||
| 1323 | # CONFIG_VITESSE_PHY is not set | ||
| 1324 | # CONFIG_SMSC_PHY is not set | ||
| 1325 | # CONFIG_BROADCOM_PHY is not set | ||
| 1326 | # CONFIG_ICPLUS_PHY is not set | ||
| 1327 | # CONFIG_REALTEK_PHY is not set | ||
| 1328 | # CONFIG_NATIONAL_PHY is not set | ||
| 1329 | # CONFIG_STE10XP is not set | ||
| 1330 | # CONFIG_LSI_ET1011C_PHY is not set | ||
| 1331 | CONFIG_MICREL_PHY=m | ||
| 1332 | # CONFIG_FIXED_PHY is not set | ||
| 1333 | # CONFIG_MDIO_BITBANG is not set | ||
| 1334 | CONFIG_NET_ETHERNET=y | ||
| 1335 | # CONFIG_AX88796 is not set | ||
| 1336 | CONFIG_SMC91X=y | ||
| 1337 | # CONFIG_TI_DAVINCI_EMAC is not set | ||
| 1338 | CONFIG_TI_DAVINCI_MDIO=m | ||
| 1339 | CONFIG_TI_DAVINCI_CPDMA=m | ||
| 1340 | # CONFIG_DM9000 is not set | ||
| 1341 | CONFIG_ENC28J60=y | ||
| 1342 | # CONFIG_ENC28J60_WRITEVERIFY is not set | ||
| 1343 | # CONFIG_ETHOC is not set | ||
| 1344 | CONFIG_SMC911X=y | ||
| 1345 | CONFIG_SMSC911X=y | ||
| 1346 | # CONFIG_SMSC911X_ARCH_HOOKS is not set | ||
| 1347 | # CONFIG_DNET is not set | ||
| 1348 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
| 1349 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
| 1350 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
| 1351 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
| 1352 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
| 1353 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
| 1354 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
| 1355 | # CONFIG_B44 is not set | ||
| 1356 | CONFIG_KS8851=y | ||
| 1357 | # CONFIG_KS8851_MLL is not set | ||
| 1358 | # CONFIG_FTMAC100 is not set | ||
| 1359 | # CONFIG_NETDEV_1000 is not set | ||
| 1360 | # CONFIG_NETDEV_10000 is not set | ||
| 1361 | CONFIG_WLAN=y | ||
| 1362 | # CONFIG_LIBERTAS_THINFIRM is not set | ||
| 1363 | CONFIG_AT76C50X_USB=m | ||
| 1364 | CONFIG_USB_ZD1201=m | ||
| 1365 | CONFIG_USB_NET_RNDIS_WLAN=m | ||
| 1366 | CONFIG_RTL8187=m | ||
| 1367 | CONFIG_RTL8187_LEDS=y | ||
| 1368 | # CONFIG_MAC80211_HWSIM is not set | ||
| 1369 | CONFIG_ATH_COMMON=m | ||
| 1370 | # CONFIG_ATH_DEBUG is not set | ||
| 1371 | # CONFIG_ATH9K is not set | ||
| 1372 | # CONFIG_ATH9K_HTC is not set | ||
| 1373 | CONFIG_CARL9170=m | ||
| 1374 | CONFIG_CARL9170_LEDS=y | ||
| 1375 | CONFIG_CARL9170_WPC=y | ||
| 1376 | CONFIG_B43=m | ||
| 1377 | CONFIG_B43_SDIO=y | ||
| 1378 | CONFIG_B43_PIO=y | ||
| 1379 | CONFIG_B43_PHY_N=y | ||
| 1380 | CONFIG_B43_PHY_LP=y | ||
| 1381 | CONFIG_B43_LEDS=y | ||
| 1382 | CONFIG_B43_HWRNG=y | ||
| 1383 | # CONFIG_B43_DEBUG is not set | ||
| 1384 | # CONFIG_B43LEGACY is not set | ||
| 1385 | CONFIG_HOSTAP=m | ||
| 1386 | CONFIG_HOSTAP_FIRMWARE=y | ||
| 1387 | CONFIG_HOSTAP_FIRMWARE_NVRAM=y | ||
| 1388 | # CONFIG_IWM is not set | ||
| 1389 | CONFIG_LIBERTAS=m | ||
| 1390 | CONFIG_LIBERTAS_USB=m | ||
| 1391 | CONFIG_LIBERTAS_SDIO=m | ||
| 1392 | # CONFIG_LIBERTAS_SPI is not set | ||
| 1393 | # CONFIG_LIBERTAS_DEBUG is not set | ||
| 1394 | # CONFIG_LIBERTAS_MESH is not set | ||
| 1395 | CONFIG_P54_COMMON=m | ||
| 1396 | CONFIG_P54_USB=m | ||
| 1397 | # CONFIG_P54_SPI is not set | ||
| 1398 | CONFIG_P54_LEDS=y | ||
| 1399 | CONFIG_RT2X00=m | ||
| 1400 | CONFIG_RT2500USB=m | ||
| 1401 | CONFIG_RT73USB=m | ||
| 1402 | CONFIG_RT2800USB=m | ||
| 1403 | CONFIG_RT2800USB_RT33XX=y | ||
| 1404 | CONFIG_RT2800USB_RT35XX=y | ||
| 1405 | CONFIG_RT2800USB_RT53XX=y | ||
| 1406 | CONFIG_RT2800USB_UNKNOWN=y | ||
| 1407 | CONFIG_RT2800_LIB=m | ||
| 1408 | CONFIG_RT2X00_LIB_USB=m | ||
| 1409 | CONFIG_RT2X00_LIB=m | ||
| 1410 | CONFIG_RT2X00_LIB_FIRMWARE=y | ||
| 1411 | CONFIG_RT2X00_LIB_CRYPTO=y | ||
| 1412 | CONFIG_RT2X00_LIB_LEDS=y | ||
| 1413 | # CONFIG_RT2X00_DEBUG is not set | ||
| 1414 | CONFIG_RTL8192SE=m | ||
| 1415 | CONFIG_RTL8192CU=m | ||
| 1416 | CONFIG_RTLWIFI=m | ||
| 1417 | CONFIG_RTL8192C_COMMON=m | ||
| 1418 | CONFIG_WL1251=m | ||
| 1419 | CONFIG_WL1251_SPI=m | ||
| 1420 | CONFIG_WL1251_SDIO=m | ||
| 1421 | CONFIG_WL12XX_MENU=m | ||
| 1422 | CONFIG_WL12XX=m | ||
| 1423 | CONFIG_WL12XX_HT=y | ||
| 1424 | CONFIG_WL12XX_SPI=m | ||
| 1425 | CONFIG_WL12XX_SDIO=m | ||
| 1426 | # CONFIG_WL12XX_SDIO_TEST is not set | ||
| 1427 | CONFIG_WL12XX_PLATFORM_DATA=y | ||
| 1428 | CONFIG_ZD1211RW=m | ||
| 1429 | # CONFIG_ZD1211RW_DEBUG is not set | ||
| 1430 | # CONFIG_MWIFIEX is not set | ||
| 1431 | |||
| 1432 | # | ||
| 1433 | # WiMAX Wireless Broadband devices | ||
| 1434 | # | ||
| 1435 | CONFIG_WIMAX_I2400M=m | ||
| 1436 | CONFIG_WIMAX_I2400M_USB=m | ||
| 1437 | CONFIG_WIMAX_I2400M_SDIO=m | ||
| 1438 | CONFIG_WIMAX_IWMC3200_SDIO=y | ||
| 1439 | CONFIG_WIMAX_I2400M_DEBUG_LEVEL=8 | ||
| 1440 | |||
| 1441 | # | ||
| 1442 | # USB Network Adapters | ||
| 1443 | # | ||
| 1444 | CONFIG_USB_CATC=y | ||
| 1445 | CONFIG_USB_KAWETH=y | ||
| 1446 | CONFIG_USB_PEGASUS=y | ||
| 1447 | CONFIG_USB_RTL8150=y | ||
| 1448 | CONFIG_USB_USBNET=y | ||
| 1449 | CONFIG_USB_NET_AX8817X=y | ||
| 1450 | CONFIG_USB_NET_CDCETHER=y | ||
| 1451 | # CONFIG_USB_NET_CDC_EEM is not set | ||
| 1452 | CONFIG_USB_NET_CDC_NCM=m | ||
| 1453 | CONFIG_USB_NET_DM9601=y | ||
| 1454 | CONFIG_USB_NET_SMSC75XX=m | ||
| 1455 | CONFIG_USB_NET_SMSC95XX=y | ||
| 1456 | CONFIG_USB_NET_GL620A=y | ||
| 1457 | CONFIG_USB_NET_NET1080=y | ||
| 1458 | CONFIG_USB_NET_PLUSB=y | ||
| 1459 | CONFIG_USB_NET_MCS7830=y | ||
| 1460 | CONFIG_USB_NET_RNDIS_HOST=y | ||
| 1461 | CONFIG_USB_NET_CDC_SUBSET=y | ||
| 1462 | CONFIG_USB_ALI_M5632=y | ||
| 1463 | CONFIG_USB_AN2720=y | ||
| 1464 | CONFIG_USB_BELKIN=y | ||
| 1465 | CONFIG_USB_ARMLINUX=y | ||
| 1466 | CONFIG_USB_EPSON2888=y | ||
| 1467 | CONFIG_USB_KC2190=y | ||
| 1468 | CONFIG_USB_NET_ZAURUS=y | ||
| 1469 | CONFIG_USB_NET_CX82310_ETH=m | ||
| 1470 | # CONFIG_USB_NET_KALMIA is not set | ||
| 1471 | CONFIG_USB_HSO=m | ||
| 1472 | CONFIG_USB_NET_INT51X1=m | ||
| 1473 | CONFIG_USB_IPHETH=m | ||
| 1474 | CONFIG_USB_SIERRA_NET=m | ||
| 1475 | CONFIG_USB_VL600=m | ||
| 1476 | # CONFIG_WAN is not set | ||
| 1477 | CONFIG_ATM_DRIVERS=y | ||
| 1478 | # CONFIG_ATM_DUMMY is not set | ||
| 1479 | # CONFIG_ATM_TCP is not set | ||
| 1480 | |||
| 1481 | # | ||
| 1482 | # CAIF transport drivers | ||
| 1483 | # | ||
| 1484 | CONFIG_PPP=m | ||
| 1485 | CONFIG_PPP_MULTILINK=y | ||
| 1486 | CONFIG_PPP_FILTER=y | ||
| 1487 | CONFIG_PPP_ASYNC=m | ||
| 1488 | CONFIG_PPP_SYNC_TTY=m | ||
| 1489 | CONFIG_PPP_DEFLATE=m | ||
| 1490 | CONFIG_PPP_BSDCOMP=m | ||
| 1491 | CONFIG_PPP_MPPE=m | ||
| 1492 | CONFIG_PPPOE=m | ||
| 1493 | CONFIG_PPTP=m | ||
| 1494 | # CONFIG_PPPOATM is not set | ||
| 1495 | CONFIG_PPPOL2TP=m | ||
| 1496 | # CONFIG_SLIP is not set | ||
| 1497 | CONFIG_SLHC=m | ||
| 1498 | CONFIG_NETCONSOLE=m | ||
| 1499 | CONFIG_NETCONSOLE_DYNAMIC=y | ||
| 1500 | CONFIG_NETPOLL=y | ||
| 1501 | CONFIG_NETPOLL_TRAP=y | ||
| 1502 | CONFIG_NET_POLL_CONTROLLER=y | ||
| 1503 | # CONFIG_ISDN is not set | ||
| 1504 | # CONFIG_PHONE is not set | ||
| 1505 | |||
| 1506 | # | ||
| 1507 | # Input device support | ||
| 1508 | # | ||
| 1509 | CONFIG_INPUT=y | ||
| 1510 | CONFIG_INPUT_FF_MEMLESS=y | ||
| 1511 | CONFIG_INPUT_POLLDEV=y | ||
| 1512 | # CONFIG_INPUT_SPARSEKMAP is not set | ||
| 1513 | |||
| 1514 | # | ||
| 1515 | # Userland interfaces | ||
| 1516 | # | ||
| 1517 | CONFIG_INPUT_MOUSEDEV=y | ||
| 1518 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
| 1519 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
| 1520 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
| 1521 | # CONFIG_INPUT_JOYDEV is not set | ||
| 1522 | CONFIG_INPUT_EVDEV=y | ||
| 1523 | # CONFIG_INPUT_EVBUG is not set | ||
| 1524 | |||
| 1525 | # | ||
| 1526 | # Input Device Drivers | ||
| 1527 | # | ||
| 1528 | CONFIG_INPUT_KEYBOARD=y | ||
| 1529 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
| 1530 | # CONFIG_KEYBOARD_ADP5589 is not set | ||
| 1531 | # CONFIG_KEYBOARD_ATKBD is not set | ||
| 1532 | CONFIG_KEYBOARD_QT1070=m | ||
| 1533 | CONFIG_KEYBOARD_QT2160=m | ||
| 1534 | # CONFIG_KEYBOARD_LKKBD is not set | ||
| 1535 | CONFIG_KEYBOARD_GPIO=y | ||
| 1536 | # CONFIG_KEYBOARD_TCA6416 is not set | ||
| 1537 | # CONFIG_KEYBOARD_MATRIX is not set | ||
| 1538 | # CONFIG_KEYBOARD_LM8323 is not set | ||
| 1539 | # CONFIG_KEYBOARD_MAX7359 is not set | ||
| 1540 | CONFIG_KEYBOARD_MCS=m | ||
| 1541 | # CONFIG_KEYBOARD_MPR121 is not set | ||
| 1542 | # CONFIG_KEYBOARD_NEWTON is not set | ||
| 1543 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
| 1544 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
| 1545 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
| 1546 | # CONFIG_KEYBOARD_TWL4030 is not set | ||
| 1547 | # CONFIG_KEYBOARD_XTKBD is not set | ||
| 1548 | CONFIG_INPUT_MOUSE=y | ||
| 1549 | CONFIG_MOUSE_PS2=y | ||
| 1550 | CONFIG_MOUSE_PS2_ALPS=y | ||
| 1551 | CONFIG_MOUSE_PS2_LOGIPS2PP=y | ||
| 1552 | CONFIG_MOUSE_PS2_SYNAPTICS=y | ||
| 1553 | CONFIG_MOUSE_PS2_TRACKPOINT=y | ||
| 1554 | # CONFIG_MOUSE_PS2_ELANTECH is not set | ||
| 1555 | # CONFIG_MOUSE_PS2_SENTELIC is not set | ||
| 1556 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | ||
| 1557 | # CONFIG_MOUSE_SERIAL is not set | ||
| 1558 | # CONFIG_MOUSE_APPLETOUCH is not set | ||
| 1559 | # CONFIG_MOUSE_BCM5974 is not set | ||
| 1560 | # CONFIG_MOUSE_VSXXXAA is not set | ||
| 1561 | # CONFIG_MOUSE_GPIO is not set | ||
| 1562 | # CONFIG_MOUSE_SYNAPTICS_I2C is not set | ||
| 1563 | # CONFIG_INPUT_JOYSTICK is not set | ||
| 1564 | # CONFIG_INPUT_TABLET is not set | ||
| 1565 | CONFIG_INPUT_TOUCHSCREEN=y | ||
| 1566 | # CONFIG_TOUCHSCREEN_ADS7846 is not set | ||
| 1567 | # CONFIG_TOUCHSCREEN_AD7877 is not set | ||
| 1568 | # CONFIG_TOUCHSCREEN_AD7879 is not set | ||
| 1569 | # CONFIG_TOUCHSCREEN_ATMEL_MXT is not set | ||
| 1570 | # CONFIG_TOUCHSCREEN_BU21013 is not set | ||
| 1571 | # CONFIG_TOUCHSCREEN_CY8CTMG110 is not set | ||
| 1572 | # CONFIG_TOUCHSCREEN_DYNAPRO is not set | ||
| 1573 | # CONFIG_TOUCHSCREEN_HAMPSHIRE is not set | ||
| 1574 | # CONFIG_TOUCHSCREEN_EETI is not set | ||
| 1575 | # CONFIG_TOUCHSCREEN_FUJITSU is not set | ||
| 1576 | # CONFIG_TOUCHSCREEN_GUNZE is not set | ||
| 1577 | # CONFIG_TOUCHSCREEN_ELO is not set | ||
| 1578 | # CONFIG_TOUCHSCREEN_WACOM_W8001 is not set | ||
| 1579 | # CONFIG_TOUCHSCREEN_MAX11801 is not set | ||
| 1580 | # CONFIG_TOUCHSCREEN_MCS5000 is not set | ||
| 1581 | # CONFIG_TOUCHSCREEN_MTOUCH is not set | ||
| 1582 | # CONFIG_TOUCHSCREEN_INEXIO is not set | ||
| 1583 | # CONFIG_TOUCHSCREEN_MK712 is not set | ||
| 1584 | # CONFIG_TOUCHSCREEN_PENMOUNT is not set | ||
| 1585 | # CONFIG_TOUCHSCREEN_TOUCHRIGHT is not set | ||
| 1586 | # CONFIG_TOUCHSCREEN_TOUCHWIN is not set | ||
| 1587 | # CONFIG_TOUCHSCREEN_USB_COMPOSITE is not set | ||
| 1588 | # CONFIG_TOUCHSCREEN_TOUCHIT213 is not set | ||
| 1589 | # CONFIG_TOUCHSCREEN_TSC2005 is not set | ||
| 1590 | CONFIG_TOUCHSCREEN_TSC2007=y | ||
| 1591 | # CONFIG_TOUCHSCREEN_W90X900 is not set | ||
| 1592 | # CONFIG_TOUCHSCREEN_ST1232 is not set | ||
| 1593 | # CONFIG_TOUCHSCREEN_TPS6507X is not set | ||
| 1594 | CONFIG_INPUT_MISC=y | ||
| 1595 | CONFIG_INPUT_AD714X=m | ||
| 1596 | CONFIG_INPUT_AD714X_I2C=m | ||
| 1597 | CONFIG_INPUT_AD714X_SPI=m | ||
| 1598 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
| 1599 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
| 1600 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
| 1601 | # CONFIG_INPUT_POWERMATE is not set | ||
| 1602 | # CONFIG_INPUT_YEALINK is not set | ||
| 1603 | # CONFIG_INPUT_CM109 is not set | ||
| 1604 | CONFIG_INPUT_TWL4030_PWRBUTTON=y | ||
| 1605 | CONFIG_INPUT_TWL4030_VIBRA=m | ||
| 1606 | CONFIG_INPUT_UINPUT=y | ||
| 1607 | CONFIG_INPUT_PCF8574=m | ||
| 1608 | CONFIG_INPUT_PWM_BEEPER=m | ||
| 1609 | # CONFIG_INPUT_GPIO_ROTARY_ENCODER is not set | ||
| 1610 | CONFIG_INPUT_ADXL34X=m | ||
| 1611 | CONFIG_INPUT_ADXL34X_I2C=m | ||
| 1612 | CONFIG_INPUT_ADXL34X_SPI=m | ||
| 1613 | CONFIG_INPUT_CMA3000=m | ||
| 1614 | CONFIG_INPUT_CMA3000_I2C=m | ||
| 1615 | |||
| 1616 | # | ||
| 1617 | # Hardware I/O ports | ||
| 1618 | # | ||
| 1619 | CONFIG_SERIO=y | ||
| 1620 | CONFIG_SERIO_SERPORT=y | ||
| 1621 | CONFIG_SERIO_LIBPS2=y | ||
| 1622 | # CONFIG_SERIO_RAW is not set | ||
| 1623 | # CONFIG_SERIO_ALTERA_PS2 is not set | ||
| 1624 | # CONFIG_SERIO_PS2MULT is not set | ||
| 1625 | # CONFIG_GAMEPORT is not set | ||
| 1626 | |||
| 1627 | # | ||
| 1628 | # Character devices | ||
| 1629 | # | ||
| 1630 | CONFIG_VT=y | ||
| 1631 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
| 1632 | CONFIG_VT_CONSOLE=y | ||
| 1633 | CONFIG_HW_CONSOLE=y | ||
| 1634 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
| 1635 | CONFIG_UNIX98_PTYS=y | ||
| 1636 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
| 1637 | # CONFIG_LEGACY_PTYS is not set | ||
| 1638 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
| 1639 | CONFIG_N_GSM=m | ||
| 1640 | # CONFIG_TRACE_SINK is not set | ||
| 1641 | CONFIG_DEVKMEM=y | ||
| 1642 | |||
| 1643 | # | ||
| 1644 | # Serial drivers | ||
| 1645 | # | ||
| 1646 | CONFIG_SERIAL_8250=y | ||
| 1647 | CONFIG_SERIAL_8250_CONSOLE=y | ||
| 1648 | CONFIG_SERIAL_8250_NR_UARTS=32 | ||
| 1649 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
| 1650 | CONFIG_SERIAL_8250_EXTENDED=y | ||
| 1651 | CONFIG_SERIAL_8250_MANY_PORTS=y | ||
| 1652 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
| 1653 | CONFIG_SERIAL_8250_DETECT_IRQ=y | ||
| 1654 | CONFIG_SERIAL_8250_RSA=y | ||
| 1655 | |||
| 1656 | # | ||
| 1657 | # Non-8250 serial port support | ||
| 1658 | # | ||
| 1659 | # CONFIG_SERIAL_MAX3100 is not set | ||
| 1660 | # CONFIG_SERIAL_MAX3107 is not set | ||
| 1661 | CONFIG_SERIAL_CORE=y | ||
| 1662 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
| 1663 | CONFIG_SERIAL_OMAP=y | ||
| 1664 | CONFIG_SERIAL_OMAP_CONSOLE=y | ||
| 1665 | # CONFIG_SERIAL_TIMBERDALE is not set | ||
| 1666 | # CONFIG_SERIAL_ALTERA_JTAGUART is not set | ||
| 1667 | # CONFIG_SERIAL_ALTERA_UART is not set | ||
| 1668 | CONFIG_SERIAL_IFX6X60=m | ||
| 1669 | # CONFIG_SERIAL_XILINX_PS_UART is not set | ||
| 1670 | CONFIG_TTY_PRINTK=y | ||
| 1671 | # CONFIG_HVC_DCC is not set | ||
| 1672 | # CONFIG_IPMI_HANDLER is not set | ||
| 1673 | CONFIG_HW_RANDOM=y | ||
| 1674 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
| 1675 | # CONFIG_R3964 is not set | ||
| 1676 | # CONFIG_RAW_DRIVER is not set | ||
| 1677 | # CONFIG_TCG_TPM is not set | ||
| 1678 | # CONFIG_RAMOOPS is not set | ||
| 1679 | CONFIG_I2C=y | ||
| 1680 | CONFIG_I2C_BOARDINFO=y | ||
| 1681 | CONFIG_I2C_COMPAT=y | ||
| 1682 | CONFIG_I2C_CHARDEV=y | ||
| 1683 | CONFIG_I2C_MUX=m | ||
| 1684 | |||
| 1685 | # | ||
| 1686 | # Multiplexer I2C Chip support | ||
| 1687 | # | ||
| 1688 | CONFIG_I2C_MUX_GPIO=m | ||
| 1689 | # CONFIG_I2C_MUX_PCA9541 is not set | ||
| 1690 | # CONFIG_I2C_MUX_PCA954x is not set | ||
| 1691 | CONFIG_I2C_HELPER_AUTO=y | ||
| 1692 | CONFIG_I2C_ALGOBIT=m | ||
| 1693 | |||
| 1694 | # | ||
| 1695 | # I2C Hardware Bus support | ||
| 1696 | # | ||
| 1697 | |||
| 1698 | # | ||
| 1699 | # I2C system bus drivers (mostly embedded / system-on-chip) | ||
| 1700 | # | ||
| 1701 | # CONFIG_I2C_DESIGNWARE is not set | ||
| 1702 | # CONFIG_I2C_GPIO is not set | ||
| 1703 | # CONFIG_I2C_OCORES is not set | ||
| 1704 | CONFIG_I2C_OMAP=y | ||
| 1705 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
| 1706 | # CONFIG_I2C_PXA_PCI is not set | ||
| 1707 | # CONFIG_I2C_SIMTEC is not set | ||
| 1708 | # CONFIG_I2C_XILINX is not set | ||
| 1709 | |||
| 1710 | # | ||
| 1711 | # External I2C/SMBus adapter drivers | ||
| 1712 | # | ||
| 1713 | CONFIG_I2C_DIOLAN_U2C=m | ||
| 1714 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
| 1715 | # CONFIG_I2C_TAOS_EVM is not set | ||
| 1716 | # CONFIG_I2C_TINY_USB is not set | ||
| 1717 | |||
| 1718 | # | ||
| 1719 | # Other I2C/SMBus bus drivers | ||
| 1720 | # | ||
| 1721 | # CONFIG_I2C_STUB is not set | ||
| 1722 | # CONFIG_I2C_DEBUG_CORE is not set | ||
| 1723 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
| 1724 | # CONFIG_I2C_DEBUG_BUS is not set | ||
| 1725 | CONFIG_SPI=y | ||
| 1726 | # CONFIG_SPI_DEBUG is not set | ||
| 1727 | CONFIG_SPI_MASTER=y | ||
| 1728 | |||
| 1729 | # | ||
| 1730 | # SPI Master Controller Drivers | ||
| 1731 | # | ||
| 1732 | # CONFIG_SPI_ALTERA is not set | ||
| 1733 | # CONFIG_SPI_BITBANG is not set | ||
| 1734 | # CONFIG_SPI_GPIO is not set | ||
| 1735 | # CONFIG_SPI_OC_TINY is not set | ||
| 1736 | CONFIG_SPI_OMAP24XX=y | ||
| 1737 | # CONFIG_SPI_PXA2XX_PCI is not set | ||
| 1738 | # CONFIG_SPI_XILINX is not set | ||
| 1739 | # CONFIG_SPI_DESIGNWARE is not set | ||
| 1740 | |||
| 1741 | # | ||
| 1742 | # SPI Protocol Masters | ||
| 1743 | # | ||
| 1744 | CONFIG_SPI_SPIDEV=y | ||
| 1745 | # CONFIG_SPI_TLE62X0 is not set | ||
| 1746 | |||
| 1747 | # | ||
| 1748 | # PPS support | ||
| 1749 | # | ||
| 1750 | # CONFIG_PPS is not set | ||
| 1751 | |||
| 1752 | # | ||
| 1753 | # PPS generators support | ||
| 1754 | # | ||
| 1755 | |||
| 1756 | # | ||
| 1757 | # PTP clock support | ||
| 1758 | # | ||
| 1759 | |||
| 1760 | # | ||
| 1761 | # Enable Device Drivers -> PPS to see the PTP clock options. | ||
| 1762 | # | ||
| 1763 | CONFIG_ARCH_REQUIRE_GPIOLIB=y | ||
| 1764 | CONFIG_GPIOLIB=y | ||
| 1765 | # CONFIG_DEBUG_GPIO is not set | ||
| 1766 | CONFIG_GPIO_SYSFS=y | ||
| 1767 | CONFIG_GPIO_MAX730X=m | ||
| 1768 | |||
| 1769 | # | ||
| 1770 | # Memory mapped GPIO drivers: | ||
| 1771 | # | ||
| 1772 | # CONFIG_GPIO_BASIC_MMIO is not set | ||
| 1773 | # CONFIG_GPIO_IT8761E is not set | ||
| 1774 | |||
| 1775 | # | ||
| 1776 | # I2C GPIO expanders: | ||
| 1777 | # | ||
| 1778 | CONFIG_GPIO_MAX7300=m | ||
| 1779 | # CONFIG_GPIO_MAX732X is not set | ||
| 1780 | # CONFIG_GPIO_PCF857X is not set | ||
| 1781 | # CONFIG_GPIO_SX150X is not set | ||
| 1782 | CONFIG_GPIO_TWL4030=y | ||
| 1783 | CONFIG_GPIO_ADP5588=m | ||
| 1784 | |||
| 1785 | # | ||
| 1786 | # PCI GPIO expanders: | ||
| 1787 | # | ||
| 1788 | |||
| 1789 | # | ||
| 1790 | # SPI GPIO expanders: | ||
| 1791 | # | ||
| 1792 | # CONFIG_GPIO_MAX7301 is not set | ||
| 1793 | # CONFIG_GPIO_MCP23S08 is not set | ||
| 1794 | # CONFIG_GPIO_MC33880 is not set | ||
| 1795 | # CONFIG_GPIO_74X164 is not set | ||
| 1796 | |||
| 1797 | # | ||
| 1798 | # AC97 GPIO expanders: | ||
| 1799 | # | ||
| 1800 | |||
| 1801 | # | ||
| 1802 | # MODULbus GPIO expanders: | ||
| 1803 | # | ||
| 1804 | # CONFIG_W1 is not set | ||
| 1805 | CONFIG_POWER_SUPPLY=m | ||
| 1806 | # CONFIG_POWER_SUPPLY_DEBUG is not set | ||
| 1807 | # CONFIG_PDA_POWER is not set | ||
| 1808 | CONFIG_TEST_POWER=m | ||
| 1809 | # CONFIG_BATTERY_DS2780 is not set | ||
| 1810 | # CONFIG_BATTERY_DS2782 is not set | ||
| 1811 | # CONFIG_BATTERY_BQ20Z75 is not set | ||
| 1812 | # CONFIG_BATTERY_BQ27x00 is not set | ||
| 1813 | # CONFIG_BATTERY_MAX17040 is not set | ||
| 1814 | CONFIG_BATTERY_MAX17042=m | ||
| 1815 | CONFIG_CHARGER_ISP1704=m | ||
| 1816 | # CONFIG_CHARGER_MAX8903 is not set | ||
| 1817 | CONFIG_CHARGER_TWL4030=m | ||
| 1818 | CONFIG_CHARGER_GPIO=m | ||
| 1819 | CONFIG_HWMON=y | ||
| 1820 | # CONFIG_HWMON_VID is not set | ||
| 1821 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
| 1822 | |||
| 1823 | # | ||
| 1824 | # Native drivers | ||
| 1825 | # | ||
| 1826 | # CONFIG_SENSORS_AD7414 is not set | ||
| 1827 | # CONFIG_SENSORS_AD7418 is not set | ||
| 1828 | # CONFIG_SENSORS_ADCXX is not set | ||
| 1829 | # CONFIG_SENSORS_ADM1021 is not set | ||
| 1830 | # CONFIG_SENSORS_ADM1025 is not set | ||
| 1831 | # CONFIG_SENSORS_ADM1026 is not set | ||
| 1832 | # CONFIG_SENSORS_ADM1029 is not set | ||
| 1833 | # CONFIG_SENSORS_ADM1031 is not set | ||
| 1834 | # CONFIG_SENSORS_ADM9240 is not set | ||
| 1835 | CONFIG_SENSORS_ADT7411=m | ||
| 1836 | # CONFIG_SENSORS_ADT7462 is not set | ||
| 1837 | # CONFIG_SENSORS_ADT7470 is not set | ||
| 1838 | # CONFIG_SENSORS_ADT7475 is not set | ||
| 1839 | CONFIG_SENSORS_ASC7621=m | ||
| 1840 | # CONFIG_SENSORS_ATXP1 is not set | ||
| 1841 | CONFIG_SENSORS_DS620=m | ||
| 1842 | # CONFIG_SENSORS_DS1621 is not set | ||
| 1843 | # CONFIG_SENSORS_F71805F is not set | ||
| 1844 | # CONFIG_SENSORS_F71882FG is not set | ||
| 1845 | # CONFIG_SENSORS_F75375S is not set | ||
| 1846 | # CONFIG_SENSORS_G760A is not set | ||
| 1847 | # CONFIG_SENSORS_GL518SM is not set | ||
| 1848 | # CONFIG_SENSORS_GL520SM is not set | ||
| 1849 | CONFIG_SENSORS_GPIO_FAN=m | ||
| 1850 | # CONFIG_SENSORS_IT87 is not set | ||
| 1851 | CONFIG_SENSORS_JC42=m | ||
| 1852 | # CONFIG_SENSORS_LINEAGE is not set | ||
| 1853 | # CONFIG_SENSORS_LM63 is not set | ||
| 1854 | # CONFIG_SENSORS_LM70 is not set | ||
| 1855 | # CONFIG_SENSORS_LM73 is not set | ||
| 1856 | # CONFIG_SENSORS_LM75 is not set | ||
| 1857 | # CONFIG_SENSORS_LM77 is not set | ||
| 1858 | # CONFIG_SENSORS_LM78 is not set | ||
| 1859 | # CONFIG_SENSORS_LM80 is not set | ||
| 1860 | # CONFIG_SENSORS_LM83 is not set | ||
| 1861 | # CONFIG_SENSORS_LM85 is not set | ||
| 1862 | # CONFIG_SENSORS_LM87 is not set | ||
| 1863 | # CONFIG_SENSORS_LM90 is not set | ||
| 1864 | # CONFIG_SENSORS_LM92 is not set | ||
| 1865 | # CONFIG_SENSORS_LM93 is not set | ||
| 1866 | # CONFIG_SENSORS_LTC4151 is not set | ||
| 1867 | # CONFIG_SENSORS_LTC4215 is not set | ||
| 1868 | # CONFIG_SENSORS_LTC4245 is not set | ||
| 1869 | # CONFIG_SENSORS_LTC4261 is not set | ||
| 1870 | # CONFIG_SENSORS_LM95241 is not set | ||
| 1871 | # CONFIG_SENSORS_MAX1111 is not set | ||
| 1872 | # CONFIG_SENSORS_MAX16065 is not set | ||
| 1873 | # CONFIG_SENSORS_MAX1619 is not set | ||
| 1874 | # CONFIG_SENSORS_MAX6639 is not set | ||
| 1875 | # CONFIG_SENSORS_MAX6642 is not set | ||
| 1876 | # CONFIG_SENSORS_MAX6650 is not set | ||
| 1877 | # CONFIG_SENSORS_PC87360 is not set | ||
| 1878 | # CONFIG_SENSORS_PC87427 is not set | ||
| 1879 | # CONFIG_SENSORS_PCF8591 is not set | ||
| 1880 | # CONFIG_PMBUS is not set | ||
| 1881 | # CONFIG_SENSORS_SHT15 is not set | ||
| 1882 | # CONFIG_SENSORS_SHT21 is not set | ||
| 1883 | CONFIG_SENSORS_SMM665=m | ||
| 1884 | # CONFIG_SENSORS_DME1737 is not set | ||
| 1885 | CONFIG_SENSORS_EMC1403=m | ||
| 1886 | CONFIG_SENSORS_EMC2103=m | ||
| 1887 | # CONFIG_SENSORS_EMC6W201 is not set | ||
| 1888 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
| 1889 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
| 1890 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
| 1891 | # CONFIG_SENSORS_SCH5627 is not set | ||
| 1892 | # CONFIG_SENSORS_ADS1015 is not set | ||
| 1893 | # CONFIG_SENSORS_ADS7828 is not set | ||
| 1894 | CONFIG_SENSORS_ADS7871=m | ||
| 1895 | CONFIG_SENSORS_AMC6821=m | ||
| 1896 | # CONFIG_SENSORS_THMC50 is not set | ||
| 1897 | CONFIG_SENSORS_TMP102=m | ||
| 1898 | # CONFIG_SENSORS_TMP401 is not set | ||
| 1899 | # CONFIG_SENSORS_TMP421 is not set | ||
| 1900 | CONFIG_SENSORS_TWL4030_MADC=m | ||
| 1901 | # CONFIG_SENSORS_VT1211 is not set | ||
| 1902 | # CONFIG_SENSORS_W83781D is not set | ||
| 1903 | # CONFIG_SENSORS_W83791D is not set | ||
| 1904 | # CONFIG_SENSORS_W83792D is not set | ||
| 1905 | # CONFIG_SENSORS_W83793 is not set | ||
| 1906 | # CONFIG_SENSORS_W83795 is not set | ||
| 1907 | # CONFIG_SENSORS_W83L785TS is not set | ||
| 1908 | # CONFIG_SENSORS_W83L786NG is not set | ||
| 1909 | # CONFIG_SENSORS_W83627HF is not set | ||
| 1910 | # CONFIG_SENSORS_W83627EHF is not set | ||
| 1911 | CONFIG_THERMAL=y | ||
| 1912 | CONFIG_THERMAL_HWMON=y | ||
| 1913 | CONFIG_WATCHDOG=y | ||
| 1914 | CONFIG_WATCHDOG_NOWAYOUT=y | ||
| 1915 | |||
| 1916 | # | ||
| 1917 | # Watchdog Device Drivers | ||
| 1918 | # | ||
| 1919 | # CONFIG_SOFT_WATCHDOG is not set | ||
| 1920 | CONFIG_OMAP_WATCHDOG=y | ||
| 1921 | # CONFIG_TWL4030_WATCHDOG is not set | ||
| 1922 | # CONFIG_MAX63XX_WATCHDOG is not set | ||
| 1923 | |||
| 1924 | # | ||
| 1925 | # USB-based Watchdog Cards | ||
| 1926 | # | ||
| 1927 | # CONFIG_USBPCWATCHDOG is not set | ||
| 1928 | CONFIG_SSB_POSSIBLE=y | ||
| 1929 | |||
| 1930 | # | ||
| 1931 | # Sonics Silicon Backplane | ||
| 1932 | # | ||
| 1933 | CONFIG_SSB=y | ||
| 1934 | CONFIG_SSB_BLOCKIO=y | ||
| 1935 | CONFIG_SSB_SDIOHOST_POSSIBLE=y | ||
| 1936 | CONFIG_SSB_SDIOHOST=y | ||
| 1937 | # CONFIG_SSB_SILENT is not set | ||
| 1938 | # CONFIG_SSB_DEBUG is not set | ||
| 1939 | CONFIG_BCMA_POSSIBLE=y | ||
| 1940 | |||
| 1941 | # | ||
| 1942 | # Broadcom specific AMBA | ||
| 1943 | # | ||
| 1944 | # CONFIG_BCMA is not set | ||
| 1945 | CONFIG_MFD_SUPPORT=y | ||
| 1946 | CONFIG_MFD_CORE=y | ||
| 1947 | # CONFIG_MFD_88PM860X is not set | ||
| 1948 | # CONFIG_MFD_SM501 is not set | ||
| 1949 | # CONFIG_MFD_ASIC3 is not set | ||
| 1950 | # CONFIG_HTC_EGPIO is not set | ||
| 1951 | # CONFIG_HTC_PASIC3 is not set | ||
| 1952 | # CONFIG_HTC_I2CPLD is not set | ||
| 1953 | CONFIG_TPS6105X=m | ||
| 1954 | # CONFIG_TPS65010 is not set | ||
| 1955 | CONFIG_TPS6507X=m | ||
| 1956 | CONFIG_MFD_TPS6586X=y | ||
| 1957 | CONFIG_TWL4030_CORE=y | ||
| 1958 | CONFIG_TWL4030_MADC=m | ||
| 1959 | CONFIG_TWL4030_POWER=y | ||
| 1960 | CONFIG_TWL4030_CODEC=y | ||
| 1961 | CONFIG_TWL6030_PWM=m | ||
| 1962 | # CONFIG_MFD_STMPE is not set | ||
| 1963 | # CONFIG_MFD_TC3589X is not set | ||
| 1964 | # CONFIG_MFD_TMIO is not set | ||
| 1965 | # CONFIG_MFD_T7L66XB is not set | ||
| 1966 | # CONFIG_MFD_TC6387XB is not set | ||
| 1967 | # CONFIG_MFD_TC6393XB is not set | ||
| 1968 | # CONFIG_PMIC_DA903X is not set | ||
| 1969 | # CONFIG_PMIC_ADP5520 is not set | ||
| 1970 | # CONFIG_MFD_MAX8925 is not set | ||
| 1971 | # CONFIG_MFD_MAX8997 is not set | ||
| 1972 | # CONFIG_MFD_MAX8998 is not set | ||
| 1973 | # CONFIG_MFD_WM8400 is not set | ||
| 1974 | # CONFIG_MFD_WM831X_I2C is not set | ||
| 1975 | # CONFIG_MFD_WM831X_SPI is not set | ||
| 1976 | # CONFIG_MFD_WM8350_I2C is not set | ||
| 1977 | # CONFIG_MFD_WM8994 is not set | ||
| 1978 | # CONFIG_MFD_PCF50633 is not set | ||
| 1979 | # CONFIG_MFD_MC13XXX is not set | ||
| 1980 | # CONFIG_ABX500_CORE is not set | ||
| 1981 | # CONFIG_EZX_PCAP is not set | ||
| 1982 | CONFIG_MFD_WL1273_CORE=m | ||
| 1983 | CONFIG_MFD_OMAP_USB_HOST=y | ||
| 1984 | # CONFIG_MFD_TPS65910 is not set | ||
| 1985 | CONFIG_REGULATOR=y | ||
| 1986 | # CONFIG_REGULATOR_DEBUG is not set | ||
| 1987 | CONFIG_REGULATOR_DUMMY=y | ||
| 1988 | CONFIG_REGULATOR_FIXED_VOLTAGE=y | ||
| 1989 | # CONFIG_REGULATOR_VIRTUAL_CONSUMER is not set | ||
| 1990 | # CONFIG_REGULATOR_USERSPACE_CONSUMER is not set | ||
| 1991 | # CONFIG_REGULATOR_BQ24022 is not set | ||
| 1992 | # CONFIG_REGULATOR_MAX1586 is not set | ||
| 1993 | # CONFIG_REGULATOR_MAX8649 is not set | ||
| 1994 | # CONFIG_REGULATOR_MAX8660 is not set | ||
| 1995 | # CONFIG_REGULATOR_MAX8952 is not set | ||
| 1996 | CONFIG_REGULATOR_TWL4030=y | ||
| 1997 | # CONFIG_REGULATOR_LP3971 is not set | ||
| 1998 | # CONFIG_REGULATOR_LP3972 is not set | ||
| 1999 | CONFIG_REGULATOR_TPS6105X=m | ||
| 2000 | # CONFIG_REGULATOR_TPS65023 is not set | ||
| 2001 | # CONFIG_REGULATOR_TPS6507X is not set | ||
| 2002 | # CONFIG_REGULATOR_ISL6271A is not set | ||
| 2003 | # CONFIG_REGULATOR_AD5398 is not set | ||
| 2004 | CONFIG_REGULATOR_TPS6586X=m | ||
| 2005 | CONFIG_REGULATOR_TPS6524X=m | ||
| 2006 | CONFIG_MEDIA_SUPPORT=y | ||
| 2007 | |||
| 2008 | # | ||
| 2009 | # Multimedia core support | ||
| 2010 | # | ||
| 2011 | CONFIG_MEDIA_CONTROLLER=y | ||
| 2012 | CONFIG_VIDEO_DEV=y | ||
| 2013 | CONFIG_VIDEO_V4L2_COMMON=y | ||
| 2014 | CONFIG_VIDEO_V4L2_SUBDEV_API=y | ||
| 2015 | CONFIG_DVB_CORE=m | ||
| 2016 | CONFIG_VIDEO_MEDIA=m | ||
| 2017 | |||
| 2018 | # | ||
| 2019 | # Multimedia drivers | ||
| 2020 | # | ||
| 2021 | CONFIG_RC_CORE=m | ||
| 2022 | CONFIG_LIRC=m | ||
| 2023 | CONFIG_RC_MAP=m | ||
| 2024 | CONFIG_IR_NEC_DECODER=m | ||
| 2025 | CONFIG_IR_RC5_DECODER=m | ||
| 2026 | CONFIG_IR_RC6_DECODER=m | ||
| 2027 | CONFIG_IR_JVC_DECODER=m | ||
| 2028 | CONFIG_IR_SONY_DECODER=m | ||
| 2029 | CONFIG_IR_RC5_SZ_DECODER=m | ||
| 2030 | CONFIG_IR_LIRC_CODEC=m | ||
| 2031 | # CONFIG_IR_IMON is not set | ||
| 2032 | # CONFIG_IR_MCEUSB is not set | ||
| 2033 | # CONFIG_IR_REDRAT3 is not set | ||
| 2034 | # CONFIG_IR_STREAMZAP is not set | ||
| 2035 | CONFIG_RC_LOOPBACK=m | ||
| 2036 | CONFIG_MEDIA_ATTACH=y | ||
| 2037 | CONFIG_MEDIA_TUNER=m | ||
| 2038 | CONFIG_MEDIA_TUNER_CUSTOMISE=y | ||
| 2039 | |||
| 2040 | # | ||
| 2041 | # Customize TV tuners | ||
| 2042 | # | ||
| 2043 | CONFIG_MEDIA_TUNER_SIMPLE=m | ||
| 2044 | CONFIG_MEDIA_TUNER_TDA8290=m | ||
| 2045 | CONFIG_MEDIA_TUNER_TDA827X=m | ||
| 2046 | CONFIG_MEDIA_TUNER_TDA18271=m | ||
| 2047 | CONFIG_MEDIA_TUNER_TDA9887=m | ||
| 2048 | CONFIG_MEDIA_TUNER_TEA5761=m | ||
| 2049 | CONFIG_MEDIA_TUNER_TEA5767=m | ||
| 2050 | CONFIG_MEDIA_TUNER_MT20XX=m | ||
| 2051 | CONFIG_MEDIA_TUNER_MT2060=m | ||
| 2052 | CONFIG_MEDIA_TUNER_MT2266=m | ||
| 2053 | CONFIG_MEDIA_TUNER_MT2131=m | ||
| 2054 | CONFIG_MEDIA_TUNER_QT1010=m | ||
| 2055 | CONFIG_MEDIA_TUNER_XC2028=m | ||
| 2056 | CONFIG_MEDIA_TUNER_XC5000=m | ||
| 2057 | CONFIG_MEDIA_TUNER_MXL5005S=m | ||
| 2058 | CONFIG_MEDIA_TUNER_MXL5007T=m | ||
| 2059 | CONFIG_MEDIA_TUNER_MC44S803=m | ||
| 2060 | CONFIG_MEDIA_TUNER_MAX2165=m | ||
| 2061 | CONFIG_MEDIA_TUNER_TDA18218=m | ||
| 2062 | CONFIG_MEDIA_TUNER_TDA18212=m | ||
| 2063 | CONFIG_VIDEO_V4L2=y | ||
| 2064 | CONFIG_VIDEOBUF_GEN=y | ||
| 2065 | CONFIG_VIDEOBUF_VMALLOC=m | ||
| 2066 | CONFIG_VIDEOBUF_DMA_CONTIG=y | ||
| 2067 | CONFIG_VIDEOBUF_DVB=m | ||
| 2068 | CONFIG_VIDEO_TVEEPROM=m | ||
| 2069 | CONFIG_VIDEO_TUNER=m | ||
| 2070 | CONFIG_V4L2_MEM2MEM_DEV=m | ||
| 2071 | CONFIG_VIDEOBUF2_CORE=m | ||
| 2072 | CONFIG_VIDEOBUF2_MEMOPS=m | ||
| 2073 | CONFIG_VIDEOBUF2_VMALLOC=m | ||
| 2074 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
| 2075 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
| 2076 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
| 2077 | # CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set | ||
| 2078 | CONFIG_VIDEO_IR_I2C=m | ||
| 2079 | |||
| 2080 | # | ||
| 2081 | # Encoders, decoders, sensors and other helper chips | ||
| 2082 | # | ||
| 2083 | |||
| 2084 | # | ||
| 2085 | # Audio decoders, processors and mixers | ||
| 2086 | # | ||
| 2087 | # CONFIG_VIDEO_TVAUDIO is not set | ||
| 2088 | # CONFIG_VIDEO_TDA7432 is not set | ||
| 2089 | # CONFIG_VIDEO_TDA9840 is not set | ||
| 2090 | # CONFIG_VIDEO_TEA6415C is not set | ||
| 2091 | # CONFIG_VIDEO_TEA6420 is not set | ||
| 2092 | CONFIG_VIDEO_MSP3400=m | ||
| 2093 | # CONFIG_VIDEO_CS5345 is not set | ||
| 2094 | CONFIG_VIDEO_CS53L32A=m | ||
| 2095 | # CONFIG_VIDEO_TLV320AIC23B is not set | ||
| 2096 | CONFIG_VIDEO_WM8775=m | ||
| 2097 | # CONFIG_VIDEO_WM8739 is not set | ||
| 2098 | # CONFIG_VIDEO_VP27SMPX is not set | ||
| 2099 | |||
| 2100 | # | ||
| 2101 | # RDS decoders | ||
| 2102 | # | ||
| 2103 | # CONFIG_VIDEO_SAA6588 is not set | ||
| 2104 | |||
| 2105 | # | ||
| 2106 | # Video decoders | ||
| 2107 | # | ||
| 2108 | CONFIG_VIDEO_ADV7180=m | ||
| 2109 | # CONFIG_VIDEO_BT819 is not set | ||
| 2110 | # CONFIG_VIDEO_BT856 is not set | ||
| 2111 | # CONFIG_VIDEO_BT866 is not set | ||
| 2112 | # CONFIG_VIDEO_KS0127 is not set | ||
| 2113 | # CONFIG_VIDEO_SAA7110 is not set | ||
| 2114 | CONFIG_VIDEO_SAA711X=m | ||
| 2115 | # CONFIG_VIDEO_SAA7191 is not set | ||
| 2116 | CONFIG_VIDEO_TVP514X=m | ||
| 2117 | CONFIG_VIDEO_TVP5150=m | ||
| 2118 | CONFIG_VIDEO_TVP7002=m | ||
| 2119 | # CONFIG_VIDEO_VPX3220 is not set | ||
| 2120 | |||
| 2121 | # | ||
| 2122 | # Video and audio decoders | ||
| 2123 | # | ||
| 2124 | # CONFIG_VIDEO_SAA717X is not set | ||
| 2125 | CONFIG_VIDEO_CX25840=m | ||
| 2126 | |||
| 2127 | # | ||
| 2128 | # MPEG video encoders | ||
| 2129 | # | ||
| 2130 | CONFIG_VIDEO_CX2341X=m | ||
| 2131 | |||
| 2132 | # | ||
| 2133 | # Video encoders | ||
| 2134 | # | ||
| 2135 | # CONFIG_VIDEO_SAA7127 is not set | ||
| 2136 | # CONFIG_VIDEO_SAA7185 is not set | ||
| 2137 | # CONFIG_VIDEO_ADV7170 is not set | ||
| 2138 | # CONFIG_VIDEO_ADV7175 is not set | ||
| 2139 | # CONFIG_VIDEO_ADV7343 is not set | ||
| 2140 | # CONFIG_VIDEO_AK881X is not set | ||
| 2141 | |||
| 2142 | # | ||
| 2143 | # Camera sensor devices | ||
| 2144 | # | ||
| 2145 | CONFIG_VIDEO_OV7670=m | ||
| 2146 | CONFIG_VIDEO_MT9V011=m | ||
| 2147 | CONFIG_VIDEO_MT9V032=y | ||
| 2148 | # CONFIG_VIDEO_TCM825X is not set | ||
| 2149 | |||
| 2150 | # | ||
| 2151 | # Video improvement chips | ||
| 2152 | # | ||
| 2153 | # CONFIG_VIDEO_UPD64031A is not set | ||
| 2154 | # CONFIG_VIDEO_UPD64083 is not set | ||
| 2155 | |||
| 2156 | # | ||
| 2157 | # Miscelaneous helper chips | ||
| 2158 | # | ||
| 2159 | # CONFIG_VIDEO_THS7303 is not set | ||
| 2160 | # CONFIG_VIDEO_M52790 is not set | ||
| 2161 | CONFIG_VIDEO_VIVI=m | ||
| 2162 | CONFIG_VIDEO_VPSS_SYSTEM=m | ||
| 2163 | CONFIG_VIDEO_VPFE_CAPTURE=y | ||
| 2164 | CONFIG_VIDEO_DM6446_CCDC=m | ||
| 2165 | CONFIG_VIDEO_OMAP2_VOUT=y | ||
| 2166 | # CONFIG_VIDEO_CPIA2 is not set | ||
| 2167 | # CONFIG_VIDEO_AU0828 is not set | ||
| 2168 | CONFIG_VIDEO_SR030PC30=m | ||
| 2169 | CONFIG_VIDEO_NOON010PC30=m | ||
| 2170 | # CONFIG_VIDEO_M5MOLS is not set | ||
| 2171 | CONFIG_VIDEO_OMAP3=y | ||
| 2172 | CONFIG_VIDEO_OMAP3_DEBUG=y | ||
| 2173 | # CONFIG_SOC_CAMERA is not set | ||
| 2174 | CONFIG_V4L_USB_DRIVERS=y | ||
| 2175 | CONFIG_USB_VIDEO_CLASS=m | ||
| 2176 | CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y | ||
| 2177 | CONFIG_USB_GSPCA=m | ||
| 2178 | CONFIG_USB_M5602=m | ||
| 2179 | CONFIG_USB_STV06XX=m | ||
| 2180 | # CONFIG_USB_GL860 is not set | ||
| 2181 | CONFIG_USB_GSPCA_BENQ=m | ||
| 2182 | CONFIG_USB_GSPCA_CONEX=m | ||
| 2183 | CONFIG_USB_GSPCA_CPIA1=m | ||
| 2184 | CONFIG_USB_GSPCA_ETOMS=m | ||
| 2185 | CONFIG_USB_GSPCA_FINEPIX=m | ||
| 2186 | # CONFIG_USB_GSPCA_JEILINJ is not set | ||
| 2187 | # CONFIG_USB_GSPCA_KINECT is not set | ||
| 2188 | CONFIG_USB_GSPCA_KONICA=m | ||
| 2189 | CONFIG_USB_GSPCA_MARS=m | ||
| 2190 | # CONFIG_USB_GSPCA_MR97310A is not set | ||
| 2191 | CONFIG_USB_GSPCA_NW80X=m | ||
| 2192 | CONFIG_USB_GSPCA_OV519=m | ||
| 2193 | CONFIG_USB_GSPCA_OV534=m | ||
| 2194 | CONFIG_USB_GSPCA_OV534_9=m | ||
| 2195 | CONFIG_USB_GSPCA_PAC207=m | ||
| 2196 | # CONFIG_USB_GSPCA_PAC7302 is not set | ||
| 2197 | CONFIG_USB_GSPCA_PAC7311=m | ||
| 2198 | CONFIG_USB_GSPCA_SN9C2028=m | ||
| 2199 | # CONFIG_USB_GSPCA_SN9C20X is not set | ||
| 2200 | CONFIG_USB_GSPCA_SONIXB=m | ||
| 2201 | CONFIG_USB_GSPCA_SONIXJ=m | ||
| 2202 | CONFIG_USB_GSPCA_SPCA500=m | ||
| 2203 | CONFIG_USB_GSPCA_SPCA501=m | ||
| 2204 | CONFIG_USB_GSPCA_SPCA505=m | ||
| 2205 | CONFIG_USB_GSPCA_SPCA506=m | ||
| 2206 | CONFIG_USB_GSPCA_SPCA508=m | ||
| 2207 | CONFIG_USB_GSPCA_SPCA561=m | ||
| 2208 | CONFIG_USB_GSPCA_SPCA1528=m | ||
| 2209 | # CONFIG_USB_GSPCA_SQ905 is not set | ||
| 2210 | # CONFIG_USB_GSPCA_SQ905C is not set | ||
| 2211 | CONFIG_USB_GSPCA_SQ930X=m | ||
| 2212 | CONFIG_USB_GSPCA_STK014=m | ||
| 2213 | # CONFIG_USB_GSPCA_STV0680 is not set | ||
| 2214 | CONFIG_USB_GSPCA_SUNPLUS=m | ||
| 2215 | CONFIG_USB_GSPCA_T613=m | ||
| 2216 | CONFIG_USB_GSPCA_TV8532=m | ||
| 2217 | CONFIG_USB_GSPCA_VC032X=m | ||
| 2218 | CONFIG_USB_GSPCA_VICAM=m | ||
| 2219 | CONFIG_USB_GSPCA_XIRLINK_CIT=m | ||
| 2220 | CONFIG_USB_GSPCA_ZC3XX=m | ||
| 2221 | CONFIG_VIDEO_PVRUSB2=m | ||
| 2222 | CONFIG_VIDEO_PVRUSB2_SYSFS=y | ||
| 2223 | CONFIG_VIDEO_PVRUSB2_DVB=y | ||
| 2224 | # CONFIG_VIDEO_PVRUSB2_DEBUGIFC is not set | ||
| 2225 | CONFIG_VIDEO_HDPVR=m | ||
| 2226 | CONFIG_VIDEO_EM28XX=m | ||
| 2227 | CONFIG_VIDEO_EM28XX_ALSA=m | ||
| 2228 | CONFIG_VIDEO_EM28XX_DVB=m | ||
| 2229 | CONFIG_VIDEO_TLG2300=m | ||
| 2230 | CONFIG_VIDEO_CX231XX=m | ||
| 2231 | CONFIG_VIDEO_CX231XX_RC=y | ||
| 2232 | # CONFIG_VIDEO_CX231XX_ALSA is not set | ||
| 2233 | CONFIG_VIDEO_CX231XX_DVB=m | ||
| 2234 | CONFIG_VIDEO_USBVISION=m | ||
| 2235 | CONFIG_USB_ET61X251=m | ||
| 2236 | CONFIG_USB_SN9C102=m | ||
| 2237 | CONFIG_USB_PWC=m | ||
| 2238 | # CONFIG_USB_PWC_DEBUG is not set | ||
| 2239 | CONFIG_USB_PWC_INPUT_EVDEV=y | ||
| 2240 | CONFIG_USB_ZR364XX=m | ||
| 2241 | CONFIG_USB_STKWEBCAM=m | ||
| 2242 | CONFIG_USB_S2255=m | ||
| 2243 | CONFIG_V4L_MEM2MEM_DRIVERS=y | ||
| 2244 | CONFIG_VIDEO_MEM2MEM_TESTDEV=m | ||
| 2245 | CONFIG_RADIO_ADAPTERS=y | ||
| 2246 | # CONFIG_I2C_SI4713 is not set | ||
| 2247 | # CONFIG_RADIO_SI4713 is not set | ||
| 2248 | # CONFIG_USB_DSBR is not set | ||
| 2249 | # CONFIG_RADIO_SI470X is not set | ||
| 2250 | # CONFIG_USB_MR800 is not set | ||
| 2251 | # CONFIG_RADIO_TEA5764 is not set | ||
| 2252 | CONFIG_RADIO_SAA7706H=m | ||
| 2253 | # CONFIG_RADIO_TEF6862 is not set | ||
| 2254 | CONFIG_RADIO_WL1273=m | ||
| 2255 | |||
| 2256 | # | ||
| 2257 | # Texas Instruments WL128x FM driver (ST based) | ||
| 2258 | # | ||
| 2259 | CONFIG_RADIO_WL128X=m | ||
| 2260 | CONFIG_DVB_MAX_ADAPTERS=8 | ||
| 2261 | CONFIG_DVB_DYNAMIC_MINORS=y | ||
| 2262 | CONFIG_DVB_CAPTURE_DRIVERS=y | ||
| 2263 | # CONFIG_TTPCI_EEPROM is not set | ||
| 2264 | |||
| 2265 | # | ||
| 2266 | # Supported USB Adapters | ||
| 2267 | # | ||
| 2268 | CONFIG_DVB_USB=m | ||
| 2269 | # CONFIG_DVB_USB_DEBUG is not set | ||
| 2270 | CONFIG_DVB_USB_A800=m | ||
| 2271 | CONFIG_DVB_USB_DIBUSB_MB=m | ||
| 2272 | # CONFIG_DVB_USB_DIBUSB_MB_FAULTY is not set | ||
| 2273 | CONFIG_DVB_USB_DIBUSB_MC=m | ||
| 2274 | CONFIG_DVB_USB_DIB0700=m | ||
| 2275 | CONFIG_DVB_USB_UMT_010=m | ||
| 2276 | CONFIG_DVB_USB_CXUSB=m | ||
| 2277 | CONFIG_DVB_USB_M920X=m | ||
| 2278 | CONFIG_DVB_USB_GL861=m | ||
| 2279 | CONFIG_DVB_USB_AU6610=m | ||
| 2280 | CONFIG_DVB_USB_DIGITV=m | ||
| 2281 | CONFIG_DVB_USB_VP7045=m | ||
| 2282 | CONFIG_DVB_USB_VP702X=m | ||
| 2283 | CONFIG_DVB_USB_GP8PSK=m | ||
| 2284 | CONFIG_DVB_USB_NOVA_T_USB2=m | ||
| 2285 | CONFIG_DVB_USB_TTUSB2=m | ||
| 2286 | CONFIG_DVB_USB_DTT200U=m | ||
| 2287 | CONFIG_DVB_USB_OPERA1=m | ||
| 2288 | CONFIG_DVB_USB_AF9005=m | ||
| 2289 | CONFIG_DVB_USB_AF9005_REMOTE=m | ||
| 2290 | CONFIG_DVB_USB_DW2102=m | ||
| 2291 | CONFIG_DVB_USB_CINERGY_T2=m | ||
| 2292 | CONFIG_DVB_USB_ANYSEE=m | ||
| 2293 | CONFIG_DVB_USB_DTV5100=m | ||
| 2294 | CONFIG_DVB_USB_AF9015=m | ||
| 2295 | # CONFIG_DVB_USB_CE6230 is not set | ||
| 2296 | # CONFIG_DVB_USB_FRIIO is not set | ||
| 2297 | # CONFIG_DVB_USB_EC168 is not set | ||
| 2298 | CONFIG_DVB_USB_AZ6027=m | ||
| 2299 | CONFIG_DVB_USB_LME2510=m | ||
| 2300 | CONFIG_DVB_USB_TECHNISAT_USB2=m | ||
| 2301 | # CONFIG_SMS_SIANO_MDTV is not set | ||
| 2302 | |||
| 2303 | # | ||
| 2304 | # Supported FlexCopII (B2C2) Adapters | ||
| 2305 | # | ||
| 2306 | CONFIG_DVB_B2C2_FLEXCOP=m | ||
| 2307 | CONFIG_DVB_B2C2_FLEXCOP_USB=m | ||
| 2308 | # CONFIG_DVB_B2C2_FLEXCOP_DEBUG is not set | ||
| 2309 | |||
| 2310 | # | ||
| 2311 | # Supported DVB Frontends | ||
| 2312 | # | ||
| 2313 | # CONFIG_DVB_FE_CUSTOMISE is not set | ||
| 2314 | |||
| 2315 | # | ||
| 2316 | # Multistandard (satellite) frontends | ||
| 2317 | # | ||
| 2318 | CONFIG_DVB_STB0899=m | ||
| 2319 | CONFIG_DVB_STB6100=m | ||
| 2320 | CONFIG_DVB_STV090x=m | ||
| 2321 | CONFIG_DVB_STV6110x=m | ||
| 2322 | |||
| 2323 | # | ||
| 2324 | # DVB-S (satellite) frontends | ||
| 2325 | # | ||
| 2326 | CONFIG_DVB_CX24123=m | ||
| 2327 | CONFIG_DVB_MT312=m | ||
| 2328 | CONFIG_DVB_ZL10039=m | ||
| 2329 | CONFIG_DVB_S5H1420=m | ||
| 2330 | CONFIG_DVB_STV0288=m | ||
| 2331 | CONFIG_DVB_STB6000=m | ||
| 2332 | CONFIG_DVB_STV0299=m | ||
| 2333 | CONFIG_DVB_STV6110=m | ||
| 2334 | CONFIG_DVB_STV0900=m | ||
| 2335 | CONFIG_DVB_TDA10086=m | ||
| 2336 | CONFIG_DVB_TUNER_ITD1000=m | ||
| 2337 | CONFIG_DVB_TUNER_CX24113=m | ||
| 2338 | CONFIG_DVB_TDA826X=m | ||
| 2339 | CONFIG_DVB_CX24116=m | ||
| 2340 | CONFIG_DVB_SI21XX=m | ||
| 2341 | CONFIG_DVB_DS3000=m | ||
| 2342 | |||
| 2343 | # | ||
| 2344 | # DVB-T (terrestrial) frontends | ||
| 2345 | # | ||
| 2346 | CONFIG_DVB_CX22702=m | ||
| 2347 | CONFIG_DVB_DRXD=m | ||
| 2348 | CONFIG_DVB_TDA1004X=m | ||
| 2349 | CONFIG_DVB_NXT6000=m | ||
| 2350 | CONFIG_DVB_MT352=m | ||
| 2351 | CONFIG_DVB_ZL10353=m | ||
| 2352 | CONFIG_DVB_DIB3000MB=m | ||
| 2353 | CONFIG_DVB_DIB3000MC=m | ||
| 2354 | CONFIG_DVB_DIB7000M=m | ||
| 2355 | CONFIG_DVB_DIB7000P=m | ||
| 2356 | CONFIG_DVB_TDA10048=m | ||
| 2357 | CONFIG_DVB_AF9013=m | ||
| 2358 | CONFIG_DVB_CXD2820R=m | ||
| 2359 | |||
| 2360 | # | ||
| 2361 | # DVB-C (cable) frontends | ||
| 2362 | # | ||
| 2363 | CONFIG_DVB_TDA10023=m | ||
| 2364 | CONFIG_DVB_STV0297=m | ||
| 2365 | |||
| 2366 | # | ||
| 2367 | # ATSC (North American/Korean Terrestrial/Cable DTV) frontends | ||
| 2368 | # | ||
| 2369 | CONFIG_DVB_NXT200X=m | ||
| 2370 | CONFIG_DVB_BCM3510=m | ||
| 2371 | CONFIG_DVB_LGDT330X=m | ||
| 2372 | CONFIG_DVB_LGDT3305=m | ||
| 2373 | CONFIG_DVB_S5H1409=m | ||
| 2374 | CONFIG_DVB_S5H1411=m | ||
| 2375 | |||
| 2376 | # | ||
| 2377 | # ISDB-T (terrestrial) frontends | ||
| 2378 | # | ||
| 2379 | CONFIG_DVB_S921=m | ||
| 2380 | CONFIG_DVB_DIB8000=m | ||
| 2381 | CONFIG_DVB_MB86A20S=m | ||
| 2382 | |||
| 2383 | # | ||
| 2384 | # Digital terrestrial only tuners/PLL | ||
| 2385 | # | ||
| 2386 | CONFIG_DVB_PLL=m | ||
| 2387 | CONFIG_DVB_TUNER_DIB0070=m | ||
| 2388 | CONFIG_DVB_TUNER_DIB0090=m | ||
| 2389 | |||
| 2390 | # | ||
| 2391 | # SEC control devices for DVB-S | ||
| 2392 | # | ||
| 2393 | CONFIG_DVB_LNBP21=m | ||
| 2394 | CONFIG_DVB_ISL6421=m | ||
| 2395 | CONFIG_DVB_ISL6423=m | ||
| 2396 | CONFIG_DVB_LGS8GXX=m | ||
| 2397 | CONFIG_DVB_ATBM8830=m | ||
| 2398 | CONFIG_DVB_IX2505V=m | ||
| 2399 | |||
| 2400 | # | ||
| 2401 | # Tools to develop new frontends | ||
| 2402 | # | ||
| 2403 | # CONFIG_DVB_DUMMY_FE is not set | ||
| 2404 | |||
| 2405 | # | ||
| 2406 | # Graphics support | ||
| 2407 | # | ||
| 2408 | CONFIG_DRM=m | ||
| 2409 | # CONFIG_VGASTATE is not set | ||
| 2410 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
| 2411 | CONFIG_FB=y | ||
| 2412 | # CONFIG_FIRMWARE_EDID is not set | ||
| 2413 | # CONFIG_FB_DDC is not set | ||
| 2414 | # CONFIG_FB_BOOT_VESA_SUPPORT is not set | ||
| 2415 | CONFIG_FB_CFB_FILLRECT=y | ||
| 2416 | CONFIG_FB_CFB_COPYAREA=y | ||
| 2417 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
| 2418 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
| 2419 | CONFIG_FB_SYS_FILLRECT=m | ||
| 2420 | CONFIG_FB_SYS_COPYAREA=m | ||
| 2421 | CONFIG_FB_SYS_IMAGEBLIT=m | ||
| 2422 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
| 2423 | CONFIG_FB_SYS_FOPS=m | ||
| 2424 | # CONFIG_FB_WMT_GE_ROPS is not set | ||
| 2425 | CONFIG_FB_DEFERRED_IO=y | ||
| 2426 | # CONFIG_FB_SVGALIB is not set | ||
| 2427 | # CONFIG_FB_MACMODES is not set | ||
| 2428 | # CONFIG_FB_BACKLIGHT is not set | ||
| 2429 | CONFIG_FB_MODE_HELPERS=y | ||
| 2430 | # CONFIG_FB_TILEBLITTING is not set | ||
| 2431 | |||
| 2432 | # | ||
| 2433 | # Frame buffer hardware drivers | ||
| 2434 | # | ||
| 2435 | # CONFIG_FB_S1D13XXX is not set | ||
| 2436 | # CONFIG_FB_TMIO is not set | ||
| 2437 | CONFIG_FB_UDL=m | ||
| 2438 | # CONFIG_FB_VIRTUAL is not set | ||
| 2439 | # CONFIG_FB_METRONOME is not set | ||
| 2440 | # CONFIG_FB_BROADSHEET is not set | ||
| 2441 | # CONFIG_FB_OMAP_BOOTLOADER_INIT is not set | ||
| 2442 | CONFIG_OMAP2_VRAM=y | ||
| 2443 | CONFIG_OMAP2_VRFB=y | ||
| 2444 | CONFIG_OMAP2_DSS=y | ||
| 2445 | CONFIG_OMAP2_VRAM_SIZE=14 | ||
| 2446 | CONFIG_OMAP2_DSS_DEBUG_SUPPORT=y | ||
| 2447 | # CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS is not set | ||
| 2448 | CONFIG_OMAP2_DSS_DPI=y | ||
| 2449 | # CONFIG_OMAP2_DSS_RFBI is not set | ||
| 2450 | CONFIG_OMAP2_DSS_VENC=y | ||
| 2451 | # CONFIG_OMAP2_DSS_SDI is not set | ||
| 2452 | CONFIG_OMAP2_DSS_DSI=y | ||
| 2453 | # CONFIG_OMAP2_DSS_FAKE_VSYNC is not set | ||
| 2454 | CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=0 | ||
| 2455 | CONFIG_OMAP2_DSS_SLEEP_BEFORE_RESET=y | ||
| 2456 | CONFIG_OMAP2_DSS_SLEEP_AFTER_VENC_RESET=y | ||
| 2457 | CONFIG_FB_OMAP2=y | ||
| 2458 | CONFIG_FB_OMAP2_DEBUG_SUPPORT=y | ||
| 2459 | CONFIG_FB_OMAP2_NUM_FBS=2 | ||
| 2460 | |||
| 2461 | # | ||
| 2462 | # OMAP2/3 Display Device Drivers | ||
| 2463 | # | ||
| 2464 | CONFIG_PANEL_GENERIC_DPI=y | ||
| 2465 | # CONFIG_PANEL_LGPHILIPS_LB035Q02 is not set | ||
| 2466 | CONFIG_PANEL_SHARP_LS037V7DW01=y | ||
| 2467 | CONFIG_PANEL_NEC_NL8048HL11_01B=y | ||
| 2468 | # CONFIG_PANEL_TAAL is not set | ||
| 2469 | CONFIG_PANEL_TPO_TD043MTEA1=m | ||
| 2470 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
| 2471 | CONFIG_LCD_CLASS_DEVICE=y | ||
| 2472 | # CONFIG_LCD_L4F00242T03 is not set | ||
| 2473 | # CONFIG_LCD_LMS283GF05 is not set | ||
| 2474 | # CONFIG_LCD_LTV350QV is not set | ||
| 2475 | # CONFIG_LCD_TDO24M is not set | ||
| 2476 | # CONFIG_LCD_VGG2432A4 is not set | ||
| 2477 | # CONFIG_LCD_PLATFORM is not set | ||
| 2478 | # CONFIG_LCD_S6E63M0 is not set | ||
| 2479 | # CONFIG_LCD_LD9040 is not set | ||
| 2480 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
| 2481 | CONFIG_BACKLIGHT_GENERIC=y | ||
| 2482 | # CONFIG_BACKLIGHT_PWM is not set | ||
| 2483 | # CONFIG_BACKLIGHT_ADP8860 is not set | ||
| 2484 | # CONFIG_BACKLIGHT_ADP8870 is not set | ||
| 2485 | |||
| 2486 | # | ||
| 2487 | # Display device support | ||
| 2488 | # | ||
| 2489 | CONFIG_DISPLAY_SUPPORT=y | ||
| 2490 | |||
| 2491 | # | ||
| 2492 | # Display hardware drivers | ||
| 2493 | # | ||
| 2494 | |||
| 2495 | # | ||
| 2496 | # Console display driver support | ||
| 2497 | # | ||
| 2498 | CONFIG_DUMMY_CONSOLE=y | ||
| 2499 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
| 2500 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
| 2501 | CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y | ||
| 2502 | # CONFIG_FONTS is not set | ||
| 2503 | CONFIG_FONT_8x8=y | ||
| 2504 | CONFIG_FONT_8x16=y | ||
| 2505 | CONFIG_LOGO=y | ||
| 2506 | # CONFIG_LOGO_LINUX_MONO is not set | ||
| 2507 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
| 2508 | CONFIG_LOGO_LINUX_CLUT224=y | ||
| 2509 | CONFIG_SOUND=y | ||
| 2510 | CONFIG_SOUND_OSS_CORE=y | ||
| 2511 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y | ||
| 2512 | CONFIG_SND=y | ||
| 2513 | CONFIG_SND_TIMER=y | ||
| 2514 | CONFIG_SND_PCM=y | ||
| 2515 | CONFIG_SND_HWDEP=y | ||
| 2516 | CONFIG_SND_RAWMIDI=y | ||
| 2517 | CONFIG_SND_JACK=y | ||
| 2518 | CONFIG_SND_SEQUENCER=m | ||
| 2519 | # CONFIG_SND_SEQ_DUMMY is not set | ||
| 2520 | CONFIG_SND_OSSEMUL=y | ||
| 2521 | CONFIG_SND_MIXER_OSS=y | ||
| 2522 | CONFIG_SND_PCM_OSS=y | ||
| 2523 | CONFIG_SND_PCM_OSS_PLUGINS=y | ||
| 2524 | CONFIG_SND_SEQUENCER_OSS=y | ||
| 2525 | CONFIG_SND_HRTIMER=m | ||
| 2526 | CONFIG_SND_SEQ_HRTIMER_DEFAULT=y | ||
| 2527 | CONFIG_SND_DYNAMIC_MINORS=y | ||
| 2528 | CONFIG_SND_SUPPORT_OLD_API=y | ||
| 2529 | CONFIG_SND_VERBOSE_PROCFS=y | ||
| 2530 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
| 2531 | # CONFIG_SND_DEBUG is not set | ||
| 2532 | CONFIG_SND_RAWMIDI_SEQ=m | ||
| 2533 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
| 2534 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
| 2535 | # CONFIG_SND_SBAWE_SEQ is not set | ||
| 2536 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
| 2537 | CONFIG_SND_DRIVERS=y | ||
| 2538 | # CONFIG_SND_DUMMY is not set | ||
| 2539 | CONFIG_SND_ALOOP=m | ||
| 2540 | # CONFIG_SND_VIRMIDI is not set | ||
| 2541 | # CONFIG_SND_MTPAV is not set | ||
| 2542 | # CONFIG_SND_SERIAL_U16550 is not set | ||
| 2543 | # CONFIG_SND_MPU401 is not set | ||
| 2544 | # CONFIG_SND_ARM is not set | ||
| 2545 | CONFIG_SND_SPI=y | ||
| 2546 | CONFIG_SND_USB=y | ||
| 2547 | CONFIG_SND_USB_AUDIO=y | ||
| 2548 | CONFIG_SND_USB_UA101=m | ||
| 2549 | CONFIG_SND_USB_CAIAQ=m | ||
| 2550 | CONFIG_SND_USB_CAIAQ_INPUT=y | ||
| 2551 | CONFIG_SND_USB_6FIRE=m | ||
| 2552 | CONFIG_SND_SOC=y | ||
| 2553 | CONFIG_SND_SOC_CACHE_LZO=y | ||
| 2554 | CONFIG_SND_OMAP_SOC=y | ||
| 2555 | CONFIG_SND_OMAP_SOC_MCBSP=y | ||
| 2556 | CONFIG_SND_OMAP_SOC_OVERO=y | ||
| 2557 | CONFIG_SND_OMAP_SOC_OMAP3EVM=y | ||
| 2558 | CONFIG_SND_OMAP_SOC_OMAP3_BEAGLE=y | ||
| 2559 | CONFIG_SND_OMAP_SOC_ZOOM2=y | ||
| 2560 | CONFIG_SND_SOC_I2C_AND_SPI=y | ||
| 2561 | # CONFIG_SND_SOC_ALL_CODECS is not set | ||
| 2562 | CONFIG_SND_SOC_TWL4030=y | ||
| 2563 | # CONFIG_SOUND_PRIME is not set | ||
| 2564 | CONFIG_HID_SUPPORT=y | ||
| 2565 | CONFIG_HID=y | ||
| 2566 | # CONFIG_HIDRAW is not set | ||
| 2567 | |||
| 2568 | # | ||
| 2569 | # USB Input Devices | ||
| 2570 | # | ||
| 2571 | CONFIG_USB_HID=y | ||
| 2572 | # CONFIG_HID_PID is not set | ||
| 2573 | # CONFIG_USB_HIDDEV is not set | ||
| 2574 | |||
| 2575 | # | ||
| 2576 | # Special HID drivers | ||
| 2577 | # | ||
| 2578 | CONFIG_HID_A4TECH=y | ||
| 2579 | CONFIG_HID_ACRUX=m | ||
| 2580 | # CONFIG_HID_ACRUX_FF is not set | ||
| 2581 | CONFIG_HID_APPLE=y | ||
| 2582 | CONFIG_HID_BELKIN=y | ||
| 2583 | CONFIG_HID_CHERRY=y | ||
| 2584 | CONFIG_HID_CHICONY=y | ||
| 2585 | # CONFIG_HID_PRODIKEYS is not set | ||
| 2586 | CONFIG_HID_CYPRESS=y | ||
| 2587 | # CONFIG_HID_DRAGONRISE is not set | ||
| 2588 | CONFIG_HID_EMS_FF=m | ||
| 2589 | # CONFIG_HID_ELECOM is not set | ||
| 2590 | CONFIG_HID_EZKEY=y | ||
| 2591 | CONFIG_HID_KEYTOUCH=m | ||
| 2592 | # CONFIG_HID_KYE is not set | ||
| 2593 | CONFIG_HID_UCLOGIC=m | ||
| 2594 | CONFIG_HID_WALTOP=m | ||
| 2595 | CONFIG_HID_GYRATION=y | ||
| 2596 | # CONFIG_HID_TWINHAN is not set | ||
| 2597 | # CONFIG_HID_KENSINGTON is not set | ||
| 2598 | CONFIG_HID_LCPOWER=m | ||
| 2599 | CONFIG_HID_LOGITECH=y | ||
| 2600 | # CONFIG_LOGITECH_FF is not set | ||
| 2601 | # CONFIG_LOGIRUMBLEPAD2_FF is not set | ||
| 2602 | # CONFIG_LOGIG940_FF is not set | ||
| 2603 | # CONFIG_LOGIWII_FF is not set | ||
| 2604 | CONFIG_HID_MAGICMOUSE=m | ||
| 2605 | CONFIG_HID_MICROSOFT=y | ||
| 2606 | CONFIG_HID_MONTEREY=y | ||
| 2607 | CONFIG_HID_MULTITOUCH=m | ||
| 2608 | CONFIG_HID_NTRIG=y | ||
| 2609 | # CONFIG_HID_ORTEK is not set | ||
| 2610 | CONFIG_HID_PANTHERLORD=y | ||
| 2611 | # CONFIG_PANTHERLORD_FF is not set | ||
| 2612 | CONFIG_HID_PETALYNX=y | ||
| 2613 | CONFIG_HID_PICOLCD=m | ||
| 2614 | CONFIG_HID_PICOLCD_FB=y | ||
| 2615 | CONFIG_HID_PICOLCD_BACKLIGHT=y | ||
| 2616 | # CONFIG_HID_PICOLCD_LCD is not set | ||
| 2617 | CONFIG_HID_PICOLCD_LEDS=y | ||
| 2618 | CONFIG_HID_QUANTA=m | ||
| 2619 | CONFIG_HID_ROCCAT=m | ||
| 2620 | CONFIG_HID_ROCCAT_COMMON=m | ||
| 2621 | CONFIG_HID_ROCCAT_ARVO=m | ||
| 2622 | CONFIG_HID_ROCCAT_KONE=m | ||
| 2623 | CONFIG_HID_ROCCAT_KONEPLUS=m | ||
| 2624 | CONFIG_HID_ROCCAT_KOVAPLUS=m | ||
| 2625 | # CONFIG_HID_ROCCAT_PYRA is not set | ||
| 2626 | CONFIG_HID_SAMSUNG=y | ||
| 2627 | CONFIG_HID_SONY=y | ||
| 2628 | CONFIG_HID_SUNPLUS=y | ||
| 2629 | # CONFIG_HID_GREENASIA is not set | ||
| 2630 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
| 2631 | CONFIG_HID_TOPSEED=y | ||
| 2632 | # CONFIG_HID_THRUSTMASTER is not set | ||
| 2633 | # CONFIG_HID_WACOM is not set | ||
| 2634 | # CONFIG_HID_ZEROPLUS is not set | ||
| 2635 | # CONFIG_HID_ZYDACRON is not set | ||
| 2636 | CONFIG_USB_SUPPORT=y | ||
| 2637 | CONFIG_USB_ARCH_HAS_HCD=y | ||
| 2638 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
| 2639 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
| 2640 | CONFIG_USB=y | ||
| 2641 | # CONFIG_USB_DEBUG is not set | ||
| 2642 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
| 2643 | |||
| 2644 | # | ||
| 2645 | # Miscellaneous USB options | ||
| 2646 | # | ||
| 2647 | CONFIG_USB_DEVICEFS=y | ||
| 2648 | CONFIG_USB_DEVICE_CLASS=y | ||
| 2649 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
| 2650 | CONFIG_USB_SUSPEND=y | ||
| 2651 | CONFIG_USB_OTG=y | ||
| 2652 | # CONFIG_USB_OTG_WHITELIST is not set | ||
| 2653 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
| 2654 | CONFIG_USB_MON=y | ||
| 2655 | # CONFIG_USB_WUSB is not set | ||
| 2656 | # CONFIG_USB_WUSB_CBAF is not set | ||
| 2657 | |||
| 2658 | # | ||
| 2659 | # USB Host Controller Drivers | ||
| 2660 | # | ||
| 2661 | # CONFIG_USB_C67X00_HCD is not set | ||
| 2662 | CONFIG_USB_EHCI_HCD=y | ||
| 2663 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
| 2664 | CONFIG_USB_EHCI_TT_NEWSCHED=y | ||
| 2665 | CONFIG_USB_EHCI_HCD_OMAP=y | ||
| 2666 | # CONFIG_USB_OXU210HP_HCD is not set | ||
| 2667 | # CONFIG_USB_ISP116X_HCD is not set | ||
| 2668 | # CONFIG_USB_ISP1760_HCD is not set | ||
| 2669 | # CONFIG_USB_ISP1362_HCD is not set | ||
| 2670 | # CONFIG_USB_OHCI_HCD is not set | ||
| 2671 | # CONFIG_USB_U132_HCD is not set | ||
| 2672 | # CONFIG_USB_SL811_HCD is not set | ||
| 2673 | # CONFIG_USB_R8A66597_HCD is not set | ||
| 2674 | # CONFIG_USB_HWA_HCD is not set | ||
| 2675 | CONFIG_USB_MUSB_HDRC=y | ||
| 2676 | # CONFIG_USB_MUSB_TUSB6010 is not set | ||
| 2677 | CONFIG_USB_MUSB_OMAP2PLUS=y | ||
| 2678 | # CONFIG_USB_MUSB_AM35X is not set | ||
| 2679 | # CONFIG_USB_MUSB_HOST is not set | ||
| 2680 | # CONFIG_USB_MUSB_PERIPHERAL is not set | ||
| 2681 | CONFIG_USB_MUSB_OTG=y | ||
| 2682 | CONFIG_USB_GADGET_MUSB_HDRC=y | ||
| 2683 | CONFIG_USB_MUSB_HDRC_HCD=y | ||
| 2684 | # CONFIG_MUSB_PIO_ONLY is not set | ||
| 2685 | # CONFIG_USB_UX500_DMA is not set | ||
| 2686 | CONFIG_USB_INVENTRA_DMA=y | ||
| 2687 | # CONFIG_USB_TI_CPPI_DMA is not set | ||
| 2688 | |||
| 2689 | # | ||
| 2690 | # USB Device Class drivers | ||
| 2691 | # | ||
| 2692 | CONFIG_USB_ACM=m | ||
| 2693 | CONFIG_USB_PRINTER=m | ||
| 2694 | CONFIG_USB_WDM=m | ||
| 2695 | CONFIG_USB_TMC=m | ||
| 2696 | |||
| 2697 | # | ||
| 2698 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
| 2699 | # | ||
| 2700 | |||
| 2701 | # | ||
| 2702 | # also be needed; see USB_STORAGE Help for more info | ||
| 2703 | # | ||
| 2704 | CONFIG_USB_STORAGE=y | ||
| 2705 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
| 2706 | CONFIG_USB_STORAGE_REALTEK=m | ||
| 2707 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
| 2708 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
| 2709 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
| 2710 | # CONFIG_USB_STORAGE_USBAT is not set | ||
| 2711 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
| 2712 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
| 2713 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
| 2714 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
| 2715 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
| 2716 | # CONFIG_USB_STORAGE_KARMA is not set | ||
| 2717 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
| 2718 | CONFIG_USB_STORAGE_ENE_UB6250=m | ||
| 2719 | CONFIG_USB_UAS=m | ||
| 2720 | # CONFIG_USB_LIBUSUAL is not set | ||
| 2721 | |||
| 2722 | # | ||
| 2723 | # USB Imaging devices | ||
| 2724 | # | ||
| 2725 | # CONFIG_USB_MDC800 is not set | ||
| 2726 | # CONFIG_USB_MICROTEK is not set | ||
| 2727 | |||
| 2728 | # | ||
| 2729 | # USB port drivers | ||
| 2730 | # | ||
| 2731 | CONFIG_USB_SERIAL=m | ||
| 2732 | CONFIG_USB_EZUSB=y | ||
| 2733 | CONFIG_USB_SERIAL_GENERIC=y | ||
| 2734 | CONFIG_USB_SERIAL_AIRCABLE=m | ||
| 2735 | CONFIG_USB_SERIAL_ARK3116=m | ||
| 2736 | CONFIG_USB_SERIAL_BELKIN=m | ||
| 2737 | CONFIG_USB_SERIAL_CH341=m | ||
| 2738 | # CONFIG_USB_SERIAL_WHITEHEAT is not set | ||
| 2739 | CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m | ||
| 2740 | # CONFIG_USB_SERIAL_CP210X is not set | ||
| 2741 | CONFIG_USB_SERIAL_CYPRESS_M8=m | ||
| 2742 | CONFIG_USB_SERIAL_EMPEG=m | ||
| 2743 | CONFIG_USB_SERIAL_FTDI_SIO=m | ||
| 2744 | CONFIG_USB_SERIAL_FUNSOFT=m | ||
| 2745 | CONFIG_USB_SERIAL_VISOR=m | ||
| 2746 | CONFIG_USB_SERIAL_IPAQ=m | ||
| 2747 | CONFIG_USB_SERIAL_IR=m | ||
| 2748 | CONFIG_USB_SERIAL_EDGEPORT=m | ||
| 2749 | CONFIG_USB_SERIAL_EDGEPORT_TI=m | ||
| 2750 | CONFIG_USB_SERIAL_GARMIN=m | ||
| 2751 | CONFIG_USB_SERIAL_IPW=m | ||
| 2752 | CONFIG_USB_SERIAL_IUU=m | ||
| 2753 | CONFIG_USB_SERIAL_KEYSPAN_PDA=m | ||
| 2754 | CONFIG_USB_SERIAL_KEYSPAN=m | ||
| 2755 | CONFIG_USB_SERIAL_KEYSPAN_MPR=y | ||
| 2756 | CONFIG_USB_SERIAL_KEYSPAN_USA28=y | ||
| 2757 | CONFIG_USB_SERIAL_KEYSPAN_USA28X=y | ||
| 2758 | CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y | ||
| 2759 | CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y | ||
| 2760 | CONFIG_USB_SERIAL_KEYSPAN_USA19=y | ||
| 2761 | CONFIG_USB_SERIAL_KEYSPAN_USA18X=y | ||
| 2762 | CONFIG_USB_SERIAL_KEYSPAN_USA19W=y | ||
| 2763 | CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y | ||
| 2764 | CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y | ||
| 2765 | CONFIG_USB_SERIAL_KEYSPAN_USA49W=y | ||
| 2766 | CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y | ||
| 2767 | CONFIG_USB_SERIAL_KLSI=m | ||
| 2768 | CONFIG_USB_SERIAL_KOBIL_SCT=m | ||
| 2769 | CONFIG_USB_SERIAL_MCT_U232=m | ||
| 2770 | CONFIG_USB_SERIAL_MOS7720=m | ||
| 2771 | CONFIG_USB_SERIAL_MOS7840=m | ||
| 2772 | CONFIG_USB_SERIAL_MOTOROLA=m | ||
| 2773 | CONFIG_USB_SERIAL_NAVMAN=m | ||
| 2774 | CONFIG_USB_SERIAL_PL2303=m | ||
| 2775 | CONFIG_USB_SERIAL_OTI6858=m | ||
| 2776 | CONFIG_USB_SERIAL_QCAUX=m | ||
| 2777 | # CONFIG_USB_SERIAL_QUALCOMM is not set | ||
| 2778 | CONFIG_USB_SERIAL_SPCP8X5=m | ||
| 2779 | CONFIG_USB_SERIAL_HP4X=m | ||
| 2780 | CONFIG_USB_SERIAL_SAFE=m | ||
| 2781 | # CONFIG_USB_SERIAL_SAFE_PADDED is not set | ||
| 2782 | CONFIG_USB_SERIAL_SIEMENS_MPI=m | ||
| 2783 | CONFIG_USB_SERIAL_SIERRAWIRELESS=m | ||
| 2784 | # CONFIG_USB_SERIAL_SYMBOL is not set | ||
| 2785 | # CONFIG_USB_SERIAL_TI is not set | ||
| 2786 | CONFIG_USB_SERIAL_CYBERJACK=m | ||
| 2787 | # CONFIG_USB_SERIAL_XIRCOM is not set | ||
| 2788 | CONFIG_USB_SERIAL_WWAN=m | ||
| 2789 | CONFIG_USB_SERIAL_OPTION=m | ||
| 2790 | CONFIG_USB_SERIAL_OMNINET=m | ||
| 2791 | CONFIG_USB_SERIAL_OPTICON=m | ||
| 2792 | CONFIG_USB_SERIAL_VIVOPAY_SERIAL=m | ||
| 2793 | CONFIG_USB_SERIAL_ZIO=m | ||
| 2794 | CONFIG_USB_SERIAL_SSU100=m | ||
| 2795 | CONFIG_USB_SERIAL_DEBUG=m | ||
| 2796 | |||
| 2797 | # | ||
| 2798 | # USB Miscellaneous drivers | ||
| 2799 | # | ||
| 2800 | CONFIG_USB_EMI62=m | ||
| 2801 | CONFIG_USB_EMI26=m | ||
| 2802 | # CONFIG_USB_ADUTUX is not set | ||
| 2803 | # CONFIG_USB_SEVSEG is not set | ||
| 2804 | # CONFIG_USB_RIO500 is not set | ||
| 2805 | CONFIG_USB_LEGOTOWER=m | ||
| 2806 | CONFIG_USB_LCD=m | ||
| 2807 | CONFIG_USB_LED=m | ||
| 2808 | CONFIG_USB_CYPRESS_CY7C63=m | ||
| 2809 | CONFIG_USB_CYTHERM=m | ||
| 2810 | CONFIG_USB_IDMOUSE=m | ||
| 2811 | CONFIG_USB_FTDI_ELAN=m | ||
| 2812 | # CONFIG_USB_APPLEDISPLAY is not set | ||
| 2813 | CONFIG_USB_SISUSBVGA=m | ||
| 2814 | CONFIG_USB_SISUSBVGA_CON=y | ||
| 2815 | CONFIG_USB_LD=m | ||
| 2816 | CONFIG_USB_TRANCEVIBRATOR=m | ||
| 2817 | # CONFIG_USB_IOWARRIOR is not set | ||
| 2818 | CONFIG_USB_TEST=m | ||
| 2819 | # CONFIG_USB_ISIGHTFW is not set | ||
| 2820 | CONFIG_USB_YUREX=m | ||
| 2821 | CONFIG_USB_ATM=m | ||
| 2822 | CONFIG_USB_SPEEDTOUCH=m | ||
| 2823 | CONFIG_USB_CXACRU=m | ||
| 2824 | CONFIG_USB_UEAGLEATM=m | ||
| 2825 | CONFIG_USB_XUSBATM=m | ||
| 2826 | CONFIG_USB_GADGET=y | ||
| 2827 | # CONFIG_USB_GADGET_DEBUG is not set | ||
| 2828 | # CONFIG_USB_GADGET_DEBUG_FILES is not set | ||
| 2829 | CONFIG_USB_GADGET_DEBUG_FS=y | ||
| 2830 | CONFIG_USB_GADGET_VBUS_DRAW=480 | ||
| 2831 | CONFIG_USB_GADGET_SELECTED=y | ||
| 2832 | # CONFIG_USB_GADGET_FUSB300 is not set | ||
| 2833 | # CONFIG_USB_GADGET_OMAP is not set | ||
| 2834 | # CONFIG_USB_GADGET_R8A66597 is not set | ||
| 2835 | # CONFIG_USB_GADGET_PXA_U2O is not set | ||
| 2836 | # CONFIG_USB_GADGET_M66592 is not set | ||
| 2837 | # CONFIG_USB_GADGET_DUMMY_HCD is not set | ||
| 2838 | CONFIG_USB_GADGET_DUALSPEED=y | ||
| 2839 | # CONFIG_USB_ZERO is not set | ||
| 2840 | # CONFIG_USB_AUDIO is not set | ||
| 2841 | CONFIG_USB_ETH=m | ||
| 2842 | CONFIG_USB_ETH_RNDIS=y | ||
| 2843 | # CONFIG_USB_ETH_EEM is not set | ||
| 2844 | CONFIG_USB_G_NCM=m | ||
| 2845 | # CONFIG_USB_GADGETFS is not set | ||
| 2846 | CONFIG_USB_FUNCTIONFS=m | ||
| 2847 | # CONFIG_USB_FUNCTIONFS_ETH is not set | ||
| 2848 | CONFIG_USB_FUNCTIONFS_RNDIS=y | ||
| 2849 | # CONFIG_USB_FUNCTIONFS_GENERIC is not set | ||
| 2850 | CONFIG_USB_FILE_STORAGE=m | ||
| 2851 | # CONFIG_USB_FILE_STORAGE_TEST is not set | ||
| 2852 | CONFIG_USB_MASS_STORAGE=m | ||
| 2853 | # CONFIG_USB_G_SERIAL is not set | ||
| 2854 | # CONFIG_USB_MIDI_GADGET is not set | ||
| 2855 | # CONFIG_USB_G_PRINTER is not set | ||
| 2856 | CONFIG_USB_CDC_COMPOSITE=m | ||
| 2857 | # CONFIG_USB_G_MULTI is not set | ||
| 2858 | CONFIG_USB_G_HID=m | ||
| 2859 | CONFIG_USB_G_DBGP=m | ||
| 2860 | # CONFIG_USB_G_DBGP_PRINTK is not set | ||
| 2861 | CONFIG_USB_G_DBGP_SERIAL=y | ||
| 2862 | CONFIG_USB_G_WEBCAM=m | ||
| 2863 | |||
| 2864 | # | ||
| 2865 | # OTG and related infrastructure | ||
| 2866 | # | ||
| 2867 | CONFIG_USB_OTG_UTILS=y | ||
| 2868 | CONFIG_USB_GPIO_VBUS=y | ||
| 2869 | # CONFIG_ISP1301_OMAP is not set | ||
| 2870 | # CONFIG_USB_ULPI is not set | ||
| 2871 | CONFIG_TWL4030_USB=y | ||
| 2872 | CONFIG_TWL6030_USB=y | ||
| 2873 | CONFIG_NOP_USB_XCEIV=y | ||
| 2874 | CONFIG_MMC=y | ||
| 2875 | # CONFIG_MMC_DEBUG is not set | ||
| 2876 | CONFIG_MMC_UNSAFE_RESUME=y | ||
| 2877 | # CONFIG_MMC_CLKGATE is not set | ||
| 2878 | |||
| 2879 | # | ||
| 2880 | # MMC/SD/SDIO Card Drivers | ||
| 2881 | # | ||
| 2882 | CONFIG_MMC_BLOCK=y | ||
| 2883 | CONFIG_MMC_BLOCK_MINORS=8 | ||
| 2884 | CONFIG_MMC_BLOCK_BOUNCE=y | ||
| 2885 | CONFIG_SDIO_UART=y | ||
| 2886 | # CONFIG_MMC_TEST is not set | ||
| 2887 | |||
| 2888 | # | ||
| 2889 | # MMC/SD/SDIO Host Controller Drivers | ||
| 2890 | # | ||
| 2891 | # CONFIG_MMC_SDHCI is not set | ||
| 2892 | # CONFIG_MMC_OMAP is not set | ||
| 2893 | CONFIG_MMC_OMAP_HS=y | ||
| 2894 | CONFIG_MMC_SPI=m | ||
| 2895 | # CONFIG_MMC_DW is not set | ||
| 2896 | # CONFIG_MMC_VUB300 is not set | ||
| 2897 | CONFIG_MMC_USHC=m | ||
| 2898 | # CONFIG_MEMSTICK is not set | ||
| 2899 | CONFIG_NEW_LEDS=y | ||
| 2900 | CONFIG_LEDS_CLASS=y | ||
| 2901 | |||
| 2902 | # | ||
| 2903 | # LED drivers | ||
| 2904 | # | ||
| 2905 | # CONFIG_LEDS_LM3530 is not set | ||
| 2906 | # CONFIG_LEDS_PCA9532 is not set | ||
| 2907 | CONFIG_LEDS_GPIO=y | ||
| 2908 | CONFIG_LEDS_GPIO_PLATFORM=y | ||
| 2909 | # CONFIG_LEDS_LP3944 is not set | ||
| 2910 | CONFIG_LEDS_LP5521=m | ||
| 2911 | CONFIG_LEDS_LP5523=m | ||
| 2912 | # CONFIG_LEDS_PCA955X is not set | ||
| 2913 | # CONFIG_LEDS_DAC124S085 is not set | ||
| 2914 | CONFIG_LEDS_PWM=m | ||
| 2915 | CONFIG_LEDS_REGULATOR=m | ||
| 2916 | # CONFIG_LEDS_BD2802 is not set | ||
| 2917 | CONFIG_LEDS_WS2801=y | ||
| 2918 | # CONFIG_LEDS_LT3593 is not set | ||
| 2919 | CONFIG_LEDS_TRIGGERS=y | ||
| 2920 | |||
| 2921 | # | ||
| 2922 | # LED Triggers | ||
| 2923 | # | ||
| 2924 | CONFIG_LEDS_TRIGGER_TIMER=m | ||
| 2925 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
| 2926 | CONFIG_LEDS_TRIGGER_BACKLIGHT=m | ||
| 2927 | CONFIG_LEDS_TRIGGER_GPIO=m | ||
| 2928 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=m | ||
| 2929 | |||
| 2930 | # | ||
| 2931 | # iptables trigger is under Netfilter config (LED target) | ||
| 2932 | # | ||
| 2933 | CONFIG_NFC_DEVICES=y | ||
| 2934 | CONFIG_PN544_NFC=m | ||
| 2935 | # CONFIG_ACCESSIBILITY is not set | ||
| 2936 | CONFIG_RTC_LIB=y | ||
| 2937 | CONFIG_RTC_CLASS=y | ||
| 2938 | CONFIG_RTC_HCTOSYS=y | ||
| 2939 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
| 2940 | # CONFIG_RTC_DEBUG is not set | ||
| 2941 | |||
| 2942 | # | ||
| 2943 | # RTC interfaces | ||
| 2944 | # | ||
| 2945 | CONFIG_RTC_INTF_SYSFS=y | ||
| 2946 | CONFIG_RTC_INTF_PROC=y | ||
| 2947 | CONFIG_RTC_INTF_DEV=y | ||
| 2948 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
| 2949 | # CONFIG_RTC_DRV_TEST is not set | ||
| 2950 | |||
| 2951 | # | ||
| 2952 | # I2C RTC drivers | ||
| 2953 | # | ||
| 2954 | CONFIG_RTC_DRV_DS1307=y | ||
| 2955 | # CONFIG_RTC_DRV_DS1374 is not set | ||
| 2956 | # CONFIG_RTC_DRV_DS1672 is not set | ||
| 2957 | # CONFIG_RTC_DRV_DS3232 is not set | ||
| 2958 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
| 2959 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
| 2960 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
| 2961 | # CONFIG_RTC_DRV_ISL12022 is not set | ||
| 2962 | # CONFIG_RTC_DRV_X1205 is not set | ||
| 2963 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
| 2964 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
| 2965 | # CONFIG_RTC_DRV_M41T80 is not set | ||
| 2966 | CONFIG_RTC_DRV_BQ32K=m | ||
| 2967 | CONFIG_RTC_DRV_TWL4030=m | ||
| 2968 | # CONFIG_RTC_DRV_S35390A is not set | ||
| 2969 | # CONFIG_RTC_DRV_FM3130 is not set | ||
| 2970 | # CONFIG_RTC_DRV_RX8581 is not set | ||
| 2971 | # CONFIG_RTC_DRV_RX8025 is not set | ||
| 2972 | # CONFIG_RTC_DRV_EM3027 is not set | ||
| 2973 | # CONFIG_RTC_DRV_RV3029C2 is not set | ||
| 2974 | |||
| 2975 | # | ||
| 2976 | # SPI RTC drivers | ||
| 2977 | # | ||
| 2978 | # CONFIG_RTC_DRV_M41T93 is not set | ||
| 2979 | # CONFIG_RTC_DRV_M41T94 is not set | ||
| 2980 | # CONFIG_RTC_DRV_DS1305 is not set | ||
| 2981 | # CONFIG_RTC_DRV_DS1390 is not set | ||
| 2982 | # CONFIG_RTC_DRV_MAX6902 is not set | ||
| 2983 | # CONFIG_RTC_DRV_R9701 is not set | ||
| 2984 | # CONFIG_RTC_DRV_RS5C348 is not set | ||
| 2985 | # CONFIG_RTC_DRV_DS3234 is not set | ||
| 2986 | # CONFIG_RTC_DRV_PCF2123 is not set | ||
| 2987 | |||
| 2988 | # | ||
| 2989 | # Platform RTC drivers | ||
| 2990 | # | ||
| 2991 | # CONFIG_RTC_DRV_CMOS is not set | ||
| 2992 | # CONFIG_RTC_DRV_DS1286 is not set | ||
| 2993 | # CONFIG_RTC_DRV_DS1511 is not set | ||
| 2994 | # CONFIG_RTC_DRV_DS1553 is not set | ||
| 2995 | # CONFIG_RTC_DRV_DS1742 is not set | ||
| 2996 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
| 2997 | # CONFIG_RTC_DRV_M48T86 is not set | ||
| 2998 | # CONFIG_RTC_DRV_M48T35 is not set | ||
| 2999 | # CONFIG_RTC_DRV_M48T59 is not set | ||
| 3000 | # CONFIG_RTC_DRV_MSM6242 is not set | ||
| 3001 | # CONFIG_RTC_DRV_BQ4802 is not set | ||
| 3002 | # CONFIG_RTC_DRV_RP5C01 is not set | ||
| 3003 | # CONFIG_RTC_DRV_V3020 is not set | ||
| 3004 | |||
| 3005 | # | ||
| 3006 | # on-CPU RTC drivers | ||
| 3007 | # | ||
| 3008 | # CONFIG_DMADEVICES is not set | ||
| 3009 | # CONFIG_AUXDISPLAY is not set | ||
| 3010 | CONFIG_UIO=m | ||
| 3011 | CONFIG_UIO_PDRV=m | ||
| 3012 | CONFIG_UIO_PDRV_GENIRQ=m | ||
| 3013 | CONFIG_STAGING=y | ||
| 3014 | # CONFIG_VIDEO_TM6000 is not set | ||
| 3015 | # CONFIG_USBIP_CORE is not set | ||
| 3016 | CONFIG_W35UND=m | ||
| 3017 | CONFIG_PRISM2_USB=m | ||
| 3018 | CONFIG_ECHO=m | ||
| 3019 | # CONFIG_BRCMUTIL is not set | ||
| 3020 | # CONFIG_ASUS_OLED is not set | ||
| 3021 | CONFIG_R8712U=m | ||
| 3022 | CONFIG_R8712_AP=y | ||
| 3023 | # CONFIG_TRANZPORT is not set | ||
| 3024 | # CONFIG_POHMELFS is not set | ||
| 3025 | # CONFIG_LINE6_USB is not set | ||
| 3026 | # CONFIG_USB_SERIAL_QUATECH2 is not set | ||
| 3027 | # CONFIG_USB_SERIAL_QUATECH_USB2 is not set | ||
| 3028 | # CONFIG_VT6656 is not set | ||
| 3029 | # CONFIG_IIO is not set | ||
| 3030 | CONFIG_XVMALLOC=y | ||
| 3031 | CONFIG_ZRAM=m | ||
| 3032 | # CONFIG_ZRAM_DEBUG is not set | ||
| 3033 | # CONFIG_FB_SM7XX is not set | ||
| 3034 | # CONFIG_LIRC_STAGING is not set | ||
| 3035 | # CONFIG_EASYCAP is not set | ||
| 3036 | # CONFIG_TIDSPBRIDGE is not set | ||
| 3037 | # CONFIG_MACH_OMAP3_WESTBRIDGE_AST_PNAND_HAL is not set | ||
| 3038 | CONFIG_MACH_NO_WESTBRIDGE=y | ||
| 3039 | # CONFIG_ATH6K_LEGACY is not set | ||
| 3040 | CONFIG_USB_ENESTORAGE=m | ||
| 3041 | CONFIG_BCM_WIMAX=m | ||
| 3042 | CONFIG_FT1000=m | ||
| 3043 | CONFIG_FT1000_USB=m | ||
| 3044 | |||
| 3045 | # | ||
| 3046 | # Speakup console speech | ||
| 3047 | # | ||
| 3048 | # CONFIG_SPEAKUP is not set | ||
| 3049 | CONFIG_TOUCHSCREEN_CLEARPAD_TM1217=m | ||
| 3050 | CONFIG_TOUCHSCREEN_SYNAPTICS_I2C_RMI4=m | ||
| 3051 | |||
| 3052 | # | ||
| 3053 | # Altera FPGA firmware download module | ||
| 3054 | # | ||
| 3055 | # CONFIG_ALTERA_STAPL is not set | ||
| 3056 | CONFIG_CLKDEV_LOOKUP=y | ||
| 3057 | |||
| 3058 | # | ||
| 3059 | # File systems | ||
| 3060 | # | ||
| 3061 | CONFIG_EXT2_FS=y | ||
| 3062 | CONFIG_EXT2_FS_XATTR=y | ||
| 3063 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
| 3064 | CONFIG_EXT2_FS_SECURITY=y | ||
| 3065 | # CONFIG_EXT2_FS_XIP is not set | ||
| 3066 | CONFIG_EXT3_FS=y | ||
| 3067 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
| 3068 | CONFIG_EXT3_FS_XATTR=y | ||
| 3069 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
| 3070 | # CONFIG_EXT3_FS_SECURITY is not set | ||
| 3071 | CONFIG_EXT4_FS=y | ||
| 3072 | CONFIG_EXT4_FS_XATTR=y | ||
| 3073 | CONFIG_EXT4_FS_POSIX_ACL=y | ||
| 3074 | CONFIG_EXT4_FS_SECURITY=y | ||
| 3075 | # CONFIG_EXT4_DEBUG is not set | ||
| 3076 | CONFIG_JBD=y | ||
| 3077 | # CONFIG_JBD_DEBUG is not set | ||
| 3078 | CONFIG_JBD2=y | ||
| 3079 | # CONFIG_JBD2_DEBUG is not set | ||
| 3080 | CONFIG_FS_MBCACHE=y | ||
| 3081 | CONFIG_REISERFS_FS=m | ||
| 3082 | # CONFIG_REISERFS_CHECK is not set | ||
| 3083 | CONFIG_REISERFS_PROC_INFO=y | ||
| 3084 | CONFIG_REISERFS_FS_XATTR=y | ||
| 3085 | # CONFIG_REISERFS_FS_POSIX_ACL is not set | ||
| 3086 | # CONFIG_REISERFS_FS_SECURITY is not set | ||
| 3087 | CONFIG_JFS_FS=m | ||
| 3088 | CONFIG_JFS_POSIX_ACL=y | ||
| 3089 | # CONFIG_JFS_SECURITY is not set | ||
| 3090 | # CONFIG_JFS_DEBUG is not set | ||
| 3091 | CONFIG_JFS_STATISTICS=y | ||
| 3092 | CONFIG_XFS_FS=m | ||
| 3093 | CONFIG_XFS_QUOTA=y | ||
| 3094 | CONFIG_XFS_POSIX_ACL=y | ||
| 3095 | CONFIG_XFS_RT=y | ||
| 3096 | # CONFIG_XFS_DEBUG is not set | ||
| 3097 | CONFIG_GFS2_FS=m | ||
| 3098 | CONFIG_GFS2_FS_LOCKING_DLM=y | ||
| 3099 | CONFIG_OCFS2_FS=m | ||
| 3100 | CONFIG_OCFS2_FS_O2CB=m | ||
| 3101 | CONFIG_OCFS2_FS_USERSPACE_CLUSTER=m | ||
| 3102 | CONFIG_OCFS2_FS_STATS=y | ||
| 3103 | CONFIG_OCFS2_DEBUG_MASKLOG=y | ||
| 3104 | # CONFIG_OCFS2_DEBUG_FS is not set | ||
| 3105 | CONFIG_BTRFS_FS=m | ||
| 3106 | CONFIG_BTRFS_FS_POSIX_ACL=y | ||
| 3107 | CONFIG_NILFS2_FS=m | ||
| 3108 | CONFIG_FS_POSIX_ACL=y | ||
| 3109 | CONFIG_EXPORTFS=y | ||
| 3110 | CONFIG_FILE_LOCKING=y | ||
| 3111 | CONFIG_FSNOTIFY=y | ||
| 3112 | CONFIG_DNOTIFY=y | ||
| 3113 | CONFIG_INOTIFY_USER=y | ||
| 3114 | CONFIG_FANOTIFY=y | ||
| 3115 | CONFIG_QUOTA=y | ||
| 3116 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set | ||
| 3117 | CONFIG_PRINT_QUOTA_WARNING=y | ||
| 3118 | # CONFIG_QUOTA_DEBUG is not set | ||
| 3119 | CONFIG_QUOTA_TREE=y | ||
| 3120 | # CONFIG_QFMT_V1 is not set | ||
| 3121 | CONFIG_QFMT_V2=y | ||
| 3122 | CONFIG_QUOTACTL=y | ||
| 3123 | CONFIG_AUTOFS4_FS=y | ||
| 3124 | CONFIG_FUSE_FS=m | ||
| 3125 | CONFIG_CUSE=m | ||
| 3126 | CONFIG_GENERIC_ACL=y | ||
| 3127 | |||
| 3128 | # | ||
| 3129 | # Caches | ||
| 3130 | # | ||
| 3131 | CONFIG_FSCACHE=m | ||
| 3132 | CONFIG_FSCACHE_STATS=y | ||
| 3133 | CONFIG_FSCACHE_HISTOGRAM=y | ||
| 3134 | # CONFIG_FSCACHE_DEBUG is not set | ||
| 3135 | # CONFIG_FSCACHE_OBJECT_LIST is not set | ||
| 3136 | CONFIG_CACHEFILES=m | ||
| 3137 | # CONFIG_CACHEFILES_DEBUG is not set | ||
| 3138 | CONFIG_CACHEFILES_HISTOGRAM=y | ||
| 3139 | |||
| 3140 | # | ||
| 3141 | # CD-ROM/DVD Filesystems | ||
| 3142 | # | ||
| 3143 | CONFIG_ISO9660_FS=m | ||
| 3144 | CONFIG_JOLIET=y | ||
| 3145 | CONFIG_ZISOFS=y | ||
| 3146 | CONFIG_UDF_FS=m | ||
| 3147 | CONFIG_UDF_NLS=y | ||
| 3148 | |||
| 3149 | # | ||
| 3150 | # DOS/FAT/NT Filesystems | ||
| 3151 | # | ||
| 3152 | CONFIG_FAT_FS=y | ||
| 3153 | CONFIG_MSDOS_FS=y | ||
| 3154 | CONFIG_VFAT_FS=y | ||
| 3155 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
| 3156 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
| 3157 | CONFIG_NTFS_FS=m | ||
| 3158 | # CONFIG_NTFS_DEBUG is not set | ||
| 3159 | # CONFIG_NTFS_RW is not set | ||
| 3160 | |||
| 3161 | # | ||
| 3162 | # Pseudo filesystems | ||
| 3163 | # | ||
| 3164 | CONFIG_PROC_FS=y | ||
| 3165 | CONFIG_PROC_SYSCTL=y | ||
| 3166 | CONFIG_PROC_PAGE_MONITOR=y | ||
| 3167 | CONFIG_SYSFS=y | ||
| 3168 | CONFIG_TMPFS=y | ||
| 3169 | CONFIG_TMPFS_POSIX_ACL=y | ||
| 3170 | CONFIG_TMPFS_XATTR=y | ||
| 3171 | # CONFIG_HUGETLB_PAGE is not set | ||
| 3172 | CONFIG_CONFIGFS_FS=m | ||
| 3173 | CONFIG_MISC_FILESYSTEMS=y | ||
| 3174 | CONFIG_ADFS_FS=m | ||
| 3175 | # CONFIG_ADFS_FS_RW is not set | ||
| 3176 | CONFIG_AFFS_FS=m | ||
| 3177 | # CONFIG_ECRYPT_FS is not set | ||
| 3178 | CONFIG_HFS_FS=m | ||
| 3179 | CONFIG_HFSPLUS_FS=m | ||
| 3180 | CONFIG_BEFS_FS=m | ||
| 3181 | # CONFIG_BEFS_DEBUG is not set | ||
| 3182 | CONFIG_BFS_FS=m | ||
| 3183 | CONFIG_EFS_FS=m | ||
| 3184 | CONFIG_JFFS2_FS=y | ||
| 3185 | CONFIG_JFFS2_FS_DEBUG=0 | ||
| 3186 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
| 3187 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
| 3188 | CONFIG_JFFS2_SUMMARY=y | ||
| 3189 | CONFIG_JFFS2_FS_XATTR=y | ||
| 3190 | CONFIG_JFFS2_FS_POSIX_ACL=y | ||
| 3191 | CONFIG_JFFS2_FS_SECURITY=y | ||
| 3192 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
| 3193 | CONFIG_JFFS2_ZLIB=y | ||
| 3194 | CONFIG_JFFS2_LZO=y | ||
| 3195 | CONFIG_JFFS2_RTIME=y | ||
| 3196 | CONFIG_JFFS2_RUBIN=y | ||
| 3197 | # CONFIG_JFFS2_CMODE_NONE is not set | ||
| 3198 | # CONFIG_JFFS2_CMODE_PRIORITY is not set | ||
| 3199 | # CONFIG_JFFS2_CMODE_SIZE is not set | ||
| 3200 | CONFIG_JFFS2_CMODE_FAVOURLZO=y | ||
| 3201 | CONFIG_UBIFS_FS=y | ||
| 3202 | CONFIG_UBIFS_FS_XATTR=y | ||
| 3203 | CONFIG_UBIFS_FS_ADVANCED_COMPR=y | ||
| 3204 | CONFIG_UBIFS_FS_LZO=y | ||
| 3205 | CONFIG_UBIFS_FS_ZLIB=y | ||
| 3206 | # CONFIG_UBIFS_FS_DEBUG is not set | ||
| 3207 | CONFIG_LOGFS=m | ||
| 3208 | CONFIG_CRAMFS=m | ||
| 3209 | CONFIG_SQUASHFS=y | ||
| 3210 | # CONFIG_SQUASHFS_XATTR is not set | ||
| 3211 | CONFIG_SQUASHFS_LZO=y | ||
| 3212 | CONFIG_SQUASHFS_XZ=y | ||
| 3213 | # CONFIG_SQUASHFS_EMBEDDED is not set | ||
| 3214 | CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 | ||
| 3215 | CONFIG_VXFS_FS=m | ||
| 3216 | CONFIG_MINIX_FS=m | ||
| 3217 | CONFIG_OMFS_FS=m | ||
| 3218 | CONFIG_HPFS_FS=m | ||
| 3219 | CONFIG_QNX4FS_FS=m | ||
| 3220 | CONFIG_ROMFS_FS=m | ||
| 3221 | CONFIG_ROMFS_BACKED_BY_BLOCK=y | ||
| 3222 | # CONFIG_ROMFS_BACKED_BY_MTD is not set | ||
| 3223 | # CONFIG_ROMFS_BACKED_BY_BOTH is not set | ||
| 3224 | CONFIG_ROMFS_ON_BLOCK=y | ||
| 3225 | CONFIG_PSTORE=y | ||
| 3226 | CONFIG_SYSV_FS=m | ||
| 3227 | CONFIG_UFS_FS=m | ||
| 3228 | # CONFIG_UFS_FS_WRITE is not set | ||
| 3229 | # CONFIG_UFS_DEBUG is not set | ||
| 3230 | CONFIG_NETWORK_FILESYSTEMS=y | ||
| 3231 | CONFIG_NFS_FS=y | ||
| 3232 | CONFIG_NFS_V3=y | ||
| 3233 | CONFIG_NFS_V3_ACL=y | ||
| 3234 | CONFIG_NFS_V4=y | ||
| 3235 | CONFIG_NFS_V4_1=y | ||
| 3236 | CONFIG_PNFS_FILE_LAYOUT=y | ||
| 3237 | CONFIG_ROOT_NFS=y | ||
| 3238 | # CONFIG_NFS_USE_LEGACY_DNS is not set | ||
| 3239 | CONFIG_NFS_USE_KERNEL_DNS=y | ||
| 3240 | # CONFIG_NFS_USE_NEW_IDMAPPER is not set | ||
| 3241 | CONFIG_NFSD=m | ||
| 3242 | CONFIG_NFSD_DEPRECATED=y | ||
| 3243 | CONFIG_NFSD_V2_ACL=y | ||
| 3244 | CONFIG_NFSD_V3=y | ||
| 3245 | CONFIG_NFSD_V3_ACL=y | ||
| 3246 | CONFIG_NFSD_V4=y | ||
| 3247 | CONFIG_LOCKD=y | ||
| 3248 | CONFIG_LOCKD_V4=y | ||
| 3249 | CONFIG_NFS_ACL_SUPPORT=y | ||
| 3250 | CONFIG_NFS_COMMON=y | ||
| 3251 | CONFIG_SUNRPC=y | ||
| 3252 | CONFIG_SUNRPC_GSS=y | ||
| 3253 | CONFIG_RPCSEC_GSS_KRB5=m | ||
| 3254 | CONFIG_CEPH_FS=m | ||
| 3255 | CONFIG_CIFS=m | ||
| 3256 | CONFIG_CIFS_STATS=y | ||
| 3257 | CONFIG_CIFS_STATS2=y | ||
| 3258 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
| 3259 | # CONFIG_CIFS_UPCALL is not set | ||
| 3260 | CONFIG_CIFS_XATTR=y | ||
| 3261 | CONFIG_CIFS_POSIX=y | ||
| 3262 | # CONFIG_CIFS_DEBUG2 is not set | ||
| 3263 | CONFIG_CIFS_DFS_UPCALL=y | ||
| 3264 | CONFIG_CIFS_FSCACHE=y | ||
| 3265 | CONFIG_CIFS_ACL=y | ||
| 3266 | CONFIG_NCP_FS=m | ||
| 3267 | # CONFIG_NCPFS_PACKET_SIGNING is not set | ||
| 3268 | # CONFIG_NCPFS_IOCTL_LOCKING is not set | ||
| 3269 | # CONFIG_NCPFS_STRONG is not set | ||
| 3270 | # CONFIG_NCPFS_NFS_NS is not set | ||
| 3271 | # CONFIG_NCPFS_OS2_NS is not set | ||
| 3272 | # CONFIG_NCPFS_SMALLDOS is not set | ||
| 3273 | # CONFIG_NCPFS_NLS is not set | ||
| 3274 | # CONFIG_NCPFS_EXTRAS is not set | ||
| 3275 | CONFIG_CODA_FS=m | ||
| 3276 | CONFIG_AFS_FS=m | ||
| 3277 | # CONFIG_AFS_DEBUG is not set | ||
| 3278 | # CONFIG_AFS_FSCACHE is not set | ||
| 3279 | CONFIG_9P_FS=m | ||
| 3280 | CONFIG_9P_FSCACHE=y | ||
| 3281 | CONFIG_9P_FS_POSIX_ACL=y | ||
| 3282 | |||
| 3283 | # | ||
| 3284 | # Partition Types | ||
| 3285 | # | ||
| 3286 | CONFIG_PARTITION_ADVANCED=y | ||
| 3287 | # CONFIG_ACORN_PARTITION is not set | ||
| 3288 | # CONFIG_OSF_PARTITION is not set | ||
| 3289 | # CONFIG_AMIGA_PARTITION is not set | ||
| 3290 | # CONFIG_ATARI_PARTITION is not set | ||
| 3291 | CONFIG_MAC_PARTITION=y | ||
| 3292 | CONFIG_MSDOS_PARTITION=y | ||
| 3293 | CONFIG_BSD_DISKLABEL=y | ||
| 3294 | CONFIG_MINIX_SUBPARTITION=y | ||
| 3295 | CONFIG_SOLARIS_X86_PARTITION=y | ||
| 3296 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
| 3297 | CONFIG_LDM_PARTITION=y | ||
| 3298 | CONFIG_LDM_DEBUG=y | ||
| 3299 | # CONFIG_SGI_PARTITION is not set | ||
| 3300 | # CONFIG_ULTRIX_PARTITION is not set | ||
| 3301 | # CONFIG_SUN_PARTITION is not set | ||
| 3302 | # CONFIG_KARMA_PARTITION is not set | ||
| 3303 | CONFIG_EFI_PARTITION=y | ||
| 3304 | # CONFIG_SYSV68_PARTITION is not set | ||
| 3305 | CONFIG_NLS=y | ||
| 3306 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
| 3307 | CONFIG_NLS_CODEPAGE_437=y | ||
| 3308 | CONFIG_NLS_CODEPAGE_737=m | ||
| 3309 | CONFIG_NLS_CODEPAGE_775=m | ||
| 3310 | CONFIG_NLS_CODEPAGE_850=m | ||
| 3311 | CONFIG_NLS_CODEPAGE_852=m | ||
| 3312 | CONFIG_NLS_CODEPAGE_855=m | ||
| 3313 | CONFIG_NLS_CODEPAGE_857=m | ||
| 3314 | CONFIG_NLS_CODEPAGE_860=m | ||
| 3315 | CONFIG_NLS_CODEPAGE_861=m | ||
| 3316 | CONFIG_NLS_CODEPAGE_862=m | ||
| 3317 | CONFIG_NLS_CODEPAGE_863=m | ||
| 3318 | CONFIG_NLS_CODEPAGE_864=m | ||
| 3319 | CONFIG_NLS_CODEPAGE_865=m | ||
| 3320 | CONFIG_NLS_CODEPAGE_866=m | ||
| 3321 | CONFIG_NLS_CODEPAGE_869=m | ||
| 3322 | CONFIG_NLS_CODEPAGE_936=m | ||
| 3323 | CONFIG_NLS_CODEPAGE_950=m | ||
| 3324 | CONFIG_NLS_CODEPAGE_932=m | ||
| 3325 | CONFIG_NLS_CODEPAGE_949=m | ||
| 3326 | CONFIG_NLS_CODEPAGE_874=m | ||
| 3327 | CONFIG_NLS_ISO8859_8=m | ||
| 3328 | CONFIG_NLS_CODEPAGE_1250=m | ||
| 3329 | CONFIG_NLS_CODEPAGE_1251=m | ||
| 3330 | CONFIG_NLS_ASCII=m | ||
| 3331 | CONFIG_NLS_ISO8859_1=y | ||
| 3332 | CONFIG_NLS_ISO8859_2=m | ||
| 3333 | CONFIG_NLS_ISO8859_3=m | ||
| 3334 | CONFIG_NLS_ISO8859_4=m | ||
| 3335 | CONFIG_NLS_ISO8859_5=m | ||
| 3336 | CONFIG_NLS_ISO8859_6=m | ||
| 3337 | CONFIG_NLS_ISO8859_7=m | ||
| 3338 | CONFIG_NLS_ISO8859_9=m | ||
| 3339 | CONFIG_NLS_ISO8859_13=m | ||
| 3340 | CONFIG_NLS_ISO8859_14=m | ||
| 3341 | CONFIG_NLS_ISO8859_15=m | ||
| 3342 | CONFIG_NLS_KOI8_R=m | ||
| 3343 | CONFIG_NLS_KOI8_U=m | ||
| 3344 | CONFIG_NLS_UTF8=y | ||
| 3345 | CONFIG_DLM=m | ||
| 3346 | # CONFIG_DLM_DEBUG is not set | ||
| 3347 | |||
| 3348 | # | ||
| 3349 | # Kernel hacking | ||
| 3350 | # | ||
| 3351 | CONFIG_PRINTK_TIME=y | ||
| 3352 | CONFIG_DEFAULT_MESSAGE_LOGLEVEL=4 | ||
| 3353 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
| 3354 | CONFIG_ENABLE_MUST_CHECK=y | ||
| 3355 | CONFIG_FRAME_WARN=1024 | ||
| 3356 | CONFIG_MAGIC_SYSRQ=y | ||
| 3357 | # CONFIG_STRIP_ASM_SYMS is not set | ||
| 3358 | # CONFIG_UNUSED_SYMBOLS is not set | ||
| 3359 | CONFIG_DEBUG_FS=y | ||
| 3360 | # CONFIG_HEADERS_CHECK is not set | ||
| 3361 | # CONFIG_DEBUG_SECTION_MISMATCH is not set | ||
| 3362 | CONFIG_DEBUG_KERNEL=y | ||
| 3363 | # CONFIG_DEBUG_SHIRQ is not set | ||
| 3364 | # CONFIG_LOCKUP_DETECTOR is not set | ||
| 3365 | # CONFIG_HARDLOCKUP_DETECTOR is not set | ||
| 3366 | CONFIG_DETECT_HUNG_TASK=y | ||
| 3367 | CONFIG_DEFAULT_HUNG_TASK_TIMEOUT=120 | ||
| 3368 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
| 3369 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
| 3370 | CONFIG_SCHED_DEBUG=y | ||
| 3371 | CONFIG_SCHEDSTATS=y | ||
| 3372 | CONFIG_TIMER_STATS=y | ||
| 3373 | # CONFIG_DEBUG_OBJECTS is not set | ||
| 3374 | # CONFIG_DEBUG_SLAB is not set | ||
| 3375 | # CONFIG_DEBUG_KMEMLEAK is not set | ||
| 3376 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
| 3377 | # CONFIG_RT_MUTEX_TESTER is not set | ||
| 3378 | # CONFIG_DEBUG_SPINLOCK is not set | ||
| 3379 | CONFIG_DEBUG_MUTEXES=y | ||
| 3380 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
| 3381 | # CONFIG_PROVE_LOCKING is not set | ||
| 3382 | # CONFIG_SPARSE_RCU_POINTER is not set | ||
| 3383 | # CONFIG_LOCK_STAT is not set | ||
| 3384 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
| 3385 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
| 3386 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
| 3387 | # CONFIG_DEBUG_KOBJECT is not set | ||
| 3388 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
| 3389 | # CONFIG_DEBUG_INFO is not set | ||
| 3390 | # CONFIG_DEBUG_VM is not set | ||
| 3391 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
| 3392 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
| 3393 | # CONFIG_DEBUG_LIST is not set | ||
| 3394 | # CONFIG_TEST_LIST_SORT is not set | ||
| 3395 | # CONFIG_DEBUG_SG is not set | ||
| 3396 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
| 3397 | # CONFIG_DEBUG_CREDENTIALS is not set | ||
| 3398 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
| 3399 | # CONFIG_RCU_TORTURE_TEST is not set | ||
| 3400 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
| 3401 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
| 3402 | # CONFIG_DEBUG_FORCE_WEAK_PER_CPU is not set | ||
| 3403 | # CONFIG_LKDTM is not set | ||
| 3404 | # CONFIG_FAULT_INJECTION is not set | ||
| 3405 | # CONFIG_LATENCYTOP is not set | ||
| 3406 | # CONFIG_SYSCTL_SYSCALL_CHECK is not set | ||
| 3407 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
| 3408 | CONFIG_HAVE_FUNCTION_TRACER=y | ||
| 3409 | CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y | ||
| 3410 | CONFIG_HAVE_DYNAMIC_FTRACE=y | ||
| 3411 | CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y | ||
| 3412 | CONFIG_HAVE_C_RECORDMCOUNT=y | ||
| 3413 | CONFIG_RING_BUFFER=y | ||
| 3414 | CONFIG_RING_BUFFER_ALLOW_SWAP=y | ||
| 3415 | CONFIG_TRACING_SUPPORT=y | ||
| 3416 | CONFIG_FTRACE=y | ||
| 3417 | # CONFIG_FUNCTION_TRACER is not set | ||
| 3418 | # CONFIG_IRQSOFF_TRACER is not set | ||
| 3419 | # CONFIG_SCHED_TRACER is not set | ||
| 3420 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
| 3421 | CONFIG_BRANCH_PROFILE_NONE=y | ||
| 3422 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
| 3423 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
| 3424 | # CONFIG_STACK_TRACER is not set | ||
| 3425 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
| 3426 | # CONFIG_RING_BUFFER_BENCHMARK is not set | ||
| 3427 | # CONFIG_DYNAMIC_DEBUG is not set | ||
| 3428 | # CONFIG_DMA_API_DEBUG is not set | ||
| 3429 | # CONFIG_ATOMIC64_SELFTEST is not set | ||
| 3430 | # CONFIG_ASYNC_RAID6_TEST is not set | ||
| 3431 | # CONFIG_SAMPLES is not set | ||
| 3432 | CONFIG_HAVE_ARCH_KGDB=y | ||
| 3433 | # CONFIG_KGDB is not set | ||
| 3434 | # CONFIG_TEST_KSTRTOX is not set | ||
| 3435 | # CONFIG_STRICT_DEVMEM is not set | ||
| 3436 | CONFIG_ARM_UNWIND=y | ||
| 3437 | # CONFIG_DEBUG_USER is not set | ||
| 3438 | # CONFIG_DEBUG_LL is not set | ||
| 3439 | # CONFIG_OC_ETM is not set | ||
| 3440 | |||
| 3441 | # | ||
| 3442 | # Security options | ||
| 3443 | # | ||
| 3444 | CONFIG_KEYS=y | ||
| 3445 | # CONFIG_KEYS_DEBUG_PROC_KEYS is not set | ||
| 3446 | # CONFIG_SECURITY_DMESG_RESTRICT is not set | ||
| 3447 | # CONFIG_SECURITY is not set | ||
| 3448 | # CONFIG_SECURITYFS is not set | ||
| 3449 | CONFIG_DEFAULT_SECURITY_DAC=y | ||
| 3450 | CONFIG_DEFAULT_SECURITY="" | ||
| 3451 | CONFIG_XOR_BLOCKS=m | ||
| 3452 | CONFIG_ASYNC_CORE=m | ||
| 3453 | CONFIG_ASYNC_MEMCPY=m | ||
| 3454 | CONFIG_ASYNC_XOR=m | ||
| 3455 | CONFIG_ASYNC_PQ=m | ||
| 3456 | CONFIG_ASYNC_RAID6_RECOV=m | ||
| 3457 | CONFIG_CRYPTO=y | ||
| 3458 | |||
| 3459 | # | ||
| 3460 | # Crypto core or helper | ||
| 3461 | # | ||
| 3462 | CONFIG_CRYPTO_ALGAPI=y | ||
| 3463 | CONFIG_CRYPTO_ALGAPI2=y | ||
| 3464 | CONFIG_CRYPTO_AEAD=m | ||
| 3465 | CONFIG_CRYPTO_AEAD2=y | ||
| 3466 | CONFIG_CRYPTO_BLKCIPHER=y | ||
| 3467 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
| 3468 | CONFIG_CRYPTO_HASH=y | ||
| 3469 | CONFIG_CRYPTO_HASH2=y | ||
| 3470 | CONFIG_CRYPTO_RNG=m | ||
| 3471 | CONFIG_CRYPTO_RNG2=y | ||
| 3472 | CONFIG_CRYPTO_PCOMP2=y | ||
| 3473 | CONFIG_CRYPTO_MANAGER=y | ||
| 3474 | CONFIG_CRYPTO_MANAGER2=y | ||
| 3475 | CONFIG_CRYPTO_MANAGER_DISABLE_TESTS=y | ||
| 3476 | CONFIG_CRYPTO_GF128MUL=m | ||
| 3477 | CONFIG_CRYPTO_NULL=m | ||
| 3478 | CONFIG_CRYPTO_WORKQUEUE=y | ||
| 3479 | CONFIG_CRYPTO_CRYPTD=m | ||
| 3480 | CONFIG_CRYPTO_AUTHENC=m | ||
| 3481 | CONFIG_CRYPTO_TEST=m | ||
| 3482 | |||
| 3483 | # | ||
| 3484 | # Authenticated Encryption with Associated Data | ||
| 3485 | # | ||
| 3486 | CONFIG_CRYPTO_CCM=m | ||
| 3487 | CONFIG_CRYPTO_GCM=m | ||
| 3488 | CONFIG_CRYPTO_SEQIV=m | ||
| 3489 | |||
| 3490 | # | ||
| 3491 | # Block modes | ||
| 3492 | # | ||
| 3493 | CONFIG_CRYPTO_CBC=y | ||
| 3494 | CONFIG_CRYPTO_CTR=m | ||
| 3495 | CONFIG_CRYPTO_CTS=m | ||
| 3496 | CONFIG_CRYPTO_ECB=y | ||
| 3497 | CONFIG_CRYPTO_LRW=m | ||
| 3498 | CONFIG_CRYPTO_PCBC=m | ||
| 3499 | CONFIG_CRYPTO_XTS=m | ||
| 3500 | |||
| 3501 | # | ||
| 3502 | # Hash modes | ||
| 3503 | # | ||
| 3504 | CONFIG_CRYPTO_HMAC=m | ||
| 3505 | CONFIG_CRYPTO_XCBC=m | ||
| 3506 | # CONFIG_CRYPTO_VMAC is not set | ||
| 3507 | |||
| 3508 | # | ||
| 3509 | # Digest | ||
| 3510 | # | ||
| 3511 | CONFIG_CRYPTO_CRC32C=y | ||
| 3512 | CONFIG_CRYPTO_GHASH=m | ||
| 3513 | CONFIG_CRYPTO_MD4=m | ||
| 3514 | CONFIG_CRYPTO_MD5=y | ||
| 3515 | CONFIG_CRYPTO_MICHAEL_MIC=y | ||
| 3516 | CONFIG_CRYPTO_RMD128=m | ||
| 3517 | CONFIG_CRYPTO_RMD160=m | ||
| 3518 | CONFIG_CRYPTO_RMD256=m | ||
| 3519 | CONFIG_CRYPTO_RMD320=m | ||
| 3520 | CONFIG_CRYPTO_SHA1=m | ||
| 3521 | CONFIG_CRYPTO_SHA256=m | ||
| 3522 | CONFIG_CRYPTO_SHA512=m | ||
| 3523 | CONFIG_CRYPTO_TGR192=m | ||
| 3524 | CONFIG_CRYPTO_WP512=m | ||
| 3525 | |||
| 3526 | # | ||
| 3527 | # Ciphers | ||
| 3528 | # | ||
| 3529 | CONFIG_CRYPTO_AES=y | ||
| 3530 | CONFIG_CRYPTO_ANUBIS=m | ||
| 3531 | CONFIG_CRYPTO_ARC4=y | ||
| 3532 | CONFIG_CRYPTO_BLOWFISH=m | ||
| 3533 | CONFIG_CRYPTO_CAMELLIA=m | ||
| 3534 | CONFIG_CRYPTO_CAST5=m | ||
| 3535 | CONFIG_CRYPTO_CAST6=m | ||
| 3536 | CONFIG_CRYPTO_DES=y | ||
| 3537 | CONFIG_CRYPTO_FCRYPT=m | ||
| 3538 | CONFIG_CRYPTO_KHAZAD=m | ||
| 3539 | CONFIG_CRYPTO_SALSA20=m | ||
| 3540 | CONFIG_CRYPTO_SEED=m | ||
| 3541 | CONFIG_CRYPTO_SERPENT=m | ||
| 3542 | CONFIG_CRYPTO_TEA=m | ||
| 3543 | CONFIG_CRYPTO_TWOFISH=m | ||
| 3544 | CONFIG_CRYPTO_TWOFISH_COMMON=m | ||
| 3545 | |||
| 3546 | # | ||
| 3547 | # Compression | ||
| 3548 | # | ||
| 3549 | CONFIG_CRYPTO_DEFLATE=y | ||
| 3550 | # CONFIG_CRYPTO_ZLIB is not set | ||
| 3551 | CONFIG_CRYPTO_LZO=y | ||
| 3552 | |||
| 3553 | # | ||
| 3554 | # Random Number Generation | ||
| 3555 | # | ||
| 3556 | CONFIG_CRYPTO_ANSI_CPRNG=m | ||
| 3557 | CONFIG_CRYPTO_USER_API=m | ||
| 3558 | CONFIG_CRYPTO_USER_API_HASH=m | ||
| 3559 | CONFIG_CRYPTO_USER_API_SKCIPHER=m | ||
| 3560 | CONFIG_CRYPTO_HW=y | ||
| 3561 | CONFIG_CRYPTO_DEV_OMAP_SHAM=m | ||
| 3562 | CONFIG_CRYPTO_DEV_OMAP_AES=m | ||
| 3563 | # CONFIG_BINARY_PRINTF is not set | ||
| 3564 | |||
| 3565 | # | ||
| 3566 | # Library routines | ||
| 3567 | # | ||
| 3568 | CONFIG_RAID6_PQ=m | ||
| 3569 | CONFIG_BITREVERSE=y | ||
| 3570 | CONFIG_CRC_CCITT=y | ||
| 3571 | CONFIG_CRC16=y | ||
| 3572 | CONFIG_CRC_T10DIF=y | ||
| 3573 | CONFIG_CRC_ITU_T=y | ||
| 3574 | CONFIG_CRC32=y | ||
| 3575 | CONFIG_CRC7=y | ||
| 3576 | CONFIG_LIBCRC32C=y | ||
| 3577 | CONFIG_ZLIB_INFLATE=y | ||
| 3578 | CONFIG_ZLIB_DEFLATE=y | ||
| 3579 | CONFIG_LZO_COMPRESS=y | ||
| 3580 | CONFIG_LZO_DECOMPRESS=y | ||
| 3581 | CONFIG_XZ_DEC=y | ||
| 3582 | CONFIG_XZ_DEC_X86=y | ||
| 3583 | CONFIG_XZ_DEC_POWERPC=y | ||
| 3584 | CONFIG_XZ_DEC_IA64=y | ||
| 3585 | CONFIG_XZ_DEC_ARM=y | ||
| 3586 | CONFIG_XZ_DEC_ARMTHUMB=y | ||
| 3587 | CONFIG_XZ_DEC_SPARC=y | ||
| 3588 | CONFIG_XZ_DEC_BCJ=y | ||
| 3589 | CONFIG_XZ_DEC_TEST=m | ||
| 3590 | CONFIG_DECOMPRESS_GZIP=y | ||
| 3591 | CONFIG_DECOMPRESS_BZIP2=y | ||
| 3592 | CONFIG_DECOMPRESS_LZMA=y | ||
| 3593 | CONFIG_DECOMPRESS_XZ=y | ||
| 3594 | CONFIG_DECOMPRESS_LZO=y | ||
| 3595 | CONFIG_TEXTSEARCH=y | ||
| 3596 | CONFIG_TEXTSEARCH_KMP=m | ||
| 3597 | CONFIG_TEXTSEARCH_BM=m | ||
| 3598 | CONFIG_TEXTSEARCH_FSM=m | ||
| 3599 | CONFIG_BTREE=y | ||
| 3600 | CONFIG_HAS_IOMEM=y | ||
| 3601 | CONFIG_HAS_IOPORT=y | ||
| 3602 | CONFIG_HAS_DMA=y | ||
| 3603 | CONFIG_NLATTR=y | ||
| 3604 | CONFIG_AVERAGE=y | ||
diff --git a/recipes-kernel/linux/linux-3.0/bias/0001-OMAP3630-PRM-add-ABB-PRM-register-definitions.patch b/recipes-kernel/linux/linux-3.0/bias/0001-OMAP3630-PRM-add-ABB-PRM-register-definitions.patch deleted file mode 100644 index 8dd595a8..00000000 --- a/recipes-kernel/linux/linux-3.0/bias/0001-OMAP3630-PRM-add-ABB-PRM-register-definitions.patch +++ /dev/null | |||
| @@ -1,93 +0,0 @@ | |||
| 1 | From 2deaccf427c0fa1e87ed764877c03c2b1ba9b913 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Mike Turquette <mturquette@ti.com> | ||
| 3 | Date: Wed, 29 Jun 2011 17:25:53 -0700 | ||
| 4 | Subject: [PATCH 1/8] OMAP3630: PRM: add ABB PRM register definitions | ||
| 5 | |||
| 6 | OMAP3630 supports an Adaptive Body-Bias ldo as well as some MPU interrupts | ||
| 7 | related to voltage control that are not present on OMAP34XX. This patch | ||
| 8 | adds the offsets, register addresses, bitfield shifts and masks to support | ||
| 9 | this feature. | ||
| 10 | |||
| 11 | Signed-off-by: Mike Turquette <mturquette@ti.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/prm-regbits-34xx.h | 34 ++++++++++++++++++++++++++++++++ | ||
| 14 | arch/arm/mach-omap2/prm2xxx_3xxx.h | 4 +++ | ||
| 15 | 2 files changed, 38 insertions(+), 0 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/arch/arm/mach-omap2/prm-regbits-34xx.h b/arch/arm/mach-omap2/prm-regbits-34xx.h | ||
| 18 | index 64c087a..0309ff6 100644 | ||
| 19 | --- a/arch/arm/mach-omap2/prm-regbits-34xx.h | ||
| 20 | +++ b/arch/arm/mach-omap2/prm-regbits-34xx.h | ||
| 21 | @@ -216,6 +216,12 @@ | ||
| 22 | /* PRM_SYSCONFIG specific bits */ | ||
| 23 | |||
| 24 | /* PRM_IRQSTATUS_MPU specific bits */ | ||
| 25 | +#define OMAP3630_VC_BYPASS_ACK_ST_SHIFT 28 | ||
| 26 | +#define OMAP3630_VC_BYPASS_ACK_ST_MASK (1 << 28) | ||
| 27 | +#define OMAP3630_VC_VP1_ACK_ST_SHIFT 27 | ||
| 28 | +#define OMAP3630_VC_VP1_ACK_ST_MASK (1 << 27) | ||
| 29 | +#define OMAP3630_ABB_LDO_TRANXDONE_ST_SHIFT 26 | ||
| 30 | +#define OMAP3630_ABB_LDO_TRANXDONE_ST_MASK (1 << 26) | ||
| 31 | #define OMAP3430ES2_SND_PERIPH_DPLL_ST_SHIFT 25 | ||
| 32 | #define OMAP3430ES2_SND_PERIPH_DPLL_ST_MASK (1 << 25) | ||
| 33 | #define OMAP3430_VC_TIMEOUTERR_ST_MASK (1 << 24) | ||
| 34 | @@ -248,6 +254,12 @@ | ||
| 35 | #define OMAP3430_FS_USB_WKUP_ST_MASK (1 << 1) | ||
| 36 | |||
| 37 | /* PRM_IRQENABLE_MPU specific bits */ | ||
| 38 | +#define OMAP3630_VC_BYPASS_ACK_EN_SHIFT 28 | ||
| 39 | +#define OMAP3630_VC_BYPASS_ACK_EN_MASK (1 << 28) | ||
| 40 | +#define OMAP3630_VC_VP1_ACK_EN_SHIFT 27 | ||
| 41 | +#define OMAP3630_VC_VP1_ACK_EN_MASK (1 << 27) | ||
| 42 | +#define OMAP3630_ABB_LDO_TRANXDONE_EN_SHIFT 26 | ||
| 43 | +#define OMAP3630_ABB_LDO_TRANXDONE_EN_MASK (1 << 26) | ||
| 44 | #define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_SHIFT 25 | ||
| 45 | #define OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_MASK (1 << 25) | ||
| 46 | #define OMAP3430_VC_TIMEOUTERR_EN_MASK (1 << 24) | ||
| 47 | @@ -587,6 +599,28 @@ | ||
| 48 | |||
| 49 | /* PRM_VP2_STATUS specific bits */ | ||
| 50 | |||
| 51 | +/* PRM_LDO_ABB_SETUP specific bits */ | ||
| 52 | +#define OMAP3630_SR2_IN_TRANSITION_SHIFT 6 | ||
| 53 | +#define OMAP3630_SR2_IN_TRANSITION_MASK (1 << 6) | ||
| 54 | +#define OMAP3630_SR2_STATUS_SHIFT 3 | ||
| 55 | +#define OMAP3630_SR2_STATUS_MASK (3 << 3) | ||
| 56 | +#define OMAP3630_OPP_CHANGE_SHIFT 2 | ||
| 57 | +#define OMAP3630_OPP_CHANGE_MASK (1 << 2) | ||
| 58 | +#define OMAP3630_OPP_SEL_SHIFT 0 | ||
| 59 | +#define OMAP3630_OPP_SEL_MASK (3 << 0) | ||
| 60 | + | ||
| 61 | +/* PRM_LDO_ABB_CTRL specific bits */ | ||
| 62 | +#define OMAP3630_SR2_WTCNT_VALUE_SHIFT 8 | ||
| 63 | +#define OMAP3630_SR2_WTCNT_VALUE_MASK (0xff << 8) | ||
| 64 | +#define OMAP3630_SLEEP_RBB_SEL_SHIFT 3 | ||
| 65 | +#define OMAP3630_SLEEP_RBB_SEL_MASK (1 << 3) | ||
| 66 | +#define OMAP3630_ACTIVE_FBB_SEL_SHIFT 2 | ||
| 67 | +#define OMAP3630_ACTIVE_FBB_SEL_MASK (1 << 2) | ||
| 68 | +#define OMAP3630_ACTIVE_RBB_SEL_SHIFT 1 | ||
| 69 | +#define OMAP3630_ACTIVE_RBB_SEL_MASK (1 << 1) | ||
| 70 | +#define OMAP3630_SR2EN_SHIFT 0 | ||
| 71 | +#define OMAP3630_SR2EN_MASK (1 << 0) | ||
| 72 | + | ||
| 73 | /* RM_RSTST_NEON specific bits */ | ||
| 74 | |||
| 75 | /* PM_WKDEP_NEON specific bits */ | ||
| 76 | diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 77 | index cef533d..408d1c7 100644 | ||
| 78 | --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 79 | +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 80 | @@ -167,6 +167,10 @@ | ||
| 81 | #define OMAP3430_PRM_VP2_VOLTAGE OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e0) | ||
| 82 | #define OMAP3_PRM_VP2_STATUS_OFFSET 0x00e4 | ||
| 83 | #define OMAP3430_PRM_VP2_STATUS OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00e4) | ||
| 84 | +#define OMAP3_PRM_LDO_ABB_SETUP_OFFSET 0x00f0 | ||
| 85 | +#define OMAP3630_PRM_LDO_ABB_SETUP OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00f0) | ||
| 86 | +#define OMAP3_PRM_LDO_ABB_CTRL_OFFSET 0x00f4 | ||
| 87 | +#define OMAP3630_PRM_LDO_ABB_CTRL OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x00f4) | ||
| 88 | |||
| 89 | #define OMAP3_PRM_CLKSEL_OFFSET 0x0040 | ||
| 90 | #define OMAP3430_PRM_CLKSEL OMAP34XX_PRM_REGADDR(OMAP3430_CCR_MOD, 0x0040) | ||
| 91 | -- | ||
| 92 | 1.6.6.1 | ||
| 93 | |||
diff --git a/recipes-kernel/linux/linux-3.0/bias/0002-OMAP3-PM-VP-generalize-PRM-interrupt-helpers.patch b/recipes-kernel/linux/linux-3.0/bias/0002-OMAP3-PM-VP-generalize-PRM-interrupt-helpers.patch deleted file mode 100644 index 8ac6433d..00000000 --- a/recipes-kernel/linux/linux-3.0/bias/0002-OMAP3-PM-VP-generalize-PRM-interrupt-helpers.patch +++ /dev/null | |||
| @@ -1,263 +0,0 @@ | |||
| 1 | From 11401a7b96f5cd53362cd54238a58a5a54a00246 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Wed, 29 Jun 2011 17:25:54 -0700 | ||
| 4 | Subject: [PATCH 2/8] OMAP3+: PM: VP: generalize PRM interrupt helpers | ||
| 5 | |||
| 6 | We have multiple interrupt status hidden in the PRM interrupt status | ||
| 7 | reg. Make this handling generic to allow us to pull out LDO status such | ||
| 8 | as those for ABB from it using the same data structure and indexing. We | ||
| 9 | hence rename accordingly. | ||
| 10 | |||
| 11 | We also fix a trivial warning as the variable does not need exporting: | ||
| 12 | arch/arm/mach-omap2/prm2xxx_3xxx.c:172:22: warning: symbol | ||
| 13 | 'omap3_prm_irqs' was not declared. Should it be static? | ||
| 14 | |||
| 15 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 16 | Signed-off-by: Mike Turquette <mturquette@ti.com> | ||
| 17 | --- | ||
| 18 | arch/arm/mach-omap2/prm2xxx_3xxx.c | 22 +++++++++++----------- | ||
| 19 | arch/arm/mach-omap2/prm2xxx_3xxx.h | 7 +++++-- | ||
| 20 | arch/arm/mach-omap2/prm44xx.c | 28 ++++++++++++++-------------- | ||
| 21 | arch/arm/mach-omap2/prm44xx.h | 7 +++++-- | ||
| 22 | arch/arm/mach-omap2/vp.h | 9 --------- | ||
| 23 | arch/arm/mach-omap2/vp3xxx_data.c | 4 ++-- | ||
| 24 | arch/arm/mach-omap2/vp44xx_data.c | 6 +++--- | ||
| 25 | 7 files changed, 40 insertions(+), 43 deletions(-) | ||
| 26 | |||
| 27 | diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c | ||
| 28 | index 3b83763..8a20242 100644 | ||
| 29 | --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c | ||
| 30 | +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c | ||
| 31 | @@ -162,39 +162,39 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) | ||
| 32 | /* PRM VP */ | ||
| 33 | |||
| 34 | /* | ||
| 35 | - * struct omap3_vp - OMAP3 VP register access description. | ||
| 36 | + * struct omap3_prm_irq - OMAP3 PRM IRQ register access description. | ||
| 37 | * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg | ||
| 38 | */ | ||
| 39 | -struct omap3_vp { | ||
| 40 | +struct omap3_prm_irq { | ||
| 41 | u32 tranxdone_status; | ||
| 42 | }; | ||
| 43 | |||
| 44 | -struct omap3_vp omap3_vp[] = { | ||
| 45 | - [OMAP3_VP_VDD_MPU_ID] = { | ||
| 46 | +static struct omap3_prm_irq omap3_prm_irqs[] = { | ||
| 47 | + [OMAP3_PRM_IRQ_VDD_MPU_ID] = { | ||
| 48 | .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, | ||
| 49 | }, | ||
| 50 | - [OMAP3_VP_VDD_CORE_ID] = { | ||
| 51 | + [OMAP3_PRM_IRQ_VDD_CORE_ID] = { | ||
| 52 | .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, | ||
| 53 | }, | ||
| 54 | }; | ||
| 55 | |||
| 56 | #define MAX_VP_ID ARRAY_SIZE(omap3_vp); | ||
| 57 | |||
| 58 | -u32 omap3_prm_vp_check_txdone(u8 vp_id) | ||
| 59 | +u32 omap3_prm_vp_check_txdone(u8 irq_id) | ||
| 60 | { | ||
| 61 | - struct omap3_vp *vp = &omap3_vp[vp_id]; | ||
| 62 | + struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; | ||
| 63 | u32 irqstatus; | ||
| 64 | |||
| 65 | irqstatus = omap2_prm_read_mod_reg(OCP_MOD, | ||
| 66 | OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
| 67 | - return irqstatus & vp->tranxdone_status; | ||
| 68 | + return irqstatus & irq->tranxdone_status; | ||
| 69 | } | ||
| 70 | |||
| 71 | -void omap3_prm_vp_clear_txdone(u8 vp_id) | ||
| 72 | +void omap3_prm_vp_clear_txdone(u8 irq_id) | ||
| 73 | { | ||
| 74 | - struct omap3_vp *vp = &omap3_vp[vp_id]; | ||
| 75 | + struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; | ||
| 76 | |||
| 77 | - omap2_prm_write_mod_reg(vp->tranxdone_status, | ||
| 78 | + omap2_prm_write_mod_reg(irq->tranxdone_status, | ||
| 79 | OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
| 80 | } | ||
| 81 | |||
| 82 | diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 83 | index 408d1c7..d90b23f 100644 | ||
| 84 | --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 85 | +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 86 | @@ -307,9 +307,12 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); | ||
| 87 | extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); | ||
| 88 | extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); | ||
| 89 | |||
| 90 | +#define OMAP3_PRM_IRQ_VDD_MPU_ID 0 | ||
| 91 | +#define OMAP3_PRM_IRQ_VDD_CORE_ID 1 | ||
| 92 | /* OMAP3-specific VP functions */ | ||
| 93 | -u32 omap3_prm_vp_check_txdone(u8 vp_id); | ||
| 94 | -void omap3_prm_vp_clear_txdone(u8 vp_id); | ||
| 95 | +u32 omap3_prm_vp_check_txdone(u8 irq_id); | ||
| 96 | +void omap3_prm_vp_clear_txdone(u8 irq_id); | ||
| 97 | + | ||
| 98 | |||
| 99 | /* | ||
| 100 | * OMAP3 access functions for voltage controller (VC) and | ||
| 101 | diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c | ||
| 102 | index 495a31a..b77d331 100644 | ||
| 103 | --- a/arch/arm/mach-omap2/prm44xx.c | ||
| 104 | +++ b/arch/arm/mach-omap2/prm44xx.c | ||
| 105 | @@ -57,49 +57,49 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) | ||
| 106 | /* PRM VP */ | ||
| 107 | |||
| 108 | /* | ||
| 109 | - * struct omap4_vp - OMAP4 VP register access description. | ||
| 110 | + * struct omap4_prm_irq - OMAP4 VP register access description. | ||
| 111 | * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP | ||
| 112 | * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg | ||
| 113 | */ | ||
| 114 | -struct omap4_vp { | ||
| 115 | +struct omap4_prm_irq { | ||
| 116 | u32 irqstatus_mpu; | ||
| 117 | u32 tranxdone_status; | ||
| 118 | }; | ||
| 119 | |||
| 120 | -static struct omap4_vp omap4_vp[] = { | ||
| 121 | - [OMAP4_VP_VDD_MPU_ID] = { | ||
| 122 | +static struct omap4_prm_irq omap4_prm_irqs[] = { | ||
| 123 | + [OMAP4_PRM_IRQ_VDD_MPU_ID] = { | ||
| 124 | .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, | ||
| 125 | .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, | ||
| 126 | }, | ||
| 127 | - [OMAP4_VP_VDD_IVA_ID] = { | ||
| 128 | + [OMAP4_PRM_IRQ_VDD_IVA_ID] = { | ||
| 129 | .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 130 | .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, | ||
| 131 | }, | ||
| 132 | - [OMAP4_VP_VDD_CORE_ID] = { | ||
| 133 | + [OMAP4_PRM_IRQ_VDD_CORE_ID] = { | ||
| 134 | .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 135 | .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, | ||
| 136 | }, | ||
| 137 | }; | ||
| 138 | |||
| 139 | -u32 omap4_prm_vp_check_txdone(u8 vp_id) | ||
| 140 | +u32 omap4_prm_vp_check_txdone(u8 irq_id) | ||
| 141 | { | ||
| 142 | - struct omap4_vp *vp = &omap4_vp[vp_id]; | ||
| 143 | + struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; | ||
| 144 | u32 irqstatus; | ||
| 145 | |||
| 146 | irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, | ||
| 147 | OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 148 | - vp->irqstatus_mpu); | ||
| 149 | - return irqstatus & vp->tranxdone_status; | ||
| 150 | + irq->irqstatus_mpu); | ||
| 151 | + return irqstatus & irq->tranxdone_status; | ||
| 152 | } | ||
| 153 | |||
| 154 | -void omap4_prm_vp_clear_txdone(u8 vp_id) | ||
| 155 | +void omap4_prm_vp_clear_txdone(u8 irq_id) | ||
| 156 | { | ||
| 157 | - struct omap4_vp *vp = &omap4_vp[vp_id]; | ||
| 158 | + struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; | ||
| 159 | |||
| 160 | - omap4_prminst_write_inst_reg(vp->tranxdone_status, | ||
| 161 | + omap4_prminst_write_inst_reg(irq->tranxdone_status, | ||
| 162 | OMAP4430_PRM_PARTITION, | ||
| 163 | OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 164 | - vp->irqstatus_mpu); | ||
| 165 | + irq->irqstatus_mpu); | ||
| 166 | }; | ||
| 167 | |||
| 168 | u32 omap4_prm_vcvp_read(u8 offset) | ||
| 169 | diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h | ||
| 170 | index 3d66ccd..858ee53 100644 | ||
| 171 | --- a/arch/arm/mach-omap2/prm44xx.h | ||
| 172 | +++ b/arch/arm/mach-omap2/prm44xx.h | ||
| 173 | @@ -751,9 +751,12 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx); | ||
| 174 | extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); | ||
| 175 | extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); | ||
| 176 | |||
| 177 | +#define OMAP4_PRM_IRQ_VDD_CORE_ID 0 | ||
| 178 | +#define OMAP4_PRM_IRQ_VDD_IVA_ID 1 | ||
| 179 | +#define OMAP4_PRM_IRQ_VDD_MPU_ID 2 | ||
| 180 | /* OMAP4-specific VP functions */ | ||
| 181 | -u32 omap4_prm_vp_check_txdone(u8 vp_id); | ||
| 182 | -void omap4_prm_vp_clear_txdone(u8 vp_id); | ||
| 183 | +u32 omap4_prm_vp_check_txdone(u8 irq_id); | ||
| 184 | +void omap4_prm_vp_clear_txdone(u8 irq_id); | ||
| 185 | |||
| 186 | /* | ||
| 187 | * OMAP4 access functions for voltage controller (VC) and | ||
| 188 | diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h | ||
| 189 | index d9bc4f1..ee31e2f 100644 | ||
| 190 | --- a/arch/arm/mach-omap2/vp.h | ||
| 191 | +++ b/arch/arm/mach-omap2/vp.h | ||
| 192 | @@ -21,15 +21,6 @@ | ||
| 193 | |||
| 194 | struct voltagedomain; | ||
| 195 | |||
| 196 | -/* | ||
| 197 | - * Voltage Processor (VP) identifiers | ||
| 198 | - */ | ||
| 199 | -#define OMAP3_VP_VDD_MPU_ID 0 | ||
| 200 | -#define OMAP3_VP_VDD_CORE_ID 1 | ||
| 201 | -#define OMAP4_VP_VDD_CORE_ID 0 | ||
| 202 | -#define OMAP4_VP_VDD_IVA_ID 1 | ||
| 203 | -#define OMAP4_VP_VDD_MPU_ID 2 | ||
| 204 | - | ||
| 205 | /* XXX document */ | ||
| 206 | #define VP_IDLE_TIMEOUT 200 | ||
| 207 | #define VP_TRANXDONE_TIMEOUT 300 | ||
| 208 | diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 209 | index 260c554..7bd8181 100644 | ||
| 210 | --- a/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 211 | +++ b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 212 | @@ -57,7 +57,7 @@ static const struct omap_vp_common omap3_vp_common = { | ||
| 213 | }; | ||
| 214 | |||
| 215 | struct omap_vp_instance omap3_vp_mpu = { | ||
| 216 | - .id = OMAP3_VP_VDD_MPU_ID, | ||
| 217 | + .id = OMAP3_PRM_IRQ_VDD_MPU_ID, | ||
| 218 | .common = &omap3_vp_common, | ||
| 219 | .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, | ||
| 220 | .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, | ||
| 221 | @@ -68,7 +68,7 @@ struct omap_vp_instance omap3_vp_mpu = { | ||
| 222 | }; | ||
| 223 | |||
| 224 | struct omap_vp_instance omap3_vp_core = { | ||
| 225 | - .id = OMAP3_VP_VDD_CORE_ID, | ||
| 226 | + .id = OMAP3_PRM_IRQ_VDD_CORE_ID, | ||
| 227 | .common = &omap3_vp_common, | ||
| 228 | .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, | ||
| 229 | .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, | ||
| 230 | diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 231 | index b4e7704..6de8ed6 100644 | ||
| 232 | --- a/arch/arm/mach-omap2/vp44xx_data.c | ||
| 233 | +++ b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 234 | @@ -56,7 +56,7 @@ static const struct omap_vp_common omap4_vp_common = { | ||
| 235 | }; | ||
| 236 | |||
| 237 | struct omap_vp_instance omap4_vp_mpu = { | ||
| 238 | - .id = OMAP4_VP_VDD_MPU_ID, | ||
| 239 | + .id = OMAP4_PRM_IRQ_VDD_MPU_ID, | ||
| 240 | .common = &omap4_vp_common, | ||
| 241 | .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, | ||
| 242 | .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, | ||
| 243 | @@ -67,7 +67,7 @@ struct omap_vp_instance omap4_vp_mpu = { | ||
| 244 | }; | ||
| 245 | |||
| 246 | struct omap_vp_instance omap4_vp_iva = { | ||
| 247 | - .id = OMAP4_VP_VDD_IVA_ID, | ||
| 248 | + .id = OMAP4_PRM_IRQ_VDD_IVA_ID, | ||
| 249 | .common = &omap4_vp_common, | ||
| 250 | .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, | ||
| 251 | .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, | ||
| 252 | @@ -78,7 +78,7 @@ struct omap_vp_instance omap4_vp_iva = { | ||
| 253 | }; | ||
| 254 | |||
| 255 | struct omap_vp_instance omap4_vp_core = { | ||
| 256 | - .id = OMAP4_VP_VDD_CORE_ID, | ||
| 257 | + .id = OMAP4_PRM_IRQ_VDD_CORE_ID, | ||
| 258 | .common = &omap4_vp_common, | ||
| 259 | .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, | ||
| 260 | .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, | ||
| 261 | -- | ||
| 262 | 1.6.6.1 | ||
| 263 | |||
diff --git a/recipes-kernel/linux/linux-3.0/bias/0003-OMAP3-PRM-add-tranxdone-IRQ-handlers-for-ABB.patch b/recipes-kernel/linux/linux-3.0/bias/0003-OMAP3-PRM-add-tranxdone-IRQ-handlers-for-ABB.patch deleted file mode 100644 index 3213861d..00000000 --- a/recipes-kernel/linux/linux-3.0/bias/0003-OMAP3-PRM-add-tranxdone-IRQ-handlers-for-ABB.patch +++ /dev/null | |||
| @@ -1,202 +0,0 @@ | |||
| 1 | From da35165116eabf6149d558b426549784c93af164 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Wed, 29 Jun 2011 17:25:55 -0700 | ||
| 4 | Subject: [PATCH 3/8] OMAP3+: PRM: add tranxdone IRQ handlers for ABB | ||
| 5 | |||
| 6 | OMAP3 and more recent platforms support a PRM interrupt to the MPU for | ||
| 7 | Adapative Body-Bias ldo transitions. | ||
| 8 | |||
| 9 | Add helpers to the OMAP3 & OMAP4 PRM code to check the status of the | ||
| 10 | interrupt and also to clear it. These will be called from the ABB code | ||
| 11 | as part of the greater voltage scaling sequence. | ||
| 12 | |||
| 13 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 14 | Signed-off-by: Mike Turquette <mturquette@ti.com> | ||
| 15 | --- | ||
| 16 | arch/arm/mach-omap2/prm2xxx_3xxx.c | 35 ++++++++++++++++++++++++++----- | ||
| 17 | arch/arm/mach-omap2/prm2xxx_3xxx.h | 3 ++ | ||
| 18 | arch/arm/mach-omap2/prm44xx.c | 40 +++++++++++++++++++++++++++++------ | ||
| 19 | arch/arm/mach-omap2/prm44xx.h | 3 ++ | ||
| 20 | 4 files changed, 68 insertions(+), 13 deletions(-) | ||
| 21 | |||
| 22 | diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c | ||
| 23 | index 8a20242..49e9719 100644 | ||
| 24 | --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c | ||
| 25 | +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c | ||
| 26 | @@ -163,18 +163,23 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) | ||
| 27 | |||
| 28 | /* | ||
| 29 | * struct omap3_prm_irq - OMAP3 PRM IRQ register access description. | ||
| 30 | - * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg | ||
| 31 | + * @vp_tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg | ||
| 32 | + * @abb_tranxdone_status: ABB_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg | ||
| 33 | + * (ONLY for OMAP3630) | ||
| 34 | */ | ||
| 35 | struct omap3_prm_irq { | ||
| 36 | - u32 tranxdone_status; | ||
| 37 | + u32 vp_tranxdone_status; | ||
| 38 | + u32 abb_tranxdone_status; | ||
| 39 | }; | ||
| 40 | |||
| 41 | static struct omap3_prm_irq omap3_prm_irqs[] = { | ||
| 42 | [OMAP3_PRM_IRQ_VDD_MPU_ID] = { | ||
| 43 | - .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, | ||
| 44 | + .vp_tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, | ||
| 45 | + .abb_tranxdone_status = OMAP3630_ABB_LDO_TRANXDONE_ST_MASK, | ||
| 46 | }, | ||
| 47 | [OMAP3_PRM_IRQ_VDD_CORE_ID] = { | ||
| 48 | - .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, | ||
| 49 | + .vp_tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, | ||
| 50 | + /* no abb for core */ | ||
| 51 | }, | ||
| 52 | }; | ||
| 53 | |||
| 54 | @@ -187,14 +192,32 @@ u32 omap3_prm_vp_check_txdone(u8 irq_id) | ||
| 55 | |||
| 56 | irqstatus = omap2_prm_read_mod_reg(OCP_MOD, | ||
| 57 | OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
| 58 | - return irqstatus & irq->tranxdone_status; | ||
| 59 | + return irqstatus & irq->vp_tranxdone_status; | ||
| 60 | } | ||
| 61 | |||
| 62 | void omap3_prm_vp_clear_txdone(u8 irq_id) | ||
| 63 | { | ||
| 64 | struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; | ||
| 65 | |||
| 66 | - omap2_prm_write_mod_reg(irq->tranxdone_status, | ||
| 67 | + omap2_prm_write_mod_reg(irq->vp_tranxdone_status, | ||
| 68 | + OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
| 69 | +} | ||
| 70 | + | ||
| 71 | +u32 omap36xx_prm_abb_check_txdone(u8 irq_id) | ||
| 72 | +{ | ||
| 73 | + struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; | ||
| 74 | + u32 irqstatus; | ||
| 75 | + | ||
| 76 | + irqstatus = omap2_prm_read_mod_reg(OCP_MOD, | ||
| 77 | + OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
| 78 | + return irqstatus & irq->abb_tranxdone_status; | ||
| 79 | +} | ||
| 80 | + | ||
| 81 | +void omap36xx_prm_abb_clear_txdone(u8 irq_id) | ||
| 82 | +{ | ||
| 83 | + struct omap3_prm_irq *irq = &omap3_prm_irqs[irq_id]; | ||
| 84 | + | ||
| 85 | + omap2_prm_write_mod_reg(irq->abb_tranxdone_status, | ||
| 86 | OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
| 87 | } | ||
| 88 | |||
| 89 | diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 90 | index d90b23f..08d5f1e 100644 | ||
| 91 | --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 92 | +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 93 | @@ -313,6 +313,9 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); | ||
| 94 | u32 omap3_prm_vp_check_txdone(u8 irq_id); | ||
| 95 | void omap3_prm_vp_clear_txdone(u8 irq_id); | ||
| 96 | |||
| 97 | +/* OMAP36xx-specific ABB functions */ | ||
| 98 | +u32 omap36xx_prm_abb_check_txdone(u8 irq_id); | ||
| 99 | +void omap36xx_prm_abb_clear_txdone(u8 irq_id); | ||
| 100 | |||
| 101 | /* | ||
| 102 | * OMAP3 access functions for voltage controller (VC) and | ||
| 103 | diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c | ||
| 104 | index b77d331..dd3776c 100644 | ||
| 105 | --- a/arch/arm/mach-omap2/prm44xx.c | ||
| 106 | +++ b/arch/arm/mach-omap2/prm44xx.c | ||
| 107 | @@ -59,25 +59,30 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) | ||
| 108 | /* | ||
| 109 | * struct omap4_prm_irq - OMAP4 VP register access description. | ||
| 110 | * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP | ||
| 111 | - * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg | ||
| 112 | + * @vp_tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg | ||
| 113 | + * @abb_tranxdone_status: ABB_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg | ||
| 114 | */ | ||
| 115 | struct omap4_prm_irq { | ||
| 116 | u32 irqstatus_mpu; | ||
| 117 | - u32 tranxdone_status; | ||
| 118 | + u32 vp_tranxdone_status; | ||
| 119 | + u32 abb_tranxdone_status; | ||
| 120 | }; | ||
| 121 | |||
| 122 | static struct omap4_prm_irq omap4_prm_irqs[] = { | ||
| 123 | [OMAP4_PRM_IRQ_VDD_MPU_ID] = { | ||
| 124 | .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, | ||
| 125 | - .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, | ||
| 126 | + .vp_tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, | ||
| 127 | + .abb_tranxdone_status = OMAP4430_ABB_MPU_DONE_ST_MASK | ||
| 128 | }, | ||
| 129 | [OMAP4_PRM_IRQ_VDD_IVA_ID] = { | ||
| 130 | .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 131 | - .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, | ||
| 132 | + .vp_tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, | ||
| 133 | + .abb_tranxdone_status = OMAP4430_ABB_IVA_DONE_ST_MASK, | ||
| 134 | }, | ||
| 135 | [OMAP4_PRM_IRQ_VDD_CORE_ID] = { | ||
| 136 | .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 137 | - .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, | ||
| 138 | + .vp_tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, | ||
| 139 | + /* Core has no ABB */ | ||
| 140 | }, | ||
| 141 | }; | ||
| 142 | |||
| 143 | @@ -89,19 +94,40 @@ u32 omap4_prm_vp_check_txdone(u8 irq_id) | ||
| 144 | irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, | ||
| 145 | OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 146 | irq->irqstatus_mpu); | ||
| 147 | - return irqstatus & irq->tranxdone_status; | ||
| 148 | + return irqstatus & irq->vp_tranxdone_status; | ||
| 149 | } | ||
| 150 | |||
| 151 | void omap4_prm_vp_clear_txdone(u8 irq_id) | ||
| 152 | { | ||
| 153 | struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; | ||
| 154 | |||
| 155 | - omap4_prminst_write_inst_reg(irq->tranxdone_status, | ||
| 156 | + omap4_prminst_write_inst_reg(irq->vp_tranxdone_status, | ||
| 157 | OMAP4430_PRM_PARTITION, | ||
| 158 | OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 159 | irq->irqstatus_mpu); | ||
| 160 | }; | ||
| 161 | |||
| 162 | +u32 omap4_prm_abb_check_txdone(u8 irq_id) | ||
| 163 | +{ | ||
| 164 | + struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; | ||
| 165 | + u32 irqstatus; | ||
| 166 | + | ||
| 167 | + irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, | ||
| 168 | + OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 169 | + irq->irqstatus_mpu); | ||
| 170 | + return irqstatus & irq->abb_tranxdone_status; | ||
| 171 | +} | ||
| 172 | + | ||
| 173 | +void omap4_prm_abb_clear_txdone(u8 irq_id) | ||
| 174 | +{ | ||
| 175 | + struct omap4_prm_irq *irq = &omap4_prm_irqs[irq_id]; | ||
| 176 | + | ||
| 177 | + omap4_prminst_write_inst_reg(irq->abb_tranxdone_status, | ||
| 178 | + OMAP4430_PRM_PARTITION, | ||
| 179 | + OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 180 | + irq->irqstatus_mpu); | ||
| 181 | +} | ||
| 182 | + | ||
| 183 | u32 omap4_prm_vcvp_read(u8 offset) | ||
| 184 | { | ||
| 185 | return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, | ||
| 186 | diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h | ||
| 187 | index 858ee53..8ce3207 100644 | ||
| 188 | --- a/arch/arm/mach-omap2/prm44xx.h | ||
| 189 | +++ b/arch/arm/mach-omap2/prm44xx.h | ||
| 190 | @@ -757,6 +757,9 @@ extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); | ||
| 191 | /* OMAP4-specific VP functions */ | ||
| 192 | u32 omap4_prm_vp_check_txdone(u8 irq_id); | ||
| 193 | void omap4_prm_vp_clear_txdone(u8 irq_id); | ||
| 194 | +/* OMAP4-specific ABB functions */ | ||
| 195 | +u32 omap4_prm_abb_check_txdone(u8 irq_id); | ||
| 196 | +void omap4_prm_abb_clear_txdone(u8 irq_id); | ||
| 197 | |||
| 198 | /* | ||
| 199 | * OMAP4 access functions for voltage controller (VC) and | ||
| 200 | -- | ||
| 201 | 1.6.6.1 | ||
| 202 | |||
diff --git a/recipes-kernel/linux/linux-3.0/bias/0004-OMAP3-ABB-Adaptive-Body-Bias-structures-data.patch b/recipes-kernel/linux/linux-3.0/bias/0004-OMAP3-ABB-Adaptive-Body-Bias-structures-data.patch deleted file mode 100644 index 8d86ccfe..00000000 --- a/recipes-kernel/linux/linux-3.0/bias/0004-OMAP3-ABB-Adaptive-Body-Bias-structures-data.patch +++ /dev/null | |||
| @@ -1,240 +0,0 @@ | |||
| 1 | From a0a304bd0a2255bc661933ef23b3a0860fbee69d Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Mike Turquette <mturquette@ti.com> | ||
| 3 | Date: Wed, 29 Jun 2011 17:25:56 -0700 | ||
| 4 | Subject: [PATCH 4/8] OMAP3+: ABB: Adaptive Body-Bias structures & data | ||
| 5 | |||
| 6 | Due to voltage domain trimming and silicon characterstics some silicon | ||
| 7 | may experience instability when operating at a high voltage. To | ||
| 8 | compensate for this an Adaptive Body-Bias ldo exists. First featured in | ||
| 9 | OMAP3630, the purpose of this ldo is to provide a voltage boost to PMOS | ||
| 10 | backgates when a voltage domain is operating at a high OPP. In this | ||
| 11 | mode the ldo is said to be in Forward Body-Bias. At OPPs within a | ||
| 12 | nominal voltage range the ABB ldo is bypassed. | ||
| 13 | |||
| 14 | This patch introduces the data structures needed to represent the ABB | ||
| 15 | ldo's in the voltage layer, and populates the appropriate data for 3630 | ||
| 16 | and OMAP4. Not all voltage domains have an ABB ldo, and OMAP34xx does | ||
| 17 | not have it at all; in such cases the voltage data will be marked with | ||
| 18 | OMAP_ABB_NO_LDO. | ||
| 19 | |||
| 20 | Signed-off-by: Mike Turquette <mturquette@ti.com> | ||
| 21 | --- | ||
| 22 | arch/arm/mach-omap2/Makefile | 5 +- | ||
| 23 | arch/arm/mach-omap2/abb.h | 85 ++++++++++++++++++++++++++++++++++++ | ||
| 24 | arch/arm/mach-omap2/abb36xx_data.c | 38 ++++++++++++++++ | ||
| 25 | arch/arm/mach-omap2/abb44xx_data.c | 44 ++++++++++++++++++ | ||
| 26 | 4 files changed, 170 insertions(+), 2 deletions(-) | ||
| 27 | create mode 100644 arch/arm/mach-omap2/abb.h | ||
| 28 | create mode 100644 arch/arm/mach-omap2/abb36xx_data.c | ||
| 29 | create mode 100644 arch/arm/mach-omap2/abb44xx_data.c | ||
| 30 | |||
| 31 | diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile | ||
| 32 | index 7927dd6..5bc306c 100644 | ||
| 33 | --- a/arch/arm/mach-omap2/Makefile | ||
| 34 | +++ b/arch/arm/mach-omap2/Makefile | ||
| 35 | @@ -82,14 +82,15 @@ endif | ||
| 36 | # PRCM | ||
| 37 | obj-$(CONFIG_ARCH_OMAP2) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o | ||
| 38 | obj-$(CONFIG_ARCH_OMAP3) += prcm.o cm2xxx_3xxx.o prm2xxx_3xxx.o \ | ||
| 39 | - vc3xxx_data.o vp3xxx_data.o | ||
| 40 | + vc3xxx_data.o vp3xxx_data.o \ | ||
| 41 | + abb36xx_data.o | ||
| 42 | # XXX The presence of cm2xxx_3xxx.o on the line below is temporary and | ||
| 43 | # will be removed once the OMAP4 part of the codebase is converted to | ||
| 44 | # use OMAP4-specific PRCM functions. | ||
| 45 | obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ | ||
| 46 | cm44xx.o prcm_mpu44xx.o \ | ||
| 47 | prminst44xx.o vc44xx_data.o \ | ||
| 48 | - vp44xx_data.o | ||
| 49 | + vp44xx_data.o abb44xx_data.o | ||
| 50 | |||
| 51 | # OMAP voltage domains | ||
| 52 | ifeq ($(CONFIG_PM),y) | ||
| 53 | diff --git a/arch/arm/mach-omap2/abb.h b/arch/arm/mach-omap2/abb.h | ||
| 54 | new file mode 100644 | ||
| 55 | index 0000000..74f2044 | ||
| 56 | --- /dev/null | ||
| 57 | +++ b/arch/arm/mach-omap2/abb.h | ||
| 58 | @@ -0,0 +1,85 @@ | ||
| 59 | +/* | ||
| 60 | + * OMAP Adaptive Body-Bias structure and macro definitions | ||
| 61 | + * | ||
| 62 | + * Copyright (C) 2011 Texas Instruments, Inc. | ||
| 63 | + * Mike Turquette <mturquette@ti.com> | ||
| 64 | + * | ||
| 65 | + * This program is free software; you can redistribute it and/or modify | ||
| 66 | + * it under the terms of the GNU General Public License version 2 as | ||
| 67 | + * published by the Free Software Foundation. | ||
| 68 | + */ | ||
| 69 | + | ||
| 70 | +#ifndef __ARCH_ARM_MACH_OMAP2_ABB_H | ||
| 71 | +#define __ARCH_ARM_MACH_OMAP2_ABB_H | ||
| 72 | + | ||
| 73 | +#include <linux/kernel.h> | ||
| 74 | + | ||
| 75 | +#include "voltage.h" | ||
| 76 | + | ||
| 77 | +/* NOMINAL_OPP bypasses the ABB ldo, FAST_OPP sets it to Forward Body-Bias */ | ||
| 78 | +#define OMAP_ABB_NOMINAL_OPP 0 | ||
| 79 | +#define OMAP_ABB_FAST_OPP 1 | ||
| 80 | +#define OMAP_ABB_NO_LDO ~0 | ||
| 81 | + | ||
| 82 | +/* Time for the ABB ldo to settle after transition (in micro-seconds) */ | ||
| 83 | +#define ABB_TRANXDONE_TIMEOUT 50 | ||
| 84 | + | ||
| 85 | +/* | ||
| 86 | + * struct omap_abb_ops - per-OMAP operations needed for ABB transition | ||
| 87 | + * | ||
| 88 | + * @check_tranxdone: return status of ldo transition from PRM_IRQSTATUS | ||
| 89 | + * @clear_tranxdone: clear ABB transition status bit from PRM_IRQSTATUS | ||
| 90 | + */ | ||
| 91 | +struct omap_abb_ops { | ||
| 92 | + u32 (*check_tranxdone)(u8 irq_id); | ||
| 93 | + void (*clear_tranxdone)(u8 irq_id); | ||
| 94 | +}; | ||
| 95 | + | ||
| 96 | +/* | ||
| 97 | + * struct omap_abb_common - ABB data common to an OMAP family | ||
| 98 | + * | ||
| 99 | + * @opp_sel_mask: CTRL reg uses this to program next state of ldo | ||
| 100 | + * @opp_change_mask: CTRL reg uses this to initiate ldo state change | ||
| 101 | + * @sr2_wtcnt_value_mask: SETUP reg uses this to program ldo settling time | ||
| 102 | + * @sr2en_mask: SETUP reg uses this to enable/disable ldo | ||
| 103 | + * @active_fbb_sel_mask: SETUP reg uses this to enable/disable FBB operation | ||
| 104 | + * @settling_time: number of micro-seconds it takes for ldo to transition | ||
| 105 | + * @clock_cycles: settling_time is counted in multiples of clock cycles | ||
| 106 | + * @ops: pointer to common ops for manipulating PRM_IRQSTATUS bits | ||
| 107 | + */ | ||
| 108 | +struct omap_abb_common { | ||
| 109 | + u32 opp_sel_mask; | ||
| 110 | + u32 opp_change_mask; | ||
| 111 | + u32 sr2_wtcnt_value_mask; | ||
| 112 | + u32 sr2en_mask; | ||
| 113 | + u32 active_fbb_sel_mask; | ||
| 114 | + unsigned long settling_time; | ||
| 115 | + unsigned long clock_cycles; | ||
| 116 | + const struct omap_abb_ops *ops; | ||
| 117 | +}; | ||
| 118 | + | ||
| 119 | +/* | ||
| 120 | + * struct omap_abb_instance - data for each instance of ABB ldo | ||
| 121 | + * | ||
| 122 | + * @setup_offs: PRM register offset for initial configuration of ABB ldo | ||
| 123 | + * @ctrl_offs: PRM register offset for active programming of ABB ldo | ||
| 124 | + * @prm_irq_id: IRQ handle used to resolve IRQSTATUS offset & masks | ||
| 125 | + * @enabled: track whether ABB ldo is enabled or disabled | ||
| 126 | + * @common: pointer to common data for all ABB ldo's | ||
| 127 | + * @_opp_sel: internally track last programmed state of ABB ldo. DO NOT USE | ||
| 128 | + */ | ||
| 129 | +struct omap_abb_instance { | ||
| 130 | + u8 setup_offs; | ||
| 131 | + u8 ctrl_offs; | ||
| 132 | + u8 prm_irq_id; | ||
| 133 | + bool enabled; | ||
| 134 | + const struct omap_abb_common *common; | ||
| 135 | + u8 _opp_sel; | ||
| 136 | +}; | ||
| 137 | + | ||
| 138 | +extern struct omap_abb_instance omap36xx_abb_mpu; | ||
| 139 | + | ||
| 140 | +extern struct omap_abb_instance omap4_abb_mpu; | ||
| 141 | +extern struct omap_abb_instance omap4_abb_iva; | ||
| 142 | + | ||
| 143 | +#endif | ||
| 144 | diff --git a/arch/arm/mach-omap2/abb36xx_data.c b/arch/arm/mach-omap2/abb36xx_data.c | ||
| 145 | new file mode 100644 | ||
| 146 | index 0000000..0bcfd66 | ||
| 147 | --- /dev/null | ||
| 148 | +++ b/arch/arm/mach-omap2/abb36xx_data.c | ||
| 149 | @@ -0,0 +1,38 @@ | ||
| 150 | +/* | ||
| 151 | + * OMAP36xx Adaptive Body-Bias (ABB) data | ||
| 152 | + * | ||
| 153 | + * Copyright (C) 2011 Texas Instruments, Inc. | ||
| 154 | + * Mike Turquette <mturquette@ti.com> | ||
| 155 | + * | ||
| 156 | + * This program is free software; you can redistribute it and/or modify | ||
| 157 | + * it under the terms of the GNU General Public License version 2 as | ||
| 158 | + * published by the Free Software Foundation. | ||
| 159 | + */ | ||
| 160 | + | ||
| 161 | +#include "abb.h" | ||
| 162 | +#include "prm2xxx_3xxx.h" | ||
| 163 | +#include "prm-regbits-34xx.h" | ||
| 164 | + | ||
| 165 | +static const struct omap_abb_ops omap36xx_abb_ops = { | ||
| 166 | + .check_tranxdone = &omap36xx_prm_abb_check_txdone, | ||
| 167 | + .clear_tranxdone = &omap36xx_prm_abb_clear_txdone, | ||
| 168 | +}; | ||
| 169 | + | ||
| 170 | +static const struct omap_abb_common omap36xx_abb_common = { | ||
| 171 | + .opp_sel_mask = OMAP3630_OPP_SEL_MASK, | ||
| 172 | + .opp_change_mask = OMAP3630_OPP_CHANGE_MASK, | ||
| 173 | + .sr2en_mask = OMAP3630_SR2EN_MASK, | ||
| 174 | + .active_fbb_sel_mask = OMAP3630_ACTIVE_FBB_SEL_MASK, | ||
| 175 | + .sr2_wtcnt_value_mask = OMAP3630_SR2_WTCNT_VALUE_MASK, | ||
| 176 | + .settling_time = 30, | ||
| 177 | + .clock_cycles = 8, | ||
| 178 | + .ops = &omap36xx_abb_ops, | ||
| 179 | +}; | ||
| 180 | + | ||
| 181 | +/* SETUP & CTRL registers swapped names in OMAP4; thus 36xx looks strange */ | ||
| 182 | +struct omap_abb_instance omap36xx_abb_mpu = { | ||
| 183 | + .setup_offs = OMAP3_PRM_LDO_ABB_CTRL_OFFSET, | ||
| 184 | + .ctrl_offs = OMAP3_PRM_LDO_ABB_SETUP_OFFSET, | ||
| 185 | + .prm_irq_id = OMAP3_PRM_IRQ_VDD_MPU_ID, | ||
| 186 | + .common = &omap36xx_abb_common, | ||
| 187 | +}; | ||
| 188 | diff --git a/arch/arm/mach-omap2/abb44xx_data.c b/arch/arm/mach-omap2/abb44xx_data.c | ||
| 189 | new file mode 100644 | ||
| 190 | index 0000000..a7cf855 | ||
| 191 | --- /dev/null | ||
| 192 | +++ b/arch/arm/mach-omap2/abb44xx_data.c | ||
| 193 | @@ -0,0 +1,44 @@ | ||
| 194 | +/* | ||
| 195 | + * OMAP44xx Adaptive Body-Bias (ABB) data | ||
| 196 | + * | ||
| 197 | + * Copyright (C) 2011 Texas Instruments, Inc. | ||
| 198 | + * Mike Turquette <mturquette@ti.com> | ||
| 199 | + * | ||
| 200 | + * This program is free software; you can redistribute it and/or modify | ||
| 201 | + * it under the terms of the GNU General Public License version 2 as | ||
| 202 | + * published by the Free Software Foundation. | ||
| 203 | + */ | ||
| 204 | + | ||
| 205 | +#include "abb.h" | ||
| 206 | +#include "prm44xx.h" | ||
| 207 | +#include "prm-regbits-44xx.h" | ||
| 208 | + | ||
| 209 | +static const struct omap_abb_ops omap4_abb_ops = { | ||
| 210 | + .check_tranxdone = &omap4_prm_abb_check_txdone, | ||
| 211 | + .clear_tranxdone = &omap4_prm_abb_clear_txdone, | ||
| 212 | +}; | ||
| 213 | + | ||
| 214 | +static const struct omap_abb_common omap4_abb_common = { | ||
| 215 | + .opp_sel_mask = OMAP4430_OPP_SEL_MASK, | ||
| 216 | + .opp_change_mask = OMAP4430_OPP_CHANGE_MASK, | ||
| 217 | + .sr2en_mask = OMAP4430_SR2EN_MASK, | ||
| 218 | + .active_fbb_sel_mask = OMAP4430_ACTIVE_FBB_SEL_MASK, | ||
| 219 | + .sr2_wtcnt_value_mask = OMAP4430_SR2_WTCNT_VALUE_MASK, | ||
| 220 | + .settling_time = 50, | ||
| 221 | + .clock_cycles = 16, | ||
| 222 | + .ops = &omap4_abb_ops, | ||
| 223 | +}; | ||
| 224 | + | ||
| 225 | +struct omap_abb_instance omap4_abb_mpu = { | ||
| 226 | + .setup_offs = OMAP4_PRM_LDO_ABB_MPU_SETUP_OFFSET, | ||
| 227 | + .ctrl_offs = OMAP4_PRM_LDO_ABB_MPU_CTRL_OFFSET, | ||
| 228 | + .prm_irq_id = OMAP4_PRM_IRQ_VDD_MPU_ID, | ||
| 229 | + .common = &omap4_abb_common, | ||
| 230 | +}; | ||
| 231 | + | ||
| 232 | +struct omap_abb_instance omap4_abb_iva = { | ||
| 233 | + .setup_offs = OMAP4_PRM_LDO_ABB_IVA_SETUP_OFFSET, | ||
| 234 | + .ctrl_offs = OMAP4_PRM_LDO_ABB_IVA_CTRL_OFFSET, | ||
| 235 | + .prm_irq_id = OMAP4_PRM_IRQ_VDD_IVA_ID, | ||
| 236 | + .common = &omap4_abb_common, | ||
| 237 | +}; | ||
| 238 | -- | ||
| 239 | 1.6.6.1 | ||
| 240 | |||
diff --git a/recipes-kernel/linux/linux-3.0/bias/0005-OMAP3-OPP-add-ABB-data-to-voltage-tables.patch b/recipes-kernel/linux/linux-3.0/bias/0005-OMAP3-OPP-add-ABB-data-to-voltage-tables.patch deleted file mode 100644 index eb959fff..00000000 --- a/recipes-kernel/linux/linux-3.0/bias/0005-OMAP3-OPP-add-ABB-data-to-voltage-tables.patch +++ /dev/null | |||
| @@ -1,194 +0,0 @@ | |||
| 1 | From 8d85fedcb9866f5041e2c63b54d3eff7fd88cf18 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Mike Turquette <mturquette@ti.com> | ||
| 3 | Date: Wed, 29 Jun 2011 17:25:57 -0700 | ||
| 4 | Subject: [PATCH 5/8] OMAP3+: OPP: add ABB data to voltage tables | ||
| 5 | |||
| 6 | The operating mode of the Adaptive Body-Bias ldo maps directly to the | ||
| 7 | voltage of its voltage domain. The two modes supported are bypass and | ||
| 8 | Forward Body-Bias (FBB). | ||
| 9 | |||
| 10 | This patch models this relationship by adding an opp_sel paramter to | ||
| 11 | struct omap_volt_data and populates this type in the 3630 and 4430 | ||
| 12 | voltage tables. | ||
| 13 | |||
| 14 | NOMINAL_OPP causes the ABB ldo to be in bypass at that specific voltage. | ||
| 15 | FAST_OPP causes the ldo to operate in Forward Body-Bias mode. | ||
| 16 | |||
| 17 | Not all voltage domains have an ABB ldo and 3430 doesn't have one at | ||
| 18 | all. In such cases voltages are marked with OMAP_ABB_NO_LDO. | ||
| 19 | |||
| 20 | Signed-off-by: Mike Turquette <mturquette@ti.com> | ||
| 21 | --- | ||
| 22 | arch/arm/mach-omap2/omap_opp_data.h | 5 ++- | ||
| 23 | arch/arm/mach-omap2/opp3xxx_data.c | 37 ++++++++++++++++++----------------- | ||
| 24 | arch/arm/mach-omap2/opp4xxx_data.c | 25 ++++++++++++----------- | ||
| 25 | arch/arm/mach-omap2/voltage.h | 1 + | ||
| 26 | 4 files changed, 36 insertions(+), 32 deletions(-) | ||
| 27 | |||
| 28 | diff --git a/arch/arm/mach-omap2/omap_opp_data.h b/arch/arm/mach-omap2/omap_opp_data.h | ||
| 29 | index c784c12..5dd4dea 100644 | ||
| 30 | --- a/arch/arm/mach-omap2/omap_opp_data.h | ||
| 31 | +++ b/arch/arm/mach-omap2/omap_opp_data.h | ||
| 32 | @@ -71,12 +71,13 @@ struct omap_opp_def { | ||
| 33 | * Initialization wrapper used to define SmartReflex process data | ||
| 34 | * XXX Is this needed? Just use C99 initializers in data files? | ||
| 35 | */ | ||
| 36 | -#define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain) \ | ||
| 37 | +#define VOLT_DATA_DEFINE(_v_nom, _efuse_offs, _errminlimit, _errgain, _opp_sel) \ | ||
| 38 | { \ | ||
| 39 | .volt_nominal = _v_nom, \ | ||
| 40 | .sr_efuse_offs = _efuse_offs, \ | ||
| 41 | .sr_errminlimit = _errminlimit, \ | ||
| 42 | - .vp_errgain = _errgain \ | ||
| 43 | + .vp_errgain = _errgain, \ | ||
| 44 | + .opp_sel = _opp_sel \ | ||
| 45 | } | ||
| 46 | |||
| 47 | /* Use this to initialize the default table */ | ||
| 48 | diff --git a/arch/arm/mach-omap2/opp3xxx_data.c b/arch/arm/mach-omap2/opp3xxx_data.c | ||
| 49 | index d95f3f9..12fc2da 100644 | ||
| 50 | --- a/arch/arm/mach-omap2/opp3xxx_data.c | ||
| 51 | +++ b/arch/arm/mach-omap2/opp3xxx_data.c | ||
| 52 | @@ -24,6 +24,7 @@ | ||
| 53 | #include "control.h" | ||
| 54 | #include "omap_opp_data.h" | ||
| 55 | #include "pm.h" | ||
| 56 | +#include "abb.h" | ||
| 57 | |||
| 58 | /* 34xx */ | ||
| 59 | |||
| 60 | @@ -36,12 +37,12 @@ | ||
| 61 | #define OMAP3430_VDD_MPU_OPP5_UV 1350000 | ||
| 62 | |||
| 63 | struct omap_volt_data omap34xx_vddmpu_volt_data[] = { | ||
| 64 | - VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c), | ||
| 65 | - VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c), | ||
| 66 | - VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18), | ||
| 67 | - VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18), | ||
| 68 | - VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18), | ||
| 69 | - VOLT_DATA_DEFINE(0, 0, 0, 0), | ||
| 70 | + VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD1, 0xf4, 0x0c, OMAP_ABB_NO_LDO), | ||
| 71 | + VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD1, 0xf4, 0x0c, OMAP_ABB_NO_LDO), | ||
| 72 | + VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO), | ||
| 73 | + VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP4_UV, OMAP343X_CONTROL_FUSE_OPP4_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO), | ||
| 74 | + VOLT_DATA_DEFINE(OMAP3430_VDD_MPU_OPP5_UV, OMAP343X_CONTROL_FUSE_OPP5_VDD1, 0xf9, 0x18, OMAP_ABB_NO_LDO), | ||
| 75 | + VOLT_DATA_DEFINE(0, 0, 0, 0, 0), | ||
| 76 | }; | ||
| 77 | |||
| 78 | /* VDD2 */ | ||
| 79 | @@ -51,10 +52,10 @@ struct omap_volt_data omap34xx_vddmpu_volt_data[] = { | ||
| 80 | #define OMAP3430_VDD_CORE_OPP3_UV 1150000 | ||
| 81 | |||
| 82 | struct omap_volt_data omap34xx_vddcore_volt_data[] = { | ||
| 83 | - VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c), | ||
| 84 | - VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c), | ||
| 85 | - VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18), | ||
| 86 | - VOLT_DATA_DEFINE(0, 0, 0, 0), | ||
| 87 | + VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP1_UV, OMAP343X_CONTROL_FUSE_OPP1_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO), | ||
| 88 | + VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP2_UV, OMAP343X_CONTROL_FUSE_OPP2_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO), | ||
| 89 | + VOLT_DATA_DEFINE(OMAP3430_VDD_CORE_OPP3_UV, OMAP343X_CONTROL_FUSE_OPP3_VDD2, 0xf9, 0x18, OMAP_ABB_NO_LDO), | ||
| 90 | + VOLT_DATA_DEFINE(0, 0, 0, 0, 0), | ||
| 91 | }; | ||
| 92 | |||
| 93 | /* 36xx */ | ||
| 94 | @@ -67,11 +68,11 @@ struct omap_volt_data omap34xx_vddcore_volt_data[] = { | ||
| 95 | #define OMAP3630_VDD_MPU_OPP1G_UV 1375000 | ||
| 96 | |||
| 97 | struct omap_volt_data omap36xx_vddmpu_volt_data[] = { | ||
| 98 | - VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c), | ||
| 99 | - VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16), | ||
| 100 | - VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23), | ||
| 101 | - VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27), | ||
| 102 | - VOLT_DATA_DEFINE(0, 0, 0, 0), | ||
| 103 | + VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD1, 0xf4, 0x0c, OMAP_ABB_NOMINAL_OPP), | ||
| 104 | + VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD1, 0xf9, 0x16, OMAP_ABB_NOMINAL_OPP), | ||
| 105 | + VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP120_UV, OMAP3630_CONTROL_FUSE_OPP120_VDD1, 0xfa, 0x23, OMAP_ABB_NOMINAL_OPP), | ||
| 106 | + VOLT_DATA_DEFINE(OMAP3630_VDD_MPU_OPP1G_UV, OMAP3630_CONTROL_FUSE_OPP1G_VDD1, 0xfa, 0x27, OMAP_ABB_FAST_OPP), | ||
| 107 | + VOLT_DATA_DEFINE(0, 0, 0, 0, 0), | ||
| 108 | }; | ||
| 109 | |||
| 110 | /* VDD2 */ | ||
| 111 | @@ -80,9 +81,9 @@ struct omap_volt_data omap36xx_vddmpu_volt_data[] = { | ||
| 112 | #define OMAP3630_VDD_CORE_OPP100_UV 1200000 | ||
| 113 | |||
| 114 | struct omap_volt_data omap36xx_vddcore_volt_data[] = { | ||
| 115 | - VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c), | ||
| 116 | - VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16), | ||
| 117 | - VOLT_DATA_DEFINE(0, 0, 0, 0), | ||
| 118 | + VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP50_UV, OMAP3630_CONTROL_FUSE_OPP50_VDD2, 0xf4, 0x0c, OMAP_ABB_NO_LDO), | ||
| 119 | + VOLT_DATA_DEFINE(OMAP3630_VDD_CORE_OPP100_UV, OMAP3630_CONTROL_FUSE_OPP100_VDD2, 0xf9, 0x16, OMAP_ABB_NO_LDO), | ||
| 120 | + VOLT_DATA_DEFINE(0, 0, 0, 0, 0), | ||
| 121 | }; | ||
| 122 | |||
| 123 | /* OPP data */ | ||
| 124 | diff --git a/arch/arm/mach-omap2/opp4xxx_data.c b/arch/arm/mach-omap2/opp4xxx_data.c | ||
| 125 | index 2293ba2..efdbf91 100644 | ||
| 126 | --- a/arch/arm/mach-omap2/opp4xxx_data.c | ||
| 127 | +++ b/arch/arm/mach-omap2/opp4xxx_data.c | ||
| 128 | @@ -25,6 +25,7 @@ | ||
| 129 | #include "control.h" | ||
| 130 | #include "omap_opp_data.h" | ||
| 131 | #include "pm.h" | ||
| 132 | +#include "abb.h" | ||
| 133 | |||
| 134 | /* | ||
| 135 | * Structures containing OMAP4430 voltage supported and various | ||
| 136 | @@ -37,11 +38,11 @@ | ||
| 137 | #define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000 | ||
| 138 | |||
| 139 | struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = { | ||
| 140 | - VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c), | ||
| 141 | - VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16), | ||
| 142 | - VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23), | ||
| 143 | - VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27), | ||
| 144 | - VOLT_DATA_DEFINE(0, 0, 0, 0), | ||
| 145 | + VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c, OMAP_ABB_NOMINAL_OPP), | ||
| 146 | + VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16, OMAP_ABB_NOMINAL_OPP), | ||
| 147 | + VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23, OMAP_ABB_NOMINAL_OPP), | ||
| 148 | + VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27, OMAP_ABB_FAST_OPP), | ||
| 149 | + VOLT_DATA_DEFINE(0, 0, 0, 0, 0), | ||
| 150 | }; | ||
| 151 | |||
| 152 | #define OMAP4430_VDD_IVA_OPP50_UV 1013000 | ||
| 153 | @@ -49,19 +50,19 @@ struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = { | ||
| 154 | #define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000 | ||
| 155 | |||
| 156 | struct omap_volt_data omap44xx_vdd_iva_volt_data[] = { | ||
| 157 | - VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c), | ||
| 158 | - VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16), | ||
| 159 | - VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23), | ||
| 160 | - VOLT_DATA_DEFINE(0, 0, 0, 0), | ||
| 161 | + VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c, OMAP_ABB_NOMINAL_OPP), | ||
| 162 | + VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16, OMAP_ABB_NOMINAL_OPP), | ||
| 163 | + VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23, OMAP_ABB_NOMINAL_OPP), | ||
| 164 | + VOLT_DATA_DEFINE(0, 0, 0, 0, 0), | ||
| 165 | }; | ||
| 166 | |||
| 167 | #define OMAP4430_VDD_CORE_OPP50_UV 1025000 | ||
| 168 | #define OMAP4430_VDD_CORE_OPP100_UV 1200000 | ||
| 169 | |||
| 170 | struct omap_volt_data omap44xx_vdd_core_volt_data[] = { | ||
| 171 | - VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c), | ||
| 172 | - VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16), | ||
| 173 | - VOLT_DATA_DEFINE(0, 0, 0, 0), | ||
| 174 | + VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c, OMAP_ABB_NO_LDO), | ||
| 175 | + VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16, OMAP_ABB_NO_LDO), | ||
| 176 | + VOLT_DATA_DEFINE(0, 0, 0, 0, 0), | ||
| 177 | }; | ||
| 178 | |||
| 179 | |||
| 180 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 181 | index b4c6259..2aa6c43 100644 | ||
| 182 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 183 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 184 | @@ -105,6 +105,7 @@ struct omap_volt_data { | ||
| 185 | u32 sr_efuse_offs; | ||
| 186 | u8 sr_errminlimit; | ||
| 187 | u8 vp_errgain; | ||
| 188 | + u32 opp_sel; | ||
| 189 | }; | ||
| 190 | |||
| 191 | /** | ||
| 192 | -- | ||
| 193 | 1.6.6.1 | ||
| 194 | |||
diff --git a/recipes-kernel/linux/linux-3.0/bias/0006-OMAP3-Voltage-add-ABB-data-to-voltage-domains.patch b/recipes-kernel/linux/linux-3.0/bias/0006-OMAP3-Voltage-add-ABB-data-to-voltage-domains.patch deleted file mode 100644 index 3850feac..00000000 --- a/recipes-kernel/linux/linux-3.0/bias/0006-OMAP3-Voltage-add-ABB-data-to-voltage-domains.patch +++ /dev/null | |||
| @@ -1,83 +0,0 @@ | |||
| 1 | From 4a0f2caa6d49e185eac84e361ee4b40783ffeb16 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Mike Turquette <mturquette@ti.com> | ||
| 3 | Date: Thu, 21 Jul 2011 12:31:50 +0200 | ||
| 4 | Subject: [PATCH 6/8] OMAP3+: Voltage: add ABB data to voltage domains | ||
| 5 | |||
| 6 | Starting with OMAP36xx, some voltage domains have an ABB ldo meant to | ||
| 7 | insure stability when that voltage domain is operating at a high OPP. | ||
| 8 | |||
| 9 | This patch adds struct omap_abb_instance to struct voltagedomain and | ||
| 10 | populates the data for those voltage domains that have an ABB ldo on | ||
| 11 | both 36xx and 44xx silicon. | ||
| 12 | |||
| 13 | Signed-off-by: Mike Turquette <mturquette@ti.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/voltage.h | 1 + | ||
| 16 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 3 +++ | ||
| 17 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 3 +++ | ||
| 18 | 3 files changed, 7 insertions(+), 0 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 21 | index 2aa6c43..4fe35d7 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 23 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 24 | @@ -69,6 +69,7 @@ struct voltagedomain { | ||
| 25 | struct omap_vc_channel *vc; | ||
| 26 | const struct omap_vfsm_instance *vfsm; | ||
| 27 | struct omap_vp_instance *vp; | ||
| 28 | + struct omap_abb_instance *abb; | ||
| 29 | struct omap_voltdm_pmic *pmic; | ||
| 30 | |||
| 31 | /* VC/VP register access functions: SoC specific */ | ||
| 32 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 33 | index b0d0ae1..cdcfbdf 100644 | ||
| 34 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 35 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 36 | @@ -26,6 +26,7 @@ | ||
| 37 | #include "voltage.h" | ||
| 38 | #include "vc.h" | ||
| 39 | #include "vp.h" | ||
| 40 | +#include "abb.h" | ||
| 41 | |||
| 42 | /* | ||
| 43 | * VDD data | ||
| 44 | @@ -90,6 +91,8 @@ void __init omap3xxx_voltagedomains_init(void) | ||
| 45 | if (cpu_is_omap3630()) { | ||
| 46 | omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data; | ||
| 47 | omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data; | ||
| 48 | + | ||
| 49 | + omap3_voltdm_mpu.abb = &omap36xx_abb_mpu; | ||
| 50 | } else { | ||
| 51 | omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data; | ||
| 52 | omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; | ||
| 53 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 54 | index c4584e9..11e2458 100644 | ||
| 55 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 56 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 57 | @@ -31,6 +31,7 @@ | ||
| 58 | #include "omap_opp_data.h" | ||
| 59 | #include "vc.h" | ||
| 60 | #include "vp.h" | ||
| 61 | +#include "abb.h" | ||
| 62 | |||
| 63 | static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { | ||
| 64 | .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, | ||
| 65 | @@ -53,6 +54,7 @@ static struct voltagedomain omap4_voltdm_mpu = { | ||
| 66 | .vc = &omap4_vc_mpu, | ||
| 67 | .vfsm = &omap4_vdd_mpu_vfsm, | ||
| 68 | .vp = &omap4_vp_mpu, | ||
| 69 | + .abb = &omap4_abb_mpu, | ||
| 70 | }; | ||
| 71 | |||
| 72 | static struct voltagedomain omap4_voltdm_iva = { | ||
| 73 | @@ -64,6 +66,7 @@ static struct voltagedomain omap4_voltdm_iva = { | ||
| 74 | .vc = &omap4_vc_iva, | ||
| 75 | .vfsm = &omap4_vdd_iva_vfsm, | ||
| 76 | .vp = &omap4_vp_iva, | ||
| 77 | + .abb = &omap4_abb_iva, | ||
| 78 | }; | ||
| 79 | |||
| 80 | static struct voltagedomain omap4_voltdm_core = { | ||
| 81 | -- | ||
| 82 | 1.6.6.1 | ||
| 83 | |||
diff --git a/recipes-kernel/linux/linux-3.0/bias/0007-OMAP3-ABB-initialization-transition-functions.patch b/recipes-kernel/linux/linux-3.0/bias/0007-OMAP3-ABB-initialization-transition-functions.patch deleted file mode 100644 index 88858cf4..00000000 --- a/recipes-kernel/linux/linux-3.0/bias/0007-OMAP3-ABB-initialization-transition-functions.patch +++ /dev/null | |||
| @@ -1,274 +0,0 @@ | |||
| 1 | From 35fc68e090a4f4241c7b3488fd24e82b3f839994 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Mike Turquette <mturquette@ti.com> | ||
| 3 | Date: Wed, 29 Jun 2011 17:25:59 -0700 | ||
| 4 | Subject: [PATCH 7/8] OMAP3+: ABB: initialization & transition functions | ||
| 5 | |||
| 6 | The Adaptive Body-Bias ldo can be set to bypass or Forward Body-Bias | ||
| 7 | after voltage scaling is performed. | ||
| 8 | |||
| 9 | This patch implements the Adaptive Body-Bias ldo initialization routine | ||
| 10 | and the transition sequence which is needed after a vc_bypass or | ||
| 11 | vp_forceupdate sequence completes. | ||
| 12 | |||
| 13 | Signed-off-by: Mike Turquette <mturquette@ti.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/Makefile | 2 +- | ||
| 16 | arch/arm/mach-omap2/abb.c | 218 ++++++++++++++++++++++++++++++++++++++++++ | ||
| 17 | arch/arm/mach-omap2/abb.h | 5 + | ||
| 18 | 3 files changed, 224 insertions(+), 1 deletions(-) | ||
| 19 | create mode 100644 arch/arm/mach-omap2/abb.c | ||
| 20 | |||
| 21 | diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile | ||
| 22 | index 5bc306c..d0dd488 100644 | ||
| 23 | --- a/arch/arm/mach-omap2/Makefile | ||
| 24 | +++ b/arch/arm/mach-omap2/Makefile | ||
| 25 | @@ -94,7 +94,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ | ||
| 26 | |||
| 27 | # OMAP voltage domains | ||
| 28 | ifeq ($(CONFIG_PM),y) | ||
| 29 | -voltagedomain-common := voltage.o vc.o vp.o | ||
| 30 | +voltagedomain-common := voltage.o vc.o vp.o abb.o | ||
| 31 | obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ | ||
| 32 | voltagedomains2xxx_data.o | ||
| 33 | obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ | ||
| 34 | diff --git a/arch/arm/mach-omap2/abb.c b/arch/arm/mach-omap2/abb.c | ||
| 35 | new file mode 100644 | ||
| 36 | index 0000000..4d42b67 | ||
| 37 | --- /dev/null | ||
| 38 | +++ b/arch/arm/mach-omap2/abb.c | ||
| 39 | @@ -0,0 +1,218 @@ | ||
| 40 | +/* | ||
| 41 | + * OMAP Adaptive Body-Bias core | ||
| 42 | + * | ||
| 43 | + * Copyright (C) 2011 Texas Instruments, Inc. | ||
| 44 | + * Mike Turquette <mturquette@ti.com> | ||
| 45 | + * | ||
| 46 | + * This program is free software; you can redistribute it and/or modify | ||
| 47 | + * it under the terms of the GNU General Public License version 2 as | ||
| 48 | + * published by the Free Software Foundation. | ||
| 49 | + */ | ||
| 50 | + | ||
| 51 | +#include <linux/init.h> | ||
| 52 | +#include <linux/delay.h> | ||
| 53 | + | ||
| 54 | +#include "abb.h" | ||
| 55 | +#include "voltage.h" | ||
| 56 | + | ||
| 57 | +/* | ||
| 58 | + * omap_abb_set_opp - program ABB ldo based on new voltage | ||
| 59 | + * | ||
| 60 | + * @voltdm - pointer to voltage domain that just finished scaling voltage | ||
| 61 | + * | ||
| 62 | + * Look up the ABB ldo state for the new voltage that voltdm just finished | ||
| 63 | + * transitioning to and compare it to current ldo state. If a change is needed | ||
| 64 | + * then clear appropriate PRM_IRQSTATUS bit, transition ldo and then clear | ||
| 65 | + * PRM_IRQSTATUS bit again. Returns 0 on success, -EERROR otherwise. | ||
| 66 | + */ | ||
| 67 | +int omap_abb_set_opp(struct voltagedomain *voltdm) | ||
| 68 | +{ | ||
| 69 | + struct omap_abb_instance *abb = voltdm->abb; | ||
| 70 | + struct omap_volt_data *volt_data; | ||
| 71 | + int ret, timeout; | ||
| 72 | + u8 opp_sel; | ||
| 73 | + | ||
| 74 | + /* fetch the ABB ldo OPP_SEL value for the new voltage */ | ||
| 75 | + volt_data = omap_voltage_get_voltdata(voltdm, voltdm->nominal_volt); | ||
| 76 | + | ||
| 77 | + if (IS_ERR_OR_NULL(volt_data)) | ||
| 78 | + return -EINVAL; | ||
| 79 | + | ||
| 80 | + opp_sel = volt_data->opp_sel; | ||
| 81 | + | ||
| 82 | + /* bail early if no transition is necessary */ | ||
| 83 | + if (opp_sel == abb->_opp_sel) | ||
| 84 | + return 0; | ||
| 85 | + | ||
| 86 | + /* clear interrupt status */ | ||
| 87 | + timeout = 0; | ||
| 88 | + while (timeout++ < ABB_TRANXDONE_TIMEOUT) { | ||
| 89 | + abb->common->ops->clear_tranxdone(abb->prm_irq_id); | ||
| 90 | + | ||
| 91 | + ret = abb->common->ops->check_tranxdone(abb->prm_irq_id); | ||
| 92 | + if (!ret) | ||
| 93 | + break; | ||
| 94 | + | ||
| 95 | + udelay(1); | ||
| 96 | + } | ||
| 97 | + | ||
| 98 | + if (timeout>= ABB_TRANXDONE_TIMEOUT) { | ||
| 99 | + pr_warning("%s: vdd_%s ABB TRANXDONE timeout\n", | ||
| 100 | + __func__, voltdm->name); | ||
| 101 | + return -ETIMEDOUT; | ||
| 102 | + } | ||
| 103 | + | ||
| 104 | + /* program next state of ABB ldo */ | ||
| 105 | + voltdm->rmw(abb->common->opp_sel_mask, | ||
| 106 | + opp_sel << __ffs(abb->common->opp_sel_mask), | ||
| 107 | + abb->ctrl_offs); | ||
| 108 | + | ||
| 109 | + /* initiate ABB ldo change */ | ||
| 110 | + voltdm->rmw(abb->common->opp_change_mask, | ||
| 111 | + abb->common->opp_change_mask, | ||
| 112 | + abb->ctrl_offs); | ||
| 113 | + | ||
| 114 | + /* clear interrupt status */ | ||
| 115 | + timeout = 0; | ||
| 116 | + while (timeout++ < ABB_TRANXDONE_TIMEOUT) { | ||
| 117 | + abb->common->ops->clear_tranxdone(abb->prm_irq_id); | ||
| 118 | + | ||
| 119 | + ret = abb->common->ops->check_tranxdone(abb->prm_irq_id); | ||
| 120 | + if (!ret) | ||
| 121 | + break; | ||
| 122 | + | ||
| 123 | + udelay(1); | ||
| 124 | + } | ||
| 125 | + | ||
| 126 | + if (timeout>= ABB_TRANXDONE_TIMEOUT) { | ||
| 127 | + pr_warning("%s: vdd_%s ABB TRANXDONE timeout\n", | ||
| 128 | + __func__, voltdm->name); | ||
| 129 | + return -ETIMEDOUT; | ||
| 130 | + } | ||
| 131 | + | ||
| 132 | + /* track internal state */ | ||
| 133 | + abb->_opp_sel = opp_sel; | ||
| 134 | + | ||
| 135 | + return 0; | ||
| 136 | +} | ||
| 137 | + | ||
| 138 | +/* | ||
| 139 | + * omap_abb_enable - enable ABB ldo on a particular voltage domain | ||
| 140 | + * | ||
| 141 | + * @voltdm - pointer to particular voltage domain | ||
| 142 | + */ | ||
| 143 | +void omap_abb_enable(struct voltagedomain *voltdm) | ||
| 144 | +{ | ||
| 145 | + struct omap_abb_instance *abb = voltdm->abb; | ||
| 146 | + | ||
| 147 | + if (abb->enabled) | ||
| 148 | + return; | ||
| 149 | + | ||
| 150 | + abb->enabled = true; | ||
| 151 | + | ||
| 152 | + voltdm->rmw(abb->common->sr2en_mask, abb->common->sr2en_mask, | ||
| 153 | + abb->setup_offs); | ||
| 154 | +} | ||
| 155 | + | ||
| 156 | +/* | ||
| 157 | + * omap_abb_disable - disable ABB ldo on a particular voltage domain | ||
| 158 | + * | ||
| 159 | + * @voltdm - pointer to particular voltage domain | ||
| 160 | + * | ||
| 161 | + * Included for completeness. Not currently used but will be needed in the | ||
| 162 | + * future if ABB is converted to a loadable module. | ||
| 163 | + */ | ||
| 164 | +void omap_abb_disable(struct voltagedomain *voltdm) | ||
| 165 | +{ | ||
| 166 | + struct omap_abb_instance *abb = voltdm->abb; | ||
| 167 | + | ||
| 168 | + if (!abb->enabled) | ||
| 169 | + return; | ||
| 170 | + | ||
| 171 | + abb->enabled = false; | ||
| 172 | + | ||
| 173 | + voltdm->rmw(abb->common->sr2en_mask, | ||
| 174 | + (0 << __ffs(abb->common->sr2en_mask)), | ||
| 175 | + abb->setup_offs); | ||
| 176 | +} | ||
| 177 | + | ||
| 178 | +/* | ||
| 179 | + * omap_abb_init - Initialize an ABB ldo instance | ||
| 180 | + * | ||
| 181 | + * @voltdm: voltage domain upon which ABB ldo resides | ||
| 182 | + * | ||
| 183 | + * Initializes an individual ABB ldo for Forward Body-Bias. FBB is used to | ||
| 184 | + * insure stability at higher voltages. Note that some older OMAP chips have a | ||
| 185 | + * Reverse Body-Bias mode meant to save power at low voltage, but that mode is | ||
| 186 | + * unsupported and phased out on newer chips. | ||
| 187 | + */ | ||
| 188 | +void __init omap_abb_init(struct voltagedomain *voltdm) | ||
| 189 | +{ | ||
| 190 | + struct omap_abb_instance *abb = voltdm->abb; | ||
| 191 | + u32 sys_clk_rate; | ||
| 192 | + u32 sr2_wt_cnt_val; | ||
| 193 | + u32 clock_cycles; | ||
| 194 | + u32 settling_time; | ||
| 195 | + u32 val; | ||
| 196 | + | ||
| 197 | + if(IS_ERR_OR_NULL(abb)) | ||
| 198 | + return; | ||
| 199 | + | ||
| 200 | + /* | ||
| 201 | + * SR2_WTCNT_VALUE is the settling time for the ABB ldo after a | ||
| 202 | + * transition and must be programmed with the correct time at boot. | ||
| 203 | + * The value programmed into the register is the number of SYS_CLK | ||
| 204 | + * clock cycles that match a given wall time profiled for the ldo. | ||
| 205 | + * This value depends on: | ||
| 206 | + * settling time of ldo in micro-seconds (varies per OMAP family) | ||
| 207 | + * # of clock cycles per SYS_CLK period (varies per OMAP family) | ||
| 208 | + * the SYS_CLK frequency in MHz (varies per board) | ||
| 209 | + * The formula is: | ||
| 210 | + * | ||
| 211 | + * ldo settling time (in micro-seconds) | ||
| 212 | + * SR2_WTCNT_VALUE = ------------------------------------------ | ||
| 213 | + * (# system clock cycles) * (sys_clk period) | ||
| 214 | + * | ||
| 215 | + * Put another way: | ||
| 216 | + * | ||
| 217 | + * SR2_WTCNT_VALUE = settling time / (# SYS_CLK cycles / SYS_CLK rate)) | ||
| 218 | + * | ||
| 219 | + * To avoid dividing by zero multiply both "# clock cycles" and | ||
| 220 | + * "settling time" by 10 such that the final result is the one we want. | ||
| 221 | + */ | ||
| 222 | + | ||
| 223 | + /* convert SYS_CLK rate to MHz & prevent divide by zero */ | ||
| 224 | + sys_clk_rate = DIV_ROUND_CLOSEST(voltdm->sys_clk.rate, 1000000); | ||
| 225 | + clock_cycles = abb->common->clock_cycles * 10; | ||
| 226 | + settling_time = abb->common->settling_time * 10; | ||
| 227 | + | ||
| 228 | + /* calculate cycle rate */ | ||
| 229 | + clock_cycles = DIV_ROUND_CLOSEST(clock_cycles, sys_clk_rate); | ||
| 230 | + | ||
| 231 | + /* calulate SR2_WTCNT_VALUE */ | ||
| 232 | + sr2_wt_cnt_val = DIV_ROUND_CLOSEST(settling_time, clock_cycles); | ||
| 233 | + | ||
| 234 | + voltdm->rmw(abb->common->sr2_wtcnt_value_mask, | ||
| 235 | + (sr2_wt_cnt_val << __ffs(abb->common->sr2_wtcnt_value_mask)), | ||
| 236 | + abb->setup_offs); | ||
| 237 | + | ||
| 238 | + /* allow Forward Body-Bias */ | ||
| 239 | + voltdm->rmw(abb->common->active_fbb_sel_mask, | ||
| 240 | + abb->common->active_fbb_sel_mask, | ||
| 241 | + abb->setup_offs); | ||
| 242 | + | ||
| 243 | + /* did bootloader set OPP_SEL? */ | ||
| 244 | + val = voltdm->read(abb->ctrl_offs); | ||
| 245 | + val &= abb->common->opp_sel_mask; | ||
| 246 | + abb->_opp_sel = val >> __ffs(abb->common->opp_sel_mask); | ||
| 247 | + | ||
| 248 | + /* enable the ldo if not done by bootloader */ | ||
| 249 | + val = voltdm->read(abb->setup_offs); | ||
| 250 | + val &= abb->common->sr2en_mask; | ||
| 251 | + if (val) | ||
| 252 | + abb->enabled = true; | ||
| 253 | + else | ||
| 254 | + omap_abb_enable(voltdm); | ||
| 255 | + | ||
| 256 | + return; | ||
| 257 | +} | ||
| 258 | diff --git a/arch/arm/mach-omap2/abb.h b/arch/arm/mach-omap2/abb.h | ||
| 259 | index 74f2044..c06c7d6 100644 | ||
| 260 | --- a/arch/arm/mach-omap2/abb.h | ||
| 261 | +++ b/arch/arm/mach-omap2/abb.h | ||
| 262 | @@ -82,4 +82,9 @@ extern struct omap_abb_instance omap36xx_abb_mpu; | ||
| 263 | extern struct omap_abb_instance omap4_abb_mpu; | ||
| 264 | extern struct omap_abb_instance omap4_abb_iva; | ||
| 265 | |||
| 266 | +void omap_abb_init(struct voltagedomain *voltdm); | ||
| 267 | +void omap_abb_enable(struct voltagedomain *voltdm); | ||
| 268 | +void omap_abb_disble(struct voltagedomain *voltdm); | ||
| 269 | +int omap_abb_set_opp(struct voltagedomain *voltdm); | ||
| 270 | + | ||
| 271 | #endif | ||
| 272 | -- | ||
| 273 | 1.6.6.1 | ||
| 274 | |||
diff --git a/recipes-kernel/linux/linux-3.0/bias/0008-OMAP3-Voltage-add-ABB-to-voltage-scaling.patch b/recipes-kernel/linux/linux-3.0/bias/0008-OMAP3-Voltage-add-ABB-to-voltage-scaling.patch deleted file mode 100644 index bba84109..00000000 --- a/recipes-kernel/linux/linux-3.0/bias/0008-OMAP3-Voltage-add-ABB-to-voltage-scaling.patch +++ /dev/null | |||
| @@ -1,114 +0,0 @@ | |||
| 1 | From ee2b116a1ee82ec94108035ed1ae047d69aee215 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Mike Turquette <mturquette@ti.com> | ||
| 3 | Date: Thu, 21 Jul 2011 12:36:37 +0200 | ||
| 4 | Subject: [PATCH 8/8] OMAP3+: Voltage: add ABB to voltage scaling | ||
| 5 | |||
| 6 | Adaptive Body-Bias ldo state should be transitioned (if necessary) after | ||
| 7 | a voltage scaling sequence completes via vc_bypass or vp_forceupdate | ||
| 8 | methods. | ||
| 9 | |||
| 10 | This patch initializes the ABB ldo's as a part of the greater voltage | ||
| 11 | initialization function and adds the ABB transition routine to both the | ||
| 12 | vc_bypass and vp_forceupdate sequences. | ||
| 13 | |||
| 14 | Signed-off-by: Mike Turquette <mturquette@ti.com> | ||
| 15 | --- | ||
| 16 | arch/arm/mach-omap2/vc.c | 10 ++++++++-- | ||
| 17 | arch/arm/mach-omap2/voltage.c | 4 ++++ | ||
| 18 | arch/arm/mach-omap2/vp.c | 9 +++++++-- | ||
| 19 | 3 files changed, 19 insertions(+), 4 deletions(-) | ||
| 20 | |||
| 21 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 22 | index 16fa912..c5d8550 100644 | ||
| 23 | --- a/arch/arm/mach-omap2/vc.c | ||
| 24 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 25 | @@ -6,6 +6,7 @@ | ||
| 26 | |||
| 27 | #include "voltage.h" | ||
| 28 | #include "vc.h" | ||
| 29 | +#include "abb.h" | ||
| 30 | #include "prm-regbits-34xx.h" | ||
| 31 | #include "prm-regbits-44xx.h" | ||
| 32 | #include "prm44xx.h" | ||
| 33 | @@ -153,7 +154,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, | ||
| 34 | u32 loop_cnt = 0, retries_cnt = 0; | ||
| 35 | u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; | ||
| 36 | u8 target_vsel, current_vsel; | ||
| 37 | - int ret; | ||
| 38 | + int ret = 0; | ||
| 39 | |||
| 40 | ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); | ||
| 41 | if (ret) | ||
| 42 | @@ -191,7 +192,12 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, | ||
| 43 | } | ||
| 44 | |||
| 45 | omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); | ||
| 46 | - return 0; | ||
| 47 | + | ||
| 48 | + /* transition Adaptive Body-Bias ldo */ | ||
| 49 | + if (voltdm->abb) | ||
| 50 | + ret = omap_abb_set_opp(voltdm); | ||
| 51 | + | ||
| 52 | + return ret; | ||
| 53 | } | ||
| 54 | |||
| 55 | static void __init omap3_vfsm_init(struct voltagedomain *voltdm) | ||
| 56 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 57 | index cebc8b1..25f8604 100644 | ||
| 58 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 59 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 60 | @@ -40,6 +40,7 @@ | ||
| 61 | |||
| 62 | #include "vc.h" | ||
| 63 | #include "vp.h" | ||
| 64 | +#include "abb.h" | ||
| 65 | |||
| 66 | static LIST_HEAD(voltdm_list); | ||
| 67 | |||
| 68 | @@ -279,6 +280,9 @@ int __init omap_voltage_late_init(void) | ||
| 69 | voltdm->scale = omap_vp_forceupdate_scale; | ||
| 70 | omap_vp_init(voltdm); | ||
| 71 | } | ||
| 72 | + | ||
| 73 | + if (voltdm->abb) | ||
| 74 | + omap_abb_init(voltdm); | ||
| 75 | } | ||
| 76 | |||
| 77 | return 0; | ||
| 78 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 79 | index 66bd700..886be89 100644 | ||
| 80 | --- a/arch/arm/mach-omap2/vp.c | ||
| 81 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 82 | @@ -5,6 +5,7 @@ | ||
| 83 | |||
| 84 | #include "voltage.h" | ||
| 85 | #include "vp.h" | ||
| 86 | +#include "abb.h" | ||
| 87 | #include "prm-regbits-34xx.h" | ||
| 88 | #include "prm-regbits-44xx.h" | ||
| 89 | #include "prm44xx.h" | ||
| 90 | @@ -116,7 +117,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 91 | struct omap_vp_instance *vp = voltdm->vp; | ||
| 92 | u32 vpconfig; | ||
| 93 | u8 target_vsel, current_vsel; | ||
| 94 | - int ret, timeout = 0; | ||
| 95 | + int ret = 0, timeout = 0; | ||
| 96 | |||
| 97 | ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); | ||
| 98 | if (ret) | ||
| 99 | @@ -178,7 +179,11 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 100 | /* Clear force bit */ | ||
| 101 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 102 | |||
| 103 | - return 0; | ||
| 104 | + /* transition Adaptive Body-Bias LDO */ | ||
| 105 | + if (voltdm->abb) | ||
| 106 | + ret = omap_abb_set_opp(voltdm); | ||
| 107 | + | ||
| 108 | + return ret; | ||
| 109 | } | ||
| 110 | |||
| 111 | /** | ||
| 112 | -- | ||
| 113 | 1.6.6.1 | ||
| 114 | |||
diff --git a/recipes-kernel/linux/linux-3.0/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch b/recipes-kernel/linux/linux-3.0/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch deleted file mode 100644 index 35b9abbd..00000000 --- a/recipes-kernel/linux/linux-3.0/madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch +++ /dev/null | |||
| @@ -1,46 +0,0 @@ | |||
| 1 | From 174f636d95d1f6aa6fc6ba3e81282fb49b0feecd Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Keerthy <j-keerthy@ti.com> | ||
| 3 | Date: Wed, 4 May 2011 01:14:50 +0530 | ||
| 4 | Subject: [PATCH 1/2] Enabling Hwmon driver for twl4030-madc | ||
| 5 | |||
| 6 | Signed-off-by: Keerthy <j-keerthy@ti.com> | ||
| 7 | --- | ||
| 8 | drivers/mfd/twl-core.c | 15 +++++++++++++++ | ||
| 9 | 1 files changed, 15 insertions(+), 0 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c | ||
| 12 | index f82413a..e39dbed 100644 | ||
| 13 | --- a/drivers/mfd/twl-core.c | ||
| 14 | +++ b/drivers/mfd/twl-core.c | ||
| 15 | @@ -83,6 +83,13 @@ | ||
| 16 | #define twl_has_madc() false | ||
| 17 | #endif | ||
| 18 | |||
| 19 | +#if defined(CONFIG_SENSORS_TWL4030_MADC) ||\ | ||
| 20 | + defined(CONFIG_SENSORS_TWL4030_MADC_MODULE) | ||
| 21 | +#define twl_has_madc_hwmon() true | ||
| 22 | +#else | ||
| 23 | +#define twl_has_madc_hwmon() false | ||
| 24 | +#endif | ||
| 25 | + | ||
| 26 | #ifdef CONFIG_TWL4030_POWER | ||
| 27 | #define twl_has_power() true | ||
| 28 | #else | ||
| 29 | @@ -669,6 +676,14 @@ add_children(struct twl4030_platform_data *pdata, unsigned long features) | ||
| 30 | return PTR_ERR(child); | ||
| 31 | } | ||
| 32 | |||
| 33 | +if (twl_has_madc_hwmon()) { | ||
| 34 | + child = add_child(2, "twl4030_madc_hwmon", | ||
| 35 | + NULL, 0, | ||
| 36 | + true, pdata->irq_base + MADC_INTR_OFFSET, 0); | ||
| 37 | + if (IS_ERR(child)) | ||
| 38 | + return PTR_ERR(child); | ||
| 39 | + } | ||
| 40 | + | ||
| 41 | if (twl_has_rtc()) { | ||
| 42 | /* | ||
| 43 | * REVISIT platform_data here currently might expose the | ||
| 44 | -- | ||
| 45 | 1.7.2.5 | ||
| 46 | |||
diff --git a/recipes-kernel/linux/linux-3.0/madc/0002-mfd-twl-core-enable-madc-clock.patch b/recipes-kernel/linux/linux-3.0/madc/0002-mfd-twl-core-enable-madc-clock.patch deleted file mode 100644 index 015ab6dd..00000000 --- a/recipes-kernel/linux/linux-3.0/madc/0002-mfd-twl-core-enable-madc-clock.patch +++ /dev/null | |||
| @@ -1,54 +0,0 @@ | |||
| 1 | From f4aed769e9e59998f44447e7309e192573e6fac6 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Sat, 23 Jan 2010 06:26:54 -0800 | ||
| 4 | Subject: [PATCH 2/2] mfd: twl-core: enable madc clock | ||
| 5 | |||
| 6 | Now that the madc driver has been merged it is also necessary to enable the clock to the madc block | ||
| 7 | |||
| 8 | Signed-off-by: Steve Sakoman <steve@sakoman.com> | ||
| 9 | --- | ||
| 10 | drivers/mfd/twl-core.c | 8 ++++++++ | ||
| 11 | include/linux/i2c/twl.h | 1 + | ||
| 12 | 2 files changed, 9 insertions(+), 0 deletions(-) | ||
| 13 | |||
| 14 | diff --git a/drivers/mfd/twl-core.c b/drivers/mfd/twl-core.c | ||
| 15 | index e39dbed..018ee53 100644 | ||
| 16 | --- a/drivers/mfd/twl-core.c | ||
| 17 | +++ b/drivers/mfd/twl-core.c | ||
| 18 | @@ -217,6 +217,11 @@ | ||
| 19 | |||
| 20 | /* Few power values */ | ||
| 21 | #define R_CFG_BOOT 0x05 | ||
| 22 | +#define R_GPBR1 0x0C | ||
| 23 | + | ||
| 24 | +/* MADC clock values for R_GPBR1 */ | ||
| 25 | +#define MADC_HFCLK_EN 0x80 | ||
| 26 | +#define DEFAULT_MADC_CLK_EN 0x10 | ||
| 27 | |||
| 28 | /* some fields in R_CFG_BOOT */ | ||
| 29 | #define HFCLK_FREQ_19p2_MHZ (1 << 0) | ||
| 30 | @@ -1152,6 +1157,9 @@ static void clocks_init(struct device *dev, | ||
| 31 | |||
| 32 | e |= unprotect_pm_master(); | ||
| 33 | /* effect->MADC+USB ck en */ | ||
| 34 | + if (twl_has_madc()) | ||
| 35 | + e |= twl_i2c_write_u8(TWL_MODULE_INTBR, | ||
| 36 | + MADC_HFCLK_EN | DEFAULT_MADC_CLK_EN, R_GPBR1); | ||
| 37 | e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT); | ||
| 38 | e |= protect_pm_master(); | ||
| 39 | |||
| 40 | diff --git a/include/linux/i2c/twl.h b/include/linux/i2c/twl.h | ||
| 41 | index ba4f886..6802efc 100644 | ||
| 42 | --- a/include/linux/i2c/twl.h | ||
| 43 | +++ b/include/linux/i2c/twl.h | ||
| 44 | @@ -74,6 +74,7 @@ | ||
| 45 | |||
| 46 | #define TWL_MODULE_USB TWL4030_MODULE_USB | ||
| 47 | #define TWL_MODULE_AUDIO_VOICE TWL4030_MODULE_AUDIO_VOICE | ||
| 48 | +#define TWL_MODULE_INTBR TWL4030_MODULE_INTBR | ||
| 49 | #define TWL_MODULE_PIH TWL4030_MODULE_PIH | ||
| 50 | #define TWL_MODULE_MADC TWL4030_MODULE_MADC | ||
| 51 | #define TWL_MODULE_MAIN_CHARGE TWL4030_MODULE_MAIN_CHARGE | ||
| 52 | -- | ||
| 53 | 1.7.2.5 | ||
| 54 | |||
diff --git a/recipes-kernel/linux/linux-3.0/misc/0001-compiler.h-Undef-before-redefining-__attribute_const.patch b/recipes-kernel/linux/linux-3.0/misc/0001-compiler.h-Undef-before-redefining-__attribute_const.patch deleted file mode 100644 index bf2f6e77..00000000 --- a/recipes-kernel/linux/linux-3.0/misc/0001-compiler.h-Undef-before-redefining-__attribute_const.patch +++ /dev/null | |||
| @@ -1,31 +0,0 @@ | |||
| 1 | From 6f92ab6de9d8daeb575949bbbcbc7bcdcebc60af Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Khem Raj <raj.khem@gmail.com> | ||
| 3 | Date: Thu, 5 Jan 2012 11:42:35 -0800 | ||
| 4 | Subject: [PATCH] compiler.h: Undef before redefining __attribute_const__ | ||
| 5 | |||
| 6 | This is required to avoid warnings like | ||
| 7 | util/include/linux/compiler.h:8:0: error: "__attribute_const__" redefined [-Werror] | ||
| 8 | |||
| 9 | Signed-off-by: Khem Raj <raj.khem@gmail.com> | ||
| 10 | |||
| 11 | Upstream-Status: Pending | ||
| 12 | |||
| 13 | --- | ||
| 14 | tools/perf/util/include/linux/compiler.h | 4 +++- | ||
| 15 | 1 files changed, 3 insertions(+), 1 deletions(-) | ||
| 16 | |||
| 17 | --- a/tools/perf/util/include/linux/compiler.h | ||
| 18 | +++ b/tools/perf/util/include/linux/compiler.h | ||
| 19 | @@ -4,9 +4,11 @@ | ||
| 20 | #ifndef __always_inline | ||
| 21 | #define __always_inline inline | ||
| 22 | #endif | ||
| 23 | +#undef __user | ||
| 24 | #define __user | ||
| 25 | +#undef __attribute_const__ | ||
| 26 | #define __attribute_const__ | ||
| 27 | - | ||
| 28 | +#undef __used | ||
| 29 | #define __used __attribute__((__unused__)) | ||
| 30 | |||
| 31 | #endif | ||
diff --git a/recipes-kernel/linux/linux-3.0/misc/0002-OMAP2-OPP-allow-OPP-enumeration-to-continue-if-devic.patch b/recipes-kernel/linux/linux-3.0/misc/0002-OMAP2-OPP-allow-OPP-enumeration-to-continue-if-devic.patch deleted file mode 100644 index 70193813..00000000 --- a/recipes-kernel/linux/linux-3.0/misc/0002-OMAP2-OPP-allow-OPP-enumeration-to-continue-if-devic.patch +++ /dev/null | |||
| @@ -1,43 +0,0 @@ | |||
| 1 | From c15f217f7d07c460763a092f31f61b1975a18563 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Fri, 16 Mar 2012 11:19:09 -0500 | ||
| 4 | Subject: [PATCH 2/2] OMAP2+: OPP: allow OPP enumeration to continue if device is not present | ||
| 5 | |||
| 6 | On platforms such as OMAP3, certain variants may not have IVA, SGX | ||
| 7 | or some specific component. We currently have a check to aid fixing | ||
| 8 | wrong population of OPP entries for issues such as typos. This however | ||
| 9 | causes a conflict with valid requirement where the SoC variant does | ||
| 10 | not actually have the module present. | ||
| 11 | |||
| 12 | So, reduce the severity of the print to a debug statement and skip | ||
| 13 | registering that specific OPP, but continue down the list. | ||
| 14 | |||
| 15 | Reported-by: Steve Sakoman <steve@sakoman.com> | ||
| 16 | Reported-by: Maximilian Schwerin <mvs@tigris.de> | ||
| 17 | Acked-by: Steve Sakoman <steve@sakoman.com> | ||
| 18 | Tested-by: Maximilian Schwerin <mvs@tigris.de> | ||
| 19 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 20 | --- | ||
| 21 | arch/arm/mach-omap2/opp.c | 4 ++-- | ||
| 22 | 1 files changed, 2 insertions(+), 2 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/arch/arm/mach-omap2/opp.c b/arch/arm/mach-omap2/opp.c | ||
| 25 | index ab8b35b..f111b82 100644 | ||
| 26 | --- a/arch/arm/mach-omap2/opp.c | ||
| 27 | +++ b/arch/arm/mach-omap2/opp.c | ||
| 28 | @@ -64,10 +64,10 @@ int __init omap_init_opp_table(struct omap_opp_def *opp_def, | ||
| 29 | } | ||
| 30 | oh = omap_hwmod_lookup(opp_def->hwmod_name); | ||
| 31 | if (!oh || !oh->od) { | ||
| 32 | - pr_warn("%s: no hwmod or odev for %s, [%d] " | ||
| 33 | + pr_debug("%s: no hwmod or odev for %s, [%d] " | ||
| 34 | "cannot add OPPs.\n", __func__, | ||
| 35 | opp_def->hwmod_name, i); | ||
| 36 | - return -EINVAL; | ||
| 37 | + continue; | ||
| 38 | } | ||
| 39 | dev = &oh->od->pdev.dev; | ||
| 40 | |||
| 41 | -- | ||
| 42 | 1.7.2.5 | ||
| 43 | |||
diff --git a/recipes-kernel/linux/linux-3.0/omap4/0001-OMAP-Fix-linking-error-in-twl-common.c-for-OMAP2-3-4.patch b/recipes-kernel/linux/linux-3.0/omap4/0001-OMAP-Fix-linking-error-in-twl-common.c-for-OMAP2-3-4.patch deleted file mode 100644 index 695301b2..00000000 --- a/recipes-kernel/linux/linux-3.0/omap4/0001-OMAP-Fix-linking-error-in-twl-common.c-for-OMAP2-3-4.patch +++ /dev/null | |||
| @@ -1,129 +0,0 @@ | |||
| 1 | From 44ab86140417f173835e19bed62d6832023f2914 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 3 | Date: Wed, 17 Aug 2011 16:02:55 +0200 | ||
| 4 | Subject: [PATCH] OMAP: Fix linking error in twl-common.c for OMAP2/3/4 only builds | ||
| 5 | |||
| 6 | Commit b22f954 (OMAP4: Move common twl6030 configuration to twl-common) | ||
| 7 | caused compile failures for code for OMAP arch which is not selected by | ||
| 8 | the config. | ||
| 9 | |||
| 10 | Fixes issues like: | ||
| 11 | With CONFIG_ARCH_OMAP3=y and CONFIG_ARCH_OMAP4=n, I'm getting this: | ||
| 12 | |||
| 13 | arch/arm/mach-omap2/built-in.o:(.data+0xf99c): undefined reference to `omap4430_phy_init' | ||
| 14 | arch/arm/mach-omap2/built-in.o:(.data+0xf9a0): undefined reference to `omap4430_phy_exit' | ||
| 15 | arch/arm/mach-omap2/built-in.o:(.data+0xf9a4): undefined reference to `omap4430_phy_power' | ||
| 16 | arch/arm/mach-omap2/built-in.o:(.data+0xf9a8): undefined reference to `omap4430_phy_set_clk' | ||
| 17 | arch/arm/mach-omap2/built-in.o:(.data+0xf9ac): undefined reference to `omap4430_phy_suspend' | ||
| 18 | |||
| 19 | Fix the problem by moving the code to ifdef sections for omap3 and omap4. | ||
| 20 | |||
| 21 | Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 22 | [tony@atomide.com: updated comments] | ||
| 23 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 24 | --- | ||
| 25 | arch/arm/mach-omap2/twl-common.c | 77 ++++++++++++++++++++------------------ | ||
| 26 | 1 files changed, 41 insertions(+), 36 deletions(-) | ||
| 27 | |||
| 28 | diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c | ||
| 29 | index 3aaa46f..58409c0 100644 | ||
| 30 | --- a/arch/arm/mach-omap2/twl-common.c | ||
| 31 | +++ b/arch/arm/mach-omap2/twl-common.c | ||
| 32 | @@ -48,14 +48,7 @@ void __init omap_pmic_init(int bus, u32 clkrate, | ||
| 33 | omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); | ||
| 34 | } | ||
| 35 | |||
| 36 | -static struct twl4030_usb_data omap4_usb_pdata = { | ||
| 37 | - .phy_init = omap4430_phy_init, | ||
| 38 | - .phy_exit = omap4430_phy_exit, | ||
| 39 | - .phy_power = omap4430_phy_power, | ||
| 40 | - .phy_set_clock = omap4430_phy_set_clk, | ||
| 41 | - .phy_suspend = omap4430_phy_suspend, | ||
| 42 | -}; | ||
| 43 | - | ||
| 44 | +#if defined(CONFIG_ARCH_OMAP3) | ||
| 45 | static struct twl4030_usb_data omap3_usb_pdata = { | ||
| 46 | .usb_mode = T2_USB_MODE_ULPI, | ||
| 47 | }; | ||
| 48 | @@ -122,6 +115,45 @@ static struct regulator_init_data omap3_vpll2_idata = { | ||
| 49 | .consumer_supplies = omap3_vpll2_supplies, | ||
| 50 | }; | ||
| 51 | |||
| 52 | +void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, | ||
| 53 | + u32 pdata_flags, u32 regulators_flags) | ||
| 54 | +{ | ||
| 55 | + if (!pmic_data->irq_base) | ||
| 56 | + pmic_data->irq_base = TWL4030_IRQ_BASE; | ||
| 57 | + if (!pmic_data->irq_end) | ||
| 58 | + pmic_data->irq_end = TWL4030_IRQ_END; | ||
| 59 | + | ||
| 60 | + /* Common platform data configurations */ | ||
| 61 | + if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) | ||
| 62 | + pmic_data->usb = &omap3_usb_pdata; | ||
| 63 | + | ||
| 64 | + if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) | ||
| 65 | + pmic_data->bci = &omap3_bci_pdata; | ||
| 66 | + | ||
| 67 | + if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc) | ||
| 68 | + pmic_data->madc = &omap3_madc_pdata; | ||
| 69 | + | ||
| 70 | + if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec) | ||
| 71 | + pmic_data->codec = &omap3_codec_pdata; | ||
| 72 | + | ||
| 73 | + /* Common regulator configurations */ | ||
| 74 | + if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) | ||
| 75 | + pmic_data->vdac = &omap3_vdac_idata; | ||
| 76 | + | ||
| 77 | + if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2) | ||
| 78 | + pmic_data->vpll2 = &omap3_vpll2_idata; | ||
| 79 | +} | ||
| 80 | +#endif /* CONFIG_ARCH_OMAP3 */ | ||
| 81 | + | ||
| 82 | +#if defined(CONFIG_ARCH_OMAP4) | ||
| 83 | +static struct twl4030_usb_data omap4_usb_pdata = { | ||
| 84 | + .phy_init = omap4430_phy_init, | ||
| 85 | + .phy_exit = omap4430_phy_exit, | ||
| 86 | + .phy_power = omap4430_phy_power, | ||
| 87 | + .phy_set_clock = omap4430_phy_set_clk, | ||
| 88 | + .phy_suspend = omap4430_phy_suspend, | ||
| 89 | +}; | ||
| 90 | + | ||
| 91 | static struct regulator_init_data omap4_vdac_idata = { | ||
| 92 | .constraints = { | ||
| 93 | .min_uV = 1800000, | ||
| 94 | @@ -274,31 +306,4 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, | ||
| 95 | pmic_data->clk32kg = &omap4_clk32kg_idata; | ||
| 96 | } | ||
| 97 | |||
| 98 | -void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, | ||
| 99 | - u32 pdata_flags, u32 regulators_flags) | ||
| 100 | -{ | ||
| 101 | - if (!pmic_data->irq_base) | ||
| 102 | - pmic_data->irq_base = TWL4030_IRQ_BASE; | ||
| 103 | - if (!pmic_data->irq_end) | ||
| 104 | - pmic_data->irq_end = TWL4030_IRQ_END; | ||
| 105 | - | ||
| 106 | - /* Common platform data configurations */ | ||
| 107 | - if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) | ||
| 108 | - pmic_data->usb = &omap3_usb_pdata; | ||
| 109 | - | ||
| 110 | - if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) | ||
| 111 | - pmic_data->bci = &omap3_bci_pdata; | ||
| 112 | - | ||
| 113 | - if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc) | ||
| 114 | - pmic_data->madc = &omap3_madc_pdata; | ||
| 115 | - | ||
| 116 | - if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec) | ||
| 117 | - pmic_data->codec = &omap3_codec_pdata; | ||
| 118 | - | ||
| 119 | - /* Common regulator configurations */ | ||
| 120 | - if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) | ||
| 121 | - pmic_data->vdac = &omap3_vdac_idata; | ||
| 122 | - | ||
| 123 | - if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2) | ||
| 124 | - pmic_data->vpll2 = &omap3_vpll2_idata; | ||
| 125 | -} | ||
| 126 | +#endif /* CONFIG_ARCH_OMAP4 */ | ||
| 127 | -- | ||
| 128 | 1.7.2.5 | ||
| 129 | |||
diff --git a/recipes-kernel/linux/linux-3.0/patch.sh b/recipes-kernel/linux/linux-3.0/patch.sh deleted file mode 100755 index 31bdfe18..00000000 --- a/recipes-kernel/linux/linux-3.0/patch.sh +++ /dev/null | |||
| @@ -1,29 +0,0 @@ | |||
| 1 | #!/bin/bash | ||
| 2 | # (c) 2009 - 2012 Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | # This script will take a set of directories with patches and make a git tree out of it | ||
| 4 | # After all the patches are applied it will output a SRC_URI fragment you can copy/paste into a recipe | ||
| 5 | set -e | ||
| 6 | |||
| 7 | TAG="v3.0.17" | ||
| 8 | EXTRATAG="" | ||
| 9 | PATCHPATH=$(dirname $0) | ||
| 10 | |||
| 11 | git am --abort || echo "Do you need to make sure the patches apply cleanly first?" | ||
| 12 | git reset --hard ${TAG} | ||
| 13 | rm export -rf | ||
| 14 | |||
| 15 | previous=${TAG} | ||
| 16 | PATCHSET="pm-wip/voltdm pm-wip/cpufreq beagle madc sakoman sgx ulcd omap4 misc usb" | ||
| 17 | |||
| 18 | # apply patches | ||
| 19 | for patchset in ${PATCHSET} ; do | ||
| 20 | git am $PATCHPATH/$patchset/* | ||
| 21 | git tag "${TAG}-${patchset}${EXTRATAG}" -f | ||
| 22 | done | ||
| 23 | |||
| 24 | # export patches and output SRC_URI for them | ||
| 25 | for patchset in ${PATCHSET} ; do | ||
| 26 | mkdir export/$patchset -p | ||
| 27 | ( cd export/$patchset && git format-patch ${previous}..${TAG}-${patchset}${EXTRATAG} >& /dev/null && for i in *.patch ; do echo " file://${patchset}/$i \\" ; done ) | ||
| 28 | previous=${TAG}-${patchset}${EXTRATAG} | ||
| 29 | done | ||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0001-PM-OPP-introduce-function-to-free-cpufreq-table.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0001-PM-OPP-introduce-function-to-free-cpufreq-table.patch deleted file mode 100644 index 5b28c5fb..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0001-PM-OPP-introduce-function-to-free-cpufreq-table.patch +++ /dev/null | |||
| @@ -1,84 +0,0 @@ | |||
| 1 | From 3dfeff8f9ad8fa7e6e434eb4b450a11ab79131da Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Wed, 25 May 2011 00:43:26 -0700 | ||
| 4 | Subject: [PATCH 01/19] PM: OPP: introduce function to free cpufreq table | ||
| 5 | |||
| 6 | cpufreq table allocated by opp_init_cpufreq_table is better | ||
| 7 | freed by OPP layer itself. This allows future modifications to | ||
| 8 | the table handling to be transparent to the users. | ||
| 9 | |||
| 10 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 11 | Acked-by: Kevin Hilman <khilman@ti.com> | ||
| 12 | --- | ||
| 13 | Documentation/power/opp.txt | 2 ++ | ||
| 14 | drivers/base/power/opp.c | 17 +++++++++++++++++ | ||
| 15 | include/linux/opp.h | 8 ++++++++ | ||
| 16 | 3 files changed, 27 insertions(+), 0 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/Documentation/power/opp.txt b/Documentation/power/opp.txt | ||
| 19 | index 5ae70a12..3035d00 100644 | ||
| 20 | --- a/Documentation/power/opp.txt | ||
| 21 | +++ b/Documentation/power/opp.txt | ||
| 22 | @@ -321,6 +321,8 @@ opp_init_cpufreq_table - cpufreq framework typically is initialized with | ||
| 23 | addition to CONFIG_PM as power management feature is required to | ||
| 24 | dynamically scale voltage and frequency in a system. | ||
| 25 | |||
| 26 | +opp_free_cpufreq_table - Free up the table allocated by opp_init_cpufreq_table | ||
| 27 | + | ||
| 28 | 7. Data Structures | ||
| 29 | ================== | ||
| 30 | Typically an SoC contains multiple voltage domains which are variable. Each | ||
| 31 | diff --git a/drivers/base/power/opp.c b/drivers/base/power/opp.c | ||
| 32 | index 56a6899..5cc1232 100644 | ||
| 33 | --- a/drivers/base/power/opp.c | ||
| 34 | +++ b/drivers/base/power/opp.c | ||
| 35 | @@ -625,4 +625,21 @@ int opp_init_cpufreq_table(struct device *dev, | ||
| 36 | |||
| 37 | return 0; | ||
| 38 | } | ||
| 39 | + | ||
| 40 | +/** | ||
| 41 | + * opp_free_cpufreq_table() - free the cpufreq table | ||
| 42 | + * @dev: device for which we do this operation | ||
| 43 | + * @table: table to free | ||
| 44 | + * | ||
| 45 | + * Free up the table allocated by opp_init_cpufreq_table | ||
| 46 | + */ | ||
| 47 | +void opp_free_cpufreq_table(struct device *dev, | ||
| 48 | + struct cpufreq_frequency_table **table) | ||
| 49 | +{ | ||
| 50 | + if (!table) | ||
| 51 | + return; | ||
| 52 | + | ||
| 53 | + kfree(*table); | ||
| 54 | + *table = NULL; | ||
| 55 | +} | ||
| 56 | #endif /* CONFIG_CPU_FREQ */ | ||
| 57 | diff --git a/include/linux/opp.h b/include/linux/opp.h | ||
| 58 | index 5449945..7020e97 100644 | ||
| 59 | --- a/include/linux/opp.h | ||
| 60 | +++ b/include/linux/opp.h | ||
| 61 | @@ -94,12 +94,20 @@ static inline int opp_disable(struct device *dev, unsigned long freq) | ||
| 62 | #if defined(CONFIG_CPU_FREQ) && defined(CONFIG_PM_OPP) | ||
| 63 | int opp_init_cpufreq_table(struct device *dev, | ||
| 64 | struct cpufreq_frequency_table **table); | ||
| 65 | +void opp_free_cpufreq_table(struct device *dev, | ||
| 66 | + struct cpufreq_frequency_table **table); | ||
| 67 | #else | ||
| 68 | static inline int opp_init_cpufreq_table(struct device *dev, | ||
| 69 | struct cpufreq_frequency_table **table) | ||
| 70 | { | ||
| 71 | return -EINVAL; | ||
| 72 | } | ||
| 73 | + | ||
| 74 | +static inline | ||
| 75 | +void opp_free_cpufreq_table(struct device *dev, | ||
| 76 | + struct cpufreq_frequency_table **table) | ||
| 77 | +{ | ||
| 78 | +} | ||
| 79 | #endif /* CONFIG_CPU_FREQ */ | ||
| 80 | |||
| 81 | #endif /* __LINUX_OPP_H__ */ | ||
| 82 | -- | ||
| 83 | 1.7.2.5 | ||
| 84 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0002-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0002-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch deleted file mode 100644 index f5fd1559..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0002-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch +++ /dev/null | |||
| @@ -1,28 +0,0 @@ | |||
| 1 | From bc2810462308f15ff90841453961200bf90a814d Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> | ||
| 3 | Date: Wed, 11 Aug 2010 17:02:43 -0700 | ||
| 4 | Subject: [PATCH 02/19] OMAP: CPUfreq: ensure driver initializes after cpufreq framework and governors | ||
| 5 | |||
| 6 | Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> | ||
| 7 | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> | ||
| 8 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 9 | --- | ||
| 10 | arch/arm/plat-omap/cpu-omap.c | 2 +- | ||
| 11 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 12 | |||
| 13 | diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c | ||
| 14 | index da4f68d..cd09d4b 100644 | ||
| 15 | --- a/arch/arm/plat-omap/cpu-omap.c | ||
| 16 | +++ b/arch/arm/plat-omap/cpu-omap.c | ||
| 17 | @@ -160,7 +160,7 @@ static int __init omap_cpufreq_init(void) | ||
| 18 | return cpufreq_register_driver(&omap_driver); | ||
| 19 | } | ||
| 20 | |||
| 21 | -arch_initcall(omap_cpufreq_init); | ||
| 22 | +late_initcall(omap_cpufreq_init); | ||
| 23 | |||
| 24 | /* | ||
| 25 | * if ever we want to remove this, upon cleanup call: | ||
| 26 | -- | ||
| 27 | 1.7.2.5 | ||
| 28 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0003-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0003-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch deleted file mode 100644 index 4805b2ac..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0003-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch +++ /dev/null | |||
| @@ -1,32 +0,0 @@ | |||
| 1 | From be4be1a11360222f0b0add1dadfeaf76af199990 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@deeprootsystems.com> | ||
| 3 | Date: Wed, 11 Aug 2010 17:05:38 -0700 | ||
| 4 | Subject: [PATCH 03/19] OMAP: CPUfreq: ensure policy is fully initialized | ||
| 5 | |||
| 6 | Ensure policy min/max/cur values are initialized when OMAP | ||
| 7 | CPUfreq driver starts. | ||
| 8 | |||
| 9 | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> | ||
| 10 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 11 | --- | ||
| 12 | arch/arm/plat-omap/cpu-omap.c | 4 ++++ | ||
| 13 | 1 files changed, 4 insertions(+), 0 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c | ||
| 16 | index cd09d4b..1b36664 100644 | ||
| 17 | --- a/arch/arm/plat-omap/cpu-omap.c | ||
| 18 | +++ b/arch/arm/plat-omap/cpu-omap.c | ||
| 19 | @@ -126,6 +126,10 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 20 | VERY_HI_RATE) / 1000; | ||
| 21 | } | ||
| 22 | |||
| 23 | + policy->min = policy->cpuinfo.min_freq; | ||
| 24 | + policy->max = policy->cpuinfo.max_freq; | ||
| 25 | + policy->cur = omap_getspeed(0); | ||
| 26 | + | ||
| 27 | /* FIXME: what's the actual transition time? */ | ||
| 28 | policy->cpuinfo.transition_latency = 300 * 1000; | ||
| 29 | |||
| 30 | -- | ||
| 31 | 1.7.2.5 | ||
| 32 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0004-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0004-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch deleted file mode 100644 index 1ec45936..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0004-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch +++ /dev/null | |||
| @@ -1,264 +0,0 @@ | |||
| 1 | From fcd436dfb1c2d8e4866001700a5bba2a1d4079aa Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Rajendra Nayak <rnayak@ti.com> | ||
| 3 | Date: Mon, 10 Nov 2008 17:00:25 +0530 | ||
| 4 | Subject: [PATCH 04/19] OMAP3 PM: CPUFreq driver for OMAP3 | ||
| 5 | |||
| 6 | CPUFreq driver for OMAP3 | ||
| 7 | |||
| 8 | With additional fixes and cleanups from Tero Kristo: | ||
| 9 | - Fix rate calculation bug in omap3_select_table_rate | ||
| 10 | - Refreshed DVFS VDD1 control against latest clock fw | ||
| 11 | |||
| 12 | Signed-off-by: Tero Kristo <tero.kristo@nokia.com> | ||
| 13 | Signed-off-by: Rajendra Nayak <rnayak@ti.com> | ||
| 14 | |||
| 15 | OMAP3: PM: CPUFreq: Fix omap_getspeed. | ||
| 16 | |||
| 17 | Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> | ||
| 18 | |||
| 19 | Make sure omap cpufreq driver initializes after cpufreq framework and governors | ||
| 20 | |||
| 21 | Signed-off-by: Peter 'p2' De Schrijver <peter.de-schrijver@nokia.com> | ||
| 22 | |||
| 23 | merge: CPUFreq: remove obsolete funcs | ||
| 24 | |||
| 25 | OMAP3 clock: Update cpufreq driver | ||
| 26 | |||
| 27 | This patch removes all refrences to virtual clock | ||
| 28 | nodes in CPUFreq driver. | ||
| 29 | |||
| 30 | Signed-off-by: Rajendra Nayak <rnayak@ti.com> | ||
| 31 | Signed-off-by: Tero Kristo <tero.kristo@nokia.com> | ||
| 32 | Signed-off-by: Jean Pihet <jpihet@mvista.com> | ||
| 33 | |||
| 34 | PM: Prevent direct cpufreq scaling during initialization | ||
| 35 | |||
| 36 | It is seen that the OMAP specific cpufreq initialization code tries to | ||
| 37 | scale the MPU frequency to the highest possible without taking care of | ||
| 38 | the voltage level. On power on reset the power IC does not provide the | ||
| 39 | necessary voltage for the highest available MPU frequency (that would | ||
| 40 | satisfy all Si families). This potentially is an window of opportunity | ||
| 41 | for things to go wrong. | ||
| 42 | |||
| 43 | Signed-off-by: Romit Dasgupta <romit@ti.com> | ||
| 44 | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> | ||
| 45 | |||
| 46 | OMAP3: PM: enable 600MHz (overdrive) OPP | ||
| 47 | |||
| 48 | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> | ||
| 49 | |||
| 50 | omap3: introduce cpufreq | ||
| 51 | |||
| 52 | OMAP OPP layer functions now have dependencies of CONFIG_CPU_FREQ only. | ||
| 53 | |||
| 54 | With this patch, omap opp layer now has its compilation flags | ||
| 55 | bound to CONFIG_CPU_FREQ. Also its code has been removed from pm34xx.c. | ||
| 56 | |||
| 57 | A new file has been created to contain cpu freq code related to | ||
| 58 | OMAP3: cpufreq34xx.c | ||
| 59 | |||
| 60 | OMAP34xx and OMAP36xx family OPPs are made available | ||
| 61 | |||
| 62 | Signed-off-by: Eduardo Valentin <eduardo.valentin@nokia.com> | ||
| 63 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 64 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 65 | Signed-off-by: Vishwanath BS <vishwanath.bs@ti.com> | ||
| 66 | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> | ||
| 67 | Signed-off-by: Romit Dasgupta <romit@ti.com> | ||
| 68 | Signed-off-by: Rajendra Nayak <rnayak@ti.com> | ||
| 69 | |||
| 70 | omap3: cpufreq: allow default opp table init | ||
| 71 | |||
| 72 | For board files which choose to override the defaults, the existing | ||
| 73 | mechanism will work, for boards that would like to work with defaults, | ||
| 74 | allow init_common_hw to call init_opp_table to initialize if not | ||
| 75 | already initialized. this will allow all omap boards which have opp | ||
| 76 | tables predefined for a silicon to use the same. | ||
| 77 | |||
| 78 | Originally reported for overo: | ||
| 79 | http://marc.info/?t=127265269400004&r=1&w=2 | ||
| 80 | |||
| 81 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 82 | Reported-by: Peter Tseng <tsenpet09@gmail.com> | ||
| 83 | Cc: Cliff Brake <cliff.brake@gmail.com> | ||
| 84 | Cc: Kevin Hilman <khilman@deeprootsystems.com> | ||
| 85 | |||
| 86 | OMAP2: update OPP data to be device based | ||
| 87 | |||
| 88 | Cc: Nishanth Menon <nm@ti.com> | ||
| 89 | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> | ||
| 90 | |||
| 91 | OMAP3: CPUfreq: update to device-based OPP API | ||
| 92 | |||
| 93 | Update usage of OPP API to use new device-based API. This requires | ||
| 94 | getting the 'struct device' for the MPU and using that with the OPP | ||
| 95 | API. | ||
| 96 | |||
| 97 | Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> | ||
| 98 | |||
| 99 | omap3: opp: make independent of cpufreq | ||
| 100 | |||
| 101 | Make opp3xx data which is registered with the opp layer | ||
| 102 | dependent purely on CONFIG_PM as opp layer and pm.c users | ||
| 103 | are CONFIG_PM dependent not cpufreq dependent. | ||
| 104 | so we rename the data definition to opp3xxx_data.c (inline with what | ||
| 105 | we have for omap2), also move the build definition to be under | ||
| 106 | the existing CONFIG_PM build instead of CPUFREQ. | ||
| 107 | |||
| 108 | Cc: Eduardo Valentin <eduardo.valentin@nokia.com> | ||
| 109 | Cc: Kevin Hilman <khilman@deeprootsystems.com> | ||
| 110 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 111 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 112 | Cc: Sanjeev Premi <premi@ti.com> | ||
| 113 | Cc: Thara Gopinath <thara@ti.com> | ||
| 114 | Cc: Tony Lindgren <tony@atomide.com> | ||
| 115 | |||
| 116 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 117 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 118 | --- | ||
| 119 | arch/arm/mach-omap2/clock.h | 14 +++++++++++++- | ||
| 120 | arch/arm/mach-omap2/clock34xx.c | 2 ++ | ||
| 121 | arch/arm/plat-omap/cpu-omap.c | 34 +++++++++++++++++++++++++++++++--- | ||
| 122 | 3 files changed, 46 insertions(+), 4 deletions(-) | ||
| 123 | |||
| 124 | diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h | ||
| 125 | index 48ac568..8bad1c6 100644 | ||
| 126 | --- a/arch/arm/mach-omap2/clock.h | ||
| 127 | +++ b/arch/arm/mach-omap2/clock.h | ||
| 128 | @@ -144,7 +144,9 @@ extern const struct clksel_rate gpt_sys_rates[]; | ||
| 129 | extern const struct clksel_rate gfx_l3_rates[]; | ||
| 130 | extern const struct clksel_rate dsp_ick_rates[]; | ||
| 131 | |||
| 132 | -#if defined(CONFIG_ARCH_OMAP2) && defined(CONFIG_CPU_FREQ) | ||
| 133 | +#ifdef CONFIG_CPU_FREQ | ||
| 134 | + | ||
| 135 | +#ifdef CONFIG_ARCH_OMAP2 | ||
| 136 | extern void omap2_clk_init_cpufreq_table(struct cpufreq_frequency_table **table); | ||
| 137 | extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table); | ||
| 138 | #else | ||
| 139 | @@ -152,6 +154,16 @@ extern void omap2_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table) | ||
| 140 | #define omap2_clk_exit_cpufreq_table 0 | ||
| 141 | #endif | ||
| 142 | |||
| 143 | +#ifdef CONFIG_ARCH_OMAP3 | ||
| 144 | +extern void omap3_clk_init_cpufreq_table(struct cpufreq_frequency_table **table); | ||
| 145 | +extern void omap3_clk_exit_cpufreq_table(struct cpufreq_frequency_table **table); | ||
| 146 | +#else | ||
| 147 | +#define omap3_clk_init_cpufreq_table 0 | ||
| 148 | +#define omap3_clk_exit_cpufreq_table 0 | ||
| 149 | +#endif | ||
| 150 | + | ||
| 151 | +#endif /* CONFIG_CPU_FREQ */ | ||
| 152 | + | ||
| 153 | extern const struct clkops clkops_omap2_iclk_dflt_wait; | ||
| 154 | extern const struct clkops clkops_omap2_iclk_dflt; | ||
| 155 | extern const struct clkops clkops_omap2_iclk_idle_only; | ||
| 156 | diff --git a/arch/arm/mach-omap2/clock34xx.c b/arch/arm/mach-omap2/clock34xx.c | ||
| 157 | index 1fc96b9..119e135 100644 | ||
| 158 | --- a/arch/arm/mach-omap2/clock34xx.c | ||
| 159 | +++ b/arch/arm/mach-omap2/clock34xx.c | ||
| 160 | @@ -20,6 +20,8 @@ | ||
| 161 | #include <linux/kernel.h> | ||
| 162 | #include <linux/clk.h> | ||
| 163 | #include <linux/io.h> | ||
| 164 | +#include <linux/err.h> | ||
| 165 | +#include <linux/cpufreq.h> | ||
| 166 | |||
| 167 | #include <plat/clock.h> | ||
| 168 | |||
| 169 | diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c | ||
| 170 | index 1b36664..f0f9430 100644 | ||
| 171 | --- a/arch/arm/plat-omap/cpu-omap.c | ||
| 172 | +++ b/arch/arm/plat-omap/cpu-omap.c | ||
| 173 | @@ -8,6 +8,10 @@ | ||
| 174 | * | ||
| 175 | * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King | ||
| 176 | * | ||
| 177 | + * Copyright (C) 2007-2008 Texas Instruments, Inc. | ||
| 178 | + * Updated to support OMAP3 | ||
| 179 | + * Rajendra Nayak <rnayak@ti.com> | ||
| 180 | + * | ||
| 181 | * This program is free software; you can redistribute it and/or modify | ||
| 182 | * it under the terms of the GNU General Public License version 2 as | ||
| 183 | * published by the Free Software Foundation. | ||
| 184 | @@ -26,12 +30,19 @@ | ||
| 185 | #include <plat/clock.h> | ||
| 186 | #include <asm/system.h> | ||
| 187 | |||
| 188 | +#if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) | ||
| 189 | +#include <plat/omap-pm.h> | ||
| 190 | +#include <plat/opp.h> | ||
| 191 | +#endif | ||
| 192 | + | ||
| 193 | #define VERY_HI_RATE 900000000 | ||
| 194 | |||
| 195 | static struct cpufreq_frequency_table *freq_table; | ||
| 196 | |||
| 197 | #ifdef CONFIG_ARCH_OMAP1 | ||
| 198 | #define MPU_CLK "mpu" | ||
| 199 | +#elif CONFIG_ARCH_OMAP3 | ||
| 200 | +#define MPU_CLK "arm_fck" | ||
| 201 | #else | ||
| 202 | #define MPU_CLK "virt_prcm_set" | ||
| 203 | #endif | ||
| 204 | @@ -73,7 +84,13 @@ static int omap_target(struct cpufreq_policy *policy, | ||
| 205 | unsigned int target_freq, | ||
| 206 | unsigned int relation) | ||
| 207 | { | ||
| 208 | +#ifdef CONFIG_ARCH_OMAP1 | ||
| 209 | struct cpufreq_freqs freqs; | ||
| 210 | +#endif | ||
| 211 | +#if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) | ||
| 212 | + unsigned long freq; | ||
| 213 | + struct device *mpu_dev = omap2_get_mpuss_device(); | ||
| 214 | +#endif | ||
| 215 | int ret = 0; | ||
| 216 | |||
| 217 | /* Ensure desired rate is within allowed range. Some govenors | ||
| 218 | @@ -83,13 +100,13 @@ static int omap_target(struct cpufreq_policy *policy, | ||
| 219 | if (target_freq > policy->max) | ||
| 220 | target_freq = policy->max; | ||
| 221 | |||
| 222 | +#ifdef CONFIG_ARCH_OMAP1 | ||
| 223 | freqs.old = omap_getspeed(0); | ||
| 224 | freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; | ||
| 225 | freqs.cpu = 0; | ||
| 226 | |||
| 227 | if (freqs.old == freqs.new) | ||
| 228 | return ret; | ||
| 229 | - | ||
| 230 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
| 231 | #ifdef CONFIG_CPU_FREQ_DEBUG | ||
| 232 | printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n", | ||
| 233 | @@ -97,7 +114,11 @@ static int omap_target(struct cpufreq_policy *policy, | ||
| 234 | #endif | ||
| 235 | ret = clk_set_rate(mpu_clk, freqs.new * 1000); | ||
| 236 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
| 237 | - | ||
| 238 | +#elif defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) | ||
| 239 | + freq = target_freq * 1000; | ||
| 240 | + if (opp_find_freq_ceil(mpu_dev, &freq)) | ||
| 241 | + omap_pm_cpu_set_freq(freq); | ||
| 242 | +#endif | ||
| 243 | return ret; | ||
| 244 | } | ||
| 245 | |||
| 246 | @@ -114,7 +135,14 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 247 | |||
| 248 | policy->cur = policy->min = policy->max = omap_getspeed(0); | ||
| 249 | |||
| 250 | - clk_init_cpufreq_table(&freq_table); | ||
| 251 | + if (!cpu_is_omap34xx()) { | ||
| 252 | + clk_init_cpufreq_table(&freq_table); | ||
| 253 | + } else { | ||
| 254 | + struct device *mpu_dev = omap2_get_mpuss_device(); | ||
| 255 | + | ||
| 256 | + opp_init_cpufreq_table(mpu_dev, &freq_table); | ||
| 257 | + } | ||
| 258 | + | ||
| 259 | if (freq_table) { | ||
| 260 | result = cpufreq_frequency_table_cpuinfo(policy, freq_table); | ||
| 261 | if (!result) | ||
| 262 | -- | ||
| 263 | 1.7.2.5 | ||
| 264 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0005-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0005-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch deleted file mode 100644 index 55273564..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0005-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch +++ /dev/null | |||
| @@ -1,33 +0,0 @@ | |||
| 1 | From 62275cbaac608a17fe5ff0437e0950667927e5e8 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Silesh C V <silesh@ti.com> | ||
| 3 | Date: Wed, 29 Sep 2010 14:52:54 +0530 | ||
| 4 | Subject: [PATCH 05/19] OMAP: PM: CPUFREQ: Fix conditional compilation | ||
| 5 | |||
| 6 | Fix conditional compilation. A conditional expresiion | ||
| 7 | should follow "#elif", in this case #elif clause should | ||
| 8 | check whether CONFIG_ARCH_OMAP3 is defined or not | ||
| 9 | (ie. defined(CONFIG_ARCH_OMAP3)) rather than checking for | ||
| 10 | the value of the macro. | ||
| 11 | |||
| 12 | Signed-off-by: Silesh C V <silesh@ti.com> | ||
| 13 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 14 | --- | ||
| 15 | arch/arm/plat-omap/cpu-omap.c | 2 +- | ||
| 16 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c | ||
| 19 | index f0f9430..c3ac065 100644 | ||
| 20 | --- a/arch/arm/plat-omap/cpu-omap.c | ||
| 21 | +++ b/arch/arm/plat-omap/cpu-omap.c | ||
| 22 | @@ -41,7 +41,7 @@ static struct cpufreq_frequency_table *freq_table; | ||
| 23 | |||
| 24 | #ifdef CONFIG_ARCH_OMAP1 | ||
| 25 | #define MPU_CLK "mpu" | ||
| 26 | -#elif CONFIG_ARCH_OMAP3 | ||
| 27 | +#elif defined(CONFIG_ARCH_OMAP3) | ||
| 28 | #define MPU_CLK "arm_fck" | ||
| 29 | #else | ||
| 30 | #define MPU_CLK "virt_prcm_set" | ||
| 31 | -- | ||
| 32 | 1.7.2.5 | ||
| 33 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0006-cpufreq-fixup-after-new-OPP-layer-merged.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0006-cpufreq-fixup-after-new-OPP-layer-merged.patch deleted file mode 100644 index 3d8d5726..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0006-cpufreq-fixup-after-new-OPP-layer-merged.patch +++ /dev/null | |||
| @@ -1,34 +0,0 @@ | |||
| 1 | From ca2d4d46267668daccc156084f8ad6e74a52f392 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@deeprootsystems.com> | ||
| 3 | Date: Tue, 16 Nov 2010 11:48:41 -0800 | ||
| 4 | Subject: [PATCH 06/19] cpufreq: fixup after new OPP layer merged | ||
| 5 | |||
| 6 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 7 | --- | ||
| 8 | arch/arm/plat-omap/cpu-omap.c | 3 ++- | ||
| 9 | 1 files changed, 2 insertions(+), 1 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c | ||
| 12 | index c3ac065..9cd2709 100644 | ||
| 13 | --- a/arch/arm/plat-omap/cpu-omap.c | ||
| 14 | +++ b/arch/arm/plat-omap/cpu-omap.c | ||
| 15 | @@ -25,6 +25,7 @@ | ||
| 16 | #include <linux/err.h> | ||
| 17 | #include <linux/clk.h> | ||
| 18 | #include <linux/io.h> | ||
| 19 | +#include <linux/opp.h> | ||
| 20 | |||
| 21 | #include <mach/hardware.h> | ||
| 22 | #include <plat/clock.h> | ||
| 23 | @@ -32,7 +33,7 @@ | ||
| 24 | |||
| 25 | #if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) | ||
| 26 | #include <plat/omap-pm.h> | ||
| 27 | -#include <plat/opp.h> | ||
| 28 | +#include <plat/common.h> | ||
| 29 | #endif | ||
| 30 | |||
| 31 | #define VERY_HI_RATE 900000000 | ||
| 32 | -- | ||
| 33 | 1.7.2.5 | ||
| 34 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0007-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0007-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch deleted file mode 100644 index 25a9de92..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0007-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch +++ /dev/null | |||
| @@ -1,673 +0,0 @@ | |||
| 1 | From 972aa97a8a36946ebe2274e27c317e524de2cd5c Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 3 | Date: Mon, 14 Mar 2011 17:08:48 +0530 | ||
| 4 | Subject: [PATCH 07/19] OMAP: cpufreq: Split OMAP1 and OMAP2PLUS CPUfreq drivers. | ||
| 5 | |||
| 6 | This patch is an attempt to cleanup the #ifdeferry in the | ||
| 7 | omap CPUfreq drivers. | ||
| 8 | |||
| 9 | The split betwenn OMAP1 and OMAP2PLUS is logical because | ||
| 10 | - OMAP1 doesn't support opp layer. | ||
| 11 | - OMAP1 build is seperate from omap2plus. | ||
| 12 | |||
| 13 | Includes minor header/copyright updates reported by Todd Poynor. | ||
| 14 | |||
| 15 | Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 16 | Cc: Kevin Hilman <khilman@ti.com> | ||
| 17 | Cc: Vishwanath BS <vishwanath.bs@ti.com> | ||
| 18 | Cc: Todd Poynor <toddpoynor@google.com> | ||
| 19 | Cc: Nishanth Menon <nm@ti.com> | ||
| 20 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 21 | --- | ||
| 22 | arch/arm/mach-omap1/Makefile | 3 + | ||
| 23 | arch/arm/mach-omap1/omap1-cpufreq.c | 175 ++++++++++++++++++++++++++ | ||
| 24 | arch/arm/mach-omap2/Makefile | 3 + | ||
| 25 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 201 ++++++++++++++++++++++++++++++ | ||
| 26 | arch/arm/plat-omap/Makefile | 1 - | ||
| 27 | arch/arm/plat-omap/cpu-omap.c | 204 ------------------------------- | ||
| 28 | 6 files changed, 382 insertions(+), 205 deletions(-) | ||
| 29 | create mode 100644 arch/arm/mach-omap1/omap1-cpufreq.c | ||
| 30 | create mode 100644 arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 31 | delete mode 100644 arch/arm/plat-omap/cpu-omap.c | ||
| 32 | |||
| 33 | diff --git a/arch/arm/mach-omap1/Makefile b/arch/arm/mach-omap1/Makefile | ||
| 34 | index 5b114d1..9600410 100644 | ||
| 35 | --- a/arch/arm/mach-omap1/Makefile | ||
| 36 | +++ b/arch/arm/mach-omap1/Makefile | ||
| 37 | @@ -10,6 +10,9 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o | ||
| 38 | |||
| 39 | obj-$(CONFIG_OMAP_32K_TIMER) += timer32k.o | ||
| 40 | |||
| 41 | +# CPUFREQ driver | ||
| 42 | +obj-$(CONFIG_CPU_FREQ) += omap1-cpufreq.o | ||
| 43 | + | ||
| 44 | # Power Management | ||
| 45 | obj-$(CONFIG_PM) += pm.o sleep.o | ||
| 46 | |||
| 47 | diff --git a/arch/arm/mach-omap1/omap1-cpufreq.c b/arch/arm/mach-omap1/omap1-cpufreq.c | ||
| 48 | new file mode 100644 | ||
| 49 | index 0000000..7c5216e | ||
| 50 | --- /dev/null | ||
| 51 | +++ b/arch/arm/mach-omap1/omap1-cpufreq.c | ||
| 52 | @@ -0,0 +1,175 @@ | ||
| 53 | +/* | ||
| 54 | + * OMAP1 cpufreq driver | ||
| 55 | + * | ||
| 56 | + * CPU frequency scaling for OMAP | ||
| 57 | + * | ||
| 58 | + * Copyright (C) 2005 Nokia Corporation | ||
| 59 | + * Written by Tony Lindgren <tony@atomide.com> | ||
| 60 | + * | ||
| 61 | + * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King | ||
| 62 | + * | ||
| 63 | + * Copyright (C) 2007-2008 Texas Instruments, Inc. | ||
| 64 | + * Rajendra Nayak <rnayak@ti.com> | ||
| 65 | + * | ||
| 66 | + * This program is free software; you can redistribute it and/or modify | ||
| 67 | + * it under the terms of the GNU General Public License version 2 as | ||
| 68 | + * published by the Free Software Foundation. | ||
| 69 | + */ | ||
| 70 | +#include <linux/types.h> | ||
| 71 | +#include <linux/kernel.h> | ||
| 72 | +#include <linux/sched.h> | ||
| 73 | +#include <linux/cpufreq.h> | ||
| 74 | +#include <linux/delay.h> | ||
| 75 | +#include <linux/init.h> | ||
| 76 | +#include <linux/err.h> | ||
| 77 | +#include <linux/clk.h> | ||
| 78 | +#include <linux/io.h> | ||
| 79 | +#include <linux/opp.h> | ||
| 80 | + | ||
| 81 | +#include <asm/system.h> | ||
| 82 | + | ||
| 83 | +#include <plat/clock.h> | ||
| 84 | +#include <plat/omap-pm.h> | ||
| 85 | + | ||
| 86 | +#include <mach/hardware.h> | ||
| 87 | + | ||
| 88 | +#define VERY_HI_RATE 900000000 | ||
| 89 | + | ||
| 90 | +static struct cpufreq_frequency_table *freq_table; | ||
| 91 | +static struct clk *mpu_clk; | ||
| 92 | + | ||
| 93 | +static int omap_verify_speed(struct cpufreq_policy *policy) | ||
| 94 | +{ | ||
| 95 | + if (freq_table) | ||
| 96 | + return cpufreq_frequency_table_verify(policy, freq_table); | ||
| 97 | + | ||
| 98 | + if (policy->cpu) | ||
| 99 | + return -EINVAL; | ||
| 100 | + | ||
| 101 | + cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | ||
| 102 | + policy->cpuinfo.max_freq); | ||
| 103 | + | ||
| 104 | + policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; | ||
| 105 | + policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; | ||
| 106 | + cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | ||
| 107 | + policy->cpuinfo.max_freq); | ||
| 108 | + return 0; | ||
| 109 | +} | ||
| 110 | + | ||
| 111 | +static unsigned int omap_getspeed(unsigned int cpu) | ||
| 112 | +{ | ||
| 113 | + unsigned long rate; | ||
| 114 | + | ||
| 115 | + if (cpu) | ||
| 116 | + return 0; | ||
| 117 | + | ||
| 118 | + rate = clk_get_rate(mpu_clk) / 1000; | ||
| 119 | + return rate; | ||
| 120 | +} | ||
| 121 | + | ||
| 122 | +static int omap_target(struct cpufreq_policy *policy, | ||
| 123 | + unsigned int target_freq, | ||
| 124 | + unsigned int relation) | ||
| 125 | +{ | ||
| 126 | + struct cpufreq_freqs freqs; | ||
| 127 | + int ret = 0; | ||
| 128 | + | ||
| 129 | + /* Ensure desired rate is within allowed range. Some govenors | ||
| 130 | + * (ondemand) will just pass target_freq=0 to get the minimum. */ | ||
| 131 | + if (target_freq < policy->min) | ||
| 132 | + target_freq = policy->min; | ||
| 133 | + if (target_freq > policy->max) | ||
| 134 | + target_freq = policy->max; | ||
| 135 | + | ||
| 136 | + freqs.old = omap_getspeed(0); | ||
| 137 | + freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; | ||
| 138 | + freqs.cpu = 0; | ||
| 139 | + | ||
| 140 | + if (freqs.old == freqs.new) | ||
| 141 | + return ret; | ||
| 142 | + | ||
| 143 | + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
| 144 | + | ||
| 145 | +#ifdef CONFIG_CPU_FREQ_DEBUG | ||
| 146 | + pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); | ||
| 147 | +#endif | ||
| 148 | + ret = clk_set_rate(mpu_clk, freqs.new * 1000); | ||
| 149 | + | ||
| 150 | + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
| 151 | + | ||
| 152 | + return ret; | ||
| 153 | +} | ||
| 154 | + | ||
| 155 | +static int __init omap_cpu_init(struct cpufreq_policy *policy) | ||
| 156 | +{ | ||
| 157 | + int result = 0; | ||
| 158 | + | ||
| 159 | + mpu_clk = clk_get(NULL, "mpu"); | ||
| 160 | + if (IS_ERR(mpu_clk)) | ||
| 161 | + return PTR_ERR(mpu_clk); | ||
| 162 | + | ||
| 163 | + if (policy->cpu != 0) | ||
| 164 | + return -EINVAL; | ||
| 165 | + | ||
| 166 | + policy->cur = policy->min = policy->max = omap_getspeed(0); | ||
| 167 | + | ||
| 168 | + clk_init_cpufreq_table(&freq_table); | ||
| 169 | + | ||
| 170 | + if (freq_table) { | ||
| 171 | + result = cpufreq_frequency_table_cpuinfo(policy, freq_table); | ||
| 172 | + if (!result) | ||
| 173 | + cpufreq_frequency_table_get_attr(freq_table, | ||
| 174 | + policy->cpu); | ||
| 175 | + } else { | ||
| 176 | + policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; | ||
| 177 | + policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, | ||
| 178 | + VERY_HI_RATE) / 1000; | ||
| 179 | + } | ||
| 180 | + | ||
| 181 | + policy->min = policy->cpuinfo.min_freq; | ||
| 182 | + policy->max = policy->cpuinfo.max_freq; | ||
| 183 | + policy->cur = omap_getspeed(0); | ||
| 184 | + | ||
| 185 | + /* FIXME: what's the actual transition time? */ | ||
| 186 | + policy->cpuinfo.transition_latency = 300 * 1000; | ||
| 187 | + | ||
| 188 | + return 0; | ||
| 189 | +} | ||
| 190 | + | ||
| 191 | +static int omap_cpu_exit(struct cpufreq_policy *policy) | ||
| 192 | +{ | ||
| 193 | + clk_exit_cpufreq_table(&freq_table); | ||
| 194 | + clk_put(mpu_clk); | ||
| 195 | + return 0; | ||
| 196 | +} | ||
| 197 | + | ||
| 198 | +static struct freq_attr *omap_cpufreq_attr[] = { | ||
| 199 | + &cpufreq_freq_attr_scaling_available_freqs, | ||
| 200 | + NULL, | ||
| 201 | +}; | ||
| 202 | + | ||
| 203 | +static struct cpufreq_driver omap_driver = { | ||
| 204 | + .flags = CPUFREQ_STICKY, | ||
| 205 | + .verify = omap_verify_speed, | ||
| 206 | + .target = omap_target, | ||
| 207 | + .get = omap_getspeed, | ||
| 208 | + .init = omap_cpu_init, | ||
| 209 | + .exit = omap_cpu_exit, | ||
| 210 | + .name = "omap1", | ||
| 211 | + .attr = omap_cpufreq_attr, | ||
| 212 | +}; | ||
| 213 | + | ||
| 214 | +static int __init omap_cpufreq_init(void) | ||
| 215 | +{ | ||
| 216 | + return cpufreq_register_driver(&omap_driver); | ||
| 217 | +} | ||
| 218 | + | ||
| 219 | +static void __exit omap_cpufreq_exit(void) | ||
| 220 | +{ | ||
| 221 | + cpufreq_unregister_driver(&omap_driver); | ||
| 222 | +} | ||
| 223 | + | ||
| 224 | +MODULE_DESCRIPTION("cpufreq driver for OMAP1 SOCs"); | ||
| 225 | +MODULE_LICENSE("GPL"); | ||
| 226 | +module_init(omap_cpufreq_init); | ||
| 227 | +module_exit(omap_cpufreq_exit); | ||
| 228 | diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile | ||
| 229 | index 8e79ca5..7927dd6 100644 | ||
| 230 | --- a/arch/arm/mach-omap2/Makefile | ||
| 231 | +++ b/arch/arm/mach-omap2/Makefile | ||
| 232 | @@ -56,6 +56,9 @@ obj-$(CONFIG_ARCH_OMAP3) += opp3xxx_data.o | ||
| 233 | obj-$(CONFIG_ARCH_OMAP4) += opp4xxx_data.o | ||
| 234 | endif | ||
| 235 | |||
| 236 | +# CPUFREQ driver | ||
| 237 | +obj-$(CONFIG_CPU_FREQ) += omap2plus-cpufreq.o | ||
| 238 | + | ||
| 239 | # Power Management | ||
| 240 | ifeq ($(CONFIG_PM),y) | ||
| 241 | obj-$(CONFIG_ARCH_OMAP2) += pm24xx.o | ||
| 242 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 243 | new file mode 100644 | ||
| 244 | index 0000000..27f641b | ||
| 245 | --- /dev/null | ||
| 246 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 247 | @@ -0,0 +1,201 @@ | ||
| 248 | +/* | ||
| 249 | + * OMAP2PLUS cpufreq driver | ||
| 250 | + * | ||
| 251 | + * CPU frequency scaling for OMAP | ||
| 252 | + * | ||
| 253 | + * Copyright (C) 2005 Nokia Corporation | ||
| 254 | + * Written by Tony Lindgren <tony@atomide.com> | ||
| 255 | + * | ||
| 256 | + * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King | ||
| 257 | + * | ||
| 258 | + * Copyright (C) 2007-2011 Texas Instruments, Inc. | ||
| 259 | + * Updated to support OMAP3 | ||
| 260 | + * Rajendra Nayak <rnayak@ti.com> | ||
| 261 | + * | ||
| 262 | + * This program is free software; you can redistribute it and/or modify | ||
| 263 | + * it under the terms of the GNU General Public License version 2 as | ||
| 264 | + * published by the Free Software Foundation. | ||
| 265 | + */ | ||
| 266 | +#include <linux/types.h> | ||
| 267 | +#include <linux/kernel.h> | ||
| 268 | +#include <linux/sched.h> | ||
| 269 | +#include <linux/cpufreq.h> | ||
| 270 | +#include <linux/delay.h> | ||
| 271 | +#include <linux/init.h> | ||
| 272 | +#include <linux/err.h> | ||
| 273 | +#include <linux/clk.h> | ||
| 274 | +#include <linux/io.h> | ||
| 275 | +#include <linux/opp.h> | ||
| 276 | + | ||
| 277 | +#include <asm/system.h> | ||
| 278 | +#include <asm/smp_plat.h> | ||
| 279 | + | ||
| 280 | +#include <plat/clock.h> | ||
| 281 | +#include <plat/omap-pm.h> | ||
| 282 | +#include <plat/common.h> | ||
| 283 | + | ||
| 284 | +#include <mach/hardware.h> | ||
| 285 | + | ||
| 286 | +#define VERY_HI_RATE 900000000 | ||
| 287 | + | ||
| 288 | +static struct cpufreq_frequency_table *freq_table; | ||
| 289 | +static struct clk *mpu_clk; | ||
| 290 | + | ||
| 291 | +static int omap_verify_speed(struct cpufreq_policy *policy) | ||
| 292 | +{ | ||
| 293 | + if (freq_table) | ||
| 294 | + return cpufreq_frequency_table_verify(policy, freq_table); | ||
| 295 | + | ||
| 296 | + if (policy->cpu) | ||
| 297 | + return -EINVAL; | ||
| 298 | + | ||
| 299 | + cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | ||
| 300 | + policy->cpuinfo.max_freq); | ||
| 301 | + | ||
| 302 | + policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; | ||
| 303 | + policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; | ||
| 304 | + cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | ||
| 305 | + policy->cpuinfo.max_freq); | ||
| 306 | + return 0; | ||
| 307 | +} | ||
| 308 | + | ||
| 309 | +static unsigned int omap_getspeed(unsigned int cpu) | ||
| 310 | +{ | ||
| 311 | + unsigned long rate; | ||
| 312 | + | ||
| 313 | + if (cpu) | ||
| 314 | + return 0; | ||
| 315 | + | ||
| 316 | + rate = clk_get_rate(mpu_clk) / 1000; | ||
| 317 | + return rate; | ||
| 318 | +} | ||
| 319 | + | ||
| 320 | +static int omap_target(struct cpufreq_policy *policy, | ||
| 321 | + unsigned int target_freq, | ||
| 322 | + unsigned int relation) | ||
| 323 | +{ | ||
| 324 | + int ret = 0; | ||
| 325 | + struct cpufreq_freqs freqs; | ||
| 326 | + | ||
| 327 | + /* Ensure desired rate is within allowed range. Some govenors | ||
| 328 | + * (ondemand) will just pass target_freq=0 to get the minimum. */ | ||
| 329 | + if (target_freq < policy->min) | ||
| 330 | + target_freq = policy->min; | ||
| 331 | + if (target_freq > policy->max) | ||
| 332 | + target_freq = policy->max; | ||
| 333 | + | ||
| 334 | + freqs.old = omap_getspeed(0); | ||
| 335 | + freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; | ||
| 336 | + freqs.cpu = 0; | ||
| 337 | + | ||
| 338 | + if (freqs.old == freqs.new) | ||
| 339 | + return ret; | ||
| 340 | + | ||
| 341 | + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
| 342 | + | ||
| 343 | +#ifdef CONFIG_CPU_FREQ_DEBUG | ||
| 344 | + pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); | ||
| 345 | +#endif | ||
| 346 | + | ||
| 347 | + ret = clk_set_rate(mpu_clk, freqs.new * 1000); | ||
| 348 | + | ||
| 349 | + /* | ||
| 350 | + * Generic CPUFREQ driver jiffy update is under !SMP. So jiffies | ||
| 351 | + * won't get updated when UP machine cpufreq build with | ||
| 352 | + * CONFIG_SMP enabled. Below code is added only to manage that | ||
| 353 | + * scenario | ||
| 354 | + */ | ||
| 355 | + if (!is_smp()) | ||
| 356 | + loops_per_jiffy = | ||
| 357 | + cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); | ||
| 358 | + | ||
| 359 | + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
| 360 | + | ||
| 361 | + return ret; | ||
| 362 | +} | ||
| 363 | + | ||
| 364 | +static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 365 | +{ | ||
| 366 | + int result = 0; | ||
| 367 | + struct device *mpu_dev; | ||
| 368 | + | ||
| 369 | + if (cpu_is_omap24xx()) | ||
| 370 | + mpu_clk = clk_get(NULL, "virt_prcm_set"); | ||
| 371 | + else if (cpu_is_omap34xx()) | ||
| 372 | + mpu_clk = clk_get(NULL, "dpll1_ck"); | ||
| 373 | + else if (cpu_is_omap34xx()) | ||
| 374 | + mpu_clk = clk_get(NULL, "dpll_mpu_ck"); | ||
| 375 | + | ||
| 376 | + if (IS_ERR(mpu_clk)) | ||
| 377 | + return PTR_ERR(mpu_clk); | ||
| 378 | + | ||
| 379 | + if (policy->cpu != 0) | ||
| 380 | + return -EINVAL; | ||
| 381 | + | ||
| 382 | + policy->cur = policy->min = policy->max = omap_getspeed(0); | ||
| 383 | + | ||
| 384 | + mpu_dev = omap2_get_mpuss_device(); | ||
| 385 | + if (!mpu_dev) { | ||
| 386 | + pr_warning("%s: unable to get the mpu device\n", __func__); | ||
| 387 | + return -EINVAL; | ||
| 388 | + } | ||
| 389 | + opp_init_cpufreq_table(mpu_dev, &freq_table); | ||
| 390 | + | ||
| 391 | + if (freq_table) { | ||
| 392 | + result = cpufreq_frequency_table_cpuinfo(policy, freq_table); | ||
| 393 | + if (!result) | ||
| 394 | + cpufreq_frequency_table_get_attr(freq_table, | ||
| 395 | + policy->cpu); | ||
| 396 | + } else { | ||
| 397 | + policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; | ||
| 398 | + policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, | ||
| 399 | + VERY_HI_RATE) / 1000; | ||
| 400 | + } | ||
| 401 | + | ||
| 402 | + policy->min = policy->cpuinfo.min_freq; | ||
| 403 | + policy->max = policy->cpuinfo.max_freq; | ||
| 404 | + policy->cur = omap_getspeed(0); | ||
| 405 | + | ||
| 406 | + /* FIXME: what's the actual transition time? */ | ||
| 407 | + policy->cpuinfo.transition_latency = 300 * 1000; | ||
| 408 | + | ||
| 409 | + return 0; | ||
| 410 | +} | ||
| 411 | + | ||
| 412 | +static int omap_cpu_exit(struct cpufreq_policy *policy) | ||
| 413 | +{ | ||
| 414 | + clk_exit_cpufreq_table(&freq_table); | ||
| 415 | + clk_put(mpu_clk); | ||
| 416 | + return 0; | ||
| 417 | +} | ||
| 418 | + | ||
| 419 | +static struct freq_attr *omap_cpufreq_attr[] = { | ||
| 420 | + &cpufreq_freq_attr_scaling_available_freqs, | ||
| 421 | + NULL, | ||
| 422 | +}; | ||
| 423 | + | ||
| 424 | +static struct cpufreq_driver omap_driver = { | ||
| 425 | + .flags = CPUFREQ_STICKY, | ||
| 426 | + .verify = omap_verify_speed, | ||
| 427 | + .target = omap_target, | ||
| 428 | + .get = omap_getspeed, | ||
| 429 | + .init = omap_cpu_init, | ||
| 430 | + .exit = omap_cpu_exit, | ||
| 431 | + .name = "omap2plus", | ||
| 432 | + .attr = omap_cpufreq_attr, | ||
| 433 | +}; | ||
| 434 | + | ||
| 435 | +static int __init omap_cpufreq_init(void) | ||
| 436 | +{ | ||
| 437 | + return cpufreq_register_driver(&omap_driver); | ||
| 438 | +} | ||
| 439 | + | ||
| 440 | +static void __exit omap_cpufreq_exit(void) | ||
| 441 | +{ | ||
| 442 | + cpufreq_unregister_driver(&omap_driver); | ||
| 443 | +} | ||
| 444 | + | ||
| 445 | +MODULE_DESCRIPTION("cpufreq driver for OMAP2PLUS SOCs"); | ||
| 446 | +MODULE_LICENSE("GPL"); | ||
| 447 | +module_init(omap_cpufreq_init); | ||
| 448 | +module_exit(omap_cpufreq_exit); | ||
| 449 | diff --git a/arch/arm/plat-omap/Makefile b/arch/arm/plat-omap/Makefile | ||
| 450 | index f0233e6..4ef7493 100644 | ||
| 451 | --- a/arch/arm/plat-omap/Makefile | ||
| 452 | +++ b/arch/arm/plat-omap/Makefile | ||
| 453 | @@ -21,7 +21,6 @@ obj-$(CONFIG_OMAP_MCBSP) += mcbsp.o | ||
| 454 | obj-$(CONFIG_OMAP_IOMMU) += iommu.o iovmm.o | ||
| 455 | obj-$(CONFIG_OMAP_IOMMU_DEBUG) += iommu-debug.o | ||
| 456 | |||
| 457 | -obj-$(CONFIG_CPU_FREQ) += cpu-omap.o | ||
| 458 | obj-$(CONFIG_OMAP_DM_TIMER) += dmtimer.o | ||
| 459 | obj-$(CONFIG_OMAP_DEBUG_DEVICES) += debug-devices.o | ||
| 460 | obj-$(CONFIG_OMAP_DEBUG_LEDS) += debug-leds.o | ||
| 461 | diff --git a/arch/arm/plat-omap/cpu-omap.c b/arch/arm/plat-omap/cpu-omap.c | ||
| 462 | deleted file mode 100644 | ||
| 463 | index 9cd2709..0000000 | ||
| 464 | --- a/arch/arm/plat-omap/cpu-omap.c | ||
| 465 | +++ /dev/null | ||
| 466 | @@ -1,204 +0,0 @@ | ||
| 467 | -/* | ||
| 468 | - * linux/arch/arm/plat-omap/cpu-omap.c | ||
| 469 | - * | ||
| 470 | - * CPU frequency scaling for OMAP | ||
| 471 | - * | ||
| 472 | - * Copyright (C) 2005 Nokia Corporation | ||
| 473 | - * Written by Tony Lindgren <tony@atomide.com> | ||
| 474 | - * | ||
| 475 | - * Based on cpu-sa1110.c, Copyright (C) 2001 Russell King | ||
| 476 | - * | ||
| 477 | - * Copyright (C) 2007-2008 Texas Instruments, Inc. | ||
| 478 | - * Updated to support OMAP3 | ||
| 479 | - * Rajendra Nayak <rnayak@ti.com> | ||
| 480 | - * | ||
| 481 | - * This program is free software; you can redistribute it and/or modify | ||
| 482 | - * it under the terms of the GNU General Public License version 2 as | ||
| 483 | - * published by the Free Software Foundation. | ||
| 484 | - */ | ||
| 485 | -#include <linux/types.h> | ||
| 486 | -#include <linux/kernel.h> | ||
| 487 | -#include <linux/sched.h> | ||
| 488 | -#include <linux/cpufreq.h> | ||
| 489 | -#include <linux/delay.h> | ||
| 490 | -#include <linux/init.h> | ||
| 491 | -#include <linux/err.h> | ||
| 492 | -#include <linux/clk.h> | ||
| 493 | -#include <linux/io.h> | ||
| 494 | -#include <linux/opp.h> | ||
| 495 | - | ||
| 496 | -#include <mach/hardware.h> | ||
| 497 | -#include <plat/clock.h> | ||
| 498 | -#include <asm/system.h> | ||
| 499 | - | ||
| 500 | -#if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) | ||
| 501 | -#include <plat/omap-pm.h> | ||
| 502 | -#include <plat/common.h> | ||
| 503 | -#endif | ||
| 504 | - | ||
| 505 | -#define VERY_HI_RATE 900000000 | ||
| 506 | - | ||
| 507 | -static struct cpufreq_frequency_table *freq_table; | ||
| 508 | - | ||
| 509 | -#ifdef CONFIG_ARCH_OMAP1 | ||
| 510 | -#define MPU_CLK "mpu" | ||
| 511 | -#elif defined(CONFIG_ARCH_OMAP3) | ||
| 512 | -#define MPU_CLK "arm_fck" | ||
| 513 | -#else | ||
| 514 | -#define MPU_CLK "virt_prcm_set" | ||
| 515 | -#endif | ||
| 516 | - | ||
| 517 | -static struct clk *mpu_clk; | ||
| 518 | - | ||
| 519 | -/* TODO: Add support for SDRAM timing changes */ | ||
| 520 | - | ||
| 521 | -static int omap_verify_speed(struct cpufreq_policy *policy) | ||
| 522 | -{ | ||
| 523 | - if (freq_table) | ||
| 524 | - return cpufreq_frequency_table_verify(policy, freq_table); | ||
| 525 | - | ||
| 526 | - if (policy->cpu) | ||
| 527 | - return -EINVAL; | ||
| 528 | - | ||
| 529 | - cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | ||
| 530 | - policy->cpuinfo.max_freq); | ||
| 531 | - | ||
| 532 | - policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; | ||
| 533 | - policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; | ||
| 534 | - cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | ||
| 535 | - policy->cpuinfo.max_freq); | ||
| 536 | - return 0; | ||
| 537 | -} | ||
| 538 | - | ||
| 539 | -static unsigned int omap_getspeed(unsigned int cpu) | ||
| 540 | -{ | ||
| 541 | - unsigned long rate; | ||
| 542 | - | ||
| 543 | - if (cpu) | ||
| 544 | - return 0; | ||
| 545 | - | ||
| 546 | - rate = clk_get_rate(mpu_clk) / 1000; | ||
| 547 | - return rate; | ||
| 548 | -} | ||
| 549 | - | ||
| 550 | -static int omap_target(struct cpufreq_policy *policy, | ||
| 551 | - unsigned int target_freq, | ||
| 552 | - unsigned int relation) | ||
| 553 | -{ | ||
| 554 | -#ifdef CONFIG_ARCH_OMAP1 | ||
| 555 | - struct cpufreq_freqs freqs; | ||
| 556 | -#endif | ||
| 557 | -#if defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) | ||
| 558 | - unsigned long freq; | ||
| 559 | - struct device *mpu_dev = omap2_get_mpuss_device(); | ||
| 560 | -#endif | ||
| 561 | - int ret = 0; | ||
| 562 | - | ||
| 563 | - /* Ensure desired rate is within allowed range. Some govenors | ||
| 564 | - * (ondemand) will just pass target_freq=0 to get the minimum. */ | ||
| 565 | - if (target_freq < policy->min) | ||
| 566 | - target_freq = policy->min; | ||
| 567 | - if (target_freq > policy->max) | ||
| 568 | - target_freq = policy->max; | ||
| 569 | - | ||
| 570 | -#ifdef CONFIG_ARCH_OMAP1 | ||
| 571 | - freqs.old = omap_getspeed(0); | ||
| 572 | - freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; | ||
| 573 | - freqs.cpu = 0; | ||
| 574 | - | ||
| 575 | - if (freqs.old == freqs.new) | ||
| 576 | - return ret; | ||
| 577 | - cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
| 578 | -#ifdef CONFIG_CPU_FREQ_DEBUG | ||
| 579 | - printk(KERN_DEBUG "cpufreq-omap: transition: %u --> %u\n", | ||
| 580 | - freqs.old, freqs.new); | ||
| 581 | -#endif | ||
| 582 | - ret = clk_set_rate(mpu_clk, freqs.new * 1000); | ||
| 583 | - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
| 584 | -#elif defined(CONFIG_ARCH_OMAP3) && !defined(CONFIG_OMAP_PM_NONE) | ||
| 585 | - freq = target_freq * 1000; | ||
| 586 | - if (opp_find_freq_ceil(mpu_dev, &freq)) | ||
| 587 | - omap_pm_cpu_set_freq(freq); | ||
| 588 | -#endif | ||
| 589 | - return ret; | ||
| 590 | -} | ||
| 591 | - | ||
| 592 | -static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 593 | -{ | ||
| 594 | - int result = 0; | ||
| 595 | - | ||
| 596 | - mpu_clk = clk_get(NULL, MPU_CLK); | ||
| 597 | - if (IS_ERR(mpu_clk)) | ||
| 598 | - return PTR_ERR(mpu_clk); | ||
| 599 | - | ||
| 600 | - if (policy->cpu != 0) | ||
| 601 | - return -EINVAL; | ||
| 602 | - | ||
| 603 | - policy->cur = policy->min = policy->max = omap_getspeed(0); | ||
| 604 | - | ||
| 605 | - if (!cpu_is_omap34xx()) { | ||
| 606 | - clk_init_cpufreq_table(&freq_table); | ||
| 607 | - } else { | ||
| 608 | - struct device *mpu_dev = omap2_get_mpuss_device(); | ||
| 609 | - | ||
| 610 | - opp_init_cpufreq_table(mpu_dev, &freq_table); | ||
| 611 | - } | ||
| 612 | - | ||
| 613 | - if (freq_table) { | ||
| 614 | - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); | ||
| 615 | - if (!result) | ||
| 616 | - cpufreq_frequency_table_get_attr(freq_table, | ||
| 617 | - policy->cpu); | ||
| 618 | - } else { | ||
| 619 | - policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; | ||
| 620 | - policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, | ||
| 621 | - VERY_HI_RATE) / 1000; | ||
| 622 | - } | ||
| 623 | - | ||
| 624 | - policy->min = policy->cpuinfo.min_freq; | ||
| 625 | - policy->max = policy->cpuinfo.max_freq; | ||
| 626 | - policy->cur = omap_getspeed(0); | ||
| 627 | - | ||
| 628 | - /* FIXME: what's the actual transition time? */ | ||
| 629 | - policy->cpuinfo.transition_latency = 300 * 1000; | ||
| 630 | - | ||
| 631 | - return 0; | ||
| 632 | -} | ||
| 633 | - | ||
| 634 | -static int omap_cpu_exit(struct cpufreq_policy *policy) | ||
| 635 | -{ | ||
| 636 | - clk_exit_cpufreq_table(&freq_table); | ||
| 637 | - clk_put(mpu_clk); | ||
| 638 | - return 0; | ||
| 639 | -} | ||
| 640 | - | ||
| 641 | -static struct freq_attr *omap_cpufreq_attr[] = { | ||
| 642 | - &cpufreq_freq_attr_scaling_available_freqs, | ||
| 643 | - NULL, | ||
| 644 | -}; | ||
| 645 | - | ||
| 646 | -static struct cpufreq_driver omap_driver = { | ||
| 647 | - .flags = CPUFREQ_STICKY, | ||
| 648 | - .verify = omap_verify_speed, | ||
| 649 | - .target = omap_target, | ||
| 650 | - .get = omap_getspeed, | ||
| 651 | - .init = omap_cpu_init, | ||
| 652 | - .exit = omap_cpu_exit, | ||
| 653 | - .name = "omap", | ||
| 654 | - .attr = omap_cpufreq_attr, | ||
| 655 | -}; | ||
| 656 | - | ||
| 657 | -static int __init omap_cpufreq_init(void) | ||
| 658 | -{ | ||
| 659 | - return cpufreq_register_driver(&omap_driver); | ||
| 660 | -} | ||
| 661 | - | ||
| 662 | -late_initcall(omap_cpufreq_init); | ||
| 663 | - | ||
| 664 | -/* | ||
| 665 | - * if ever we want to remove this, upon cleanup call: | ||
| 666 | - * | ||
| 667 | - * cpufreq_unregister_driver() | ||
| 668 | - * cpufreq_frequency_table_put_attr() | ||
| 669 | - */ | ||
| 670 | - | ||
| 671 | -- | ||
| 672 | 1.7.2.5 | ||
| 673 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0008-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater-OMAP4430.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0008-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater-OMAP4430.patch deleted file mode 100644 index a152c7ff..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0008-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater-OMAP4430.patch +++ /dev/null | |||
| @@ -1,171 +0,0 @@ | |||
| 1 | From fed2c5a3d929204d4fc18c6f4a3edbf920e7ee36 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 3 | Date: Mon, 14 Mar 2011 17:08:49 +0530 | ||
| 4 | Subject: [PATCH 08/19] OMAP2PLUS: cpufreq: Add SMP support to cater OMAP4430 | ||
| 5 | |||
| 6 | On OMAP SMP configuartion, both processors share the voltage | ||
| 7 | and clock. So both CPUs needs to be scaled together and hence | ||
| 8 | needs software co-ordination. | ||
| 9 | |||
| 10 | Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 11 | Cc: Kevin Hilman <khilman@ti.com> | ||
| 12 | cc: Vishwanath BS <vishwanath.bs@ti.com> | ||
| 13 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 73 ++++++++++++++++++++++++++----- | ||
| 16 | 1 files changed, 62 insertions(+), 11 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 19 | index 27f641b..3730f96 100644 | ||
| 20 | --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 21 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 22 | @@ -26,9 +26,11 @@ | ||
| 23 | #include <linux/clk.h> | ||
| 24 | #include <linux/io.h> | ||
| 25 | #include <linux/opp.h> | ||
| 26 | +#include <linux/cpu.h> | ||
| 27 | |||
| 28 | #include <asm/system.h> | ||
| 29 | #include <asm/smp_plat.h> | ||
| 30 | +#include <asm/cpu.h> | ||
| 31 | |||
| 32 | #include <plat/clock.h> | ||
| 33 | #include <plat/omap-pm.h> | ||
| 34 | @@ -63,7 +65,7 @@ static unsigned int omap_getspeed(unsigned int cpu) | ||
| 35 | { | ||
| 36 | unsigned long rate; | ||
| 37 | |||
| 38 | - if (cpu) | ||
| 39 | + if (cpu >= NR_CPUS) | ||
| 40 | return 0; | ||
| 41 | |||
| 42 | rate = clk_get_rate(mpu_clk) / 1000; | ||
| 43 | @@ -74,9 +76,13 @@ static int omap_target(struct cpufreq_policy *policy, | ||
| 44 | unsigned int target_freq, | ||
| 45 | unsigned int relation) | ||
| 46 | { | ||
| 47 | - int ret = 0; | ||
| 48 | + int i, ret = 0; | ||
| 49 | struct cpufreq_freqs freqs; | ||
| 50 | |||
| 51 | + /* Changes not allowed until all CPUs are online */ | ||
| 52 | + if (is_smp() && (num_online_cpus() < NR_CPUS)) | ||
| 53 | + return ret; | ||
| 54 | + | ||
| 55 | /* Ensure desired rate is within allowed range. Some govenors | ||
| 56 | * (ondemand) will just pass target_freq=0 to get the minimum. */ | ||
| 57 | if (target_freq < policy->min) | ||
| 58 | @@ -84,15 +90,25 @@ static int omap_target(struct cpufreq_policy *policy, | ||
| 59 | if (target_freq > policy->max) | ||
| 60 | target_freq = policy->max; | ||
| 61 | |||
| 62 | - freqs.old = omap_getspeed(0); | ||
| 63 | + freqs.old = omap_getspeed(policy->cpu); | ||
| 64 | freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; | ||
| 65 | - freqs.cpu = 0; | ||
| 66 | + freqs.cpu = policy->cpu; | ||
| 67 | |||
| 68 | if (freqs.old == freqs.new) | ||
| 69 | return ret; | ||
| 70 | |||
| 71 | - cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
| 72 | + if (!is_smp()) { | ||
| 73 | + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
| 74 | + goto set_freq; | ||
| 75 | + } | ||
| 76 | + | ||
| 77 | + /* notifiers */ | ||
| 78 | + for_each_cpu(i, policy->cpus) { | ||
| 79 | + freqs.cpu = i; | ||
| 80 | + cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
| 81 | + } | ||
| 82 | |||
| 83 | +set_freq: | ||
| 84 | #ifdef CONFIG_CPU_FREQ_DEBUG | ||
| 85 | pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); | ||
| 86 | #endif | ||
| 87 | @@ -105,12 +121,33 @@ static int omap_target(struct cpufreq_policy *policy, | ||
| 88 | * CONFIG_SMP enabled. Below code is added only to manage that | ||
| 89 | * scenario | ||
| 90 | */ | ||
| 91 | - if (!is_smp()) | ||
| 92 | + freqs.new = omap_getspeed(policy->cpu); | ||
| 93 | + if (!is_smp()) { | ||
| 94 | loops_per_jiffy = | ||
| 95 | cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); | ||
| 96 | + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
| 97 | + goto skip_lpj; | ||
| 98 | + } | ||
| 99 | |||
| 100 | - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
| 101 | +#ifdef CONFIG_SMP | ||
| 102 | + /* | ||
| 103 | + * Note that loops_per_jiffy is not updated on SMP systems in | ||
| 104 | + * cpufreq driver. So, update the per-CPU loops_per_jiffy value | ||
| 105 | + * on frequency transition. We need to update all dependent CPUs. | ||
| 106 | + */ | ||
| 107 | + for_each_cpu(i, policy->cpus) | ||
| 108 | + per_cpu(cpu_data, i).loops_per_jiffy = | ||
| 109 | + cpufreq_scale(per_cpu(cpu_data, i).loops_per_jiffy, | ||
| 110 | + freqs.old, freqs.new); | ||
| 111 | +#endif | ||
| 112 | |||
| 113 | + /* notifiers */ | ||
| 114 | + for_each_cpu(i, policy->cpus) { | ||
| 115 | + freqs.cpu = i; | ||
| 116 | + cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
| 117 | + } | ||
| 118 | + | ||
| 119 | +skip_lpj: | ||
| 120 | return ret; | ||
| 121 | } | ||
| 122 | |||
| 123 | @@ -118,6 +155,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 124 | { | ||
| 125 | int result = 0; | ||
| 126 | struct device *mpu_dev; | ||
| 127 | + static cpumask_var_t cpumask; | ||
| 128 | |||
| 129 | if (cpu_is_omap24xx()) | ||
| 130 | mpu_clk = clk_get(NULL, "virt_prcm_set"); | ||
| 131 | @@ -129,12 +167,12 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 132 | if (IS_ERR(mpu_clk)) | ||
| 133 | return PTR_ERR(mpu_clk); | ||
| 134 | |||
| 135 | - if (policy->cpu != 0) | ||
| 136 | + if (policy->cpu >= NR_CPUS) | ||
| 137 | return -EINVAL; | ||
| 138 | |||
| 139 | - policy->cur = policy->min = policy->max = omap_getspeed(0); | ||
| 140 | - | ||
| 141 | + policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); | ||
| 142 | mpu_dev = omap2_get_mpuss_device(); | ||
| 143 | + | ||
| 144 | if (!mpu_dev) { | ||
| 145 | pr_warning("%s: unable to get the mpu device\n", __func__); | ||
| 146 | return -EINVAL; | ||
| 147 | @@ -154,7 +192,20 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 148 | |||
| 149 | policy->min = policy->cpuinfo.min_freq; | ||
| 150 | policy->max = policy->cpuinfo.max_freq; | ||
| 151 | - policy->cur = omap_getspeed(0); | ||
| 152 | + policy->cur = omap_getspeed(policy->cpu); | ||
| 153 | + | ||
| 154 | + /* | ||
| 155 | + * On OMAP SMP configuartion, both processors share the voltage | ||
| 156 | + * and clock. So both CPUs needs to be scaled together and hence | ||
| 157 | + * needs software co-ordination. Use cpufreq affected_cpus | ||
| 158 | + * interface to handle this scenario. Additional is_smp() check | ||
| 159 | + * is to keep SMP_ON_UP build working. | ||
| 160 | + */ | ||
| 161 | + if (is_smp()) { | ||
| 162 | + policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; | ||
| 163 | + cpumask_or(cpumask, cpumask_of(policy->cpu), cpumask); | ||
| 164 | + cpumask_copy(policy->cpus, cpumask); | ||
| 165 | + } | ||
| 166 | |||
| 167 | /* FIXME: what's the actual transition time? */ | ||
| 168 | policy->cpuinfo.transition_latency = 300 * 1000; | ||
| 169 | -- | ||
| 170 | 1.7.2.5 | ||
| 171 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0009-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set-mp.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0009-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set-mp.patch deleted file mode 100644 index c8328b2a..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0009-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set-mp.patch +++ /dev/null | |||
| @@ -1,30 +0,0 @@ | |||
| 1 | From d046bd12930aa5daf951d9af8614c60677c8ff15 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Jarkko Nikula <jhnikula@gmail.com> | ||
| 3 | Date: Thu, 14 Apr 2011 16:21:58 +0300 | ||
| 4 | Subject: [PATCH 09/19] OMAP2PLUS: cpufreq: Fix typo when attempting to set mpu_clk for OMAP4 | ||
| 5 | |||
| 6 | Fix this typo as there is no dpll_mpu_ck for OMAP3 and code flow is clearly | ||
| 7 | trying to set mpu_clk for OMAP4 for which this dpll_mpu_ck is available. | ||
| 8 | |||
| 9 | Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> | ||
| 10 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 2 +- | ||
| 13 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 16 | index 3730f96..a725d90 100644 | ||
| 17 | --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 18 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 19 | @@ -161,7 +161,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 20 | mpu_clk = clk_get(NULL, "virt_prcm_set"); | ||
| 21 | else if (cpu_is_omap34xx()) | ||
| 22 | mpu_clk = clk_get(NULL, "dpll1_ck"); | ||
| 23 | - else if (cpu_is_omap34xx()) | ||
| 24 | + else if (cpu_is_omap44xx()) | ||
| 25 | mpu_clk = clk_get(NULL, "dpll_mpu_ck"); | ||
| 26 | |||
| 27 | if (IS_ERR(mpu_clk)) | ||
| 28 | -- | ||
| 29 | 1.7.2.5 | ||
| 30 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0010-OMAP2-cpufreq-move-clk-name-decision-to-init.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0010-OMAP2-cpufreq-move-clk-name-decision-to-init.patch deleted file mode 100644 index d1c1ea5c..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0010-OMAP2-cpufreq-move-clk-name-decision-to-init.patch +++ /dev/null | |||
| @@ -1,64 +0,0 @@ | |||
| 1 | From 0ec2aee24f701ecd6135dce0b3f1a71249583689 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Wed, 25 May 2011 16:38:46 -0700 | ||
| 4 | Subject: [PATCH 10/19] OMAP2+: cpufreq: move clk name decision to init | ||
| 5 | |||
| 6 | Clk name does'nt need to dynamically detected during clk init. | ||
| 7 | move them off to driver initialization, if we dont have a clk name, | ||
| 8 | there is no point in registering the driver anyways. The actual clk | ||
| 9 | get and put is left at cpu_init and exit functions. | ||
| 10 | |||
| 11 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 12 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 20 +++++++++++++------- | ||
| 15 | 1 files changed, 13 insertions(+), 7 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 18 | index a725d90..c46d0cd 100644 | ||
| 19 | --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 20 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 21 | @@ -42,6 +42,7 @@ | ||
| 22 | |||
| 23 | static struct cpufreq_frequency_table *freq_table; | ||
| 24 | static struct clk *mpu_clk; | ||
| 25 | +static char *mpu_clk_name; | ||
| 26 | |||
| 27 | static int omap_verify_speed(struct cpufreq_policy *policy) | ||
| 28 | { | ||
| 29 | @@ -157,13 +158,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 30 | struct device *mpu_dev; | ||
| 31 | static cpumask_var_t cpumask; | ||
| 32 | |||
| 33 | - if (cpu_is_omap24xx()) | ||
| 34 | - mpu_clk = clk_get(NULL, "virt_prcm_set"); | ||
| 35 | - else if (cpu_is_omap34xx()) | ||
| 36 | - mpu_clk = clk_get(NULL, "dpll1_ck"); | ||
| 37 | - else if (cpu_is_omap44xx()) | ||
| 38 | - mpu_clk = clk_get(NULL, "dpll_mpu_ck"); | ||
| 39 | - | ||
| 40 | + mpu_clk = clk_get(NULL, mpu_clk_name); | ||
| 41 | if (IS_ERR(mpu_clk)) | ||
| 42 | return PTR_ERR(mpu_clk); | ||
| 43 | |||
| 44 | @@ -238,6 +233,17 @@ static struct cpufreq_driver omap_driver = { | ||
| 45 | |||
| 46 | static int __init omap_cpufreq_init(void) | ||
| 47 | { | ||
| 48 | + if (cpu_is_omap24xx()) | ||
| 49 | + mpu_clk_name = "virt_prcm_set"; | ||
| 50 | + else if (cpu_is_omap34xx()) | ||
| 51 | + mpu_clk_name = "dpll1_ck"; | ||
| 52 | + else if (cpu_is_omap44xx()) | ||
| 53 | + mpu_clk_name = "dpll_mpu_ck"; | ||
| 54 | + | ||
| 55 | + if (!mpu_clk_name) { | ||
| 56 | + pr_err("%s: unsupported Silicon?\n", __func__); | ||
| 57 | + return -EINVAL; | ||
| 58 | + } | ||
| 59 | return cpufreq_register_driver(&omap_driver); | ||
| 60 | } | ||
| 61 | |||
| 62 | -- | ||
| 63 | 1.7.2.5 | ||
| 64 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0011-OMAP2-cpufreq-deny-initialization-if-no-mpudev.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0011-OMAP2-cpufreq-deny-initialization-if-no-mpudev.patch deleted file mode 100644 index b37c004d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0011-OMAP2-cpufreq-deny-initialization-if-no-mpudev.patch +++ /dev/null | |||
| @@ -1,64 +0,0 @@ | |||
| 1 | From 7c76e002041cd5b084c9a8b6729ab33acf53643e Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Wed, 25 May 2011 16:38:47 -0700 | ||
| 4 | Subject: [PATCH 11/19] OMAP2+: cpufreq: deny initialization if no mpudev | ||
| 5 | |||
| 6 | if we do not have mpu_dev we normally fail in cpu_init. It is better | ||
| 7 | to fail driver registration if the devices are not available. | ||
| 8 | |||
| 9 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 10 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 15 ++++++++------- | ||
| 13 | 1 files changed, 8 insertions(+), 7 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 16 | index c46d0cd..33a91ec 100644 | ||
| 17 | --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 18 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 19 | @@ -43,6 +43,7 @@ | ||
| 20 | static struct cpufreq_frequency_table *freq_table; | ||
| 21 | static struct clk *mpu_clk; | ||
| 22 | static char *mpu_clk_name; | ||
| 23 | +static struct device *mpu_dev; | ||
| 24 | |||
| 25 | static int omap_verify_speed(struct cpufreq_policy *policy) | ||
| 26 | { | ||
| 27 | @@ -155,7 +156,6 @@ skip_lpj: | ||
| 28 | static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 29 | { | ||
| 30 | int result = 0; | ||
| 31 | - struct device *mpu_dev; | ||
| 32 | static cpumask_var_t cpumask; | ||
| 33 | |||
| 34 | mpu_clk = clk_get(NULL, mpu_clk_name); | ||
| 35 | @@ -166,12 +166,6 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 36 | return -EINVAL; | ||
| 37 | |||
| 38 | policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); | ||
| 39 | - mpu_dev = omap2_get_mpuss_device(); | ||
| 40 | - | ||
| 41 | - if (!mpu_dev) { | ||
| 42 | - pr_warning("%s: unable to get the mpu device\n", __func__); | ||
| 43 | - return -EINVAL; | ||
| 44 | - } | ||
| 45 | opp_init_cpufreq_table(mpu_dev, &freq_table); | ||
| 46 | |||
| 47 | if (freq_table) { | ||
| 48 | @@ -244,6 +238,13 @@ static int __init omap_cpufreq_init(void) | ||
| 49 | pr_err("%s: unsupported Silicon?\n", __func__); | ||
| 50 | return -EINVAL; | ||
| 51 | } | ||
| 52 | + | ||
| 53 | + mpu_dev = omap2_get_mpuss_device(); | ||
| 54 | + if (!mpu_dev) { | ||
| 55 | + pr_warning("%s: unable to get the mpu device\n", __func__); | ||
| 56 | + return -EINVAL; | ||
| 57 | + } | ||
| 58 | + | ||
| 59 | return cpufreq_register_driver(&omap_driver); | ||
| 60 | } | ||
| 61 | |||
| 62 | -- | ||
| 63 | 1.7.2.5 | ||
| 64 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0012-OMAP2-cpufreq-dont-support-freq_table.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0012-OMAP2-cpufreq-dont-support-freq_table.patch deleted file mode 100644 index 33ffe54a..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0012-OMAP2-cpufreq-dont-support-freq_table.patch +++ /dev/null | |||
| @@ -1,129 +0,0 @@ | |||
| 1 | From 407f4d9ed824d458406f139a7698c74a1eb3b8f7 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Thu, 26 May 2011 19:39:17 -0700 | ||
| 4 | Subject: [PATCH 12/19] OMAP2+: cpufreq: dont support !freq_table | ||
| 5 | |||
| 6 | OMAP2+ all have frequency tables, hence the hacks we had for older | ||
| 7 | silicon do not need to be carried forward. As part of this change, | ||
| 8 | use cpufreq_frequency_table_target to find the best match for | ||
| 9 | frequency requested. | ||
| 10 | |||
| 11 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 12 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 67 +++++++++++++++---------------- | ||
| 15 | 1 files changed, 33 insertions(+), 34 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 18 | index 33a91ec..acf18e8 100644 | ||
| 19 | --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 20 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 21 | @@ -38,8 +38,6 @@ | ||
| 22 | |||
| 23 | #include <mach/hardware.h> | ||
| 24 | |||
| 25 | -#define VERY_HI_RATE 900000000 | ||
| 26 | - | ||
| 27 | static struct cpufreq_frequency_table *freq_table; | ||
| 28 | static struct clk *mpu_clk; | ||
| 29 | static char *mpu_clk_name; | ||
| 30 | @@ -47,20 +45,9 @@ static struct device *mpu_dev; | ||
| 31 | |||
| 32 | static int omap_verify_speed(struct cpufreq_policy *policy) | ||
| 33 | { | ||
| 34 | - if (freq_table) | ||
| 35 | - return cpufreq_frequency_table_verify(policy, freq_table); | ||
| 36 | - | ||
| 37 | - if (policy->cpu) | ||
| 38 | + if (!freq_table) | ||
| 39 | return -EINVAL; | ||
| 40 | - | ||
| 41 | - cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | ||
| 42 | - policy->cpuinfo.max_freq); | ||
| 43 | - | ||
| 44 | - policy->min = clk_round_rate(mpu_clk, policy->min * 1000) / 1000; | ||
| 45 | - policy->max = clk_round_rate(mpu_clk, policy->max * 1000) / 1000; | ||
| 46 | - cpufreq_verify_within_limits(policy, policy->cpuinfo.min_freq, | ||
| 47 | - policy->cpuinfo.max_freq); | ||
| 48 | - return 0; | ||
| 49 | + return cpufreq_frequency_table_verify(policy, freq_table); | ||
| 50 | } | ||
| 51 | |||
| 52 | static unsigned int omap_getspeed(unsigned int cpu) | ||
| 53 | @@ -78,22 +65,35 @@ static int omap_target(struct cpufreq_policy *policy, | ||
| 54 | unsigned int target_freq, | ||
| 55 | unsigned int relation) | ||
| 56 | { | ||
| 57 | - int i, ret = 0; | ||
| 58 | + unsigned int i; | ||
| 59 | + int ret = 0; | ||
| 60 | struct cpufreq_freqs freqs; | ||
| 61 | |||
| 62 | /* Changes not allowed until all CPUs are online */ | ||
| 63 | if (is_smp() && (num_online_cpus() < NR_CPUS)) | ||
| 64 | return ret; | ||
| 65 | |||
| 66 | - /* Ensure desired rate is within allowed range. Some govenors | ||
| 67 | - * (ondemand) will just pass target_freq=0 to get the minimum. */ | ||
| 68 | - if (target_freq < policy->min) | ||
| 69 | - target_freq = policy->min; | ||
| 70 | - if (target_freq > policy->max) | ||
| 71 | - target_freq = policy->max; | ||
| 72 | + if (!freq_table) { | ||
| 73 | + dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, | ||
| 74 | + policy->cpu); | ||
| 75 | + return -EINVAL; | ||
| 76 | + } | ||
| 77 | + | ||
| 78 | + ret = cpufreq_frequency_table_target(policy, freq_table, target_freq, | ||
| 79 | + relation, &i); | ||
| 80 | + if (ret) { | ||
| 81 | + dev_dbg(mpu_dev, "%s: cpu%d: no freq match for %d(ret=%d)\n", | ||
| 82 | + __func__, policy->cpu, target_freq, ret); | ||
| 83 | + return ret; | ||
| 84 | + } | ||
| 85 | + freqs.new = freq_table[i].frequency; | ||
| 86 | + if (!freqs.new) { | ||
| 87 | + dev_err(mpu_dev, "%s: cpu%d: no match for freq %d\n", __func__, | ||
| 88 | + policy->cpu, target_freq); | ||
| 89 | + return -EINVAL; | ||
| 90 | + } | ||
| 91 | |||
| 92 | freqs.old = omap_getspeed(policy->cpu); | ||
| 93 | - freqs.new = clk_round_rate(mpu_clk, target_freq * 1000) / 1000; | ||
| 94 | freqs.cpu = policy->cpu; | ||
| 95 | |||
| 96 | if (freqs.old == freqs.new) | ||
| 97 | @@ -166,19 +166,18 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 98 | return -EINVAL; | ||
| 99 | |||
| 100 | policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); | ||
| 101 | - opp_init_cpufreq_table(mpu_dev, &freq_table); | ||
| 102 | - | ||
| 103 | - if (freq_table) { | ||
| 104 | - result = cpufreq_frequency_table_cpuinfo(policy, freq_table); | ||
| 105 | - if (!result) | ||
| 106 | - cpufreq_frequency_table_get_attr(freq_table, | ||
| 107 | - policy->cpu); | ||
| 108 | - } else { | ||
| 109 | - policy->cpuinfo.min_freq = clk_round_rate(mpu_clk, 0) / 1000; | ||
| 110 | - policy->cpuinfo.max_freq = clk_round_rate(mpu_clk, | ||
| 111 | - VERY_HI_RATE) / 1000; | ||
| 112 | + result = opp_init_cpufreq_table(mpu_dev, &freq_table); | ||
| 113 | + | ||
| 114 | + if (result) { | ||
| 115 | + dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", | ||
| 116 | + __func__, policy->cpu, result); | ||
| 117 | + return result; | ||
| 118 | } | ||
| 119 | |||
| 120 | + result = cpufreq_frequency_table_cpuinfo(policy, freq_table); | ||
| 121 | + if (!result) | ||
| 122 | + cpufreq_frequency_table_get_attr(freq_table, policy->cpu); | ||
| 123 | + | ||
| 124 | policy->min = policy->cpuinfo.min_freq; | ||
| 125 | policy->max = policy->cpuinfo.max_freq; | ||
| 126 | policy->cur = omap_getspeed(policy->cpu); | ||
| 127 | -- | ||
| 128 | 1.7.2.5 | ||
| 129 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0013-OMAP2-cpufreq-only-supports-OPP-library.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0013-OMAP2-cpufreq-only-supports-OPP-library.patch deleted file mode 100644 index d5db4321..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0013-OMAP2-cpufreq-only-supports-OPP-library.patch +++ /dev/null | |||
| @@ -1,46 +0,0 @@ | |||
| 1 | From 525df87add27c07a76e06c45f0756b204a5a3880 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Thu, 26 May 2011 19:39:18 -0700 | ||
| 4 | Subject: [PATCH 13/19] OMAP2+: cpufreq: only supports OPP library | ||
| 5 | |||
| 6 | OMAP2 is the only family using clk_[init|exit]_cpufreq_table, however, | ||
| 7 | the cpufreq code does not currently use clk_init_cpufreq_table. As a | ||
| 8 | result, it is unusuable for OMAP2 and only usable only on platforms | ||
| 9 | using OPP library. | ||
| 10 | |||
| 11 | Remove the unbalanced clk_exit_cpufreq_table(). Any platforms where | ||
| 12 | OPPs are not availble will fail on init because a freq table will not | ||
| 13 | be properly initialized. | ||
| 14 | |||
| 15 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 16 | [khilman@ti.com: changelog edits, and graceful failure mode changes] | ||
| 17 | Acked-by: Kevin Hilman <khilman@ti.com> | ||
| 18 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 19 | --- | ||
| 20 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 3 +-- | ||
| 21 | 1 files changed, 1 insertions(+), 2 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 24 | index acf18e8..3af7cda 100644 | ||
| 25 | --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 26 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 27 | @@ -1,7 +1,7 @@ | ||
| 28 | /* | ||
| 29 | * OMAP2PLUS cpufreq driver | ||
| 30 | * | ||
| 31 | - * CPU frequency scaling for OMAP | ||
| 32 | + * CPU frequency scaling for OMAP using OPP information | ||
| 33 | * | ||
| 34 | * Copyright (C) 2005 Nokia Corporation | ||
| 35 | * Written by Tony Lindgren <tony@atomide.com> | ||
| 36 | @@ -203,7 +203,6 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 37 | |||
| 38 | static int omap_cpu_exit(struct cpufreq_policy *policy) | ||
| 39 | { | ||
| 40 | - clk_exit_cpufreq_table(&freq_table); | ||
| 41 | clk_put(mpu_clk); | ||
| 42 | return 0; | ||
| 43 | } | ||
| 44 | -- | ||
| 45 | 1.7.2.5 | ||
| 46 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0014-OMAP2-cpufreq-put-clk-if-cpu_init-failed.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0014-OMAP2-cpufreq-put-clk-if-cpu_init-failed.patch deleted file mode 100644 index 709a5554..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0014-OMAP2-cpufreq-put-clk-if-cpu_init-failed.patch +++ /dev/null | |||
| @@ -1,61 +0,0 @@ | |||
| 1 | From b0f40f6545e9ae32b6cbd2cb03561de805297bf5 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Thu, 26 May 2011 19:39:19 -0700 | ||
| 4 | Subject: [PATCH 14/19] OMAP2+: cpufreq: put clk if cpu_init failed | ||
| 5 | |||
| 6 | Release the mpu_clk in fail paths. | ||
| 7 | |||
| 8 | Reported-by: Todd Poynor <toddpoynor@google.com> | ||
| 9 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 10 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 14 +++++++++++--- | ||
| 13 | 1 files changed, 11 insertions(+), 3 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 16 | index 3af7cda..e019297 100644 | ||
| 17 | --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 18 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 19 | @@ -162,8 +162,10 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 20 | if (IS_ERR(mpu_clk)) | ||
| 21 | return PTR_ERR(mpu_clk); | ||
| 22 | |||
| 23 | - if (policy->cpu >= NR_CPUS) | ||
| 24 | - return -EINVAL; | ||
| 25 | + if (policy->cpu >= NR_CPUS) { | ||
| 26 | + result = -EINVAL; | ||
| 27 | + goto fail_ck; | ||
| 28 | + } | ||
| 29 | |||
| 30 | policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); | ||
| 31 | result = opp_init_cpufreq_table(mpu_dev, &freq_table); | ||
| 32 | @@ -171,12 +173,14 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 33 | if (result) { | ||
| 34 | dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", | ||
| 35 | __func__, policy->cpu, result); | ||
| 36 | - return result; | ||
| 37 | + goto fail_ck; | ||
| 38 | } | ||
| 39 | |||
| 40 | result = cpufreq_frequency_table_cpuinfo(policy, freq_table); | ||
| 41 | if (!result) | ||
| 42 | cpufreq_frequency_table_get_attr(freq_table, policy->cpu); | ||
| 43 | + else | ||
| 44 | + goto fail_ck; | ||
| 45 | |||
| 46 | policy->min = policy->cpuinfo.min_freq; | ||
| 47 | policy->max = policy->cpuinfo.max_freq; | ||
| 48 | @@ -199,6 +203,10 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 49 | policy->cpuinfo.transition_latency = 300 * 1000; | ||
| 50 | |||
| 51 | return 0; | ||
| 52 | + | ||
| 53 | +fail_ck: | ||
| 54 | + clk_put(mpu_clk); | ||
| 55 | + return result; | ||
| 56 | } | ||
| 57 | |||
| 58 | static int omap_cpu_exit(struct cpufreq_policy *policy) | ||
| 59 | -- | ||
| 60 | 1.7.2.5 | ||
| 61 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0015-OMAP2-cpufreq-fix-freq_table-leak.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0015-OMAP2-cpufreq-fix-freq_table-leak.patch deleted file mode 100644 index a1080e63..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0015-OMAP2-cpufreq-fix-freq_table-leak.patch +++ /dev/null | |||
| @@ -1,90 +0,0 @@ | |||
| 1 | From 67324a92ca4778fb6be86058c91ac7c9442ede16 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Thu, 26 May 2011 19:39:20 -0700 | ||
| 4 | Subject: [PATCH 15/19] OMAP2+: cpufreq: fix freq_table leak | ||
| 5 | |||
| 6 | We use a single frequency table for multiple CPUs. But, with | ||
| 7 | OMAP4, since we have multiple CPUs, the cpu_init call for CPU1 | ||
| 8 | causes freq_table previously allocated for CPU0 to be overwritten. | ||
| 9 | In addition, we dont free the table on exit path. | ||
| 10 | |||
| 11 | We solve this by maintaining an atomic type counter to ensure | ||
| 12 | just a single table exists at a given time. | ||
| 13 | |||
| 14 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 15 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 16 | --- | ||
| 17 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 22 +++++++++++++++++----- | ||
| 18 | 1 files changed, 17 insertions(+), 5 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 21 | index e019297..a962a31 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 23 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 24 | @@ -39,6 +39,7 @@ | ||
| 25 | #include <mach/hardware.h> | ||
| 26 | |||
| 27 | static struct cpufreq_frequency_table *freq_table; | ||
| 28 | +static atomic_t freq_table_users = ATOMIC_INIT(0); | ||
| 29 | static struct clk *mpu_clk; | ||
| 30 | static char *mpu_clk_name; | ||
| 31 | static struct device *mpu_dev; | ||
| 32 | @@ -153,6 +154,12 @@ skip_lpj: | ||
| 33 | return ret; | ||
| 34 | } | ||
| 35 | |||
| 36 | +static inline void freq_table_free(void) | ||
| 37 | +{ | ||
| 38 | + if (atomic_dec_and_test(&freq_table_users)) | ||
| 39 | + opp_free_cpufreq_table(mpu_dev, &freq_table); | ||
| 40 | +} | ||
| 41 | + | ||
| 42 | static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 43 | { | ||
| 44 | int result = 0; | ||
| 45 | @@ -168,7 +175,9 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 46 | } | ||
| 47 | |||
| 48 | policy->cur = policy->min = policy->max = omap_getspeed(policy->cpu); | ||
| 49 | - result = opp_init_cpufreq_table(mpu_dev, &freq_table); | ||
| 50 | + | ||
| 51 | + if (atomic_inc_return(&freq_table_users) == 1) | ||
| 52 | + result = opp_init_cpufreq_table(mpu_dev, &freq_table); | ||
| 53 | |||
| 54 | if (result) { | ||
| 55 | dev_err(mpu_dev, "%s: cpu%d: failed creating freq table[%d]\n", | ||
| 56 | @@ -177,10 +186,10 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 57 | } | ||
| 58 | |||
| 59 | result = cpufreq_frequency_table_cpuinfo(policy, freq_table); | ||
| 60 | - if (!result) | ||
| 61 | - cpufreq_frequency_table_get_attr(freq_table, policy->cpu); | ||
| 62 | - else | ||
| 63 | - goto fail_ck; | ||
| 64 | + if (result) | ||
| 65 | + goto fail_table; | ||
| 66 | + | ||
| 67 | + cpufreq_frequency_table_get_attr(freq_table, policy->cpu); | ||
| 68 | |||
| 69 | policy->min = policy->cpuinfo.min_freq; | ||
| 70 | policy->max = policy->cpuinfo.max_freq; | ||
| 71 | @@ -204,6 +213,8 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 72 | |||
| 73 | return 0; | ||
| 74 | |||
| 75 | +fail_table: | ||
| 76 | + freq_table_free(); | ||
| 77 | fail_ck: | ||
| 78 | clk_put(mpu_clk); | ||
| 79 | return result; | ||
| 80 | @@ -211,6 +222,7 @@ fail_ck: | ||
| 81 | |||
| 82 | static int omap_cpu_exit(struct cpufreq_policy *policy) | ||
| 83 | { | ||
| 84 | + freq_table_free(); | ||
| 85 | clk_put(mpu_clk); | ||
| 86 | return 0; | ||
| 87 | } | ||
| 88 | -- | ||
| 89 | 1.7.2.5 | ||
| 90 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0016-OMAP2-CPUfreq-Remove-superfluous-check-in-target-for.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0016-OMAP2-CPUfreq-Remove-superfluous-check-in-target-for.patch deleted file mode 100644 index 2451a21d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0016-OMAP2-CPUfreq-Remove-superfluous-check-in-target-for.patch +++ /dev/null | |||
| @@ -1,58 +0,0 @@ | |||
| 1 | From f0e647da78b80946ab301787aba4330bd7d1429d Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 3 | Date: Fri, 3 Jun 2011 17:46:57 +0530 | ||
| 4 | Subject: [PATCH 16/19] OMAP2+: CPUfreq: Remove superfluous check in target() for online CPU's. | ||
| 5 | |||
| 6 | Current OMAP2PLUS CPUfreq tagret() functions returns when all | ||
| 7 | the CPU's are not online. This breaks CPUfreq when secondary CPUs | ||
| 8 | are offlined on SMP system. | ||
| 9 | |||
| 10 | The intention of that check was just avoid CPU frequency change | ||
| 11 | during the window when CPU becomes online but it's cpufreq_init is | ||
| 12 | not done yet. Otherwise it can lead to notifiers being sent on | ||
| 13 | a CPU which is not yet registered to the governor. | ||
| 14 | |||
| 15 | But this race conditions is already managed by the CPUfreq | ||
| 16 | core driver by updating the available cpumask accordingly. | ||
| 17 | |||
| 18 | OMAP CPUFReq driver make use same cpumask for the notifiers | ||
| 19 | so the above problem doesn't exist. In my initial implementation | ||
| 20 | of the OMAP4 CPUFreq driver, I was using 'for_each_online_cpu()' | ||
| 21 | for notifiers which lead me to add that check. Later I fixed | ||
| 22 | the notifies but didn't realise that the check has become | ||
| 23 | redundant then. | ||
| 24 | |||
| 25 | Fix it by removing the superfluous check in target(). | ||
| 26 | |||
| 27 | Thanks for Nishant Menon <nm@ti.com> for reporting issue | ||
| 28 | with hot-plug and Kevin Hilman <khilman@ti.com> for his | ||
| 29 | comment on excessive check in target(). | ||
| 30 | |||
| 31 | Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 32 | Reported-by: Nishanth Menon <nm@ti.com> | ||
| 33 | Tested-by: Vishwanath BS <vishwanath.bs@ti.com> | ||
| 34 | Cc: Kevin Hilman <khilman@ti.com> | ||
| 35 | Tested-by: Nishanth Menon <nm@ti.com> | ||
| 36 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 37 | --- | ||
| 38 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 4 ---- | ||
| 39 | 1 files changed, 0 insertions(+), 4 deletions(-) | ||
| 40 | |||
| 41 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 42 | index a962a31..eaefa49 100644 | ||
| 43 | --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 44 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 45 | @@ -70,10 +70,6 @@ static int omap_target(struct cpufreq_policy *policy, | ||
| 46 | int ret = 0; | ||
| 47 | struct cpufreq_freqs freqs; | ||
| 48 | |||
| 49 | - /* Changes not allowed until all CPUs are online */ | ||
| 50 | - if (is_smp() && (num_online_cpus() < NR_CPUS)) | ||
| 51 | - return ret; | ||
| 52 | - | ||
| 53 | if (!freq_table) { | ||
| 54 | dev_err(mpu_dev, "%s: cpu%d: no freq table!\n", __func__, | ||
| 55 | policy->cpu); | ||
| 56 | -- | ||
| 57 | 1.7.2.5 | ||
| 58 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0017-OMAP2-cpufreq-notify-even-with-bad-boot-frequency.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0017-OMAP2-cpufreq-notify-even-with-bad-boot-frequency.patch deleted file mode 100644 index b5e97349..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0017-OMAP2-cpufreq-notify-even-with-bad-boot-frequency.patch +++ /dev/null | |||
| @@ -1,48 +0,0 @@ | |||
| 1 | From 669ad0bf5d48d8675365a212f561f57bec4d9158 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Colin Cross <ccross@google.com> | ||
| 3 | Date: Mon, 6 Jun 2011 21:05:29 -0500 | ||
| 4 | Subject: [PATCH 17/19] OMAP2+: cpufreq: notify even with bad boot frequency | ||
| 5 | |||
| 6 | Sometimes, bootloaders starts up with a frequency which is not | ||
| 7 | in the OPP table. At cpu_init, policy->cur contains the frequency | ||
| 8 | we pick at boot. It is possible that system might have fixed | ||
| 9 | it's boot frequency later on as part of power initialization. | ||
| 10 | After this condition, the first call to omap_target results in the | ||
| 11 | following: | ||
| 12 | |||
| 13 | omap_getspeed(actual device frequency) != policy->cur(frequency that | ||
| 14 | cpufreq thinks that the system is at), and it is possible that | ||
| 15 | freqs.old == freqs.new (because the governor requested a scale down). | ||
| 16 | |||
| 17 | We exit without triggering the notifiers in the current code, which | ||
| 18 | does'nt let code which depends on cpufreq_notify_transition to have | ||
| 19 | accurate information as to what the system frequency is. | ||
| 20 | |||
| 21 | Instead, we do a normal transition if policy->cur is wrong, then, | ||
| 22 | freqs.old will be the actual cpu frequency, freqs.new will be the | ||
| 23 | actual new cpu frequency and all required notifiers have the accurate | ||
| 24 | information. | ||
| 25 | |||
| 26 | Acked-by: Nishanth Menon <nm@ti.com> | ||
| 27 | Signed-off-by: Colin Cross <ccross@google.com> | ||
| 28 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 29 | --- | ||
| 30 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 2 +- | ||
| 31 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 32 | |||
| 33 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 34 | index eaefa49..8598928 100644 | ||
| 35 | --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 36 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 37 | @@ -93,7 +93,7 @@ static int omap_target(struct cpufreq_policy *policy, | ||
| 38 | freqs.old = omap_getspeed(policy->cpu); | ||
| 39 | freqs.cpu = policy->cpu; | ||
| 40 | |||
| 41 | - if (freqs.old == freqs.new) | ||
| 42 | + if (freqs.old == freqs.new && policy->cur == freqs.new) | ||
| 43 | return ret; | ||
| 44 | |||
| 45 | if (!is_smp()) { | ||
| 46 | -- | ||
| 47 | 1.7.2.5 | ||
| 48 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0018-OMAP2-cpufreq-Enable-all-CPUs-in-shared-policy-mask.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0018-OMAP2-cpufreq-Enable-all-CPUs-in-shared-policy-mask.patch deleted file mode 100644 index 923e22f8..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0018-OMAP2-cpufreq-Enable-all-CPUs-in-shared-policy-mask.patch +++ /dev/null | |||
| @@ -1,42 +0,0 @@ | |||
| 1 | From 0d8c6a265f29587ab9c6df1c6bebe359a8d71d09 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Todd Poynor <toddpoynor@google.com> | ||
| 3 | Date: Tue, 7 Jun 2011 13:57:52 -0700 | ||
| 4 | Subject: [PATCH 18/19] OMAP2+: cpufreq: Enable all CPUs in shared policy mask | ||
| 5 | |||
| 6 | Enable all CPUs in the shared policy in the CPU init callback. | ||
| 7 | Otherwise, the governor CPUFREQ_GOV_START event is invoked with | ||
| 8 | a policy that only includes the first CPU, leaving other CPUs | ||
| 9 | uninitialized by the governor. | ||
| 10 | |||
| 11 | Signed-off-by: Todd Poynor <toddpoynor@google.com> | ||
| 12 | Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 13 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 4 +--- | ||
| 16 | 1 files changed, 1 insertions(+), 3 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 19 | index 8598928..1f3b2e1 100644 | ||
| 20 | --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 21 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 22 | @@ -159,7 +159,6 @@ static inline void freq_table_free(void) | ||
| 23 | static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 24 | { | ||
| 25 | int result = 0; | ||
| 26 | - static cpumask_var_t cpumask; | ||
| 27 | |||
| 28 | mpu_clk = clk_get(NULL, mpu_clk_name); | ||
| 29 | if (IS_ERR(mpu_clk)) | ||
| 30 | @@ -200,8 +199,7 @@ static int __cpuinit omap_cpu_init(struct cpufreq_policy *policy) | ||
| 31 | */ | ||
| 32 | if (is_smp()) { | ||
| 33 | policy->shared_type = CPUFREQ_SHARED_TYPE_ANY; | ||
| 34 | - cpumask_or(cpumask, cpumask_of(policy->cpu), cpumask); | ||
| 35 | - cpumask_copy(policy->cpus, cpumask); | ||
| 36 | + cpumask_setall(policy->cpus); | ||
| 37 | } | ||
| 38 | |||
| 39 | /* FIXME: what's the actual transition time? */ | ||
| 40 | -- | ||
| 41 | 1.7.2.5 | ||
| 42 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0019-OMAP2-CPUfreq-update-lpj-with-reference-value-to-avo.patch b/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0019-OMAP2-CPUfreq-update-lpj-with-reference-value-to-avo.patch deleted file mode 100644 index 85666bc0..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/cpufreq/0019-OMAP2-CPUfreq-update-lpj-with-reference-value-to-avo.patch +++ /dev/null | |||
| @@ -1,121 +0,0 @@ | |||
| 1 | From 550f74e2915393426e15c8d12695707253c8a91d Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Russell King <rmk+kernel@arm.linux.org.uk> | ||
| 3 | Date: Mon, 11 Jul 2011 23:10:04 +0530 | ||
| 4 | Subject: [PATCH 19/19] OMAP2+: CPUfreq: update lpj with reference value to avoid progressive error. | ||
| 5 | |||
| 6 | Adjust _both_ the per-cpu loops_per_jiffy and global lpj. Calibrate them | ||
| 7 | with with reference to the initial values to avoid a progressively | ||
| 8 | bigger and bigger error in the value over time. | ||
| 9 | |||
| 10 | While at this, re-use the notifiers for UP/SMP since on | ||
| 11 | UP machine or UP_ON_SMP policy->cpus mask would contain only | ||
| 12 | the boot CPU. | ||
| 13 | |||
| 14 | Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 15 | [santosh.shilimkar@ti.com: re-based against omap cpufreq | ||
| 16 | upstream branch and fixed notifiers] | ||
| 17 | Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> | ||
| 18 | Cc: Kevin Hilman <khilman@ti.com> | ||
| 19 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 20 | --- | ||
| 21 | arch/arm/mach-omap2/omap2plus-cpufreq.c | 50 ++++++++++++++++-------------- | ||
| 22 | 1 files changed, 27 insertions(+), 23 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/arch/arm/mach-omap2/omap2plus-cpufreq.c b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 25 | index 1f3b2e1..de82e87 100644 | ||
| 26 | --- a/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 27 | +++ b/arch/arm/mach-omap2/omap2plus-cpufreq.c | ||
| 28 | @@ -38,6 +38,16 @@ | ||
| 29 | |||
| 30 | #include <mach/hardware.h> | ||
| 31 | |||
| 32 | +#ifdef CONFIG_SMP | ||
| 33 | +struct lpj_info { | ||
| 34 | + unsigned long ref; | ||
| 35 | + unsigned int freq; | ||
| 36 | +}; | ||
| 37 | + | ||
| 38 | +static DEFINE_PER_CPU(struct lpj_info, lpj_ref); | ||
| 39 | +static struct lpj_info global_lpj_ref; | ||
| 40 | +#endif | ||
| 41 | + | ||
| 42 | static struct cpufreq_frequency_table *freq_table; | ||
| 43 | static atomic_t freq_table_users = ATOMIC_INIT(0); | ||
| 44 | static struct clk *mpu_clk; | ||
| 45 | @@ -96,37 +106,18 @@ static int omap_target(struct cpufreq_policy *policy, | ||
| 46 | if (freqs.old == freqs.new && policy->cur == freqs.new) | ||
| 47 | return ret; | ||
| 48 | |||
| 49 | - if (!is_smp()) { | ||
| 50 | - cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
| 51 | - goto set_freq; | ||
| 52 | - } | ||
| 53 | - | ||
| 54 | /* notifiers */ | ||
| 55 | for_each_cpu(i, policy->cpus) { | ||
| 56 | freqs.cpu = i; | ||
| 57 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
| 58 | } | ||
| 59 | |||
| 60 | -set_freq: | ||
| 61 | #ifdef CONFIG_CPU_FREQ_DEBUG | ||
| 62 | pr_info("cpufreq-omap: transition: %u --> %u\n", freqs.old, freqs.new); | ||
| 63 | #endif | ||
| 64 | |||
| 65 | ret = clk_set_rate(mpu_clk, freqs.new * 1000); | ||
| 66 | - | ||
| 67 | - /* | ||
| 68 | - * Generic CPUFREQ driver jiffy update is under !SMP. So jiffies | ||
| 69 | - * won't get updated when UP machine cpufreq build with | ||
| 70 | - * CONFIG_SMP enabled. Below code is added only to manage that | ||
| 71 | - * scenario | ||
| 72 | - */ | ||
| 73 | freqs.new = omap_getspeed(policy->cpu); | ||
| 74 | - if (!is_smp()) { | ||
| 75 | - loops_per_jiffy = | ||
| 76 | - cpufreq_scale(loops_per_jiffy, freqs.old, freqs.new); | ||
| 77 | - cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
| 78 | - goto skip_lpj; | ||
| 79 | - } | ||
| 80 | |||
| 81 | #ifdef CONFIG_SMP | ||
| 82 | /* | ||
| 83 | @@ -134,10 +125,24 @@ set_freq: | ||
| 84 | * cpufreq driver. So, update the per-CPU loops_per_jiffy value | ||
| 85 | * on frequency transition. We need to update all dependent CPUs. | ||
| 86 | */ | ||
| 87 | - for_each_cpu(i, policy->cpus) | ||
| 88 | + for_each_cpu(i, policy->cpus) { | ||
| 89 | + struct lpj_info *lpj = &per_cpu(lpj_ref, i); | ||
| 90 | + if (!lpj->freq) { | ||
| 91 | + lpj->ref = per_cpu(cpu_data, i).loops_per_jiffy; | ||
| 92 | + lpj->freq = freqs.old; | ||
| 93 | + } | ||
| 94 | + | ||
| 95 | per_cpu(cpu_data, i).loops_per_jiffy = | ||
| 96 | - cpufreq_scale(per_cpu(cpu_data, i).loops_per_jiffy, | ||
| 97 | - freqs.old, freqs.new); | ||
| 98 | + cpufreq_scale(lpj->ref, lpj->freq, freqs.new); | ||
| 99 | + } | ||
| 100 | + | ||
| 101 | + /* And don't forget to adjust the global one */ | ||
| 102 | + if (!global_lpj_ref.freq) { | ||
| 103 | + global_lpj_ref.ref = loops_per_jiffy; | ||
| 104 | + global_lpj_ref.freq = freqs.old; | ||
| 105 | + } | ||
| 106 | + loops_per_jiffy = cpufreq_scale(global_lpj_ref.ref, global_lpj_ref.freq, | ||
| 107 | + freqs.new); | ||
| 108 | #endif | ||
| 109 | |||
| 110 | /* notifiers */ | ||
| 111 | @@ -146,7 +151,6 @@ set_freq: | ||
| 112 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
| 113 | } | ||
| 114 | |||
| 115 | -skip_lpj: | ||
| 116 | return ret; | ||
| 117 | } | ||
| 118 | |||
| 119 | -- | ||
| 120 | 1.7.2.5 | ||
| 121 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0001-cleanup-regulator-supply-definitions-in-mach-omap2.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0001-cleanup-regulator-supply-definitions-in-mach-omap2.patch deleted file mode 100644 index e86ca6f2..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0001-cleanup-regulator-supply-definitions-in-mach-omap2.patch +++ /dev/null | |||
| @@ -1,1083 +0,0 @@ | |||
| 1 | From d95bccb7d0ad132153543bcc018e8da8aba1832d Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Oleg Drokin <green@linuxhacker.ru> | ||
| 3 | Date: Mon, 6 Jun 2011 18:57:07 +0000 | ||
| 4 | Subject: [PATCH 001/149] cleanup regulator supply definitions in mach-omap2 | ||
| 5 | |||
| 6 | to use REGULATOR_SUPPLY arrays. | ||
| 7 | |||
| 8 | CC: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 9 | CC: Mike Rapoport <mike@compulab.co.il> | ||
| 10 | CC: Nishant Kamat <nskamat@ti.com> | ||
| 11 | CC: Steve Sakoman <steve@sakoman.com> | ||
| 12 | CC: Felipe Balbi <balbi@ti.com> | ||
| 13 | CC: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 14 | CC: peter.barada@logicpd.com | ||
| 15 | Signed-off-by: Oleg Drokin <green@linuxhacker.ru> | ||
| 16 | Acked-by: Felipe Balbi <balbi@ti.com> | ||
| 17 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 18 | --- | ||
| 19 | arch/arm/mach-omap2/board-4430sdp.c | 13 ++---- | ||
| 20 | arch/arm/mach-omap2/board-cm-t35.c | 34 +++++++------- | ||
| 21 | arch/arm/mach-omap2/board-devkit8000.c | 28 ++++++----- | ||
| 22 | arch/arm/mach-omap2/board-igep0020.c | 27 ++++++----- | ||
| 23 | arch/arm/mach-omap2/board-ldp.c | 8 ++-- | ||
| 24 | arch/arm/mach-omap2/board-omap3beagle.c | 25 +++++----- | ||
| 25 | arch/arm/mach-omap2/board-omap3evm.c | 41 +++++++++-------- | ||
| 26 | arch/arm/mach-omap2/board-omap3logic.c | 8 ++-- | ||
| 27 | arch/arm/mach-omap2/board-omap3pandora.c | 63 ++++++++++++++----------- | ||
| 28 | arch/arm/mach-omap2/board-omap3stalker.c | 25 +++++----- | ||
| 29 | arch/arm/mach-omap2/board-omap3touchbook.c | 32 +++++++------ | ||
| 30 | arch/arm/mach-omap2/board-omap4panda.c | 16 +++---- | ||
| 31 | arch/arm/mach-omap2/board-overo.c | 26 ++++++----- | ||
| 32 | arch/arm/mach-omap2/board-rx51-peripherals.c | 29 +++++++----- | ||
| 33 | arch/arm/mach-omap2/board-zoom-peripherals.c | 42 +++++++++--------- | ||
| 34 | 15 files changed, 218 insertions(+), 199 deletions(-) | ||
| 35 | |||
| 36 | diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c | ||
| 37 | index 63de2d3..39a8062 100644 | ||
| 38 | --- a/arch/arm/mach-omap2/board-4430sdp.c | ||
| 39 | +++ b/arch/arm/mach-omap2/board-4430sdp.c | ||
| 40 | @@ -333,16 +333,11 @@ static struct omap2_hsmmc_info mmc[] = { | ||
| 41 | }; | ||
| 42 | |||
| 43 | static struct regulator_consumer_supply sdp4430_vaux_supply[] = { | ||
| 44 | - { | ||
| 45 | - .supply = "vmmc", | ||
| 46 | - .dev_name = "omap_hsmmc.1", | ||
| 47 | - }, | ||
| 48 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | ||
| 49 | }; | ||
| 50 | + | ||
| 51 | static struct regulator_consumer_supply sdp4430_vmmc_supply[] = { | ||
| 52 | - { | ||
| 53 | - .supply = "vmmc", | ||
| 54 | - .dev_name = "omap_hsmmc.0", | ||
| 55 | - }, | ||
| 56 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 57 | }; | ||
| 58 | |||
| 59 | static int omap4_twl6030_hsmmc_late_init(struct device *dev) | ||
| 60 | @@ -399,7 +394,7 @@ static struct regulator_init_data sdp4430_vaux1 = { | ||
| 61 | | REGULATOR_CHANGE_MODE | ||
| 62 | | REGULATOR_CHANGE_STATUS, | ||
| 63 | }, | ||
| 64 | - .num_consumer_supplies = 1, | ||
| 65 | + .num_consumer_supplies = ARRAY_SIZE(sdp4430_vaux_supply), | ||
| 66 | .consumer_supplies = sdp4430_vaux_supply, | ||
| 67 | }; | ||
| 68 | |||
| 69 | diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 70 | index 77456de..e7bf32d 100644 | ||
| 71 | --- a/arch/arm/mach-omap2/board-cm-t35.c | ||
| 72 | +++ b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 73 | @@ -337,19 +337,21 @@ static void __init cm_t35_init_display(void) | ||
| 74 | } | ||
| 75 | } | ||
| 76 | |||
| 77 | -static struct regulator_consumer_supply cm_t35_vmmc1_supply = { | ||
| 78 | - .supply = "vmmc", | ||
| 79 | +static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = { | ||
| 80 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 81 | }; | ||
| 82 | |||
| 83 | -static struct regulator_consumer_supply cm_t35_vsim_supply = { | ||
| 84 | - .supply = "vmmc_aux", | ||
| 85 | +static struct regulator_consumer_supply cm_t35_vsim_supply[] = { | ||
| 86 | + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), | ||
| 87 | }; | ||
| 88 | |||
| 89 | -static struct regulator_consumer_supply cm_t35_vdac_supply = | ||
| 90 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); | ||
| 91 | +static struct regulator_consumer_supply cm_t35_vdac_supply[] = { | ||
| 92 | + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 93 | +}; | ||
| 94 | |||
| 95 | -static struct regulator_consumer_supply cm_t35_vdvi_supply = | ||
| 96 | - REGULATOR_SUPPLY("vdvi", "omapdss"); | ||
| 97 | +static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { | ||
| 98 | + REGULATOR_SUPPLY("vdvi", "omapdss"), | ||
| 99 | +}; | ||
| 100 | |||
| 101 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | ||
| 102 | static struct regulator_init_data cm_t35_vmmc1 = { | ||
| 103 | @@ -362,8 +364,8 @@ static struct regulator_init_data cm_t35_vmmc1 = { | ||
| 104 | | REGULATOR_CHANGE_MODE | ||
| 105 | | REGULATOR_CHANGE_STATUS, | ||
| 106 | }, | ||
| 107 | - .num_consumer_supplies = 1, | ||
| 108 | - .consumer_supplies = &cm_t35_vmmc1_supply, | ||
| 109 | + .num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply), | ||
| 110 | + .consumer_supplies = cm_t35_vmmc1_supply, | ||
| 111 | }; | ||
| 112 | |||
| 113 | /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ | ||
| 114 | @@ -377,8 +379,8 @@ static struct regulator_init_data cm_t35_vsim = { | ||
| 115 | | REGULATOR_CHANGE_MODE | ||
| 116 | | REGULATOR_CHANGE_STATUS, | ||
| 117 | }, | ||
| 118 | - .num_consumer_supplies = 1, | ||
| 119 | - .consumer_supplies = &cm_t35_vsim_supply, | ||
| 120 | + .num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply), | ||
| 121 | + .consumer_supplies = cm_t35_vsim_supply, | ||
| 122 | }; | ||
| 123 | |||
| 124 | /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ | ||
| 125 | @@ -391,8 +393,8 @@ static struct regulator_init_data cm_t35_vdac = { | ||
| 126 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 127 | | REGULATOR_CHANGE_STATUS, | ||
| 128 | }, | ||
| 129 | - .num_consumer_supplies = 1, | ||
| 130 | - .consumer_supplies = &cm_t35_vdac_supply, | ||
| 131 | + .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdac_supply), | ||
| 132 | + .consumer_supplies = cm_t35_vdac_supply, | ||
| 133 | }; | ||
| 134 | |||
| 135 | /* VPLL2 for digital video outputs */ | ||
| 136 | @@ -406,8 +408,8 @@ static struct regulator_init_data cm_t35_vpll2 = { | ||
| 137 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 138 | | REGULATOR_CHANGE_STATUS, | ||
| 139 | }, | ||
| 140 | - .num_consumer_supplies = 1, | ||
| 141 | - .consumer_supplies = &cm_t35_vdvi_supply, | ||
| 142 | + .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdvi_supply), | ||
| 143 | + .consumer_supplies = cm_t35_vdvi_supply, | ||
| 144 | }; | ||
| 145 | |||
| 146 | static struct twl4030_usb_data cm_t35_usb_data = { | ||
| 147 | diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c | ||
| 148 | index 34956ec..ead9c1d 100644 | ||
| 149 | --- a/arch/arm/mach-omap2/board-devkit8000.c | ||
| 150 | +++ b/arch/arm/mach-omap2/board-devkit8000.c | ||
| 151 | @@ -130,13 +130,14 @@ static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev) | ||
| 152 | gpio_set_value_cansleep(dssdev->reset_gpio, 0); | ||
| 153 | } | ||
| 154 | |||
| 155 | -static struct regulator_consumer_supply devkit8000_vmmc1_supply = | ||
| 156 | - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); | ||
| 157 | - | ||
| 158 | +static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = { | ||
| 159 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 160 | +}; | ||
| 161 | |||
| 162 | /* ads7846 on SPI */ | ||
| 163 | -static struct regulator_consumer_supply devkit8000_vio_supply = | ||
| 164 | - REGULATOR_SUPPLY("vcc", "spi2.0"); | ||
| 165 | +static struct regulator_consumer_supply devkit8000_vio_supply[] = { | ||
| 166 | + REGULATOR_SUPPLY("vcc", "spi2.0"), | ||
| 167 | +}; | ||
| 168 | |||
| 169 | static struct panel_generic_dpi_data lcd_panel = { | ||
| 170 | .name = "generic", | ||
| 171 | @@ -186,8 +187,9 @@ static struct omap_dss_board_info devkit8000_dss_data = { | ||
| 172 | .default_device = &devkit8000_lcd_device, | ||
| 173 | }; | ||
| 174 | |||
| 175 | -static struct regulator_consumer_supply devkit8000_vdda_dac_supply = | ||
| 176 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); | ||
| 177 | +static struct regulator_consumer_supply devkit8000_vdda_dac_supply[] = { | ||
| 178 | + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 179 | +}; | ||
| 180 | |||
| 181 | static uint32_t board_keymap[] = { | ||
| 182 | KEY(0, 0, KEY_1), | ||
| 183 | @@ -284,8 +286,8 @@ static struct regulator_init_data devkit8000_vmmc1 = { | ||
| 184 | | REGULATOR_CHANGE_MODE | ||
| 185 | | REGULATOR_CHANGE_STATUS, | ||
| 186 | }, | ||
| 187 | - .num_consumer_supplies = 1, | ||
| 188 | - .consumer_supplies = &devkit8000_vmmc1_supply, | ||
| 189 | + .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply), | ||
| 190 | + .consumer_supplies = devkit8000_vmmc1_supply, | ||
| 191 | }; | ||
| 192 | |||
| 193 | /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ | ||
| 194 | @@ -298,8 +300,8 @@ static struct regulator_init_data devkit8000_vdac = { | ||
| 195 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 196 | | REGULATOR_CHANGE_STATUS, | ||
| 197 | }, | ||
| 198 | - .num_consumer_supplies = 1, | ||
| 199 | - .consumer_supplies = &devkit8000_vdda_dac_supply, | ||
| 200 | + .num_consumer_supplies = ARRAY_SIZE(devkit8000_vdda_dac_supply), | ||
| 201 | + .consumer_supplies = devkit8000_vdda_dac_supply, | ||
| 202 | }; | ||
| 203 | |||
| 204 | /* VPLL1 for digital video outputs */ | ||
| 205 | @@ -327,8 +329,8 @@ static struct regulator_init_data devkit8000_vio = { | ||
| 206 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 207 | | REGULATOR_CHANGE_STATUS, | ||
| 208 | }, | ||
| 209 | - .num_consumer_supplies = 1, | ||
| 210 | - .consumer_supplies = &devkit8000_vio_supply, | ||
| 211 | + .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply), | ||
| 212 | + .consumer_supplies = devkit8000_vio_supply, | ||
| 213 | }; | ||
| 214 | |||
| 215 | static struct twl4030_usb_data devkit8000_usb_data = { | ||
| 216 | diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c | ||
| 217 | index 0c1bfca..84d2846 100644 | ||
| 218 | --- a/arch/arm/mach-omap2/board-igep0020.c | ||
| 219 | +++ b/arch/arm/mach-omap2/board-igep0020.c | ||
| 220 | @@ -222,8 +222,9 @@ static inline void __init igep2_init_smsc911x(void) | ||
| 221 | static inline void __init igep2_init_smsc911x(void) { } | ||
| 222 | #endif | ||
| 223 | |||
| 224 | -static struct regulator_consumer_supply igep_vmmc1_supply = | ||
| 225 | - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); | ||
| 226 | +static struct regulator_consumer_supply igep_vmmc1_supply[] = { | ||
| 227 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 228 | +}; | ||
| 229 | |||
| 230 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ | ||
| 231 | static struct regulator_init_data igep_vmmc1 = { | ||
| 232 | @@ -236,12 +237,13 @@ static struct regulator_init_data igep_vmmc1 = { | ||
| 233 | | REGULATOR_CHANGE_MODE | ||
| 234 | | REGULATOR_CHANGE_STATUS, | ||
| 235 | }, | ||
| 236 | - .num_consumer_supplies = 1, | ||
| 237 | - .consumer_supplies = &igep_vmmc1_supply, | ||
| 238 | + .num_consumer_supplies = ARRAY_SIZE(igep_vmmc1_supply), | ||
| 239 | + .consumer_supplies = igep_vmmc1_supply, | ||
| 240 | }; | ||
| 241 | |||
| 242 | -static struct regulator_consumer_supply igep_vio_supply = | ||
| 243 | - REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); | ||
| 244 | +static struct regulator_consumer_supply igep_vio_supply[] = { | ||
| 245 | + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), | ||
| 246 | +}; | ||
| 247 | |||
| 248 | static struct regulator_init_data igep_vio = { | ||
| 249 | .constraints = { | ||
| 250 | @@ -254,20 +256,21 @@ static struct regulator_init_data igep_vio = { | ||
| 251 | | REGULATOR_CHANGE_MODE | ||
| 252 | | REGULATOR_CHANGE_STATUS, | ||
| 253 | }, | ||
| 254 | - .num_consumer_supplies = 1, | ||
| 255 | - .consumer_supplies = &igep_vio_supply, | ||
| 256 | + .num_consumer_supplies = ARRAY_SIZE(igep_vio_supply), | ||
| 257 | + .consumer_supplies = igep_vio_supply, | ||
| 258 | }; | ||
| 259 | |||
| 260 | -static struct regulator_consumer_supply igep_vmmc2_supply = | ||
| 261 | - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); | ||
| 262 | +static struct regulator_consumer_supply igep_vmmc2_supply[] = { | ||
| 263 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | ||
| 264 | +}; | ||
| 265 | |||
| 266 | static struct regulator_init_data igep_vmmc2 = { | ||
| 267 | .constraints = { | ||
| 268 | .valid_modes_mask = REGULATOR_MODE_NORMAL, | ||
| 269 | .always_on = 1, | ||
| 270 | }, | ||
| 271 | - .num_consumer_supplies = 1, | ||
| 272 | - .consumer_supplies = &igep_vmmc2_supply, | ||
| 273 | + .num_consumer_supplies = ARRAY_SIZE(igep_vmmc2_supply), | ||
| 274 | + .consumer_supplies = igep_vmmc2_supply, | ||
| 275 | }; | ||
| 276 | |||
| 277 | static struct fixed_voltage_config igep_vwlan = { | ||
| 278 | diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c | ||
| 279 | index f7d6038..069bc9f 100644 | ||
| 280 | --- a/arch/arm/mach-omap2/board-ldp.c | ||
| 281 | +++ b/arch/arm/mach-omap2/board-ldp.c | ||
| 282 | @@ -213,8 +213,8 @@ static struct twl4030_madc_platform_data ldp_madc_data = { | ||
| 283 | .irq_line = 1, | ||
| 284 | }; | ||
| 285 | |||
| 286 | -static struct regulator_consumer_supply ldp_vmmc1_supply = { | ||
| 287 | - .supply = "vmmc", | ||
| 288 | +static struct regulator_consumer_supply ldp_vmmc1_supply[] = { | ||
| 289 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 290 | }; | ||
| 291 | |||
| 292 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | ||
| 293 | @@ -228,8 +228,8 @@ static struct regulator_init_data ldp_vmmc1 = { | ||
| 294 | | REGULATOR_CHANGE_MODE | ||
| 295 | | REGULATOR_CHANGE_STATUS, | ||
| 296 | }, | ||
| 297 | - .num_consumer_supplies = 1, | ||
| 298 | - .consumer_supplies = &ldp_vmmc1_supply, | ||
| 299 | + .num_consumer_supplies = ARRAY_SIZE(ldp_vmmc1_supply), | ||
| 300 | + .consumer_supplies = ldp_vmmc1_supply, | ||
| 301 | }; | ||
| 302 | |||
| 303 | /* ads7846 on SPI */ | ||
| 304 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 305 | index 7f21d24..4cf7c19 100644 | ||
| 306 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 307 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 308 | @@ -210,8 +210,9 @@ static struct omap_dss_board_info beagle_dss_data = { | ||
| 309 | .default_device = &beagle_dvi_device, | ||
| 310 | }; | ||
| 311 | |||
| 312 | -static struct regulator_consumer_supply beagle_vdac_supply = | ||
| 313 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); | ||
| 314 | +static struct regulator_consumer_supply beagle_vdac_supply[] = { | ||
| 315 | + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 316 | +}; | ||
| 317 | |||
| 318 | static struct regulator_consumer_supply beagle_vdvi_supplies[] = { | ||
| 319 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | ||
| 320 | @@ -239,12 +240,12 @@ static struct omap2_hsmmc_info mmc[] = { | ||
| 321 | {} /* Terminator */ | ||
| 322 | }; | ||
| 323 | |||
| 324 | -static struct regulator_consumer_supply beagle_vmmc1_supply = { | ||
| 325 | - .supply = "vmmc", | ||
| 326 | +static struct regulator_consumer_supply beagle_vmmc1_supply[] = { | ||
| 327 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 328 | }; | ||
| 329 | |||
| 330 | -static struct regulator_consumer_supply beagle_vsim_supply = { | ||
| 331 | - .supply = "vmmc_aux", | ||
| 332 | +static struct regulator_consumer_supply beagle_vsim_supply[] = { | ||
| 333 | + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), | ||
| 334 | }; | ||
| 335 | |||
| 336 | static struct gpio_led gpio_leds[]; | ||
| 337 | @@ -336,8 +337,8 @@ static struct regulator_init_data beagle_vmmc1 = { | ||
| 338 | | REGULATOR_CHANGE_MODE | ||
| 339 | | REGULATOR_CHANGE_STATUS, | ||
| 340 | }, | ||
| 341 | - .num_consumer_supplies = 1, | ||
| 342 | - .consumer_supplies = &beagle_vmmc1_supply, | ||
| 343 | + .num_consumer_supplies = ARRAY_SIZE(beagle_vmmc1_supply), | ||
| 344 | + .consumer_supplies = beagle_vmmc1_supply, | ||
| 345 | }; | ||
| 346 | |||
| 347 | /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ | ||
| 348 | @@ -351,8 +352,8 @@ static struct regulator_init_data beagle_vsim = { | ||
| 349 | | REGULATOR_CHANGE_MODE | ||
| 350 | | REGULATOR_CHANGE_STATUS, | ||
| 351 | }, | ||
| 352 | - .num_consumer_supplies = 1, | ||
| 353 | - .consumer_supplies = &beagle_vsim_supply, | ||
| 354 | + .num_consumer_supplies = ARRAY_SIZE(beagle_vsim_supply), | ||
| 355 | + .consumer_supplies = beagle_vsim_supply, | ||
| 356 | }; | ||
| 357 | |||
| 358 | /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ | ||
| 359 | @@ -365,8 +366,8 @@ static struct regulator_init_data beagle_vdac = { | ||
| 360 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 361 | | REGULATOR_CHANGE_STATUS, | ||
| 362 | }, | ||
| 363 | - .num_consumer_supplies = 1, | ||
| 364 | - .consumer_supplies = &beagle_vdac_supply, | ||
| 365 | + .num_consumer_supplies = ARRAY_SIZE(beagle_vdac_supply), | ||
| 366 | + .consumer_supplies = beagle_vdac_supply, | ||
| 367 | }; | ||
| 368 | |||
| 369 | /* VPLL2 for digital video outputs */ | ||
| 370 | diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 371 | index b4d43464..fc7a23a 100644 | ||
| 372 | --- a/arch/arm/mach-omap2/board-omap3evm.c | ||
| 373 | +++ b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 374 | @@ -273,12 +273,12 @@ static struct omap_dss_board_info omap3_evm_dss_data = { | ||
| 375 | .default_device = &omap3_evm_lcd_device, | ||
| 376 | }; | ||
| 377 | |||
| 378 | -static struct regulator_consumer_supply omap3evm_vmmc1_supply = { | ||
| 379 | - .supply = "vmmc", | ||
| 380 | +static struct regulator_consumer_supply omap3evm_vmmc1_supply[] = { | ||
| 381 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 382 | }; | ||
| 383 | |||
| 384 | -static struct regulator_consumer_supply omap3evm_vsim_supply = { | ||
| 385 | - .supply = "vmmc_aux", | ||
| 386 | +static struct regulator_consumer_supply omap3evm_vsim_supply[] = { | ||
| 387 | + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), | ||
| 388 | }; | ||
| 389 | |||
| 390 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | ||
| 391 | @@ -292,8 +292,8 @@ static struct regulator_init_data omap3evm_vmmc1 = { | ||
| 392 | | REGULATOR_CHANGE_MODE | ||
| 393 | | REGULATOR_CHANGE_STATUS, | ||
| 394 | }, | ||
| 395 | - .num_consumer_supplies = 1, | ||
| 396 | - .consumer_supplies = &omap3evm_vmmc1_supply, | ||
| 397 | + .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc1_supply), | ||
| 398 | + .consumer_supplies = omap3evm_vmmc1_supply, | ||
| 399 | }; | ||
| 400 | |||
| 401 | /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ | ||
| 402 | @@ -307,8 +307,8 @@ static struct regulator_init_data omap3evm_vsim = { | ||
| 403 | | REGULATOR_CHANGE_MODE | ||
| 404 | | REGULATOR_CHANGE_STATUS, | ||
| 405 | }, | ||
| 406 | - .num_consumer_supplies = 1, | ||
| 407 | - .consumer_supplies = &omap3evm_vsim_supply, | ||
| 408 | + .num_consumer_supplies = ARRAY_SIZE(omap3evm_vsim_supply), | ||
| 409 | + .consumer_supplies = omap3evm_vsim_supply, | ||
| 410 | }; | ||
| 411 | |||
| 412 | static struct omap2_hsmmc_info mmc[] = { | ||
| 413 | @@ -449,8 +449,9 @@ static struct twl4030_codec_data omap3evm_codec_data = { | ||
| 414 | .audio = &omap3evm_audio_data, | ||
| 415 | }; | ||
| 416 | |||
| 417 | -static struct regulator_consumer_supply omap3_evm_vdda_dac_supply = | ||
| 418 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); | ||
| 419 | +static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = { | ||
| 420 | + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 421 | +}; | ||
| 422 | |||
| 423 | /* VDAC for DSS driving S-Video */ | ||
| 424 | static struct regulator_init_data omap3_evm_vdac = { | ||
| 425 | @@ -463,8 +464,8 @@ static struct regulator_init_data omap3_evm_vdac = { | ||
| 426 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 427 | | REGULATOR_CHANGE_STATUS, | ||
| 428 | }, | ||
| 429 | - .num_consumer_supplies = 1, | ||
| 430 | - .consumer_supplies = &omap3_evm_vdda_dac_supply, | ||
| 431 | + .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vdda_dac_supply), | ||
| 432 | + .consumer_supplies = omap3_evm_vdda_dac_supply, | ||
| 433 | }; | ||
| 434 | |||
| 435 | /* VPLL2 for digital video outputs */ | ||
| 436 | @@ -488,8 +489,9 @@ static struct regulator_init_data omap3_evm_vpll2 = { | ||
| 437 | }; | ||
| 438 | |||
| 439 | /* ads7846 on SPI */ | ||
| 440 | -static struct regulator_consumer_supply omap3evm_vio_supply = | ||
| 441 | - REGULATOR_SUPPLY("vcc", "spi1.0"); | ||
| 442 | +static struct regulator_consumer_supply omap3evm_vio_supply[] = { | ||
| 443 | + REGULATOR_SUPPLY("vcc", "spi1.0"), | ||
| 444 | +}; | ||
| 445 | |||
| 446 | /* VIO for ads7846 */ | ||
| 447 | static struct regulator_init_data omap3evm_vio = { | ||
| 448 | @@ -502,8 +504,8 @@ static struct regulator_init_data omap3evm_vio = { | ||
| 449 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 450 | | REGULATOR_CHANGE_STATUS, | ||
| 451 | }, | ||
| 452 | - .num_consumer_supplies = 1, | ||
| 453 | - .consumer_supplies = &omap3evm_vio_supply, | ||
| 454 | + .num_consumer_supplies = ARRAY_SIZE(omap3evm_vio_supply), | ||
| 455 | + .consumer_supplies = omap3evm_vio_supply, | ||
| 456 | }; | ||
| 457 | |||
| 458 | #ifdef CONFIG_WL12XX_PLATFORM_DATA | ||
| 459 | @@ -511,16 +513,17 @@ static struct regulator_init_data omap3evm_vio = { | ||
| 460 | #define OMAP3EVM_WLAN_PMENA_GPIO (150) | ||
| 461 | #define OMAP3EVM_WLAN_IRQ_GPIO (149) | ||
| 462 | |||
| 463 | -static struct regulator_consumer_supply omap3evm_vmmc2_supply = | ||
| 464 | +static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = { | ||
| 465 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); | ||
| 466 | +}; | ||
| 467 | |||
| 468 | /* VMMC2 for driving the WL12xx module */ | ||
| 469 | static struct regulator_init_data omap3evm_vmmc2 = { | ||
| 470 | .constraints = { | ||
| 471 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
| 472 | }, | ||
| 473 | - .num_consumer_supplies = 1, | ||
| 474 | - .consumer_supplies = &omap3evm_vmmc2_supply, | ||
| 475 | + .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply);, | ||
| 476 | + .consumer_supplies = omap3evm_vmmc2_supply, | ||
| 477 | }; | ||
| 478 | |||
| 479 | static struct fixed_voltage_config omap3evm_vwlan = { | ||
| 480 | diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c | ||
| 481 | index 60d9be4..ec18435 100644 | ||
| 482 | --- a/arch/arm/mach-omap2/board-omap3logic.c | ||
| 483 | +++ b/arch/arm/mach-omap2/board-omap3logic.c | ||
| 484 | @@ -55,8 +55,8 @@ | ||
| 485 | #define OMAP3_TORPEDO_MMC_GPIO_CD 127 | ||
| 486 | #define OMAP3_TORPEDO_SMSC911X_GPIO_IRQ 129 | ||
| 487 | |||
| 488 | -static struct regulator_consumer_supply omap3logic_vmmc1_supply = { | ||
| 489 | - .supply = "vmmc", | ||
| 490 | +static struct regulator_consumer_supply omap3logic_vmmc1_supply[] = { | ||
| 491 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 492 | }; | ||
| 493 | |||
| 494 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | ||
| 495 | @@ -71,8 +71,8 @@ static struct regulator_init_data omap3logic_vmmc1 = { | ||
| 496 | | REGULATOR_CHANGE_MODE | ||
| 497 | | REGULATOR_CHANGE_STATUS, | ||
| 498 | }, | ||
| 499 | - .num_consumer_supplies = 1, | ||
| 500 | - .consumer_supplies = &omap3logic_vmmc1_supply, | ||
| 501 | + .num_consumer_supplies = ARRAY_SIZE(omap3logic_vmmc1_supply), | ||
| 502 | + .consumer_supplies = omap3logic_vmmc1_supply, | ||
| 503 | }; | ||
| 504 | |||
| 505 | static struct twl4030_gpio_platform_data omap3logic_gpio_data = { | ||
| 506 | diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 507 | index 23f71d4..130a278 100644 | ||
| 508 | --- a/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 509 | +++ b/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 510 | @@ -320,17 +320,21 @@ static struct twl4030_gpio_platform_data omap3pandora_gpio_data = { | ||
| 511 | .setup = omap3pandora_twl_gpio_setup, | ||
| 512 | }; | ||
| 513 | |||
| 514 | -static struct regulator_consumer_supply pandora_vmmc1_supply = | ||
| 515 | - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); | ||
| 516 | +static struct regulator_consumer_supply pandora_vmmc1_supply[] = { | ||
| 517 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 518 | +}; | ||
| 519 | |||
| 520 | -static struct regulator_consumer_supply pandora_vmmc2_supply = | ||
| 521 | - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); | ||
| 522 | +static struct regulator_consumer_supply pandora_vmmc2_supply[] = { | ||
| 523 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1") | ||
| 524 | +}; | ||
| 525 | |||
| 526 | -static struct regulator_consumer_supply pandora_vmmc3_supply = | ||
| 527 | - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"); | ||
| 528 | +static struct regulator_consumer_supply pandora_vmmc3_supply[] = { | ||
| 529 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"), | ||
| 530 | +}; | ||
| 531 | |||
| 532 | -static struct regulator_consumer_supply pandora_vdda_dac_supply = | ||
| 533 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); | ||
| 534 | +static struct regulator_consumer_supply pandora_vdda_dac_supply[] = { | ||
| 535 | + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 536 | +}; | ||
| 537 | |||
| 538 | static struct regulator_consumer_supply pandora_vdds_supplies[] = { | ||
| 539 | REGULATOR_SUPPLY("vdds_sdi", "omapdss"), | ||
| 540 | @@ -338,11 +342,13 @@ static struct regulator_consumer_supply pandora_vdds_supplies[] = { | ||
| 541 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | ||
| 542 | }; | ||
| 543 | |||
| 544 | -static struct regulator_consumer_supply pandora_vcc_lcd_supply = | ||
| 545 | - REGULATOR_SUPPLY("vcc", "display0"); | ||
| 546 | +static struct regulator_consumer_supply pandora_vcc_lcd_supply[] = { | ||
| 547 | + REGULATOR_SUPPLY("vcc", "display0"), | ||
| 548 | +}; | ||
| 549 | |||
| 550 | -static struct regulator_consumer_supply pandora_usb_phy_supply = | ||
| 551 | - REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"); | ||
| 552 | +static struct regulator_consumer_supply pandora_usb_phy_supply[] = { | ||
| 553 | + REGULATOR_SUPPLY("hsusb0", "ehci-omap.0"), | ||
| 554 | +}; | ||
| 555 | |||
| 556 | /* ads7846 on SPI and 2 nub controllers on I2C */ | ||
| 557 | static struct regulator_consumer_supply pandora_vaux4_supplies[] = { | ||
| 558 | @@ -351,8 +357,9 @@ static struct regulator_consumer_supply pandora_vaux4_supplies[] = { | ||
| 559 | REGULATOR_SUPPLY("vcc", "3-0067"), | ||
| 560 | }; | ||
| 561 | |||
| 562 | -static struct regulator_consumer_supply pandora_adac_supply = | ||
| 563 | - REGULATOR_SUPPLY("vcc", "soc-audio"); | ||
| 564 | +static struct regulator_consumer_supply pandora_adac_supply[] = { | ||
| 565 | + REGULATOR_SUPPLY("vcc", "soc-audio"), | ||
| 566 | +}; | ||
| 567 | |||
| 568 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | ||
| 569 | static struct regulator_init_data pandora_vmmc1 = { | ||
| 570 | @@ -365,8 +372,8 @@ static struct regulator_init_data pandora_vmmc1 = { | ||
| 571 | | REGULATOR_CHANGE_MODE | ||
| 572 | | REGULATOR_CHANGE_STATUS, | ||
| 573 | }, | ||
| 574 | - .num_consumer_supplies = 1, | ||
| 575 | - .consumer_supplies = &pandora_vmmc1_supply, | ||
| 576 | + .num_consumer_supplies = ARRAY_SIZE(pandora_vmmc1_supply), | ||
| 577 | + .consumer_supplies = pandora_vmmc1_supply, | ||
| 578 | }; | ||
| 579 | |||
| 580 | /* VMMC2 for MMC2 pins CMD, CLK, DAT0..DAT3 (max 100 mA) */ | ||
| 581 | @@ -380,8 +387,8 @@ static struct regulator_init_data pandora_vmmc2 = { | ||
| 582 | | REGULATOR_CHANGE_MODE | ||
| 583 | | REGULATOR_CHANGE_STATUS, | ||
| 584 | }, | ||
| 585 | - .num_consumer_supplies = 1, | ||
| 586 | - .consumer_supplies = &pandora_vmmc2_supply, | ||
| 587 | + .num_consumer_supplies = ARRAY_SIZE(pandora_vmmc2_supply), | ||
| 588 | + .consumer_supplies = pandora_vmmc2_supply, | ||
| 589 | }; | ||
| 590 | |||
| 591 | /* VDAC for DSS driving S-Video */ | ||
| 592 | @@ -395,8 +402,8 @@ static struct regulator_init_data pandora_vdac = { | ||
| 593 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 594 | | REGULATOR_CHANGE_STATUS, | ||
| 595 | }, | ||
| 596 | - .num_consumer_supplies = 1, | ||
| 597 | - .consumer_supplies = &pandora_vdda_dac_supply, | ||
| 598 | + .num_consumer_supplies = ARRAY_SIZE(pandora_vdda_dac_supply), | ||
| 599 | + .consumer_supplies = pandora_vdda_dac_supply, | ||
| 600 | }; | ||
| 601 | |||
| 602 | /* VPLL2 for digital video outputs */ | ||
| 603 | @@ -425,8 +432,8 @@ static struct regulator_init_data pandora_vaux1 = { | ||
| 604 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 605 | | REGULATOR_CHANGE_STATUS, | ||
| 606 | }, | ||
| 607 | - .num_consumer_supplies = 1, | ||
| 608 | - .consumer_supplies = &pandora_vcc_lcd_supply, | ||
| 609 | + .num_consumer_supplies = ARRAY_SIZE(pandora_vcc_lcd_supply), | ||
| 610 | + .consumer_supplies = pandora_vcc_lcd_supply, | ||
| 611 | }; | ||
| 612 | |||
| 613 | /* VAUX2 for USB host PHY */ | ||
| 614 | @@ -440,8 +447,8 @@ static struct regulator_init_data pandora_vaux2 = { | ||
| 615 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 616 | | REGULATOR_CHANGE_STATUS, | ||
| 617 | }, | ||
| 618 | - .num_consumer_supplies = 1, | ||
| 619 | - .consumer_supplies = &pandora_usb_phy_supply, | ||
| 620 | + .num_consumer_supplies = ARRAY_SIZE(pandora_usb_phy_supply), | ||
| 621 | + .consumer_supplies = pandora_usb_phy_supply, | ||
| 622 | }; | ||
| 623 | |||
| 624 | /* VAUX4 for ads7846 and nubs */ | ||
| 625 | @@ -470,8 +477,8 @@ static struct regulator_init_data pandora_vsim = { | ||
| 626 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 627 | | REGULATOR_CHANGE_STATUS, | ||
| 628 | }, | ||
| 629 | - .num_consumer_supplies = 1, | ||
| 630 | - .consumer_supplies = &pandora_adac_supply, | ||
| 631 | + .num_consumer_supplies = ARRAY_SIZE(pandora_adac_supply), | ||
| 632 | + .consumer_supplies = pandora_adac_supply, | ||
| 633 | }; | ||
| 634 | |||
| 635 | /* Fixed regulator internal to Wifi module */ | ||
| 636 | @@ -479,8 +486,8 @@ static struct regulator_init_data pandora_vmmc3 = { | ||
| 637 | .constraints = { | ||
| 638 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
| 639 | }, | ||
| 640 | - .num_consumer_supplies = 1, | ||
| 641 | - .consumer_supplies = &pandora_vmmc3_supply, | ||
| 642 | + .num_consumer_supplies = ARRAY_SIZE(pandora_vmmc3_supply), | ||
| 643 | + .consumer_supplies = pandora_vmmc3_supply, | ||
| 644 | }; | ||
| 645 | |||
| 646 | static struct fixed_voltage_config pandora_vwlan = { | ||
| 647 | diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 648 | index 0c108a2..99be540 100644 | ||
| 649 | --- a/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 650 | +++ b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 651 | @@ -206,12 +206,12 @@ static struct omap_dss_board_info omap3_stalker_dss_data = { | ||
| 652 | .default_device = &omap3_stalker_dvi_device, | ||
| 653 | }; | ||
| 654 | |||
| 655 | -static struct regulator_consumer_supply omap3stalker_vmmc1_supply = { | ||
| 656 | - .supply = "vmmc", | ||
| 657 | +static struct regulator_consumer_supply omap3stalker_vmmc1_supply[] = { | ||
| 658 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 659 | }; | ||
| 660 | |||
| 661 | -static struct regulator_consumer_supply omap3stalker_vsim_supply = { | ||
| 662 | - .supply = "vmmc_aux", | ||
| 663 | +static struct regulator_consumer_supply omap3stalker_vsim_supply[] = { | ||
| 664 | + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), | ||
| 665 | }; | ||
| 666 | |||
| 667 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | ||
| 668 | @@ -224,8 +224,8 @@ static struct regulator_init_data omap3stalker_vmmc1 = { | ||
| 669 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 670 | | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | ||
| 671 | }, | ||
| 672 | - .num_consumer_supplies = 1, | ||
| 673 | - .consumer_supplies = &omap3stalker_vmmc1_supply, | ||
| 674 | + .num_consumer_supplies = ARRAY_SIZE(omap3stalker_vmmc1_supply), | ||
| 675 | + .consumer_supplies = omap3stalker_vmmc1_supply, | ||
| 676 | }; | ||
| 677 | |||
| 678 | /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ | ||
| 679 | @@ -238,8 +238,8 @@ static struct regulator_init_data omap3stalker_vsim = { | ||
| 680 | .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 681 | | REGULATOR_CHANGE_MODE | REGULATOR_CHANGE_STATUS, | ||
| 682 | }, | ||
| 683 | - .num_consumer_supplies = 1, | ||
| 684 | - .consumer_supplies = &omap3stalker_vsim_supply, | ||
| 685 | + .num_consumer_supplies = ARRAY_SIZE(omap3stalker_vsim_supply), | ||
| 686 | + .consumer_supplies = omap3stalker_vsim_supply, | ||
| 687 | }; | ||
| 688 | |||
| 689 | static struct omap2_hsmmc_info mmc[] = { | ||
| 690 | @@ -403,8 +403,9 @@ static struct twl4030_codec_data omap3stalker_codec_data = { | ||
| 691 | .audio = &omap3stalker_audio_data, | ||
| 692 | }; | ||
| 693 | |||
| 694 | -static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply = | ||
| 695 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); | ||
| 696 | +static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = { | ||
| 697 | + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 698 | +}; | ||
| 699 | |||
| 700 | /* VDAC for DSS driving S-Video */ | ||
| 701 | static struct regulator_init_data omap3_stalker_vdac = { | ||
| 702 | @@ -417,8 +418,8 @@ static struct regulator_init_data omap3_stalker_vdac = { | ||
| 703 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 704 | | REGULATOR_CHANGE_STATUS, | ||
| 705 | }, | ||
| 706 | - .num_consumer_supplies = 1, | ||
| 707 | - .consumer_supplies = &omap3_stalker_vdda_dac_supply, | ||
| 708 | + .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vdda_dac_supply), | ||
| 709 | + .consumer_supplies = omap3_stalker_vdda_dac_supply, | ||
| 710 | }; | ||
| 711 | |||
| 712 | /* VPLL2 for digital video outputs */ | ||
| 713 | diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 714 | index 5f649fa..ab5c37d 100644 | ||
| 715 | --- a/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 716 | +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 717 | @@ -114,12 +114,12 @@ static struct omap_lcd_config omap3_touchbook_lcd_config __initdata = { | ||
| 718 | .ctrl_name = "internal", | ||
| 719 | }; | ||
| 720 | |||
| 721 | -static struct regulator_consumer_supply touchbook_vmmc1_supply = { | ||
| 722 | - .supply = "vmmc", | ||
| 723 | +static struct regulator_consumer_supply touchbook_vmmc1_supply[] = { | ||
| 724 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 725 | }; | ||
| 726 | |||
| 727 | -static struct regulator_consumer_supply touchbook_vsim_supply = { | ||
| 728 | - .supply = "vmmc_aux", | ||
| 729 | +static struct regulator_consumer_supply touchbook_vsim_supply[] = { | ||
| 730 | + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), | ||
| 731 | }; | ||
| 732 | |||
| 733 | static struct gpio_led gpio_leds[]; | ||
| 734 | @@ -167,14 +167,18 @@ static struct twl4030_gpio_platform_data touchbook_gpio_data = { | ||
| 735 | .setup = touchbook_twl_gpio_setup, | ||
| 736 | }; | ||
| 737 | |||
| 738 | -static struct regulator_consumer_supply touchbook_vdac_supply = { | ||
| 739 | +static struct regulator_consumer_supply touchbook_vdac_supply[] = { | ||
| 740 | +{ | ||
| 741 | .supply = "vdac", | ||
| 742 | .dev = &omap3_touchbook_lcd_device.dev, | ||
| 743 | +}, | ||
| 744 | }; | ||
| 745 | |||
| 746 | -static struct regulator_consumer_supply touchbook_vdvi_supply = { | ||
| 747 | +static struct regulator_consumer_supply touchbook_vdvi_supply[] = { | ||
| 748 | +{ | ||
| 749 | .supply = "vdvi", | ||
| 750 | .dev = &omap3_touchbook_lcd_device.dev, | ||
| 751 | +}, | ||
| 752 | }; | ||
| 753 | |||
| 754 | /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */ | ||
| 755 | @@ -188,8 +192,8 @@ static struct regulator_init_data touchbook_vmmc1 = { | ||
| 756 | | REGULATOR_CHANGE_MODE | ||
| 757 | | REGULATOR_CHANGE_STATUS, | ||
| 758 | }, | ||
| 759 | - .num_consumer_supplies = 1, | ||
| 760 | - .consumer_supplies = &touchbook_vmmc1_supply, | ||
| 761 | + .num_consumer_supplies = ARRAY_SIZE(touchbook_vmmc1_supply), | ||
| 762 | + .consumer_supplies = touchbook_vmmc1_supply, | ||
| 763 | }; | ||
| 764 | |||
| 765 | /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */ | ||
| 766 | @@ -203,8 +207,8 @@ static struct regulator_init_data touchbook_vsim = { | ||
| 767 | | REGULATOR_CHANGE_MODE | ||
| 768 | | REGULATOR_CHANGE_STATUS, | ||
| 769 | }, | ||
| 770 | - .num_consumer_supplies = 1, | ||
| 771 | - .consumer_supplies = &touchbook_vsim_supply, | ||
| 772 | + .num_consumer_supplies = ARRAY_SIZE(touchbook_vsim_supply), | ||
| 773 | + .consumer_supplies = touchbook_vsim_supply, | ||
| 774 | }; | ||
| 775 | |||
| 776 | /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ | ||
| 777 | @@ -217,8 +221,8 @@ static struct regulator_init_data touchbook_vdac = { | ||
| 778 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 779 | | REGULATOR_CHANGE_STATUS, | ||
| 780 | }, | ||
| 781 | - .num_consumer_supplies = 1, | ||
| 782 | - .consumer_supplies = &touchbook_vdac_supply, | ||
| 783 | + .num_consumer_supplies = ARRAY_SIZE(touchbook_vdac_supply), | ||
| 784 | + .consumer_supplies = touchbook_vdac_supply, | ||
| 785 | }; | ||
| 786 | |||
| 787 | /* VPLL2 for digital video outputs */ | ||
| 788 | @@ -232,8 +236,8 @@ static struct regulator_init_data touchbook_vpll2 = { | ||
| 789 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 790 | | REGULATOR_CHANGE_STATUS, | ||
| 791 | }, | ||
| 792 | - .num_consumer_supplies = 1, | ||
| 793 | - .consumer_supplies = &touchbook_vdvi_supply, | ||
| 794 | + .num_consumer_supplies = ARRAY_SIZE(touchbook_vdvi_supply), | ||
| 795 | + .consumer_supplies = touchbook_vdvi_supply, | ||
| 796 | }; | ||
| 797 | |||
| 798 | static struct twl4030_usb_data touchbook_usb_data = { | ||
| 799 | diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c | ||
| 800 | index 0cfe200..6d2372b 100644 | ||
| 801 | --- a/arch/arm/mach-omap2/board-omap4panda.c | ||
| 802 | +++ b/arch/arm/mach-omap2/board-omap4panda.c | ||
| 803 | @@ -183,23 +183,19 @@ static struct omap2_hsmmc_info mmc[] = { | ||
| 804 | }; | ||
| 805 | |||
| 806 | static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = { | ||
| 807 | - { | ||
| 808 | - .supply = "vmmc", | ||
| 809 | - .dev_name = "omap_hsmmc.0", | ||
| 810 | - }, | ||
| 811 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 812 | }; | ||
| 813 | |||
| 814 | -static struct regulator_consumer_supply omap4_panda_vmmc5_supply = { | ||
| 815 | - .supply = "vmmc", | ||
| 816 | - .dev_name = "omap_hsmmc.4", | ||
| 817 | +static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = { | ||
| 818 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"), | ||
| 819 | }; | ||
| 820 | |||
| 821 | static struct regulator_init_data panda_vmmc5 = { | ||
| 822 | .constraints = { | ||
| 823 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
| 824 | }, | ||
| 825 | - .num_consumer_supplies = 1, | ||
| 826 | - .consumer_supplies = &omap4_panda_vmmc5_supply, | ||
| 827 | + .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc5_supply), | ||
| 828 | + .consumer_supplies = omap4_panda_vmmc5_supply, | ||
| 829 | }; | ||
| 830 | |||
| 831 | static struct fixed_voltage_config panda_vwlan = { | ||
| 832 | @@ -312,7 +308,7 @@ static struct regulator_init_data omap4_panda_vmmc = { | ||
| 833 | | REGULATOR_CHANGE_MODE | ||
| 834 | | REGULATOR_CHANGE_STATUS, | ||
| 835 | }, | ||
| 836 | - .num_consumer_supplies = 1, | ||
| 837 | + .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc_supply), | ||
| 838 | .consumer_supplies = omap4_panda_vmmc_supply, | ||
| 839 | }; | ||
| 840 | |||
| 841 | diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c | ||
| 842 | index 175e1ab..30c7556 100644 | ||
| 843 | --- a/arch/arm/mach-omap2/board-overo.c | ||
| 844 | +++ b/arch/arm/mach-omap2/board-overo.c | ||
| 845 | @@ -74,15 +74,16 @@ | ||
| 846 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
| 847 | |||
| 848 | /* fixed regulator for ads7846 */ | ||
| 849 | -static struct regulator_consumer_supply ads7846_supply = | ||
| 850 | - REGULATOR_SUPPLY("vcc", "spi1.0"); | ||
| 851 | +static struct regulator_consumer_supply ads7846_supply[] = { | ||
| 852 | + REGULATOR_SUPPLY("vcc", "spi1.0"), | ||
| 853 | +}; | ||
| 854 | |||
| 855 | static struct regulator_init_data vads7846_regulator = { | ||
| 856 | .constraints = { | ||
| 857 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
| 858 | }, | ||
| 859 | - .num_consumer_supplies = 1, | ||
| 860 | - .consumer_supplies = &ads7846_supply, | ||
| 861 | + .num_consumer_supplies = ARRAY_SIZE(ads7846_supply), | ||
| 862 | + .consumer_supplies = ads7846_supply, | ||
| 863 | }; | ||
| 864 | |||
| 865 | static struct fixed_voltage_config vads7846 = { | ||
| 866 | @@ -264,8 +265,9 @@ static struct omap_dss_board_info overo_dss_data = { | ||
| 867 | .default_device = &overo_dvi_device, | ||
| 868 | }; | ||
| 869 | |||
| 870 | -static struct regulator_consumer_supply overo_vdda_dac_supply = | ||
| 871 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); | ||
| 872 | +static struct regulator_consumer_supply overo_vdda_dac_supply[] = { | ||
| 873 | + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 874 | +}; | ||
| 875 | |||
| 876 | static struct regulator_consumer_supply overo_vdds_dsi_supply[] = { | ||
| 877 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | ||
| 878 | @@ -319,8 +321,8 @@ static struct omap2_hsmmc_info mmc[] = { | ||
| 879 | {} /* Terminator */ | ||
| 880 | }; | ||
| 881 | |||
| 882 | -static struct regulator_consumer_supply overo_vmmc1_supply = { | ||
| 883 | - .supply = "vmmc", | ||
| 884 | +static struct regulator_consumer_supply overo_vmmc1_supply[] = { | ||
| 885 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 886 | }; | ||
| 887 | |||
| 888 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | ||
| 889 | @@ -447,8 +449,8 @@ static struct regulator_init_data overo_vmmc1 = { | ||
| 890 | | REGULATOR_CHANGE_MODE | ||
| 891 | | REGULATOR_CHANGE_STATUS, | ||
| 892 | }, | ||
| 893 | - .num_consumer_supplies = 1, | ||
| 894 | - .consumer_supplies = &overo_vmmc1_supply, | ||
| 895 | + .num_consumer_supplies = ARRAY_SIZE(overo_vmmc1_supply), | ||
| 896 | + .consumer_supplies = overo_vmmc1_supply, | ||
| 897 | }; | ||
| 898 | |||
| 899 | /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ | ||
| 900 | @@ -461,8 +463,8 @@ static struct regulator_init_data overo_vdac = { | ||
| 901 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 902 | | REGULATOR_CHANGE_STATUS, | ||
| 903 | }, | ||
| 904 | - .num_consumer_supplies = 1, | ||
| 905 | - .consumer_supplies = &overo_vdda_dac_supply, | ||
| 906 | + .num_consumer_supplies = ARRAY_SIZE(overo_vdda_dac_supply), | ||
| 907 | + .consumer_supplies = overo_vdda_dac_supply, | ||
| 908 | }; | ||
| 909 | |||
| 910 | /* VPLL2 for digital video outputs */ | ||
| 911 | diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c | ||
| 912 | index c565971..b633ba8 100644 | ||
| 913 | --- a/arch/arm/mach-omap2/board-rx51-peripherals.c | ||
| 914 | +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | ||
| 915 | @@ -358,14 +358,17 @@ static struct omap2_hsmmc_info mmc[] __initdata = { | ||
| 916 | {} /* Terminator */ | ||
| 917 | }; | ||
| 918 | |||
| 919 | -static struct regulator_consumer_supply rx51_vmmc1_supply = | ||
| 920 | - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"); | ||
| 921 | +static struct regulator_consumer_supply rx51_vmmc1_supply[] = { | ||
| 922 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 923 | +}; | ||
| 924 | |||
| 925 | -static struct regulator_consumer_supply rx51_vaux3_supply = | ||
| 926 | - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); | ||
| 927 | +static struct regulator_consumer_supply rx51_vaux3_supply[] = { | ||
| 928 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | ||
| 929 | +}; | ||
| 930 | |||
| 931 | -static struct regulator_consumer_supply rx51_vsim_supply = | ||
| 932 | - REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"); | ||
| 933 | +static struct regulator_consumer_supply rx51_vsim_supply[] = { | ||
| 934 | + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.1"), | ||
| 935 | +}; | ||
| 936 | |||
| 937 | static struct regulator_consumer_supply rx51_vmmc2_supplies[] = { | ||
| 938 | /* tlv320aic3x analog supplies */ | ||
| 939 | @@ -452,8 +455,8 @@ static struct regulator_init_data rx51_vaux3_mmc = { | ||
| 940 | | REGULATOR_CHANGE_MODE | ||
| 941 | | REGULATOR_CHANGE_STATUS, | ||
| 942 | }, | ||
| 943 | - .num_consumer_supplies = 1, | ||
| 944 | - .consumer_supplies = &rx51_vaux3_supply, | ||
| 945 | + .num_consumer_supplies = ARRAY_SIZE(rx51_vaux3_supply), | ||
| 946 | + .consumer_supplies = rx51_vaux3_supply, | ||
| 947 | }; | ||
| 948 | |||
| 949 | static struct regulator_init_data rx51_vaux4 = { | ||
| 950 | @@ -479,8 +482,8 @@ static struct regulator_init_data rx51_vmmc1 = { | ||
| 951 | | REGULATOR_CHANGE_MODE | ||
| 952 | | REGULATOR_CHANGE_STATUS, | ||
| 953 | }, | ||
| 954 | - .num_consumer_supplies = 1, | ||
| 955 | - .consumer_supplies = &rx51_vmmc1_supply, | ||
| 956 | + .num_consumer_supplies = ARRAY_SIZE(rx51_vmmc1_supply), | ||
| 957 | + .consumer_supplies = rx51_vmmc1_supply, | ||
| 958 | }; | ||
| 959 | |||
| 960 | static struct regulator_init_data rx51_vmmc2 = { | ||
| 961 | @@ -511,8 +514,8 @@ static struct regulator_init_data rx51_vsim = { | ||
| 962 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 963 | | REGULATOR_CHANGE_STATUS, | ||
| 964 | }, | ||
| 965 | - .num_consumer_supplies = 1, | ||
| 966 | - .consumer_supplies = &rx51_vsim_supply, | ||
| 967 | + .num_consumer_supplies = ARRAY_SIZE(rx51_vsim_supply), | ||
| 968 | + .consumer_supplies = rx51_vsim_supply, | ||
| 969 | }; | ||
| 970 | |||
| 971 | static struct regulator_init_data rx51_vdac = { | ||
| 972 | @@ -526,7 +529,7 @@ static struct regulator_init_data rx51_vdac = { | ||
| 973 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 974 | | REGULATOR_CHANGE_STATUS, | ||
| 975 | }, | ||
| 976 | - .num_consumer_supplies = 1, | ||
| 977 | + .num_consumer_supplies = ARRAY_SIZE(rx51_vdac_supply), | ||
| 978 | .consumer_supplies = rx51_vdac_supply, | ||
| 979 | }; | ||
| 980 | |||
| 981 | diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c | ||
| 982 | index 118c6f5..cb012e1 100644 | ||
| 983 | --- a/arch/arm/mach-omap2/board-zoom-peripherals.c | ||
| 984 | +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c | ||
| 985 | @@ -105,21 +105,20 @@ static struct twl4030_keypad_data zoom_kp_twl4030_data = { | ||
| 986 | .rep = 1, | ||
| 987 | }; | ||
| 988 | |||
| 989 | -static struct regulator_consumer_supply zoom_vmmc1_supply = { | ||
| 990 | - .supply = "vmmc", | ||
| 991 | +static struct regulator_consumer_supply zoom_vmmc1_supply[] = { | ||
| 992 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 993 | }; | ||
| 994 | |||
| 995 | -static struct regulator_consumer_supply zoom_vsim_supply = { | ||
| 996 | - .supply = "vmmc_aux", | ||
| 997 | +static struct regulator_consumer_supply zoom_vsim_supply[] = { | ||
| 998 | + REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), | ||
| 999 | }; | ||
| 1000 | |||
| 1001 | -static struct regulator_consumer_supply zoom_vmmc2_supply = { | ||
| 1002 | - .supply = "vmmc", | ||
| 1003 | +static struct regulator_consumer_supply zoom_vmmc2_supply[] = { | ||
| 1004 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | ||
| 1005 | }; | ||
| 1006 | |||
| 1007 | -static struct regulator_consumer_supply zoom_vmmc3_supply = { | ||
| 1008 | - .supply = "vmmc", | ||
| 1009 | - .dev_name = "omap_hsmmc.2", | ||
| 1010 | +static struct regulator_consumer_supply zoom_vmmc3_supply[] = { | ||
| 1011 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"), | ||
| 1012 | }; | ||
| 1013 | |||
| 1014 | /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */ | ||
| 1015 | @@ -133,8 +132,8 @@ static struct regulator_init_data zoom_vmmc1 = { | ||
| 1016 | | REGULATOR_CHANGE_MODE | ||
| 1017 | | REGULATOR_CHANGE_STATUS, | ||
| 1018 | }, | ||
| 1019 | - .num_consumer_supplies = 1, | ||
| 1020 | - .consumer_supplies = &zoom_vmmc1_supply, | ||
| 1021 | + .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc1_supply), | ||
| 1022 | + .consumer_supplies = zoom_vmmc1_supply, | ||
| 1023 | }; | ||
| 1024 | |||
| 1025 | /* VMMC2 for MMC2 card */ | ||
| 1026 | @@ -148,8 +147,8 @@ static struct regulator_init_data zoom_vmmc2 = { | ||
| 1027 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 1028 | | REGULATOR_CHANGE_STATUS, | ||
| 1029 | }, | ||
| 1030 | - .num_consumer_supplies = 1, | ||
| 1031 | - .consumer_supplies = &zoom_vmmc2_supply, | ||
| 1032 | + .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc2_supply), | ||
| 1033 | + .consumer_supplies = zoom_vmmc2_supply, | ||
| 1034 | }; | ||
| 1035 | |||
| 1036 | /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */ | ||
| 1037 | @@ -163,16 +162,16 @@ static struct regulator_init_data zoom_vsim = { | ||
| 1038 | | REGULATOR_CHANGE_MODE | ||
| 1039 | | REGULATOR_CHANGE_STATUS, | ||
| 1040 | }, | ||
| 1041 | - .num_consumer_supplies = 1, | ||
| 1042 | - .consumer_supplies = &zoom_vsim_supply, | ||
| 1043 | + .num_consumer_supplies = ARRAY_SIZE(zoom_vsim_supply), | ||
| 1044 | + .consumer_supplies = zoom_vsim_supply, | ||
| 1045 | }; | ||
| 1046 | |||
| 1047 | static struct regulator_init_data zoom_vmmc3 = { | ||
| 1048 | .constraints = { | ||
| 1049 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
| 1050 | }, | ||
| 1051 | - .num_consumer_supplies = 1, | ||
| 1052 | - .consumer_supplies = &zoom_vmmc3_supply, | ||
| 1053 | + .num_consumer_supplies = ARRAY_SIZE(zoom_vmmc3_supply), | ||
| 1054 | + .consumer_supplies = zoom_vmmc3_supply, | ||
| 1055 | }; | ||
| 1056 | |||
| 1057 | static struct fixed_voltage_config zoom_vwlan = { | ||
| 1058 | @@ -232,8 +231,9 @@ static struct regulator_consumer_supply zoom_vpll2_supplies[] = { | ||
| 1059 | REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | ||
| 1060 | }; | ||
| 1061 | |||
| 1062 | -static struct regulator_consumer_supply zoom_vdda_dac_supply = | ||
| 1063 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"); | ||
| 1064 | +static struct regulator_consumer_supply zoom_vdda_dac_supply[] = { | ||
| 1065 | + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 1066 | +}; | ||
| 1067 | |||
| 1068 | static struct regulator_init_data zoom_vpll2 = { | ||
| 1069 | .constraints = { | ||
| 1070 | @@ -257,8 +257,8 @@ static struct regulator_init_data zoom_vdac = { | ||
| 1071 | .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 1072 | | REGULATOR_CHANGE_STATUS, | ||
| 1073 | }, | ||
| 1074 | - .num_consumer_supplies = 1, | ||
| 1075 | - .consumer_supplies = &zoom_vdda_dac_supply, | ||
| 1076 | + .num_consumer_supplies = ARRAY_SIZE(zoom_vdda_dac_supply), | ||
| 1077 | + .consumer_supplies = zoom_vdda_dac_supply, | ||
| 1078 | }; | ||
| 1079 | |||
| 1080 | static int zoom_twl_gpio_setup(struct device *dev, | ||
| 1081 | -- | ||
| 1082 | 1.7.2.5 | ||
| 1083 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0002-Remove-old-style-supply.dev-assignments-common-in-hs.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0002-Remove-old-style-supply.dev-assignments-common-in-hs.patch deleted file mode 100644 index 52e67866..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0002-Remove-old-style-supply.dev-assignments-common-in-hs.patch +++ /dev/null | |||
| @@ -1,160 +0,0 @@ | |||
| 1 | From a3d13ae14bca7c412e5b0575c244ce7370fa3747 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Oleg Drokin <green@linuxhacker.ru> | ||
| 3 | Date: Mon, 6 Jun 2011 18:57:08 +0000 | ||
| 4 | Subject: [PATCH 002/149] Remove old-style supply.dev assignments common in hsmmc init | ||
| 5 | |||
| 6 | CC: Mark Brown <broonie@opensource.wolfsonmicro.com> | ||
| 7 | CC: Mike Rapoport <mike@compulab.co.il> | ||
| 8 | CC: Nishant Kamat <nskamat@ti.com> | ||
| 9 | CC: Steve Sakoman <steve@sakoman.com> | ||
| 10 | CC: Felipe Balbi <balbi@ti.com> | ||
| 11 | Signed-off-by: Oleg Drokin <green@linuxhacker.ru> | ||
| 12 | Acked-by: Felipe Balbi <balbi@ti.com> | ||
| 13 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/board-cm-t35.c | 4 ---- | ||
| 16 | arch/arm/mach-omap2/board-ldp.c | 2 -- | ||
| 17 | arch/arm/mach-omap2/board-omap3beagle.c | 4 ---- | ||
| 18 | arch/arm/mach-omap2/board-omap3evm.c | 4 ---- | ||
| 19 | arch/arm/mach-omap2/board-omap3logic.c | 2 -- | ||
| 20 | arch/arm/mach-omap2/board-omap3stalker.c | 4 ---- | ||
| 21 | arch/arm/mach-omap2/board-omap3touchbook.c | 4 ---- | ||
| 22 | arch/arm/mach-omap2/board-overo.c | 2 -- | ||
| 23 | arch/arm/mach-omap2/board-zoom-peripherals.c | 7 ------- | ||
| 24 | 9 files changed, 0 insertions(+), 33 deletions(-) | ||
| 25 | |||
| 26 | diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 27 | index e7bf32d..ceb581e 100644 | ||
| 28 | --- a/arch/arm/mach-omap2/board-cm-t35.c | ||
| 29 | +++ b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 30 | @@ -483,10 +483,6 @@ static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio, | ||
| 31 | mmc[0].gpio_cd = gpio + 0; | ||
| 32 | omap2_hsmmc_init(mmc); | ||
| 33 | |||
| 34 | - /* link regulators to MMC adapters */ | ||
| 35 | - cm_t35_vmmc1_supply.dev = mmc[0].dev; | ||
| 36 | - cm_t35_vsim_supply.dev = mmc[0].dev; | ||
| 37 | - | ||
| 38 | return 0; | ||
| 39 | } | ||
| 40 | |||
| 41 | diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c | ||
| 42 | index 069bc9f..2d7e0ae 100644 | ||
| 43 | --- a/arch/arm/mach-omap2/board-ldp.c | ||
| 44 | +++ b/arch/arm/mach-omap2/board-ldp.c | ||
| 45 | @@ -341,8 +341,6 @@ static void __init omap_ldp_init(void) | ||
| 46 | ARRAY_SIZE(ldp_nand_partitions), ZOOM_NAND_CS, 0); | ||
| 47 | |||
| 48 | omap2_hsmmc_init(mmc); | ||
| 49 | - /* link regulators to MMC adapters */ | ||
| 50 | - ldp_vmmc1_supply.dev = mmc[0].dev; | ||
| 51 | } | ||
| 52 | |||
| 53 | MACHINE_START(OMAP_LDP, "OMAP LDP board") | ||
| 54 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 55 | index 4cf7c19..8ef0e19 100644 | ||
| 56 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 57 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 58 | @@ -268,10 +268,6 @@ static int beagle_twl_gpio_setup(struct device *dev, | ||
| 59 | mmc[0].gpio_cd = gpio + 0; | ||
| 60 | omap2_hsmmc_init(mmc); | ||
| 61 | |||
| 62 | - /* link regulators to MMC adapters */ | ||
| 63 | - beagle_vmmc1_supply.dev = mmc[0].dev; | ||
| 64 | - beagle_vsim_supply.dev = mmc[0].dev; | ||
| 65 | - | ||
| 66 | /* | ||
| 67 | * TWL4030_GPIO_MAX + 0 == ledA, EHCI nEN_USB_PWR (out, XM active | ||
| 68 | * high / others active low) | ||
| 69 | diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 70 | index fc7a23a..e2202dd 100644 | ||
| 71 | --- a/arch/arm/mach-omap2/board-omap3evm.c | ||
| 72 | +++ b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 73 | @@ -365,10 +365,6 @@ static int omap3evm_twl_gpio_setup(struct device *dev, | ||
| 74 | mmc[0].gpio_cd = gpio + 0; | ||
| 75 | omap2_hsmmc_init(mmc); | ||
| 76 | |||
| 77 | - /* link regulators to MMC adapters */ | ||
| 78 | - omap3evm_vmmc1_supply.dev = mmc[0].dev; | ||
| 79 | - omap3evm_vsim_supply.dev = mmc[0].dev; | ||
| 80 | - | ||
| 81 | /* | ||
| 82 | * Most GPIOs are for USB OTG. Some are mostly sent to | ||
| 83 | * the P2 connector; notably LEDA for the LCD backlight. | ||
| 84 | diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c | ||
| 85 | index ec18435..eaefb59 100644 | ||
| 86 | --- a/arch/arm/mach-omap2/board-omap3logic.c | ||
| 87 | +++ b/arch/arm/mach-omap2/board-omap3logic.c | ||
| 88 | @@ -130,8 +130,6 @@ static void __init board_mmc_init(void) | ||
| 89 | } | ||
| 90 | |||
| 91 | omap2_hsmmc_init(board_mmc_info); | ||
| 92 | - /* link regulators to MMC adapters */ | ||
| 93 | - omap3logic_vmmc1_supply.dev = board_mmc_info[0].dev; | ||
| 94 | } | ||
| 95 | |||
| 96 | static struct omap_smsc911x_platform_data __initdata board_smsc911x_data = { | ||
| 97 | diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 98 | index 99be540..63d12a3 100644 | ||
| 99 | --- a/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 100 | +++ b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 101 | @@ -321,10 +321,6 @@ omap3stalker_twl_gpio_setup(struct device *dev, | ||
| 102 | mmc[0].gpio_cd = gpio + 0; | ||
| 103 | omap2_hsmmc_init(mmc); | ||
| 104 | |||
| 105 | - /* link regulators to MMC adapters */ | ||
| 106 | - omap3stalker_vmmc1_supply.dev = mmc[0].dev; | ||
| 107 | - omap3stalker_vsim_supply.dev = mmc[0].dev; | ||
| 108 | - | ||
| 109 | /* | ||
| 110 | * Most GPIOs are for USB OTG. Some are mostly sent to | ||
| 111 | * the P2 connector; notably LEDA for the LCD backlight. | ||
| 112 | diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 113 | index ab5c37d..c80e2c3 100644 | ||
| 114 | --- a/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 115 | +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 116 | @@ -137,10 +137,6 @@ static int touchbook_twl_gpio_setup(struct device *dev, | ||
| 117 | mmc[0].gpio_cd = gpio + 0; | ||
| 118 | omap2_hsmmc_init(mmc); | ||
| 119 | |||
| 120 | - /* link regulators to MMC adapters */ | ||
| 121 | - touchbook_vmmc1_supply.dev = mmc[0].dev; | ||
| 122 | - touchbook_vsim_supply.dev = mmc[0].dev; | ||
| 123 | - | ||
| 124 | /* REVISIT: need ehci-omap hooks for external VBUS | ||
| 125 | * power switch and overcurrent detect | ||
| 126 | */ | ||
| 127 | diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c | ||
| 128 | index 30c7556..031a9a6 100644 | ||
| 129 | --- a/arch/arm/mach-omap2/board-overo.c | ||
| 130 | +++ b/arch/arm/mach-omap2/board-overo.c | ||
| 131 | @@ -417,8 +417,6 @@ static int overo_twl_gpio_setup(struct device *dev, | ||
| 132 | { | ||
| 133 | omap2_hsmmc_init(mmc); | ||
| 134 | |||
| 135 | - overo_vmmc1_supply.dev = mmc[0].dev; | ||
| 136 | - | ||
| 137 | #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) | ||
| 138 | /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */ | ||
| 139 | gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1; | ||
| 140 | diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c | ||
| 141 | index cb012e1..8495f82 100644 | ||
| 142 | --- a/arch/arm/mach-omap2/board-zoom-peripherals.c | ||
| 143 | +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c | ||
| 144 | @@ -270,13 +270,6 @@ static int zoom_twl_gpio_setup(struct device *dev, | ||
| 145 | mmc[0].gpio_cd = gpio + 0; | ||
| 146 | omap2_hsmmc_init(mmc); | ||
| 147 | |||
| 148 | - /* link regulators to MMC adapters ... we "know" the | ||
| 149 | - * regulators will be set up only *after* we return. | ||
| 150 | - */ | ||
| 151 | - zoom_vmmc1_supply.dev = mmc[0].dev; | ||
| 152 | - zoom_vsim_supply.dev = mmc[0].dev; | ||
| 153 | - zoom_vmmc2_supply.dev = mmc[1].dev; | ||
| 154 | - | ||
| 155 | ret = gpio_request_one(LCD_PANEL_ENABLE_GPIO, GPIOF_OUT_INIT_LOW, | ||
| 156 | "lcd enable"); | ||
| 157 | if (ret) | ||
| 158 | -- | ||
| 159 | 1.7.2.5 | ||
| 160 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0003-omap-Use-separate-init_irq-functions-to-avoid-cpu_is.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0003-omap-Use-separate-init_irq-functions-to-avoid-cpu_is.patch deleted file mode 100644 index dbb6972f..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0003-omap-Use-separate-init_irq-functions-to-avoid-cpu_is.patch +++ /dev/null | |||
| @@ -1,802 +0,0 @@ | |||
| 1 | From 5edd966fdcf04f3166c1b7028215e502ba7d5275 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Tony Lindgren <tony@atomide.com> | ||
| 3 | Date: Tue, 17 May 2011 03:51:26 -0700 | ||
| 4 | Subject: [PATCH 003/149] omap: Use separate init_irq functions to avoid cpu_is_omap tests early | ||
| 5 | |||
| 6 | This allows us to remove cpu_is_omap calls from init_irq functions. | ||
| 7 | There should not be any need for cpu_is_omap calls as at this point. | ||
| 8 | During the timer init we only care about SoC generation, and not about | ||
| 9 | subrevisions. | ||
| 10 | |||
| 11 | The main reason for the patch is that we want to initialize only | ||
| 12 | minimal omap specific code from the init_early call. | ||
| 13 | |||
| 14 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 15 | Reviewed-by: Kevin Hilman <khilman@ti.com> | ||
| 16 | --- | ||
| 17 | arch/arm/mach-omap1/board-ams-delta.c | 2 +- | ||
| 18 | arch/arm/mach-omap1/board-fsample.c | 2 +- | ||
| 19 | arch/arm/mach-omap1/board-generic.c | 2 +- | ||
| 20 | arch/arm/mach-omap1/board-h2.c | 2 +- | ||
| 21 | arch/arm/mach-omap1/board-h3.c | 2 +- | ||
| 22 | arch/arm/mach-omap1/board-htcherald.c | 2 +- | ||
| 23 | arch/arm/mach-omap1/board-innovator.c | 2 +- | ||
| 24 | arch/arm/mach-omap1/board-nokia770.c | 2 +- | ||
| 25 | arch/arm/mach-omap1/board-osk.c | 2 +- | ||
| 26 | arch/arm/mach-omap1/board-palmte.c | 2 +- | ||
| 27 | arch/arm/mach-omap1/board-palmtt.c | 2 +- | ||
| 28 | arch/arm/mach-omap1/board-palmz71.c | 2 +- | ||
| 29 | arch/arm/mach-omap1/board-perseus2.c | 2 +- | ||
| 30 | arch/arm/mach-omap1/board-sx1.c | 2 +- | ||
| 31 | arch/arm/mach-omap1/board-voiceblue.c | 2 +- | ||
| 32 | arch/arm/mach-omap1/irq.c | 2 +- | ||
| 33 | arch/arm/mach-omap2/board-2430sdp.c | 2 +- | ||
| 34 | arch/arm/mach-omap2/board-3430sdp.c | 2 +- | ||
| 35 | arch/arm/mach-omap2/board-3630sdp.c | 2 +- | ||
| 36 | arch/arm/mach-omap2/board-am3517crane.c | 2 +- | ||
| 37 | arch/arm/mach-omap2/board-am3517evm.c | 2 +- | ||
| 38 | arch/arm/mach-omap2/board-apollon.c | 2 +- | ||
| 39 | arch/arm/mach-omap2/board-cm-t35.c | 2 +- | ||
| 40 | arch/arm/mach-omap2/board-cm-t3517.c | 2 +- | ||
| 41 | arch/arm/mach-omap2/board-devkit8000.c | 2 +- | ||
| 42 | arch/arm/mach-omap2/board-generic.c | 2 +- | ||
| 43 | arch/arm/mach-omap2/board-h4.c | 2 +- | ||
| 44 | arch/arm/mach-omap2/board-igep0020.c | 4 +- | ||
| 45 | arch/arm/mach-omap2/board-ldp.c | 2 +- | ||
| 46 | arch/arm/mach-omap2/board-n8x0.c | 6 ++-- | ||
| 47 | arch/arm/mach-omap2/board-omap3beagle.c | 2 +- | ||
| 48 | arch/arm/mach-omap2/board-omap3evm.c | 2 +- | ||
| 49 | arch/arm/mach-omap2/board-omap3logic.c | 4 +- | ||
| 50 | arch/arm/mach-omap2/board-omap3pandora.c | 2 +- | ||
| 51 | arch/arm/mach-omap2/board-omap3stalker.c | 2 +- | ||
| 52 | arch/arm/mach-omap2/board-omap3touchbook.c | 2 +- | ||
| 53 | arch/arm/mach-omap2/board-overo.c | 2 +- | ||
| 54 | arch/arm/mach-omap2/board-rm680.c | 2 +- | ||
| 55 | arch/arm/mach-omap2/board-rx51.c | 2 +- | ||
| 56 | arch/arm/mach-omap2/board-ti8168evm.c | 7 +----- | ||
| 57 | arch/arm/mach-omap2/board-zoom.c | 4 +- | ||
| 58 | arch/arm/mach-omap2/io.c | 17 +-------------- | ||
| 59 | arch/arm/mach-omap2/irq.c | 32 ++++++++++++++++++--------- | ||
| 60 | arch/arm/mach-omap2/omap4-common.c | 10 ++++---- | ||
| 61 | arch/arm/plat-omap/include/plat/irqs.h | 6 ++++- | ||
| 62 | 45 files changed, 78 insertions(+), 84 deletions(-) | ||
| 63 | |||
| 64 | diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c | ||
| 65 | index f49ce85..e3caef8 100644 | ||
| 66 | --- a/arch/arm/mach-omap1/board-ams-delta.c | ||
| 67 | +++ b/arch/arm/mach-omap1/board-ams-delta.c | ||
| 68 | @@ -138,7 +138,7 @@ void ams_delta_latch2_write(u16 mask, u16 value) | ||
| 69 | static void __init ams_delta_init_irq(void) | ||
| 70 | { | ||
| 71 | omap1_init_common_hw(); | ||
| 72 | - omap_init_irq(); | ||
| 73 | + omap1_init_irq(); | ||
| 74 | } | ||
| 75 | |||
| 76 | static struct map_desc ams_delta_io_desc[] __initdata = { | ||
| 77 | diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c | ||
| 78 | index 87f173d..eaff305 100644 | ||
| 79 | --- a/arch/arm/mach-omap1/board-fsample.c | ||
| 80 | +++ b/arch/arm/mach-omap1/board-fsample.c | ||
| 81 | @@ -329,7 +329,7 @@ static void __init omap_fsample_init(void) | ||
| 82 | static void __init omap_fsample_init_irq(void) | ||
| 83 | { | ||
| 84 | omap1_init_common_hw(); | ||
| 85 | - omap_init_irq(); | ||
| 86 | + omap1_init_irq(); | ||
| 87 | } | ||
| 88 | |||
| 89 | /* Only FPGA needs to be mapped here. All others are done with ioremap */ | ||
| 90 | diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c | ||
| 91 | index 23f4ab9..3fd6b40 100644 | ||
| 92 | --- a/arch/arm/mach-omap1/board-generic.c | ||
| 93 | +++ b/arch/arm/mach-omap1/board-generic.c | ||
| 94 | @@ -31,7 +31,7 @@ | ||
| 95 | static void __init omap_generic_init_irq(void) | ||
| 96 | { | ||
| 97 | omap1_init_common_hw(); | ||
| 98 | - omap_init_irq(); | ||
| 99 | + omap1_init_irq(); | ||
| 100 | } | ||
| 101 | |||
| 102 | /* assume no Mini-AB port */ | ||
| 103 | diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c | ||
| 104 | index ba3bd09..8147b04 100644 | ||
| 105 | --- a/arch/arm/mach-omap1/board-h2.c | ||
| 106 | +++ b/arch/arm/mach-omap1/board-h2.c | ||
| 107 | @@ -376,7 +376,7 @@ static struct i2c_board_info __initdata h2_i2c_board_info[] = { | ||
| 108 | static void __init h2_init_irq(void) | ||
| 109 | { | ||
| 110 | omap1_init_common_hw(); | ||
| 111 | - omap_init_irq(); | ||
| 112 | + omap1_init_irq(); | ||
| 113 | } | ||
| 114 | |||
| 115 | static struct omap_usb_config h2_usb_config __initdata = { | ||
| 116 | diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c | ||
| 117 | index ac48677..1b448f6 100644 | ||
| 118 | --- a/arch/arm/mach-omap1/board-h3.c | ||
| 119 | +++ b/arch/arm/mach-omap1/board-h3.c | ||
| 120 | @@ -439,7 +439,7 @@ static void __init h3_init(void) | ||
| 121 | static void __init h3_init_irq(void) | ||
| 122 | { | ||
| 123 | omap1_init_common_hw(); | ||
| 124 | - omap_init_irq(); | ||
| 125 | + omap1_init_irq(); | ||
| 126 | } | ||
| 127 | |||
| 128 | static void __init h3_map_io(void) | ||
| 129 | diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c | ||
| 130 | index ba05a51..1bd4d8e 100644 | ||
| 131 | --- a/arch/arm/mach-omap1/board-htcherald.c | ||
| 132 | +++ b/arch/arm/mach-omap1/board-htcherald.c | ||
| 133 | @@ -605,7 +605,7 @@ static void __init htcherald_init_irq(void) | ||
| 134 | { | ||
| 135 | printk(KERN_INFO "htcherald_init_irq.\n"); | ||
| 136 | omap1_init_common_hw(); | ||
| 137 | - omap_init_irq(); | ||
| 138 | + omap1_init_irq(); | ||
| 139 | } | ||
| 140 | |||
| 141 | MACHINE_START(HERALD, "HTC Herald") | ||
| 142 | diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c | ||
| 143 | index 2d9b8cb..5926b0c 100644 | ||
| 144 | --- a/arch/arm/mach-omap1/board-innovator.c | ||
| 145 | +++ b/arch/arm/mach-omap1/board-innovator.c | ||
| 146 | @@ -292,7 +292,7 @@ static void __init innovator_init_smc91x(void) | ||
| 147 | static void __init innovator_init_irq(void) | ||
| 148 | { | ||
| 149 | omap1_init_common_hw(); | ||
| 150 | - omap_init_irq(); | ||
| 151 | + omap1_init_irq(); | ||
| 152 | } | ||
| 153 | |||
| 154 | #ifdef CONFIG_ARCH_OMAP15XX | ||
| 155 | diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c | ||
| 156 | index cfd0849..e3cf21d 100644 | ||
| 157 | --- a/arch/arm/mach-omap1/board-nokia770.c | ||
| 158 | +++ b/arch/arm/mach-omap1/board-nokia770.c | ||
| 159 | @@ -51,7 +51,7 @@ static void __init omap_nokia770_init_irq(void) | ||
| 160 | omap_writew((omap_readw(0xfffb5004) & ~2), 0xfffb5004); | ||
| 161 | |||
| 162 | omap1_init_common_hw(); | ||
| 163 | - omap_init_irq(); | ||
| 164 | + omap1_init_irq(); | ||
| 165 | } | ||
| 166 | |||
| 167 | static const unsigned int nokia770_keymap[] = { | ||
| 168 | diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c | ||
| 169 | index e68dfde..1e7823d 100644 | ||
| 170 | --- a/arch/arm/mach-omap1/board-osk.c | ||
| 171 | +++ b/arch/arm/mach-omap1/board-osk.c | ||
| 172 | @@ -282,7 +282,7 @@ static void __init osk_init_cf(void) | ||
| 173 | static void __init osk_init_irq(void) | ||
| 174 | { | ||
| 175 | omap1_init_common_hw(); | ||
| 176 | - omap_init_irq(); | ||
| 177 | + omap1_init_irq(); | ||
| 178 | } | ||
| 179 | |||
| 180 | static struct omap_usb_config osk_usb_config __initdata = { | ||
| 181 | diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c | ||
| 182 | index c9d38f4..8b6a881 100644 | ||
| 183 | --- a/arch/arm/mach-omap1/board-palmte.c | ||
| 184 | +++ b/arch/arm/mach-omap1/board-palmte.c | ||
| 185 | @@ -62,7 +62,7 @@ | ||
| 186 | static void __init omap_palmte_init_irq(void) | ||
| 187 | { | ||
| 188 | omap1_init_common_hw(); | ||
| 189 | - omap_init_irq(); | ||
| 190 | + omap1_init_irq(); | ||
| 191 | } | ||
| 192 | |||
| 193 | static const unsigned int palmte_keymap[] = { | ||
| 194 | diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c | ||
| 195 | index f04f2d3..f2de43d 100644 | ||
| 196 | --- a/arch/arm/mach-omap1/board-palmtt.c | ||
| 197 | +++ b/arch/arm/mach-omap1/board-palmtt.c | ||
| 198 | @@ -266,7 +266,7 @@ static struct spi_board_info __initdata palmtt_boardinfo[] = { | ||
| 199 | static void __init omap_palmtt_init_irq(void) | ||
| 200 | { | ||
| 201 | omap1_init_common_hw(); | ||
| 202 | - omap_init_irq(); | ||
| 203 | + omap1_init_irq(); | ||
| 204 | } | ||
| 205 | |||
| 206 | static struct omap_usb_config palmtt_usb_config __initdata = { | ||
| 207 | diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c | ||
| 208 | index 45f01d2..6665d2d 100644 | ||
| 209 | --- a/arch/arm/mach-omap1/board-palmz71.c | ||
| 210 | +++ b/arch/arm/mach-omap1/board-palmz71.c | ||
| 211 | @@ -61,7 +61,7 @@ static void __init | ||
| 212 | omap_palmz71_init_irq(void) | ||
| 213 | { | ||
| 214 | omap1_init_common_hw(); | ||
| 215 | - omap_init_irq(); | ||
| 216 | + omap1_init_irq(); | ||
| 217 | } | ||
| 218 | |||
| 219 | static const unsigned int palmz71_keymap[] = { | ||
| 220 | diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c | ||
| 221 | index 3c8ee84..7f019e5 100644 | ||
| 222 | --- a/arch/arm/mach-omap1/board-perseus2.c | ||
| 223 | +++ b/arch/arm/mach-omap1/board-perseus2.c | ||
| 224 | @@ -297,7 +297,7 @@ static void __init omap_perseus2_init(void) | ||
| 225 | static void __init omap_perseus2_init_irq(void) | ||
| 226 | { | ||
| 227 | omap1_init_common_hw(); | ||
| 228 | - omap_init_irq(); | ||
| 229 | + omap1_init_irq(); | ||
| 230 | } | ||
| 231 | /* Only FPGA needs to be mapped here. All others are done with ioremap */ | ||
| 232 | static struct map_desc omap_perseus2_io_desc[] __initdata = { | ||
| 233 | diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c | ||
| 234 | index 0ad781d..24f0f7b 100644 | ||
| 235 | --- a/arch/arm/mach-omap1/board-sx1.c | ||
| 236 | +++ b/arch/arm/mach-omap1/board-sx1.c | ||
| 237 | @@ -411,7 +411,7 @@ static void __init omap_sx1_init(void) | ||
| 238 | static void __init omap_sx1_init_irq(void) | ||
| 239 | { | ||
| 240 | omap1_init_common_hw(); | ||
| 241 | - omap_init_irq(); | ||
| 242 | + omap1_init_irq(); | ||
| 243 | } | ||
| 244 | /*----------------------------------------*/ | ||
| 245 | |||
| 246 | diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c | ||
| 247 | index 65d2420..98826e2 100644 | ||
| 248 | --- a/arch/arm/mach-omap1/board-voiceblue.c | ||
| 249 | +++ b/arch/arm/mach-omap1/board-voiceblue.c | ||
| 250 | @@ -162,7 +162,7 @@ static struct omap_board_config_kernel voiceblue_config[] = { | ||
| 251 | static void __init voiceblue_init_irq(void) | ||
| 252 | { | ||
| 253 | omap1_init_common_hw(); | ||
| 254 | - omap_init_irq(); | ||
| 255 | + omap1_init_irq(); | ||
| 256 | } | ||
| 257 | |||
| 258 | static void __init voiceblue_map_io(void) | ||
| 259 | diff --git a/arch/arm/mach-omap1/irq.c b/arch/arm/mach-omap1/irq.c | ||
| 260 | index 5d3da7a..e2b9c90 100644 | ||
| 261 | --- a/arch/arm/mach-omap1/irq.c | ||
| 262 | +++ b/arch/arm/mach-omap1/irq.c | ||
| 263 | @@ -175,7 +175,7 @@ static struct irq_chip omap_irq_chip = { | ||
| 264 | .irq_set_wake = omap_wake_irq, | ||
| 265 | }; | ||
| 266 | |||
| 267 | -void __init omap_init_irq(void) | ||
| 268 | +void __init omap1_init_irq(void) | ||
| 269 | { | ||
| 270 | int i, j; | ||
| 271 | |||
| 272 | diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c | ||
| 273 | index 5de6eac..45cabc5 100644 | ||
| 274 | --- a/arch/arm/mach-omap2/board-2430sdp.c | ||
| 275 | +++ b/arch/arm/mach-omap2/board-2430sdp.c | ||
| 276 | @@ -260,7 +260,7 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") | ||
| 277 | .reserve = omap_reserve, | ||
| 278 | .map_io = omap_2430sdp_map_io, | ||
| 279 | .init_early = omap_2430sdp_init_early, | ||
| 280 | - .init_irq = omap_init_irq, | ||
| 281 | + .init_irq = omap2_init_irq, | ||
| 282 | .init_machine = omap_2430sdp_init, | ||
| 283 | .timer = &omap_timer, | ||
| 284 | MACHINE_END | ||
| 285 | diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c | ||
| 286 | index 5dac974..85b207f 100644 | ||
| 287 | --- a/arch/arm/mach-omap2/board-3430sdp.c | ||
| 288 | +++ b/arch/arm/mach-omap2/board-3430sdp.c | ||
| 289 | @@ -804,7 +804,7 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") | ||
| 290 | .reserve = omap_reserve, | ||
| 291 | .map_io = omap3_map_io, | ||
| 292 | .init_early = omap_3430sdp_init_early, | ||
| 293 | - .init_irq = omap_init_irq, | ||
| 294 | + .init_irq = omap3_init_irq, | ||
| 295 | .init_machine = omap_3430sdp_init, | ||
| 296 | .timer = &omap_timer, | ||
| 297 | MACHINE_END | ||
| 298 | diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c | ||
| 299 | index a5933cc..2ec2d76 100644 | ||
| 300 | --- a/arch/arm/mach-omap2/board-3630sdp.c | ||
| 301 | +++ b/arch/arm/mach-omap2/board-3630sdp.c | ||
| 302 | @@ -219,7 +219,7 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") | ||
| 303 | .reserve = omap_reserve, | ||
| 304 | .map_io = omap3_map_io, | ||
| 305 | .init_early = omap_sdp_init_early, | ||
| 306 | - .init_irq = omap_init_irq, | ||
| 307 | + .init_irq = omap3_init_irq, | ||
| 308 | .init_machine = omap_sdp_init, | ||
| 309 | .timer = &omap_timer, | ||
| 310 | MACHINE_END | ||
| 311 | diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c | ||
| 312 | index 5e438a7..0bed0a4 100644 | ||
| 313 | --- a/arch/arm/mach-omap2/board-am3517crane.c | ||
| 314 | +++ b/arch/arm/mach-omap2/board-am3517crane.c | ||
| 315 | @@ -104,7 +104,7 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") | ||
| 316 | .reserve = omap_reserve, | ||
| 317 | .map_io = omap3_map_io, | ||
| 318 | .init_early = am3517_crane_init_early, | ||
| 319 | - .init_irq = omap_init_irq, | ||
| 320 | + .init_irq = omap3_init_irq, | ||
| 321 | .init_machine = am3517_crane_init, | ||
| 322 | .timer = &omap_timer, | ||
| 323 | MACHINE_END | ||
| 324 | diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c | ||
| 325 | index 63af417..0db0fb8 100644 | ||
| 326 | --- a/arch/arm/mach-omap2/board-am3517evm.c | ||
| 327 | +++ b/arch/arm/mach-omap2/board-am3517evm.c | ||
| 328 | @@ -494,7 +494,7 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") | ||
| 329 | .reserve = omap_reserve, | ||
| 330 | .map_io = omap3_map_io, | ||
| 331 | .init_early = am3517_evm_init_early, | ||
| 332 | - .init_irq = omap_init_irq, | ||
| 333 | + .init_irq = omap3_init_irq, | ||
| 334 | .init_machine = am3517_evm_init, | ||
| 335 | .timer = &omap_timer, | ||
| 336 | MACHINE_END | ||
| 337 | diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c | ||
| 338 | index b124bdf..93576c8 100644 | ||
| 339 | --- a/arch/arm/mach-omap2/board-apollon.c | ||
| 340 | +++ b/arch/arm/mach-omap2/board-apollon.c | ||
| 341 | @@ -354,7 +354,7 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") | ||
| 342 | .reserve = omap_reserve, | ||
| 343 | .map_io = omap_apollon_map_io, | ||
| 344 | .init_early = omap_apollon_init_early, | ||
| 345 | - .init_irq = omap_init_irq, | ||
| 346 | + .init_irq = omap2_init_irq, | ||
| 347 | .init_machine = omap_apollon_init, | ||
| 348 | .timer = &omap_timer, | ||
| 349 | MACHINE_END | ||
| 350 | diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 351 | index ceb581e..43b1de5 100644 | ||
| 352 | --- a/arch/arm/mach-omap2/board-cm-t35.c | ||
| 353 | +++ b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 354 | @@ -644,7 +644,7 @@ MACHINE_START(CM_T35, "Compulab CM-T35") | ||
| 355 | .reserve = omap_reserve, | ||
| 356 | .map_io = omap3_map_io, | ||
| 357 | .init_early = cm_t35_init_early, | ||
| 358 | - .init_irq = omap_init_irq, | ||
| 359 | + .init_irq = omap3_init_irq, | ||
| 360 | .init_machine = cm_t35_init, | ||
| 361 | .timer = &omap_timer, | ||
| 362 | MACHINE_END | ||
| 363 | diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c | ||
| 364 | index c3a9fd3..8f15222 100644 | ||
| 365 | --- a/arch/arm/mach-omap2/board-cm-t3517.c | ||
| 366 | +++ b/arch/arm/mach-omap2/board-cm-t3517.c | ||
| 367 | @@ -304,7 +304,7 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") | ||
| 368 | .reserve = omap_reserve, | ||
| 369 | .map_io = omap3_map_io, | ||
| 370 | .init_early = cm_t3517_init_early, | ||
| 371 | - .init_irq = omap_init_irq, | ||
| 372 | + .init_irq = omap3_init_irq, | ||
| 373 | .init_machine = cm_t3517_init, | ||
| 374 | .timer = &omap_timer, | ||
| 375 | MACHINE_END | ||
| 376 | diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c | ||
| 377 | index ead9c1d..73f3a22 100644 | ||
| 378 | --- a/arch/arm/mach-omap2/board-devkit8000.c | ||
| 379 | +++ b/arch/arm/mach-omap2/board-devkit8000.c | ||
| 380 | @@ -440,7 +440,7 @@ static void __init devkit8000_init_early(void) | ||
| 381 | |||
| 382 | static void __init devkit8000_init_irq(void) | ||
| 383 | { | ||
| 384 | - omap_init_irq(); | ||
| 385 | + omap3_init_irq(); | ||
| 386 | #ifdef CONFIG_OMAP_32K_TIMER | ||
| 387 | omap2_gp_clockevent_set_gptimer(12); | ||
| 388 | #endif | ||
| 389 | diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c | ||
| 390 | index 73e3c31..ccd503a 100644 | ||
| 391 | --- a/arch/arm/mach-omap2/board-generic.c | ||
| 392 | +++ b/arch/arm/mach-omap2/board-generic.c | ||
| 393 | @@ -70,7 +70,7 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") | ||
| 394 | .reserve = omap_reserve, | ||
| 395 | .map_io = omap_generic_map_io, | ||
| 396 | .init_early = omap_generic_init_early, | ||
| 397 | - .init_irq = omap_init_irq, | ||
| 398 | + .init_irq = omap2_init_irq, | ||
| 399 | .init_machine = omap_generic_init, | ||
| 400 | .timer = &omap_timer, | ||
| 401 | MACHINE_END | ||
| 402 | diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c | ||
| 403 | index bac7933..2e16d6c 100644 | ||
| 404 | --- a/arch/arm/mach-omap2/board-h4.c | ||
| 405 | +++ b/arch/arm/mach-omap2/board-h4.c | ||
| 406 | @@ -298,7 +298,7 @@ static void __init omap_h4_init_early(void) | ||
| 407 | |||
| 408 | static void __init omap_h4_init_irq(void) | ||
| 409 | { | ||
| 410 | - omap_init_irq(); | ||
| 411 | + omap2_init_irq(); | ||
| 412 | } | ||
| 413 | |||
| 414 | static struct at24_platform_data m24c01 = { | ||
| 415 | diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c | ||
| 416 | index 84d2846..f22a76a 100644 | ||
| 417 | --- a/arch/arm/mach-omap2/board-igep0020.c | ||
| 418 | +++ b/arch/arm/mach-omap2/board-igep0020.c | ||
| 419 | @@ -706,7 +706,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board") | ||
| 420 | .reserve = omap_reserve, | ||
| 421 | .map_io = omap3_map_io, | ||
| 422 | .init_early = igep_init_early, | ||
| 423 | - .init_irq = omap_init_irq, | ||
| 424 | + .init_irq = omap3_init_irq, | ||
| 425 | .init_machine = igep_init, | ||
| 426 | .timer = &omap_timer, | ||
| 427 | MACHINE_END | ||
| 428 | @@ -716,7 +716,7 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") | ||
| 429 | .reserve = omap_reserve, | ||
| 430 | .map_io = omap3_map_io, | ||
| 431 | .init_early = igep_init_early, | ||
| 432 | - .init_irq = omap_init_irq, | ||
| 433 | + .init_irq = omap3_init_irq, | ||
| 434 | .init_machine = igep_init, | ||
| 435 | .timer = &omap_timer, | ||
| 436 | MACHINE_END | ||
| 437 | diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c | ||
| 438 | index 2d7e0ae..9671843 100644 | ||
| 439 | --- a/arch/arm/mach-omap2/board-ldp.c | ||
| 440 | +++ b/arch/arm/mach-omap2/board-ldp.c | ||
| 441 | @@ -348,7 +348,7 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") | ||
| 442 | .reserve = omap_reserve, | ||
| 443 | .map_io = omap3_map_io, | ||
| 444 | .init_early = omap_ldp_init_early, | ||
| 445 | - .init_irq = omap_init_irq, | ||
| 446 | + .init_irq = omap3_init_irq, | ||
| 447 | .init_machine = omap_ldp_init, | ||
| 448 | .timer = &omap_timer, | ||
| 449 | MACHINE_END | ||
| 450 | diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c | ||
| 451 | index 8d74318..9c791a2 100644 | ||
| 452 | --- a/arch/arm/mach-omap2/board-n8x0.c | ||
| 453 | +++ b/arch/arm/mach-omap2/board-n8x0.c | ||
| 454 | @@ -699,7 +699,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800") | ||
| 455 | .reserve = omap_reserve, | ||
| 456 | .map_io = n8x0_map_io, | ||
| 457 | .init_early = n8x0_init_early, | ||
| 458 | - .init_irq = omap_init_irq, | ||
| 459 | + .init_irq = omap2_init_irq, | ||
| 460 | .init_machine = n8x0_init_machine, | ||
| 461 | .timer = &omap_timer, | ||
| 462 | MACHINE_END | ||
| 463 | @@ -709,7 +709,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810") | ||
| 464 | .reserve = omap_reserve, | ||
| 465 | .map_io = n8x0_map_io, | ||
| 466 | .init_early = n8x0_init_early, | ||
| 467 | - .init_irq = omap_init_irq, | ||
| 468 | + .init_irq = omap2_init_irq, | ||
| 469 | .init_machine = n8x0_init_machine, | ||
| 470 | .timer = &omap_timer, | ||
| 471 | MACHINE_END | ||
| 472 | @@ -719,7 +719,7 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | ||
| 473 | .reserve = omap_reserve, | ||
| 474 | .map_io = n8x0_map_io, | ||
| 475 | .init_early = n8x0_init_early, | ||
| 476 | - .init_irq = omap_init_irq, | ||
| 477 | + .init_irq = omap2_init_irq, | ||
| 478 | .init_machine = n8x0_init_machine, | ||
| 479 | .timer = &omap_timer, | ||
| 480 | MACHINE_END | ||
| 481 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 482 | index 8ef0e19..eaead5e 100644 | ||
| 483 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 484 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 485 | @@ -483,7 +483,7 @@ static void __init omap3_beagle_init_early(void) | ||
| 486 | |||
| 487 | static void __init omap3_beagle_init_irq(void) | ||
| 488 | { | ||
| 489 | - omap_init_irq(); | ||
| 490 | + omap3_init_irq(); | ||
| 491 | #ifdef CONFIG_OMAP_32K_TIMER | ||
| 492 | omap2_gp_clockevent_set_gptimer(12); | ||
| 493 | #endif | ||
| 494 | diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 495 | index e2202dd..d39f53f 100644 | ||
| 496 | --- a/arch/arm/mach-omap2/board-omap3evm.c | ||
| 497 | +++ b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 498 | @@ -739,7 +739,7 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") | ||
| 499 | .reserve = omap_reserve, | ||
| 500 | .map_io = omap3_map_io, | ||
| 501 | .init_early = omap3_evm_init_early, | ||
| 502 | - .init_irq = omap_init_irq, | ||
| 503 | + .init_irq = omap3_init_irq, | ||
| 504 | .init_machine = omap3_evm_init, | ||
| 505 | .timer = &omap_timer, | ||
| 506 | MACHINE_END | ||
| 507 | diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c | ||
| 508 | index eaefb59..b63f1c2 100644 | ||
| 509 | --- a/arch/arm/mach-omap2/board-omap3logic.c | ||
| 510 | +++ b/arch/arm/mach-omap2/board-omap3logic.c | ||
| 511 | @@ -213,7 +213,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") | ||
| 512 | .boot_params = 0x80000100, | ||
| 513 | .map_io = omap3_map_io, | ||
| 514 | .init_early = omap3logic_init_early, | ||
| 515 | - .init_irq = omap_init_irq, | ||
| 516 | + .init_irq = omap3_init_irq, | ||
| 517 | .init_machine = omap3logic_init, | ||
| 518 | .timer = &omap_timer, | ||
| 519 | MACHINE_END | ||
| 520 | @@ -222,7 +222,7 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") | ||
| 521 | .boot_params = 0x80000100, | ||
| 522 | .map_io = omap3_map_io, | ||
| 523 | .init_early = omap3logic_init_early, | ||
| 524 | - .init_irq = omap_init_irq, | ||
| 525 | + .init_irq = omap3_init_irq, | ||
| 526 | .init_machine = omap3logic_init, | ||
| 527 | .timer = &omap_timer, | ||
| 528 | MACHINE_END | ||
| 529 | diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 530 | index 130a278..1d90b90 100644 | ||
| 531 | --- a/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 532 | +++ b/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 533 | @@ -650,7 +650,7 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") | ||
| 534 | .reserve = omap_reserve, | ||
| 535 | .map_io = omap3_map_io, | ||
| 536 | .init_early = omap3pandora_init_early, | ||
| 537 | - .init_irq = omap_init_irq, | ||
| 538 | + .init_irq = omap3_init_irq, | ||
| 539 | .init_machine = omap3pandora_init, | ||
| 540 | .timer = &omap_timer, | ||
| 541 | MACHINE_END | ||
| 542 | diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 543 | index 63d12a3..dfa1401 100644 | ||
| 544 | --- a/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 545 | +++ b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 546 | @@ -491,7 +491,7 @@ static void __init omap3_stalker_init_early(void) | ||
| 547 | |||
| 548 | static void __init omap3_stalker_init_irq(void) | ||
| 549 | { | ||
| 550 | - omap_init_irq(); | ||
| 551 | + omap3_init_irq(); | ||
| 552 | #ifdef CONFIG_OMAP_32K_TIMER | ||
| 553 | omap2_gp_clockevent_set_gptimer(12); | ||
| 554 | #endif | ||
| 555 | diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 556 | index c80e2c3..ae97910 100644 | ||
| 557 | --- a/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 558 | +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 559 | @@ -371,7 +371,7 @@ static void __init omap3_touchbook_init_early(void) | ||
| 560 | |||
| 561 | static void __init omap3_touchbook_init_irq(void) | ||
| 562 | { | ||
| 563 | - omap_init_irq(); | ||
| 564 | + omap3_init_irq(); | ||
| 565 | #ifdef CONFIG_OMAP_32K_TIMER | ||
| 566 | omap2_gp_clockevent_set_gptimer(12); | ||
| 567 | #endif | ||
| 568 | diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c | ||
| 569 | index 031a9a6..e3928f23 100644 | ||
| 570 | --- a/arch/arm/mach-omap2/board-overo.c | ||
| 571 | +++ b/arch/arm/mach-omap2/board-overo.c | ||
| 572 | @@ -615,7 +615,7 @@ MACHINE_START(OVERO, "Gumstix Overo") | ||
| 573 | .reserve = omap_reserve, | ||
| 574 | .map_io = omap3_map_io, | ||
| 575 | .init_early = overo_init_early, | ||
| 576 | - .init_irq = omap_init_irq, | ||
| 577 | + .init_irq = omap3_init_irq, | ||
| 578 | .init_machine = overo_init, | ||
| 579 | .timer = &omap_timer, | ||
| 580 | MACHINE_END | ||
| 581 | diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c | ||
| 582 | index 42d10b1..9c3d115 100644 | ||
| 583 | --- a/arch/arm/mach-omap2/board-rm680.c | ||
| 584 | +++ b/arch/arm/mach-omap2/board-rm680.c | ||
| 585 | @@ -163,7 +163,7 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") | ||
| 586 | .reserve = omap_reserve, | ||
| 587 | .map_io = rm680_map_io, | ||
| 588 | .init_early = rm680_init_early, | ||
| 589 | - .init_irq = omap_init_irq, | ||
| 590 | + .init_irq = omap3_init_irq, | ||
| 591 | .init_machine = rm680_init, | ||
| 592 | .timer = &omap_timer, | ||
| 593 | MACHINE_END | ||
| 594 | diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c | ||
| 595 | index fec4cac..ee35e4e 100644 | ||
| 596 | --- a/arch/arm/mach-omap2/board-rx51.c | ||
| 597 | +++ b/arch/arm/mach-omap2/board-rx51.c | ||
| 598 | @@ -160,7 +160,7 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") | ||
| 599 | .reserve = rx51_reserve, | ||
| 600 | .map_io = rx51_map_io, | ||
| 601 | .init_early = rx51_init_early, | ||
| 602 | - .init_irq = omap_init_irq, | ||
| 603 | + .init_irq = omap3_init_irq, | ||
| 604 | .init_machine = rx51_init, | ||
| 605 | .timer = &omap_timer, | ||
| 606 | MACHINE_END | ||
| 607 | diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c | ||
| 608 | index 09fa7bf..713c20f 100644 | ||
| 609 | --- a/arch/arm/mach-omap2/board-ti8168evm.c | ||
| 610 | +++ b/arch/arm/mach-omap2/board-ti8168evm.c | ||
| 611 | @@ -33,11 +33,6 @@ static void __init ti8168_init_early(void) | ||
| 612 | omap2_init_common_devices(NULL, NULL); | ||
| 613 | } | ||
| 614 | |||
| 615 | -static void __init ti8168_evm_init_irq(void) | ||
| 616 | -{ | ||
| 617 | - omap_init_irq(); | ||
| 618 | -} | ||
| 619 | - | ||
| 620 | static void __init ti8168_evm_init(void) | ||
| 621 | { | ||
| 622 | omap_serial_init(); | ||
| 623 | @@ -56,7 +51,7 @@ MACHINE_START(TI8168EVM, "ti8168evm") | ||
| 624 | .boot_params = 0x80000100, | ||
| 625 | .map_io = ti8168_evm_map_io, | ||
| 626 | .init_early = ti8168_init_early, | ||
| 627 | - .init_irq = ti8168_evm_init_irq, | ||
| 628 | + .init_irq = ti816x_init_irq, | ||
| 629 | .timer = &omap_timer, | ||
| 630 | .init_machine = ti8168_evm_init, | ||
| 631 | MACHINE_END | ||
| 632 | diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c | ||
| 633 | index 4b133d7..97a3f0b 100644 | ||
| 634 | --- a/arch/arm/mach-omap2/board-zoom.c | ||
| 635 | +++ b/arch/arm/mach-omap2/board-zoom.c | ||
| 636 | @@ -137,7 +137,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") | ||
| 637 | .reserve = omap_reserve, | ||
| 638 | .map_io = omap3_map_io, | ||
| 639 | .init_early = omap_zoom_init_early, | ||
| 640 | - .init_irq = omap_init_irq, | ||
| 641 | + .init_irq = omap3_init_irq, | ||
| 642 | .init_machine = omap_zoom_init, | ||
| 643 | .timer = &omap_timer, | ||
| 644 | MACHINE_END | ||
| 645 | @@ -147,7 +147,7 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") | ||
| 646 | .reserve = omap_reserve, | ||
| 647 | .map_io = omap3_map_io, | ||
| 648 | .init_early = omap_zoom_init_early, | ||
| 649 | - .init_irq = omap_init_irq, | ||
| 650 | + .init_irq = omap3_init_irq, | ||
| 651 | .init_machine = omap_zoom_init, | ||
| 652 | .timer = &omap_timer, | ||
| 653 | MACHINE_END | ||
| 654 | diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c | ||
| 655 | index 441e79d..2ce1ce6 100644 | ||
| 656 | --- a/arch/arm/mach-omap2/io.c | ||
| 657 | +++ b/arch/arm/mach-omap2/io.c | ||
| 658 | @@ -333,23 +333,9 @@ static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data) | ||
| 659 | return omap_hwmod_set_postsetup_state(oh, *(u8 *)data); | ||
| 660 | } | ||
| 661 | |||
| 662 | +/* See irq.c, omap4-common.c and entry-macro.S */ | ||
| 663 | void __iomem *omap_irq_base; | ||
| 664 | |||
| 665 | -/* | ||
| 666 | - * Initialize asm_irq_base for entry-macro.S | ||
| 667 | - */ | ||
| 668 | -static inline void omap_irq_base_init(void) | ||
| 669 | -{ | ||
| 670 | - if (cpu_is_omap24xx()) | ||
| 671 | - omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP24XX_IC_BASE); | ||
| 672 | - else if (cpu_is_omap34xx()) | ||
| 673 | - omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP34XX_IC_BASE); | ||
| 674 | - else if (cpu_is_omap44xx()) | ||
| 675 | - omap_irq_base = OMAP2_L4_IO_ADDRESS(OMAP44XX_GIC_CPU_BASE); | ||
| 676 | - else | ||
| 677 | - pr_err("Could not initialize omap_irq_base\n"); | ||
| 678 | -} | ||
| 679 | - | ||
| 680 | void __init omap2_init_common_infrastructure(void) | ||
| 681 | { | ||
| 682 | u8 postsetup_state; | ||
| 683 | @@ -422,7 +408,6 @@ void __init omap2_init_common_devices(struct omap_sdrc_params *sdrc_cs0, | ||
| 684 | _omap2_init_reprogram_sdrc(); | ||
| 685 | } | ||
| 686 | |||
| 687 | - omap_irq_base_init(); | ||
| 688 | } | ||
| 689 | |||
| 690 | /* | ||
| 691 | diff --git a/arch/arm/mach-omap2/irq.c b/arch/arm/mach-omap2/irq.c | ||
| 692 | index 3af2b7a..3a12f75 100644 | ||
| 693 | --- a/arch/arm/mach-omap2/irq.c | ||
| 694 | +++ b/arch/arm/mach-omap2/irq.c | ||
| 695 | @@ -141,25 +141,20 @@ omap_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num) | ||
| 696 | IRQ_NOREQUEST | IRQ_NOPROBE, 0); | ||
| 697 | } | ||
| 698 | |||
| 699 | -void __init omap_init_irq(void) | ||
| 700 | +static void __init omap_init_irq(u32 base, int nr_irqs) | ||
| 701 | { | ||
| 702 | unsigned long nr_of_irqs = 0; | ||
| 703 | unsigned int nr_banks = 0; | ||
| 704 | int i, j; | ||
| 705 | |||
| 706 | + omap_irq_base = ioremap(base, SZ_4K); | ||
| 707 | + if (WARN_ON(!omap_irq_base)) | ||
| 708 | + return; | ||
| 709 | + | ||
| 710 | for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { | ||
| 711 | - unsigned long base = 0; | ||
| 712 | struct omap_irq_bank *bank = irq_banks + i; | ||
| 713 | |||
| 714 | - if (cpu_is_omap24xx()) | ||
| 715 | - base = OMAP24XX_IC_BASE; | ||
| 716 | - else if (cpu_is_omap34xx()) | ||
| 717 | - base = OMAP34XX_IC_BASE; | ||
| 718 | - | ||
| 719 | - BUG_ON(!base); | ||
| 720 | - | ||
| 721 | - if (cpu_is_ti816x()) | ||
| 722 | - bank->nr_irqs = 128; | ||
| 723 | + bank->nr_irqs = nr_irqs; | ||
| 724 | |||
| 725 | /* Static mapping, never released */ | ||
| 726 | bank->base_reg = ioremap(base, SZ_4K); | ||
| 727 | @@ -181,6 +176,21 @@ void __init omap_init_irq(void) | ||
| 728 | nr_of_irqs, nr_banks, nr_banks > 1 ? "s" : ""); | ||
| 729 | } | ||
| 730 | |||
| 731 | +void __init omap2_init_irq(void) | ||
| 732 | +{ | ||
| 733 | + omap_init_irq(OMAP24XX_IC_BASE, 96); | ||
| 734 | +} | ||
| 735 | + | ||
| 736 | +void __init omap3_init_irq(void) | ||
| 737 | +{ | ||
| 738 | + omap_init_irq(OMAP34XX_IC_BASE, 96); | ||
| 739 | +} | ||
| 740 | + | ||
| 741 | +void __init ti816x_init_irq(void) | ||
| 742 | +{ | ||
| 743 | + omap_init_irq(OMAP34XX_IC_BASE, 128); | ||
| 744 | +} | ||
| 745 | + | ||
| 746 | #ifdef CONFIG_ARCH_OMAP3 | ||
| 747 | static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)]; | ||
| 748 | |||
| 749 | diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c | ||
| 750 | index 9ef8c29..35ac3e5 100644 | ||
| 751 | --- a/arch/arm/mach-omap2/omap4-common.c | ||
| 752 | +++ b/arch/arm/mach-omap2/omap4-common.c | ||
| 753 | @@ -19,6 +19,8 @@ | ||
| 754 | #include <asm/hardware/gic.h> | ||
| 755 | #include <asm/hardware/cache-l2x0.h> | ||
| 756 | |||
| 757 | +#include <plat/irqs.h> | ||
| 758 | + | ||
| 759 | #include <mach/hardware.h> | ||
| 760 | #include <mach/omap4-common.h> | ||
| 761 | |||
| 762 | @@ -31,17 +33,15 @@ void __iomem *gic_dist_base_addr; | ||
| 763 | |||
| 764 | void __init gic_init_irq(void) | ||
| 765 | { | ||
| 766 | - void __iomem *gic_cpu_base; | ||
| 767 | - | ||
| 768 | /* Static mapping, never released */ | ||
| 769 | gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K); | ||
| 770 | BUG_ON(!gic_dist_base_addr); | ||
| 771 | |||
| 772 | /* Static mapping, never released */ | ||
| 773 | - gic_cpu_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); | ||
| 774 | - BUG_ON(!gic_cpu_base); | ||
| 775 | + omap_irq_base = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512); | ||
| 776 | + BUG_ON(!omap_irq_base); | ||
| 777 | |||
| 778 | - gic_init(0, 29, gic_dist_base_addr, gic_cpu_base); | ||
| 779 | + gic_init(0, 29, gic_dist_base_addr, omap_irq_base); | ||
| 780 | } | ||
| 781 | |||
| 782 | #ifdef CONFIG_CACHE_L2X0 | ||
| 783 | diff --git a/arch/arm/plat-omap/include/plat/irqs.h b/arch/arm/plat-omap/include/plat/irqs.h | ||
| 784 | index 5a25098..c884320 100644 | ||
| 785 | --- a/arch/arm/plat-omap/include/plat/irqs.h | ||
| 786 | +++ b/arch/arm/plat-omap/include/plat/irqs.h | ||
| 787 | @@ -428,7 +428,11 @@ | ||
| 788 | #define INTCPS_NR_IRQS 96 | ||
| 789 | |||
| 790 | #ifndef __ASSEMBLY__ | ||
| 791 | -extern void omap_init_irq(void); | ||
| 792 | +extern void __iomem *omap_irq_base; | ||
| 793 | +void omap1_init_irq(void); | ||
| 794 | +void omap2_init_irq(void); | ||
| 795 | +void omap3_init_irq(void); | ||
| 796 | +void ti816x_init_irq(void); | ||
| 797 | extern int omap_irq_pending(void); | ||
| 798 | void omap_intc_save_context(void); | ||
| 799 | void omap_intc_restore_context(void); | ||
| 800 | -- | ||
| 801 | 1.7.2.5 | ||
| 802 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0004-omap-Set-separate-timer-init-functions-to-avoid-cpu_.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0004-omap-Set-separate-timer-init-functions-to-avoid-cpu_.patch deleted file mode 100644 index 8fbbc476..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0004-omap-Set-separate-timer-init-functions-to-avoid-cpu_.patch +++ /dev/null | |||
| @@ -1,689 +0,0 @@ | |||
| 1 | From b623b767d19edcc2d08909b044e1ab57956d9d49 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Tony Lindgren <tony@atomide.com> | ||
| 3 | Date: Tue, 29 Mar 2011 15:54:48 -0700 | ||
| 4 | Subject: [PATCH 004/149] omap: Set separate timer init functions to avoid cpu_is_omap tests | ||
| 5 | |||
| 6 | This is needed for the following patches so we can initialize the | ||
| 7 | rest of the hardware timers later on. | ||
| 8 | |||
| 9 | As with the init_irq calls, there's no need to do cpu_is_omap calls | ||
| 10 | during the timer init as we only care about the major omap generation. | ||
| 11 | This means that we can initialize the sys_timer with the .timer | ||
| 12 | entries alone. | ||
| 13 | |||
| 14 | Note that for now we just set stubs for the various sys_timer entries | ||
| 15 | that will get populated in a later patch. The following patches will | ||
| 16 | also remove the omap_dm_timer_init calls and change the init for the | ||
| 17 | rest of the hardware timers to happen with an arch_initcall. | ||
| 18 | |||
| 19 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 20 | Reviewed-by: Kevin Hilman <khilman@ti.com> | ||
| 21 | --- | ||
| 22 | arch/arm/mach-omap1/board-ams-delta.c | 2 +- | ||
| 23 | arch/arm/mach-omap1/board-fsample.c | 2 +- | ||
| 24 | arch/arm/mach-omap1/board-generic.c | 2 +- | ||
| 25 | arch/arm/mach-omap1/board-h2.c | 2 +- | ||
| 26 | arch/arm/mach-omap1/board-h3.c | 2 +- | ||
| 27 | arch/arm/mach-omap1/board-htcherald.c | 2 +- | ||
| 28 | arch/arm/mach-omap1/board-innovator.c | 2 +- | ||
| 29 | arch/arm/mach-omap1/board-nokia770.c | 2 +- | ||
| 30 | arch/arm/mach-omap1/board-osk.c | 2 +- | ||
| 31 | arch/arm/mach-omap1/board-palmte.c | 2 +- | ||
| 32 | arch/arm/mach-omap1/board-palmtt.c | 2 +- | ||
| 33 | arch/arm/mach-omap1/board-palmz71.c | 2 +- | ||
| 34 | arch/arm/mach-omap1/board-perseus2.c | 2 +- | ||
| 35 | arch/arm/mach-omap1/board-sx1.c | 2 +- | ||
| 36 | arch/arm/mach-omap1/board-voiceblue.c | 2 +- | ||
| 37 | arch/arm/mach-omap1/time.c | 6 ++-- | ||
| 38 | arch/arm/mach-omap2/board-2430sdp.c | 2 +- | ||
| 39 | arch/arm/mach-omap2/board-3430sdp.c | 2 +- | ||
| 40 | arch/arm/mach-omap2/board-3630sdp.c | 2 +- | ||
| 41 | arch/arm/mach-omap2/board-4430sdp.c | 2 +- | ||
| 42 | arch/arm/mach-omap2/board-am3517crane.c | 2 +- | ||
| 43 | arch/arm/mach-omap2/board-am3517evm.c | 2 +- | ||
| 44 | arch/arm/mach-omap2/board-apollon.c | 2 +- | ||
| 45 | arch/arm/mach-omap2/board-cm-t35.c | 2 +- | ||
| 46 | arch/arm/mach-omap2/board-cm-t3517.c | 2 +- | ||
| 47 | arch/arm/mach-omap2/board-devkit8000.c | 2 +- | ||
| 48 | arch/arm/mach-omap2/board-generic.c | 2 +- | ||
| 49 | arch/arm/mach-omap2/board-h4.c | 2 +- | ||
| 50 | arch/arm/mach-omap2/board-igep0020.c | 4 +- | ||
| 51 | arch/arm/mach-omap2/board-ldp.c | 2 +- | ||
| 52 | arch/arm/mach-omap2/board-n8x0.c | 6 ++-- | ||
| 53 | arch/arm/mach-omap2/board-omap3beagle.c | 2 +- | ||
| 54 | arch/arm/mach-omap2/board-omap3evm.c | 2 +- | ||
| 55 | arch/arm/mach-omap2/board-omap3logic.c | 4 +- | ||
| 56 | arch/arm/mach-omap2/board-omap3pandora.c | 2 +- | ||
| 57 | arch/arm/mach-omap2/board-omap3stalker.c | 2 +- | ||
| 58 | arch/arm/mach-omap2/board-omap3touchbook.c | 2 +- | ||
| 59 | arch/arm/mach-omap2/board-omap4panda.c | 2 +- | ||
| 60 | arch/arm/mach-omap2/board-overo.c | 2 +- | ||
| 61 | arch/arm/mach-omap2/board-rm680.c | 2 +- | ||
| 62 | arch/arm/mach-omap2/board-rx51.c | 2 +- | ||
| 63 | arch/arm/mach-omap2/board-ti8168evm.c | 2 +- | ||
| 64 | arch/arm/mach-omap2/board-zoom.c | 4 +- | ||
| 65 | arch/arm/mach-omap2/timer-gp.c | 41 +++++++++++++++++++++------- | ||
| 66 | arch/arm/plat-omap/include/plat/common.h | 6 +++- | ||
| 67 | arch/arm/plat-omap/include/plat/dmtimer.h | 1 - | ||
| 68 | 46 files changed, 86 insertions(+), 62 deletions(-) | ||
| 69 | |||
| 70 | diff --git a/arch/arm/mach-omap1/board-ams-delta.c b/arch/arm/mach-omap1/board-ams-delta.c | ||
| 71 | index e3caef8..312ea6b 100644 | ||
| 72 | --- a/arch/arm/mach-omap1/board-ams-delta.c | ||
| 73 | +++ b/arch/arm/mach-omap1/board-ams-delta.c | ||
| 74 | @@ -391,7 +391,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") | ||
| 75 | .reserve = omap_reserve, | ||
| 76 | .init_irq = ams_delta_init_irq, | ||
| 77 | .init_machine = ams_delta_init, | ||
| 78 | - .timer = &omap_timer, | ||
| 79 | + .timer = &omap1_timer, | ||
| 80 | MACHINE_END | ||
| 81 | |||
| 82 | EXPORT_SYMBOL(ams_delta_latch1_write); | ||
| 83 | diff --git a/arch/arm/mach-omap1/board-fsample.c b/arch/arm/mach-omap1/board-fsample.c | ||
| 84 | index eaff305..a6b1bea 100644 | ||
| 85 | --- a/arch/arm/mach-omap1/board-fsample.c | ||
| 86 | +++ b/arch/arm/mach-omap1/board-fsample.c | ||
| 87 | @@ -394,5 +394,5 @@ MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample") | ||
| 88 | .reserve = omap_reserve, | ||
| 89 | .init_irq = omap_fsample_init_irq, | ||
| 90 | .init_machine = omap_fsample_init, | ||
| 91 | - .timer = &omap_timer, | ||
| 92 | + .timer = &omap1_timer, | ||
| 93 | MACHINE_END | ||
| 94 | diff --git a/arch/arm/mach-omap1/board-generic.c b/arch/arm/mach-omap1/board-generic.c | ||
| 95 | index 3fd6b40..04fc356 100644 | ||
| 96 | --- a/arch/arm/mach-omap1/board-generic.c | ||
| 97 | +++ b/arch/arm/mach-omap1/board-generic.c | ||
| 98 | @@ -99,5 +99,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP1510/1610/1710") | ||
| 99 | .reserve = omap_reserve, | ||
| 100 | .init_irq = omap_generic_init_irq, | ||
| 101 | .init_machine = omap_generic_init, | ||
| 102 | - .timer = &omap_timer, | ||
| 103 | + .timer = &omap1_timer, | ||
| 104 | MACHINE_END | ||
| 105 | diff --git a/arch/arm/mach-omap1/board-h2.c b/arch/arm/mach-omap1/board-h2.c | ||
| 106 | index 8147b04..cb7fb1a 100644 | ||
| 107 | --- a/arch/arm/mach-omap1/board-h2.c | ||
| 108 | +++ b/arch/arm/mach-omap1/board-h2.c | ||
| 109 | @@ -466,5 +466,5 @@ MACHINE_START(OMAP_H2, "TI-H2") | ||
| 110 | .reserve = omap_reserve, | ||
| 111 | .init_irq = h2_init_irq, | ||
| 112 | .init_machine = h2_init, | ||
| 113 | - .timer = &omap_timer, | ||
| 114 | + .timer = &omap1_timer, | ||
| 115 | MACHINE_END | ||
| 116 | diff --git a/arch/arm/mach-omap1/board-h3.c b/arch/arm/mach-omap1/board-h3.c | ||
| 117 | index 1b448f6..31f3487 100644 | ||
| 118 | --- a/arch/arm/mach-omap1/board-h3.c | ||
| 119 | +++ b/arch/arm/mach-omap1/board-h3.c | ||
| 120 | @@ -454,5 +454,5 @@ MACHINE_START(OMAP_H3, "TI OMAP1710 H3 board") | ||
| 121 | .reserve = omap_reserve, | ||
| 122 | .init_irq = h3_init_irq, | ||
| 123 | .init_machine = h3_init, | ||
| 124 | - .timer = &omap_timer, | ||
| 125 | + .timer = &omap1_timer, | ||
| 126 | MACHINE_END | ||
| 127 | diff --git a/arch/arm/mach-omap1/board-htcherald.c b/arch/arm/mach-omap1/board-htcherald.c | ||
| 128 | index 1bd4d8e..36e06ea 100644 | ||
| 129 | --- a/arch/arm/mach-omap1/board-htcherald.c | ||
| 130 | +++ b/arch/arm/mach-omap1/board-htcherald.c | ||
| 131 | @@ -616,5 +616,5 @@ MACHINE_START(HERALD, "HTC Herald") | ||
| 132 | .reserve = omap_reserve, | ||
| 133 | .init_irq = htcherald_init_irq, | ||
| 134 | .init_machine = htcherald_init, | ||
| 135 | - .timer = &omap_timer, | ||
| 136 | + .timer = &omap1_timer, | ||
| 137 | MACHINE_END | ||
| 138 | diff --git a/arch/arm/mach-omap1/board-innovator.c b/arch/arm/mach-omap1/board-innovator.c | ||
| 139 | index 5926b0c..0b1ba46 100644 | ||
| 140 | --- a/arch/arm/mach-omap1/board-innovator.c | ||
| 141 | +++ b/arch/arm/mach-omap1/board-innovator.c | ||
| 142 | @@ -464,5 +464,5 @@ MACHINE_START(OMAP_INNOVATOR, "TI-Innovator") | ||
| 143 | .reserve = omap_reserve, | ||
| 144 | .init_irq = innovator_init_irq, | ||
| 145 | .init_machine = innovator_init, | ||
| 146 | - .timer = &omap_timer, | ||
| 147 | + .timer = &omap1_timer, | ||
| 148 | MACHINE_END | ||
| 149 | diff --git a/arch/arm/mach-omap1/board-nokia770.c b/arch/arm/mach-omap1/board-nokia770.c | ||
| 150 | index e3cf21d..5469ce2 100644 | ||
| 151 | --- a/arch/arm/mach-omap1/board-nokia770.c | ||
| 152 | +++ b/arch/arm/mach-omap1/board-nokia770.c | ||
| 153 | @@ -269,5 +269,5 @@ MACHINE_START(NOKIA770, "Nokia 770") | ||
| 154 | .reserve = omap_reserve, | ||
| 155 | .init_irq = omap_nokia770_init_irq, | ||
| 156 | .init_machine = omap_nokia770_init, | ||
| 157 | - .timer = &omap_timer, | ||
| 158 | + .timer = &omap1_timer, | ||
| 159 | MACHINE_END | ||
| 160 | diff --git a/arch/arm/mach-omap1/board-osk.c b/arch/arm/mach-omap1/board-osk.c | ||
| 161 | index 1e7823d..b08a213 100644 | ||
| 162 | --- a/arch/arm/mach-omap1/board-osk.c | ||
| 163 | +++ b/arch/arm/mach-omap1/board-osk.c | ||
| 164 | @@ -588,5 +588,5 @@ MACHINE_START(OMAP_OSK, "TI-OSK") | ||
| 165 | .reserve = omap_reserve, | ||
| 166 | .init_irq = osk_init_irq, | ||
| 167 | .init_machine = osk_init, | ||
| 168 | - .timer = &omap_timer, | ||
| 169 | + .timer = &omap1_timer, | ||
| 170 | MACHINE_END | ||
| 171 | diff --git a/arch/arm/mach-omap1/board-palmte.c b/arch/arm/mach-omap1/board-palmte.c | ||
| 172 | index 8b6a881..459cb6b 100644 | ||
| 173 | --- a/arch/arm/mach-omap1/board-palmte.c | ||
| 174 | +++ b/arch/arm/mach-omap1/board-palmte.c | ||
| 175 | @@ -280,5 +280,5 @@ MACHINE_START(OMAP_PALMTE, "OMAP310 based Palm Tungsten E") | ||
| 176 | .reserve = omap_reserve, | ||
| 177 | .init_irq = omap_palmte_init_irq, | ||
| 178 | .init_machine = omap_palmte_init, | ||
| 179 | - .timer = &omap_timer, | ||
| 180 | + .timer = &omap1_timer, | ||
| 181 | MACHINE_END | ||
| 182 | diff --git a/arch/arm/mach-omap1/board-palmtt.c b/arch/arm/mach-omap1/board-palmtt.c | ||
| 183 | index f2de43d..b214f45 100644 | ||
| 184 | --- a/arch/arm/mach-omap1/board-palmtt.c | ||
| 185 | +++ b/arch/arm/mach-omap1/board-palmtt.c | ||
| 186 | @@ -326,5 +326,5 @@ MACHINE_START(OMAP_PALMTT, "OMAP1510 based Palm Tungsten|T") | ||
| 187 | .reserve = omap_reserve, | ||
| 188 | .init_irq = omap_palmtt_init_irq, | ||
| 189 | .init_machine = omap_palmtt_init, | ||
| 190 | - .timer = &omap_timer, | ||
| 191 | + .timer = &omap1_timer, | ||
| 192 | MACHINE_END | ||
| 193 | diff --git a/arch/arm/mach-omap1/board-palmz71.c b/arch/arm/mach-omap1/board-palmz71.c | ||
| 194 | index 6665d2d..9b0ea48 100644 | ||
| 195 | --- a/arch/arm/mach-omap1/board-palmz71.c | ||
| 196 | +++ b/arch/arm/mach-omap1/board-palmz71.c | ||
| 197 | @@ -346,5 +346,5 @@ MACHINE_START(OMAP_PALMZ71, "OMAP310 based Palm Zire71") | ||
| 198 | .reserve = omap_reserve, | ||
| 199 | .init_irq = omap_palmz71_init_irq, | ||
| 200 | .init_machine = omap_palmz71_init, | ||
| 201 | - .timer = &omap_timer, | ||
| 202 | + .timer = &omap1_timer, | ||
| 203 | MACHINE_END | ||
| 204 | diff --git a/arch/arm/mach-omap1/board-perseus2.c b/arch/arm/mach-omap1/board-perseus2.c | ||
| 205 | index 7f019e5..67acd41 100644 | ||
| 206 | --- a/arch/arm/mach-omap1/board-perseus2.c | ||
| 207 | +++ b/arch/arm/mach-omap1/board-perseus2.c | ||
| 208 | @@ -355,5 +355,5 @@ MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2") | ||
| 209 | .reserve = omap_reserve, | ||
| 210 | .init_irq = omap_perseus2_init_irq, | ||
| 211 | .init_machine = omap_perseus2_init, | ||
| 212 | - .timer = &omap_timer, | ||
| 213 | + .timer = &omap1_timer, | ||
| 214 | MACHINE_END | ||
| 215 | diff --git a/arch/arm/mach-omap1/board-sx1.c b/arch/arm/mach-omap1/board-sx1.c | ||
| 216 | index 24f0f7b..9c3b7c5 100644 | ||
| 217 | --- a/arch/arm/mach-omap1/board-sx1.c | ||
| 218 | +++ b/arch/arm/mach-omap1/board-sx1.c | ||
| 219 | @@ -426,5 +426,5 @@ MACHINE_START(SX1, "OMAP310 based Siemens SX1") | ||
| 220 | .reserve = omap_reserve, | ||
| 221 | .init_irq = omap_sx1_init_irq, | ||
| 222 | .init_machine = omap_sx1_init, | ||
| 223 | - .timer = &omap_timer, | ||
| 224 | + .timer = &omap1_timer, | ||
| 225 | MACHINE_END | ||
| 226 | diff --git a/arch/arm/mach-omap1/board-voiceblue.c b/arch/arm/mach-omap1/board-voiceblue.c | ||
| 227 | index 98826e2..036edc0e 100644 | ||
| 228 | --- a/arch/arm/mach-omap1/board-voiceblue.c | ||
| 229 | +++ b/arch/arm/mach-omap1/board-voiceblue.c | ||
| 230 | @@ -306,5 +306,5 @@ MACHINE_START(VOICEBLUE, "VoiceBlue OMAP5910") | ||
| 231 | .reserve = omap_reserve, | ||
| 232 | .init_irq = voiceblue_init_irq, | ||
| 233 | .init_machine = voiceblue_init, | ||
| 234 | - .timer = &omap_timer, | ||
| 235 | + .timer = &omap1_timer, | ||
| 236 | MACHINE_END | ||
| 237 | diff --git a/arch/arm/mach-omap1/time.c b/arch/arm/mach-omap1/time.c | ||
| 238 | index 03e1e10..a183777 100644 | ||
| 239 | --- a/arch/arm/mach-omap1/time.c | ||
| 240 | +++ b/arch/arm/mach-omap1/time.c | ||
| 241 | @@ -297,7 +297,7 @@ static inline int omap_32k_timer_usable(void) | ||
| 242 | * Timer initialization | ||
| 243 | * --------------------------------------------------------------------------- | ||
| 244 | */ | ||
| 245 | -static void __init omap_timer_init(void) | ||
| 246 | +static void __init omap1_timer_init(void) | ||
| 247 | { | ||
| 248 | if (omap_32k_timer_usable()) { | ||
| 249 | preferred_sched_clock_init(1); | ||
| 250 | @@ -307,6 +307,6 @@ static void __init omap_timer_init(void) | ||
| 251 | } | ||
| 252 | } | ||
| 253 | |||
| 254 | -struct sys_timer omap_timer = { | ||
| 255 | - .init = omap_timer_init, | ||
| 256 | +struct sys_timer omap1_timer = { | ||
| 257 | + .init = omap1_timer_init, | ||
| 258 | }; | ||
| 259 | diff --git a/arch/arm/mach-omap2/board-2430sdp.c b/arch/arm/mach-omap2/board-2430sdp.c | ||
| 260 | index 45cabc5..2028464 100644 | ||
| 261 | --- a/arch/arm/mach-omap2/board-2430sdp.c | ||
| 262 | +++ b/arch/arm/mach-omap2/board-2430sdp.c | ||
| 263 | @@ -262,5 +262,5 @@ MACHINE_START(OMAP_2430SDP, "OMAP2430 sdp2430 board") | ||
| 264 | .init_early = omap_2430sdp_init_early, | ||
| 265 | .init_irq = omap2_init_irq, | ||
| 266 | .init_machine = omap_2430sdp_init, | ||
| 267 | - .timer = &omap_timer, | ||
| 268 | + .timer = &omap2_timer, | ||
| 269 | MACHINE_END | ||
| 270 | diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c | ||
| 271 | index 85b207f..12fae21 100644 | ||
| 272 | --- a/arch/arm/mach-omap2/board-3430sdp.c | ||
| 273 | +++ b/arch/arm/mach-omap2/board-3430sdp.c | ||
| 274 | @@ -806,5 +806,5 @@ MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board") | ||
| 275 | .init_early = omap_3430sdp_init_early, | ||
| 276 | .init_irq = omap3_init_irq, | ||
| 277 | .init_machine = omap_3430sdp_init, | ||
| 278 | - .timer = &omap_timer, | ||
| 279 | + .timer = &omap3_timer, | ||
| 280 | MACHINE_END | ||
| 281 | diff --git a/arch/arm/mach-omap2/board-3630sdp.c b/arch/arm/mach-omap2/board-3630sdp.c | ||
| 282 | index 2ec2d76..e4f37b5 100644 | ||
| 283 | --- a/arch/arm/mach-omap2/board-3630sdp.c | ||
| 284 | +++ b/arch/arm/mach-omap2/board-3630sdp.c | ||
| 285 | @@ -221,5 +221,5 @@ MACHINE_START(OMAP_3630SDP, "OMAP 3630SDP board") | ||
| 286 | .init_early = omap_sdp_init_early, | ||
| 287 | .init_irq = omap3_init_irq, | ||
| 288 | .init_machine = omap_sdp_init, | ||
| 289 | - .timer = &omap_timer, | ||
| 290 | + .timer = &omap3_timer, | ||
| 291 | MACHINE_END | ||
| 292 | diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c | ||
| 293 | index 39a8062..e8caced 100644 | ||
| 294 | --- a/arch/arm/mach-omap2/board-4430sdp.c | ||
| 295 | +++ b/arch/arm/mach-omap2/board-4430sdp.c | ||
| 296 | @@ -768,5 +768,5 @@ MACHINE_START(OMAP_4430SDP, "OMAP4430 4430SDP board") | ||
| 297 | .init_early = omap_4430sdp_init_early, | ||
| 298 | .init_irq = gic_init_irq, | ||
| 299 | .init_machine = omap_4430sdp_init, | ||
| 300 | - .timer = &omap_timer, | ||
| 301 | + .timer = &omap4_timer, | ||
| 302 | MACHINE_END | ||
| 303 | diff --git a/arch/arm/mach-omap2/board-am3517crane.c b/arch/arm/mach-omap2/board-am3517crane.c | ||
| 304 | index 0bed0a4..5f2b55f 100644 | ||
| 305 | --- a/arch/arm/mach-omap2/board-am3517crane.c | ||
| 306 | +++ b/arch/arm/mach-omap2/board-am3517crane.c | ||
| 307 | @@ -106,5 +106,5 @@ MACHINE_START(CRANEBOARD, "AM3517/05 CRANEBOARD") | ||
| 308 | .init_early = am3517_crane_init_early, | ||
| 309 | .init_irq = omap3_init_irq, | ||
| 310 | .init_machine = am3517_crane_init, | ||
| 311 | - .timer = &omap_timer, | ||
| 312 | + .timer = &omap3_timer, | ||
| 313 | MACHINE_END | ||
| 314 | diff --git a/arch/arm/mach-omap2/board-am3517evm.c b/arch/arm/mach-omap2/board-am3517evm.c | ||
| 315 | index 0db0fb8..f3006c3 100644 | ||
| 316 | --- a/arch/arm/mach-omap2/board-am3517evm.c | ||
| 317 | +++ b/arch/arm/mach-omap2/board-am3517evm.c | ||
| 318 | @@ -496,5 +496,5 @@ MACHINE_START(OMAP3517EVM, "OMAP3517/AM3517 EVM") | ||
| 319 | .init_early = am3517_evm_init_early, | ||
| 320 | .init_irq = omap3_init_irq, | ||
| 321 | .init_machine = am3517_evm_init, | ||
| 322 | - .timer = &omap_timer, | ||
| 323 | + .timer = &omap3_timer, | ||
| 324 | MACHINE_END | ||
| 325 | diff --git a/arch/arm/mach-omap2/board-apollon.c b/arch/arm/mach-omap2/board-apollon.c | ||
| 326 | index 93576c8..7021170 100644 | ||
| 327 | --- a/arch/arm/mach-omap2/board-apollon.c | ||
| 328 | +++ b/arch/arm/mach-omap2/board-apollon.c | ||
| 329 | @@ -356,5 +356,5 @@ MACHINE_START(OMAP_APOLLON, "OMAP24xx Apollon") | ||
| 330 | .init_early = omap_apollon_init_early, | ||
| 331 | .init_irq = omap2_init_irq, | ||
| 332 | .init_machine = omap_apollon_init, | ||
| 333 | - .timer = &omap_timer, | ||
| 334 | + .timer = &omap2_timer, | ||
| 335 | MACHINE_END | ||
| 336 | diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 337 | index 43b1de5..1a18d3b 100644 | ||
| 338 | --- a/arch/arm/mach-omap2/board-cm-t35.c | ||
| 339 | +++ b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 340 | @@ -646,5 +646,5 @@ MACHINE_START(CM_T35, "Compulab CM-T35") | ||
| 341 | .init_early = cm_t35_init_early, | ||
| 342 | .init_irq = omap3_init_irq, | ||
| 343 | .init_machine = cm_t35_init, | ||
| 344 | - .timer = &omap_timer, | ||
| 345 | + .timer = &omap3_timer, | ||
| 346 | MACHINE_END | ||
| 347 | diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c | ||
| 348 | index 8f15222..aa67240 100644 | ||
| 349 | --- a/arch/arm/mach-omap2/board-cm-t3517.c | ||
| 350 | +++ b/arch/arm/mach-omap2/board-cm-t3517.c | ||
| 351 | @@ -306,5 +306,5 @@ MACHINE_START(CM_T3517, "Compulab CM-T3517") | ||
| 352 | .init_early = cm_t3517_init_early, | ||
| 353 | .init_irq = omap3_init_irq, | ||
| 354 | .init_machine = cm_t3517_init, | ||
| 355 | - .timer = &omap_timer, | ||
| 356 | + .timer = &omap3_timer, | ||
| 357 | MACHINE_END | ||
| 358 | diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c | ||
| 359 | index 73f3a22..46d144d 100644 | ||
| 360 | --- a/arch/arm/mach-omap2/board-devkit8000.c | ||
| 361 | +++ b/arch/arm/mach-omap2/board-devkit8000.c | ||
| 362 | @@ -709,5 +709,5 @@ MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000") | ||
| 363 | .init_early = devkit8000_init_early, | ||
| 364 | .init_irq = devkit8000_init_irq, | ||
| 365 | .init_machine = devkit8000_init, | ||
| 366 | - .timer = &omap_timer, | ||
| 367 | + .timer = &omap3_secure_timer, | ||
| 368 | MACHINE_END | ||
| 369 | diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c | ||
| 370 | index ccd503a..c6ecf60 100644 | ||
| 371 | --- a/arch/arm/mach-omap2/board-generic.c | ||
| 372 | +++ b/arch/arm/mach-omap2/board-generic.c | ||
| 373 | @@ -72,5 +72,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") | ||
| 374 | .init_early = omap_generic_init_early, | ||
| 375 | .init_irq = omap2_init_irq, | ||
| 376 | .init_machine = omap_generic_init, | ||
| 377 | - .timer = &omap_timer, | ||
| 378 | + .timer = &omap3_timer, | ||
| 379 | MACHINE_END | ||
| 380 | diff --git a/arch/arm/mach-omap2/board-h4.c b/arch/arm/mach-omap2/board-h4.c | ||
| 381 | index 2e16d6c..45de2b3 100644 | ||
| 382 | --- a/arch/arm/mach-omap2/board-h4.c | ||
| 383 | +++ b/arch/arm/mach-omap2/board-h4.c | ||
| 384 | @@ -388,5 +388,5 @@ MACHINE_START(OMAP_H4, "OMAP2420 H4 board") | ||
| 385 | .init_early = omap_h4_init_early, | ||
| 386 | .init_irq = omap_h4_init_irq, | ||
| 387 | .init_machine = omap_h4_init, | ||
| 388 | - .timer = &omap_timer, | ||
| 389 | + .timer = &omap2_timer, | ||
| 390 | MACHINE_END | ||
| 391 | diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c | ||
| 392 | index f22a76a..f683835 100644 | ||
| 393 | --- a/arch/arm/mach-omap2/board-igep0020.c | ||
| 394 | +++ b/arch/arm/mach-omap2/board-igep0020.c | ||
| 395 | @@ -708,7 +708,7 @@ MACHINE_START(IGEP0020, "IGEP v2 board") | ||
| 396 | .init_early = igep_init_early, | ||
| 397 | .init_irq = omap3_init_irq, | ||
| 398 | .init_machine = igep_init, | ||
| 399 | - .timer = &omap_timer, | ||
| 400 | + .timer = &omap3_timer, | ||
| 401 | MACHINE_END | ||
| 402 | |||
| 403 | MACHINE_START(IGEP0030, "IGEP OMAP3 module") | ||
| 404 | @@ -718,5 +718,5 @@ MACHINE_START(IGEP0030, "IGEP OMAP3 module") | ||
| 405 | .init_early = igep_init_early, | ||
| 406 | .init_irq = omap3_init_irq, | ||
| 407 | .init_machine = igep_init, | ||
| 408 | - .timer = &omap_timer, | ||
| 409 | + .timer = &omap3_timer, | ||
| 410 | MACHINE_END | ||
| 411 | diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c | ||
| 412 | index 9671843..5d4328f 100644 | ||
| 413 | --- a/arch/arm/mach-omap2/board-ldp.c | ||
| 414 | +++ b/arch/arm/mach-omap2/board-ldp.c | ||
| 415 | @@ -350,5 +350,5 @@ MACHINE_START(OMAP_LDP, "OMAP LDP board") | ||
| 416 | .init_early = omap_ldp_init_early, | ||
| 417 | .init_irq = omap3_init_irq, | ||
| 418 | .init_machine = omap_ldp_init, | ||
| 419 | - .timer = &omap_timer, | ||
| 420 | + .timer = &omap3_timer, | ||
| 421 | MACHINE_END | ||
| 422 | diff --git a/arch/arm/mach-omap2/board-n8x0.c b/arch/arm/mach-omap2/board-n8x0.c | ||
| 423 | index 9c791a2..e11f0c5 100644 | ||
| 424 | --- a/arch/arm/mach-omap2/board-n8x0.c | ||
| 425 | +++ b/arch/arm/mach-omap2/board-n8x0.c | ||
| 426 | @@ -701,7 +701,7 @@ MACHINE_START(NOKIA_N800, "Nokia N800") | ||
| 427 | .init_early = n8x0_init_early, | ||
| 428 | .init_irq = omap2_init_irq, | ||
| 429 | .init_machine = n8x0_init_machine, | ||
| 430 | - .timer = &omap_timer, | ||
| 431 | + .timer = &omap2_timer, | ||
| 432 | MACHINE_END | ||
| 433 | |||
| 434 | MACHINE_START(NOKIA_N810, "Nokia N810") | ||
| 435 | @@ -711,7 +711,7 @@ MACHINE_START(NOKIA_N810, "Nokia N810") | ||
| 436 | .init_early = n8x0_init_early, | ||
| 437 | .init_irq = omap2_init_irq, | ||
| 438 | .init_machine = n8x0_init_machine, | ||
| 439 | - .timer = &omap_timer, | ||
| 440 | + .timer = &omap2_timer, | ||
| 441 | MACHINE_END | ||
| 442 | |||
| 443 | MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | ||
| 444 | @@ -721,5 +721,5 @@ MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX") | ||
| 445 | .init_early = n8x0_init_early, | ||
| 446 | .init_irq = omap2_init_irq, | ||
| 447 | .init_machine = n8x0_init_machine, | ||
| 448 | - .timer = &omap_timer, | ||
| 449 | + .timer = &omap2_timer, | ||
| 450 | MACHINE_END | ||
| 451 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 452 | index eaead5e..9ee16f6 100644 | ||
| 453 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 454 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 455 | @@ -596,5 +596,5 @@ MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") | ||
| 456 | .init_early = omap3_beagle_init_early, | ||
| 457 | .init_irq = omap3_beagle_init_irq, | ||
| 458 | .init_machine = omap3_beagle_init, | ||
| 459 | - .timer = &omap_timer, | ||
| 460 | + .timer = &omap3_secure_timer, | ||
| 461 | MACHINE_END | ||
| 462 | diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 463 | index d39f53f..6f957ed 100644 | ||
| 464 | --- a/arch/arm/mach-omap2/board-omap3evm.c | ||
| 465 | +++ b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 466 | @@ -741,5 +741,5 @@ MACHINE_START(OMAP3EVM, "OMAP3 EVM") | ||
| 467 | .init_early = omap3_evm_init_early, | ||
| 468 | .init_irq = omap3_init_irq, | ||
| 469 | .init_machine = omap3_evm_init, | ||
| 470 | - .timer = &omap_timer, | ||
| 471 | + .timer = &omap3_timer, | ||
| 472 | MACHINE_END | ||
| 473 | diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c | ||
| 474 | index b63f1c2..469259a 100644 | ||
| 475 | --- a/arch/arm/mach-omap2/board-omap3logic.c | ||
| 476 | +++ b/arch/arm/mach-omap2/board-omap3logic.c | ||
| 477 | @@ -215,7 +215,7 @@ MACHINE_START(OMAP3_TORPEDO, "Logic OMAP3 Torpedo board") | ||
| 478 | .init_early = omap3logic_init_early, | ||
| 479 | .init_irq = omap3_init_irq, | ||
| 480 | .init_machine = omap3logic_init, | ||
| 481 | - .timer = &omap_timer, | ||
| 482 | + .timer = &omap3_timer, | ||
| 483 | MACHINE_END | ||
| 484 | |||
| 485 | MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") | ||
| 486 | @@ -224,5 +224,5 @@ MACHINE_START(OMAP3530_LV_SOM, "OMAP Logic 3530 LV SOM board") | ||
| 487 | .init_early = omap3logic_init_early, | ||
| 488 | .init_irq = omap3_init_irq, | ||
| 489 | .init_machine = omap3logic_init, | ||
| 490 | - .timer = &omap_timer, | ||
| 491 | + .timer = &omap3_timer, | ||
| 492 | MACHINE_END | ||
| 493 | diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 494 | index 1d90b90..d4ea940 100644 | ||
| 495 | --- a/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 496 | +++ b/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 497 | @@ -652,5 +652,5 @@ MACHINE_START(OMAP3_PANDORA, "Pandora Handheld Console") | ||
| 498 | .init_early = omap3pandora_init_early, | ||
| 499 | .init_irq = omap3_init_irq, | ||
| 500 | .init_machine = omap3pandora_init, | ||
| 501 | - .timer = &omap_timer, | ||
| 502 | + .timer = &omap3_timer, | ||
| 503 | MACHINE_END | ||
| 504 | diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 505 | index dfa1401..2fa8fae 100644 | ||
| 506 | --- a/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 507 | +++ b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 508 | @@ -557,5 +557,5 @@ MACHINE_START(SBC3530, "OMAP3 STALKER") | ||
| 509 | .init_early = omap3_stalker_init_early, | ||
| 510 | .init_irq = omap3_stalker_init_irq, | ||
| 511 | .init_machine = omap3_stalker_init, | ||
| 512 | - .timer = &omap_timer, | ||
| 513 | + .timer = &omap3_secure_timer, | ||
| 514 | MACHINE_END | ||
| 515 | diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 516 | index ae97910..8c71fd2 100644 | ||
| 517 | --- a/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 518 | +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 519 | @@ -449,5 +449,5 @@ MACHINE_START(TOUCHBOOK, "OMAP3 touchbook Board") | ||
| 520 | .init_early = omap3_touchbook_init_early, | ||
| 521 | .init_irq = omap3_touchbook_init_irq, | ||
| 522 | .init_machine = omap3_touchbook_init, | ||
| 523 | - .timer = &omap_timer, | ||
| 524 | + .timer = &omap3_secure_timer, | ||
| 525 | MACHINE_END | ||
| 526 | diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c | ||
| 527 | index 6d2372b..dc1d6dc 100644 | ||
| 528 | --- a/arch/arm/mach-omap2/board-omap4panda.c | ||
| 529 | +++ b/arch/arm/mach-omap2/board-omap4panda.c | ||
| 530 | @@ -712,5 +712,5 @@ MACHINE_START(OMAP4_PANDA, "OMAP4 Panda board") | ||
| 531 | .init_early = omap4_panda_init_early, | ||
| 532 | .init_irq = gic_init_irq, | ||
| 533 | .init_machine = omap4_panda_init, | ||
| 534 | - .timer = &omap_timer, | ||
| 535 | + .timer = &omap4_timer, | ||
| 536 | MACHINE_END | ||
| 537 | diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c | ||
| 538 | index e3928f23..1bf2f39 100644 | ||
| 539 | --- a/arch/arm/mach-omap2/board-overo.c | ||
| 540 | +++ b/arch/arm/mach-omap2/board-overo.c | ||
| 541 | @@ -617,5 +617,5 @@ MACHINE_START(OVERO, "Gumstix Overo") | ||
| 542 | .init_early = overo_init_early, | ||
| 543 | .init_irq = omap3_init_irq, | ||
| 544 | .init_machine = overo_init, | ||
| 545 | - .timer = &omap_timer, | ||
| 546 | + .timer = &omap3_timer, | ||
| 547 | MACHINE_END | ||
| 548 | diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c | ||
| 549 | index 9c3d115..54dceb1 100644 | ||
| 550 | --- a/arch/arm/mach-omap2/board-rm680.c | ||
| 551 | +++ b/arch/arm/mach-omap2/board-rm680.c | ||
| 552 | @@ -165,5 +165,5 @@ MACHINE_START(NOKIA_RM680, "Nokia RM-680 board") | ||
| 553 | .init_early = rm680_init_early, | ||
| 554 | .init_irq = omap3_init_irq, | ||
| 555 | .init_machine = rm680_init, | ||
| 556 | - .timer = &omap_timer, | ||
| 557 | + .timer = &omap3_timer, | ||
| 558 | MACHINE_END | ||
| 559 | diff --git a/arch/arm/mach-omap2/board-rx51.c b/arch/arm/mach-omap2/board-rx51.c | ||
| 560 | index ee35e4e..5ea142f 100644 | ||
| 561 | --- a/arch/arm/mach-omap2/board-rx51.c | ||
| 562 | +++ b/arch/arm/mach-omap2/board-rx51.c | ||
| 563 | @@ -162,5 +162,5 @@ MACHINE_START(NOKIA_RX51, "Nokia RX-51 board") | ||
| 564 | .init_early = rx51_init_early, | ||
| 565 | .init_irq = omap3_init_irq, | ||
| 566 | .init_machine = rx51_init, | ||
| 567 | - .timer = &omap_timer, | ||
| 568 | + .timer = &omap3_timer, | ||
| 569 | MACHINE_END | ||
| 570 | diff --git a/arch/arm/mach-omap2/board-ti8168evm.c b/arch/arm/mach-omap2/board-ti8168evm.c | ||
| 571 | index 713c20f..a85d5b0 100644 | ||
| 572 | --- a/arch/arm/mach-omap2/board-ti8168evm.c | ||
| 573 | +++ b/arch/arm/mach-omap2/board-ti8168evm.c | ||
| 574 | @@ -52,6 +52,6 @@ MACHINE_START(TI8168EVM, "ti8168evm") | ||
| 575 | .map_io = ti8168_evm_map_io, | ||
| 576 | .init_early = ti8168_init_early, | ||
| 577 | .init_irq = ti816x_init_irq, | ||
| 578 | - .timer = &omap_timer, | ||
| 579 | + .timer = &omap3_timer, | ||
| 580 | .init_machine = ti8168_evm_init, | ||
| 581 | MACHINE_END | ||
| 582 | diff --git a/arch/arm/mach-omap2/board-zoom.c b/arch/arm/mach-omap2/board-zoom.c | ||
| 583 | index 97a3f0b..8a98c3c 100644 | ||
| 584 | --- a/arch/arm/mach-omap2/board-zoom.c | ||
| 585 | +++ b/arch/arm/mach-omap2/board-zoom.c | ||
| 586 | @@ -139,7 +139,7 @@ MACHINE_START(OMAP_ZOOM2, "OMAP Zoom2 board") | ||
| 587 | .init_early = omap_zoom_init_early, | ||
| 588 | .init_irq = omap3_init_irq, | ||
| 589 | .init_machine = omap_zoom_init, | ||
| 590 | - .timer = &omap_timer, | ||
| 591 | + .timer = &omap3_timer, | ||
| 592 | MACHINE_END | ||
| 593 | |||
| 594 | MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") | ||
| 595 | @@ -149,5 +149,5 @@ MACHINE_START(OMAP_ZOOM3, "OMAP Zoom3 board") | ||
| 596 | .init_early = omap_zoom_init_early, | ||
| 597 | .init_irq = omap3_init_irq, | ||
| 598 | .init_machine = omap_zoom_init, | ||
| 599 | - .timer = &omap_timer, | ||
| 600 | + .timer = &omap3_timer, | ||
| 601 | MACHINE_END | ||
| 602 | diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c | ||
| 603 | index 3b9cf85..a0d8e83 100644 | ||
| 604 | --- a/arch/arm/mach-omap2/timer-gp.c | ||
| 605 | +++ b/arch/arm/mach-omap2/timer-gp.c | ||
| 606 | @@ -247,20 +247,41 @@ static void __init omap2_gp_clocksource_init(void) | ||
| 607 | } | ||
| 608 | #endif | ||
| 609 | |||
| 610 | -static void __init omap2_gp_timer_init(void) | ||
| 611 | +#define OMAP_SYS_TIMER_INIT(name) \ | ||
| 612 | +static void __init omap##name##_timer_init(void) \ | ||
| 613 | +{ \ | ||
| 614 | + omap_dm_timer_init(); \ | ||
| 615 | + omap2_gp_clockevent_init(); \ | ||
| 616 | + omap2_gp_clocksource_init(); \ | ||
| 617 | +} | ||
| 618 | + | ||
| 619 | +#define OMAP_SYS_TIMER(name) \ | ||
| 620 | +struct sys_timer omap##name##_timer = { \ | ||
| 621 | + .init = omap##name##_timer_init, \ | ||
| 622 | +}; | ||
| 623 | + | ||
| 624 | +#ifdef CONFIG_ARCH_OMAP2 | ||
| 625 | +OMAP_SYS_TIMER_INIT(2) | ||
| 626 | +OMAP_SYS_TIMER(2) | ||
| 627 | +#endif | ||
| 628 | + | ||
| 629 | +#ifdef CONFIG_ARCH_OMAP3 | ||
| 630 | +OMAP_SYS_TIMER_INIT(3) | ||
| 631 | +OMAP_SYS_TIMER(3) | ||
| 632 | +OMAP_SYS_TIMER_INIT(3_secure) | ||
| 633 | +OMAP_SYS_TIMER(3_secure) | ||
| 634 | +#endif | ||
| 635 | + | ||
| 636 | +#ifdef CONFIG_ARCH_OMAP4 | ||
| 637 | +static void __init omap4_timer_init(void) | ||
| 638 | { | ||
| 639 | #ifdef CONFIG_LOCAL_TIMERS | ||
| 640 | - if (cpu_is_omap44xx()) { | ||
| 641 | - twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); | ||
| 642 | - BUG_ON(!twd_base); | ||
| 643 | - } | ||
| 644 | + twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); | ||
| 645 | + BUG_ON(!twd_base); | ||
| 646 | #endif | ||
| 647 | omap_dm_timer_init(); | ||
| 648 | - | ||
| 649 | omap2_gp_clockevent_init(); | ||
| 650 | omap2_gp_clocksource_init(); | ||
| 651 | } | ||
| 652 | - | ||
| 653 | -struct sys_timer omap_timer = { | ||
| 654 | - .init = omap2_gp_timer_init, | ||
| 655 | -}; | ||
| 656 | +OMAP_SYS_TIMER(4) | ||
| 657 | +#endif | ||
| 658 | diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h | ||
| 659 | index 5288130..4564cc6 100644 | ||
| 660 | --- a/arch/arm/plat-omap/include/plat/common.h | ||
| 661 | +++ b/arch/arm/plat-omap/include/plat/common.h | ||
| 662 | @@ -34,7 +34,11 @@ | ||
| 663 | struct sys_timer; | ||
| 664 | |||
| 665 | extern void omap_map_common_io(void); | ||
| 666 | -extern struct sys_timer omap_timer; | ||
| 667 | +extern struct sys_timer omap1_timer; | ||
| 668 | +extern struct sys_timer omap2_timer; | ||
| 669 | +extern struct sys_timer omap3_timer; | ||
| 670 | +extern struct sys_timer omap3_secure_timer; | ||
| 671 | +extern struct sys_timer omap4_timer; | ||
| 672 | extern bool omap_32k_timer_init(void); | ||
| 673 | extern int __init omap_init_clocksource_32k(void); | ||
| 674 | extern unsigned long long notrace omap_32k_sched_clock(void); | ||
| 675 | diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 676 | index d6c70d2..330bd17 100644 | ||
| 677 | --- a/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 678 | +++ b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 679 | @@ -57,7 +57,6 @@ | ||
| 680 | #define OMAP_TIMER_IP_VERSION_1 0x1 | ||
| 681 | struct omap_dm_timer; | ||
| 682 | extern struct omap_dm_timer *gptimer_wakeup; | ||
| 683 | -extern struct sys_timer omap_timer; | ||
| 684 | struct clk; | ||
| 685 | |||
| 686 | int omap_dm_timer_init(void); | ||
| 687 | -- | ||
| 688 | 1.7.2.5 | ||
| 689 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0005-omap-Move-dmtimer-defines-to-dmtimer.h.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0005-omap-Move-dmtimer-defines-to-dmtimer.h.patch deleted file mode 100644 index ba3bc428..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0005-omap-Move-dmtimer-defines-to-dmtimer.h.patch +++ /dev/null | |||
| @@ -1,287 +0,0 @@ | |||
| 1 | From 99573b33f37eede2d3d36ae71c34f5d72ccdc672 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Tony Lindgren <tony@atomide.com> | ||
| 3 | Date: Tue, 29 Mar 2011 15:54:48 -0700 | ||
| 4 | Subject: [PATCH 005/149] omap: Move dmtimer defines to dmtimer.h | ||
| 5 | |||
| 6 | These will be needed when dmtimer platform init code gets split | ||
| 7 | for omap1 and omap2+. These will also be needed for separate | ||
| 8 | sys_timer init and driver init for the rest of the hardware timers | ||
| 9 | in the following patches. No functional changes. | ||
| 10 | |||
| 11 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 12 | Reviewed-by: Kevin Hilman <khilman@ti.com> | ||
| 13 | --- | ||
| 14 | arch/arm/plat-omap/dmtimer.c | 121 ---------------------------- | ||
| 15 | arch/arm/plat-omap/include/plat/dmtimer.h | 125 +++++++++++++++++++++++++++++ | ||
| 16 | 2 files changed, 125 insertions(+), 121 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c | ||
| 19 | index ee9f6eb..dfdc3b2 100644 | ||
| 20 | --- a/arch/arm/plat-omap/dmtimer.c | ||
| 21 | +++ b/arch/arm/plat-omap/dmtimer.c | ||
| 22 | @@ -41,127 +41,6 @@ | ||
| 23 | #include <plat/dmtimer.h> | ||
| 24 | #include <mach/irqs.h> | ||
| 25 | |||
| 26 | -/* register offsets */ | ||
| 27 | -#define _OMAP_TIMER_ID_OFFSET 0x00 | ||
| 28 | -#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10 | ||
| 29 | -#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14 | ||
| 30 | -#define _OMAP_TIMER_STAT_OFFSET 0x18 | ||
| 31 | -#define _OMAP_TIMER_INT_EN_OFFSET 0x1c | ||
| 32 | -#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20 | ||
| 33 | -#define _OMAP_TIMER_CTRL_OFFSET 0x24 | ||
| 34 | -#define OMAP_TIMER_CTRL_GPOCFG (1 << 14) | ||
| 35 | -#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13) | ||
| 36 | -#define OMAP_TIMER_CTRL_PT (1 << 12) | ||
| 37 | -#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8) | ||
| 38 | -#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8) | ||
| 39 | -#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8) | ||
| 40 | -#define OMAP_TIMER_CTRL_SCPWM (1 << 7) | ||
| 41 | -#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */ | ||
| 42 | -#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */ | ||
| 43 | -#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value shift */ | ||
| 44 | -#define OMAP_TIMER_CTRL_POSTED (1 << 2) | ||
| 45 | -#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */ | ||
| 46 | -#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */ | ||
| 47 | -#define _OMAP_TIMER_COUNTER_OFFSET 0x28 | ||
| 48 | -#define _OMAP_TIMER_LOAD_OFFSET 0x2c | ||
| 49 | -#define _OMAP_TIMER_TRIGGER_OFFSET 0x30 | ||
| 50 | -#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34 | ||
| 51 | -#define WP_NONE 0 /* no write pending bit */ | ||
| 52 | -#define WP_TCLR (1 << 0) | ||
| 53 | -#define WP_TCRR (1 << 1) | ||
| 54 | -#define WP_TLDR (1 << 2) | ||
| 55 | -#define WP_TTGR (1 << 3) | ||
| 56 | -#define WP_TMAR (1 << 4) | ||
| 57 | -#define WP_TPIR (1 << 5) | ||
| 58 | -#define WP_TNIR (1 << 6) | ||
| 59 | -#define WP_TCVR (1 << 7) | ||
| 60 | -#define WP_TOCR (1 << 8) | ||
| 61 | -#define WP_TOWR (1 << 9) | ||
| 62 | -#define _OMAP_TIMER_MATCH_OFFSET 0x38 | ||
| 63 | -#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c | ||
| 64 | -#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40 | ||
| 65 | -#define _OMAP_TIMER_CAPTURE2_OFFSET 0x44 /* TCAR2, 34xx only */ | ||
| 66 | -#define _OMAP_TIMER_TICK_POS_OFFSET 0x48 /* TPIR, 34xx only */ | ||
| 67 | -#define _OMAP_TIMER_TICK_NEG_OFFSET 0x4c /* TNIR, 34xx only */ | ||
| 68 | -#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50 /* TCVR, 34xx only */ | ||
| 69 | -#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54 /* TOCR, 34xx only */ | ||
| 70 | -#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58 /* TOWR, 34xx only */ | ||
| 71 | - | ||
| 72 | -/* register offsets with the write pending bit encoded */ | ||
| 73 | -#define WPSHIFT 16 | ||
| 74 | - | ||
| 75 | -#define OMAP_TIMER_ID_REG (_OMAP_TIMER_ID_OFFSET \ | ||
| 76 | - | (WP_NONE << WPSHIFT)) | ||
| 77 | - | ||
| 78 | -#define OMAP_TIMER_OCP_CFG_REG (_OMAP_TIMER_OCP_CFG_OFFSET \ | ||
| 79 | - | (WP_NONE << WPSHIFT)) | ||
| 80 | - | ||
| 81 | -#define OMAP_TIMER_SYS_STAT_REG (_OMAP_TIMER_SYS_STAT_OFFSET \ | ||
| 82 | - | (WP_NONE << WPSHIFT)) | ||
| 83 | - | ||
| 84 | -#define OMAP_TIMER_STAT_REG (_OMAP_TIMER_STAT_OFFSET \ | ||
| 85 | - | (WP_NONE << WPSHIFT)) | ||
| 86 | - | ||
| 87 | -#define OMAP_TIMER_INT_EN_REG (_OMAP_TIMER_INT_EN_OFFSET \ | ||
| 88 | - | (WP_NONE << WPSHIFT)) | ||
| 89 | - | ||
| 90 | -#define OMAP_TIMER_WAKEUP_EN_REG (_OMAP_TIMER_WAKEUP_EN_OFFSET \ | ||
| 91 | - | (WP_NONE << WPSHIFT)) | ||
| 92 | - | ||
| 93 | -#define OMAP_TIMER_CTRL_REG (_OMAP_TIMER_CTRL_OFFSET \ | ||
| 94 | - | (WP_TCLR << WPSHIFT)) | ||
| 95 | - | ||
| 96 | -#define OMAP_TIMER_COUNTER_REG (_OMAP_TIMER_COUNTER_OFFSET \ | ||
| 97 | - | (WP_TCRR << WPSHIFT)) | ||
| 98 | - | ||
| 99 | -#define OMAP_TIMER_LOAD_REG (_OMAP_TIMER_LOAD_OFFSET \ | ||
| 100 | - | (WP_TLDR << WPSHIFT)) | ||
| 101 | - | ||
| 102 | -#define OMAP_TIMER_TRIGGER_REG (_OMAP_TIMER_TRIGGER_OFFSET \ | ||
| 103 | - | (WP_TTGR << WPSHIFT)) | ||
| 104 | - | ||
| 105 | -#define OMAP_TIMER_WRITE_PEND_REG (_OMAP_TIMER_WRITE_PEND_OFFSET \ | ||
| 106 | - | (WP_NONE << WPSHIFT)) | ||
| 107 | - | ||
| 108 | -#define OMAP_TIMER_MATCH_REG (_OMAP_TIMER_MATCH_OFFSET \ | ||
| 109 | - | (WP_TMAR << WPSHIFT)) | ||
| 110 | - | ||
| 111 | -#define OMAP_TIMER_CAPTURE_REG (_OMAP_TIMER_CAPTURE_OFFSET \ | ||
| 112 | - | (WP_NONE << WPSHIFT)) | ||
| 113 | - | ||
| 114 | -#define OMAP_TIMER_IF_CTRL_REG (_OMAP_TIMER_IF_CTRL_OFFSET \ | ||
| 115 | - | (WP_NONE << WPSHIFT)) | ||
| 116 | - | ||
| 117 | -#define OMAP_TIMER_CAPTURE2_REG (_OMAP_TIMER_CAPTURE2_OFFSET \ | ||
| 118 | - | (WP_NONE << WPSHIFT)) | ||
| 119 | - | ||
| 120 | -#define OMAP_TIMER_TICK_POS_REG (_OMAP_TIMER_TICK_POS_OFFSET \ | ||
| 121 | - | (WP_TPIR << WPSHIFT)) | ||
| 122 | - | ||
| 123 | -#define OMAP_TIMER_TICK_NEG_REG (_OMAP_TIMER_TICK_NEG_OFFSET \ | ||
| 124 | - | (WP_TNIR << WPSHIFT)) | ||
| 125 | - | ||
| 126 | -#define OMAP_TIMER_TICK_COUNT_REG (_OMAP_TIMER_TICK_COUNT_OFFSET \ | ||
| 127 | - | (WP_TCVR << WPSHIFT)) | ||
| 128 | - | ||
| 129 | -#define OMAP_TIMER_TICK_INT_MASK_SET_REG \ | ||
| 130 | - (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT)) | ||
| 131 | - | ||
| 132 | -#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \ | ||
| 133 | - (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT)) | ||
| 134 | - | ||
| 135 | -struct omap_dm_timer { | ||
| 136 | - unsigned long phys_base; | ||
| 137 | - int irq; | ||
| 138 | -#ifdef CONFIG_ARCH_OMAP2PLUS | ||
| 139 | - struct clk *iclk, *fclk; | ||
| 140 | -#endif | ||
| 141 | - void __iomem *io_base; | ||
| 142 | - unsigned reserved:1; | ||
| 143 | - unsigned enabled:1; | ||
| 144 | - unsigned posted:1; | ||
| 145 | -}; | ||
| 146 | - | ||
| 147 | static int dm_timer_count; | ||
| 148 | |||
| 149 | #ifdef CONFIG_ARCH_OMAP1 | ||
| 150 | diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 151 | index 330bd17..3203105 100644 | ||
| 152 | --- a/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 153 | +++ b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 154 | @@ -92,5 +92,130 @@ void omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value | ||
| 155 | |||
| 156 | int omap_dm_timers_active(void); | ||
| 157 | |||
| 158 | +/* | ||
| 159 | + * Do not use the defines below, they are not needed. They should be only | ||
| 160 | + * used by dmtimer.c and sys_timer related code. | ||
| 161 | + */ | ||
| 162 | + | ||
| 163 | +/* register offsets */ | ||
| 164 | +#define _OMAP_TIMER_ID_OFFSET 0x00 | ||
| 165 | +#define _OMAP_TIMER_OCP_CFG_OFFSET 0x10 | ||
| 166 | +#define _OMAP_TIMER_SYS_STAT_OFFSET 0x14 | ||
| 167 | +#define _OMAP_TIMER_STAT_OFFSET 0x18 | ||
| 168 | +#define _OMAP_TIMER_INT_EN_OFFSET 0x1c | ||
| 169 | +#define _OMAP_TIMER_WAKEUP_EN_OFFSET 0x20 | ||
| 170 | +#define _OMAP_TIMER_CTRL_OFFSET 0x24 | ||
| 171 | +#define OMAP_TIMER_CTRL_GPOCFG (1 << 14) | ||
| 172 | +#define OMAP_TIMER_CTRL_CAPTMODE (1 << 13) | ||
| 173 | +#define OMAP_TIMER_CTRL_PT (1 << 12) | ||
| 174 | +#define OMAP_TIMER_CTRL_TCM_LOWTOHIGH (0x1 << 8) | ||
| 175 | +#define OMAP_TIMER_CTRL_TCM_HIGHTOLOW (0x2 << 8) | ||
| 176 | +#define OMAP_TIMER_CTRL_TCM_BOTHEDGES (0x3 << 8) | ||
| 177 | +#define OMAP_TIMER_CTRL_SCPWM (1 << 7) | ||
| 178 | +#define OMAP_TIMER_CTRL_CE (1 << 6) /* compare enable */ | ||
| 179 | +#define OMAP_TIMER_CTRL_PRE (1 << 5) /* prescaler enable */ | ||
| 180 | +#define OMAP_TIMER_CTRL_PTV_SHIFT 2 /* prescaler value shift */ | ||
| 181 | +#define OMAP_TIMER_CTRL_POSTED (1 << 2) | ||
| 182 | +#define OMAP_TIMER_CTRL_AR (1 << 1) /* auto-reload enable */ | ||
| 183 | +#define OMAP_TIMER_CTRL_ST (1 << 0) /* start timer */ | ||
| 184 | +#define _OMAP_TIMER_COUNTER_OFFSET 0x28 | ||
| 185 | +#define _OMAP_TIMER_LOAD_OFFSET 0x2c | ||
| 186 | +#define _OMAP_TIMER_TRIGGER_OFFSET 0x30 | ||
| 187 | +#define _OMAP_TIMER_WRITE_PEND_OFFSET 0x34 | ||
| 188 | +#define WP_NONE 0 /* no write pending bit */ | ||
| 189 | +#define WP_TCLR (1 << 0) | ||
| 190 | +#define WP_TCRR (1 << 1) | ||
| 191 | +#define WP_TLDR (1 << 2) | ||
| 192 | +#define WP_TTGR (1 << 3) | ||
| 193 | +#define WP_TMAR (1 << 4) | ||
| 194 | +#define WP_TPIR (1 << 5) | ||
| 195 | +#define WP_TNIR (1 << 6) | ||
| 196 | +#define WP_TCVR (1 << 7) | ||
| 197 | +#define WP_TOCR (1 << 8) | ||
| 198 | +#define WP_TOWR (1 << 9) | ||
| 199 | +#define _OMAP_TIMER_MATCH_OFFSET 0x38 | ||
| 200 | +#define _OMAP_TIMER_CAPTURE_OFFSET 0x3c | ||
| 201 | +#define _OMAP_TIMER_IF_CTRL_OFFSET 0x40 | ||
| 202 | +#define _OMAP_TIMER_CAPTURE2_OFFSET 0x44 /* TCAR2, 34xx only */ | ||
| 203 | +#define _OMAP_TIMER_TICK_POS_OFFSET 0x48 /* TPIR, 34xx only */ | ||
| 204 | +#define _OMAP_TIMER_TICK_NEG_OFFSET 0x4c /* TNIR, 34xx only */ | ||
| 205 | +#define _OMAP_TIMER_TICK_COUNT_OFFSET 0x50 /* TCVR, 34xx only */ | ||
| 206 | +#define _OMAP_TIMER_TICK_INT_MASK_SET_OFFSET 0x54 /* TOCR, 34xx only */ | ||
| 207 | +#define _OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET 0x58 /* TOWR, 34xx only */ | ||
| 208 | + | ||
| 209 | +/* register offsets with the write pending bit encoded */ | ||
| 210 | +#define WPSHIFT 16 | ||
| 211 | + | ||
| 212 | +#define OMAP_TIMER_ID_REG (_OMAP_TIMER_ID_OFFSET \ | ||
| 213 | + | (WP_NONE << WPSHIFT)) | ||
| 214 | + | ||
| 215 | +#define OMAP_TIMER_OCP_CFG_REG (_OMAP_TIMER_OCP_CFG_OFFSET \ | ||
| 216 | + | (WP_NONE << WPSHIFT)) | ||
| 217 | + | ||
| 218 | +#define OMAP_TIMER_SYS_STAT_REG (_OMAP_TIMER_SYS_STAT_OFFSET \ | ||
| 219 | + | (WP_NONE << WPSHIFT)) | ||
| 220 | + | ||
| 221 | +#define OMAP_TIMER_STAT_REG (_OMAP_TIMER_STAT_OFFSET \ | ||
| 222 | + | (WP_NONE << WPSHIFT)) | ||
| 223 | + | ||
| 224 | +#define OMAP_TIMER_INT_EN_REG (_OMAP_TIMER_INT_EN_OFFSET \ | ||
| 225 | + | (WP_NONE << WPSHIFT)) | ||
| 226 | + | ||
| 227 | +#define OMAP_TIMER_WAKEUP_EN_REG (_OMAP_TIMER_WAKEUP_EN_OFFSET \ | ||
| 228 | + | (WP_NONE << WPSHIFT)) | ||
| 229 | + | ||
| 230 | +#define OMAP_TIMER_CTRL_REG (_OMAP_TIMER_CTRL_OFFSET \ | ||
| 231 | + | (WP_TCLR << WPSHIFT)) | ||
| 232 | + | ||
| 233 | +#define OMAP_TIMER_COUNTER_REG (_OMAP_TIMER_COUNTER_OFFSET \ | ||
| 234 | + | (WP_TCRR << WPSHIFT)) | ||
| 235 | + | ||
| 236 | +#define OMAP_TIMER_LOAD_REG (_OMAP_TIMER_LOAD_OFFSET \ | ||
| 237 | + | (WP_TLDR << WPSHIFT)) | ||
| 238 | + | ||
| 239 | +#define OMAP_TIMER_TRIGGER_REG (_OMAP_TIMER_TRIGGER_OFFSET \ | ||
| 240 | + | (WP_TTGR << WPSHIFT)) | ||
| 241 | + | ||
| 242 | +#define OMAP_TIMER_WRITE_PEND_REG (_OMAP_TIMER_WRITE_PEND_OFFSET \ | ||
| 243 | + | (WP_NONE << WPSHIFT)) | ||
| 244 | + | ||
| 245 | +#define OMAP_TIMER_MATCH_REG (_OMAP_TIMER_MATCH_OFFSET \ | ||
| 246 | + | (WP_TMAR << WPSHIFT)) | ||
| 247 | + | ||
| 248 | +#define OMAP_TIMER_CAPTURE_REG (_OMAP_TIMER_CAPTURE_OFFSET \ | ||
| 249 | + | (WP_NONE << WPSHIFT)) | ||
| 250 | + | ||
| 251 | +#define OMAP_TIMER_IF_CTRL_REG (_OMAP_TIMER_IF_CTRL_OFFSET \ | ||
| 252 | + | (WP_NONE << WPSHIFT)) | ||
| 253 | + | ||
| 254 | +#define OMAP_TIMER_CAPTURE2_REG (_OMAP_TIMER_CAPTURE2_OFFSET \ | ||
| 255 | + | (WP_NONE << WPSHIFT)) | ||
| 256 | + | ||
| 257 | +#define OMAP_TIMER_TICK_POS_REG (_OMAP_TIMER_TICK_POS_OFFSET \ | ||
| 258 | + | (WP_TPIR << WPSHIFT)) | ||
| 259 | + | ||
| 260 | +#define OMAP_TIMER_TICK_NEG_REG (_OMAP_TIMER_TICK_NEG_OFFSET \ | ||
| 261 | + | (WP_TNIR << WPSHIFT)) | ||
| 262 | + | ||
| 263 | +#define OMAP_TIMER_TICK_COUNT_REG (_OMAP_TIMER_TICK_COUNT_OFFSET \ | ||
| 264 | + | (WP_TCVR << WPSHIFT)) | ||
| 265 | + | ||
| 266 | +#define OMAP_TIMER_TICK_INT_MASK_SET_REG \ | ||
| 267 | + (_OMAP_TIMER_TICK_INT_MASK_SET_OFFSET | (WP_TOCR << WPSHIFT)) | ||
| 268 | + | ||
| 269 | +#define OMAP_TIMER_TICK_INT_MASK_COUNT_REG \ | ||
| 270 | + (_OMAP_TIMER_TICK_INT_MASK_COUNT_OFFSET | (WP_TOWR << WPSHIFT)) | ||
| 271 | + | ||
| 272 | +struct omap_dm_timer { | ||
| 273 | + unsigned long phys_base; | ||
| 274 | + int irq; | ||
| 275 | +#ifdef CONFIG_ARCH_OMAP2PLUS | ||
| 276 | + struct clk *iclk, *fclk; | ||
| 277 | +#endif | ||
| 278 | + void __iomem *io_base; | ||
| 279 | + unsigned reserved:1; | ||
| 280 | + unsigned enabled:1; | ||
| 281 | + unsigned posted:1; | ||
| 282 | +}; | ||
| 283 | |||
| 284 | #endif /* __ASM_ARCH_DMTIMER_H */ | ||
| 285 | -- | ||
| 286 | 1.7.2.5 | ||
| 287 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0006-omap-Make-a-subset-of-dmtimer-functions-into-inline-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0006-omap-Make-a-subset-of-dmtimer-functions-into-inline-.patch deleted file mode 100644 index 36a9142d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0006-omap-Make-a-subset-of-dmtimer-functions-into-inline-.patch +++ /dev/null | |||
| @@ -1,323 +0,0 @@ | |||
| 1 | From 902f3165afa284d4bd6ff22db7654318c98a5ce0 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Tony Lindgren <tony@atomide.com> | ||
| 3 | Date: Tue, 29 Mar 2011 15:54:48 -0700 | ||
| 4 | Subject: [PATCH 006/149] omap: Make a subset of dmtimer functions into inline functions | ||
| 5 | |||
| 6 | This will allow us to share the code between system timer and | ||
| 7 | dmtimer device driver code without having to initialize all the | ||
| 8 | dmtimers early. This change will also make the timer_set_next_event | ||
| 9 | more efficient as the inline functions will optimize the code | ||
| 10 | better for the timer reprogramming. | ||
| 11 | |||
| 12 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 13 | Reviewed-by: Kevin Hilman <khilman@ti.com> | ||
| 14 | --- | ||
| 15 | arch/arm/plat-omap/dmtimer.c | 78 ++++--------------- | ||
| 16 | arch/arm/plat-omap/include/plat/dmtimer.h | 119 +++++++++++++++++++++++++++++ | ||
| 17 | 2 files changed, 136 insertions(+), 61 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c | ||
| 20 | index dfdc3b2..7c5cb4e 100644 | ||
| 21 | --- a/arch/arm/plat-omap/dmtimer.c | ||
| 22 | +++ b/arch/arm/plat-omap/dmtimer.c | ||
| 23 | @@ -170,11 +170,7 @@ static spinlock_t dm_timer_lock; | ||
| 24 | */ | ||
| 25 | static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) | ||
| 26 | { | ||
| 27 | - if (timer->posted) | ||
| 28 | - while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) | ||
| 29 | - & (reg >> WPSHIFT)) | ||
| 30 | - cpu_relax(); | ||
| 31 | - return readl(timer->io_base + (reg & 0xff)); | ||
| 32 | + return __omap_dm_timer_read(timer->io_base, reg, timer->posted); | ||
| 33 | } | ||
| 34 | |||
| 35 | /* | ||
| 36 | @@ -186,11 +182,7 @@ static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg) | ||
| 37 | static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg, | ||
| 38 | u32 value) | ||
| 39 | { | ||
| 40 | - if (timer->posted) | ||
| 41 | - while (readl(timer->io_base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) | ||
| 42 | - & (reg >> WPSHIFT)) | ||
| 43 | - cpu_relax(); | ||
| 44 | - writel(value, timer->io_base + (reg & 0xff)); | ||
| 45 | + __omap_dm_timer_write(timer->io_base, reg, value, timer->posted); | ||
| 46 | } | ||
| 47 | |||
| 48 | static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) | ||
| 49 | @@ -209,7 +201,7 @@ static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer) | ||
| 50 | |||
| 51 | static void omap_dm_timer_reset(struct omap_dm_timer *timer) | ||
| 52 | { | ||
| 53 | - u32 l; | ||
| 54 | + int autoidle = 0, wakeup = 0; | ||
| 55 | |||
| 56 | if (!cpu_class_is_omap2() || timer != &dm_timers[0]) { | ||
| 57 | omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06); | ||
| 58 | @@ -217,28 +209,21 @@ static void omap_dm_timer_reset(struct omap_dm_timer *timer) | ||
| 59 | } | ||
| 60 | omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ); | ||
| 61 | |||
| 62 | - l = omap_dm_timer_read_reg(timer, OMAP_TIMER_OCP_CFG_REG); | ||
| 63 | - l |= 0x02 << 3; /* Set to smart-idle mode */ | ||
| 64 | - l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ | ||
| 65 | - | ||
| 66 | /* Enable autoidle on OMAP2 / OMAP3 */ | ||
| 67 | if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
| 68 | - l |= 0x1 << 0; | ||
| 69 | + autoidle = 1; | ||
| 70 | |||
| 71 | /* | ||
| 72 | * Enable wake-up on OMAP2 CPUs. | ||
| 73 | */ | ||
| 74 | if (cpu_class_is_omap2()) | ||
| 75 | - l |= 1 << 2; | ||
| 76 | - omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_REG, l); | ||
| 77 | + wakeup = 1; | ||
| 78 | |||
| 79 | - /* Match hardware reset default of posted mode */ | ||
| 80 | - omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, | ||
| 81 | - OMAP_TIMER_CTRL_POSTED); | ||
| 82 | + __omap_dm_timer_reset(timer->io_base, autoidle, wakeup); | ||
| 83 | timer->posted = 1; | ||
| 84 | } | ||
| 85 | |||
| 86 | -static void omap_dm_timer_prepare(struct omap_dm_timer *timer) | ||
| 87 | +void omap_dm_timer_prepare(struct omap_dm_timer *timer) | ||
| 88 | { | ||
| 89 | omap_dm_timer_enable(timer); | ||
| 90 | omap_dm_timer_reset(timer); | ||
| 91 | @@ -410,25 +395,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_start); | ||
| 92 | |||
| 93 | void omap_dm_timer_stop(struct omap_dm_timer *timer) | ||
| 94 | { | ||
| 95 | - u32 l; | ||
| 96 | + unsigned long rate = 0; | ||
| 97 | |||
| 98 | - l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); | ||
| 99 | - if (l & OMAP_TIMER_CTRL_ST) { | ||
| 100 | - l &= ~0x1; | ||
| 101 | - omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); | ||
| 102 | #ifdef CONFIG_ARCH_OMAP2PLUS | ||
| 103 | - /* Readback to make sure write has completed */ | ||
| 104 | - omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG); | ||
| 105 | - /* | ||
| 106 | - * Wait for functional clock period x 3.5 to make sure that | ||
| 107 | - * timer is stopped | ||
| 108 | - */ | ||
| 109 | - udelay(3500000 / clk_get_rate(timer->fclk) + 1); | ||
| 110 | + rate = clk_get_rate(timer->fclk); | ||
| 111 | #endif | ||
| 112 | - } | ||
| 113 | - /* Ack possibly pending interrupt */ | ||
| 114 | - omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, | ||
| 115 | - OMAP_TIMER_INT_OVERFLOW); | ||
| 116 | + | ||
| 117 | + __omap_dm_timer_stop(timer->io_base, timer->posted, rate); | ||
| 118 | } | ||
| 119 | EXPORT_SYMBOL_GPL(omap_dm_timer_stop); | ||
| 120 | |||
| 121 | @@ -451,22 +424,11 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); | ||
| 122 | |||
| 123 | int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source) | ||
| 124 | { | ||
| 125 | - int ret = -EINVAL; | ||
| 126 | - | ||
| 127 | if (source < 0 || source >= 3) | ||
| 128 | return -EINVAL; | ||
| 129 | |||
| 130 | - clk_disable(timer->fclk); | ||
| 131 | - ret = clk_set_parent(timer->fclk, dm_source_clocks[source]); | ||
| 132 | - clk_enable(timer->fclk); | ||
| 133 | - | ||
| 134 | - /* | ||
| 135 | - * When the functional clock disappears, too quick writes seem | ||
| 136 | - * to cause an abort. XXX Is this still necessary? | ||
| 137 | - */ | ||
| 138 | - __delay(300000); | ||
| 139 | - | ||
| 140 | - return ret; | ||
| 141 | + return __omap_dm_timer_set_source(timer->fclk, | ||
| 142 | + dm_source_clocks[source]); | ||
| 143 | } | ||
| 144 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_source); | ||
| 145 | |||
| 146 | @@ -504,8 +466,7 @@ void omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload, | ||
| 147 | } | ||
| 148 | l |= OMAP_TIMER_CTRL_ST; | ||
| 149 | |||
| 150 | - omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, load); | ||
| 151 | - omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l); | ||
| 152 | + __omap_dm_timer_load_start(timer->io_base, l, load, timer->posted); | ||
| 153 | } | ||
| 154 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start); | ||
| 155 | |||
| 156 | @@ -558,8 +519,7 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler); | ||
| 157 | void omap_dm_timer_set_int_enable(struct omap_dm_timer *timer, | ||
| 158 | unsigned int value) | ||
| 159 | { | ||
| 160 | - omap_dm_timer_write_reg(timer, OMAP_TIMER_INT_EN_REG, value); | ||
| 161 | - omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG, value); | ||
| 162 | + __omap_dm_timer_int_enable(timer->io_base, value); | ||
| 163 | } | ||
| 164 | EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable); | ||
| 165 | |||
| 166 | @@ -575,17 +535,13 @@ EXPORT_SYMBOL_GPL(omap_dm_timer_read_status); | ||
| 167 | |||
| 168 | void omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value) | ||
| 169 | { | ||
| 170 | - omap_dm_timer_write_reg(timer, OMAP_TIMER_STAT_REG, value); | ||
| 171 | + __omap_dm_timer_write_status(timer->io_base, value); | ||
| 172 | } | ||
| 173 | EXPORT_SYMBOL_GPL(omap_dm_timer_write_status); | ||
| 174 | |||
| 175 | unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer) | ||
| 176 | { | ||
| 177 | - unsigned int l; | ||
| 178 | - | ||
| 179 | - l = omap_dm_timer_read_reg(timer, OMAP_TIMER_COUNTER_REG); | ||
| 180 | - | ||
| 181 | - return l; | ||
| 182 | + return __omap_dm_timer_read_counter(timer->io_base, timer->posted); | ||
| 183 | } | ||
| 184 | EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter); | ||
| 185 | |||
| 186 | diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 187 | index 3203105..54664a7 100644 | ||
| 188 | --- a/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 189 | +++ b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 190 | @@ -32,6 +32,9 @@ | ||
| 191 | * 675 Mass Ave, Cambridge, MA 02139, USA. | ||
| 192 | */ | ||
| 193 | |||
| 194 | +#include <linux/clk.h> | ||
| 195 | +#include <linux/delay.h> | ||
| 196 | + | ||
| 197 | #ifndef __ASM_ARCH_DMTIMER_H | ||
| 198 | #define __ASM_ARCH_DMTIMER_H | ||
| 199 | |||
| 200 | @@ -218,4 +221,120 @@ struct omap_dm_timer { | ||
| 201 | unsigned posted:1; | ||
| 202 | }; | ||
| 203 | |||
| 204 | +void omap_dm_timer_prepare(struct omap_dm_timer *timer); | ||
| 205 | + | ||
| 206 | +static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg, | ||
| 207 | + int posted) | ||
| 208 | +{ | ||
| 209 | + if (posted) | ||
| 210 | + while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) | ||
| 211 | + & (reg >> WPSHIFT)) | ||
| 212 | + cpu_relax(); | ||
| 213 | + | ||
| 214 | + return __raw_readl(base + (reg & 0xff)); | ||
| 215 | +} | ||
| 216 | + | ||
| 217 | +static inline void __omap_dm_timer_write(void __iomem *base, u32 reg, u32 val, | ||
| 218 | + int posted) | ||
| 219 | +{ | ||
| 220 | + if (posted) | ||
| 221 | + while (__raw_readl(base + (OMAP_TIMER_WRITE_PEND_REG & 0xff)) | ||
| 222 | + & (reg >> WPSHIFT)) | ||
| 223 | + cpu_relax(); | ||
| 224 | + | ||
| 225 | + __raw_writel(val, base + (reg & 0xff)); | ||
| 226 | +} | ||
| 227 | + | ||
| 228 | +/* Assumes the source clock has been set by caller */ | ||
| 229 | +static inline void __omap_dm_timer_reset(void __iomem *base, int autoidle, | ||
| 230 | + int wakeup) | ||
| 231 | +{ | ||
| 232 | + u32 l; | ||
| 233 | + | ||
| 234 | + l = __omap_dm_timer_read(base, OMAP_TIMER_OCP_CFG_REG, 0); | ||
| 235 | + l |= 0x02 << 3; /* Set to smart-idle mode */ | ||
| 236 | + l |= 0x2 << 8; /* Set clock activity to perserve f-clock on idle */ | ||
| 237 | + | ||
| 238 | + if (autoidle) | ||
| 239 | + l |= 0x1 << 0; | ||
| 240 | + | ||
| 241 | + if (wakeup) | ||
| 242 | + l |= 1 << 2; | ||
| 243 | + | ||
| 244 | + __omap_dm_timer_write(base, OMAP_TIMER_OCP_CFG_REG, l, 0); | ||
| 245 | + | ||
| 246 | + /* Match hardware reset default of posted mode */ | ||
| 247 | + __omap_dm_timer_write(base, OMAP_TIMER_IF_CTRL_REG, | ||
| 248 | + OMAP_TIMER_CTRL_POSTED, 0); | ||
| 249 | +} | ||
| 250 | + | ||
| 251 | +static inline int __omap_dm_timer_set_source(struct clk *timer_fck, | ||
| 252 | + struct clk *parent) | ||
| 253 | +{ | ||
| 254 | + int ret; | ||
| 255 | + | ||
| 256 | + clk_disable(timer_fck); | ||
| 257 | + ret = clk_set_parent(timer_fck, parent); | ||
| 258 | + clk_enable(timer_fck); | ||
| 259 | + | ||
| 260 | + /* | ||
| 261 | + * When the functional clock disappears, too quick writes seem | ||
| 262 | + * to cause an abort. XXX Is this still necessary? | ||
| 263 | + */ | ||
| 264 | + __delay(300000); | ||
| 265 | + | ||
| 266 | + return ret; | ||
| 267 | +} | ||
| 268 | + | ||
| 269 | +static inline void __omap_dm_timer_stop(void __iomem *base, int posted, | ||
| 270 | + unsigned long rate) | ||
| 271 | +{ | ||
| 272 | + u32 l; | ||
| 273 | + | ||
| 274 | + l = __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted); | ||
| 275 | + if (l & OMAP_TIMER_CTRL_ST) { | ||
| 276 | + l &= ~0x1; | ||
| 277 | + __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, l, posted); | ||
| 278 | +#ifdef CONFIG_ARCH_OMAP2PLUS | ||
| 279 | + /* Readback to make sure write has completed */ | ||
| 280 | + __omap_dm_timer_read(base, OMAP_TIMER_CTRL_REG, posted); | ||
| 281 | + /* | ||
| 282 | + * Wait for functional clock period x 3.5 to make sure that | ||
| 283 | + * timer is stopped | ||
| 284 | + */ | ||
| 285 | + udelay(3500000 / rate + 1); | ||
| 286 | +#endif | ||
| 287 | + } | ||
| 288 | + | ||
| 289 | + /* Ack possibly pending interrupt */ | ||
| 290 | + __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, | ||
| 291 | + OMAP_TIMER_INT_OVERFLOW, 0); | ||
| 292 | +} | ||
| 293 | + | ||
| 294 | +static inline void __omap_dm_timer_load_start(void __iomem *base, u32 ctrl, | ||
| 295 | + unsigned int load, int posted) | ||
| 296 | +{ | ||
| 297 | + __omap_dm_timer_write(base, OMAP_TIMER_COUNTER_REG, load, posted); | ||
| 298 | + __omap_dm_timer_write(base, OMAP_TIMER_CTRL_REG, ctrl, posted); | ||
| 299 | +} | ||
| 300 | + | ||
| 301 | +static inline void __omap_dm_timer_int_enable(void __iomem *base, | ||
| 302 | + unsigned int value) | ||
| 303 | +{ | ||
| 304 | + __omap_dm_timer_write(base, OMAP_TIMER_INT_EN_REG, value, 0); | ||
| 305 | + __omap_dm_timer_write(base, OMAP_TIMER_WAKEUP_EN_REG, value, 0); | ||
| 306 | +} | ||
| 307 | + | ||
| 308 | +static inline unsigned int __omap_dm_timer_read_counter(void __iomem *base, | ||
| 309 | + int posted) | ||
| 310 | +{ | ||
| 311 | + return __omap_dm_timer_read(base, OMAP_TIMER_COUNTER_REG, posted); | ||
| 312 | +} | ||
| 313 | + | ||
| 314 | +static inline void __omap_dm_timer_write_status(void __iomem *base, | ||
| 315 | + unsigned int value) | ||
| 316 | +{ | ||
| 317 | + __omap_dm_timer_write(base, OMAP_TIMER_STAT_REG, value, 0); | ||
| 318 | +} | ||
| 319 | + | ||
| 320 | #endif /* __ASM_ARCH_DMTIMER_H */ | ||
| 321 | -- | ||
| 322 | 1.7.2.5 | ||
| 323 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0007-omap2-Use-dmtimer-macros-for-clockevent.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0007-omap2-Use-dmtimer-macros-for-clockevent.patch deleted file mode 100644 index c7747edc..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0007-omap2-Use-dmtimer-macros-for-clockevent.patch +++ /dev/null | |||
| @@ -1,279 +0,0 @@ | |||
| 1 | From 8f322fa141e55da412c5d73f07f93c1e02965522 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Tony Lindgren <tony@atomide.com> | ||
| 3 | Date: Tue, 29 Mar 2011 15:54:48 -0700 | ||
| 4 | Subject: [PATCH 007/149] omap2+: Use dmtimer macros for clockevent | ||
| 5 | |||
| 6 | This patch makes timer-gp.c to use only a subset of dmtimer | ||
| 7 | functions without the need to initialize dmtimer code early. | ||
| 8 | |||
| 9 | Also note that now with the inline functions, timer_set_next_event | ||
| 10 | becomes more efficient in the lines of assembly code. | ||
| 11 | |||
| 12 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 13 | Reviewed-by: Kevin Hilman <khilman@ti.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/timer-gp.c | 147 ++++++++++++++++++++++------- | ||
| 16 | arch/arm/plat-omap/include/plat/dmtimer.h | 1 + | ||
| 17 | 2 files changed, 113 insertions(+), 35 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c | ||
| 20 | index a0d8e83..62c0d5c 100644 | ||
| 21 | --- a/arch/arm/mach-omap2/timer-gp.c | ||
| 22 | +++ b/arch/arm/mach-omap2/timer-gp.c | ||
| 23 | @@ -45,10 +45,33 @@ | ||
| 24 | |||
| 25 | #include "timer-gp.h" | ||
| 26 | |||
| 27 | +/* Parent clocks, eventually these will come from the clock framework */ | ||
| 28 | + | ||
| 29 | +#define OMAP2_MPU_SOURCE "sys_ck" | ||
| 30 | +#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE | ||
| 31 | +#define OMAP4_MPU_SOURCE "sys_clkin_ck" | ||
| 32 | +#define OMAP2_32K_SOURCE "func_32k_ck" | ||
| 33 | +#define OMAP3_32K_SOURCE "omap_32k_fck" | ||
| 34 | +#define OMAP4_32K_SOURCE "sys_32k_ck" | ||
| 35 | + | ||
| 36 | +#ifdef CONFIG_OMAP_32K_TIMER | ||
| 37 | +#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE | ||
| 38 | +#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE | ||
| 39 | +#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE | ||
| 40 | +#define OMAP3_SECURE_TIMER 12 | ||
| 41 | +#else | ||
| 42 | +#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE | ||
| 43 | +#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE | ||
| 44 | +#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE | ||
| 45 | +#define OMAP3_SECURE_TIMER 1 | ||
| 46 | +#endif | ||
| 47 | |||
| 48 | /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ | ||
| 49 | #define MAX_GPTIMER_ID 12 | ||
| 50 | |||
| 51 | +/* Clockevent code */ | ||
| 52 | + | ||
| 53 | +static struct omap_dm_timer clkev; | ||
| 54 | static struct omap_dm_timer *gptimer; | ||
| 55 | static struct clock_event_device clockevent_gpt; | ||
| 56 | static u8 __initdata gptimer_id = 1; | ||
| 57 | @@ -57,10 +80,9 @@ struct omap_dm_timer *gptimer_wakeup; | ||
| 58 | |||
| 59 | static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) | ||
| 60 | { | ||
| 61 | - struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id; | ||
| 62 | struct clock_event_device *evt = &clockevent_gpt; | ||
| 63 | |||
| 64 | - omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW); | ||
| 65 | + __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); | ||
| 66 | |||
| 67 | evt->event_handler(evt); | ||
| 68 | return IRQ_HANDLED; | ||
| 69 | @@ -75,7 +97,8 @@ static struct irqaction omap2_gp_timer_irq = { | ||
| 70 | static int omap2_gp_timer_set_next_event(unsigned long cycles, | ||
| 71 | struct clock_event_device *evt) | ||
| 72 | { | ||
| 73 | - omap_dm_timer_set_load_start(gptimer, 0, 0xffffffff - cycles); | ||
| 74 | + __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, | ||
| 75 | + 0xffffffff - cycles, 1); | ||
| 76 | |||
| 77 | return 0; | ||
| 78 | } | ||
| 79 | @@ -85,13 +108,18 @@ static void omap2_gp_timer_set_mode(enum clock_event_mode mode, | ||
| 80 | { | ||
| 81 | u32 period; | ||
| 82 | |||
| 83 | - omap_dm_timer_stop(gptimer); | ||
| 84 | + __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); | ||
| 85 | |||
| 86 | switch (mode) { | ||
| 87 | case CLOCK_EVT_MODE_PERIODIC: | ||
| 88 | - period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; | ||
| 89 | + period = clkev.rate / HZ; | ||
| 90 | period -= 1; | ||
| 91 | - omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period); | ||
| 92 | + /* Looks like we need to first set the load value separately */ | ||
| 93 | + __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG, | ||
| 94 | + 0xffffffff - period, 1); | ||
| 95 | + __omap_dm_timer_load_start(clkev.io_base, | ||
| 96 | + OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, | ||
| 97 | + 0xffffffff - period, 1); | ||
| 98 | break; | ||
| 99 | case CLOCK_EVT_MODE_ONESHOT: | ||
| 100 | break; | ||
| 101 | @@ -130,43 +158,89 @@ int __init omap2_gp_clockevent_set_gptimer(u8 id) | ||
| 102 | return 0; | ||
| 103 | } | ||
| 104 | |||
| 105 | -static void __init omap2_gp_clockevent_init(void) | ||
| 106 | +static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, | ||
| 107 | + int gptimer_id, | ||
| 108 | + const char *fck_source) | ||
| 109 | { | ||
| 110 | - u32 tick_rate; | ||
| 111 | - int src; | ||
| 112 | - char clockevent_hwmod_name[8]; /* 8 = sizeof("timerXX0") */ | ||
| 113 | + char name[10]; /* 10 = sizeof("gptXX_Xck0") */ | ||
| 114 | + struct omap_hwmod *oh; | ||
| 115 | + size_t size; | ||
| 116 | + int res = 0; | ||
| 117 | + | ||
| 118 | + sprintf(name, "timer%d", gptimer_id); | ||
| 119 | + omap_hwmod_setup_one(name); | ||
| 120 | + oh = omap_hwmod_lookup(name); | ||
| 121 | + if (!oh) | ||
| 122 | + return -ENODEV; | ||
| 123 | + | ||
| 124 | + timer->irq = oh->mpu_irqs[0].irq; | ||
| 125 | + timer->phys_base = oh->slaves[0]->addr->pa_start; | ||
| 126 | + size = oh->slaves[0]->addr->pa_end - timer->phys_base; | ||
| 127 | + | ||
| 128 | + /* Static mapping, never released */ | ||
| 129 | + timer->io_base = ioremap(timer->phys_base, size); | ||
| 130 | + if (!timer->io_base) | ||
| 131 | + return -ENXIO; | ||
| 132 | + | ||
| 133 | + /* After the dmtimer is using hwmod these clocks won't be needed */ | ||
| 134 | + sprintf(name, "gpt%d_fck", gptimer_id); | ||
| 135 | + timer->fclk = clk_get(NULL, name); | ||
| 136 | + if (IS_ERR(timer->fclk)) | ||
| 137 | + return -ENODEV; | ||
| 138 | + | ||
| 139 | + sprintf(name, "gpt%d_ick", gptimer_id); | ||
| 140 | + timer->iclk = clk_get(NULL, name); | ||
| 141 | + if (IS_ERR(timer->iclk)) { | ||
| 142 | + clk_put(timer->fclk); | ||
| 143 | + return -ENODEV; | ||
| 144 | + } | ||
| 145 | |||
| 146 | - inited = 1; | ||
| 147 | + omap_hwmod_enable(oh); | ||
| 148 | + | ||
| 149 | + if (gptimer_id != 12) { | ||
| 150 | + struct clk *src; | ||
| 151 | + | ||
| 152 | + src = clk_get(NULL, fck_source); | ||
| 153 | + if (IS_ERR(src)) { | ||
| 154 | + res = -EINVAL; | ||
| 155 | + } else { | ||
| 156 | + res = __omap_dm_timer_set_source(timer->fclk, src); | ||
| 157 | + if (IS_ERR_VALUE(res)) | ||
| 158 | + pr_warning("%s: timer%i cannot set source\n", | ||
| 159 | + __func__, gptimer_id); | ||
| 160 | + clk_put(src); | ||
| 161 | + } | ||
| 162 | + } | ||
| 163 | + __omap_dm_timer_reset(timer->io_base, 1, 1); | ||
| 164 | + timer->posted = 1; | ||
| 165 | + | ||
| 166 | + timer->rate = clk_get_rate(timer->fclk); | ||
| 167 | |||
| 168 | - sprintf(clockevent_hwmod_name, "timer%d", gptimer_id); | ||
| 169 | - omap_hwmod_setup_one(clockevent_hwmod_name); | ||
| 170 | + timer->reserved = 1; | ||
| 171 | |||
| 172 | gptimer = omap_dm_timer_request_specific(gptimer_id); | ||
| 173 | BUG_ON(gptimer == NULL); | ||
| 174 | gptimer_wakeup = gptimer; | ||
| 175 | |||
| 176 | -#if defined(CONFIG_OMAP_32K_TIMER) | ||
| 177 | - src = OMAP_TIMER_SRC_32_KHZ; | ||
| 178 | -#else | ||
| 179 | - src = OMAP_TIMER_SRC_SYS_CLK; | ||
| 180 | - WARN(gptimer_id == 12, "WARNING: GPTIMER12 can only use the " | ||
| 181 | - "secure 32KiHz clock source\n"); | ||
| 182 | -#endif | ||
| 183 | + return res; | ||
| 184 | +} | ||
| 185 | |||
| 186 | - if (gptimer_id != 12) | ||
| 187 | - WARN(IS_ERR_VALUE(omap_dm_timer_set_source(gptimer, src)), | ||
| 188 | - "timer-gp: omap_dm_timer_set_source() failed\n"); | ||
| 189 | +static void __init omap2_gp_clockevent_init(int gptimer_id, | ||
| 190 | + const char *fck_source) | ||
| 191 | +{ | ||
| 192 | + int res; | ||
| 193 | |||
| 194 | - tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); | ||
| 195 | + inited = 1; | ||
| 196 | |||
| 197 | - pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n", | ||
| 198 | - gptimer_id, tick_rate); | ||
| 199 | + res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); | ||
| 200 | + BUG_ON(res); | ||
| 201 | |||
| 202 | omap2_gp_timer_irq.dev_id = (void *)gptimer; | ||
| 203 | - setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); | ||
| 204 | - omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); | ||
| 205 | + setup_irq(clkev.irq, &omap2_gp_timer_irq); | ||
| 206 | |||
| 207 | - clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC, | ||
| 208 | + __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); | ||
| 209 | + | ||
| 210 | + clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, | ||
| 211 | clockevent_gpt.shift); | ||
| 212 | clockevent_gpt.max_delta_ns = | ||
| 213 | clockevent_delta2ns(0xffffffff, &clockevent_gpt); | ||
| 214 | @@ -176,6 +250,9 @@ static void __init omap2_gp_clockevent_init(void) | ||
| 215 | |||
| 216 | clockevent_gpt.cpumask = cpumask_of(0); | ||
| 217 | clockevents_register_device(&clockevent_gpt); | ||
| 218 | + | ||
| 219 | + pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", | ||
| 220 | + gptimer_id, clkev.rate); | ||
| 221 | } | ||
| 222 | |||
| 223 | /* Clocksource code */ | ||
| 224 | @@ -247,11 +324,11 @@ static void __init omap2_gp_clocksource_init(void) | ||
| 225 | } | ||
| 226 | #endif | ||
| 227 | |||
| 228 | -#define OMAP_SYS_TIMER_INIT(name) \ | ||
| 229 | +#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) \ | ||
| 230 | static void __init omap##name##_timer_init(void) \ | ||
| 231 | { \ | ||
| 232 | omap_dm_timer_init(); \ | ||
| 233 | - omap2_gp_clockevent_init(); \ | ||
| 234 | + omap2_gp_clockevent_init((clkev_nr), clkev_src); \ | ||
| 235 | omap2_gp_clocksource_init(); \ | ||
| 236 | } | ||
| 237 | |||
| 238 | @@ -261,14 +338,14 @@ struct sys_timer omap##name##_timer = { \ | ||
| 239 | }; | ||
| 240 | |||
| 241 | #ifdef CONFIG_ARCH_OMAP2 | ||
| 242 | -OMAP_SYS_TIMER_INIT(2) | ||
| 243 | +OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE) | ||
| 244 | OMAP_SYS_TIMER(2) | ||
| 245 | #endif | ||
| 246 | |||
| 247 | #ifdef CONFIG_ARCH_OMAP3 | ||
| 248 | -OMAP_SYS_TIMER_INIT(3) | ||
| 249 | +OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE) | ||
| 250 | OMAP_SYS_TIMER(3) | ||
| 251 | -OMAP_SYS_TIMER_INIT(3_secure) | ||
| 252 | +OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE) | ||
| 253 | OMAP_SYS_TIMER(3_secure) | ||
| 254 | #endif | ||
| 255 | |||
| 256 | @@ -280,7 +357,7 @@ static void __init omap4_timer_init(void) | ||
| 257 | BUG_ON(!twd_base); | ||
| 258 | #endif | ||
| 259 | omap_dm_timer_init(); | ||
| 260 | - omap2_gp_clockevent_init(); | ||
| 261 | + omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); | ||
| 262 | omap2_gp_clocksource_init(); | ||
| 263 | } | ||
| 264 | OMAP_SYS_TIMER(4) | ||
| 265 | diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 266 | index 54664a7..dd8b3ff 100644 | ||
| 267 | --- a/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 268 | +++ b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 269 | @@ -216,6 +216,7 @@ struct omap_dm_timer { | ||
| 270 | struct clk *iclk, *fclk; | ||
| 271 | #endif | ||
| 272 | void __iomem *io_base; | ||
| 273 | + unsigned long rate; | ||
| 274 | unsigned reserved:1; | ||
| 275 | unsigned enabled:1; | ||
| 276 | unsigned posted:1; | ||
| 277 | -- | ||
| 278 | 1.7.2.5 | ||
| 279 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0008-omap2-Remove-gptimer_wakeup-for-now.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0008-omap2-Remove-gptimer_wakeup-for-now.patch deleted file mode 100644 index 98e356c8..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0008-omap2-Remove-gptimer_wakeup-for-now.patch +++ /dev/null | |||
| @@ -1,177 +0,0 @@ | |||
| 1 | From 6e1cacccf1349d97c83c7bc93e4d3c15e731c3ad Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Tony Lindgren <tony@atomide.com> | ||
| 3 | Date: Tue, 29 Mar 2011 15:54:49 -0700 | ||
| 4 | Subject: [PATCH 008/149] omap2+: Remove gptimer_wakeup for now | ||
| 5 | |||
| 6 | This removes the support for setting the wake-up timer for debugging. | ||
| 7 | |||
| 8 | Later on we can reserve gptimer1 for PM code only and have similar | ||
| 9 | functionality. | ||
| 10 | |||
| 11 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 12 | Reviewed-by: Kevin Hilman <khilman@ti.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/pm-debug.c | 28 ---------------------------- | ||
| 15 | arch/arm/mach-omap2/pm.h | 6 ------ | ||
| 16 | arch/arm/mach-omap2/pm34xx.c | 4 ---- | ||
| 17 | arch/arm/mach-omap2/timer-gp.c | 8 +------- | ||
| 18 | arch/arm/plat-omap/include/plat/dmtimer.h | 1 - | ||
| 19 | 5 files changed, 1 insertions(+), 46 deletions(-) | ||
| 20 | |||
| 21 | diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c | ||
| 22 | index e01da45..2c35bd3 100644 | ||
| 23 | --- a/arch/arm/mach-omap2/pm-debug.c | ||
| 24 | +++ b/arch/arm/mach-omap2/pm-debug.c | ||
| 25 | @@ -31,7 +31,6 @@ | ||
| 26 | #include <plat/board.h> | ||
| 27 | #include "powerdomain.h" | ||
| 28 | #include "clockdomain.h" | ||
| 29 | -#include <plat/dmtimer.h> | ||
| 30 | #include <plat/omap-pm.h> | ||
| 31 | |||
| 32 | #include "cm2xxx_3xxx.h" | ||
| 33 | @@ -41,8 +40,6 @@ | ||
| 34 | int omap2_pm_debug; | ||
| 35 | u32 enable_off_mode; | ||
| 36 | u32 sleep_while_idle; | ||
| 37 | -u32 wakeup_timer_seconds; | ||
| 38 | -u32 wakeup_timer_milliseconds; | ||
| 39 | |||
| 40 | #define DUMP_PRM_MOD_REG(mod, reg) \ | ||
| 41 | regs[reg_count].name = #mod "." #reg; \ | ||
| 42 | @@ -162,23 +159,6 @@ void omap2_pm_dump(int mode, int resume, unsigned int us) | ||
| 43 | printk(KERN_INFO "%-20s: 0x%08x\n", regs[i].name, regs[i].val); | ||
| 44 | } | ||
| 45 | |||
| 46 | -void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds) | ||
| 47 | -{ | ||
| 48 | - u32 tick_rate, cycles; | ||
| 49 | - | ||
| 50 | - if (!seconds && !milliseconds) | ||
| 51 | - return; | ||
| 52 | - | ||
| 53 | - tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer_wakeup)); | ||
| 54 | - cycles = tick_rate * seconds + tick_rate * milliseconds / 1000; | ||
| 55 | - omap_dm_timer_stop(gptimer_wakeup); | ||
| 56 | - omap_dm_timer_set_load_start(gptimer_wakeup, 0, 0xffffffff - cycles); | ||
| 57 | - | ||
| 58 | - pr_info("PM: Resume timer in %u.%03u secs" | ||
| 59 | - " (%d ticks at %d ticks/sec.)\n", | ||
| 60 | - seconds, milliseconds, cycles, tick_rate); | ||
| 61 | -} | ||
| 62 | - | ||
| 63 | #ifdef CONFIG_DEBUG_FS | ||
| 64 | #include <linux/debugfs.h> | ||
| 65 | #include <linux/seq_file.h> | ||
| 66 | @@ -576,9 +556,6 @@ static int option_set(void *data, u64 val) | ||
| 67 | { | ||
| 68 | u32 *option = data; | ||
| 69 | |||
| 70 | - if (option == &wakeup_timer_milliseconds && val >= 1000) | ||
| 71 | - return -EINVAL; | ||
| 72 | - | ||
| 73 | *option = val; | ||
| 74 | |||
| 75 | if (option == &enable_off_mode) { | ||
| 76 | @@ -641,11 +618,6 @@ static int pm_dbg_init(void) | ||
| 77 | &enable_off_mode, &pm_dbg_option_fops); | ||
| 78 | (void) debugfs_create_file("sleep_while_idle", S_IRUGO | S_IWUSR, d, | ||
| 79 | &sleep_while_idle, &pm_dbg_option_fops); | ||
| 80 | - (void) debugfs_create_file("wakeup_timer_seconds", S_IRUGO | S_IWUSR, d, | ||
| 81 | - &wakeup_timer_seconds, &pm_dbg_option_fops); | ||
| 82 | - (void) debugfs_create_file("wakeup_timer_milliseconds", | ||
| 83 | - S_IRUGO | S_IWUSR, d, &wakeup_timer_milliseconds, | ||
| 84 | - &pm_dbg_option_fops); | ||
| 85 | pm_dbg_init_done = 1; | ||
| 86 | |||
| 87 | return 0; | ||
| 88 | diff --git a/arch/arm/mach-omap2/pm.h b/arch/arm/mach-omap2/pm.h | ||
| 89 | index 45bcfce..c3a367e 100644 | ||
| 90 | --- a/arch/arm/mach-omap2/pm.h | ||
| 91 | +++ b/arch/arm/mach-omap2/pm.h | ||
| 92 | @@ -60,19 +60,13 @@ inline void omap3_pm_init_cpuidle(struct cpuidle_params *cpuidle_board_params) | ||
| 93 | extern int omap3_pm_get_suspend_state(struct powerdomain *pwrdm); | ||
| 94 | extern int omap3_pm_set_suspend_state(struct powerdomain *pwrdm, int state); | ||
| 95 | |||
| 96 | -extern u32 wakeup_timer_seconds; | ||
| 97 | -extern u32 wakeup_timer_milliseconds; | ||
| 98 | -extern struct omap_dm_timer *gptimer_wakeup; | ||
| 99 | - | ||
| 100 | #ifdef CONFIG_PM_DEBUG | ||
| 101 | extern void omap2_pm_dump(int mode, int resume, unsigned int us); | ||
| 102 | -extern void omap2_pm_wakeup_on_timer(u32 seconds, u32 milliseconds); | ||
| 103 | extern int omap2_pm_debug; | ||
| 104 | extern u32 enable_off_mode; | ||
| 105 | extern u32 sleep_while_idle; | ||
| 106 | #else | ||
| 107 | #define omap2_pm_dump(mode, resume, us) do {} while (0); | ||
| 108 | -#define omap2_pm_wakeup_on_timer(seconds, milliseconds) do {} while (0); | ||
| 109 | #define omap2_pm_debug 0 | ||
| 110 | #define enable_off_mode 0 | ||
| 111 | #define sleep_while_idle 0 | ||
| 112 | diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c | ||
| 113 | index c155c9d..4cb636a 100644 | ||
| 114 | --- a/arch/arm/mach-omap2/pm34xx.c | ||
| 115 | +++ b/arch/arm/mach-omap2/pm34xx.c | ||
| 116 | @@ -534,10 +534,6 @@ static int omap3_pm_suspend(void) | ||
| 117 | struct power_state *pwrst; | ||
| 118 | int state, ret = 0; | ||
| 119 | |||
| 120 | - if (wakeup_timer_seconds || wakeup_timer_milliseconds) | ||
| 121 | - omap2_pm_wakeup_on_timer(wakeup_timer_seconds, | ||
| 122 | - wakeup_timer_milliseconds); | ||
| 123 | - | ||
| 124 | /* Read current next_pwrsts */ | ||
| 125 | list_for_each_entry(pwrst, &pwrst_list, node) | ||
| 126 | pwrst->saved_state = pwrdm_read_next_pwrst(pwrst->pwrdm); | ||
| 127 | diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c | ||
| 128 | index 62c0d5c..578e9df 100644 | ||
| 129 | --- a/arch/arm/mach-omap2/timer-gp.c | ||
| 130 | +++ b/arch/arm/mach-omap2/timer-gp.c | ||
| 131 | @@ -72,11 +72,9 @@ | ||
| 132 | /* Clockevent code */ | ||
| 133 | |||
| 134 | static struct omap_dm_timer clkev; | ||
| 135 | -static struct omap_dm_timer *gptimer; | ||
| 136 | static struct clock_event_device clockevent_gpt; | ||
| 137 | static u8 __initdata gptimer_id = 1; | ||
| 138 | static u8 __initdata inited; | ||
| 139 | -struct omap_dm_timer *gptimer_wakeup; | ||
| 140 | |||
| 141 | static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) | ||
| 142 | { | ||
| 143 | @@ -218,10 +216,6 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, | ||
| 144 | |||
| 145 | timer->reserved = 1; | ||
| 146 | |||
| 147 | - gptimer = omap_dm_timer_request_specific(gptimer_id); | ||
| 148 | - BUG_ON(gptimer == NULL); | ||
| 149 | - gptimer_wakeup = gptimer; | ||
| 150 | - | ||
| 151 | return res; | ||
| 152 | } | ||
| 153 | |||
| 154 | @@ -235,7 +229,7 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, | ||
| 155 | res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); | ||
| 156 | BUG_ON(res); | ||
| 157 | |||
| 158 | - omap2_gp_timer_irq.dev_id = (void *)gptimer; | ||
| 159 | + omap2_gp_timer_irq.dev_id = (void *)&clkev; | ||
| 160 | setup_irq(clkev.irq, &omap2_gp_timer_irq); | ||
| 161 | |||
| 162 | __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); | ||
| 163 | diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 164 | index dd8b3ff..8adcb18 100644 | ||
| 165 | --- a/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 166 | +++ b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 167 | @@ -59,7 +59,6 @@ | ||
| 168 | */ | ||
| 169 | #define OMAP_TIMER_IP_VERSION_1 0x1 | ||
| 170 | struct omap_dm_timer; | ||
| 171 | -extern struct omap_dm_timer *gptimer_wakeup; | ||
| 172 | struct clk; | ||
| 173 | |||
| 174 | int omap_dm_timer_init(void); | ||
| 175 | -- | ||
| 176 | 1.7.2.5 | ||
| 177 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0009-OMAP3-SR-make-notify-independent-of-class.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0009-OMAP3-SR-make-notify-independent-of-class.patch deleted file mode 100644 index 17b3eda0..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0009-OMAP3-SR-make-notify-independent-of-class.patch +++ /dev/null | |||
| @@ -1,47 +0,0 @@ | |||
| 1 | From b3d437835cf2885fe7a8c6470ca7639e5c11850a Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Mon, 14 Feb 2011 12:16:36 +0530 | ||
| 4 | Subject: [PATCH 009/149] OMAP3+: SR: make notify independent of class | ||
| 5 | |||
| 6 | Interrupt notification mechanism of SmartReflex can be used by the | ||
| 7 | choice of implementation of the class driver. For example, Class 2 and | ||
| 8 | Class 1.5 of SmartReflex can both use the interrupt notification to | ||
| 9 | identify the transition of voltage or other events. | ||
| 10 | |||
| 11 | Hence, the actual class does not matter for notifier. Let the class | ||
| 12 | driver's handling decide how it should be used. SmartReflex driver | ||
| 13 | should provide just the primitives. | ||
| 14 | |||
| 15 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 16 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 17 | --- | ||
| 18 | arch/arm/mach-omap2/smartreflex.c | 6 ++---- | ||
| 19 | 1 files changed, 2 insertions(+), 4 deletions(-) | ||
| 20 | |||
| 21 | diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c | ||
| 22 | index f5a6bc1..785ed4c 100644 | ||
| 23 | --- a/arch/arm/mach-omap2/smartreflex.c | ||
| 24 | +++ b/arch/arm/mach-omap2/smartreflex.c | ||
| 25 | @@ -143,7 +143,7 @@ static irqreturn_t sr_interrupt(int irq, void *data) | ||
| 26 | sr_write_reg(sr_info, IRQSTATUS, status); | ||
| 27 | } | ||
| 28 | |||
| 29 | - if (sr_class->class_type == SR_CLASS2 && sr_class->notify) | ||
| 30 | + if (sr_class->notify) | ||
| 31 | sr_class->notify(sr_info->voltdm, status); | ||
| 32 | |||
| 33 | return IRQ_HANDLED; | ||
| 34 | @@ -258,9 +258,7 @@ static int sr_late_init(struct omap_sr *sr_info) | ||
| 35 | struct resource *mem; | ||
| 36 | int ret = 0; | ||
| 37 | |||
| 38 | - if (sr_class->class_type == SR_CLASS2 && | ||
| 39 | - sr_class->notify_flags && sr_info->irq) { | ||
| 40 | - | ||
| 41 | + if (sr_class->notify && sr_class->notify_flags && sr_info->irq) { | ||
| 42 | name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); | ||
| 43 | if (name == NULL) { | ||
| 44 | ret = -ENOMEM; | ||
| 45 | -- | ||
| 46 | 1.7.2.5 | ||
| 47 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0010-OMAP3-SR-disable-interrupt-by-default.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0010-OMAP3-SR-disable-interrupt-by-default.patch deleted file mode 100644 index 7d8ef304..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0010-OMAP3-SR-disable-interrupt-by-default.patch +++ /dev/null | |||
| @@ -1,36 +0,0 @@ | |||
| 1 | From 252ef25d54768a725289253c494e1f37a5eec526 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Mon, 14 Feb 2011 12:41:10 +0530 | ||
| 4 | Subject: [PATCH 010/149] OMAP3+: SR: disable interrupt by default | ||
| 5 | |||
| 6 | We will enable and disable interrupt on a need basis in the class | ||
| 7 | driver. We need to keep the IRQ disabled by default else the | ||
| 8 | forceupdate or vcbypass events could trigger events that we don't | ||
| 9 | need/expect to handle. | ||
| 10 | |||
| 11 | This is a preparation for SmartReflex AVS class drivers such as | ||
| 12 | class 2 and class 1.5 which would need to use interrupts. Existing | ||
| 13 | SmartReflex AVS class 3 driver does not require to use interrupts | ||
| 14 | and is not impacted by this change. | ||
| 15 | |||
| 16 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 17 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 18 | --- | ||
| 19 | arch/arm/mach-omap2/smartreflex.c | 1 + | ||
| 20 | 1 files changed, 1 insertions(+), 0 deletions(-) | ||
| 21 | |||
| 22 | diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c | ||
| 23 | index 785ed4c..6b69ada 100644 | ||
| 24 | --- a/arch/arm/mach-omap2/smartreflex.c | ||
| 25 | +++ b/arch/arm/mach-omap2/smartreflex.c | ||
| 26 | @@ -268,6 +268,7 @@ static int sr_late_init(struct omap_sr *sr_info) | ||
| 27 | 0, name, (void *)sr_info); | ||
| 28 | if (ret) | ||
| 29 | goto error; | ||
| 30 | + disable_irq(sr_info->irq); | ||
| 31 | } | ||
| 32 | |||
| 33 | if (pdata && pdata->enable_on_init) | ||
| 34 | -- | ||
| 35 | 1.7.2.5 | ||
| 36 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch deleted file mode 100644 index ffc8c8cf..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch +++ /dev/null | |||
| @@ -1,40 +0,0 @@ | |||
| 1 | From e060d73eef027063f687feae1c3d0ad2418a88aa Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Mon, 14 Feb 2011 21:14:17 +0530 | ||
| 4 | Subject: [PATCH 011/149] OMAP3+: SR: enable/disable SR only on need | ||
| 5 | |||
| 6 | Since we already know the state of the autocomp enablement, we can | ||
| 7 | see if the requested state is different from the current state and | ||
| 8 | enable/disable SR only on the need basis. | ||
| 9 | |||
| 10 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 11 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/smartreflex.c | 11 +++++++---- | ||
| 14 | 1 files changed, 7 insertions(+), 4 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c | ||
| 17 | index 6b69ada..1a370b9 100644 | ||
| 18 | --- a/arch/arm/mach-omap2/smartreflex.c | ||
| 19 | +++ b/arch/arm/mach-omap2/smartreflex.c | ||
| 20 | @@ -807,10 +807,13 @@ static int omap_sr_autocomp_store(void *data, u64 val) | ||
| 21 | return -EINVAL; | ||
| 22 | } | ||
| 23 | |||
| 24 | - if (!val) | ||
| 25 | - sr_stop_vddautocomp(sr_info); | ||
| 26 | - else | ||
| 27 | - sr_start_vddautocomp(sr_info); | ||
| 28 | + /* control enable/disable only if there is a delta in value */ | ||
| 29 | + if (sr_info->autocomp_active != val) { | ||
| 30 | + if (!val) | ||
| 31 | + sr_stop_vddautocomp(sr_info); | ||
| 32 | + else | ||
| 33 | + sr_start_vddautocomp(sr_info); | ||
| 34 | + } | ||
| 35 | |||
| 36 | return 0; | ||
| 37 | } | ||
| 38 | -- | ||
| 39 | 1.7.2.5 | ||
| 40 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0012-OMAP3-SR-fix-cosmetic-indentation.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0012-OMAP3-SR-fix-cosmetic-indentation.patch deleted file mode 100644 index 63c8230d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0012-OMAP3-SR-fix-cosmetic-indentation.patch +++ /dev/null | |||
| @@ -1,48 +0,0 @@ | |||
| 1 | From d9d17d6ea5a56b81a7d6d134aeeeff6a3b9fbf88 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Mon, 14 Feb 2011 12:33:13 +0530 | ||
| 4 | Subject: [PATCH 012/149] OMAP3+: SR: fix cosmetic indentation | ||
| 5 | |||
| 6 | Error label case seems to have a 2 tab indentation when just 1 is | ||
| 7 | necessary. | ||
| 8 | |||
| 9 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 10 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/smartreflex.c | 20 ++++++++++---------- | ||
| 13 | 1 files changed, 10 insertions(+), 10 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c | ||
| 16 | index 1a370b9..be6add0 100644 | ||
| 17 | --- a/arch/arm/mach-omap2/smartreflex.c | ||
| 18 | +++ b/arch/arm/mach-omap2/smartreflex.c | ||
| 19 | @@ -277,16 +277,16 @@ static int sr_late_init(struct omap_sr *sr_info) | ||
| 20 | return ret; | ||
| 21 | |||
| 22 | error: | ||
| 23 | - iounmap(sr_info->base); | ||
| 24 | - mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); | ||
| 25 | - release_mem_region(mem->start, resource_size(mem)); | ||
| 26 | - list_del(&sr_info->node); | ||
| 27 | - dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" | ||
| 28 | - "interrupt handler. Smartreflex will" | ||
| 29 | - "not function as desired\n", __func__); | ||
| 30 | - kfree(name); | ||
| 31 | - kfree(sr_info); | ||
| 32 | - return ret; | ||
| 33 | + iounmap(sr_info->base); | ||
| 34 | + mem = platform_get_resource(sr_info->pdev, IORESOURCE_MEM, 0); | ||
| 35 | + release_mem_region(mem->start, resource_size(mem)); | ||
| 36 | + list_del(&sr_info->node); | ||
| 37 | + dev_err(&sr_info->pdev->dev, "%s: ERROR in registering" | ||
| 38 | + "interrupt handler. Smartreflex will" | ||
| 39 | + "not function as desired\n", __func__); | ||
| 40 | + kfree(name); | ||
| 41 | + kfree(sr_info); | ||
| 42 | + return ret; | ||
| 43 | } | ||
| 44 | |||
| 45 | static void sr_v1_disable(struct omap_sr *sr) | ||
| 46 | -- | ||
| 47 | 1.7.2.5 | ||
| 48 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0013-omap2-Reserve-clocksource-and-timesource-and-initial.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0013-omap2-Reserve-clocksource-and-timesource-and-initial.patch deleted file mode 100644 index db4f8e5e..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0013-omap2-Reserve-clocksource-and-timesource-and-initial.patch +++ /dev/null | |||
| @@ -1,125 +0,0 @@ | |||
| 1 | From 8009544b2ea8ceba920455bb7e5e267cc78d3827 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Tony Lindgren <tony@atomide.com> | ||
| 3 | Date: Tue, 29 Mar 2011 15:54:49 -0700 | ||
| 4 | Subject: [PATCH 013/149] omap2+: Reserve clocksource and timesource and initialize dmtimer later | ||
| 5 | |||
| 6 | There's no need to initialize the dmtimer framework early. | ||
| 7 | Just mark the clocksource and timesource as reserved, and | ||
| 8 | initialize dmtimer with an arch_initcall. | ||
| 9 | |||
| 10 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 11 | Reviewed-by: Kevin Hilman <khilman@ti.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap1/timer32k.c | 4 ---- | ||
| 14 | arch/arm/mach-omap2/timer-gp.c | 6 ++++-- | ||
| 15 | arch/arm/plat-omap/dmtimer.c | 10 +++++++++- | ||
| 16 | arch/arm/plat-omap/include/plat/dmtimer.h | 3 +-- | ||
| 17 | 4 files changed, 14 insertions(+), 9 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/mach-omap1/timer32k.c b/arch/arm/mach-omap1/timer32k.c | ||
| 20 | index 13d7b8f..96604a5 100644 | ||
| 21 | --- a/arch/arm/mach-omap1/timer32k.c | ||
| 22 | +++ b/arch/arm/mach-omap1/timer32k.c | ||
| 23 | @@ -183,10 +183,6 @@ static __init void omap_init_32k_timer(void) | ||
| 24 | bool __init omap_32k_timer_init(void) | ||
| 25 | { | ||
| 26 | omap_init_clocksource_32k(); | ||
| 27 | - | ||
| 28 | -#ifdef CONFIG_OMAP_DM_TIMER | ||
| 29 | - omap_dm_timer_init(); | ||
| 30 | -#endif | ||
| 31 | omap_init_32k_timer(); | ||
| 32 | |||
| 33 | return true; | ||
| 34 | diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c | ||
| 35 | index 578e9df..cf2ec85 100644 | ||
| 36 | --- a/arch/arm/mach-omap2/timer-gp.c | ||
| 37 | +++ b/arch/arm/mach-omap2/timer-gp.c | ||
| 38 | @@ -69,6 +69,8 @@ | ||
| 39 | /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ | ||
| 40 | #define MAX_GPTIMER_ID 12 | ||
| 41 | |||
| 42 | +u32 sys_timer_reserved; | ||
| 43 | + | ||
| 44 | /* Clockevent code */ | ||
| 45 | |||
| 46 | static struct omap_dm_timer clkev; | ||
| 47 | @@ -195,6 +197,8 @@ static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, | ||
| 48 | |||
| 49 | omap_hwmod_enable(oh); | ||
| 50 | |||
| 51 | + sys_timer_reserved |= (1 << (gptimer_id - 1)); | ||
| 52 | + | ||
| 53 | if (gptimer_id != 12) { | ||
| 54 | struct clk *src; | ||
| 55 | |||
| 56 | @@ -321,7 +325,6 @@ static void __init omap2_gp_clocksource_init(void) | ||
| 57 | #define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) \ | ||
| 58 | static void __init omap##name##_timer_init(void) \ | ||
| 59 | { \ | ||
| 60 | - omap_dm_timer_init(); \ | ||
| 61 | omap2_gp_clockevent_init((clkev_nr), clkev_src); \ | ||
| 62 | omap2_gp_clocksource_init(); \ | ||
| 63 | } | ||
| 64 | @@ -350,7 +353,6 @@ static void __init omap4_timer_init(void) | ||
| 65 | twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); | ||
| 66 | BUG_ON(!twd_base); | ||
| 67 | #endif | ||
| 68 | - omap_dm_timer_init(); | ||
| 69 | omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); | ||
| 70 | omap2_gp_clocksource_init(); | ||
| 71 | } | ||
| 72 | diff --git a/arch/arm/plat-omap/dmtimer.c b/arch/arm/plat-omap/dmtimer.c | ||
| 73 | index 7c5cb4e..8dfb818 100644 | ||
| 74 | --- a/arch/arm/plat-omap/dmtimer.c | ||
| 75 | +++ b/arch/arm/plat-omap/dmtimer.c | ||
| 76 | @@ -572,7 +572,7 @@ int omap_dm_timers_active(void) | ||
| 77 | } | ||
| 78 | EXPORT_SYMBOL_GPL(omap_dm_timers_active); | ||
| 79 | |||
| 80 | -int __init omap_dm_timer_init(void) | ||
| 81 | +static int __init omap_dm_timer_init(void) | ||
| 82 | { | ||
| 83 | struct omap_dm_timer *timer; | ||
| 84 | int i, map_size = SZ_8K; /* Module 4KB + L4 4KB except on omap1 */ | ||
| 85 | @@ -625,8 +625,16 @@ int __init omap_dm_timer_init(void) | ||
| 86 | sprintf(clk_name, "gpt%d_fck", i + 1); | ||
| 87 | timer->fclk = clk_get(NULL, clk_name); | ||
| 88 | } | ||
| 89 | + | ||
| 90 | + /* One or two timers may be set up early for sys_timer */ | ||
| 91 | + if (sys_timer_reserved & (1 << i)) { | ||
| 92 | + timer->reserved = 1; | ||
| 93 | + timer->posted = 1; | ||
| 94 | + } | ||
| 95 | #endif | ||
| 96 | } | ||
| 97 | |||
| 98 | return 0; | ||
| 99 | } | ||
| 100 | + | ||
| 101 | +arch_initcall(omap_dm_timer_init); | ||
| 102 | diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 103 | index 8adcb18..d0f3a2d 100644 | ||
| 104 | --- a/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 105 | +++ b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 106 | @@ -61,8 +61,6 @@ | ||
| 107 | struct omap_dm_timer; | ||
| 108 | struct clk; | ||
| 109 | |||
| 110 | -int omap_dm_timer_init(void); | ||
| 111 | - | ||
| 112 | struct omap_dm_timer *omap_dm_timer_request(void); | ||
| 113 | struct omap_dm_timer *omap_dm_timer_request_specific(int timer_id); | ||
| 114 | void omap_dm_timer_free(struct omap_dm_timer *timer); | ||
| 115 | @@ -221,6 +219,7 @@ struct omap_dm_timer { | ||
| 116 | unsigned posted:1; | ||
| 117 | }; | ||
| 118 | |||
| 119 | +extern u32 sys_timer_reserved; | ||
| 120 | void omap_dm_timer_prepare(struct omap_dm_timer *timer); | ||
| 121 | |||
| 122 | static inline u32 __omap_dm_timer_read(void __iomem *base, u32 reg, | ||
| 123 | -- | ||
| 124 | 1.7.2.5 | ||
| 125 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0014-omap2-Use-dmtimer-macros-for-clocksource.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0014-omap2-Use-dmtimer-macros-for-clocksource.patch deleted file mode 100644 index 2e72dad0..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0014-omap2-Use-dmtimer-macros-for-clocksource.patch +++ /dev/null | |||
| @@ -1,163 +0,0 @@ | |||
| 1 | From 595da70cb0e039cbe04d9c7ce179883e6f8878c1 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Tony Lindgren <tony@atomide.com> | ||
| 3 | Date: Tue, 29 Mar 2011 15:54:49 -0700 | ||
| 4 | Subject: [PATCH 014/149] omap2+: Use dmtimer macros for clocksource | ||
| 5 | |||
| 6 | Use dmtimer macros for clocksource. As with the clockevent, | ||
| 7 | this allows us to initialize the rest of dmtimer code later on. | ||
| 8 | |||
| 9 | Note that eventually we will be initializing the timesource | ||
| 10 | from init_early so sched_clock will work properly for | ||
| 11 | CONFIG_PRINTK_TIME. | ||
| 12 | |||
| 13 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 14 | Reviewed-by: Kevin Hilman <khilman@ti.com> | ||
| 15 | --- | ||
| 16 | arch/arm/mach-omap2/timer-gp.c | 64 +++++++++++++++++++++---------------- | ||
| 17 | arch/arm/plat-omap/counter_32k.c | 2 +- | ||
| 18 | 2 files changed, 37 insertions(+), 29 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c | ||
| 21 | index cf2ec85..2b8cb70 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/timer-gp.c | ||
| 23 | +++ b/arch/arm/mach-omap2/timer-gp.c | ||
| 24 | @@ -262,20 +262,22 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, | ||
| 25 | * sync counter. See clocksource setup in plat-omap/counter_32k.c | ||
| 26 | */ | ||
| 27 | |||
| 28 | -static void __init omap2_gp_clocksource_init(void) | ||
| 29 | +static void __init omap2_gp_clocksource_init(int unused, const char *dummy) | ||
| 30 | { | ||
| 31 | omap_init_clocksource_32k(); | ||
| 32 | } | ||
| 33 | |||
| 34 | #else | ||
| 35 | + | ||
| 36 | +static struct omap_dm_timer clksrc; | ||
| 37 | + | ||
| 38 | /* | ||
| 39 | * clocksource | ||
| 40 | */ | ||
| 41 | static DEFINE_CLOCK_DATA(cd); | ||
| 42 | -static struct omap_dm_timer *gpt_clocksource; | ||
| 43 | static cycle_t clocksource_read_cycles(struct clocksource *cs) | ||
| 44 | { | ||
| 45 | - return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource); | ||
| 46 | + return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); | ||
| 47 | } | ||
| 48 | |||
| 49 | static struct clocksource clocksource_gpt = { | ||
| 50 | @@ -290,43 +292,48 @@ static void notrace dmtimer_update_sched_clock(void) | ||
| 51 | { | ||
| 52 | u32 cyc; | ||
| 53 | |||
| 54 | - cyc = omap_dm_timer_read_counter(gpt_clocksource); | ||
| 55 | + cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); | ||
| 56 | |||
| 57 | update_sched_clock(&cd, cyc, (u32)~0); | ||
| 58 | } | ||
| 59 | |||
| 60 | -/* Setup free-running counter for clocksource */ | ||
| 61 | -static void __init omap2_gp_clocksource_init(void) | ||
| 62 | +unsigned long long notrace sched_clock(void) | ||
| 63 | { | ||
| 64 | - static struct omap_dm_timer *gpt; | ||
| 65 | - u32 tick_rate; | ||
| 66 | - static char err1[] __initdata = KERN_ERR | ||
| 67 | - "%s: failed to request dm-timer\n"; | ||
| 68 | - static char err2[] __initdata = KERN_ERR | ||
| 69 | - "%s: can't register clocksource!\n"; | ||
| 70 | + u32 cyc = 0; | ||
| 71 | |||
| 72 | - gpt = omap_dm_timer_request(); | ||
| 73 | - if (!gpt) | ||
| 74 | - printk(err1, clocksource_gpt.name); | ||
| 75 | - gpt_clocksource = gpt; | ||
| 76 | + if (clksrc.reserved) | ||
| 77 | + cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); | ||
| 78 | |||
| 79 | - omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK); | ||
| 80 | - tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt)); | ||
| 81 | + return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
| 82 | +} | ||
| 83 | + | ||
| 84 | +/* Setup free-running counter for clocksource */ | ||
| 85 | +static void __init omap2_gp_clocksource_init(int gptimer_id, | ||
| 86 | + const char *fck_source) | ||
| 87 | +{ | ||
| 88 | + int res; | ||
| 89 | + | ||
| 90 | + res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); | ||
| 91 | + BUG_ON(res); | ||
| 92 | |||
| 93 | - omap_dm_timer_set_load_start(gpt, 1, 0); | ||
| 94 | + pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", | ||
| 95 | + gptimer_id, clksrc.rate); | ||
| 96 | |||
| 97 | - init_sched_clock(&cd, dmtimer_update_sched_clock, 32, tick_rate); | ||
| 98 | + __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1); | ||
| 99 | + init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); | ||
| 100 | |||
| 101 | - if (clocksource_register_hz(&clocksource_gpt, tick_rate)) | ||
| 102 | - printk(err2, clocksource_gpt.name); | ||
| 103 | + if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) | ||
| 104 | + pr_err("Could not register clocksource %s\n", | ||
| 105 | + clocksource_gpt.name); | ||
| 106 | } | ||
| 107 | #endif | ||
| 108 | |||
| 109 | -#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src) \ | ||
| 110 | +#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \ | ||
| 111 | + clksrc_nr, clksrc_src) \ | ||
| 112 | static void __init omap##name##_timer_init(void) \ | ||
| 113 | { \ | ||
| 114 | omap2_gp_clockevent_init((clkev_nr), clkev_src); \ | ||
| 115 | - omap2_gp_clocksource_init(); \ | ||
| 116 | + omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \ | ||
| 117 | } | ||
| 118 | |||
| 119 | #define OMAP_SYS_TIMER(name) \ | ||
| 120 | @@ -335,14 +342,15 @@ struct sys_timer omap##name##_timer = { \ | ||
| 121 | }; | ||
| 122 | |||
| 123 | #ifdef CONFIG_ARCH_OMAP2 | ||
| 124 | -OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE) | ||
| 125 | +OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE) | ||
| 126 | OMAP_SYS_TIMER(2) | ||
| 127 | #endif | ||
| 128 | |||
| 129 | #ifdef CONFIG_ARCH_OMAP3 | ||
| 130 | -OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE) | ||
| 131 | +OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE) | ||
| 132 | OMAP_SYS_TIMER(3) | ||
| 133 | -OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE) | ||
| 134 | +OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE, | ||
| 135 | + 2, OMAP3_MPU_SOURCE) | ||
| 136 | OMAP_SYS_TIMER(3_secure) | ||
| 137 | #endif | ||
| 138 | |||
| 139 | @@ -354,7 +362,7 @@ static void __init omap4_timer_init(void) | ||
| 140 | BUG_ON(!twd_base); | ||
| 141 | #endif | ||
| 142 | omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); | ||
| 143 | - omap2_gp_clocksource_init(); | ||
| 144 | + omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE); | ||
| 145 | } | ||
| 146 | OMAP_SYS_TIMER(4) | ||
| 147 | #endif | ||
| 148 | diff --git a/arch/arm/plat-omap/counter_32k.c b/arch/arm/plat-omap/counter_32k.c | ||
| 149 | index f7fed60..c13bc3d 100644 | ||
| 150 | --- a/arch/arm/plat-omap/counter_32k.c | ||
| 151 | +++ b/arch/arm/plat-omap/counter_32k.c | ||
| 152 | @@ -126,7 +126,7 @@ static inline unsigned long long notrace _omap_32k_sched_clock(void) | ||
| 153 | return cyc_to_fixed_sched_clock(&cd, cyc, (u32)~0, SC_MULT, SC_SHIFT); | ||
| 154 | } | ||
| 155 | |||
| 156 | -#ifndef CONFIG_OMAP_MPU_TIMER | ||
| 157 | +#if defined(CONFIG_OMAP_32K_TIMER) && !defined(CONFIG_OMAP_MPU_TIMER) | ||
| 158 | unsigned long long notrace sched_clock(void) | ||
| 159 | { | ||
| 160 | return _omap_32k_sched_clock(); | ||
| 161 | -- | ||
| 162 | 1.7.2.5 | ||
| 163 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0015-omap2-Remove-omap2_gp_clockevent_set_gptimer.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0015-omap2-Remove-omap2_gp_clockevent_set_gptimer.patch deleted file mode 100644 index 298f82d4..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0015-omap2-Remove-omap2_gp_clockevent_set_gptimer.patch +++ /dev/null | |||
| @@ -1,240 +0,0 @@ | |||
| 1 | From e50befd53e52f2c72a26e33812ad896d5f8524fa Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Tony Lindgren <tony@atomide.com> | ||
| 3 | Date: Tue, 29 Mar 2011 15:54:49 -0700 | ||
| 4 | Subject: [PATCH 015/149] omap2+: Remove omap2_gp_clockevent_set_gptimer | ||
| 5 | |||
| 6 | This is no longer needed as we now just set the desired | ||
| 7 | .timer in MACHINE_START. We can now also remove timer-gp.h. | ||
| 8 | |||
| 9 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 10 | Reviewed-by: Kevin Hilman <khilman@ti.com> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/board-4430sdp.c | 4 ---- | ||
| 13 | arch/arm/mach-omap2/board-devkit8000.c | 4 ---- | ||
| 14 | arch/arm/mach-omap2/board-omap3beagle.c | 4 ---- | ||
| 15 | arch/arm/mach-omap2/board-omap3logic.c | 1 - | ||
| 16 | arch/arm/mach-omap2/board-omap3stalker.c | 4 ---- | ||
| 17 | arch/arm/mach-omap2/board-omap3touchbook.c | 4 ---- | ||
| 18 | arch/arm/mach-omap2/board-omap4panda.c | 1 - | ||
| 19 | arch/arm/mach-omap2/timer-gp.c | 26 -------------------------- | ||
| 20 | arch/arm/mach-omap2/timer-gp.h | 16 ---------------- | ||
| 21 | 9 files changed, 0 insertions(+), 64 deletions(-) | ||
| 22 | delete mode 100644 arch/arm/mach-omap2/timer-gp.h | ||
| 23 | |||
| 24 | diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c | ||
| 25 | index e8caced..d7df07e 100644 | ||
| 26 | --- a/arch/arm/mach-omap2/board-4430sdp.c | ||
| 27 | +++ b/arch/arm/mach-omap2/board-4430sdp.c | ||
| 28 | @@ -40,7 +40,6 @@ | ||
| 29 | |||
| 30 | #include "mux.h" | ||
| 31 | #include "hsmmc.h" | ||
| 32 | -#include "timer-gp.h" | ||
| 33 | #include "control.h" | ||
| 34 | #include "common-board-devices.h" | ||
| 35 | |||
| 36 | @@ -295,9 +294,6 @@ static void __init omap_4430sdp_init_early(void) | ||
| 37 | { | ||
| 38 | omap2_init_common_infrastructure(); | ||
| 39 | omap2_init_common_devices(NULL, NULL); | ||
| 40 | -#ifdef CONFIG_OMAP_32K_TIMER | ||
| 41 | - omap2_gp_clockevent_set_gptimer(1); | ||
| 42 | -#endif | ||
| 43 | } | ||
| 44 | |||
| 45 | static struct omap_musb_board_data musb_board_data = { | ||
| 46 | diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c | ||
| 47 | index 46d144d..949dbea 100644 | ||
| 48 | --- a/arch/arm/mach-omap2/board-devkit8000.c | ||
| 49 | +++ b/arch/arm/mach-omap2/board-devkit8000.c | ||
| 50 | @@ -58,7 +58,6 @@ | ||
| 51 | |||
| 52 | #include "mux.h" | ||
| 53 | #include "hsmmc.h" | ||
| 54 | -#include "timer-gp.h" | ||
| 55 | #include "common-board-devices.h" | ||
| 56 | |||
| 57 | #define OMAP_DM9000_GPIO_IRQ 25 | ||
| 58 | @@ -441,9 +440,6 @@ static void __init devkit8000_init_early(void) | ||
| 59 | static void __init devkit8000_init_irq(void) | ||
| 60 | { | ||
| 61 | omap3_init_irq(); | ||
| 62 | -#ifdef CONFIG_OMAP_32K_TIMER | ||
| 63 | - omap2_gp_clockevent_set_gptimer(12); | ||
| 64 | -#endif | ||
| 65 | } | ||
| 66 | |||
| 67 | #define OMAP_DM9000_BASE 0x2c000000 | ||
| 68 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 69 | index 9ee16f6..2d8dfb3 100644 | ||
| 70 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 71 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 72 | @@ -50,7 +50,6 @@ | ||
| 73 | |||
| 74 | #include "mux.h" | ||
| 75 | #include "hsmmc.h" | ||
| 76 | -#include "timer-gp.h" | ||
| 77 | #include "pm.h" | ||
| 78 | #include "common-board-devices.h" | ||
| 79 | |||
| 80 | @@ -484,9 +483,6 @@ static void __init omap3_beagle_init_early(void) | ||
| 81 | static void __init omap3_beagle_init_irq(void) | ||
| 82 | { | ||
| 83 | omap3_init_irq(); | ||
| 84 | -#ifdef CONFIG_OMAP_32K_TIMER | ||
| 85 | - omap2_gp_clockevent_set_gptimer(12); | ||
| 86 | -#endif | ||
| 87 | } | ||
| 88 | |||
| 89 | static struct platform_device *omap3_beagle_devices[] __initdata = { | ||
| 90 | diff --git a/arch/arm/mach-omap2/board-omap3logic.c b/arch/arm/mach-omap2/board-omap3logic.c | ||
| 91 | index 469259a..703aeb5 100644 | ||
| 92 | --- a/arch/arm/mach-omap2/board-omap3logic.c | ||
| 93 | +++ b/arch/arm/mach-omap2/board-omap3logic.c | ||
| 94 | @@ -35,7 +35,6 @@ | ||
| 95 | |||
| 96 | #include "mux.h" | ||
| 97 | #include "hsmmc.h" | ||
| 98 | -#include "timer-gp.h" | ||
| 99 | #include "control.h" | ||
| 100 | #include "common-board-devices.h" | ||
| 101 | |||
| 102 | diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 103 | index 2fa8fae..b8ad4dd 100644 | ||
| 104 | --- a/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 105 | +++ b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 106 | @@ -52,7 +52,6 @@ | ||
| 107 | #include "sdram-micron-mt46h32m32lf-6.h" | ||
| 108 | #include "mux.h" | ||
| 109 | #include "hsmmc.h" | ||
| 110 | -#include "timer-gp.h" | ||
| 111 | #include "common-board-devices.h" | ||
| 112 | |||
| 113 | #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE) | ||
| 114 | @@ -492,9 +491,6 @@ static void __init omap3_stalker_init_early(void) | ||
| 115 | static void __init omap3_stalker_init_irq(void) | ||
| 116 | { | ||
| 117 | omap3_init_irq(); | ||
| 118 | -#ifdef CONFIG_OMAP_32K_TIMER | ||
| 119 | - omap2_gp_clockevent_set_gptimer(12); | ||
| 120 | -#endif | ||
| 121 | } | ||
| 122 | |||
| 123 | static struct platform_device *omap3_stalker_devices[] __initdata = { | ||
| 124 | diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 125 | index 8c71fd2..57e6ed3 100644 | ||
| 126 | --- a/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 127 | +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 128 | @@ -51,7 +51,6 @@ | ||
| 129 | |||
| 130 | #include "mux.h" | ||
| 131 | #include "hsmmc.h" | ||
| 132 | -#include "timer-gp.h" | ||
| 133 | #include "common-board-devices.h" | ||
| 134 | |||
| 135 | #include <asm/setup.h> | ||
| 136 | @@ -372,9 +371,6 @@ static void __init omap3_touchbook_init_early(void) | ||
| 137 | static void __init omap3_touchbook_init_irq(void) | ||
| 138 | { | ||
| 139 | omap3_init_irq(); | ||
| 140 | -#ifdef CONFIG_OMAP_32K_TIMER | ||
| 141 | - omap2_gp_clockevent_set_gptimer(12); | ||
| 142 | -#endif | ||
| 143 | } | ||
| 144 | |||
| 145 | static struct platform_device *omap3_touchbook_devices[] __initdata = { | ||
| 146 | diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c | ||
| 147 | index dc1d6dc..ee2034e 100644 | ||
| 148 | --- a/arch/arm/mach-omap2/board-omap4panda.c | ||
| 149 | +++ b/arch/arm/mach-omap2/board-omap4panda.c | ||
| 150 | @@ -41,7 +41,6 @@ | ||
| 151 | #include <plat/usb.h> | ||
| 152 | #include <plat/mmc.h> | ||
| 153 | #include <video/omap-panel-generic-dpi.h> | ||
| 154 | -#include "timer-gp.h" | ||
| 155 | |||
| 156 | #include "hsmmc.h" | ||
| 157 | #include "control.h" | ||
| 158 | diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c | ||
| 159 | index 2b8cb70..ab1931c 100644 | ||
| 160 | --- a/arch/arm/mach-omap2/timer-gp.c | ||
| 161 | +++ b/arch/arm/mach-omap2/timer-gp.c | ||
| 162 | @@ -43,8 +43,6 @@ | ||
| 163 | #include <plat/common.h> | ||
| 164 | #include <plat/omap_hwmod.h> | ||
| 165 | |||
| 166 | -#include "timer-gp.h" | ||
| 167 | - | ||
| 168 | /* Parent clocks, eventually these will come from the clock framework */ | ||
| 169 | |||
| 170 | #define OMAP2_MPU_SOURCE "sys_ck" | ||
| 171 | @@ -75,8 +73,6 @@ u32 sys_timer_reserved; | ||
| 172 | |||
| 173 | static struct omap_dm_timer clkev; | ||
| 174 | static struct clock_event_device clockevent_gpt; | ||
| 175 | -static u8 __initdata gptimer_id = 1; | ||
| 176 | -static u8 __initdata inited; | ||
| 177 | |||
| 178 | static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) | ||
| 179 | { | ||
| 180 | @@ -138,26 +134,6 @@ static struct clock_event_device clockevent_gpt = { | ||
| 181 | .set_mode = omap2_gp_timer_set_mode, | ||
| 182 | }; | ||
| 183 | |||
| 184 | -/** | ||
| 185 | - * omap2_gp_clockevent_set_gptimer - set which GPTIMER is used for clockevents | ||
| 186 | - * @id: GPTIMER to use (1..MAX_GPTIMER_ID) | ||
| 187 | - * | ||
| 188 | - * Define the GPTIMER that the system should use for the tick timer. | ||
| 189 | - * Meant to be called from board-*.c files in the event that GPTIMER1, the | ||
| 190 | - * default, is unsuitable. Returns -EINVAL on error or 0 on success. | ||
| 191 | - */ | ||
| 192 | -int __init omap2_gp_clockevent_set_gptimer(u8 id) | ||
| 193 | -{ | ||
| 194 | - if (id < 1 || id > MAX_GPTIMER_ID) | ||
| 195 | - return -EINVAL; | ||
| 196 | - | ||
| 197 | - BUG_ON(inited); | ||
| 198 | - | ||
| 199 | - gptimer_id = id; | ||
| 200 | - | ||
| 201 | - return 0; | ||
| 202 | -} | ||
| 203 | - | ||
| 204 | static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, | ||
| 205 | int gptimer_id, | ||
| 206 | const char *fck_source) | ||
| 207 | @@ -228,8 +204,6 @@ static void __init omap2_gp_clockevent_init(int gptimer_id, | ||
| 208 | { | ||
| 209 | int res; | ||
| 210 | |||
| 211 | - inited = 1; | ||
| 212 | - | ||
| 213 | res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); | ||
| 214 | BUG_ON(res); | ||
| 215 | |||
| 216 | diff --git a/arch/arm/mach-omap2/timer-gp.h b/arch/arm/mach-omap2/timer-gp.h | ||
| 217 | deleted file mode 100644 | ||
| 218 | index 5c1072c..0000000 | ||
| 219 | --- a/arch/arm/mach-omap2/timer-gp.h | ||
| 220 | +++ /dev/null | ||
| 221 | @@ -1,16 +0,0 @@ | ||
| 222 | -/* | ||
| 223 | - * OMAP2/3 GPTIMER support.headers | ||
| 224 | - * | ||
| 225 | - * Copyright (C) 2009 Nokia Corporation | ||
| 226 | - * | ||
| 227 | - * This file is subject to the terms and conditions of the GNU General Public | ||
| 228 | - * License. See the file "COPYING" in the main directory of this archive | ||
| 229 | - * for more details. | ||
| 230 | - */ | ||
| 231 | - | ||
| 232 | -#ifndef __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H | ||
| 233 | -#define __ARCH_ARM_PLAT_OMAP_INCLUDE_MACH_TIMER_GP_H | ||
| 234 | - | ||
| 235 | -extern int __init omap2_gp_clockevent_set_gptimer(u8 id); | ||
| 236 | - | ||
| 237 | -#endif | ||
| 238 | -- | ||
| 239 | 1.7.2.5 | ||
| 240 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0016-omap2-Rename-timer-gp.c-into-timer.c-to-combine-time.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0016-omap2-Rename-timer-gp.c-into-timer.c-to-combine-time.patch deleted file mode 100644 index c511aa98..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0016-omap2-Rename-timer-gp.c-into-timer.c-to-combine-time.patch +++ /dev/null | |||
| @@ -1,737 +0,0 @@ | |||
| 1 | From 5cdb1497ccc5b9dae8795e1e5e9c74f11e4e7401 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Tony Lindgren <tony@atomide.com> | ||
| 3 | Date: Tue, 29 Mar 2011 15:54:50 -0700 | ||
| 4 | Subject: [PATCH 016/149] omap2+: Rename timer-gp.c into timer.c to combine timer init functions | ||
| 5 | |||
| 6 | We can keep everything sys_timer and gptimer.c related code in | ||
| 7 | timer.c as the code will be very minimal. | ||
| 8 | |||
| 9 | Later on we can also remove timer-mpu.c, as it can be called from | ||
| 10 | omap4_timer_init function. | ||
| 11 | |||
| 12 | This allows us to get rid of confusing existing files. We currently | ||
| 13 | have timer-gp.c, timer-mpu.c, and patches have been posted to add | ||
| 14 | dmtimer.c. There's no need to have these multiple files, we can | ||
| 15 | put everything into timer.c. | ||
| 16 | |||
| 17 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 18 | --- | ||
| 19 | arch/arm/mach-omap2/Makefile | 2 +- | ||
| 20 | arch/arm/mach-omap2/timer-gp.c | 342 ---------------------------------------- | ||
| 21 | arch/arm/mach-omap2/timer.c | 342 ++++++++++++++++++++++++++++++++++++++++ | ||
| 22 | 3 files changed, 343 insertions(+), 343 deletions(-) | ||
| 23 | delete mode 100644 arch/arm/mach-omap2/timer-gp.c | ||
| 24 | create mode 100644 arch/arm/mach-omap2/timer.c | ||
| 25 | |||
| 26 | diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile | ||
| 27 | index b148077..adbe82d 100644 | ||
| 28 | --- a/arch/arm/mach-omap2/Makefile | ||
| 29 | +++ b/arch/arm/mach-omap2/Makefile | ||
| 30 | @@ -3,7 +3,7 @@ | ||
| 31 | # | ||
| 32 | |||
| 33 | # Common support | ||
| 34 | -obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer-gp.o pm.o \ | ||
| 35 | +obj-y := id.o io.o control.o mux.o devices.o serial.o gpmc.o timer.o pm.o \ | ||
| 36 | common.o gpio.o dma.o wd_timer.o | ||
| 37 | |||
| 38 | omap-2-3-common = irq.o sdrc.o | ||
| 39 | diff --git a/arch/arm/mach-omap2/timer-gp.c b/arch/arm/mach-omap2/timer-gp.c | ||
| 40 | deleted file mode 100644 | ||
| 41 | index ab1931c..0000000 | ||
| 42 | --- a/arch/arm/mach-omap2/timer-gp.c | ||
| 43 | +++ /dev/null | ||
| 44 | @@ -1,342 +0,0 @@ | ||
| 45 | -/* | ||
| 46 | - * linux/arch/arm/mach-omap2/timer-gp.c | ||
| 47 | - * | ||
| 48 | - * OMAP2 GP timer support. | ||
| 49 | - * | ||
| 50 | - * Copyright (C) 2009 Nokia Corporation | ||
| 51 | - * | ||
| 52 | - * Update to use new clocksource/clockevent layers | ||
| 53 | - * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> | ||
| 54 | - * Copyright (C) 2007 MontaVista Software, Inc. | ||
| 55 | - * | ||
| 56 | - * Original driver: | ||
| 57 | - * Copyright (C) 2005 Nokia Corporation | ||
| 58 | - * Author: Paul Mundt <paul.mundt@nokia.com> | ||
| 59 | - * Juha Yrjölä <juha.yrjola@nokia.com> | ||
| 60 | - * OMAP Dual-mode timer framework support by Timo Teras | ||
| 61 | - * | ||
| 62 | - * Some parts based off of TI's 24xx code: | ||
| 63 | - * | ||
| 64 | - * Copyright (C) 2004-2009 Texas Instruments, Inc. | ||
| 65 | - * | ||
| 66 | - * Roughly modelled after the OMAP1 MPU timer code. | ||
| 67 | - * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 68 | - * | ||
| 69 | - * This file is subject to the terms and conditions of the GNU General Public | ||
| 70 | - * License. See the file "COPYING" in the main directory of this archive | ||
| 71 | - * for more details. | ||
| 72 | - */ | ||
| 73 | -#include <linux/init.h> | ||
| 74 | -#include <linux/time.h> | ||
| 75 | -#include <linux/interrupt.h> | ||
| 76 | -#include <linux/err.h> | ||
| 77 | -#include <linux/clk.h> | ||
| 78 | -#include <linux/delay.h> | ||
| 79 | -#include <linux/irq.h> | ||
| 80 | -#include <linux/clocksource.h> | ||
| 81 | -#include <linux/clockchips.h> | ||
| 82 | - | ||
| 83 | -#include <asm/mach/time.h> | ||
| 84 | -#include <plat/dmtimer.h> | ||
| 85 | -#include <asm/localtimer.h> | ||
| 86 | -#include <asm/sched_clock.h> | ||
| 87 | -#include <plat/common.h> | ||
| 88 | -#include <plat/omap_hwmod.h> | ||
| 89 | - | ||
| 90 | -/* Parent clocks, eventually these will come from the clock framework */ | ||
| 91 | - | ||
| 92 | -#define OMAP2_MPU_SOURCE "sys_ck" | ||
| 93 | -#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE | ||
| 94 | -#define OMAP4_MPU_SOURCE "sys_clkin_ck" | ||
| 95 | -#define OMAP2_32K_SOURCE "func_32k_ck" | ||
| 96 | -#define OMAP3_32K_SOURCE "omap_32k_fck" | ||
| 97 | -#define OMAP4_32K_SOURCE "sys_32k_ck" | ||
| 98 | - | ||
| 99 | -#ifdef CONFIG_OMAP_32K_TIMER | ||
| 100 | -#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE | ||
| 101 | -#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE | ||
| 102 | -#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE | ||
| 103 | -#define OMAP3_SECURE_TIMER 12 | ||
| 104 | -#else | ||
| 105 | -#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE | ||
| 106 | -#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE | ||
| 107 | -#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE | ||
| 108 | -#define OMAP3_SECURE_TIMER 1 | ||
| 109 | -#endif | ||
| 110 | - | ||
| 111 | -/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ | ||
| 112 | -#define MAX_GPTIMER_ID 12 | ||
| 113 | - | ||
| 114 | -u32 sys_timer_reserved; | ||
| 115 | - | ||
| 116 | -/* Clockevent code */ | ||
| 117 | - | ||
| 118 | -static struct omap_dm_timer clkev; | ||
| 119 | -static struct clock_event_device clockevent_gpt; | ||
| 120 | - | ||
| 121 | -static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) | ||
| 122 | -{ | ||
| 123 | - struct clock_event_device *evt = &clockevent_gpt; | ||
| 124 | - | ||
| 125 | - __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); | ||
| 126 | - | ||
| 127 | - evt->event_handler(evt); | ||
| 128 | - return IRQ_HANDLED; | ||
| 129 | -} | ||
| 130 | - | ||
| 131 | -static struct irqaction omap2_gp_timer_irq = { | ||
| 132 | - .name = "gp timer", | ||
| 133 | - .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | ||
| 134 | - .handler = omap2_gp_timer_interrupt, | ||
| 135 | -}; | ||
| 136 | - | ||
| 137 | -static int omap2_gp_timer_set_next_event(unsigned long cycles, | ||
| 138 | - struct clock_event_device *evt) | ||
| 139 | -{ | ||
| 140 | - __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, | ||
| 141 | - 0xffffffff - cycles, 1); | ||
| 142 | - | ||
| 143 | - return 0; | ||
| 144 | -} | ||
| 145 | - | ||
| 146 | -static void omap2_gp_timer_set_mode(enum clock_event_mode mode, | ||
| 147 | - struct clock_event_device *evt) | ||
| 148 | -{ | ||
| 149 | - u32 period; | ||
| 150 | - | ||
| 151 | - __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); | ||
| 152 | - | ||
| 153 | - switch (mode) { | ||
| 154 | - case CLOCK_EVT_MODE_PERIODIC: | ||
| 155 | - period = clkev.rate / HZ; | ||
| 156 | - period -= 1; | ||
| 157 | - /* Looks like we need to first set the load value separately */ | ||
| 158 | - __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG, | ||
| 159 | - 0xffffffff - period, 1); | ||
| 160 | - __omap_dm_timer_load_start(clkev.io_base, | ||
| 161 | - OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, | ||
| 162 | - 0xffffffff - period, 1); | ||
| 163 | - break; | ||
| 164 | - case CLOCK_EVT_MODE_ONESHOT: | ||
| 165 | - break; | ||
| 166 | - case CLOCK_EVT_MODE_UNUSED: | ||
| 167 | - case CLOCK_EVT_MODE_SHUTDOWN: | ||
| 168 | - case CLOCK_EVT_MODE_RESUME: | ||
| 169 | - break; | ||
| 170 | - } | ||
| 171 | -} | ||
| 172 | - | ||
| 173 | -static struct clock_event_device clockevent_gpt = { | ||
| 174 | - .name = "gp timer", | ||
| 175 | - .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | ||
| 176 | - .shift = 32, | ||
| 177 | - .set_next_event = omap2_gp_timer_set_next_event, | ||
| 178 | - .set_mode = omap2_gp_timer_set_mode, | ||
| 179 | -}; | ||
| 180 | - | ||
| 181 | -static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, | ||
| 182 | - int gptimer_id, | ||
| 183 | - const char *fck_source) | ||
| 184 | -{ | ||
| 185 | - char name[10]; /* 10 = sizeof("gptXX_Xck0") */ | ||
| 186 | - struct omap_hwmod *oh; | ||
| 187 | - size_t size; | ||
| 188 | - int res = 0; | ||
| 189 | - | ||
| 190 | - sprintf(name, "timer%d", gptimer_id); | ||
| 191 | - omap_hwmod_setup_one(name); | ||
| 192 | - oh = omap_hwmod_lookup(name); | ||
| 193 | - if (!oh) | ||
| 194 | - return -ENODEV; | ||
| 195 | - | ||
| 196 | - timer->irq = oh->mpu_irqs[0].irq; | ||
| 197 | - timer->phys_base = oh->slaves[0]->addr->pa_start; | ||
| 198 | - size = oh->slaves[0]->addr->pa_end - timer->phys_base; | ||
| 199 | - | ||
| 200 | - /* Static mapping, never released */ | ||
| 201 | - timer->io_base = ioremap(timer->phys_base, size); | ||
| 202 | - if (!timer->io_base) | ||
| 203 | - return -ENXIO; | ||
| 204 | - | ||
| 205 | - /* After the dmtimer is using hwmod these clocks won't be needed */ | ||
| 206 | - sprintf(name, "gpt%d_fck", gptimer_id); | ||
| 207 | - timer->fclk = clk_get(NULL, name); | ||
| 208 | - if (IS_ERR(timer->fclk)) | ||
| 209 | - return -ENODEV; | ||
| 210 | - | ||
| 211 | - sprintf(name, "gpt%d_ick", gptimer_id); | ||
| 212 | - timer->iclk = clk_get(NULL, name); | ||
| 213 | - if (IS_ERR(timer->iclk)) { | ||
| 214 | - clk_put(timer->fclk); | ||
| 215 | - return -ENODEV; | ||
| 216 | - } | ||
| 217 | - | ||
| 218 | - omap_hwmod_enable(oh); | ||
| 219 | - | ||
| 220 | - sys_timer_reserved |= (1 << (gptimer_id - 1)); | ||
| 221 | - | ||
| 222 | - if (gptimer_id != 12) { | ||
| 223 | - struct clk *src; | ||
| 224 | - | ||
| 225 | - src = clk_get(NULL, fck_source); | ||
| 226 | - if (IS_ERR(src)) { | ||
| 227 | - res = -EINVAL; | ||
| 228 | - } else { | ||
| 229 | - res = __omap_dm_timer_set_source(timer->fclk, src); | ||
| 230 | - if (IS_ERR_VALUE(res)) | ||
| 231 | - pr_warning("%s: timer%i cannot set source\n", | ||
| 232 | - __func__, gptimer_id); | ||
| 233 | - clk_put(src); | ||
| 234 | - } | ||
| 235 | - } | ||
| 236 | - __omap_dm_timer_reset(timer->io_base, 1, 1); | ||
| 237 | - timer->posted = 1; | ||
| 238 | - | ||
| 239 | - timer->rate = clk_get_rate(timer->fclk); | ||
| 240 | - | ||
| 241 | - timer->reserved = 1; | ||
| 242 | - | ||
| 243 | - return res; | ||
| 244 | -} | ||
| 245 | - | ||
| 246 | -static void __init omap2_gp_clockevent_init(int gptimer_id, | ||
| 247 | - const char *fck_source) | ||
| 248 | -{ | ||
| 249 | - int res; | ||
| 250 | - | ||
| 251 | - res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); | ||
| 252 | - BUG_ON(res); | ||
| 253 | - | ||
| 254 | - omap2_gp_timer_irq.dev_id = (void *)&clkev; | ||
| 255 | - setup_irq(clkev.irq, &omap2_gp_timer_irq); | ||
| 256 | - | ||
| 257 | - __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); | ||
| 258 | - | ||
| 259 | - clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, | ||
| 260 | - clockevent_gpt.shift); | ||
| 261 | - clockevent_gpt.max_delta_ns = | ||
| 262 | - clockevent_delta2ns(0xffffffff, &clockevent_gpt); | ||
| 263 | - clockevent_gpt.min_delta_ns = | ||
| 264 | - clockevent_delta2ns(3, &clockevent_gpt); | ||
| 265 | - /* Timer internal resynch latency. */ | ||
| 266 | - | ||
| 267 | - clockevent_gpt.cpumask = cpumask_of(0); | ||
| 268 | - clockevents_register_device(&clockevent_gpt); | ||
| 269 | - | ||
| 270 | - pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", | ||
| 271 | - gptimer_id, clkev.rate); | ||
| 272 | -} | ||
| 273 | - | ||
| 274 | -/* Clocksource code */ | ||
| 275 | - | ||
| 276 | -#ifdef CONFIG_OMAP_32K_TIMER | ||
| 277 | -/* | ||
| 278 | - * When 32k-timer is enabled, don't use GPTimer for clocksource | ||
| 279 | - * instead, just leave default clocksource which uses the 32k | ||
| 280 | - * sync counter. See clocksource setup in plat-omap/counter_32k.c | ||
| 281 | - */ | ||
| 282 | - | ||
| 283 | -static void __init omap2_gp_clocksource_init(int unused, const char *dummy) | ||
| 284 | -{ | ||
| 285 | - omap_init_clocksource_32k(); | ||
| 286 | -} | ||
| 287 | - | ||
| 288 | -#else | ||
| 289 | - | ||
| 290 | -static struct omap_dm_timer clksrc; | ||
| 291 | - | ||
| 292 | -/* | ||
| 293 | - * clocksource | ||
| 294 | - */ | ||
| 295 | -static DEFINE_CLOCK_DATA(cd); | ||
| 296 | -static cycle_t clocksource_read_cycles(struct clocksource *cs) | ||
| 297 | -{ | ||
| 298 | - return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); | ||
| 299 | -} | ||
| 300 | - | ||
| 301 | -static struct clocksource clocksource_gpt = { | ||
| 302 | - .name = "gp timer", | ||
| 303 | - .rating = 300, | ||
| 304 | - .read = clocksource_read_cycles, | ||
| 305 | - .mask = CLOCKSOURCE_MASK(32), | ||
| 306 | - .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
| 307 | -}; | ||
| 308 | - | ||
| 309 | -static void notrace dmtimer_update_sched_clock(void) | ||
| 310 | -{ | ||
| 311 | - u32 cyc; | ||
| 312 | - | ||
| 313 | - cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); | ||
| 314 | - | ||
| 315 | - update_sched_clock(&cd, cyc, (u32)~0); | ||
| 316 | -} | ||
| 317 | - | ||
| 318 | -unsigned long long notrace sched_clock(void) | ||
| 319 | -{ | ||
| 320 | - u32 cyc = 0; | ||
| 321 | - | ||
| 322 | - if (clksrc.reserved) | ||
| 323 | - cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); | ||
| 324 | - | ||
| 325 | - return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
| 326 | -} | ||
| 327 | - | ||
| 328 | -/* Setup free-running counter for clocksource */ | ||
| 329 | -static void __init omap2_gp_clocksource_init(int gptimer_id, | ||
| 330 | - const char *fck_source) | ||
| 331 | -{ | ||
| 332 | - int res; | ||
| 333 | - | ||
| 334 | - res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); | ||
| 335 | - BUG_ON(res); | ||
| 336 | - | ||
| 337 | - pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", | ||
| 338 | - gptimer_id, clksrc.rate); | ||
| 339 | - | ||
| 340 | - __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1); | ||
| 341 | - init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); | ||
| 342 | - | ||
| 343 | - if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) | ||
| 344 | - pr_err("Could not register clocksource %s\n", | ||
| 345 | - clocksource_gpt.name); | ||
| 346 | -} | ||
| 347 | -#endif | ||
| 348 | - | ||
| 349 | -#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \ | ||
| 350 | - clksrc_nr, clksrc_src) \ | ||
| 351 | -static void __init omap##name##_timer_init(void) \ | ||
| 352 | -{ \ | ||
| 353 | - omap2_gp_clockevent_init((clkev_nr), clkev_src); \ | ||
| 354 | - omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \ | ||
| 355 | -} | ||
| 356 | - | ||
| 357 | -#define OMAP_SYS_TIMER(name) \ | ||
| 358 | -struct sys_timer omap##name##_timer = { \ | ||
| 359 | - .init = omap##name##_timer_init, \ | ||
| 360 | -}; | ||
| 361 | - | ||
| 362 | -#ifdef CONFIG_ARCH_OMAP2 | ||
| 363 | -OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE) | ||
| 364 | -OMAP_SYS_TIMER(2) | ||
| 365 | -#endif | ||
| 366 | - | ||
| 367 | -#ifdef CONFIG_ARCH_OMAP3 | ||
| 368 | -OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE) | ||
| 369 | -OMAP_SYS_TIMER(3) | ||
| 370 | -OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE, | ||
| 371 | - 2, OMAP3_MPU_SOURCE) | ||
| 372 | -OMAP_SYS_TIMER(3_secure) | ||
| 373 | -#endif | ||
| 374 | - | ||
| 375 | -#ifdef CONFIG_ARCH_OMAP4 | ||
| 376 | -static void __init omap4_timer_init(void) | ||
| 377 | -{ | ||
| 378 | -#ifdef CONFIG_LOCAL_TIMERS | ||
| 379 | - twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); | ||
| 380 | - BUG_ON(!twd_base); | ||
| 381 | -#endif | ||
| 382 | - omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); | ||
| 383 | - omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE); | ||
| 384 | -} | ||
| 385 | -OMAP_SYS_TIMER(4) | ||
| 386 | -#endif | ||
| 387 | diff --git a/arch/arm/mach-omap2/timer.c b/arch/arm/mach-omap2/timer.c | ||
| 388 | new file mode 100644 | ||
| 389 | index 0000000..e964072 | ||
| 390 | --- /dev/null | ||
| 391 | +++ b/arch/arm/mach-omap2/timer.c | ||
| 392 | @@ -0,0 +1,342 @@ | ||
| 393 | +/* | ||
| 394 | + * linux/arch/arm/mach-omap2/timer.c | ||
| 395 | + * | ||
| 396 | + * OMAP2 GP timer support. | ||
| 397 | + * | ||
| 398 | + * Copyright (C) 2009 Nokia Corporation | ||
| 399 | + * | ||
| 400 | + * Update to use new clocksource/clockevent layers | ||
| 401 | + * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> | ||
| 402 | + * Copyright (C) 2007 MontaVista Software, Inc. | ||
| 403 | + * | ||
| 404 | + * Original driver: | ||
| 405 | + * Copyright (C) 2005 Nokia Corporation | ||
| 406 | + * Author: Paul Mundt <paul.mundt@nokia.com> | ||
| 407 | + * Juha Yrjölä <juha.yrjola@nokia.com> | ||
| 408 | + * OMAP Dual-mode timer framework support by Timo Teras | ||
| 409 | + * | ||
| 410 | + * Some parts based off of TI's 24xx code: | ||
| 411 | + * | ||
| 412 | + * Copyright (C) 2004-2009 Texas Instruments, Inc. | ||
| 413 | + * | ||
| 414 | + * Roughly modelled after the OMAP1 MPU timer code. | ||
| 415 | + * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 416 | + * | ||
| 417 | + * This file is subject to the terms and conditions of the GNU General Public | ||
| 418 | + * License. See the file "COPYING" in the main directory of this archive | ||
| 419 | + * for more details. | ||
| 420 | + */ | ||
| 421 | +#include <linux/init.h> | ||
| 422 | +#include <linux/time.h> | ||
| 423 | +#include <linux/interrupt.h> | ||
| 424 | +#include <linux/err.h> | ||
| 425 | +#include <linux/clk.h> | ||
| 426 | +#include <linux/delay.h> | ||
| 427 | +#include <linux/irq.h> | ||
| 428 | +#include <linux/clocksource.h> | ||
| 429 | +#include <linux/clockchips.h> | ||
| 430 | + | ||
| 431 | +#include <asm/mach/time.h> | ||
| 432 | +#include <plat/dmtimer.h> | ||
| 433 | +#include <asm/localtimer.h> | ||
| 434 | +#include <asm/sched_clock.h> | ||
| 435 | +#include <plat/common.h> | ||
| 436 | +#include <plat/omap_hwmod.h> | ||
| 437 | + | ||
| 438 | +/* Parent clocks, eventually these will come from the clock framework */ | ||
| 439 | + | ||
| 440 | +#define OMAP2_MPU_SOURCE "sys_ck" | ||
| 441 | +#define OMAP3_MPU_SOURCE OMAP2_MPU_SOURCE | ||
| 442 | +#define OMAP4_MPU_SOURCE "sys_clkin_ck" | ||
| 443 | +#define OMAP2_32K_SOURCE "func_32k_ck" | ||
| 444 | +#define OMAP3_32K_SOURCE "omap_32k_fck" | ||
| 445 | +#define OMAP4_32K_SOURCE "sys_32k_ck" | ||
| 446 | + | ||
| 447 | +#ifdef CONFIG_OMAP_32K_TIMER | ||
| 448 | +#define OMAP2_CLKEV_SOURCE OMAP2_32K_SOURCE | ||
| 449 | +#define OMAP3_CLKEV_SOURCE OMAP3_32K_SOURCE | ||
| 450 | +#define OMAP4_CLKEV_SOURCE OMAP4_32K_SOURCE | ||
| 451 | +#define OMAP3_SECURE_TIMER 12 | ||
| 452 | +#else | ||
| 453 | +#define OMAP2_CLKEV_SOURCE OMAP2_MPU_SOURCE | ||
| 454 | +#define OMAP3_CLKEV_SOURCE OMAP3_MPU_SOURCE | ||
| 455 | +#define OMAP4_CLKEV_SOURCE OMAP4_MPU_SOURCE | ||
| 456 | +#define OMAP3_SECURE_TIMER 1 | ||
| 457 | +#endif | ||
| 458 | + | ||
| 459 | +/* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ | ||
| 460 | +#define MAX_GPTIMER_ID 12 | ||
| 461 | + | ||
| 462 | +u32 sys_timer_reserved; | ||
| 463 | + | ||
| 464 | +/* Clockevent code */ | ||
| 465 | + | ||
| 466 | +static struct omap_dm_timer clkev; | ||
| 467 | +static struct clock_event_device clockevent_gpt; | ||
| 468 | + | ||
| 469 | +static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) | ||
| 470 | +{ | ||
| 471 | + struct clock_event_device *evt = &clockevent_gpt; | ||
| 472 | + | ||
| 473 | + __omap_dm_timer_write_status(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); | ||
| 474 | + | ||
| 475 | + evt->event_handler(evt); | ||
| 476 | + return IRQ_HANDLED; | ||
| 477 | +} | ||
| 478 | + | ||
| 479 | +static struct irqaction omap2_gp_timer_irq = { | ||
| 480 | + .name = "gp timer", | ||
| 481 | + .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, | ||
| 482 | + .handler = omap2_gp_timer_interrupt, | ||
| 483 | +}; | ||
| 484 | + | ||
| 485 | +static int omap2_gp_timer_set_next_event(unsigned long cycles, | ||
| 486 | + struct clock_event_device *evt) | ||
| 487 | +{ | ||
| 488 | + __omap_dm_timer_load_start(clkev.io_base, OMAP_TIMER_CTRL_ST, | ||
| 489 | + 0xffffffff - cycles, 1); | ||
| 490 | + | ||
| 491 | + return 0; | ||
| 492 | +} | ||
| 493 | + | ||
| 494 | +static void omap2_gp_timer_set_mode(enum clock_event_mode mode, | ||
| 495 | + struct clock_event_device *evt) | ||
| 496 | +{ | ||
| 497 | + u32 period; | ||
| 498 | + | ||
| 499 | + __omap_dm_timer_stop(clkev.io_base, 1, clkev.rate); | ||
| 500 | + | ||
| 501 | + switch (mode) { | ||
| 502 | + case CLOCK_EVT_MODE_PERIODIC: | ||
| 503 | + period = clkev.rate / HZ; | ||
| 504 | + period -= 1; | ||
| 505 | + /* Looks like we need to first set the load value separately */ | ||
| 506 | + __omap_dm_timer_write(clkev.io_base, OMAP_TIMER_LOAD_REG, | ||
| 507 | + 0xffffffff - period, 1); | ||
| 508 | + __omap_dm_timer_load_start(clkev.io_base, | ||
| 509 | + OMAP_TIMER_CTRL_AR | OMAP_TIMER_CTRL_ST, | ||
| 510 | + 0xffffffff - period, 1); | ||
| 511 | + break; | ||
| 512 | + case CLOCK_EVT_MODE_ONESHOT: | ||
| 513 | + break; | ||
| 514 | + case CLOCK_EVT_MODE_UNUSED: | ||
| 515 | + case CLOCK_EVT_MODE_SHUTDOWN: | ||
| 516 | + case CLOCK_EVT_MODE_RESUME: | ||
| 517 | + break; | ||
| 518 | + } | ||
| 519 | +} | ||
| 520 | + | ||
| 521 | +static struct clock_event_device clockevent_gpt = { | ||
| 522 | + .name = "gp timer", | ||
| 523 | + .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, | ||
| 524 | + .shift = 32, | ||
| 525 | + .set_next_event = omap2_gp_timer_set_next_event, | ||
| 526 | + .set_mode = omap2_gp_timer_set_mode, | ||
| 527 | +}; | ||
| 528 | + | ||
| 529 | +static int __init omap_dm_timer_init_one(struct omap_dm_timer *timer, | ||
| 530 | + int gptimer_id, | ||
| 531 | + const char *fck_source) | ||
| 532 | +{ | ||
| 533 | + char name[10]; /* 10 = sizeof("gptXX_Xck0") */ | ||
| 534 | + struct omap_hwmod *oh; | ||
| 535 | + size_t size; | ||
| 536 | + int res = 0; | ||
| 537 | + | ||
| 538 | + sprintf(name, "timer%d", gptimer_id); | ||
| 539 | + omap_hwmod_setup_one(name); | ||
| 540 | + oh = omap_hwmod_lookup(name); | ||
| 541 | + if (!oh) | ||
| 542 | + return -ENODEV; | ||
| 543 | + | ||
| 544 | + timer->irq = oh->mpu_irqs[0].irq; | ||
| 545 | + timer->phys_base = oh->slaves[0]->addr->pa_start; | ||
| 546 | + size = oh->slaves[0]->addr->pa_end - timer->phys_base; | ||
| 547 | + | ||
| 548 | + /* Static mapping, never released */ | ||
| 549 | + timer->io_base = ioremap(timer->phys_base, size); | ||
| 550 | + if (!timer->io_base) | ||
| 551 | + return -ENXIO; | ||
| 552 | + | ||
| 553 | + /* After the dmtimer is using hwmod these clocks won't be needed */ | ||
| 554 | + sprintf(name, "gpt%d_fck", gptimer_id); | ||
| 555 | + timer->fclk = clk_get(NULL, name); | ||
| 556 | + if (IS_ERR(timer->fclk)) | ||
| 557 | + return -ENODEV; | ||
| 558 | + | ||
| 559 | + sprintf(name, "gpt%d_ick", gptimer_id); | ||
| 560 | + timer->iclk = clk_get(NULL, name); | ||
| 561 | + if (IS_ERR(timer->iclk)) { | ||
| 562 | + clk_put(timer->fclk); | ||
| 563 | + return -ENODEV; | ||
| 564 | + } | ||
| 565 | + | ||
| 566 | + omap_hwmod_enable(oh); | ||
| 567 | + | ||
| 568 | + sys_timer_reserved |= (1 << (gptimer_id - 1)); | ||
| 569 | + | ||
| 570 | + if (gptimer_id != 12) { | ||
| 571 | + struct clk *src; | ||
| 572 | + | ||
| 573 | + src = clk_get(NULL, fck_source); | ||
| 574 | + if (IS_ERR(src)) { | ||
| 575 | + res = -EINVAL; | ||
| 576 | + } else { | ||
| 577 | + res = __omap_dm_timer_set_source(timer->fclk, src); | ||
| 578 | + if (IS_ERR_VALUE(res)) | ||
| 579 | + pr_warning("%s: timer%i cannot set source\n", | ||
| 580 | + __func__, gptimer_id); | ||
| 581 | + clk_put(src); | ||
| 582 | + } | ||
| 583 | + } | ||
| 584 | + __omap_dm_timer_reset(timer->io_base, 1, 1); | ||
| 585 | + timer->posted = 1; | ||
| 586 | + | ||
| 587 | + timer->rate = clk_get_rate(timer->fclk); | ||
| 588 | + | ||
| 589 | + timer->reserved = 1; | ||
| 590 | + | ||
| 591 | + return res; | ||
| 592 | +} | ||
| 593 | + | ||
| 594 | +static void __init omap2_gp_clockevent_init(int gptimer_id, | ||
| 595 | + const char *fck_source) | ||
| 596 | +{ | ||
| 597 | + int res; | ||
| 598 | + | ||
| 599 | + res = omap_dm_timer_init_one(&clkev, gptimer_id, fck_source); | ||
| 600 | + BUG_ON(res); | ||
| 601 | + | ||
| 602 | + omap2_gp_timer_irq.dev_id = (void *)&clkev; | ||
| 603 | + setup_irq(clkev.irq, &omap2_gp_timer_irq); | ||
| 604 | + | ||
| 605 | + __omap_dm_timer_int_enable(clkev.io_base, OMAP_TIMER_INT_OVERFLOW); | ||
| 606 | + | ||
| 607 | + clockevent_gpt.mult = div_sc(clkev.rate, NSEC_PER_SEC, | ||
| 608 | + clockevent_gpt.shift); | ||
| 609 | + clockevent_gpt.max_delta_ns = | ||
| 610 | + clockevent_delta2ns(0xffffffff, &clockevent_gpt); | ||
| 611 | + clockevent_gpt.min_delta_ns = | ||
| 612 | + clockevent_delta2ns(3, &clockevent_gpt); | ||
| 613 | + /* Timer internal resynch latency. */ | ||
| 614 | + | ||
| 615 | + clockevent_gpt.cpumask = cpumask_of(0); | ||
| 616 | + clockevents_register_device(&clockevent_gpt); | ||
| 617 | + | ||
| 618 | + pr_info("OMAP clockevent source: GPTIMER%d at %lu Hz\n", | ||
| 619 | + gptimer_id, clkev.rate); | ||
| 620 | +} | ||
| 621 | + | ||
| 622 | +/* Clocksource code */ | ||
| 623 | + | ||
| 624 | +#ifdef CONFIG_OMAP_32K_TIMER | ||
| 625 | +/* | ||
| 626 | + * When 32k-timer is enabled, don't use GPTimer for clocksource | ||
| 627 | + * instead, just leave default clocksource which uses the 32k | ||
| 628 | + * sync counter. See clocksource setup in plat-omap/counter_32k.c | ||
| 629 | + */ | ||
| 630 | + | ||
| 631 | +static void __init omap2_gp_clocksource_init(int unused, const char *dummy) | ||
| 632 | +{ | ||
| 633 | + omap_init_clocksource_32k(); | ||
| 634 | +} | ||
| 635 | + | ||
| 636 | +#else | ||
| 637 | + | ||
| 638 | +static struct omap_dm_timer clksrc; | ||
| 639 | + | ||
| 640 | +/* | ||
| 641 | + * clocksource | ||
| 642 | + */ | ||
| 643 | +static DEFINE_CLOCK_DATA(cd); | ||
| 644 | +static cycle_t clocksource_read_cycles(struct clocksource *cs) | ||
| 645 | +{ | ||
| 646 | + return (cycle_t)__omap_dm_timer_read_counter(clksrc.io_base, 1); | ||
| 647 | +} | ||
| 648 | + | ||
| 649 | +static struct clocksource clocksource_gpt = { | ||
| 650 | + .name = "gp timer", | ||
| 651 | + .rating = 300, | ||
| 652 | + .read = clocksource_read_cycles, | ||
| 653 | + .mask = CLOCKSOURCE_MASK(32), | ||
| 654 | + .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
| 655 | +}; | ||
| 656 | + | ||
| 657 | +static void notrace dmtimer_update_sched_clock(void) | ||
| 658 | +{ | ||
| 659 | + u32 cyc; | ||
| 660 | + | ||
| 661 | + cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); | ||
| 662 | + | ||
| 663 | + update_sched_clock(&cd, cyc, (u32)~0); | ||
| 664 | +} | ||
| 665 | + | ||
| 666 | +unsigned long long notrace sched_clock(void) | ||
| 667 | +{ | ||
| 668 | + u32 cyc = 0; | ||
| 669 | + | ||
| 670 | + if (clksrc.reserved) | ||
| 671 | + cyc = __omap_dm_timer_read_counter(clksrc.io_base, 1); | ||
| 672 | + | ||
| 673 | + return cyc_to_sched_clock(&cd, cyc, (u32)~0); | ||
| 674 | +} | ||
| 675 | + | ||
| 676 | +/* Setup free-running counter for clocksource */ | ||
| 677 | +static void __init omap2_gp_clocksource_init(int gptimer_id, | ||
| 678 | + const char *fck_source) | ||
| 679 | +{ | ||
| 680 | + int res; | ||
| 681 | + | ||
| 682 | + res = omap_dm_timer_init_one(&clksrc, gptimer_id, fck_source); | ||
| 683 | + BUG_ON(res); | ||
| 684 | + | ||
| 685 | + pr_info("OMAP clocksource: GPTIMER%d at %lu Hz\n", | ||
| 686 | + gptimer_id, clksrc.rate); | ||
| 687 | + | ||
| 688 | + __omap_dm_timer_load_start(clksrc.io_base, OMAP_TIMER_CTRL_ST, 0, 1); | ||
| 689 | + init_sched_clock(&cd, dmtimer_update_sched_clock, 32, clksrc.rate); | ||
| 690 | + | ||
| 691 | + if (clocksource_register_hz(&clocksource_gpt, clksrc.rate)) | ||
| 692 | + pr_err("Could not register clocksource %s\n", | ||
| 693 | + clocksource_gpt.name); | ||
| 694 | +} | ||
| 695 | +#endif | ||
| 696 | + | ||
| 697 | +#define OMAP_SYS_TIMER_INIT(name, clkev_nr, clkev_src, \ | ||
| 698 | + clksrc_nr, clksrc_src) \ | ||
| 699 | +static void __init omap##name##_timer_init(void) \ | ||
| 700 | +{ \ | ||
| 701 | + omap2_gp_clockevent_init((clkev_nr), clkev_src); \ | ||
| 702 | + omap2_gp_clocksource_init((clksrc_nr), clksrc_src); \ | ||
| 703 | +} | ||
| 704 | + | ||
| 705 | +#define OMAP_SYS_TIMER(name) \ | ||
| 706 | +struct sys_timer omap##name##_timer = { \ | ||
| 707 | + .init = omap##name##_timer_init, \ | ||
| 708 | +}; | ||
| 709 | + | ||
| 710 | +#ifdef CONFIG_ARCH_OMAP2 | ||
| 711 | +OMAP_SYS_TIMER_INIT(2, 1, OMAP2_CLKEV_SOURCE, 2, OMAP2_MPU_SOURCE) | ||
| 712 | +OMAP_SYS_TIMER(2) | ||
| 713 | +#endif | ||
| 714 | + | ||
| 715 | +#ifdef CONFIG_ARCH_OMAP3 | ||
| 716 | +OMAP_SYS_TIMER_INIT(3, 1, OMAP3_CLKEV_SOURCE, 2, OMAP3_MPU_SOURCE) | ||
| 717 | +OMAP_SYS_TIMER(3) | ||
| 718 | +OMAP_SYS_TIMER_INIT(3_secure, OMAP3_SECURE_TIMER, OMAP3_CLKEV_SOURCE, | ||
| 719 | + 2, OMAP3_MPU_SOURCE) | ||
| 720 | +OMAP_SYS_TIMER(3_secure) | ||
| 721 | +#endif | ||
| 722 | + | ||
| 723 | +#ifdef CONFIG_ARCH_OMAP4 | ||
| 724 | +static void __init omap4_timer_init(void) | ||
| 725 | +{ | ||
| 726 | +#ifdef CONFIG_LOCAL_TIMERS | ||
| 727 | + twd_base = ioremap(OMAP44XX_LOCAL_TWD_BASE, SZ_256); | ||
| 728 | + BUG_ON(!twd_base); | ||
| 729 | +#endif | ||
| 730 | + omap2_gp_clockevent_init(1, OMAP4_CLKEV_SOURCE); | ||
| 731 | + omap2_gp_clocksource_init(2, OMAP4_MPU_SOURCE); | ||
| 732 | +} | ||
| 733 | +OMAP_SYS_TIMER(4) | ||
| 734 | +#endif | ||
| 735 | -- | ||
| 736 | 1.7.2.5 | ||
| 737 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0017-omap-cleanup-NAND-platform-data.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0017-omap-cleanup-NAND-platform-data.patch deleted file mode 100644 index 792d76ad..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0017-omap-cleanup-NAND-platform-data.patch +++ /dev/null | |||
| @@ -1,165 +0,0 @@ | |||
| 1 | From a72eaf768c2f553f72e7afc0b1c52661b2913022 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Grazvydas Ignotas <notasas@gmail.com> | ||
| 3 | Date: Fri, 3 Jun 2011 19:56:33 +0000 | ||
| 4 | Subject: [PATCH 017/149] omap: cleanup NAND platform data | ||
| 5 | |||
| 6 | omap_nand_platform_data fields 'options', 'gpio_irq', 'nand_setup' and | ||
| 7 | 'dma_channel' are never referenced by the NAND driver, yet various | ||
| 8 | board files are initializing those fields. This is both incorrect and | ||
| 9 | confusing, so remove them. This allows to get rid of a global | ||
| 10 | variable in gpmc-nand.c. | ||
| 11 | |||
| 12 | This also corrects an issue where some boards are trying to pass NAND | ||
| 13 | 16bit flag through .options, but the driver is using .devsize instead | ||
| 14 | and ignoring .options. | ||
| 15 | |||
| 16 | Finally, .dev_ready is treated as a flag by the driver, so make it bool | ||
| 17 | instead of a function pointer. | ||
| 18 | |||
| 19 | Signed-off-by: Grazvydas Ignotas <notasas@gmail.com> | ||
| 20 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 21 | --- | ||
| 22 | arch/arm/mach-omap2/board-cm-t35.c | 2 -- | ||
| 23 | arch/arm/mach-omap2/board-cm-t3517.c | 1 - | ||
| 24 | arch/arm/mach-omap2/board-flash.c | 4 ---- | ||
| 25 | arch/arm/mach-omap2/common-board-devices.c | 6 ++---- | ||
| 26 | arch/arm/mach-omap2/gpmc-nand.c | 10 +++------- | ||
| 27 | arch/arm/plat-omap/include/plat/nand.h | 6 +----- | ||
| 28 | 6 files changed, 6 insertions(+), 23 deletions(-) | ||
| 29 | |||
| 30 | diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 31 | index 1a18d3b..d76dca7 100644 | ||
| 32 | --- a/arch/arm/mach-omap2/board-cm-t35.c | ||
| 33 | +++ b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 34 | @@ -162,9 +162,7 @@ static struct mtd_partition cm_t35_nand_partitions[] = { | ||
| 35 | static struct omap_nand_platform_data cm_t35_nand_data = { | ||
| 36 | .parts = cm_t35_nand_partitions, | ||
| 37 | .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions), | ||
| 38 | - .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | ||
| 39 | .cs = 0, | ||
| 40 | - | ||
| 41 | }; | ||
| 42 | |||
| 43 | static void __init cm_t35_init_nand(void) | ||
| 44 | diff --git a/arch/arm/mach-omap2/board-cm-t3517.c b/arch/arm/mach-omap2/board-cm-t3517.c | ||
| 45 | index aa67240..05c72f4 100644 | ||
| 46 | --- a/arch/arm/mach-omap2/board-cm-t3517.c | ||
| 47 | +++ b/arch/arm/mach-omap2/board-cm-t3517.c | ||
| 48 | @@ -236,7 +236,6 @@ static struct mtd_partition cm_t3517_nand_partitions[] = { | ||
| 49 | static struct omap_nand_platform_data cm_t3517_nand_data = { | ||
| 50 | .parts = cm_t3517_nand_partitions, | ||
| 51 | .nr_parts = ARRAY_SIZE(cm_t3517_nand_partitions), | ||
| 52 | - .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | ||
| 53 | .cs = 0, | ||
| 54 | }; | ||
| 55 | |||
| 56 | diff --git a/arch/arm/mach-omap2/board-flash.c b/arch/arm/mach-omap2/board-flash.c | ||
| 57 | index 729892f..aa1b0cb 100644 | ||
| 58 | --- a/arch/arm/mach-omap2/board-flash.c | ||
| 59 | +++ b/arch/arm/mach-omap2/board-flash.c | ||
| 60 | @@ -132,11 +132,7 @@ static struct gpmc_timings nand_timings = { | ||
| 61 | }; | ||
| 62 | |||
| 63 | static struct omap_nand_platform_data board_nand_data = { | ||
| 64 | - .nand_setup = NULL, | ||
| 65 | .gpmc_t = &nand_timings, | ||
| 66 | - .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | ||
| 67 | - .dev_ready = NULL, | ||
| 68 | - .devsize = 0, /* '0' for 8-bit, '1' for 16-bit device */ | ||
| 69 | }; | ||
| 70 | |||
| 71 | void | ||
| 72 | diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c | ||
| 73 | index 94ccf46..0043fa8 100644 | ||
| 74 | --- a/arch/arm/mach-omap2/common-board-devices.c | ||
| 75 | +++ b/arch/arm/mach-omap2/common-board-devices.c | ||
| 76 | @@ -115,9 +115,7 @@ void __init omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, | ||
| 77 | #endif | ||
| 78 | |||
| 79 | #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE) | ||
| 80 | -static struct omap_nand_platform_data nand_data = { | ||
| 81 | - .dma_channel = -1, /* disable DMA in OMAP NAND driver */ | ||
| 82 | -}; | ||
| 83 | +static struct omap_nand_platform_data nand_data; | ||
| 84 | |||
| 85 | void __init omap_nand_flash_init(int options, struct mtd_partition *parts, | ||
| 86 | int nr_parts) | ||
| 87 | @@ -148,7 +146,7 @@ void __init omap_nand_flash_init(int options, struct mtd_partition *parts, | ||
| 88 | nand_data.cs = nandcs; | ||
| 89 | nand_data.parts = parts; | ||
| 90 | nand_data.nr_parts = nr_parts; | ||
| 91 | - nand_data.options = options; | ||
| 92 | + nand_data.devsize = options; | ||
| 93 | |||
| 94 | printk(KERN_INFO "Registering NAND on CS%d\n", nandcs); | ||
| 95 | if (gpmc_nand_init(&nand_data) < 0) | ||
| 96 | diff --git a/arch/arm/mach-omap2/gpmc-nand.c b/arch/arm/mach-omap2/gpmc-nand.c | ||
| 97 | index c1791d0..8ad210b 100644 | ||
| 98 | --- a/arch/arm/mach-omap2/gpmc-nand.c | ||
| 99 | +++ b/arch/arm/mach-omap2/gpmc-nand.c | ||
| 100 | @@ -20,8 +20,6 @@ | ||
| 101 | #include <plat/board.h> | ||
| 102 | #include <plat/gpmc.h> | ||
| 103 | |||
| 104 | -static struct omap_nand_platform_data *gpmc_nand_data; | ||
| 105 | - | ||
| 106 | static struct resource gpmc_nand_resource = { | ||
| 107 | .flags = IORESOURCE_MEM, | ||
| 108 | }; | ||
| 109 | @@ -33,7 +31,7 @@ static struct platform_device gpmc_nand_device = { | ||
| 110 | .resource = &gpmc_nand_resource, | ||
| 111 | }; | ||
| 112 | |||
| 113 | -static int omap2_nand_gpmc_retime(void) | ||
| 114 | +static int omap2_nand_gpmc_retime(struct omap_nand_platform_data *gpmc_nand_data) | ||
| 115 | { | ||
| 116 | struct gpmc_timings t; | ||
| 117 | int err; | ||
| 118 | @@ -83,13 +81,11 @@ static int omap2_nand_gpmc_retime(void) | ||
| 119 | return 0; | ||
| 120 | } | ||
| 121 | |||
| 122 | -int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data) | ||
| 123 | +int __init gpmc_nand_init(struct omap_nand_platform_data *gpmc_nand_data) | ||
| 124 | { | ||
| 125 | int err = 0; | ||
| 126 | struct device *dev = &gpmc_nand_device.dev; | ||
| 127 | |||
| 128 | - gpmc_nand_data = _nand_data; | ||
| 129 | - gpmc_nand_data->nand_setup = omap2_nand_gpmc_retime; | ||
| 130 | gpmc_nand_device.dev.platform_data = gpmc_nand_data; | ||
| 131 | |||
| 132 | err = gpmc_cs_request(gpmc_nand_data->cs, NAND_IO_SIZE, | ||
| 133 | @@ -100,7 +96,7 @@ int __init gpmc_nand_init(struct omap_nand_platform_data *_nand_data) | ||
| 134 | } | ||
| 135 | |||
| 136 | /* Set timings in GPMC */ | ||
| 137 | - err = omap2_nand_gpmc_retime(); | ||
| 138 | + err = omap2_nand_gpmc_retime(gpmc_nand_data); | ||
| 139 | if (err < 0) { | ||
| 140 | dev_err(dev, "Unable to set gpmc timings: %d\n", err); | ||
| 141 | return err; | ||
| 142 | diff --git a/arch/arm/plat-omap/include/plat/nand.h b/arch/arm/plat-omap/include/plat/nand.h | ||
| 143 | index d86d1ec..67fc506 100644 | ||
| 144 | --- a/arch/arm/plat-omap/include/plat/nand.h | ||
| 145 | +++ b/arch/arm/plat-omap/include/plat/nand.h | ||
| 146 | @@ -19,15 +19,11 @@ enum nand_io { | ||
| 147 | }; | ||
| 148 | |||
| 149 | struct omap_nand_platform_data { | ||
| 150 | - unsigned int options; | ||
| 151 | int cs; | ||
| 152 | - int gpio_irq; | ||
| 153 | struct mtd_partition *parts; | ||
| 154 | struct gpmc_timings *gpmc_t; | ||
| 155 | int nr_parts; | ||
| 156 | - int (*nand_setup)(void); | ||
| 157 | - int (*dev_ready)(struct omap_nand_platform_data *); | ||
| 158 | - int dma_channel; | ||
| 159 | + bool dev_ready; | ||
| 160 | int gpmc_irq; | ||
| 161 | enum nand_io xfer_type; | ||
| 162 | unsigned long phys_base; | ||
| 163 | -- | ||
| 164 | 1.7.2.5 | ||
| 165 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0018-omap-board-omap3evm-Fix-compilation-error.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0018-omap-board-omap3evm-Fix-compilation-error.patch deleted file mode 100644 index aa9cc6ec..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0018-omap-board-omap3evm-Fix-compilation-error.patch +++ /dev/null | |||
| @@ -1,40 +0,0 @@ | |||
| 1 | From 3e0e5636effabe150374f2a212974f1e954be5b2 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 3 | Date: Tue, 28 Jun 2011 10:16:55 +0000 | ||
| 4 | Subject: [PATCH 018/149] omap: board-omap3evm: Fix compilation error | ||
| 5 | |||
| 6 | Fix compilation error introduced with 786b01a8c1db0c0decca55d660a2a3ebd7cfb26b | ||
| 7 | (cleanup regulator supply definitions in mach-omap2). | ||
| 8 | |||
| 9 | Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 10 | [tony@atomide.com: updated comments] | ||
| 11 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/board-omap3evm.c | 4 ++-- | ||
| 14 | 1 files changed, 2 insertions(+), 2 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 17 | index 6f957ed..57bce0f 100644 | ||
| 18 | --- a/arch/arm/mach-omap2/board-omap3evm.c | ||
| 19 | +++ b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 20 | @@ -510,7 +510,7 @@ static struct regulator_init_data omap3evm_vio = { | ||
| 21 | #define OMAP3EVM_WLAN_IRQ_GPIO (149) | ||
| 22 | |||
| 23 | static struct regulator_consumer_supply omap3evm_vmmc2_supply[] = { | ||
| 24 | - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"); | ||
| 25 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | ||
| 26 | }; | ||
| 27 | |||
| 28 | /* VMMC2 for driving the WL12xx module */ | ||
| 29 | @@ -518,7 +518,7 @@ static struct regulator_init_data omap3evm_vmmc2 = { | ||
| 30 | .constraints = { | ||
| 31 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
| 32 | }, | ||
| 33 | - .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply);, | ||
| 34 | + .num_consumer_supplies = ARRAY_SIZE(omap3evm_vmmc2_supply), | ||
| 35 | .consumer_supplies = omap3evm_vmmc2_supply, | ||
| 36 | }; | ||
| 37 | |||
| 38 | -- | ||
| 39 | 1.7.2.5 | ||
| 40 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0019-omap-mcbsp-Drop-SPI-mode-support.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0019-omap-mcbsp-Drop-SPI-mode-support.patch deleted file mode 100644 index b2334732..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0019-omap-mcbsp-Drop-SPI-mode-support.patch +++ /dev/null | |||
| @@ -1,311 +0,0 @@ | |||
| 1 | From 20f244f6b795ee54f053eee5a5e0f9313a13e403 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Jarkko Nikula <jhnikula@gmail.com> | ||
| 3 | Date: Tue, 14 Jun 2011 11:23:51 +0000 | ||
| 4 | Subject: [PATCH 019/149] omap: mcbsp: Drop SPI mode support | ||
| 5 | |||
| 6 | We haven't seen any use for the SPI API in McBSP driver over the years. More | ||
| 7 | over, Peter Ujfalusi <peter.ujfalusi@ti.com> noticed that SPI mode is not | ||
| 8 | even supported since OMAP2430 so it's very unlikely that we'll see any use | ||
| 9 | for it in the future either. | ||
| 10 | |||
| 11 | Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> | ||
| 12 | Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 13 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 14 | --- | ||
| 15 | arch/arm/plat-omap/include/plat/mcbsp.h | 37 ------ | ||
| 16 | arch/arm/plat-omap/mcbsp.c | 214 ------------------------------- | ||
| 17 | 2 files changed, 0 insertions(+), 251 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h | ||
| 20 | index f8f690a..3fc75a8 100644 | ||
| 21 | --- a/arch/arm/plat-omap/include/plat/mcbsp.h | ||
| 22 | +++ b/arch/arm/plat-omap/include/plat/mcbsp.h | ||
| 23 | @@ -353,38 +353,6 @@ typedef enum { | ||
| 24 | OMAP_MCBSP_WORD_32, | ||
| 25 | } omap_mcbsp_word_length; | ||
| 26 | |||
| 27 | -typedef enum { | ||
| 28 | - OMAP_MCBSP_CLK_RISING = 0, | ||
| 29 | - OMAP_MCBSP_CLK_FALLING, | ||
| 30 | -} omap_mcbsp_clk_polarity; | ||
| 31 | - | ||
| 32 | -typedef enum { | ||
| 33 | - OMAP_MCBSP_FS_ACTIVE_HIGH = 0, | ||
| 34 | - OMAP_MCBSP_FS_ACTIVE_LOW, | ||
| 35 | -} omap_mcbsp_fs_polarity; | ||
| 36 | - | ||
| 37 | -typedef enum { | ||
| 38 | - OMAP_MCBSP_CLK_STP_MODE_NO_DELAY = 0, | ||
| 39 | - OMAP_MCBSP_CLK_STP_MODE_DELAY, | ||
| 40 | -} omap_mcbsp_clk_stp_mode; | ||
| 41 | - | ||
| 42 | - | ||
| 43 | -/******* SPI specific mode **********/ | ||
| 44 | -typedef enum { | ||
| 45 | - OMAP_MCBSP_SPI_MASTER = 0, | ||
| 46 | - OMAP_MCBSP_SPI_SLAVE, | ||
| 47 | -} omap_mcbsp_spi_mode; | ||
| 48 | - | ||
| 49 | -struct omap_mcbsp_spi_cfg { | ||
| 50 | - omap_mcbsp_spi_mode spi_mode; | ||
| 51 | - omap_mcbsp_clk_polarity rx_clock_polarity; | ||
| 52 | - omap_mcbsp_clk_polarity tx_clock_polarity; | ||
| 53 | - omap_mcbsp_fs_polarity fsx_polarity; | ||
| 54 | - u8 clk_div; | ||
| 55 | - omap_mcbsp_clk_stp_mode clk_stp_mode; | ||
| 56 | - omap_mcbsp_word_length word_length; | ||
| 57 | -}; | ||
| 58 | - | ||
| 59 | /* Platform specific configuration */ | ||
| 60 | struct omap_mcbsp_ops { | ||
| 61 | void (*request)(unsigned int); | ||
| 62 | @@ -504,14 +472,9 @@ u32 omap_mcbsp_recv_word(unsigned int id); | ||
| 63 | |||
| 64 | int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); | ||
| 65 | int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); | ||
| 66 | -int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word); | ||
| 67 | -int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 * word); | ||
| 68 | - | ||
| 69 | |||
| 70 | /* McBSP functional clock source changing function */ | ||
| 71 | extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id); | ||
| 72 | -/* SPI specific API */ | ||
| 73 | -void omap_mcbsp_set_spi_mode(unsigned int id, const struct omap_mcbsp_spi_cfg * spi_cfg); | ||
| 74 | |||
| 75 | /* Polled read/write functions */ | ||
| 76 | int omap_mcbsp_pollread(unsigned int id, u16 * buf); | ||
| 77 | diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c | ||
| 78 | index 5587acf..1de2724 100644 | ||
| 79 | --- a/arch/arm/plat-omap/mcbsp.c | ||
| 80 | +++ b/arch/arm/plat-omap/mcbsp.c | ||
| 81 | @@ -1175,147 +1175,6 @@ u32 omap_mcbsp_recv_word(unsigned int id) | ||
| 82 | } | ||
| 83 | EXPORT_SYMBOL(omap_mcbsp_recv_word); | ||
| 84 | |||
| 85 | -int omap_mcbsp_spi_master_xmit_word_poll(unsigned int id, u32 word) | ||
| 86 | -{ | ||
| 87 | - struct omap_mcbsp *mcbsp; | ||
| 88 | - omap_mcbsp_word_length tx_word_length; | ||
| 89 | - omap_mcbsp_word_length rx_word_length; | ||
| 90 | - u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; | ||
| 91 | - | ||
| 92 | - if (!omap_mcbsp_check_valid_id(id)) { | ||
| 93 | - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
| 94 | - return -ENODEV; | ||
| 95 | - } | ||
| 96 | - mcbsp = id_to_mcbsp_ptr(id); | ||
| 97 | - tx_word_length = mcbsp->tx_word_length; | ||
| 98 | - rx_word_length = mcbsp->rx_word_length; | ||
| 99 | - | ||
| 100 | - if (tx_word_length != rx_word_length) | ||
| 101 | - return -EINVAL; | ||
| 102 | - | ||
| 103 | - /* First we wait for the transmitter to be ready */ | ||
| 104 | - spcr2 = MCBSP_READ(mcbsp, SPCR2); | ||
| 105 | - while (!(spcr2 & XRDY)) { | ||
| 106 | - spcr2 = MCBSP_READ(mcbsp, SPCR2); | ||
| 107 | - if (attempts++ > 1000) { | ||
| 108 | - /* We must reset the transmitter */ | ||
| 109 | - MCBSP_WRITE(mcbsp, SPCR2, | ||
| 110 | - MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST)); | ||
| 111 | - udelay(10); | ||
| 112 | - MCBSP_WRITE(mcbsp, SPCR2, | ||
| 113 | - MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST); | ||
| 114 | - udelay(10); | ||
| 115 | - dev_err(mcbsp->dev, "McBSP%d transmitter not " | ||
| 116 | - "ready\n", mcbsp->id); | ||
| 117 | - return -EAGAIN; | ||
| 118 | - } | ||
| 119 | - } | ||
| 120 | - | ||
| 121 | - /* Now we can push the data */ | ||
| 122 | - if (tx_word_length > OMAP_MCBSP_WORD_16) | ||
| 123 | - MCBSP_WRITE(mcbsp, DXR2, word >> 16); | ||
| 124 | - MCBSP_WRITE(mcbsp, DXR1, word & 0xffff); | ||
| 125 | - | ||
| 126 | - /* We wait for the receiver to be ready */ | ||
| 127 | - spcr1 = MCBSP_READ(mcbsp, SPCR1); | ||
| 128 | - while (!(spcr1 & RRDY)) { | ||
| 129 | - spcr1 = MCBSP_READ(mcbsp, SPCR1); | ||
| 130 | - if (attempts++ > 1000) { | ||
| 131 | - /* We must reset the receiver */ | ||
| 132 | - MCBSP_WRITE(mcbsp, SPCR1, | ||
| 133 | - MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST)); | ||
| 134 | - udelay(10); | ||
| 135 | - MCBSP_WRITE(mcbsp, SPCR1, | ||
| 136 | - MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST); | ||
| 137 | - udelay(10); | ||
| 138 | - dev_err(mcbsp->dev, "McBSP%d receiver not " | ||
| 139 | - "ready\n", mcbsp->id); | ||
| 140 | - return -EAGAIN; | ||
| 141 | - } | ||
| 142 | - } | ||
| 143 | - | ||
| 144 | - /* Receiver is ready, let's read the dummy data */ | ||
| 145 | - if (rx_word_length > OMAP_MCBSP_WORD_16) | ||
| 146 | - word_msb = MCBSP_READ(mcbsp, DRR2); | ||
| 147 | - word_lsb = MCBSP_READ(mcbsp, DRR1); | ||
| 148 | - | ||
| 149 | - return 0; | ||
| 150 | -} | ||
| 151 | -EXPORT_SYMBOL(omap_mcbsp_spi_master_xmit_word_poll); | ||
| 152 | - | ||
| 153 | -int omap_mcbsp_spi_master_recv_word_poll(unsigned int id, u32 *word) | ||
| 154 | -{ | ||
| 155 | - struct omap_mcbsp *mcbsp; | ||
| 156 | - u32 clock_word = 0; | ||
| 157 | - omap_mcbsp_word_length tx_word_length; | ||
| 158 | - omap_mcbsp_word_length rx_word_length; | ||
| 159 | - u16 spcr2, spcr1, attempts = 0, word_lsb, word_msb = 0; | ||
| 160 | - | ||
| 161 | - if (!omap_mcbsp_check_valid_id(id)) { | ||
| 162 | - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
| 163 | - return -ENODEV; | ||
| 164 | - } | ||
| 165 | - | ||
| 166 | - mcbsp = id_to_mcbsp_ptr(id); | ||
| 167 | - | ||
| 168 | - tx_word_length = mcbsp->tx_word_length; | ||
| 169 | - rx_word_length = mcbsp->rx_word_length; | ||
| 170 | - | ||
| 171 | - if (tx_word_length != rx_word_length) | ||
| 172 | - return -EINVAL; | ||
| 173 | - | ||
| 174 | - /* First we wait for the transmitter to be ready */ | ||
| 175 | - spcr2 = MCBSP_READ(mcbsp, SPCR2); | ||
| 176 | - while (!(spcr2 & XRDY)) { | ||
| 177 | - spcr2 = MCBSP_READ(mcbsp, SPCR2); | ||
| 178 | - if (attempts++ > 1000) { | ||
| 179 | - /* We must reset the transmitter */ | ||
| 180 | - MCBSP_WRITE(mcbsp, SPCR2, | ||
| 181 | - MCBSP_READ_CACHE(mcbsp, SPCR2) & (~XRST)); | ||
| 182 | - udelay(10); | ||
| 183 | - MCBSP_WRITE(mcbsp, SPCR2, | ||
| 184 | - MCBSP_READ_CACHE(mcbsp, SPCR2) | XRST); | ||
| 185 | - udelay(10); | ||
| 186 | - dev_err(mcbsp->dev, "McBSP%d transmitter not " | ||
| 187 | - "ready\n", mcbsp->id); | ||
| 188 | - return -EAGAIN; | ||
| 189 | - } | ||
| 190 | - } | ||
| 191 | - | ||
| 192 | - /* We first need to enable the bus clock */ | ||
| 193 | - if (tx_word_length > OMAP_MCBSP_WORD_16) | ||
| 194 | - MCBSP_WRITE(mcbsp, DXR2, clock_word >> 16); | ||
| 195 | - MCBSP_WRITE(mcbsp, DXR1, clock_word & 0xffff); | ||
| 196 | - | ||
| 197 | - /* We wait for the receiver to be ready */ | ||
| 198 | - spcr1 = MCBSP_READ(mcbsp, SPCR1); | ||
| 199 | - while (!(spcr1 & RRDY)) { | ||
| 200 | - spcr1 = MCBSP_READ(mcbsp, SPCR1); | ||
| 201 | - if (attempts++ > 1000) { | ||
| 202 | - /* We must reset the receiver */ | ||
| 203 | - MCBSP_WRITE(mcbsp, SPCR1, | ||
| 204 | - MCBSP_READ_CACHE(mcbsp, SPCR1) & (~RRST)); | ||
| 205 | - udelay(10); | ||
| 206 | - MCBSP_WRITE(mcbsp, SPCR1, | ||
| 207 | - MCBSP_READ_CACHE(mcbsp, SPCR1) | RRST); | ||
| 208 | - udelay(10); | ||
| 209 | - dev_err(mcbsp->dev, "McBSP%d receiver not " | ||
| 210 | - "ready\n", mcbsp->id); | ||
| 211 | - return -EAGAIN; | ||
| 212 | - } | ||
| 213 | - } | ||
| 214 | - | ||
| 215 | - /* Receiver is ready, there is something for us */ | ||
| 216 | - if (rx_word_length > OMAP_MCBSP_WORD_16) | ||
| 217 | - word_msb = MCBSP_READ(mcbsp, DRR2); | ||
| 218 | - word_lsb = MCBSP_READ(mcbsp, DRR1); | ||
| 219 | - | ||
| 220 | - word[0] = (word_lsb | (word_msb << 16)); | ||
| 221 | - | ||
| 222 | - return 0; | ||
| 223 | -} | ||
| 224 | -EXPORT_SYMBOL(omap_mcbsp_spi_master_recv_word_poll); | ||
| 225 | - | ||
| 226 | /* | ||
| 227 | * Simple DMA based buffer rx/tx routines. | ||
| 228 | * Nothing fancy, just a single buffer tx/rx through DMA. | ||
| 229 | @@ -1449,79 +1308,6 @@ int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, | ||
| 230 | } | ||
| 231 | EXPORT_SYMBOL(omap_mcbsp_recv_buffer); | ||
| 232 | |||
| 233 | -/* | ||
| 234 | - * SPI wrapper. | ||
| 235 | - * Since SPI setup is much simpler than the generic McBSP one, | ||
| 236 | - * this wrapper just need an omap_mcbsp_spi_cfg structure as an input. | ||
| 237 | - * Once this is done, you can call omap_mcbsp_start(). | ||
| 238 | - */ | ||
| 239 | -void omap_mcbsp_set_spi_mode(unsigned int id, | ||
| 240 | - const struct omap_mcbsp_spi_cfg *spi_cfg) | ||
| 241 | -{ | ||
| 242 | - struct omap_mcbsp *mcbsp; | ||
| 243 | - struct omap_mcbsp_reg_cfg mcbsp_cfg; | ||
| 244 | - | ||
| 245 | - if (!omap_mcbsp_check_valid_id(id)) { | ||
| 246 | - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
| 247 | - return; | ||
| 248 | - } | ||
| 249 | - mcbsp = id_to_mcbsp_ptr(id); | ||
| 250 | - | ||
| 251 | - memset(&mcbsp_cfg, 0, sizeof(struct omap_mcbsp_reg_cfg)); | ||
| 252 | - | ||
| 253 | - /* SPI has only one frame */ | ||
| 254 | - mcbsp_cfg.rcr1 |= (RWDLEN1(spi_cfg->word_length) | RFRLEN1(0)); | ||
| 255 | - mcbsp_cfg.xcr1 |= (XWDLEN1(spi_cfg->word_length) | XFRLEN1(0)); | ||
| 256 | - | ||
| 257 | - /* Clock stop mode */ | ||
| 258 | - if (spi_cfg->clk_stp_mode == OMAP_MCBSP_CLK_STP_MODE_NO_DELAY) | ||
| 259 | - mcbsp_cfg.spcr1 |= (1 << 12); | ||
| 260 | - else | ||
| 261 | - mcbsp_cfg.spcr1 |= (3 << 11); | ||
| 262 | - | ||
| 263 | - /* Set clock parities */ | ||
| 264 | - if (spi_cfg->rx_clock_polarity == OMAP_MCBSP_CLK_RISING) | ||
| 265 | - mcbsp_cfg.pcr0 |= CLKRP; | ||
| 266 | - else | ||
| 267 | - mcbsp_cfg.pcr0 &= ~CLKRP; | ||
| 268 | - | ||
| 269 | - if (spi_cfg->tx_clock_polarity == OMAP_MCBSP_CLK_RISING) | ||
| 270 | - mcbsp_cfg.pcr0 &= ~CLKXP; | ||
| 271 | - else | ||
| 272 | - mcbsp_cfg.pcr0 |= CLKXP; | ||
| 273 | - | ||
| 274 | - /* Set SCLKME to 0 and CLKSM to 1 */ | ||
| 275 | - mcbsp_cfg.pcr0 &= ~SCLKME; | ||
| 276 | - mcbsp_cfg.srgr2 |= CLKSM; | ||
| 277 | - | ||
| 278 | - /* Set FSXP */ | ||
| 279 | - if (spi_cfg->fsx_polarity == OMAP_MCBSP_FS_ACTIVE_HIGH) | ||
| 280 | - mcbsp_cfg.pcr0 &= ~FSXP; | ||
| 281 | - else | ||
| 282 | - mcbsp_cfg.pcr0 |= FSXP; | ||
| 283 | - | ||
| 284 | - if (spi_cfg->spi_mode == OMAP_MCBSP_SPI_MASTER) { | ||
| 285 | - mcbsp_cfg.pcr0 |= CLKXM; | ||
| 286 | - mcbsp_cfg.srgr1 |= CLKGDV(spi_cfg->clk_div - 1); | ||
| 287 | - mcbsp_cfg.pcr0 |= FSXM; | ||
| 288 | - mcbsp_cfg.srgr2 &= ~FSGM; | ||
| 289 | - mcbsp_cfg.xcr2 |= XDATDLY(1); | ||
| 290 | - mcbsp_cfg.rcr2 |= RDATDLY(1); | ||
| 291 | - } else { | ||
| 292 | - mcbsp_cfg.pcr0 &= ~CLKXM; | ||
| 293 | - mcbsp_cfg.srgr1 |= CLKGDV(1); | ||
| 294 | - mcbsp_cfg.pcr0 &= ~FSXM; | ||
| 295 | - mcbsp_cfg.xcr2 &= ~XDATDLY(3); | ||
| 296 | - mcbsp_cfg.rcr2 &= ~RDATDLY(3); | ||
| 297 | - } | ||
| 298 | - | ||
| 299 | - mcbsp_cfg.xcr2 &= ~XPHASE; | ||
| 300 | - mcbsp_cfg.rcr2 &= ~RPHASE; | ||
| 301 | - | ||
| 302 | - omap_mcbsp_config(id, &mcbsp_cfg); | ||
| 303 | -} | ||
| 304 | -EXPORT_SYMBOL(omap_mcbsp_set_spi_mode); | ||
| 305 | - | ||
| 306 | #ifdef CONFIG_ARCH_OMAP3 | ||
| 307 | #define max_thres(m) (mcbsp->pdata->buffer_size) | ||
| 308 | #define valid_threshold(m, val) ((val) <= max_thres(m)) | ||
| 309 | -- | ||
| 310 | 1.7.2.5 | ||
| 311 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0020-omap-mcbsp-Drop-in-driver-transfer-support.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0020-omap-mcbsp-Drop-in-driver-transfer-support.patch deleted file mode 100644 index 510a22d0..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0020-omap-mcbsp-Drop-in-driver-transfer-support.patch +++ /dev/null | |||
| @@ -1,548 +0,0 @@ | |||
| 1 | From 8eea6f162c7a82d44c8e7c444cadfa43c4d586e5 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Jarkko Nikula <jhnikula@gmail.com> | ||
| 3 | Date: Tue, 14 Jun 2011 11:23:52 +0000 | ||
| 4 | Subject: [PATCH 020/149] omap: mcbsp: Drop in-driver transfer support | ||
| 5 | |||
| 6 | We haven't seen either use for in-driver transfer API in McBSP driver | ||
| 7 | over the years so it looks they can be removed too. | ||
| 8 | |||
| 9 | Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> | ||
| 10 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 11 | --- | ||
| 12 | arch/arm/plat-omap/include/plat/mcbsp.h | 25 -- | ||
| 13 | arch/arm/plat-omap/mcbsp.c | 382 ++----------------------------- | ||
| 14 | 2 files changed, 19 insertions(+), 388 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h | ||
| 17 | index 3fc75a8..6c53508 100644 | ||
| 18 | --- a/arch/arm/plat-omap/include/plat/mcbsp.h | ||
| 19 | +++ b/arch/arm/plat-omap/include/plat/mcbsp.h | ||
| 20 | @@ -24,7 +24,6 @@ | ||
| 21 | #ifndef __ASM_ARCH_OMAP_MCBSP_H | ||
| 22 | #define __ASM_ARCH_OMAP_MCBSP_H | ||
| 23 | |||
| 24 | -#include <linux/completion.h> | ||
| 25 | #include <linux/spinlock.h> | ||
| 26 | |||
| 27 | #include <mach/hardware.h> | ||
| 28 | @@ -340,10 +339,6 @@ typedef enum { | ||
| 29 | OMAP_MCBSP5 | ||
| 30 | } omap_mcbsp_id; | ||
| 31 | |||
| 32 | -typedef int __bitwise omap_mcbsp_io_type_t; | ||
| 33 | -#define OMAP_MCBSP_IRQ_IO ((__force omap_mcbsp_io_type_t) 1) | ||
| 34 | -#define OMAP_MCBSP_POLL_IO ((__force omap_mcbsp_io_type_t) 2) | ||
| 35 | - | ||
| 36 | typedef enum { | ||
| 37 | OMAP_MCBSP_WORD_8 = 0, | ||
| 38 | OMAP_MCBSP_WORD_12, | ||
| 39 | @@ -393,22 +388,12 @@ struct omap_mcbsp { | ||
| 40 | omap_mcbsp_word_length rx_word_length; | ||
| 41 | omap_mcbsp_word_length tx_word_length; | ||
| 42 | |||
| 43 | - omap_mcbsp_io_type_t io_type; /* IRQ or poll */ | ||
| 44 | - /* IRQ based TX/RX */ | ||
| 45 | int rx_irq; | ||
| 46 | int tx_irq; | ||
| 47 | |||
| 48 | /* DMA stuff */ | ||
| 49 | u8 dma_rx_sync; | ||
| 50 | - short dma_rx_lch; | ||
| 51 | u8 dma_tx_sync; | ||
| 52 | - short dma_tx_lch; | ||
| 53 | - | ||
| 54 | - /* Completion queues */ | ||
| 55 | - struct completion tx_irq_completion; | ||
| 56 | - struct completion rx_irq_completion; | ||
| 57 | - struct completion tx_dma_completion; | ||
| 58 | - struct completion rx_dma_completion; | ||
| 59 | |||
| 60 | /* Protect the field .free, while checking if the mcbsp is in use */ | ||
| 61 | spinlock_t lock; | ||
| 62 | @@ -467,20 +452,10 @@ int omap_mcbsp_request(unsigned int id); | ||
| 63 | void omap_mcbsp_free(unsigned int id); | ||
| 64 | void omap_mcbsp_start(unsigned int id, int tx, int rx); | ||
| 65 | void omap_mcbsp_stop(unsigned int id, int tx, int rx); | ||
| 66 | -void omap_mcbsp_xmit_word(unsigned int id, u32 word); | ||
| 67 | -u32 omap_mcbsp_recv_word(unsigned int id); | ||
| 68 | - | ||
| 69 | -int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); | ||
| 70 | -int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, unsigned int length); | ||
| 71 | |||
| 72 | /* McBSP functional clock source changing function */ | ||
| 73 | extern int omap2_mcbsp_set_clks_src(u8 id, u8 fck_src_id); | ||
| 74 | |||
| 75 | -/* Polled read/write functions */ | ||
| 76 | -int omap_mcbsp_pollread(unsigned int id, u16 * buf); | ||
| 77 | -int omap_mcbsp_pollwrite(unsigned int id, u16 buf); | ||
| 78 | -int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type); | ||
| 79 | - | ||
| 80 | /* McBSP signal muxing API */ | ||
| 81 | void omap2_mcbsp1_mux_clkr_src(u8 mux); | ||
| 82 | void omap2_mcbsp1_mux_fsr_src(u8 mux); | ||
| 83 | diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c | ||
| 84 | index 1de2724..455eadc 100644 | ||
| 85 | --- a/arch/arm/plat-omap/mcbsp.c | ||
| 86 | +++ b/arch/arm/plat-omap/mcbsp.c | ||
| 87 | @@ -16,8 +16,6 @@ | ||
| 88 | #include <linux/init.h> | ||
| 89 | #include <linux/device.h> | ||
| 90 | #include <linux/platform_device.h> | ||
| 91 | -#include <linux/wait.h> | ||
| 92 | -#include <linux/completion.h> | ||
| 93 | #include <linux/interrupt.h> | ||
| 94 | #include <linux/err.h> | ||
| 95 | #include <linux/clk.h> | ||
| 96 | @@ -25,7 +23,6 @@ | ||
| 97 | #include <linux/io.h> | ||
| 98 | #include <linux/slab.h> | ||
| 99 | |||
| 100 | -#include <plat/dma.h> | ||
| 101 | #include <plat/mcbsp.h> | ||
| 102 | #include <plat/omap_device.h> | ||
| 103 | #include <linux/pm_runtime.h> | ||
| 104 | @@ -136,8 +133,6 @@ static irqreturn_t omap_mcbsp_tx_irq_handler(int irq, void *dev_id) | ||
| 105 | irqst_spcr2); | ||
| 106 | /* Writing zero to XSYNC_ERR clears the IRQ */ | ||
| 107 | MCBSP_WRITE(mcbsp_tx, SPCR2, MCBSP_READ_CACHE(mcbsp_tx, SPCR2)); | ||
| 108 | - } else { | ||
| 109 | - complete(&mcbsp_tx->tx_irq_completion); | ||
| 110 | } | ||
| 111 | |||
| 112 | return IRQ_HANDLED; | ||
| 113 | @@ -156,41 +151,11 @@ static irqreturn_t omap_mcbsp_rx_irq_handler(int irq, void *dev_id) | ||
| 114 | irqst_spcr1); | ||
| 115 | /* Writing zero to RSYNC_ERR clears the IRQ */ | ||
| 116 | MCBSP_WRITE(mcbsp_rx, SPCR1, MCBSP_READ_CACHE(mcbsp_rx, SPCR1)); | ||
| 117 | - } else { | ||
| 118 | - complete(&mcbsp_rx->rx_irq_completion); | ||
| 119 | } | ||
| 120 | |||
| 121 | return IRQ_HANDLED; | ||
| 122 | } | ||
| 123 | |||
| 124 | -static void omap_mcbsp_tx_dma_callback(int lch, u16 ch_status, void *data) | ||
| 125 | -{ | ||
| 126 | - struct omap_mcbsp *mcbsp_dma_tx = data; | ||
| 127 | - | ||
| 128 | - dev_dbg(mcbsp_dma_tx->dev, "TX DMA callback : 0x%x\n", | ||
| 129 | - MCBSP_READ(mcbsp_dma_tx, SPCR2)); | ||
| 130 | - | ||
| 131 | - /* We can free the channels */ | ||
| 132 | - omap_free_dma(mcbsp_dma_tx->dma_tx_lch); | ||
| 133 | - mcbsp_dma_tx->dma_tx_lch = -1; | ||
| 134 | - | ||
| 135 | - complete(&mcbsp_dma_tx->tx_dma_completion); | ||
| 136 | -} | ||
| 137 | - | ||
| 138 | -static void omap_mcbsp_rx_dma_callback(int lch, u16 ch_status, void *data) | ||
| 139 | -{ | ||
| 140 | - struct omap_mcbsp *mcbsp_dma_rx = data; | ||
| 141 | - | ||
| 142 | - dev_dbg(mcbsp_dma_rx->dev, "RX DMA callback : 0x%x\n", | ||
| 143 | - MCBSP_READ(mcbsp_dma_rx, SPCR2)); | ||
| 144 | - | ||
| 145 | - /* We can free the channels */ | ||
| 146 | - omap_free_dma(mcbsp_dma_rx->dma_rx_lch); | ||
| 147 | - mcbsp_dma_rx->dma_rx_lch = -1; | ||
| 148 | - | ||
| 149 | - complete(&mcbsp_dma_rx->rx_dma_completion); | ||
| 150 | -} | ||
| 151 | - | ||
| 152 | /* | ||
| 153 | * omap_mcbsp_config simply write a config to the | ||
| 154 | * appropriate McBSP. | ||
| 155 | @@ -758,37 +723,6 @@ static inline void omap_st_start(struct omap_mcbsp *mcbsp) {} | ||
| 156 | static inline void omap_st_stop(struct omap_mcbsp *mcbsp) {} | ||
| 157 | #endif | ||
| 158 | |||
| 159 | -/* | ||
| 160 | - * We can choose between IRQ based or polled IO. | ||
| 161 | - * This needs to be called before omap_mcbsp_request(). | ||
| 162 | - */ | ||
| 163 | -int omap_mcbsp_set_io_type(unsigned int id, omap_mcbsp_io_type_t io_type) | ||
| 164 | -{ | ||
| 165 | - struct omap_mcbsp *mcbsp; | ||
| 166 | - | ||
| 167 | - if (!omap_mcbsp_check_valid_id(id)) { | ||
| 168 | - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
| 169 | - return -ENODEV; | ||
| 170 | - } | ||
| 171 | - mcbsp = id_to_mcbsp_ptr(id); | ||
| 172 | - | ||
| 173 | - spin_lock(&mcbsp->lock); | ||
| 174 | - | ||
| 175 | - if (!mcbsp->free) { | ||
| 176 | - dev_err(mcbsp->dev, "McBSP%d is currently in use\n", | ||
| 177 | - mcbsp->id); | ||
| 178 | - spin_unlock(&mcbsp->lock); | ||
| 179 | - return -EINVAL; | ||
| 180 | - } | ||
| 181 | - | ||
| 182 | - mcbsp->io_type = io_type; | ||
| 183 | - | ||
| 184 | - spin_unlock(&mcbsp->lock); | ||
| 185 | - | ||
| 186 | - return 0; | ||
| 187 | -} | ||
| 188 | -EXPORT_SYMBOL(omap_mcbsp_set_io_type); | ||
| 189 | - | ||
| 190 | int omap_mcbsp_request(unsigned int id) | ||
| 191 | { | ||
| 192 | struct omap_mcbsp *mcbsp; | ||
| 193 | @@ -833,29 +767,24 @@ int omap_mcbsp_request(unsigned int id) | ||
| 194 | MCBSP_WRITE(mcbsp, SPCR1, 0); | ||
| 195 | MCBSP_WRITE(mcbsp, SPCR2, 0); | ||
| 196 | |||
| 197 | - if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) { | ||
| 198 | - /* We need to get IRQs here */ | ||
| 199 | - init_completion(&mcbsp->tx_irq_completion); | ||
| 200 | - err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, | ||
| 201 | - 0, "McBSP", (void *)mcbsp); | ||
| 202 | + err = request_irq(mcbsp->tx_irq, omap_mcbsp_tx_irq_handler, | ||
| 203 | + 0, "McBSP", (void *)mcbsp); | ||
| 204 | + if (err != 0) { | ||
| 205 | + dev_err(mcbsp->dev, "Unable to request TX IRQ %d " | ||
| 206 | + "for McBSP%d\n", mcbsp->tx_irq, | ||
| 207 | + mcbsp->id); | ||
| 208 | + goto err_clk_disable; | ||
| 209 | + } | ||
| 210 | + | ||
| 211 | + if (mcbsp->rx_irq) { | ||
| 212 | + err = request_irq(mcbsp->rx_irq, | ||
| 213 | + omap_mcbsp_rx_irq_handler, | ||
| 214 | + 0, "McBSP", (void *)mcbsp); | ||
| 215 | if (err != 0) { | ||
| 216 | - dev_err(mcbsp->dev, "Unable to request TX IRQ %d " | ||
| 217 | - "for McBSP%d\n", mcbsp->tx_irq, | ||
| 218 | + dev_err(mcbsp->dev, "Unable to request RX IRQ %d " | ||
| 219 | + "for McBSP%d\n", mcbsp->rx_irq, | ||
| 220 | mcbsp->id); | ||
| 221 | - goto err_clk_disable; | ||
| 222 | - } | ||
| 223 | - | ||
| 224 | - if (mcbsp->rx_irq) { | ||
| 225 | - init_completion(&mcbsp->rx_irq_completion); | ||
| 226 | - err = request_irq(mcbsp->rx_irq, | ||
| 227 | - omap_mcbsp_rx_irq_handler, | ||
| 228 | - 0, "McBSP", (void *)mcbsp); | ||
| 229 | - if (err != 0) { | ||
| 230 | - dev_err(mcbsp->dev, "Unable to request RX IRQ %d " | ||
| 231 | - "for McBSP%d\n", mcbsp->rx_irq, | ||
| 232 | - mcbsp->id); | ||
| 233 | - goto err_free_irq; | ||
| 234 | - } | ||
| 235 | + goto err_free_irq; | ||
| 236 | } | ||
| 237 | } | ||
| 238 | |||
| 239 | @@ -901,12 +830,9 @@ void omap_mcbsp_free(unsigned int id) | ||
| 240 | |||
| 241 | pm_runtime_put_sync(mcbsp->dev); | ||
| 242 | |||
| 243 | - if (mcbsp->io_type == OMAP_MCBSP_IRQ_IO) { | ||
| 244 | - /* Free IRQs */ | ||
| 245 | - if (mcbsp->rx_irq) | ||
| 246 | - free_irq(mcbsp->rx_irq, (void *)mcbsp); | ||
| 247 | - free_irq(mcbsp->tx_irq, (void *)mcbsp); | ||
| 248 | - } | ||
| 249 | + if (mcbsp->rx_irq) | ||
| 250 | + free_irq(mcbsp->rx_irq, (void *)mcbsp); | ||
| 251 | + free_irq(mcbsp->tx_irq, (void *)mcbsp); | ||
| 252 | |||
| 253 | reg_cache = mcbsp->reg_cache; | ||
| 254 | |||
| 255 | @@ -1043,271 +969,6 @@ void omap_mcbsp_stop(unsigned int id, int tx, int rx) | ||
| 256 | } | ||
| 257 | EXPORT_SYMBOL(omap_mcbsp_stop); | ||
| 258 | |||
| 259 | -/* polled mcbsp i/o operations */ | ||
| 260 | -int omap_mcbsp_pollwrite(unsigned int id, u16 buf) | ||
| 261 | -{ | ||
| 262 | - struct omap_mcbsp *mcbsp; | ||
| 263 | - | ||
| 264 | - if (!omap_mcbsp_check_valid_id(id)) { | ||
| 265 | - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
| 266 | - return -ENODEV; | ||
| 267 | - } | ||
| 268 | - | ||
| 269 | - mcbsp = id_to_mcbsp_ptr(id); | ||
| 270 | - | ||
| 271 | - MCBSP_WRITE(mcbsp, DXR1, buf); | ||
| 272 | - /* if frame sync error - clear the error */ | ||
| 273 | - if (MCBSP_READ(mcbsp, SPCR2) & XSYNC_ERR) { | ||
| 274 | - /* clear error */ | ||
| 275 | - MCBSP_WRITE(mcbsp, SPCR2, MCBSP_READ_CACHE(mcbsp, SPCR2)); | ||
| 276 | - /* resend */ | ||
| 277 | - return -1; | ||
| 278 | - } else { | ||
| 279 | - /* wait for transmit confirmation */ | ||
| 280 | - int attemps = 0; | ||
| 281 | - while (!(MCBSP_READ(mcbsp, SPCR2) & XRDY)) { | ||
| 282 | - if (attemps++ > 1000) { | ||
| 283 | - MCBSP_WRITE(mcbsp, SPCR2, | ||
| 284 | - MCBSP_READ_CACHE(mcbsp, SPCR2) & | ||
| 285 | - (~XRST)); | ||
| 286 | - udelay(10); | ||
| 287 | - MCBSP_WRITE(mcbsp, SPCR2, | ||
| 288 | - MCBSP_READ_CACHE(mcbsp, SPCR2) | | ||
| 289 | - (XRST)); | ||
| 290 | - udelay(10); | ||
| 291 | - dev_err(mcbsp->dev, "Could not write to" | ||
| 292 | - " McBSP%d Register\n", mcbsp->id); | ||
| 293 | - return -2; | ||
| 294 | - } | ||
| 295 | - } | ||
| 296 | - } | ||
| 297 | - | ||
| 298 | - return 0; | ||
| 299 | -} | ||
| 300 | -EXPORT_SYMBOL(omap_mcbsp_pollwrite); | ||
| 301 | - | ||
| 302 | -int omap_mcbsp_pollread(unsigned int id, u16 *buf) | ||
| 303 | -{ | ||
| 304 | - struct omap_mcbsp *mcbsp; | ||
| 305 | - | ||
| 306 | - if (!omap_mcbsp_check_valid_id(id)) { | ||
| 307 | - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
| 308 | - return -ENODEV; | ||
| 309 | - } | ||
| 310 | - mcbsp = id_to_mcbsp_ptr(id); | ||
| 311 | - | ||
| 312 | - /* if frame sync error - clear the error */ | ||
| 313 | - if (MCBSP_READ(mcbsp, SPCR1) & RSYNC_ERR) { | ||
| 314 | - /* clear error */ | ||
| 315 | - MCBSP_WRITE(mcbsp, SPCR1, MCBSP_READ_CACHE(mcbsp, SPCR1)); | ||
| 316 | - /* resend */ | ||
| 317 | - return -1; | ||
| 318 | - } else { | ||
| 319 | - /* wait for receive confirmation */ | ||
| 320 | - int attemps = 0; | ||
| 321 | - while (!(MCBSP_READ(mcbsp, SPCR1) & RRDY)) { | ||
| 322 | - if (attemps++ > 1000) { | ||
| 323 | - MCBSP_WRITE(mcbsp, SPCR1, | ||
| 324 | - MCBSP_READ_CACHE(mcbsp, SPCR1) & | ||
| 325 | - (~RRST)); | ||
| 326 | - udelay(10); | ||
| 327 | - MCBSP_WRITE(mcbsp, SPCR1, | ||
| 328 | - MCBSP_READ_CACHE(mcbsp, SPCR1) | | ||
| 329 | - (RRST)); | ||
| 330 | - udelay(10); | ||
| 331 | - dev_err(mcbsp->dev, "Could not read from" | ||
| 332 | - " McBSP%d Register\n", mcbsp->id); | ||
| 333 | - return -2; | ||
| 334 | - } | ||
| 335 | - } | ||
| 336 | - } | ||
| 337 | - *buf = MCBSP_READ(mcbsp, DRR1); | ||
| 338 | - | ||
| 339 | - return 0; | ||
| 340 | -} | ||
| 341 | -EXPORT_SYMBOL(omap_mcbsp_pollread); | ||
| 342 | - | ||
| 343 | -/* | ||
| 344 | - * IRQ based word transmission. | ||
| 345 | - */ | ||
| 346 | -void omap_mcbsp_xmit_word(unsigned int id, u32 word) | ||
| 347 | -{ | ||
| 348 | - struct omap_mcbsp *mcbsp; | ||
| 349 | - omap_mcbsp_word_length word_length; | ||
| 350 | - | ||
| 351 | - if (!omap_mcbsp_check_valid_id(id)) { | ||
| 352 | - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
| 353 | - return; | ||
| 354 | - } | ||
| 355 | - | ||
| 356 | - mcbsp = id_to_mcbsp_ptr(id); | ||
| 357 | - word_length = mcbsp->tx_word_length; | ||
| 358 | - | ||
| 359 | - wait_for_completion(&mcbsp->tx_irq_completion); | ||
| 360 | - | ||
| 361 | - if (word_length > OMAP_MCBSP_WORD_16) | ||
| 362 | - MCBSP_WRITE(mcbsp, DXR2, word >> 16); | ||
| 363 | - MCBSP_WRITE(mcbsp, DXR1, word & 0xffff); | ||
| 364 | -} | ||
| 365 | -EXPORT_SYMBOL(omap_mcbsp_xmit_word); | ||
| 366 | - | ||
| 367 | -u32 omap_mcbsp_recv_word(unsigned int id) | ||
| 368 | -{ | ||
| 369 | - struct omap_mcbsp *mcbsp; | ||
| 370 | - u16 word_lsb, word_msb = 0; | ||
| 371 | - omap_mcbsp_word_length word_length; | ||
| 372 | - | ||
| 373 | - if (!omap_mcbsp_check_valid_id(id)) { | ||
| 374 | - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
| 375 | - return -ENODEV; | ||
| 376 | - } | ||
| 377 | - mcbsp = id_to_mcbsp_ptr(id); | ||
| 378 | - | ||
| 379 | - word_length = mcbsp->rx_word_length; | ||
| 380 | - | ||
| 381 | - wait_for_completion(&mcbsp->rx_irq_completion); | ||
| 382 | - | ||
| 383 | - if (word_length > OMAP_MCBSP_WORD_16) | ||
| 384 | - word_msb = MCBSP_READ(mcbsp, DRR2); | ||
| 385 | - word_lsb = MCBSP_READ(mcbsp, DRR1); | ||
| 386 | - | ||
| 387 | - return (word_lsb | (word_msb << 16)); | ||
| 388 | -} | ||
| 389 | -EXPORT_SYMBOL(omap_mcbsp_recv_word); | ||
| 390 | - | ||
| 391 | -/* | ||
| 392 | - * Simple DMA based buffer rx/tx routines. | ||
| 393 | - * Nothing fancy, just a single buffer tx/rx through DMA. | ||
| 394 | - * The DMA resources are released once the transfer is done. | ||
| 395 | - * For anything fancier, you should use your own customized DMA | ||
| 396 | - * routines and callbacks. | ||
| 397 | - */ | ||
| 398 | -int omap_mcbsp_xmit_buffer(unsigned int id, dma_addr_t buffer, | ||
| 399 | - unsigned int length) | ||
| 400 | -{ | ||
| 401 | - struct omap_mcbsp *mcbsp; | ||
| 402 | - int dma_tx_ch; | ||
| 403 | - int src_port = 0; | ||
| 404 | - int dest_port = 0; | ||
| 405 | - int sync_dev = 0; | ||
| 406 | - | ||
| 407 | - if (!omap_mcbsp_check_valid_id(id)) { | ||
| 408 | - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
| 409 | - return -ENODEV; | ||
| 410 | - } | ||
| 411 | - mcbsp = id_to_mcbsp_ptr(id); | ||
| 412 | - | ||
| 413 | - if (omap_request_dma(mcbsp->dma_tx_sync, "McBSP TX", | ||
| 414 | - omap_mcbsp_tx_dma_callback, | ||
| 415 | - mcbsp, | ||
| 416 | - &dma_tx_ch)) { | ||
| 417 | - dev_err(mcbsp->dev, " Unable to request DMA channel for " | ||
| 418 | - "McBSP%d TX. Trying IRQ based TX\n", | ||
| 419 | - mcbsp->id); | ||
| 420 | - return -EAGAIN; | ||
| 421 | - } | ||
| 422 | - mcbsp->dma_tx_lch = dma_tx_ch; | ||
| 423 | - | ||
| 424 | - dev_err(mcbsp->dev, "McBSP%d TX DMA on channel %d\n", mcbsp->id, | ||
| 425 | - dma_tx_ch); | ||
| 426 | - | ||
| 427 | - init_completion(&mcbsp->tx_dma_completion); | ||
| 428 | - | ||
| 429 | - if (cpu_class_is_omap1()) { | ||
| 430 | - src_port = OMAP_DMA_PORT_TIPB; | ||
| 431 | - dest_port = OMAP_DMA_PORT_EMIFF; | ||
| 432 | - } | ||
| 433 | - if (cpu_class_is_omap2()) | ||
| 434 | - sync_dev = mcbsp->dma_tx_sync; | ||
| 435 | - | ||
| 436 | - omap_set_dma_transfer_params(mcbsp->dma_tx_lch, | ||
| 437 | - OMAP_DMA_DATA_TYPE_S16, | ||
| 438 | - length >> 1, 1, | ||
| 439 | - OMAP_DMA_SYNC_ELEMENT, | ||
| 440 | - sync_dev, 0); | ||
| 441 | - | ||
| 442 | - omap_set_dma_dest_params(mcbsp->dma_tx_lch, | ||
| 443 | - src_port, | ||
| 444 | - OMAP_DMA_AMODE_CONSTANT, | ||
| 445 | - mcbsp->phys_base + OMAP_MCBSP_REG_DXR1, | ||
| 446 | - 0, 0); | ||
| 447 | - | ||
| 448 | - omap_set_dma_src_params(mcbsp->dma_tx_lch, | ||
| 449 | - dest_port, | ||
| 450 | - OMAP_DMA_AMODE_POST_INC, | ||
| 451 | - buffer, | ||
| 452 | - 0, 0); | ||
| 453 | - | ||
| 454 | - omap_start_dma(mcbsp->dma_tx_lch); | ||
| 455 | - wait_for_completion(&mcbsp->tx_dma_completion); | ||
| 456 | - | ||
| 457 | - return 0; | ||
| 458 | -} | ||
| 459 | -EXPORT_SYMBOL(omap_mcbsp_xmit_buffer); | ||
| 460 | - | ||
| 461 | -int omap_mcbsp_recv_buffer(unsigned int id, dma_addr_t buffer, | ||
| 462 | - unsigned int length) | ||
| 463 | -{ | ||
| 464 | - struct omap_mcbsp *mcbsp; | ||
| 465 | - int dma_rx_ch; | ||
| 466 | - int src_port = 0; | ||
| 467 | - int dest_port = 0; | ||
| 468 | - int sync_dev = 0; | ||
| 469 | - | ||
| 470 | - if (!omap_mcbsp_check_valid_id(id)) { | ||
| 471 | - printk(KERN_ERR "%s: Invalid id (%d)\n", __func__, id + 1); | ||
| 472 | - return -ENODEV; | ||
| 473 | - } | ||
| 474 | - mcbsp = id_to_mcbsp_ptr(id); | ||
| 475 | - | ||
| 476 | - if (omap_request_dma(mcbsp->dma_rx_sync, "McBSP RX", | ||
| 477 | - omap_mcbsp_rx_dma_callback, | ||
| 478 | - mcbsp, | ||
| 479 | - &dma_rx_ch)) { | ||
| 480 | - dev_err(mcbsp->dev, "Unable to request DMA channel for " | ||
| 481 | - "McBSP%d RX. Trying IRQ based RX\n", | ||
| 482 | - mcbsp->id); | ||
| 483 | - return -EAGAIN; | ||
| 484 | - } | ||
| 485 | - mcbsp->dma_rx_lch = dma_rx_ch; | ||
| 486 | - | ||
| 487 | - dev_err(mcbsp->dev, "McBSP%d RX DMA on channel %d\n", mcbsp->id, | ||
| 488 | - dma_rx_ch); | ||
| 489 | - | ||
| 490 | - init_completion(&mcbsp->rx_dma_completion); | ||
| 491 | - | ||
| 492 | - if (cpu_class_is_omap1()) { | ||
| 493 | - src_port = OMAP_DMA_PORT_TIPB; | ||
| 494 | - dest_port = OMAP_DMA_PORT_EMIFF; | ||
| 495 | - } | ||
| 496 | - if (cpu_class_is_omap2()) | ||
| 497 | - sync_dev = mcbsp->dma_rx_sync; | ||
| 498 | - | ||
| 499 | - omap_set_dma_transfer_params(mcbsp->dma_rx_lch, | ||
| 500 | - OMAP_DMA_DATA_TYPE_S16, | ||
| 501 | - length >> 1, 1, | ||
| 502 | - OMAP_DMA_SYNC_ELEMENT, | ||
| 503 | - sync_dev, 0); | ||
| 504 | - | ||
| 505 | - omap_set_dma_src_params(mcbsp->dma_rx_lch, | ||
| 506 | - src_port, | ||
| 507 | - OMAP_DMA_AMODE_CONSTANT, | ||
| 508 | - mcbsp->phys_base + OMAP_MCBSP_REG_DRR1, | ||
| 509 | - 0, 0); | ||
| 510 | - | ||
| 511 | - omap_set_dma_dest_params(mcbsp->dma_rx_lch, | ||
| 512 | - dest_port, | ||
| 513 | - OMAP_DMA_AMODE_POST_INC, | ||
| 514 | - buffer, | ||
| 515 | - 0, 0); | ||
| 516 | - | ||
| 517 | - omap_start_dma(mcbsp->dma_rx_lch); | ||
| 518 | - wait_for_completion(&mcbsp->rx_dma_completion); | ||
| 519 | - | ||
| 520 | - return 0; | ||
| 521 | -} | ||
| 522 | -EXPORT_SYMBOL(omap_mcbsp_recv_buffer); | ||
| 523 | - | ||
| 524 | #ifdef CONFIG_ARCH_OMAP3 | ||
| 525 | #define max_thres(m) (mcbsp->pdata->buffer_size) | ||
| 526 | #define valid_threshold(m, val) ((val) <= max_thres(m)) | ||
| 527 | @@ -1619,8 +1280,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) | ||
| 528 | spin_lock_init(&mcbsp->lock); | ||
| 529 | mcbsp->id = id + 1; | ||
| 530 | mcbsp->free = true; | ||
| 531 | - mcbsp->dma_tx_lch = -1; | ||
| 532 | - mcbsp->dma_rx_lch = -1; | ||
| 533 | |||
| 534 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mpu"); | ||
| 535 | if (!res) { | ||
| 536 | @@ -1646,9 +1305,6 @@ static int __devinit omap_mcbsp_probe(struct platform_device *pdev) | ||
| 537 | else | ||
| 538 | mcbsp->phys_dma_base = res->start; | ||
| 539 | |||
| 540 | - /* Default I/O is IRQ based */ | ||
| 541 | - mcbsp->io_type = OMAP_MCBSP_IRQ_IO; | ||
| 542 | - | ||
| 543 | mcbsp->tx_irq = platform_get_irq_byname(pdev, "tx"); | ||
| 544 | mcbsp->rx_irq = platform_get_irq_byname(pdev, "rx"); | ||
| 545 | |||
| 546 | -- | ||
| 547 | 1.7.2.5 | ||
| 548 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0021-omap2-fix-build-regression.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0021-omap2-fix-build-regression.patch deleted file mode 100644 index 0b638673..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0021-omap2-fix-build-regression.patch +++ /dev/null | |||
| @@ -1,29 +0,0 @@ | |||
| 1 | From 742b21718c968c17ac951b73b4ba79f4a489d35b Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Arnd Bergmann <arnd@arndb.de> | ||
| 3 | Date: Thu, 30 Jun 2011 12:58:01 +0000 | ||
| 4 | Subject: [PATCH 021/149] omap2+: fix build regression | ||
| 5 | |||
| 6 | board-generic.c now contains a reference to omap3_timer, but depends | ||
| 7 | only on ARCH_OMAP2, not on ARCH_OMAP3, which controls that symbol. | ||
| 8 | omap2_timer seems to be more appropriate anyway, so use that instead. | ||
| 9 | |||
| 10 | Signed-off-by: Arnd Bergmann <arnd@arndb.de> | ||
| 11 | Acked-by: Tony Lindgren <tony@atomide.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/board-generic.c | 2 +- | ||
| 14 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c | ||
| 17 | index c6ecf60..54db41a 100644 | ||
| 18 | --- a/arch/arm/mach-omap2/board-generic.c | ||
| 19 | +++ b/arch/arm/mach-omap2/board-generic.c | ||
| 20 | @@ -72,5 +72,5 @@ MACHINE_START(OMAP_GENERIC, "Generic OMAP24xx") | ||
| 21 | .init_early = omap_generic_init_early, | ||
| 22 | .init_irq = omap2_init_irq, | ||
| 23 | .init_machine = omap_generic_init, | ||
| 24 | - .timer = &omap3_timer, | ||
| 25 | + .timer = &omap2_timer, | ||
| 26 | MACHINE_END | ||
| 27 | -- | ||
| 28 | 1.7.2.5 | ||
| 29 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0022-OMAP-New-twl-common-for-common-TWL-configuration.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0022-OMAP-New-twl-common-for-common-TWL-configuration.patch deleted file mode 100644 index a0ccdd37..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0022-OMAP-New-twl-common-for-common-TWL-configuration.patch +++ /dev/null | |||
| @@ -1,200 +0,0 @@ | |||
| 1 | From 552daa4d00a2c1835e5114af852efc65175e1cc0 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 3 | Date: Sat, 4 Jun 2011 08:16:41 +0300 | ||
| 4 | Subject: [PATCH 022/149] OMAP: New twl-common for common TWL configuration | ||
| 5 | |||
| 6 | Introduce a new file, which will be used to configure | ||
| 7 | common pmic (TWL) devices, regulators, and TWL audio. | ||
| 8 | |||
| 9 | Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 10 | Acked-by: Tony Lindgren <tony@atomide.com> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/Makefile | 2 +- | ||
| 13 | arch/arm/mach-omap2/common-board-devices.c | 21 ------------- | ||
| 14 | arch/arm/mach-omap2/common-board-devices.h | 26 +-------------- | ||
| 15 | arch/arm/mach-omap2/twl-common.c | 46 ++++++++++++++++++++++++++++ | ||
| 16 | arch/arm/mach-omap2/twl-common.h | 28 +++++++++++++++++ | ||
| 17 | 5 files changed, 77 insertions(+), 46 deletions(-) | ||
| 18 | create mode 100644 arch/arm/mach-omap2/twl-common.c | ||
| 19 | create mode 100644 arch/arm/mach-omap2/twl-common.h | ||
| 20 | |||
| 21 | diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile | ||
| 22 | index adbe82d..ff1466f 100644 | ||
| 23 | --- a/arch/arm/mach-omap2/Makefile | ||
| 24 | +++ b/arch/arm/mach-omap2/Makefile | ||
| 25 | @@ -269,4 +269,4 @@ obj-$(CONFIG_ARCH_OMAP4) += hwspinlock.o | ||
| 26 | disp-$(CONFIG_OMAP2_DSS) := display.o | ||
| 27 | obj-y += $(disp-m) $(disp-y) | ||
| 28 | |||
| 29 | -obj-y += common-board-devices.o | ||
| 30 | +obj-y += common-board-devices.o twl-common.o | ||
| 31 | diff --git a/arch/arm/mach-omap2/common-board-devices.c b/arch/arm/mach-omap2/common-board-devices.c | ||
| 32 | index 0043fa8..bcb0c58 100644 | ||
| 33 | --- a/arch/arm/mach-omap2/common-board-devices.c | ||
| 34 | +++ b/arch/arm/mach-omap2/common-board-devices.c | ||
| 35 | @@ -20,36 +20,15 @@ | ||
| 36 | * | ||
| 37 | */ | ||
| 38 | |||
| 39 | -#include <linux/i2c.h> | ||
| 40 | -#include <linux/i2c/twl.h> | ||
| 41 | - | ||
| 42 | #include <linux/gpio.h> | ||
| 43 | #include <linux/spi/spi.h> | ||
| 44 | #include <linux/spi/ads7846.h> | ||
| 45 | |||
| 46 | -#include <plat/i2c.h> | ||
| 47 | #include <plat/mcspi.h> | ||
| 48 | #include <plat/nand.h> | ||
| 49 | |||
| 50 | #include "common-board-devices.h" | ||
| 51 | |||
| 52 | -static struct i2c_board_info __initdata pmic_i2c_board_info = { | ||
| 53 | - .addr = 0x48, | ||
| 54 | - .flags = I2C_CLIENT_WAKE, | ||
| 55 | -}; | ||
| 56 | - | ||
| 57 | -void __init omap_pmic_init(int bus, u32 clkrate, | ||
| 58 | - const char *pmic_type, int pmic_irq, | ||
| 59 | - struct twl4030_platform_data *pmic_data) | ||
| 60 | -{ | ||
| 61 | - strncpy(pmic_i2c_board_info.type, pmic_type, | ||
| 62 | - sizeof(pmic_i2c_board_info.type)); | ||
| 63 | - pmic_i2c_board_info.irq = pmic_irq; | ||
| 64 | - pmic_i2c_board_info.platform_data = pmic_data; | ||
| 65 | - | ||
| 66 | - omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); | ||
| 67 | -} | ||
| 68 | - | ||
| 69 | #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \ | ||
| 70 | defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE) | ||
| 71 | static struct omap2_mcspi_device_config ads7846_mcspi_config = { | ||
| 72 | diff --git a/arch/arm/mach-omap2/common-board-devices.h b/arch/arm/mach-omap2/common-board-devices.h | ||
| 73 | index 6797190..a0b4a428 100644 | ||
| 74 | --- a/arch/arm/mach-omap2/common-board-devices.h | ||
| 75 | +++ b/arch/arm/mach-omap2/common-board-devices.h | ||
| 76 | @@ -1,33 +1,11 @@ | ||
| 77 | #ifndef __OMAP_COMMON_BOARD_DEVICES__ | ||
| 78 | #define __OMAP_COMMON_BOARD_DEVICES__ | ||
| 79 | |||
| 80 | +#include "twl-common.h" | ||
| 81 | + | ||
| 82 | #define NAND_BLOCK_SIZE SZ_128K | ||
| 83 | |||
| 84 | -struct twl4030_platform_data; | ||
| 85 | struct mtd_partition; | ||
| 86 | - | ||
| 87 | -void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, | ||
| 88 | - struct twl4030_platform_data *pmic_data); | ||
| 89 | - | ||
| 90 | -static inline void omap2_pmic_init(const char *pmic_type, | ||
| 91 | - struct twl4030_platform_data *pmic_data) | ||
| 92 | -{ | ||
| 93 | - omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data); | ||
| 94 | -} | ||
| 95 | - | ||
| 96 | -static inline void omap3_pmic_init(const char *pmic_type, | ||
| 97 | - struct twl4030_platform_data *pmic_data) | ||
| 98 | -{ | ||
| 99 | - omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); | ||
| 100 | -} | ||
| 101 | - | ||
| 102 | -static inline void omap4_pmic_init(const char *pmic_type, | ||
| 103 | - struct twl4030_platform_data *pmic_data) | ||
| 104 | -{ | ||
| 105 | - /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */ | ||
| 106 | - omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); | ||
| 107 | -} | ||
| 108 | - | ||
| 109 | struct ads7846_platform_data; | ||
| 110 | |||
| 111 | void omap_ads7846_init(int bus_num, int gpio_pendown, int gpio_debounce, | ||
| 112 | diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c | ||
| 113 | new file mode 100644 | ||
| 114 | index 0000000..4f7b24c | ||
| 115 | --- /dev/null | ||
| 116 | +++ b/arch/arm/mach-omap2/twl-common.c | ||
| 117 | @@ -0,0 +1,46 @@ | ||
| 118 | +/* | ||
| 119 | + * twl-common.c | ||
| 120 | + * | ||
| 121 | + * Copyright (C) 2011 Texas Instruments, Inc.. | ||
| 122 | + * Author: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 123 | + * | ||
| 124 | + * This program is free software; you can redistribute it and/or | ||
| 125 | + * modify it under the terms of the GNU General Public License | ||
| 126 | + * version 2 as published by the Free Software Foundation. | ||
| 127 | + * | ||
| 128 | + * This program is distributed in the hope that it will be useful, but | ||
| 129 | + * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
| 130 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
| 131 | + * General Public License for more details. | ||
| 132 | + * | ||
| 133 | + * You should have received a copy of the GNU General Public License | ||
| 134 | + * along with this program; if not, write to the Free Software | ||
| 135 | + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
| 136 | + * 02110-1301 USA | ||
| 137 | + * | ||
| 138 | + */ | ||
| 139 | + | ||
| 140 | +#include <linux/i2c.h> | ||
| 141 | +#include <linux/i2c/twl.h> | ||
| 142 | +#include <linux/gpio.h> | ||
| 143 | + | ||
| 144 | +#include <plat/i2c.h> | ||
| 145 | + | ||
| 146 | +#include "twl-common.h" | ||
| 147 | + | ||
| 148 | +static struct i2c_board_info __initdata pmic_i2c_board_info = { | ||
| 149 | + .addr = 0x48, | ||
| 150 | + .flags = I2C_CLIENT_WAKE, | ||
| 151 | +}; | ||
| 152 | + | ||
| 153 | +void __init omap_pmic_init(int bus, u32 clkrate, | ||
| 154 | + const char *pmic_type, int pmic_irq, | ||
| 155 | + struct twl4030_platform_data *pmic_data) | ||
| 156 | +{ | ||
| 157 | + strncpy(pmic_i2c_board_info.type, pmic_type, | ||
| 158 | + sizeof(pmic_i2c_board_info.type)); | ||
| 159 | + pmic_i2c_board_info.irq = pmic_irq; | ||
| 160 | + pmic_i2c_board_info.platform_data = pmic_data; | ||
| 161 | + | ||
| 162 | + omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); | ||
| 163 | +} | ||
| 164 | diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h | ||
| 165 | new file mode 100644 | ||
| 166 | index 0000000..e9fe2ab | ||
| 167 | --- /dev/null | ||
| 168 | +++ b/arch/arm/mach-omap2/twl-common.h | ||
| 169 | @@ -0,0 +1,28 @@ | ||
| 170 | +#ifndef __OMAP_PMIC_COMMON__ | ||
| 171 | +#define __OMAP_PMIC_COMMON__ | ||
| 172 | + | ||
| 173 | +struct twl4030_platform_data; | ||
| 174 | + | ||
| 175 | +void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, | ||
| 176 | + struct twl4030_platform_data *pmic_data); | ||
| 177 | + | ||
| 178 | +static inline void omap2_pmic_init(const char *pmic_type, | ||
| 179 | + struct twl4030_platform_data *pmic_data) | ||
| 180 | +{ | ||
| 181 | + omap_pmic_init(2, 2600, pmic_type, INT_24XX_SYS_NIRQ, pmic_data); | ||
| 182 | +} | ||
| 183 | + | ||
| 184 | +static inline void omap3_pmic_init(const char *pmic_type, | ||
| 185 | + struct twl4030_platform_data *pmic_data) | ||
| 186 | +{ | ||
| 187 | + omap_pmic_init(1, 2600, pmic_type, INT_34XX_SYS_NIRQ, pmic_data); | ||
| 188 | +} | ||
| 189 | + | ||
| 190 | +static inline void omap4_pmic_init(const char *pmic_type, | ||
| 191 | + struct twl4030_platform_data *pmic_data) | ||
| 192 | +{ | ||
| 193 | + /* Phoenix Audio IC needs I2C1 to start with 400 KHz or less */ | ||
| 194 | + omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); | ||
| 195 | +} | ||
| 196 | + | ||
| 197 | +#endif /* __OMAP_PMIC_COMMON__ */ | ||
| 198 | -- | ||
| 199 | 1.7.2.5 | ||
| 200 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0023-OMAP4-Move-common-twl6030-configuration-to-twl-commo.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0023-OMAP4-Move-common-twl6030-configuration-to-twl-commo.patch deleted file mode 100644 index b04d1f8a..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0023-OMAP4-Move-common-twl6030-configuration-to-twl-commo.patch +++ /dev/null | |||
| @@ -1,601 +0,0 @@ | |||
| 1 | From db3a6400c5bc9c99a39fe9b34b7b3c59ae4be245 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 3 | Date: Tue, 7 Jun 2011 10:26:46 +0300 | ||
| 4 | Subject: [PATCH 023/149] OMAP4: Move common twl6030 configuration to twl-common | ||
| 5 | |||
| 6 | Reduce the amount of duplicated code by moving the common | ||
| 7 | configuration for TWL6030 (on OMAP4 platform) to the | ||
| 8 | twl-common file. | ||
| 9 | Use the omap4_pmic_get_config function from board files to | ||
| 10 | properly configure the PMIC with the common fields. | ||
| 11 | |||
| 12 | Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 13 | Acked-by: Tony Lindgren <tony@atomide.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/board-4430sdp.c | 141 ++------------------------- | ||
| 16 | arch/arm/mach-omap2/board-omap4panda.c | 146 +++-------------------------- | ||
| 17 | arch/arm/mach-omap2/twl-common.c | 163 ++++++++++++++++++++++++++++++++ | ||
| 18 | arch/arm/mach-omap2/twl-common.h | 20 ++++ | ||
| 19 | 4 files changed, 205 insertions(+), 265 deletions(-) | ||
| 20 | |||
| 21 | diff --git a/arch/arm/mach-omap2/board-4430sdp.c b/arch/arm/mach-omap2/board-4430sdp.c | ||
| 22 | index d7df07e..933b25b 100644 | ||
| 23 | --- a/arch/arm/mach-omap2/board-4430sdp.c | ||
| 24 | +++ b/arch/arm/mach-omap2/board-4430sdp.c | ||
| 25 | @@ -302,14 +302,6 @@ static struct omap_musb_board_data musb_board_data = { | ||
| 26 | .power = 100, | ||
| 27 | }; | ||
| 28 | |||
| 29 | -static struct twl4030_usb_data omap4_usbphy_data = { | ||
| 30 | - .phy_init = omap4430_phy_init, | ||
| 31 | - .phy_exit = omap4430_phy_exit, | ||
| 32 | - .phy_power = omap4430_phy_power, | ||
| 33 | - .phy_set_clock = omap4430_phy_set_clk, | ||
| 34 | - .phy_suspend = omap4430_phy_suspend, | ||
| 35 | -}; | ||
| 36 | - | ||
| 37 | static struct omap2_hsmmc_info mmc[] = { | ||
| 38 | { | ||
| 39 | .mmc = 2, | ||
| 40 | @@ -332,10 +324,6 @@ static struct regulator_consumer_supply sdp4430_vaux_supply[] = { | ||
| 41 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"), | ||
| 42 | }; | ||
| 43 | |||
| 44 | -static struct regulator_consumer_supply sdp4430_vmmc_supply[] = { | ||
| 45 | - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 46 | -}; | ||
| 47 | - | ||
| 48 | static int omap4_twl6030_hsmmc_late_init(struct device *dev) | ||
| 49 | { | ||
| 50 | int ret = 0; | ||
| 51 | @@ -394,61 +382,6 @@ static struct regulator_init_data sdp4430_vaux1 = { | ||
| 52 | .consumer_supplies = sdp4430_vaux_supply, | ||
| 53 | }; | ||
| 54 | |||
| 55 | -static struct regulator_init_data sdp4430_vaux2 = { | ||
| 56 | - .constraints = { | ||
| 57 | - .min_uV = 1200000, | ||
| 58 | - .max_uV = 2800000, | ||
| 59 | - .apply_uV = true, | ||
| 60 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 61 | - | REGULATOR_MODE_STANDBY, | ||
| 62 | - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 63 | - | REGULATOR_CHANGE_MODE | ||
| 64 | - | REGULATOR_CHANGE_STATUS, | ||
| 65 | - }, | ||
| 66 | -}; | ||
| 67 | - | ||
| 68 | -static struct regulator_init_data sdp4430_vaux3 = { | ||
| 69 | - .constraints = { | ||
| 70 | - .min_uV = 1000000, | ||
| 71 | - .max_uV = 3000000, | ||
| 72 | - .apply_uV = true, | ||
| 73 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 74 | - | REGULATOR_MODE_STANDBY, | ||
| 75 | - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 76 | - | REGULATOR_CHANGE_MODE | ||
| 77 | - | REGULATOR_CHANGE_STATUS, | ||
| 78 | - }, | ||
| 79 | -}; | ||
| 80 | - | ||
| 81 | -/* VMMC1 for MMC1 card */ | ||
| 82 | -static struct regulator_init_data sdp4430_vmmc = { | ||
| 83 | - .constraints = { | ||
| 84 | - .min_uV = 1200000, | ||
| 85 | - .max_uV = 3000000, | ||
| 86 | - .apply_uV = true, | ||
| 87 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 88 | - | REGULATOR_MODE_STANDBY, | ||
| 89 | - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 90 | - | REGULATOR_CHANGE_MODE | ||
| 91 | - | REGULATOR_CHANGE_STATUS, | ||
| 92 | - }, | ||
| 93 | - .num_consumer_supplies = 1, | ||
| 94 | - .consumer_supplies = sdp4430_vmmc_supply, | ||
| 95 | -}; | ||
| 96 | - | ||
| 97 | -static struct regulator_init_data sdp4430_vpp = { | ||
| 98 | - .constraints = { | ||
| 99 | - .min_uV = 1800000, | ||
| 100 | - .max_uV = 2500000, | ||
| 101 | - .apply_uV = true, | ||
| 102 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 103 | - | REGULATOR_MODE_STANDBY, | ||
| 104 | - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 105 | - | REGULATOR_CHANGE_MODE | ||
| 106 | - | REGULATOR_CHANGE_STATUS, | ||
| 107 | - }, | ||
| 108 | -}; | ||
| 109 | - | ||
| 110 | static struct regulator_init_data sdp4430_vusim = { | ||
| 111 | .constraints = { | ||
| 112 | .min_uV = 1200000, | ||
| 113 | @@ -462,74 +395,10 @@ static struct regulator_init_data sdp4430_vusim = { | ||
| 114 | }, | ||
| 115 | }; | ||
| 116 | |||
| 117 | -static struct regulator_init_data sdp4430_vana = { | ||
| 118 | - .constraints = { | ||
| 119 | - .min_uV = 2100000, | ||
| 120 | - .max_uV = 2100000, | ||
| 121 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 122 | - | REGULATOR_MODE_STANDBY, | ||
| 123 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 124 | - | REGULATOR_CHANGE_STATUS, | ||
| 125 | - }, | ||
| 126 | -}; | ||
| 127 | - | ||
| 128 | -static struct regulator_init_data sdp4430_vcxio = { | ||
| 129 | - .constraints = { | ||
| 130 | - .min_uV = 1800000, | ||
| 131 | - .max_uV = 1800000, | ||
| 132 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 133 | - | REGULATOR_MODE_STANDBY, | ||
| 134 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 135 | - | REGULATOR_CHANGE_STATUS, | ||
| 136 | - }, | ||
| 137 | -}; | ||
| 138 | - | ||
| 139 | -static struct regulator_init_data sdp4430_vdac = { | ||
| 140 | - .constraints = { | ||
| 141 | - .min_uV = 1800000, | ||
| 142 | - .max_uV = 1800000, | ||
| 143 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 144 | - | REGULATOR_MODE_STANDBY, | ||
| 145 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 146 | - | REGULATOR_CHANGE_STATUS, | ||
| 147 | - }, | ||
| 148 | -}; | ||
| 149 | - | ||
| 150 | -static struct regulator_init_data sdp4430_vusb = { | ||
| 151 | - .constraints = { | ||
| 152 | - .min_uV = 3300000, | ||
| 153 | - .max_uV = 3300000, | ||
| 154 | - .apply_uV = true, | ||
| 155 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 156 | - | REGULATOR_MODE_STANDBY, | ||
| 157 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 158 | - | REGULATOR_CHANGE_STATUS, | ||
| 159 | - }, | ||
| 160 | -}; | ||
| 161 | - | ||
| 162 | -static struct regulator_init_data sdp4430_clk32kg = { | ||
| 163 | - .constraints = { | ||
| 164 | - .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
| 165 | - }, | ||
| 166 | -}; | ||
| 167 | - | ||
| 168 | static struct twl4030_platform_data sdp4430_twldata = { | ||
| 169 | - .irq_base = TWL6030_IRQ_BASE, | ||
| 170 | - .irq_end = TWL6030_IRQ_END, | ||
| 171 | - | ||
| 172 | /* Regulators */ | ||
| 173 | - .vmmc = &sdp4430_vmmc, | ||
| 174 | - .vpp = &sdp4430_vpp, | ||
| 175 | .vusim = &sdp4430_vusim, | ||
| 176 | - .vana = &sdp4430_vana, | ||
| 177 | - .vcxio = &sdp4430_vcxio, | ||
| 178 | - .vdac = &sdp4430_vdac, | ||
| 179 | - .vusb = &sdp4430_vusb, | ||
| 180 | .vaux1 = &sdp4430_vaux1, | ||
| 181 | - .vaux2 = &sdp4430_vaux2, | ||
| 182 | - .vaux3 = &sdp4430_vaux3, | ||
| 183 | - .clk32kg = &sdp4430_clk32kg, | ||
| 184 | - .usb = &omap4_usbphy_data | ||
| 185 | }; | ||
| 186 | |||
| 187 | static struct i2c_board_info __initdata sdp4430_i2c_3_boardinfo[] = { | ||
| 188 | @@ -547,6 +416,16 @@ static struct i2c_board_info __initdata sdp4430_i2c_4_boardinfo[] = { | ||
| 189 | }; | ||
| 190 | static int __init omap4_i2c_init(void) | ||
| 191 | { | ||
| 192 | + omap4_pmic_get_config(&sdp4430_twldata, TWL_COMMON_PDATA_USB, | ||
| 193 | + TWL_COMMON_REGULATOR_VDAC | | ||
| 194 | + TWL_COMMON_REGULATOR_VAUX2 | | ||
| 195 | + TWL_COMMON_REGULATOR_VAUX3 | | ||
| 196 | + TWL_COMMON_REGULATOR_VMMC | | ||
| 197 | + TWL_COMMON_REGULATOR_VPP | | ||
| 198 | + TWL_COMMON_REGULATOR_VANA | | ||
| 199 | + TWL_COMMON_REGULATOR_VCXIO | | ||
| 200 | + TWL_COMMON_REGULATOR_VUSB | | ||
| 201 | + TWL_COMMON_REGULATOR_CLK32KG); | ||
| 202 | omap4_pmic_init("twl6030", &sdp4430_twldata); | ||
| 203 | omap_register_i2c_bus(2, 400, NULL, 0); | ||
| 204 | omap_register_i2c_bus(3, 400, sdp4430_i2c_3_boardinfo, | ||
| 205 | diff --git a/arch/arm/mach-omap2/board-omap4panda.c b/arch/arm/mach-omap2/board-omap4panda.c | ||
| 206 | index ee2034e..9aaa960 100644 | ||
| 207 | --- a/arch/arm/mach-omap2/board-omap4panda.c | ||
| 208 | +++ b/arch/arm/mach-omap2/board-omap4panda.c | ||
| 209 | @@ -154,14 +154,6 @@ static struct omap_musb_board_data musb_board_data = { | ||
| 210 | .power = 100, | ||
| 211 | }; | ||
| 212 | |||
| 213 | -static struct twl4030_usb_data omap4_usbphy_data = { | ||
| 214 | - .phy_init = omap4430_phy_init, | ||
| 215 | - .phy_exit = omap4430_phy_exit, | ||
| 216 | - .phy_power = omap4430_phy_power, | ||
| 217 | - .phy_set_clock = omap4430_phy_set_clk, | ||
| 218 | - .phy_suspend = omap4430_phy_suspend, | ||
| 219 | -}; | ||
| 220 | - | ||
| 221 | static struct omap2_hsmmc_info mmc[] = { | ||
| 222 | { | ||
| 223 | .mmc = 1, | ||
| 224 | @@ -181,10 +173,6 @@ static struct omap2_hsmmc_info mmc[] = { | ||
| 225 | {} /* Terminator */ | ||
| 226 | }; | ||
| 227 | |||
| 228 | -static struct regulator_consumer_supply omap4_panda_vmmc_supply[] = { | ||
| 229 | - REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 230 | -}; | ||
| 231 | - | ||
| 232 | static struct regulator_consumer_supply omap4_panda_vmmc5_supply[] = { | ||
| 233 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.4"), | ||
| 234 | }; | ||
| 235 | @@ -269,128 +257,8 @@ static int __init omap4_twl6030_hsmmc_init(struct omap2_hsmmc_info *controllers) | ||
| 236 | return 0; | ||
| 237 | } | ||
| 238 | |||
| 239 | -static struct regulator_init_data omap4_panda_vaux2 = { | ||
| 240 | - .constraints = { | ||
| 241 | - .min_uV = 1200000, | ||
| 242 | - .max_uV = 2800000, | ||
| 243 | - .apply_uV = true, | ||
| 244 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 245 | - | REGULATOR_MODE_STANDBY, | ||
| 246 | - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 247 | - | REGULATOR_CHANGE_MODE | ||
| 248 | - | REGULATOR_CHANGE_STATUS, | ||
| 249 | - }, | ||
| 250 | -}; | ||
| 251 | - | ||
| 252 | -static struct regulator_init_data omap4_panda_vaux3 = { | ||
| 253 | - .constraints = { | ||
| 254 | - .min_uV = 1000000, | ||
| 255 | - .max_uV = 3000000, | ||
| 256 | - .apply_uV = true, | ||
| 257 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 258 | - | REGULATOR_MODE_STANDBY, | ||
| 259 | - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 260 | - | REGULATOR_CHANGE_MODE | ||
| 261 | - | REGULATOR_CHANGE_STATUS, | ||
| 262 | - }, | ||
| 263 | -}; | ||
| 264 | - | ||
| 265 | -/* VMMC1 for MMC1 card */ | ||
| 266 | -static struct regulator_init_data omap4_panda_vmmc = { | ||
| 267 | - .constraints = { | ||
| 268 | - .min_uV = 1200000, | ||
| 269 | - .max_uV = 3000000, | ||
| 270 | - .apply_uV = true, | ||
| 271 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 272 | - | REGULATOR_MODE_STANDBY, | ||
| 273 | - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 274 | - | REGULATOR_CHANGE_MODE | ||
| 275 | - | REGULATOR_CHANGE_STATUS, | ||
| 276 | - }, | ||
| 277 | - .num_consumer_supplies = ARRAY_SIZE(omap4_panda_vmmc_supply), | ||
| 278 | - .consumer_supplies = omap4_panda_vmmc_supply, | ||
| 279 | -}; | ||
| 280 | - | ||
| 281 | -static struct regulator_init_data omap4_panda_vpp = { | ||
| 282 | - .constraints = { | ||
| 283 | - .min_uV = 1800000, | ||
| 284 | - .max_uV = 2500000, | ||
| 285 | - .apply_uV = true, | ||
| 286 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 287 | - | REGULATOR_MODE_STANDBY, | ||
| 288 | - .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 289 | - | REGULATOR_CHANGE_MODE | ||
| 290 | - | REGULATOR_CHANGE_STATUS, | ||
| 291 | - }, | ||
| 292 | -}; | ||
| 293 | - | ||
| 294 | -static struct regulator_init_data omap4_panda_vana = { | ||
| 295 | - .constraints = { | ||
| 296 | - .min_uV = 2100000, | ||
| 297 | - .max_uV = 2100000, | ||
| 298 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 299 | - | REGULATOR_MODE_STANDBY, | ||
| 300 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 301 | - | REGULATOR_CHANGE_STATUS, | ||
| 302 | - }, | ||
| 303 | -}; | ||
| 304 | - | ||
| 305 | -static struct regulator_init_data omap4_panda_vcxio = { | ||
| 306 | - .constraints = { | ||
| 307 | - .min_uV = 1800000, | ||
| 308 | - .max_uV = 1800000, | ||
| 309 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 310 | - | REGULATOR_MODE_STANDBY, | ||
| 311 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 312 | - | REGULATOR_CHANGE_STATUS, | ||
| 313 | - }, | ||
| 314 | -}; | ||
| 315 | - | ||
| 316 | -static struct regulator_init_data omap4_panda_vdac = { | ||
| 317 | - .constraints = { | ||
| 318 | - .min_uV = 1800000, | ||
| 319 | - .max_uV = 1800000, | ||
| 320 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 321 | - | REGULATOR_MODE_STANDBY, | ||
| 322 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 323 | - | REGULATOR_CHANGE_STATUS, | ||
| 324 | - }, | ||
| 325 | -}; | ||
| 326 | - | ||
| 327 | -static struct regulator_init_data omap4_panda_vusb = { | ||
| 328 | - .constraints = { | ||
| 329 | - .min_uV = 3300000, | ||
| 330 | - .max_uV = 3300000, | ||
| 331 | - .apply_uV = true, | ||
| 332 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 333 | - | REGULATOR_MODE_STANDBY, | ||
| 334 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 335 | - | REGULATOR_CHANGE_STATUS, | ||
| 336 | - }, | ||
| 337 | -}; | ||
| 338 | - | ||
| 339 | -static struct regulator_init_data omap4_panda_clk32kg = { | ||
| 340 | - .constraints = { | ||
| 341 | - .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
| 342 | - }, | ||
| 343 | -}; | ||
| 344 | - | ||
| 345 | -static struct twl4030_platform_data omap4_panda_twldata = { | ||
| 346 | - .irq_base = TWL6030_IRQ_BASE, | ||
| 347 | - .irq_end = TWL6030_IRQ_END, | ||
| 348 | - | ||
| 349 | - /* Regulators */ | ||
| 350 | - .vmmc = &omap4_panda_vmmc, | ||
| 351 | - .vpp = &omap4_panda_vpp, | ||
| 352 | - .vana = &omap4_panda_vana, | ||
| 353 | - .vcxio = &omap4_panda_vcxio, | ||
| 354 | - .vdac = &omap4_panda_vdac, | ||
| 355 | - .vusb = &omap4_panda_vusb, | ||
| 356 | - .vaux2 = &omap4_panda_vaux2, | ||
| 357 | - .vaux3 = &omap4_panda_vaux3, | ||
| 358 | - .clk32kg = &omap4_panda_clk32kg, | ||
| 359 | - .usb = &omap4_usbphy_data, | ||
| 360 | -}; | ||
| 361 | +/* Panda board uses the common PMIC configuration */ | ||
| 362 | +static struct twl4030_platform_data omap4_panda_twldata; | ||
| 363 | |||
| 364 | /* | ||
| 365 | * Display monitor features are burnt in their EEPROM as EDID data. The EEPROM | ||
| 366 | @@ -404,6 +272,16 @@ static struct i2c_board_info __initdata panda_i2c_eeprom[] = { | ||
| 367 | |||
| 368 | static int __init omap4_panda_i2c_init(void) | ||
| 369 | { | ||
| 370 | + omap4_pmic_get_config(&omap4_panda_twldata, TWL_COMMON_PDATA_USB, | ||
| 371 | + TWL_COMMON_REGULATOR_VDAC | | ||
| 372 | + TWL_COMMON_REGULATOR_VAUX2 | | ||
| 373 | + TWL_COMMON_REGULATOR_VAUX3 | | ||
| 374 | + TWL_COMMON_REGULATOR_VMMC | | ||
| 375 | + TWL_COMMON_REGULATOR_VPP | | ||
| 376 | + TWL_COMMON_REGULATOR_VANA | | ||
| 377 | + TWL_COMMON_REGULATOR_VCXIO | | ||
| 378 | + TWL_COMMON_REGULATOR_VUSB | | ||
| 379 | + TWL_COMMON_REGULATOR_CLK32KG); | ||
| 380 | omap4_pmic_init("twl6030", &omap4_panda_twldata); | ||
| 381 | omap_register_i2c_bus(2, 400, NULL, 0); | ||
| 382 | /* | ||
| 383 | diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c | ||
| 384 | index 4f7b24c..cf80f4c 100644 | ||
| 385 | --- a/arch/arm/mach-omap2/twl-common.c | ||
| 386 | +++ b/arch/arm/mach-omap2/twl-common.c | ||
| 387 | @@ -23,8 +23,11 @@ | ||
| 388 | #include <linux/i2c.h> | ||
| 389 | #include <linux/i2c/twl.h> | ||
| 390 | #include <linux/gpio.h> | ||
| 391 | +#include <linux/regulator/machine.h> | ||
| 392 | +#include <linux/regulator/fixed.h> | ||
| 393 | |||
| 394 | #include <plat/i2c.h> | ||
| 395 | +#include <plat/usb.h> | ||
| 396 | |||
| 397 | #include "twl-common.h" | ||
| 398 | |||
| 399 | @@ -44,3 +47,163 @@ void __init omap_pmic_init(int bus, u32 clkrate, | ||
| 400 | |||
| 401 | omap_register_i2c_bus(bus, clkrate, &pmic_i2c_board_info, 1); | ||
| 402 | } | ||
| 403 | + | ||
| 404 | +static struct twl4030_usb_data omap4_usb_pdata = { | ||
| 405 | + .phy_init = omap4430_phy_init, | ||
| 406 | + .phy_exit = omap4430_phy_exit, | ||
| 407 | + .phy_power = omap4430_phy_power, | ||
| 408 | + .phy_set_clock = omap4430_phy_set_clk, | ||
| 409 | + .phy_suspend = omap4430_phy_suspend, | ||
| 410 | +}; | ||
| 411 | + | ||
| 412 | +static struct regulator_init_data omap4_vdac_idata = { | ||
| 413 | + .constraints = { | ||
| 414 | + .min_uV = 1800000, | ||
| 415 | + .max_uV = 1800000, | ||
| 416 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 417 | + | REGULATOR_MODE_STANDBY, | ||
| 418 | + .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 419 | + | REGULATOR_CHANGE_STATUS, | ||
| 420 | + }, | ||
| 421 | +}; | ||
| 422 | + | ||
| 423 | +static struct regulator_init_data omap4_vaux2_idata = { | ||
| 424 | + .constraints = { | ||
| 425 | + .min_uV = 1200000, | ||
| 426 | + .max_uV = 2800000, | ||
| 427 | + .apply_uV = true, | ||
| 428 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 429 | + | REGULATOR_MODE_STANDBY, | ||
| 430 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 431 | + | REGULATOR_CHANGE_MODE | ||
| 432 | + | REGULATOR_CHANGE_STATUS, | ||
| 433 | + }, | ||
| 434 | +}; | ||
| 435 | + | ||
| 436 | +static struct regulator_init_data omap4_vaux3_idata = { | ||
| 437 | + .constraints = { | ||
| 438 | + .min_uV = 1000000, | ||
| 439 | + .max_uV = 3000000, | ||
| 440 | + .apply_uV = true, | ||
| 441 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 442 | + | REGULATOR_MODE_STANDBY, | ||
| 443 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 444 | + | REGULATOR_CHANGE_MODE | ||
| 445 | + | REGULATOR_CHANGE_STATUS, | ||
| 446 | + }, | ||
| 447 | +}; | ||
| 448 | + | ||
| 449 | +static struct regulator_consumer_supply omap4_vmmc_supply[] = { | ||
| 450 | + REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 451 | +}; | ||
| 452 | + | ||
| 453 | +/* VMMC1 for MMC1 card */ | ||
| 454 | +static struct regulator_init_data omap4_vmmc_idata = { | ||
| 455 | + .constraints = { | ||
| 456 | + .min_uV = 1200000, | ||
| 457 | + .max_uV = 3000000, | ||
| 458 | + .apply_uV = true, | ||
| 459 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 460 | + | REGULATOR_MODE_STANDBY, | ||
| 461 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 462 | + | REGULATOR_CHANGE_MODE | ||
| 463 | + | REGULATOR_CHANGE_STATUS, | ||
| 464 | + }, | ||
| 465 | + .num_consumer_supplies = ARRAY_SIZE(omap4_vmmc_supply), | ||
| 466 | + .consumer_supplies = omap4_vmmc_supply, | ||
| 467 | +}; | ||
| 468 | + | ||
| 469 | +static struct regulator_init_data omap4_vpp_idata = { | ||
| 470 | + .constraints = { | ||
| 471 | + .min_uV = 1800000, | ||
| 472 | + .max_uV = 2500000, | ||
| 473 | + .apply_uV = true, | ||
| 474 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 475 | + | REGULATOR_MODE_STANDBY, | ||
| 476 | + .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | ||
| 477 | + | REGULATOR_CHANGE_MODE | ||
| 478 | + | REGULATOR_CHANGE_STATUS, | ||
| 479 | + }, | ||
| 480 | +}; | ||
| 481 | + | ||
| 482 | +static struct regulator_init_data omap4_vana_idata = { | ||
| 483 | + .constraints = { | ||
| 484 | + .min_uV = 2100000, | ||
| 485 | + .max_uV = 2100000, | ||
| 486 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 487 | + | REGULATOR_MODE_STANDBY, | ||
| 488 | + .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 489 | + | REGULATOR_CHANGE_STATUS, | ||
| 490 | + }, | ||
| 491 | +}; | ||
| 492 | + | ||
| 493 | +static struct regulator_init_data omap4_vcxio_idata = { | ||
| 494 | + .constraints = { | ||
| 495 | + .min_uV = 1800000, | ||
| 496 | + .max_uV = 1800000, | ||
| 497 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 498 | + | REGULATOR_MODE_STANDBY, | ||
| 499 | + .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 500 | + | REGULATOR_CHANGE_STATUS, | ||
| 501 | + }, | ||
| 502 | +}; | ||
| 503 | + | ||
| 504 | +static struct regulator_init_data omap4_vusb_idata = { | ||
| 505 | + .constraints = { | ||
| 506 | + .min_uV = 3300000, | ||
| 507 | + .max_uV = 3300000, | ||
| 508 | + .apply_uV = true, | ||
| 509 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 510 | + | REGULATOR_MODE_STANDBY, | ||
| 511 | + .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 512 | + | REGULATOR_CHANGE_STATUS, | ||
| 513 | + }, | ||
| 514 | +}; | ||
| 515 | + | ||
| 516 | +static struct regulator_init_data omap4_clk32kg_idata = { | ||
| 517 | + .constraints = { | ||
| 518 | + .valid_ops_mask = REGULATOR_CHANGE_STATUS, | ||
| 519 | + }, | ||
| 520 | +}; | ||
| 521 | + | ||
| 522 | +void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, | ||
| 523 | + u32 pdata_flags, u32 regulators_flags) | ||
| 524 | +{ | ||
| 525 | + if (!pmic_data->irq_base) | ||
| 526 | + pmic_data->irq_base = TWL6030_IRQ_BASE; | ||
| 527 | + if (!pmic_data->irq_end) | ||
| 528 | + pmic_data->irq_end = TWL6030_IRQ_END; | ||
| 529 | + | ||
| 530 | + /* Common platform data configurations */ | ||
| 531 | + if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) | ||
| 532 | + pmic_data->usb = &omap4_usb_pdata; | ||
| 533 | + | ||
| 534 | + /* Common regulator configurations */ | ||
| 535 | + if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) | ||
| 536 | + pmic_data->vdac = &omap4_vdac_idata; | ||
| 537 | + | ||
| 538 | + if (regulators_flags & TWL_COMMON_REGULATOR_VAUX2 && !pmic_data->vaux2) | ||
| 539 | + pmic_data->vaux2 = &omap4_vaux2_idata; | ||
| 540 | + | ||
| 541 | + if (regulators_flags & TWL_COMMON_REGULATOR_VAUX3 && !pmic_data->vaux3) | ||
| 542 | + pmic_data->vaux3 = &omap4_vaux3_idata; | ||
| 543 | + | ||
| 544 | + if (regulators_flags & TWL_COMMON_REGULATOR_VMMC && !pmic_data->vmmc) | ||
| 545 | + pmic_data->vmmc = &omap4_vmmc_idata; | ||
| 546 | + | ||
| 547 | + if (regulators_flags & TWL_COMMON_REGULATOR_VPP && !pmic_data->vpp) | ||
| 548 | + pmic_data->vpp = &omap4_vpp_idata; | ||
| 549 | + | ||
| 550 | + if (regulators_flags & TWL_COMMON_REGULATOR_VANA && !pmic_data->vana) | ||
| 551 | + pmic_data->vana = &omap4_vana_idata; | ||
| 552 | + | ||
| 553 | + if (regulators_flags & TWL_COMMON_REGULATOR_VCXIO && !pmic_data->vcxio) | ||
| 554 | + pmic_data->vcxio = &omap4_vcxio_idata; | ||
| 555 | + | ||
| 556 | + if (regulators_flags & TWL_COMMON_REGULATOR_VUSB && !pmic_data->vusb) | ||
| 557 | + pmic_data->vusb = &omap4_vusb_idata; | ||
| 558 | + | ||
| 559 | + if (regulators_flags & TWL_COMMON_REGULATOR_CLK32KG && | ||
| 560 | + !pmic_data->clk32kg) | ||
| 561 | + pmic_data->clk32kg = &omap4_clk32kg_idata; | ||
| 562 | +} | ||
| 563 | diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h | ||
| 564 | index e9fe2ab..d96c289 100644 | ||
| 565 | --- a/arch/arm/mach-omap2/twl-common.h | ||
| 566 | +++ b/arch/arm/mach-omap2/twl-common.h | ||
| 567 | @@ -1,6 +1,23 @@ | ||
| 568 | #ifndef __OMAP_PMIC_COMMON__ | ||
| 569 | #define __OMAP_PMIC_COMMON__ | ||
| 570 | |||
| 571 | +#define TWL_COMMON_PDATA_USB (1 << 0) | ||
| 572 | + | ||
| 573 | +/* Common LDO regulators for TWL4030/TWL6030 */ | ||
| 574 | +#define TWL_COMMON_REGULATOR_VDAC (1 << 0) | ||
| 575 | +#define TWL_COMMON_REGULATOR_VAUX1 (1 << 1) | ||
| 576 | +#define TWL_COMMON_REGULATOR_VAUX2 (1 << 2) | ||
| 577 | +#define TWL_COMMON_REGULATOR_VAUX3 (1 << 3) | ||
| 578 | + | ||
| 579 | +/* TWL6030 LDO regulators */ | ||
| 580 | +#define TWL_COMMON_REGULATOR_VMMC (1 << 4) | ||
| 581 | +#define TWL_COMMON_REGULATOR_VPP (1 << 5) | ||
| 582 | +#define TWL_COMMON_REGULATOR_VUSIM (1 << 6) | ||
| 583 | +#define TWL_COMMON_REGULATOR_VANA (1 << 7) | ||
| 584 | +#define TWL_COMMON_REGULATOR_VCXIO (1 << 8) | ||
| 585 | +#define TWL_COMMON_REGULATOR_VUSB (1 << 9) | ||
| 586 | +#define TWL_COMMON_REGULATOR_CLK32KG (1 << 10) | ||
| 587 | + | ||
| 588 | struct twl4030_platform_data; | ||
| 589 | |||
| 590 | void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, | ||
| 591 | @@ -25,4 +42,7 @@ static inline void omap4_pmic_init(const char *pmic_type, | ||
| 592 | omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); | ||
| 593 | } | ||
| 594 | |||
| 595 | +void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, | ||
| 596 | + u32 pdata_flags, u32 regulators_flags); | ||
| 597 | + | ||
| 598 | #endif /* __OMAP_PMIC_COMMON__ */ | ||
| 599 | -- | ||
| 600 | 1.7.2.5 | ||
| 601 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0024-OMAP3-Move-common-twl-configuration-to-twl-common.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0024-OMAP3-Move-common-twl-configuration-to-twl-common.patch deleted file mode 100644 index 6dfcc2c6..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0024-OMAP3-Move-common-twl-configuration-to-twl-common.patch +++ /dev/null | |||
| @@ -1,827 +0,0 @@ | |||
| 1 | From 4a1b31f8aed87737ba84e1e5724ecfbe45732bc8 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 3 | Date: Tue, 7 Jun 2011 10:28:54 +0300 | ||
| 4 | Subject: [PATCH 024/149] OMAP3: Move common twl configuration to twl-common | ||
| 5 | |||
| 6 | Reduce the amount of duplicated code by moving the common | ||
| 7 | configuration for twl4030/5030/tpsxx to the twl-common file. | ||
| 8 | Use the omap3_pmic_get_config function from board files to | ||
| 9 | properly configure the PMIC with the common fields. | ||
| 10 | |||
| 11 | Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 12 | Acked-by: Tony Lindgren <tony@atomide.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/board-3430sdp.c | 42 ++------------------ | ||
| 15 | arch/arm/mach-omap2/board-cm-t35.c | 9 +---- | ||
| 16 | arch/arm/mach-omap2/board-devkit8000.c | 18 +-------- | ||
| 17 | arch/arm/mach-omap2/board-igep0020.c | 20 ++-------- | ||
| 18 | arch/arm/mach-omap2/board-ldp.c | 15 +------ | ||
| 19 | arch/arm/mach-omap2/board-omap3beagle.c | 18 +-------- | ||
| 20 | arch/arm/mach-omap2/board-omap3evm.c | 24 +---------- | ||
| 21 | arch/arm/mach-omap2/board-omap3pandora.c | 17 +------- | ||
| 22 | arch/arm/mach-omap2/board-omap3stalker.c | 24 +---------- | ||
| 23 | arch/arm/mach-omap2/board-omap3touchbook.c | 19 +-------- | ||
| 24 | arch/arm/mach-omap2/board-overo.c | 17 +------- | ||
| 25 | arch/arm/mach-omap2/board-rm680.c | 8 +--- | ||
| 26 | arch/arm/mach-omap2/board-rx51-peripherals.c | 15 +------ | ||
| 27 | arch/arm/mach-omap2/board-zoom-peripherals.c | 51 +++++-------------------- | ||
| 28 | arch/arm/mach-omap2/twl-common.c | 53 ++++++++++++++++++++++++++ | ||
| 29 | arch/arm/mach-omap2/twl-common.h | 6 +++ | ||
| 30 | 16 files changed, 99 insertions(+), 257 deletions(-) | ||
| 31 | |||
| 32 | diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c | ||
| 33 | index 12fae21..8bbd4e0 100644 | ||
| 34 | --- a/arch/arm/mach-omap2/board-3430sdp.c | ||
| 35 | +++ b/arch/arm/mach-omap2/board-3430sdp.c | ||
| 36 | @@ -231,22 +231,6 @@ static void __init omap_3430sdp_init_early(void) | ||
| 37 | omap2_init_common_devices(hyb18m512160af6_sdrc_params, NULL); | ||
| 38 | } | ||
| 39 | |||
| 40 | -static int sdp3430_batt_table[] = { | ||
| 41 | -/* 0 C*/ | ||
| 42 | -30800, 29500, 28300, 27100, | ||
| 43 | -26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, | ||
| 44 | -17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, | ||
| 45 | -11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, | ||
| 46 | -8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, | ||
| 47 | -5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, | ||
| 48 | -4040, 3910, 3790, 3670, 3550 | ||
| 49 | -}; | ||
| 50 | - | ||
| 51 | -static struct twl4030_bci_platform_data sdp3430_bci_data = { | ||
| 52 | - .battery_tmp_tbl = sdp3430_batt_table, | ||
| 53 | - .tblsize = ARRAY_SIZE(sdp3430_batt_table), | ||
| 54 | -}; | ||
| 55 | - | ||
| 56 | static struct omap2_hsmmc_info mmc[] = { | ||
| 57 | { | ||
| 58 | .mmc = 1, | ||
| 59 | @@ -292,14 +276,6 @@ static struct twl4030_gpio_platform_data sdp3430_gpio_data = { | ||
| 60 | .setup = sdp3430_twl_gpio_setup, | ||
| 61 | }; | ||
| 62 | |||
| 63 | -static struct twl4030_usb_data sdp3430_usb_data = { | ||
| 64 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 65 | -}; | ||
| 66 | - | ||
| 67 | -static struct twl4030_madc_platform_data sdp3430_madc_data = { | ||
| 68 | - .irq_line = 1, | ||
| 69 | -}; | ||
| 70 | - | ||
| 71 | /* regulator consumer mappings */ | ||
| 72 | |||
| 73 | /* ads7846 on SPI */ | ||
| 74 | @@ -463,24 +439,10 @@ static struct regulator_init_data sdp3430_vpll2 = { | ||
| 75 | .consumer_supplies = sdp3430_vpll2_supplies, | ||
| 76 | }; | ||
| 77 | |||
| 78 | -static struct twl4030_codec_audio_data sdp3430_audio; | ||
| 79 | - | ||
| 80 | -static struct twl4030_codec_data sdp3430_codec = { | ||
| 81 | - .audio_mclk = 26000000, | ||
| 82 | - .audio = &sdp3430_audio, | ||
| 83 | -}; | ||
| 84 | - | ||
| 85 | static struct twl4030_platform_data sdp3430_twldata = { | ||
| 86 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 87 | - .irq_end = TWL4030_IRQ_END, | ||
| 88 | - | ||
| 89 | /* platform_data for children goes here */ | ||
| 90 | - .bci = &sdp3430_bci_data, | ||
| 91 | .gpio = &sdp3430_gpio_data, | ||
| 92 | - .madc = &sdp3430_madc_data, | ||
| 93 | .keypad = &sdp3430_kp_data, | ||
| 94 | - .usb = &sdp3430_usb_data, | ||
| 95 | - .codec = &sdp3430_codec, | ||
| 96 | |||
| 97 | .vaux1 = &sdp3430_vaux1, | ||
| 98 | .vaux2 = &sdp3430_vaux2, | ||
| 99 | @@ -496,7 +458,11 @@ static struct twl4030_platform_data sdp3430_twldata = { | ||
| 100 | static int __init omap3430_i2c_init(void) | ||
| 101 | { | ||
| 102 | /* i2c1 for PMIC only */ | ||
| 103 | + omap3_pmic_get_config(&sdp3430_twldata, | ||
| 104 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | | ||
| 105 | + TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 106 | omap3_pmic_init("twl4030", &sdp3430_twldata); | ||
| 107 | + | ||
| 108 | /* i2c2 on camera connector (for sensor control) and optional isp1301 */ | ||
| 109 | omap_register_i2c_bus(2, 400, NULL, 0); | ||
| 110 | /* i2c3 on display connector (for DVI, tfp410) */ | ||
| 111 | diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 112 | index d76dca7..cb00abc 100644 | ||
| 113 | --- a/arch/arm/mach-omap2/board-cm-t35.c | ||
| 114 | +++ b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 115 | @@ -410,10 +410,6 @@ static struct regulator_init_data cm_t35_vpll2 = { | ||
| 116 | .consumer_supplies = cm_t35_vdvi_supply, | ||
| 117 | }; | ||
| 118 | |||
| 119 | -static struct twl4030_usb_data cm_t35_usb_data = { | ||
| 120 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 121 | -}; | ||
| 122 | - | ||
| 123 | static uint32_t cm_t35_keymap[] = { | ||
| 124 | KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), | ||
| 125 | KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), | ||
| 126 | @@ -492,12 +488,8 @@ static struct twl4030_gpio_platform_data cm_t35_gpio_data = { | ||
| 127 | }; | ||
| 128 | |||
| 129 | static struct twl4030_platform_data cm_t35_twldata = { | ||
| 130 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 131 | - .irq_end = TWL4030_IRQ_END, | ||
| 132 | - | ||
| 133 | /* platform_data for children goes here */ | ||
| 134 | .keypad = &cm_t35_kp_data, | ||
| 135 | - .usb = &cm_t35_usb_data, | ||
| 136 | .gpio = &cm_t35_gpio_data, | ||
| 137 | .vmmc1 = &cm_t35_vmmc1, | ||
| 138 | .vsim = &cm_t35_vsim, | ||
| 139 | @@ -507,6 +499,7 @@ static struct twl4030_platform_data cm_t35_twldata = { | ||
| 140 | |||
| 141 | static void __init cm_t35_init_i2c(void) | ||
| 142 | { | ||
| 143 | + omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, 0); | ||
| 144 | omap3_pmic_init("tps65930", &cm_t35_twldata); | ||
| 145 | } | ||
| 146 | |||
| 147 | diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c | ||
| 148 | index 949dbea..364942e 100644 | ||
| 149 | --- a/arch/arm/mach-omap2/board-devkit8000.c | ||
| 150 | +++ b/arch/arm/mach-omap2/board-devkit8000.c | ||
| 151 | @@ -332,25 +332,9 @@ static struct regulator_init_data devkit8000_vio = { | ||
| 152 | .consumer_supplies = devkit8000_vio_supply, | ||
| 153 | }; | ||
| 154 | |||
| 155 | -static struct twl4030_usb_data devkit8000_usb_data = { | ||
| 156 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 157 | -}; | ||
| 158 | - | ||
| 159 | -static struct twl4030_codec_audio_data devkit8000_audio_data; | ||
| 160 | - | ||
| 161 | -static struct twl4030_codec_data devkit8000_codec_data = { | ||
| 162 | - .audio_mclk = 26000000, | ||
| 163 | - .audio = &devkit8000_audio_data, | ||
| 164 | -}; | ||
| 165 | - | ||
| 166 | static struct twl4030_platform_data devkit8000_twldata = { | ||
| 167 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 168 | - .irq_end = TWL4030_IRQ_END, | ||
| 169 | - | ||
| 170 | /* platform_data for children goes here */ | ||
| 171 | - .usb = &devkit8000_usb_data, | ||
| 172 | .gpio = &devkit8000_gpio_data, | ||
| 173 | - .codec = &devkit8000_codec_data, | ||
| 174 | .vmmc1 = &devkit8000_vmmc1, | ||
| 175 | .vdac = &devkit8000_vdac, | ||
| 176 | .vpll1 = &devkit8000_vpll1, | ||
| 177 | @@ -360,6 +344,8 @@ static struct twl4030_platform_data devkit8000_twldata = { | ||
| 178 | |||
| 179 | static int __init devkit8000_i2c_init(void) | ||
| 180 | { | ||
| 181 | + omap3_pmic_get_config(&devkit8000_twldata, | ||
| 182 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 183 | omap3_pmic_init("tps65930", &devkit8000_twldata); | ||
| 184 | /* Bus 3 is attached to the DVI port where devices like the pico DLP | ||
| 185 | * projector don't work reliably with 400kHz */ | ||
| 186 | diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c | ||
| 187 | index f683835..e0a6687 100644 | ||
| 188 | --- a/arch/arm/mach-omap2/board-igep0020.c | ||
| 189 | +++ b/arch/arm/mach-omap2/board-igep0020.c | ||
| 190 | @@ -443,10 +443,6 @@ static struct twl4030_gpio_platform_data igep_twl4030_gpio_pdata = { | ||
| 191 | .setup = igep_twl_gpio_setup, | ||
| 192 | }; | ||
| 193 | |||
| 194 | -static struct twl4030_usb_data igep_usb_data = { | ||
| 195 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 196 | -}; | ||
| 197 | - | ||
| 198 | static int igep2_enable_dvi(struct omap_dss_device *dssdev) | ||
| 199 | { | ||
| 200 | gpio_direction_output(IGEP2_GPIO_DVI_PUP, 1); | ||
| 201 | @@ -522,13 +518,6 @@ static void __init igep_init_early(void) | ||
| 202 | m65kxxxxam_sdrc_params); | ||
| 203 | } | ||
| 204 | |||
| 205 | -static struct twl4030_codec_audio_data igep2_audio_data; | ||
| 206 | - | ||
| 207 | -static struct twl4030_codec_data igep2_codec_data = { | ||
| 208 | - .audio_mclk = 26000000, | ||
| 209 | - .audio = &igep2_audio_data, | ||
| 210 | -}; | ||
| 211 | - | ||
| 212 | static int igep2_keymap[] = { | ||
| 213 | KEY(0, 0, KEY_LEFT), | ||
| 214 | KEY(0, 1, KEY_RIGHT), | ||
| 215 | @@ -561,11 +550,7 @@ static struct twl4030_keypad_data igep2_keypad_pdata = { | ||
| 216 | }; | ||
| 217 | |||
| 218 | static struct twl4030_platform_data igep_twldata = { | ||
| 219 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 220 | - .irq_end = TWL4030_IRQ_END, | ||
| 221 | - | ||
| 222 | /* platform_data for children goes here */ | ||
| 223 | - .usb = &igep_usb_data, | ||
| 224 | .gpio = &igep_twl4030_gpio_pdata, | ||
| 225 | .vmmc1 = &igep_vmmc1, | ||
| 226 | .vio = &igep_vio, | ||
| 227 | @@ -581,6 +566,8 @@ static void __init igep_i2c_init(void) | ||
| 228 | { | ||
| 229 | int ret; | ||
| 230 | |||
| 231 | + omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_USB, 0); | ||
| 232 | + | ||
| 233 | if (machine_is_igep0020()) { | ||
| 234 | /* | ||
| 235 | * Bus 3 is attached to the DVI port where devices like the | ||
| 236 | @@ -591,9 +578,10 @@ static void __init igep_i2c_init(void) | ||
| 237 | if (ret) | ||
| 238 | pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret); | ||
| 239 | |||
| 240 | - igep_twldata.codec = &igep2_codec_data; | ||
| 241 | igep_twldata.keypad = &igep2_keypad_pdata; | ||
| 242 | igep_twldata.vpll2 = &igep2_vpll2; | ||
| 243 | + /* Use common codec data */ | ||
| 244 | + omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, 0); | ||
| 245 | } | ||
| 246 | |||
| 247 | omap3_pmic_init("twl4030", &igep_twldata); | ||
| 248 | diff --git a/arch/arm/mach-omap2/board-ldp.c b/arch/arm/mach-omap2/board-ldp.c | ||
| 249 | index 5d4328f..218764c 100644 | ||
| 250 | --- a/arch/arm/mach-omap2/board-ldp.c | ||
| 251 | +++ b/arch/arm/mach-omap2/board-ldp.c | ||
| 252 | @@ -199,20 +199,12 @@ static void __init omap_ldp_init_early(void) | ||
| 253 | omap2_init_common_devices(NULL, NULL); | ||
| 254 | } | ||
| 255 | |||
| 256 | -static struct twl4030_usb_data ldp_usb_data = { | ||
| 257 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 258 | -}; | ||
| 259 | - | ||
| 260 | static struct twl4030_gpio_platform_data ldp_gpio_data = { | ||
| 261 | .gpio_base = OMAP_MAX_GPIO_LINES, | ||
| 262 | .irq_base = TWL4030_GPIO_IRQ_BASE, | ||
| 263 | .irq_end = TWL4030_GPIO_IRQ_END, | ||
| 264 | }; | ||
| 265 | |||
| 266 | -static struct twl4030_madc_platform_data ldp_madc_data = { | ||
| 267 | - .irq_line = 1, | ||
| 268 | -}; | ||
| 269 | - | ||
| 270 | static struct regulator_consumer_supply ldp_vmmc1_supply[] = { | ||
| 271 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 272 | }; | ||
| 273 | @@ -253,12 +245,7 @@ static struct regulator_init_data ldp_vaux1 = { | ||
| 274 | }; | ||
| 275 | |||
| 276 | static struct twl4030_platform_data ldp_twldata = { | ||
| 277 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 278 | - .irq_end = TWL4030_IRQ_END, | ||
| 279 | - | ||
| 280 | /* platform_data for children goes here */ | ||
| 281 | - .madc = &ldp_madc_data, | ||
| 282 | - .usb = &ldp_usb_data, | ||
| 283 | .vmmc1 = &ldp_vmmc1, | ||
| 284 | .vaux1 = &ldp_vaux1, | ||
| 285 | .gpio = &ldp_gpio_data, | ||
| 286 | @@ -267,6 +254,8 @@ static struct twl4030_platform_data ldp_twldata = { | ||
| 287 | |||
| 288 | static int __init omap_i2c_init(void) | ||
| 289 | { | ||
| 290 | + omap3_pmic_get_config(&ldp_twldata, | ||
| 291 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0); | ||
| 292 | omap3_pmic_init("twl4030", &ldp_twldata); | ||
| 293 | omap_register_i2c_bus(2, 400, NULL, 0); | ||
| 294 | omap_register_i2c_bus(3, 400, NULL, 0); | ||
| 295 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 296 | index 2d8dfb3..ec61e9c 100644 | ||
| 297 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 298 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 299 | @@ -380,25 +380,9 @@ static struct regulator_init_data beagle_vpll2 = { | ||
| 300 | .consumer_supplies = beagle_vdvi_supplies, | ||
| 301 | }; | ||
| 302 | |||
| 303 | -static struct twl4030_usb_data beagle_usb_data = { | ||
| 304 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 305 | -}; | ||
| 306 | - | ||
| 307 | -static struct twl4030_codec_audio_data beagle_audio_data; | ||
| 308 | - | ||
| 309 | -static struct twl4030_codec_data beagle_codec_data = { | ||
| 310 | - .audio_mclk = 26000000, | ||
| 311 | - .audio = &beagle_audio_data, | ||
| 312 | -}; | ||
| 313 | - | ||
| 314 | static struct twl4030_platform_data beagle_twldata = { | ||
| 315 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 316 | - .irq_end = TWL4030_IRQ_END, | ||
| 317 | - | ||
| 318 | /* platform_data for children goes here */ | ||
| 319 | - .usb = &beagle_usb_data, | ||
| 320 | .gpio = &beagle_gpio_data, | ||
| 321 | - .codec = &beagle_codec_data, | ||
| 322 | .vmmc1 = &beagle_vmmc1, | ||
| 323 | .vsim = &beagle_vsim, | ||
| 324 | .vdac = &beagle_vdac, | ||
| 325 | @@ -413,6 +397,8 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { | ||
| 326 | |||
| 327 | static int __init omap3_beagle_i2c_init(void) | ||
| 328 | { | ||
| 329 | + omap3_pmic_get_config(&beagle_twldata, | ||
| 330 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 331 | omap3_pmic_init("twl4030", &beagle_twldata); | ||
| 332 | /* Bus 3 is attached to the DVI port where devices like the pico DLP | ||
| 333 | * projector don't work reliably with 400kHz */ | ||
| 334 | diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 335 | index 57bce0f..1ca298a 100644 | ||
| 336 | --- a/arch/arm/mach-omap2/board-omap3evm.c | ||
| 337 | +++ b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 338 | @@ -396,10 +396,6 @@ static struct twl4030_gpio_platform_data omap3evm_gpio_data = { | ||
| 339 | .setup = omap3evm_twl_gpio_setup, | ||
| 340 | }; | ||
| 341 | |||
| 342 | -static struct twl4030_usb_data omap3evm_usb_data = { | ||
| 343 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 344 | -}; | ||
| 345 | - | ||
| 346 | static uint32_t board_keymap[] = { | ||
| 347 | KEY(0, 0, KEY_LEFT), | ||
| 348 | KEY(0, 1, KEY_DOWN), | ||
| 349 | @@ -434,17 +430,6 @@ static struct twl4030_keypad_data omap3evm_kp_data = { | ||
| 350 | .rep = 1, | ||
| 351 | }; | ||
| 352 | |||
| 353 | -static struct twl4030_madc_platform_data omap3evm_madc_data = { | ||
| 354 | - .irq_line = 1, | ||
| 355 | -}; | ||
| 356 | - | ||
| 357 | -static struct twl4030_codec_audio_data omap3evm_audio_data; | ||
| 358 | - | ||
| 359 | -static struct twl4030_codec_data omap3evm_codec_data = { | ||
| 360 | - .audio_mclk = 26000000, | ||
| 361 | - .audio = &omap3evm_audio_data, | ||
| 362 | -}; | ||
| 363 | - | ||
| 364 | static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = { | ||
| 365 | REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 366 | }; | ||
| 367 | @@ -547,15 +532,9 @@ struct wl12xx_platform_data omap3evm_wlan_data __initdata = { | ||
| 368 | #endif | ||
| 369 | |||
| 370 | static struct twl4030_platform_data omap3evm_twldata = { | ||
| 371 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 372 | - .irq_end = TWL4030_IRQ_END, | ||
| 373 | - | ||
| 374 | /* platform_data for children goes here */ | ||
| 375 | .keypad = &omap3evm_kp_data, | ||
| 376 | - .madc = &omap3evm_madc_data, | ||
| 377 | - .usb = &omap3evm_usb_data, | ||
| 378 | .gpio = &omap3evm_gpio_data, | ||
| 379 | - .codec = &omap3evm_codec_data, | ||
| 380 | .vdac = &omap3_evm_vdac, | ||
| 381 | .vpll2 = &omap3_evm_vpll2, | ||
| 382 | .vio = &omap3evm_vio, | ||
| 383 | @@ -565,6 +544,9 @@ static struct twl4030_platform_data omap3evm_twldata = { | ||
| 384 | |||
| 385 | static int __init omap3_evm_i2c_init(void) | ||
| 386 | { | ||
| 387 | + omap3_pmic_get_config(&omap3evm_twldata, | ||
| 388 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | | ||
| 389 | + TWL_COMMON_PDATA_AUDIO, 0); | ||
| 390 | omap3_pmic_init("twl4030", &omap3evm_twldata); | ||
| 391 | omap_register_i2c_bus(2, 400, NULL, 0); | ||
| 392 | omap_register_i2c_bus(3, 400, NULL, 0); | ||
| 393 | diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 394 | index d4ea940..f5abf76 100644 | ||
| 395 | --- a/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 396 | +++ b/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 397 | @@ -508,25 +508,10 @@ static struct platform_device pandora_vwlan_device = { | ||
| 398 | }, | ||
| 399 | }; | ||
| 400 | |||
| 401 | -static struct twl4030_usb_data omap3pandora_usb_data = { | ||
| 402 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 403 | -}; | ||
| 404 | - | ||
| 405 | -static struct twl4030_codec_audio_data omap3pandora_audio_data; | ||
| 406 | - | ||
| 407 | -static struct twl4030_codec_data omap3pandora_codec_data = { | ||
| 408 | - .audio_mclk = 26000000, | ||
| 409 | - .audio = &omap3pandora_audio_data, | ||
| 410 | -}; | ||
| 411 | - | ||
| 412 | static struct twl4030_bci_platform_data pandora_bci_data; | ||
| 413 | |||
| 414 | static struct twl4030_platform_data omap3pandora_twldata = { | ||
| 415 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 416 | - .irq_end = TWL4030_IRQ_END, | ||
| 417 | .gpio = &omap3pandora_gpio_data, | ||
| 418 | - .usb = &omap3pandora_usb_data, | ||
| 419 | - .codec = &omap3pandora_codec_data, | ||
| 420 | .vmmc1 = &pandora_vmmc1, | ||
| 421 | .vmmc2 = &pandora_vmmc2, | ||
| 422 | .vdac = &pandora_vdac, | ||
| 423 | @@ -548,6 +533,8 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = { | ||
| 424 | |||
| 425 | static int __init omap3pandora_i2c_init(void) | ||
| 426 | { | ||
| 427 | + omap3_pmic_get_config(&omap3pandora_twldata, | ||
| 428 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 429 | omap3_pmic_init("tps65950", &omap3pandora_twldata); | ||
| 430 | /* i2c2 pins are not connected */ | ||
| 431 | omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo, | ||
| 432 | diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 433 | index b8ad4dd..6e59e59 100644 | ||
| 434 | --- a/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 435 | +++ b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 436 | @@ -349,10 +349,6 @@ static struct twl4030_gpio_platform_data omap3stalker_gpio_data = { | ||
| 437 | .setup = omap3stalker_twl_gpio_setup, | ||
| 438 | }; | ||
| 439 | |||
| 440 | -static struct twl4030_usb_data omap3stalker_usb_data = { | ||
| 441 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 442 | -}; | ||
| 443 | - | ||
| 444 | static uint32_t board_keymap[] = { | ||
| 445 | KEY(0, 0, KEY_LEFT), | ||
| 446 | KEY(0, 1, KEY_DOWN), | ||
| 447 | @@ -387,17 +383,6 @@ static struct twl4030_keypad_data omap3stalker_kp_data = { | ||
| 448 | .rep = 1, | ||
| 449 | }; | ||
| 450 | |||
| 451 | -static struct twl4030_madc_platform_data omap3stalker_madc_data = { | ||
| 452 | - .irq_line = 1, | ||
| 453 | -}; | ||
| 454 | - | ||
| 455 | -static struct twl4030_codec_audio_data omap3stalker_audio_data; | ||
| 456 | - | ||
| 457 | -static struct twl4030_codec_data omap3stalker_codec_data = { | ||
| 458 | - .audio_mclk = 26000000, | ||
| 459 | - .audio = &omap3stalker_audio_data, | ||
| 460 | -}; | ||
| 461 | - | ||
| 462 | static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = { | ||
| 463 | REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 464 | }; | ||
| 465 | @@ -439,15 +424,9 @@ static struct regulator_init_data omap3_stalker_vpll2 = { | ||
| 466 | }; | ||
| 467 | |||
| 468 | static struct twl4030_platform_data omap3stalker_twldata = { | ||
| 469 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 470 | - .irq_end = TWL4030_IRQ_END, | ||
| 471 | - | ||
| 472 | /* platform_data for children goes here */ | ||
| 473 | .keypad = &omap3stalker_kp_data, | ||
| 474 | - .madc = &omap3stalker_madc_data, | ||
| 475 | - .usb = &omap3stalker_usb_data, | ||
| 476 | .gpio = &omap3stalker_gpio_data, | ||
| 477 | - .codec = &omap3stalker_codec_data, | ||
| 478 | .vdac = &omap3_stalker_vdac, | ||
| 479 | .vpll2 = &omap3_stalker_vpll2, | ||
| 480 | .vmmc1 = &omap3stalker_vmmc1, | ||
| 481 | @@ -470,6 +449,9 @@ static struct i2c_board_info __initdata omap3stalker_i2c_boardinfo3[] = { | ||
| 482 | |||
| 483 | static int __init omap3_stalker_i2c_init(void) | ||
| 484 | { | ||
| 485 | + omap3_pmic_get_config(&omap3stalker_twldata, | ||
| 486 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | | ||
| 487 | + TWL_COMMON_PDATA_AUDIO, 0); | ||
| 488 | omap3_pmic_init("twl4030", &omap3stalker_twldata); | ||
| 489 | omap_register_i2c_bus(2, 400, NULL, 0); | ||
| 490 | omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, | ||
| 491 | diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 492 | index 57e6ed3..717972c 100644 | ||
| 493 | --- a/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 494 | +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 495 | @@ -235,25 +235,9 @@ static struct regulator_init_data touchbook_vpll2 = { | ||
| 496 | .consumer_supplies = touchbook_vdvi_supply, | ||
| 497 | }; | ||
| 498 | |||
| 499 | -static struct twl4030_usb_data touchbook_usb_data = { | ||
| 500 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 501 | -}; | ||
| 502 | - | ||
| 503 | -static struct twl4030_codec_audio_data touchbook_audio_data; | ||
| 504 | - | ||
| 505 | -static struct twl4030_codec_data touchbook_codec_data = { | ||
| 506 | - .audio_mclk = 26000000, | ||
| 507 | - .audio = &touchbook_audio_data, | ||
| 508 | -}; | ||
| 509 | - | ||
| 510 | static struct twl4030_platform_data touchbook_twldata = { | ||
| 511 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 512 | - .irq_end = TWL4030_IRQ_END, | ||
| 513 | - | ||
| 514 | /* platform_data for children goes here */ | ||
| 515 | - .usb = &touchbook_usb_data, | ||
| 516 | .gpio = &touchbook_gpio_data, | ||
| 517 | - .codec = &touchbook_codec_data, | ||
| 518 | .vmmc1 = &touchbook_vmmc1, | ||
| 519 | .vsim = &touchbook_vsim, | ||
| 520 | .vdac = &touchbook_vdac, | ||
| 521 | @@ -269,8 +253,9 @@ static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { | ||
| 522 | static int __init omap3_touchbook_i2c_init(void) | ||
| 523 | { | ||
| 524 | /* Standard TouchBook bus */ | ||
| 525 | + omap3_pmic_get_config(&touchbook_twldata, | ||
| 526 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 527 | omap3_pmic_init("twl4030", &touchbook_twldata); | ||
| 528 | - | ||
| 529 | /* Additional TouchBook bus */ | ||
| 530 | omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, | ||
| 531 | ARRAY_SIZE(touchBook_i2c_boardinfo)); | ||
| 532 | diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c | ||
| 533 | index 1bf2f39..776b444 100644 | ||
| 534 | --- a/arch/arm/mach-omap2/board-overo.c | ||
| 535 | +++ b/arch/arm/mach-omap2/board-overo.c | ||
| 536 | @@ -433,10 +433,6 @@ static struct twl4030_gpio_platform_data overo_gpio_data = { | ||
| 537 | .setup = overo_twl_gpio_setup, | ||
| 538 | }; | ||
| 539 | |||
| 540 | -static struct twl4030_usb_data overo_usb_data = { | ||
| 541 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 542 | -}; | ||
| 543 | - | ||
| 544 | static struct regulator_init_data overo_vmmc1 = { | ||
| 545 | .constraints = { | ||
| 546 | .min_uV = 1850000, | ||
| 547 | @@ -480,19 +476,8 @@ static struct regulator_init_data overo_vpll2 = { | ||
| 548 | .consumer_supplies = overo_vdds_dsi_supply, | ||
| 549 | }; | ||
| 550 | |||
| 551 | -static struct twl4030_codec_audio_data overo_audio_data; | ||
| 552 | - | ||
| 553 | -static struct twl4030_codec_data overo_codec_data = { | ||
| 554 | - .audio_mclk = 26000000, | ||
| 555 | - .audio = &overo_audio_data, | ||
| 556 | -}; | ||
| 557 | - | ||
| 558 | static struct twl4030_platform_data overo_twldata = { | ||
| 559 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 560 | - .irq_end = TWL4030_IRQ_END, | ||
| 561 | .gpio = &overo_gpio_data, | ||
| 562 | - .usb = &overo_usb_data, | ||
| 563 | - .codec = &overo_codec_data, | ||
| 564 | .vmmc1 = &overo_vmmc1, | ||
| 565 | .vdac = &overo_vdac, | ||
| 566 | .vpll2 = &overo_vpll2, | ||
| 567 | @@ -500,6 +485,8 @@ static struct twl4030_platform_data overo_twldata = { | ||
| 568 | |||
| 569 | static int __init overo_i2c_init(void) | ||
| 570 | { | ||
| 571 | + omap3_pmic_get_config(&overo_twldata, | ||
| 572 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 573 | omap3_pmic_init("tps65950", &overo_twldata); | ||
| 574 | /* i2c2 pins are used for gpio */ | ||
| 575 | omap_register_i2c_bus(3, 400, NULL, 0); | ||
| 576 | diff --git a/arch/arm/mach-omap2/board-rm680.c b/arch/arm/mach-omap2/board-rm680.c | ||
| 577 | index 54dceb1..7dfed24 100644 | ||
| 578 | --- a/arch/arm/mach-omap2/board-rm680.c | ||
| 579 | +++ b/arch/arm/mach-omap2/board-rm680.c | ||
| 580 | @@ -79,20 +79,14 @@ static struct twl4030_gpio_platform_data rm680_gpio_data = { | ||
| 581 | .pulldowns = BIT(1) | BIT(2) | BIT(8) | BIT(15), | ||
| 582 | }; | ||
| 583 | |||
| 584 | -static struct twl4030_usb_data rm680_usb_data = { | ||
| 585 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 586 | -}; | ||
| 587 | - | ||
| 588 | static struct twl4030_platform_data rm680_twl_data = { | ||
| 589 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 590 | - .irq_end = TWL4030_IRQ_END, | ||
| 591 | .gpio = &rm680_gpio_data, | ||
| 592 | - .usb = &rm680_usb_data, | ||
| 593 | /* add rest of the children here */ | ||
| 594 | }; | ||
| 595 | |||
| 596 | static void __init rm680_i2c_init(void) | ||
| 597 | { | ||
| 598 | + omap3_pmic_get_config(&rm680_twl_data, TWL_COMMON_PDATA_USB, 0); | ||
| 599 | omap_pmic_init(1, 2900, "twl5031", INT_34XX_SYS_NIRQ, &rm680_twl_data); | ||
| 600 | omap_register_i2c_bus(2, 400, NULL, 0); | ||
| 601 | omap_register_i2c_bus(3, 400, NULL, 0); | ||
| 602 | diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c | ||
| 603 | index b633ba8..3cdea39 100644 | ||
| 604 | --- a/arch/arm/mach-omap2/board-rx51-peripherals.c | ||
| 605 | +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | ||
| 606 | @@ -288,10 +288,6 @@ static struct twl4030_keypad_data rx51_kp_data = { | ||
| 607 | .rep = 1, | ||
| 608 | }; | ||
| 609 | |||
| 610 | -static struct twl4030_madc_platform_data rx51_madc_data = { | ||
| 611 | - .irq_line = 1, | ||
| 612 | -}; | ||
| 613 | - | ||
| 614 | /* Enable input logic and pull all lines up when eMMC is on. */ | ||
| 615 | static struct omap_board_mux rx51_mmc2_on_mux[] = { | ||
| 616 | OMAP3_MUX(SDMMC2_CMD, OMAP_PIN_INPUT_PULLUP | OMAP_MUX_MODE0), | ||
| 617 | @@ -603,10 +599,6 @@ static struct twl4030_gpio_platform_data rx51_gpio_data = { | ||
| 618 | .setup = rx51_twlgpio_setup, | ||
| 619 | }; | ||
| 620 | |||
| 621 | -static struct twl4030_usb_data rx51_usb_data = { | ||
| 622 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 623 | -}; | ||
| 624 | - | ||
| 625 | static struct twl4030_ins sleep_on_seq[] __initdata = { | ||
| 626 | /* | ||
| 627 | * Turn off everything | ||
| 628 | @@ -778,14 +770,9 @@ struct twl4030_codec_data rx51_codec_data __initdata = { | ||
| 629 | }; | ||
| 630 | |||
| 631 | static struct twl4030_platform_data rx51_twldata __initdata = { | ||
| 632 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 633 | - .irq_end = TWL4030_IRQ_END, | ||
| 634 | - | ||
| 635 | /* platform_data for children goes here */ | ||
| 636 | .gpio = &rx51_gpio_data, | ||
| 637 | .keypad = &rx51_kp_data, | ||
| 638 | - .madc = &rx51_madc_data, | ||
| 639 | - .usb = &rx51_usb_data, | ||
| 640 | .power = &rx51_t2scripts_data, | ||
| 641 | .codec = &rx51_codec_data, | ||
| 642 | |||
| 643 | @@ -850,6 +837,8 @@ static int __init rx51_i2c_init(void) | ||
| 644 | rx51_twldata.vaux3 = &rx51_vaux3_cam; | ||
| 645 | } | ||
| 646 | rx51_twldata.vmmc2 = &rx51_vmmc2; | ||
| 647 | + omap3_pmic_get_config(&rx51_twldata, | ||
| 648 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0); | ||
| 649 | omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata); | ||
| 650 | omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, | ||
| 651 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); | ||
| 652 | diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c | ||
| 653 | index 8495f82..6d8df1b 100644 | ||
| 654 | --- a/arch/arm/mach-omap2/board-zoom-peripherals.c | ||
| 655 | +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c | ||
| 656 | @@ -285,26 +285,6 @@ static void zoom2_set_hs_extmute(int mute) | ||
| 657 | gpio_set_value(ZOOM2_HEADSET_EXTMUTE_GPIO, mute); | ||
| 658 | } | ||
| 659 | |||
| 660 | -static int zoom_batt_table[] = { | ||
| 661 | -/* 0 C*/ | ||
| 662 | -30800, 29500, 28300, 27100, | ||
| 663 | -26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, | ||
| 664 | -17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, | ||
| 665 | -11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, | ||
| 666 | -8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, | ||
| 667 | -5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, | ||
| 668 | -4040, 3910, 3790, 3670, 3550 | ||
| 669 | -}; | ||
| 670 | - | ||
| 671 | -static struct twl4030_bci_platform_data zoom_bci_data = { | ||
| 672 | - .battery_tmp_tbl = zoom_batt_table, | ||
| 673 | - .tblsize = ARRAY_SIZE(zoom_batt_table), | ||
| 674 | -}; | ||
| 675 | - | ||
| 676 | -static struct twl4030_usb_data zoom_usb_data = { | ||
| 677 | - .usb_mode = T2_USB_MODE_ULPI, | ||
| 678 | -}; | ||
| 679 | - | ||
| 680 | static struct twl4030_gpio_platform_data zoom_gpio_data = { | ||
| 681 | .gpio_base = OMAP_MAX_GPIO_LINES, | ||
| 682 | .irq_base = TWL4030_GPIO_IRQ_BASE, | ||
| 683 | @@ -312,28 +292,10 @@ static struct twl4030_gpio_platform_data zoom_gpio_data = { | ||
| 684 | .setup = zoom_twl_gpio_setup, | ||
| 685 | }; | ||
| 686 | |||
| 687 | -static struct twl4030_madc_platform_data zoom_madc_data = { | ||
| 688 | - .irq_line = 1, | ||
| 689 | -}; | ||
| 690 | - | ||
| 691 | -static struct twl4030_codec_audio_data zoom_audio_data; | ||
| 692 | - | ||
| 693 | -static struct twl4030_codec_data zoom_codec_data = { | ||
| 694 | - .audio_mclk = 26000000, | ||
| 695 | - .audio = &zoom_audio_data, | ||
| 696 | -}; | ||
| 697 | - | ||
| 698 | static struct twl4030_platform_data zoom_twldata = { | ||
| 699 | - .irq_base = TWL4030_IRQ_BASE, | ||
| 700 | - .irq_end = TWL4030_IRQ_END, | ||
| 701 | - | ||
| 702 | /* platform_data for children goes here */ | ||
| 703 | - .bci = &zoom_bci_data, | ||
| 704 | - .madc = &zoom_madc_data, | ||
| 705 | - .usb = &zoom_usb_data, | ||
| 706 | .gpio = &zoom_gpio_data, | ||
| 707 | .keypad = &zoom_kp_twl4030_data, | ||
| 708 | - .codec = &zoom_codec_data, | ||
| 709 | .vmmc1 = &zoom_vmmc1, | ||
| 710 | .vmmc2 = &zoom_vmmc2, | ||
| 711 | .vsim = &zoom_vsim, | ||
| 712 | @@ -343,10 +305,17 @@ static struct twl4030_platform_data zoom_twldata = { | ||
| 713 | |||
| 714 | static int __init omap_i2c_init(void) | ||
| 715 | { | ||
| 716 | + omap3_pmic_get_config(&zoom_twldata, | ||
| 717 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | | ||
| 718 | + TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 719 | + | ||
| 720 | if (machine_is_omap_zoom2()) { | ||
| 721 | - zoom_audio_data.ramp_delay_value = 3; /* 161 ms */ | ||
| 722 | - zoom_audio_data.hs_extmute = 1; | ||
| 723 | - zoom_audio_data.set_hs_extmute = zoom2_set_hs_extmute; | ||
| 724 | + struct twl4030_codec_audio_data *audio_data; | ||
| 725 | + audio_data = zoom_twldata.codec->audio; | ||
| 726 | + | ||
| 727 | + audio_data->ramp_delay_value = 3; /* 161 ms */ | ||
| 728 | + audio_data->hs_extmute = 1; | ||
| 729 | + audio_data->set_hs_extmute = zoom2_set_hs_extmute; | ||
| 730 | } | ||
| 731 | omap_pmic_init(1, 2400, "twl5030", INT_34XX_SYS_NIRQ, &zoom_twldata); | ||
| 732 | omap_register_i2c_bus(2, 400, NULL, 0); | ||
| 733 | diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c | ||
| 734 | index cf80f4c..9e8decf 100644 | ||
| 735 | --- a/arch/arm/mach-omap2/twl-common.c | ||
| 736 | +++ b/arch/arm/mach-omap2/twl-common.c | ||
| 737 | @@ -56,6 +56,37 @@ static struct twl4030_usb_data omap4_usb_pdata = { | ||
| 738 | .phy_suspend = omap4430_phy_suspend, | ||
| 739 | }; | ||
| 740 | |||
| 741 | +static struct twl4030_usb_data omap3_usb_pdata = { | ||
| 742 | + .usb_mode = T2_USB_MODE_ULPI, | ||
| 743 | +}; | ||
| 744 | + | ||
| 745 | +static int omap3_batt_table[] = { | ||
| 746 | +/* 0 C */ | ||
| 747 | +30800, 29500, 28300, 27100, | ||
| 748 | +26000, 24900, 23900, 22900, 22000, 21100, 20300, 19400, 18700, 17900, | ||
| 749 | +17200, 16500, 15900, 15300, 14700, 14100, 13600, 13100, 12600, 12100, | ||
| 750 | +11600, 11200, 10800, 10400, 10000, 9630, 9280, 8950, 8620, 8310, | ||
| 751 | +8020, 7730, 7460, 7200, 6950, 6710, 6470, 6250, 6040, 5830, | ||
| 752 | +5640, 5450, 5260, 5090, 4920, 4760, 4600, 4450, 4310, 4170, | ||
| 753 | +4040, 3910, 3790, 3670, 3550 | ||
| 754 | +}; | ||
| 755 | + | ||
| 756 | +static struct twl4030_bci_platform_data omap3_bci_pdata = { | ||
| 757 | + .battery_tmp_tbl = omap3_batt_table, | ||
| 758 | + .tblsize = ARRAY_SIZE(omap3_batt_table), | ||
| 759 | +}; | ||
| 760 | + | ||
| 761 | +static struct twl4030_madc_platform_data omap3_madc_pdata = { | ||
| 762 | + .irq_line = 1, | ||
| 763 | +}; | ||
| 764 | + | ||
| 765 | +static struct twl4030_codec_audio_data omap3_audio; | ||
| 766 | + | ||
| 767 | +static struct twl4030_codec_data omap3_codec_pdata = { | ||
| 768 | + .audio_mclk = 26000000, | ||
| 769 | + .audio = &omap3_audio, | ||
| 770 | +}; | ||
| 771 | + | ||
| 772 | static struct regulator_init_data omap4_vdac_idata = { | ||
| 773 | .constraints = { | ||
| 774 | .min_uV = 1800000, | ||
| 775 | @@ -207,3 +238,25 @@ void __init omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, | ||
| 776 | !pmic_data->clk32kg) | ||
| 777 | pmic_data->clk32kg = &omap4_clk32kg_idata; | ||
| 778 | } | ||
| 779 | + | ||
| 780 | +void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, | ||
| 781 | + u32 pdata_flags, u32 regulators_flags) | ||
| 782 | +{ | ||
| 783 | + if (!pmic_data->irq_base) | ||
| 784 | + pmic_data->irq_base = TWL4030_IRQ_BASE; | ||
| 785 | + if (!pmic_data->irq_end) | ||
| 786 | + pmic_data->irq_end = TWL4030_IRQ_END; | ||
| 787 | + | ||
| 788 | + /* Common platform data configurations */ | ||
| 789 | + if (pdata_flags & TWL_COMMON_PDATA_USB && !pmic_data->usb) | ||
| 790 | + pmic_data->usb = &omap3_usb_pdata; | ||
| 791 | + | ||
| 792 | + if (pdata_flags & TWL_COMMON_PDATA_BCI && !pmic_data->bci) | ||
| 793 | + pmic_data->bci = &omap3_bci_pdata; | ||
| 794 | + | ||
| 795 | + if (pdata_flags & TWL_COMMON_PDATA_MADC && !pmic_data->madc) | ||
| 796 | + pmic_data->madc = &omap3_madc_pdata; | ||
| 797 | + | ||
| 798 | + if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec) | ||
| 799 | + pmic_data->codec = &omap3_codec_pdata; | ||
| 800 | +} | ||
| 801 | diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h | ||
| 802 | index d96c289..3b4b05d 100644 | ||
| 803 | --- a/arch/arm/mach-omap2/twl-common.h | ||
| 804 | +++ b/arch/arm/mach-omap2/twl-common.h | ||
| 805 | @@ -2,6 +2,9 @@ | ||
| 806 | #define __OMAP_PMIC_COMMON__ | ||
| 807 | |||
| 808 | #define TWL_COMMON_PDATA_USB (1 << 0) | ||
| 809 | +#define TWL_COMMON_PDATA_BCI (1 << 1) | ||
| 810 | +#define TWL_COMMON_PDATA_MADC (1 << 2) | ||
| 811 | +#define TWL_COMMON_PDATA_AUDIO (1 << 3) | ||
| 812 | |||
| 813 | /* Common LDO regulators for TWL4030/TWL6030 */ | ||
| 814 | #define TWL_COMMON_REGULATOR_VDAC (1 << 0) | ||
| 815 | @@ -42,6 +45,9 @@ static inline void omap4_pmic_init(const char *pmic_type, | ||
| 816 | omap_pmic_init(1, 400, pmic_type, OMAP44XX_IRQ_SYS_1N, pmic_data); | ||
| 817 | } | ||
| 818 | |||
| 819 | +void omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, | ||
| 820 | + u32 pdata_flags, u32 regulators_flags); | ||
| 821 | + | ||
| 822 | void omap4_pmic_get_config(struct twl4030_platform_data *pmic_data, | ||
| 823 | u32 pdata_flags, u32 regulators_flags); | ||
| 824 | |||
| 825 | -- | ||
| 826 | 1.7.2.5 | ||
| 827 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0025-OMAP3-Move-common-regulator-configuration-to-twl-com.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0025-OMAP3-Move-common-regulator-configuration-to-twl-com.patch deleted file mode 100644 index 4ea0acad..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0025-OMAP3-Move-common-regulator-configuration-to-twl-com.patch +++ /dev/null | |||
| @@ -1,924 +0,0 @@ | |||
| 1 | From df02a0c8e1d42d1f861d138d1283172872c602ed Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 3 | Date: Tue, 7 Jun 2011 11:38:24 +0300 | ||
| 4 | Subject: [PATCH 025/149] OMAP3: Move common regulator configuration to twl-common | ||
| 5 | |||
| 6 | Some regulator config can be moved out from board files, | ||
| 7 | since they are close to identical. | ||
| 8 | |||
| 9 | Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> | ||
| 10 | Acked-by: Tony Lindgren <tony@atomide.com> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/board-3430sdp.c | 51 ++++---------------------- | ||
| 13 | arch/arm/mach-omap2/board-cm-t35.c | 44 ++++------------------ | ||
| 14 | arch/arm/mach-omap2/board-devkit8000.c | 22 +---------- | ||
| 15 | arch/arm/mach-omap2/board-igep0020.c | 28 +++------------ | ||
| 16 | arch/arm/mach-omap2/board-omap3beagle.c | 46 +++--------------------- | ||
| 17 | arch/arm/mach-omap2/board-omap3evm.c | 50 ++++---------------------- | ||
| 18 | arch/arm/mach-omap2/board-omap3pandora.c | 47 +++++------------------- | ||
| 19 | arch/arm/mach-omap2/board-omap3stalker.c | 50 ++++---------------------- | ||
| 20 | arch/arm/mach-omap2/board-omap3touchbook.c | 44 ++++++---------------- | ||
| 21 | arch/arm/mach-omap2/board-overo.c | 46 +++--------------------- | ||
| 22 | arch/arm/mach-omap2/board-rx51-peripherals.c | 27 +++----------- | ||
| 23 | arch/arm/mach-omap2/board-zoom-peripherals.c | 42 ++-------------------- | ||
| 24 | arch/arm/mach-omap2/twl-common.c | 42 +++++++++++++++++++++ | ||
| 25 | arch/arm/mach-omap2/twl-common.h | 5 +++ | ||
| 26 | 14 files changed, 124 insertions(+), 420 deletions(-) | ||
| 27 | |||
| 28 | diff --git a/arch/arm/mach-omap2/board-3430sdp.c b/arch/arm/mach-omap2/board-3430sdp.c | ||
| 29 | index 8bbd4e0..bd600cf 100644 | ||
| 30 | --- a/arch/arm/mach-omap2/board-3430sdp.c | ||
| 31 | +++ b/arch/arm/mach-omap2/board-3430sdp.c | ||
| 32 | @@ -283,16 +283,6 @@ static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = { | ||
| 33 | REGULATOR_SUPPLY("vcc", "spi1.0"), | ||
| 34 | }; | ||
| 35 | |||
| 36 | -static struct regulator_consumer_supply sdp3430_vdda_dac_supplies[] = { | ||
| 37 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 38 | -}; | ||
| 39 | - | ||
| 40 | -/* VPLL2 for digital video outputs */ | ||
| 41 | -static struct regulator_consumer_supply sdp3430_vpll2_supplies[] = { | ||
| 42 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | ||
| 43 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | ||
| 44 | -}; | ||
| 45 | - | ||
| 46 | static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = { | ||
| 47 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"), | ||
| 48 | }; | ||
| 49 | @@ -409,36 +399,6 @@ static struct regulator_init_data sdp3430_vsim = { | ||
| 50 | .consumer_supplies = sdp3430_vsim_supplies, | ||
| 51 | }; | ||
| 52 | |||
| 53 | -/* VDAC for DSS driving S-Video */ | ||
| 54 | -static struct regulator_init_data sdp3430_vdac = { | ||
| 55 | - .constraints = { | ||
| 56 | - .min_uV = 1800000, | ||
| 57 | - .max_uV = 1800000, | ||
| 58 | - .apply_uV = true, | ||
| 59 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 60 | - | REGULATOR_MODE_STANDBY, | ||
| 61 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 62 | - | REGULATOR_CHANGE_STATUS, | ||
| 63 | - }, | ||
| 64 | - .num_consumer_supplies = ARRAY_SIZE(sdp3430_vdda_dac_supplies), | ||
| 65 | - .consumer_supplies = sdp3430_vdda_dac_supplies, | ||
| 66 | -}; | ||
| 67 | - | ||
| 68 | -static struct regulator_init_data sdp3430_vpll2 = { | ||
| 69 | - .constraints = { | ||
| 70 | - .name = "VDVI", | ||
| 71 | - .min_uV = 1800000, | ||
| 72 | - .max_uV = 1800000, | ||
| 73 | - .apply_uV = true, | ||
| 74 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 75 | - | REGULATOR_MODE_STANDBY, | ||
| 76 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 77 | - | REGULATOR_CHANGE_STATUS, | ||
| 78 | - }, | ||
| 79 | - .num_consumer_supplies = ARRAY_SIZE(sdp3430_vpll2_supplies), | ||
| 80 | - .consumer_supplies = sdp3430_vpll2_supplies, | ||
| 81 | -}; | ||
| 82 | - | ||
| 83 | static struct twl4030_platform_data sdp3430_twldata = { | ||
| 84 | /* platform_data for children goes here */ | ||
| 85 | .gpio = &sdp3430_gpio_data, | ||
| 86 | @@ -451,16 +411,19 @@ static struct twl4030_platform_data sdp3430_twldata = { | ||
| 87 | .vmmc1 = &sdp3430_vmmc1, | ||
| 88 | .vmmc2 = &sdp3430_vmmc2, | ||
| 89 | .vsim = &sdp3430_vsim, | ||
| 90 | - .vdac = &sdp3430_vdac, | ||
| 91 | - .vpll2 = &sdp3430_vpll2, | ||
| 92 | }; | ||
| 93 | |||
| 94 | static int __init omap3430_i2c_init(void) | ||
| 95 | { | ||
| 96 | /* i2c1 for PMIC only */ | ||
| 97 | omap3_pmic_get_config(&sdp3430_twldata, | ||
| 98 | - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | | ||
| 99 | - TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 100 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | | ||
| 101 | + TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, | ||
| 102 | + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | ||
| 103 | + sdp3430_twldata.vdac->constraints.apply_uV = true; | ||
| 104 | + sdp3430_twldata.vpll2->constraints.apply_uV = true; | ||
| 105 | + sdp3430_twldata.vpll2->constraints.name = "VDVI"; | ||
| 106 | + | ||
| 107 | omap3_pmic_init("twl4030", &sdp3430_twldata); | ||
| 108 | |||
| 109 | /* i2c2 on camera connector (for sensor control) and optional isp1301 */ | ||
| 110 | diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 111 | index cb00abc..35891d4 100644 | ||
| 112 | --- a/arch/arm/mach-omap2/board-cm-t35.c | ||
| 113 | +++ b/arch/arm/mach-omap2/board-cm-t35.c | ||
| 114 | @@ -343,10 +343,6 @@ static struct regulator_consumer_supply cm_t35_vsim_supply[] = { | ||
| 115 | REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"), | ||
| 116 | }; | ||
| 117 | |||
| 118 | -static struct regulator_consumer_supply cm_t35_vdac_supply[] = { | ||
| 119 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 120 | -}; | ||
| 121 | - | ||
| 122 | static struct regulator_consumer_supply cm_t35_vdvi_supply[] = { | ||
| 123 | REGULATOR_SUPPLY("vdvi", "omapdss"), | ||
| 124 | }; | ||
| 125 | @@ -381,35 +377,6 @@ static struct regulator_init_data cm_t35_vsim = { | ||
| 126 | .consumer_supplies = cm_t35_vsim_supply, | ||
| 127 | }; | ||
| 128 | |||
| 129 | -/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ | ||
| 130 | -static struct regulator_init_data cm_t35_vdac = { | ||
| 131 | - .constraints = { | ||
| 132 | - .min_uV = 1800000, | ||
| 133 | - .max_uV = 1800000, | ||
| 134 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 135 | - | REGULATOR_MODE_STANDBY, | ||
| 136 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 137 | - | REGULATOR_CHANGE_STATUS, | ||
| 138 | - }, | ||
| 139 | - .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdac_supply), | ||
| 140 | - .consumer_supplies = cm_t35_vdac_supply, | ||
| 141 | -}; | ||
| 142 | - | ||
| 143 | -/* VPLL2 for digital video outputs */ | ||
| 144 | -static struct regulator_init_data cm_t35_vpll2 = { | ||
| 145 | - .constraints = { | ||
| 146 | - .name = "VDVI", | ||
| 147 | - .min_uV = 1800000, | ||
| 148 | - .max_uV = 1800000, | ||
| 149 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 150 | - | REGULATOR_MODE_STANDBY, | ||
| 151 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 152 | - | REGULATOR_CHANGE_STATUS, | ||
| 153 | - }, | ||
| 154 | - .num_consumer_supplies = ARRAY_SIZE(cm_t35_vdvi_supply), | ||
| 155 | - .consumer_supplies = cm_t35_vdvi_supply, | ||
| 156 | -}; | ||
| 157 | - | ||
| 158 | static uint32_t cm_t35_keymap[] = { | ||
| 159 | KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT), | ||
| 160 | KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN), | ||
| 161 | @@ -493,13 +460,18 @@ static struct twl4030_platform_data cm_t35_twldata = { | ||
| 162 | .gpio = &cm_t35_gpio_data, | ||
| 163 | .vmmc1 = &cm_t35_vmmc1, | ||
| 164 | .vsim = &cm_t35_vsim, | ||
| 165 | - .vdac = &cm_t35_vdac, | ||
| 166 | - .vpll2 = &cm_t35_vpll2, | ||
| 167 | }; | ||
| 168 | |||
| 169 | static void __init cm_t35_init_i2c(void) | ||
| 170 | { | ||
| 171 | - omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, 0); | ||
| 172 | + omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB, | ||
| 173 | + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | ||
| 174 | + | ||
| 175 | + cm_t35_twldata.vpll2->constraints.name = "VDVI"; | ||
| 176 | + cm_t35_twldata.vpll2->num_consumer_supplies = | ||
| 177 | + ARRAY_SIZE(cm_t35_vdvi_supply); | ||
| 178 | + cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply; | ||
| 179 | + | ||
| 180 | omap3_pmic_init("tps65930", &cm_t35_twldata); | ||
| 181 | } | ||
| 182 | |||
| 183 | diff --git a/arch/arm/mach-omap2/board-devkit8000.c b/arch/arm/mach-omap2/board-devkit8000.c | ||
| 184 | index 364942e..b6002ec 100644 | ||
| 185 | --- a/arch/arm/mach-omap2/board-devkit8000.c | ||
| 186 | +++ b/arch/arm/mach-omap2/board-devkit8000.c | ||
| 187 | @@ -186,10 +186,6 @@ static struct omap_dss_board_info devkit8000_dss_data = { | ||
| 188 | .default_device = &devkit8000_lcd_device, | ||
| 189 | }; | ||
| 190 | |||
| 191 | -static struct regulator_consumer_supply devkit8000_vdda_dac_supply[] = { | ||
| 192 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 193 | -}; | ||
| 194 | - | ||
| 195 | static uint32_t board_keymap[] = { | ||
| 196 | KEY(0, 0, KEY_1), | ||
| 197 | KEY(1, 0, KEY_2), | ||
| 198 | @@ -289,20 +285,6 @@ static struct regulator_init_data devkit8000_vmmc1 = { | ||
| 199 | .consumer_supplies = devkit8000_vmmc1_supply, | ||
| 200 | }; | ||
| 201 | |||
| 202 | -/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ | ||
| 203 | -static struct regulator_init_data devkit8000_vdac = { | ||
| 204 | - .constraints = { | ||
| 205 | - .min_uV = 1800000, | ||
| 206 | - .max_uV = 1800000, | ||
| 207 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 208 | - | REGULATOR_MODE_STANDBY, | ||
| 209 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 210 | - | REGULATOR_CHANGE_STATUS, | ||
| 211 | - }, | ||
| 212 | - .num_consumer_supplies = ARRAY_SIZE(devkit8000_vdda_dac_supply), | ||
| 213 | - .consumer_supplies = devkit8000_vdda_dac_supply, | ||
| 214 | -}; | ||
| 215 | - | ||
| 216 | /* VPLL1 for digital video outputs */ | ||
| 217 | static struct regulator_init_data devkit8000_vpll1 = { | ||
| 218 | .constraints = { | ||
| 219 | @@ -336,7 +318,6 @@ static struct twl4030_platform_data devkit8000_twldata = { | ||
| 220 | /* platform_data for children goes here */ | ||
| 221 | .gpio = &devkit8000_gpio_data, | ||
| 222 | .vmmc1 = &devkit8000_vmmc1, | ||
| 223 | - .vdac = &devkit8000_vdac, | ||
| 224 | .vpll1 = &devkit8000_vpll1, | ||
| 225 | .vio = &devkit8000_vio, | ||
| 226 | .keypad = &devkit8000_kp_data, | ||
| 227 | @@ -345,7 +326,8 @@ static struct twl4030_platform_data devkit8000_twldata = { | ||
| 228 | static int __init devkit8000_i2c_init(void) | ||
| 229 | { | ||
| 230 | omap3_pmic_get_config(&devkit8000_twldata, | ||
| 231 | - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 232 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, | ||
| 233 | + TWL_COMMON_REGULATOR_VDAC); | ||
| 234 | omap3_pmic_init("tps65930", &devkit8000_twldata); | ||
| 235 | /* Bus 3 is attached to the DVI port where devices like the pico DLP | ||
| 236 | * projector don't work reliably with 400kHz */ | ||
| 237 | diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c | ||
| 238 | index e0a6687..35be778 100644 | ||
| 239 | --- a/arch/arm/mach-omap2/board-igep0020.c | ||
| 240 | +++ b/arch/arm/mach-omap2/board-igep0020.c | ||
| 241 | @@ -479,26 +479,6 @@ static struct omap_dss_board_info igep2_dss_data = { | ||
| 242 | .default_device = &igep2_dvi_device, | ||
| 243 | }; | ||
| 244 | |||
| 245 | -static struct regulator_consumer_supply igep2_vpll2_supplies[] = { | ||
| 246 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | ||
| 247 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | ||
| 248 | -}; | ||
| 249 | - | ||
| 250 | -static struct regulator_init_data igep2_vpll2 = { | ||
| 251 | - .constraints = { | ||
| 252 | - .name = "VDVI", | ||
| 253 | - .min_uV = 1800000, | ||
| 254 | - .max_uV = 1800000, | ||
| 255 | - .apply_uV = true, | ||
| 256 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 257 | - | REGULATOR_MODE_STANDBY, | ||
| 258 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 259 | - | REGULATOR_CHANGE_STATUS, | ||
| 260 | - }, | ||
| 261 | - .num_consumer_supplies = ARRAY_SIZE(igep2_vpll2_supplies), | ||
| 262 | - .consumer_supplies = igep2_vpll2_supplies, | ||
| 263 | -}; | ||
| 264 | - | ||
| 265 | static void __init igep2_display_init(void) | ||
| 266 | { | ||
| 267 | int err = gpio_request_one(IGEP2_GPIO_DVI_PUP, GPIOF_OUT_INIT_HIGH, | ||
| 268 | @@ -579,9 +559,11 @@ static void __init igep_i2c_init(void) | ||
| 269 | pr_warning("IGEP2: Could not register I2C3 bus (%d)\n", ret); | ||
| 270 | |||
| 271 | igep_twldata.keypad = &igep2_keypad_pdata; | ||
| 272 | - igep_twldata.vpll2 = &igep2_vpll2; | ||
| 273 | - /* Use common codec data */ | ||
| 274 | - omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, 0); | ||
| 275 | + /* Get common pmic data */ | ||
| 276 | + omap3_pmic_get_config(&igep_twldata, TWL_COMMON_PDATA_AUDIO, | ||
| 277 | + TWL_COMMON_REGULATOR_VPLL2); | ||
| 278 | + igep_twldata.vpll2->constraints.apply_uV = true; | ||
| 279 | + igep_twldata.vpll2->constraints.name = "VDVI"; | ||
| 280 | } | ||
| 281 | |||
| 282 | omap3_pmic_init("twl4030", &igep_twldata); | ||
| 283 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 284 | index ec61e9c..34f8411 100644 | ||
| 285 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 286 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 287 | @@ -209,15 +209,6 @@ static struct omap_dss_board_info beagle_dss_data = { | ||
| 288 | .default_device = &beagle_dvi_device, | ||
| 289 | }; | ||
| 290 | |||
| 291 | -static struct regulator_consumer_supply beagle_vdac_supply[] = { | ||
| 292 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 293 | -}; | ||
| 294 | - | ||
| 295 | -static struct regulator_consumer_supply beagle_vdvi_supplies[] = { | ||
| 296 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | ||
| 297 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | ||
| 298 | -}; | ||
| 299 | - | ||
| 300 | static void __init beagle_display_init(void) | ||
| 301 | { | ||
| 302 | int r; | ||
| 303 | @@ -351,42 +342,11 @@ static struct regulator_init_data beagle_vsim = { | ||
| 304 | .consumer_supplies = beagle_vsim_supply, | ||
| 305 | }; | ||
| 306 | |||
| 307 | -/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ | ||
| 308 | -static struct regulator_init_data beagle_vdac = { | ||
| 309 | - .constraints = { | ||
| 310 | - .min_uV = 1800000, | ||
| 311 | - .max_uV = 1800000, | ||
| 312 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 313 | - | REGULATOR_MODE_STANDBY, | ||
| 314 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 315 | - | REGULATOR_CHANGE_STATUS, | ||
| 316 | - }, | ||
| 317 | - .num_consumer_supplies = ARRAY_SIZE(beagle_vdac_supply), | ||
| 318 | - .consumer_supplies = beagle_vdac_supply, | ||
| 319 | -}; | ||
| 320 | - | ||
| 321 | -/* VPLL2 for digital video outputs */ | ||
| 322 | -static struct regulator_init_data beagle_vpll2 = { | ||
| 323 | - .constraints = { | ||
| 324 | - .name = "VDVI", | ||
| 325 | - .min_uV = 1800000, | ||
| 326 | - .max_uV = 1800000, | ||
| 327 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 328 | - | REGULATOR_MODE_STANDBY, | ||
| 329 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 330 | - | REGULATOR_CHANGE_STATUS, | ||
| 331 | - }, | ||
| 332 | - .num_consumer_supplies = ARRAY_SIZE(beagle_vdvi_supplies), | ||
| 333 | - .consumer_supplies = beagle_vdvi_supplies, | ||
| 334 | -}; | ||
| 335 | - | ||
| 336 | static struct twl4030_platform_data beagle_twldata = { | ||
| 337 | /* platform_data for children goes here */ | ||
| 338 | .gpio = &beagle_gpio_data, | ||
| 339 | .vmmc1 = &beagle_vmmc1, | ||
| 340 | .vsim = &beagle_vsim, | ||
| 341 | - .vdac = &beagle_vdac, | ||
| 342 | - .vpll2 = &beagle_vpll2, | ||
| 343 | }; | ||
| 344 | |||
| 345 | static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { | ||
| 346 | @@ -398,7 +358,11 @@ static struct i2c_board_info __initdata beagle_i2c_eeprom[] = { | ||
| 347 | static int __init omap3_beagle_i2c_init(void) | ||
| 348 | { | ||
| 349 | omap3_pmic_get_config(&beagle_twldata, | ||
| 350 | - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 351 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, | ||
| 352 | + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | ||
| 353 | + | ||
| 354 | + beagle_twldata.vpll2->constraints.name = "VDVI"; | ||
| 355 | + | ||
| 356 | omap3_pmic_init("twl4030", &beagle_twldata); | ||
| 357 | /* Bus 3 is attached to the DVI port where devices like the pico DLP | ||
| 358 | * projector don't work reliably with 400kHz */ | ||
| 359 | diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 360 | index 1ca298a..c452b3f 100644 | ||
| 361 | --- a/arch/arm/mach-omap2/board-omap3evm.c | ||
| 362 | +++ b/arch/arm/mach-omap2/board-omap3evm.c | ||
| 363 | @@ -430,45 +430,6 @@ static struct twl4030_keypad_data omap3evm_kp_data = { | ||
| 364 | .rep = 1, | ||
| 365 | }; | ||
| 366 | |||
| 367 | -static struct regulator_consumer_supply omap3_evm_vdda_dac_supply[] = { | ||
| 368 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 369 | -}; | ||
| 370 | - | ||
| 371 | -/* VDAC for DSS driving S-Video */ | ||
| 372 | -static struct regulator_init_data omap3_evm_vdac = { | ||
| 373 | - .constraints = { | ||
| 374 | - .min_uV = 1800000, | ||
| 375 | - .max_uV = 1800000, | ||
| 376 | - .apply_uV = true, | ||
| 377 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 378 | - | REGULATOR_MODE_STANDBY, | ||
| 379 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 380 | - | REGULATOR_CHANGE_STATUS, | ||
| 381 | - }, | ||
| 382 | - .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vdda_dac_supply), | ||
| 383 | - .consumer_supplies = omap3_evm_vdda_dac_supply, | ||
| 384 | -}; | ||
| 385 | - | ||
| 386 | -/* VPLL2 for digital video outputs */ | ||
| 387 | -static struct regulator_consumer_supply omap3_evm_vpll2_supplies[] = { | ||
| 388 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | ||
| 389 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | ||
| 390 | -}; | ||
| 391 | - | ||
| 392 | -static struct regulator_init_data omap3_evm_vpll2 = { | ||
| 393 | - .constraints = { | ||
| 394 | - .min_uV = 1800000, | ||
| 395 | - .max_uV = 1800000, | ||
| 396 | - .apply_uV = true, | ||
| 397 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 398 | - | REGULATOR_MODE_STANDBY, | ||
| 399 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 400 | - | REGULATOR_CHANGE_STATUS, | ||
| 401 | - }, | ||
| 402 | - .num_consumer_supplies = ARRAY_SIZE(omap3_evm_vpll2_supplies), | ||
| 403 | - .consumer_supplies = omap3_evm_vpll2_supplies, | ||
| 404 | -}; | ||
| 405 | - | ||
| 406 | /* ads7846 on SPI */ | ||
| 407 | static struct regulator_consumer_supply omap3evm_vio_supply[] = { | ||
| 408 | REGULATOR_SUPPLY("vcc", "spi1.0"), | ||
| 409 | @@ -535,8 +496,6 @@ static struct twl4030_platform_data omap3evm_twldata = { | ||
| 410 | /* platform_data for children goes here */ | ||
| 411 | .keypad = &omap3evm_kp_data, | ||
| 412 | .gpio = &omap3evm_gpio_data, | ||
| 413 | - .vdac = &omap3_evm_vdac, | ||
| 414 | - .vpll2 = &omap3_evm_vpll2, | ||
| 415 | .vio = &omap3evm_vio, | ||
| 416 | .vmmc1 = &omap3evm_vmmc1, | ||
| 417 | .vsim = &omap3evm_vsim, | ||
| 418 | @@ -545,8 +504,13 @@ static struct twl4030_platform_data omap3evm_twldata = { | ||
| 419 | static int __init omap3_evm_i2c_init(void) | ||
| 420 | { | ||
| 421 | omap3_pmic_get_config(&omap3evm_twldata, | ||
| 422 | - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | | ||
| 423 | - TWL_COMMON_PDATA_AUDIO, 0); | ||
| 424 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | | ||
| 425 | + TWL_COMMON_PDATA_AUDIO, | ||
| 426 | + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | ||
| 427 | + | ||
| 428 | + omap3evm_twldata.vdac->constraints.apply_uV = true; | ||
| 429 | + omap3evm_twldata.vpll2->constraints.apply_uV = true; | ||
| 430 | + | ||
| 431 | omap3_pmic_init("twl4030", &omap3evm_twldata); | ||
| 432 | omap_register_i2c_bus(2, 400, NULL, 0); | ||
| 433 | omap_register_i2c_bus(3, 400, NULL, 0); | ||
| 434 | diff --git a/arch/arm/mach-omap2/board-omap3pandora.c b/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 435 | index f5abf76..080d7bd 100644 | ||
| 436 | --- a/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 437 | +++ b/arch/arm/mach-omap2/board-omap3pandora.c | ||
| 438 | @@ -332,10 +332,6 @@ static struct regulator_consumer_supply pandora_vmmc3_supply[] = { | ||
| 439 | REGULATOR_SUPPLY("vmmc", "omap_hsmmc.2"), | ||
| 440 | }; | ||
| 441 | |||
| 442 | -static struct regulator_consumer_supply pandora_vdda_dac_supply[] = { | ||
| 443 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 444 | -}; | ||
| 445 | - | ||
| 446 | static struct regulator_consumer_supply pandora_vdds_supplies[] = { | ||
| 447 | REGULATOR_SUPPLY("vdds_sdi", "omapdss"), | ||
| 448 | REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | ||
| 449 | @@ -391,36 +387,6 @@ static struct regulator_init_data pandora_vmmc2 = { | ||
| 450 | .consumer_supplies = pandora_vmmc2_supply, | ||
| 451 | }; | ||
| 452 | |||
| 453 | -/* VDAC for DSS driving S-Video */ | ||
| 454 | -static struct regulator_init_data pandora_vdac = { | ||
| 455 | - .constraints = { | ||
| 456 | - .min_uV = 1800000, | ||
| 457 | - .max_uV = 1800000, | ||
| 458 | - .apply_uV = true, | ||
| 459 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 460 | - | REGULATOR_MODE_STANDBY, | ||
| 461 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 462 | - | REGULATOR_CHANGE_STATUS, | ||
| 463 | - }, | ||
| 464 | - .num_consumer_supplies = ARRAY_SIZE(pandora_vdda_dac_supply), | ||
| 465 | - .consumer_supplies = pandora_vdda_dac_supply, | ||
| 466 | -}; | ||
| 467 | - | ||
| 468 | -/* VPLL2 for digital video outputs */ | ||
| 469 | -static struct regulator_init_data pandora_vpll2 = { | ||
| 470 | - .constraints = { | ||
| 471 | - .min_uV = 1800000, | ||
| 472 | - .max_uV = 1800000, | ||
| 473 | - .apply_uV = true, | ||
| 474 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 475 | - | REGULATOR_MODE_STANDBY, | ||
| 476 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 477 | - | REGULATOR_CHANGE_STATUS, | ||
| 478 | - }, | ||
| 479 | - .num_consumer_supplies = ARRAY_SIZE(pandora_vdds_supplies), | ||
| 480 | - .consumer_supplies = pandora_vdds_supplies, | ||
| 481 | -}; | ||
| 482 | - | ||
| 483 | /* VAUX1 for LCD */ | ||
| 484 | static struct regulator_init_data pandora_vaux1 = { | ||
| 485 | .constraints = { | ||
| 486 | @@ -514,8 +480,6 @@ static struct twl4030_platform_data omap3pandora_twldata = { | ||
| 487 | .gpio = &omap3pandora_gpio_data, | ||
| 488 | .vmmc1 = &pandora_vmmc1, | ||
| 489 | .vmmc2 = &pandora_vmmc2, | ||
| 490 | - .vdac = &pandora_vdac, | ||
| 491 | - .vpll2 = &pandora_vpll2, | ||
| 492 | .vaux1 = &pandora_vaux1, | ||
| 493 | .vaux2 = &pandora_vaux2, | ||
| 494 | .vaux4 = &pandora_vaux4, | ||
| 495 | @@ -534,7 +498,16 @@ static struct i2c_board_info __initdata omap3pandora_i2c3_boardinfo[] = { | ||
| 496 | static int __init omap3pandora_i2c_init(void) | ||
| 497 | { | ||
| 498 | omap3_pmic_get_config(&omap3pandora_twldata, | ||
| 499 | - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 500 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, | ||
| 501 | + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | ||
| 502 | + | ||
| 503 | + omap3pandora_twldata.vdac->constraints.apply_uV = true; | ||
| 504 | + | ||
| 505 | + omap3pandora_twldata.vpll2->constraints.apply_uV = true; | ||
| 506 | + omap3pandora_twldata.vpll2->num_consumer_supplies = | ||
| 507 | + ARRAY_SIZE(pandora_vdds_supplies); | ||
| 508 | + omap3pandora_twldata.vpll2->consumer_supplies = pandora_vdds_supplies; | ||
| 509 | + | ||
| 510 | omap3_pmic_init("tps65950", &omap3pandora_twldata); | ||
| 511 | /* i2c2 pins are not connected */ | ||
| 512 | omap_register_i2c_bus(3, 100, omap3pandora_i2c3_boardinfo, | ||
| 513 | diff --git a/arch/arm/mach-omap2/board-omap3stalker.c b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 514 | index 6e59e59..8e10498 100644 | ||
| 515 | --- a/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 516 | +++ b/arch/arm/mach-omap2/board-omap3stalker.c | ||
| 517 | @@ -383,52 +383,10 @@ static struct twl4030_keypad_data omap3stalker_kp_data = { | ||
| 518 | .rep = 1, | ||
| 519 | }; | ||
| 520 | |||
| 521 | -static struct regulator_consumer_supply omap3_stalker_vdda_dac_supply[] = { | ||
| 522 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 523 | -}; | ||
| 524 | - | ||
| 525 | -/* VDAC for DSS driving S-Video */ | ||
| 526 | -static struct regulator_init_data omap3_stalker_vdac = { | ||
| 527 | - .constraints = { | ||
| 528 | - .min_uV = 1800000, | ||
| 529 | - .max_uV = 1800000, | ||
| 530 | - .apply_uV = true, | ||
| 531 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 532 | - | REGULATOR_MODE_STANDBY, | ||
| 533 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 534 | - | REGULATOR_CHANGE_STATUS, | ||
| 535 | - }, | ||
| 536 | - .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vdda_dac_supply), | ||
| 537 | - .consumer_supplies = omap3_stalker_vdda_dac_supply, | ||
| 538 | -}; | ||
| 539 | - | ||
| 540 | -/* VPLL2 for digital video outputs */ | ||
| 541 | -static struct regulator_consumer_supply omap3_stalker_vpll2_supplies[] = { | ||
| 542 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | ||
| 543 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | ||
| 544 | -}; | ||
| 545 | - | ||
| 546 | -static struct regulator_init_data omap3_stalker_vpll2 = { | ||
| 547 | - .constraints = { | ||
| 548 | - .name = "VDVI", | ||
| 549 | - .min_uV = 1800000, | ||
| 550 | - .max_uV = 1800000, | ||
| 551 | - .apply_uV = true, | ||
| 552 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 553 | - | REGULATOR_MODE_STANDBY, | ||
| 554 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 555 | - | REGULATOR_CHANGE_STATUS, | ||
| 556 | - }, | ||
| 557 | - .num_consumer_supplies = ARRAY_SIZE(omap3_stalker_vpll2_supplies), | ||
| 558 | - .consumer_supplies = omap3_stalker_vpll2_supplies, | ||
| 559 | -}; | ||
| 560 | - | ||
| 561 | static struct twl4030_platform_data omap3stalker_twldata = { | ||
| 562 | /* platform_data for children goes here */ | ||
| 563 | .keypad = &omap3stalker_kp_data, | ||
| 564 | .gpio = &omap3stalker_gpio_data, | ||
| 565 | - .vdac = &omap3_stalker_vdac, | ||
| 566 | - .vpll2 = &omap3_stalker_vpll2, | ||
| 567 | .vmmc1 = &omap3stalker_vmmc1, | ||
| 568 | .vsim = &omap3stalker_vsim, | ||
| 569 | }; | ||
| 570 | @@ -451,7 +409,13 @@ static int __init omap3_stalker_i2c_init(void) | ||
| 571 | { | ||
| 572 | omap3_pmic_get_config(&omap3stalker_twldata, | ||
| 573 | TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC | | ||
| 574 | - TWL_COMMON_PDATA_AUDIO, 0); | ||
| 575 | + TWL_COMMON_PDATA_AUDIO, | ||
| 576 | + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | ||
| 577 | + | ||
| 578 | + omap3stalker_twldata.vdac->constraints.apply_uV = true; | ||
| 579 | + omap3stalker_twldata.vpll2->constraints.apply_uV = true; | ||
| 580 | + omap3stalker_twldata.vpll2->constraints.name = "VDVI"; | ||
| 581 | + | ||
| 582 | omap3_pmic_init("twl4030", &omap3stalker_twldata); | ||
| 583 | omap_register_i2c_bus(2, 400, NULL, 0); | ||
| 584 | omap_register_i2c_bus(3, 400, omap3stalker_i2c_boardinfo3, | ||
| 585 | diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 586 | index 717972c..852ea04 100644 | ||
| 587 | --- a/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 588 | +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | ||
| 589 | @@ -206,42 +206,11 @@ static struct regulator_init_data touchbook_vsim = { | ||
| 590 | .consumer_supplies = touchbook_vsim_supply, | ||
| 591 | }; | ||
| 592 | |||
| 593 | -/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ | ||
| 594 | -static struct regulator_init_data touchbook_vdac = { | ||
| 595 | - .constraints = { | ||
| 596 | - .min_uV = 1800000, | ||
| 597 | - .max_uV = 1800000, | ||
| 598 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 599 | - | REGULATOR_MODE_STANDBY, | ||
| 600 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 601 | - | REGULATOR_CHANGE_STATUS, | ||
| 602 | - }, | ||
| 603 | - .num_consumer_supplies = ARRAY_SIZE(touchbook_vdac_supply), | ||
| 604 | - .consumer_supplies = touchbook_vdac_supply, | ||
| 605 | -}; | ||
| 606 | - | ||
| 607 | -/* VPLL2 for digital video outputs */ | ||
| 608 | -static struct regulator_init_data touchbook_vpll2 = { | ||
| 609 | - .constraints = { | ||
| 610 | - .name = "VDVI", | ||
| 611 | - .min_uV = 1800000, | ||
| 612 | - .max_uV = 1800000, | ||
| 613 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 614 | - | REGULATOR_MODE_STANDBY, | ||
| 615 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 616 | - | REGULATOR_CHANGE_STATUS, | ||
| 617 | - }, | ||
| 618 | - .num_consumer_supplies = ARRAY_SIZE(touchbook_vdvi_supply), | ||
| 619 | - .consumer_supplies = touchbook_vdvi_supply, | ||
| 620 | -}; | ||
| 621 | - | ||
| 622 | static struct twl4030_platform_data touchbook_twldata = { | ||
| 623 | /* platform_data for children goes here */ | ||
| 624 | .gpio = &touchbook_gpio_data, | ||
| 625 | .vmmc1 = &touchbook_vmmc1, | ||
| 626 | .vsim = &touchbook_vsim, | ||
| 627 | - .vdac = &touchbook_vdac, | ||
| 628 | - .vpll2 = &touchbook_vpll2, | ||
| 629 | }; | ||
| 630 | |||
| 631 | static struct i2c_board_info __initdata touchBook_i2c_boardinfo[] = { | ||
| 632 | @@ -254,7 +223,18 @@ static int __init omap3_touchbook_i2c_init(void) | ||
| 633 | { | ||
| 634 | /* Standard TouchBook bus */ | ||
| 635 | omap3_pmic_get_config(&touchbook_twldata, | ||
| 636 | - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 637 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, | ||
| 638 | + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | ||
| 639 | + | ||
| 640 | + touchbook_twldata.vdac->num_consumer_supplies = | ||
| 641 | + ARRAY_SIZE(touchbook_vdac_supply); | ||
| 642 | + touchbook_twldata.vdac->consumer_supplies = touchbook_vdac_supply; | ||
| 643 | + | ||
| 644 | + touchbook_twldata.vpll2->constraints.name = "VDVI"; | ||
| 645 | + touchbook_twldata.vpll2->num_consumer_supplies = | ||
| 646 | + ARRAY_SIZE(touchbook_vdvi_supply); | ||
| 647 | + touchbook_twldata.vpll2->consumer_supplies = touchbook_vdvi_supply; | ||
| 648 | + | ||
| 649 | omap3_pmic_init("twl4030", &touchbook_twldata); | ||
| 650 | /* Additional TouchBook bus */ | ||
| 651 | omap_register_i2c_bus(3, 100, touchBook_i2c_boardinfo, | ||
| 652 | diff --git a/arch/arm/mach-omap2/board-overo.c b/arch/arm/mach-omap2/board-overo.c | ||
| 653 | index 776b444..f1f18d0 100644 | ||
| 654 | --- a/arch/arm/mach-omap2/board-overo.c | ||
| 655 | +++ b/arch/arm/mach-omap2/board-overo.c | ||
| 656 | @@ -265,15 +265,6 @@ static struct omap_dss_board_info overo_dss_data = { | ||
| 657 | .default_device = &overo_dvi_device, | ||
| 658 | }; | ||
| 659 | |||
| 660 | -static struct regulator_consumer_supply overo_vdda_dac_supply[] = { | ||
| 661 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 662 | -}; | ||
| 663 | - | ||
| 664 | -static struct regulator_consumer_supply overo_vdds_dsi_supply[] = { | ||
| 665 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | ||
| 666 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | ||
| 667 | -}; | ||
| 668 | - | ||
| 669 | static struct mtd_partition overo_nand_partitions[] = { | ||
| 670 | { | ||
| 671 | .name = "xloader", | ||
| 672 | @@ -447,46 +438,19 @@ static struct regulator_init_data overo_vmmc1 = { | ||
| 673 | .consumer_supplies = overo_vmmc1_supply, | ||
| 674 | }; | ||
| 675 | |||
| 676 | -/* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */ | ||
| 677 | -static struct regulator_init_data overo_vdac = { | ||
| 678 | - .constraints = { | ||
| 679 | - .min_uV = 1800000, | ||
| 680 | - .max_uV = 1800000, | ||
| 681 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 682 | - | REGULATOR_MODE_STANDBY, | ||
| 683 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 684 | - | REGULATOR_CHANGE_STATUS, | ||
| 685 | - }, | ||
| 686 | - .num_consumer_supplies = ARRAY_SIZE(overo_vdda_dac_supply), | ||
| 687 | - .consumer_supplies = overo_vdda_dac_supply, | ||
| 688 | -}; | ||
| 689 | - | ||
| 690 | -/* VPLL2 for digital video outputs */ | ||
| 691 | -static struct regulator_init_data overo_vpll2 = { | ||
| 692 | - .constraints = { | ||
| 693 | - .name = "VDVI", | ||
| 694 | - .min_uV = 1800000, | ||
| 695 | - .max_uV = 1800000, | ||
| 696 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 697 | - | REGULATOR_MODE_STANDBY, | ||
| 698 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 699 | - | REGULATOR_CHANGE_STATUS, | ||
| 700 | - }, | ||
| 701 | - .num_consumer_supplies = ARRAY_SIZE(overo_vdds_dsi_supply), | ||
| 702 | - .consumer_supplies = overo_vdds_dsi_supply, | ||
| 703 | -}; | ||
| 704 | - | ||
| 705 | static struct twl4030_platform_data overo_twldata = { | ||
| 706 | .gpio = &overo_gpio_data, | ||
| 707 | .vmmc1 = &overo_vmmc1, | ||
| 708 | - .vdac = &overo_vdac, | ||
| 709 | - .vpll2 = &overo_vpll2, | ||
| 710 | }; | ||
| 711 | |||
| 712 | static int __init overo_i2c_init(void) | ||
| 713 | { | ||
| 714 | omap3_pmic_get_config(&overo_twldata, | ||
| 715 | - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 716 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO, | ||
| 717 | + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | ||
| 718 | + | ||
| 719 | + overo_twldata.vpll2->constraints.name = "VDVI"; | ||
| 720 | + | ||
| 721 | omap3_pmic_init("tps65950", &overo_twldata); | ||
| 722 | /* i2c2 pins are used for gpio */ | ||
| 723 | omap_register_i2c_bus(3, 400, NULL, 0); | ||
| 724 | diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c | ||
| 725 | index 3cdea39..d99e462 100644 | ||
| 726 | --- a/arch/arm/mach-omap2/board-rx51-peripherals.c | ||
| 727 | +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | ||
| 728 | @@ -394,10 +394,6 @@ static struct regulator_consumer_supply rx51_vaux1_consumers[] = { | ||
| 729 | REGULATOR_SUPPLY("vdd", "2-0063"), | ||
| 730 | }; | ||
| 731 | |||
| 732 | -static struct regulator_consumer_supply rx51_vdac_supply[] = { | ||
| 733 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 734 | -}; | ||
| 735 | - | ||
| 736 | static struct regulator_init_data rx51_vaux1 = { | ||
| 737 | .constraints = { | ||
| 738 | .name = "V28", | ||
| 739 | @@ -514,21 +510,6 @@ static struct regulator_init_data rx51_vsim = { | ||
| 740 | .consumer_supplies = rx51_vsim_supply, | ||
| 741 | }; | ||
| 742 | |||
| 743 | -static struct regulator_init_data rx51_vdac = { | ||
| 744 | - .constraints = { | ||
| 745 | - .name = "VDAC", | ||
| 746 | - .min_uV = 1800000, | ||
| 747 | - .max_uV = 1800000, | ||
| 748 | - .apply_uV = true, | ||
| 749 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 750 | - | REGULATOR_MODE_STANDBY, | ||
| 751 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 752 | - | REGULATOR_CHANGE_STATUS, | ||
| 753 | - }, | ||
| 754 | - .num_consumer_supplies = ARRAY_SIZE(rx51_vdac_supply), | ||
| 755 | - .consumer_supplies = rx51_vdac_supply, | ||
| 756 | -}; | ||
| 757 | - | ||
| 758 | static struct regulator_init_data rx51_vio = { | ||
| 759 | .constraints = { | ||
| 760 | .min_uV = 1800000, | ||
| 761 | @@ -781,7 +762,6 @@ static struct twl4030_platform_data rx51_twldata __initdata = { | ||
| 762 | .vaux4 = &rx51_vaux4, | ||
| 763 | .vmmc1 = &rx51_vmmc1, | ||
| 764 | .vsim = &rx51_vsim, | ||
| 765 | - .vdac = &rx51_vdac, | ||
| 766 | .vio = &rx51_vio, | ||
| 767 | }; | ||
| 768 | |||
| 769 | @@ -838,7 +818,12 @@ static int __init rx51_i2c_init(void) | ||
| 770 | } | ||
| 771 | rx51_twldata.vmmc2 = &rx51_vmmc2; | ||
| 772 | omap3_pmic_get_config(&rx51_twldata, | ||
| 773 | - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, 0); | ||
| 774 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_MADC, | ||
| 775 | + TWL_COMMON_REGULATOR_VDAC); | ||
| 776 | + | ||
| 777 | + rx51_twldata.vdac->constraints.apply_uV = true; | ||
| 778 | + rx51_twldata.vdac->constraints.name = "VDAC"; | ||
| 779 | + | ||
| 780 | omap_pmic_init(1, 2200, "twl5030", INT_34XX_SYS_NIRQ, &rx51_twldata); | ||
| 781 | omap_register_i2c_bus(2, 100, rx51_peripherals_i2c_board_info_2, | ||
| 782 | ARRAY_SIZE(rx51_peripherals_i2c_board_info_2)); | ||
| 783 | diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c | ||
| 784 | index 6d8df1b..13a6442 100644 | ||
| 785 | --- a/arch/arm/mach-omap2/board-zoom-peripherals.c | ||
| 786 | +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c | ||
| 787 | @@ -226,41 +226,6 @@ static struct omap2_hsmmc_info mmc[] = { | ||
| 788 | {} /* Terminator */ | ||
| 789 | }; | ||
| 790 | |||
| 791 | -static struct regulator_consumer_supply zoom_vpll2_supplies[] = { | ||
| 792 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | ||
| 793 | - REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | ||
| 794 | -}; | ||
| 795 | - | ||
| 796 | -static struct regulator_consumer_supply zoom_vdda_dac_supply[] = { | ||
| 797 | - REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 798 | -}; | ||
| 799 | - | ||
| 800 | -static struct regulator_init_data zoom_vpll2 = { | ||
| 801 | - .constraints = { | ||
| 802 | - .min_uV = 1800000, | ||
| 803 | - .max_uV = 1800000, | ||
| 804 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 805 | - | REGULATOR_MODE_STANDBY, | ||
| 806 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 807 | - | REGULATOR_CHANGE_STATUS, | ||
| 808 | - }, | ||
| 809 | - .num_consumer_supplies = ARRAY_SIZE(zoom_vpll2_supplies), | ||
| 810 | - .consumer_supplies = zoom_vpll2_supplies, | ||
| 811 | -}; | ||
| 812 | - | ||
| 813 | -static struct regulator_init_data zoom_vdac = { | ||
| 814 | - .constraints = { | ||
| 815 | - .min_uV = 1800000, | ||
| 816 | - .max_uV = 1800000, | ||
| 817 | - .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 818 | - | REGULATOR_MODE_STANDBY, | ||
| 819 | - .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 820 | - | REGULATOR_CHANGE_STATUS, | ||
| 821 | - }, | ||
| 822 | - .num_consumer_supplies = ARRAY_SIZE(zoom_vdda_dac_supply), | ||
| 823 | - .consumer_supplies = zoom_vdda_dac_supply, | ||
| 824 | -}; | ||
| 825 | - | ||
| 826 | static int zoom_twl_gpio_setup(struct device *dev, | ||
| 827 | unsigned gpio, unsigned ngpio) | ||
| 828 | { | ||
| 829 | @@ -299,15 +264,14 @@ static struct twl4030_platform_data zoom_twldata = { | ||
| 830 | .vmmc1 = &zoom_vmmc1, | ||
| 831 | .vmmc2 = &zoom_vmmc2, | ||
| 832 | .vsim = &zoom_vsim, | ||
| 833 | - .vpll2 = &zoom_vpll2, | ||
| 834 | - .vdac = &zoom_vdac, | ||
| 835 | }; | ||
| 836 | |||
| 837 | static int __init omap_i2c_init(void) | ||
| 838 | { | ||
| 839 | omap3_pmic_get_config(&zoom_twldata, | ||
| 840 | - TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | | ||
| 841 | - TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, 0); | ||
| 842 | + TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI | | ||
| 843 | + TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO, | ||
| 844 | + TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2); | ||
| 845 | |||
| 846 | if (machine_is_omap_zoom2()) { | ||
| 847 | struct twl4030_codec_audio_data *audio_data; | ||
| 848 | diff --git a/arch/arm/mach-omap2/twl-common.c b/arch/arm/mach-omap2/twl-common.c | ||
| 849 | index 9e8decf..3aaa46f 100644 | ||
| 850 | --- a/arch/arm/mach-omap2/twl-common.c | ||
| 851 | +++ b/arch/arm/mach-omap2/twl-common.c | ||
| 852 | @@ -87,6 +87,41 @@ static struct twl4030_codec_data omap3_codec_pdata = { | ||
| 853 | .audio = &omap3_audio, | ||
| 854 | }; | ||
| 855 | |||
| 856 | +static struct regulator_consumer_supply omap3_vdda_dac_supplies[] = { | ||
| 857 | + REGULATOR_SUPPLY("vdda_dac", "omapdss_venc"), | ||
| 858 | +}; | ||
| 859 | + | ||
| 860 | +static struct regulator_init_data omap3_vdac_idata = { | ||
| 861 | + .constraints = { | ||
| 862 | + .min_uV = 1800000, | ||
| 863 | + .max_uV = 1800000, | ||
| 864 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 865 | + | REGULATOR_MODE_STANDBY, | ||
| 866 | + .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 867 | + | REGULATOR_CHANGE_STATUS, | ||
| 868 | + }, | ||
| 869 | + .num_consumer_supplies = ARRAY_SIZE(omap3_vdda_dac_supplies), | ||
| 870 | + .consumer_supplies = omap3_vdda_dac_supplies, | ||
| 871 | +}; | ||
| 872 | + | ||
| 873 | +static struct regulator_consumer_supply omap3_vpll2_supplies[] = { | ||
| 874 | + REGULATOR_SUPPLY("vdds_dsi", "omapdss"), | ||
| 875 | + REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"), | ||
| 876 | +}; | ||
| 877 | + | ||
| 878 | +static struct regulator_init_data omap3_vpll2_idata = { | ||
| 879 | + .constraints = { | ||
| 880 | + .min_uV = 1800000, | ||
| 881 | + .max_uV = 1800000, | ||
| 882 | + .valid_modes_mask = REGULATOR_MODE_NORMAL | ||
| 883 | + | REGULATOR_MODE_STANDBY, | ||
| 884 | + .valid_ops_mask = REGULATOR_CHANGE_MODE | ||
| 885 | + | REGULATOR_CHANGE_STATUS, | ||
| 886 | + }, | ||
| 887 | + .num_consumer_supplies = ARRAY_SIZE(omap3_vpll2_supplies), | ||
| 888 | + .consumer_supplies = omap3_vpll2_supplies, | ||
| 889 | +}; | ||
| 890 | + | ||
| 891 | static struct regulator_init_data omap4_vdac_idata = { | ||
| 892 | .constraints = { | ||
| 893 | .min_uV = 1800000, | ||
| 894 | @@ -259,4 +294,11 @@ void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, | ||
| 895 | |||
| 896 | if (pdata_flags & TWL_COMMON_PDATA_AUDIO && !pmic_data->codec) | ||
| 897 | pmic_data->codec = &omap3_codec_pdata; | ||
| 898 | + | ||
| 899 | + /* Common regulator configurations */ | ||
| 900 | + if (regulators_flags & TWL_COMMON_REGULATOR_VDAC && !pmic_data->vdac) | ||
| 901 | + pmic_data->vdac = &omap3_vdac_idata; | ||
| 902 | + | ||
| 903 | + if (regulators_flags & TWL_COMMON_REGULATOR_VPLL2 && !pmic_data->vpll2) | ||
| 904 | + pmic_data->vpll2 = &omap3_vpll2_idata; | ||
| 905 | } | ||
| 906 | diff --git a/arch/arm/mach-omap2/twl-common.h b/arch/arm/mach-omap2/twl-common.h | ||
| 907 | index 3b4b05d..5e83a5b 100644 | ||
| 908 | --- a/arch/arm/mach-omap2/twl-common.h | ||
| 909 | +++ b/arch/arm/mach-omap2/twl-common.h | ||
| 910 | @@ -21,6 +21,11 @@ | ||
| 911 | #define TWL_COMMON_REGULATOR_VUSB (1 << 9) | ||
| 912 | #define TWL_COMMON_REGULATOR_CLK32KG (1 << 10) | ||
| 913 | |||
| 914 | +/* TWL4030 LDO regulators */ | ||
| 915 | +#define TWL_COMMON_REGULATOR_VPLL1 (1 << 4) | ||
| 916 | +#define TWL_COMMON_REGULATOR_VPLL2 (1 << 5) | ||
| 917 | + | ||
| 918 | + | ||
| 919 | struct twl4030_platform_data; | ||
| 920 | |||
| 921 | void omap_pmic_init(int bus, u32 clkrate, const char *pmic_type, int pmic_irq, | ||
| 922 | -- | ||
| 923 | 1.7.2.5 | ||
| 924 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0026-omap-mcbsp-Remove-rx_-tx_word_length-variables.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0026-omap-mcbsp-Remove-rx_-tx_word_length-variables.patch deleted file mode 100644 index f1a4682e..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0026-omap-mcbsp-Remove-rx_-tx_word_length-variables.patch +++ /dev/null | |||
| @@ -1,45 +0,0 @@ | |||
| 1 | From 7a7bf2e165760ed106b0f4c8beb7191e3abe944f Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Jarkko Nikula <jhnikula@gmail.com> | ||
| 3 | Date: Fri, 1 Jul 2011 08:52:26 +0000 | ||
| 4 | Subject: [PATCH 026/149] omap: mcbsp: Remove rx_/tx_word_length variables | ||
| 5 | |||
| 6 | These variables got unused after ("omap: mcbsp: Drop in-driver transfer | ||
| 7 | support") but was noticed only afterwards. | ||
| 8 | |||
| 9 | Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> | ||
| 10 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 11 | --- | ||
| 12 | arch/arm/plat-omap/include/plat/mcbsp.h | 2 -- | ||
| 13 | arch/arm/plat-omap/mcbsp.c | 3 --- | ||
| 14 | 2 files changed, 0 insertions(+), 5 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h | ||
| 17 | index 6c53508..63464ad 100644 | ||
| 18 | --- a/arch/arm/plat-omap/include/plat/mcbsp.h | ||
| 19 | +++ b/arch/arm/plat-omap/include/plat/mcbsp.h | ||
| 20 | @@ -385,8 +385,6 @@ struct omap_mcbsp { | ||
| 21 | void __iomem *io_base; | ||
| 22 | u8 id; | ||
| 23 | u8 free; | ||
| 24 | - omap_mcbsp_word_length rx_word_length; | ||
| 25 | - omap_mcbsp_word_length tx_word_length; | ||
| 26 | |||
| 27 | int rx_irq; | ||
| 28 | int tx_irq; | ||
| 29 | diff --git a/arch/arm/plat-omap/mcbsp.c b/arch/arm/plat-omap/mcbsp.c | ||
| 30 | index 455eadc..3c1fbdc 100644 | ||
| 31 | --- a/arch/arm/plat-omap/mcbsp.c | ||
| 32 | +++ b/arch/arm/plat-omap/mcbsp.c | ||
| 33 | @@ -869,9 +869,6 @@ void omap_mcbsp_start(unsigned int id, int tx, int rx) | ||
| 34 | if (cpu_is_omap34xx()) | ||
| 35 | omap_st_start(mcbsp); | ||
| 36 | |||
| 37 | - mcbsp->rx_word_length = (MCBSP_READ_CACHE(mcbsp, RCR1) >> 5) & 0x7; | ||
| 38 | - mcbsp->tx_word_length = (MCBSP_READ_CACHE(mcbsp, XCR1) >> 5) & 0x7; | ||
| 39 | - | ||
| 40 | /* Only enable SRG, if McBSP is master */ | ||
| 41 | w = MCBSP_READ_CACHE(mcbsp, PCR0); | ||
| 42 | if (w & (FSXM | FSRM | CLKXM | CLKRM)) | ||
| 43 | -- | ||
| 44 | 1.7.2.5 | ||
| 45 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0027-omap-mcbsp-Remove-port-number-enums.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0027-omap-mcbsp-Remove-port-number-enums.patch deleted file mode 100644 index b8389db4..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0027-omap-mcbsp-Remove-port-number-enums.patch +++ /dev/null | |||
| @@ -1,68 +0,0 @@ | |||
| 1 | From a16f9faa682c8cdd3bbd14618600ec67e4a56963 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Jarkko Nikula <jhnikula@gmail.com> | ||
| 3 | Date: Fri, 1 Jul 2011 08:52:27 +0000 | ||
| 4 | Subject: [PATCH 027/149] omap: mcbsp: Remove port number enums | ||
| 5 | |||
| 6 | These McBSP port number enums are used only in two places in the McBSP code | ||
| 7 | so we may remove then and just use numeric values like rest of the code does. | ||
| 8 | |||
| 9 | Signed-off-by: Jarkko Nikula <jhnikula@gmail.com> | ||
| 10 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap1/mcbsp.c | 4 ++-- | ||
| 13 | arch/arm/plat-omap/include/plat/mcbsp.h | 10 +--------- | ||
| 14 | 2 files changed, 3 insertions(+), 11 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/arch/arm/mach-omap1/mcbsp.c b/arch/arm/mach-omap1/mcbsp.c | ||
| 17 | index d9af981..ab7395d 100644 | ||
| 18 | --- a/arch/arm/mach-omap1/mcbsp.c | ||
| 19 | +++ b/arch/arm/mach-omap1/mcbsp.c | ||
| 20 | @@ -38,7 +38,7 @@ static void omap1_mcbsp_request(unsigned int id) | ||
| 21 | * On 1510, 1610 and 1710, McBSP1 and McBSP3 | ||
| 22 | * are DSP public peripherals. | ||
| 23 | */ | ||
| 24 | - if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { | ||
| 25 | + if (id == 0 || id == 2) { | ||
| 26 | if (dsp_use++ == 0) { | ||
| 27 | api_clk = clk_get(NULL, "api_ck"); | ||
| 28 | dsp_clk = clk_get(NULL, "dsp_ck"); | ||
| 29 | @@ -59,7 +59,7 @@ static void omap1_mcbsp_request(unsigned int id) | ||
| 30 | |||
| 31 | static void omap1_mcbsp_free(unsigned int id) | ||
| 32 | { | ||
| 33 | - if (id == OMAP_MCBSP1 || id == OMAP_MCBSP3) { | ||
| 34 | + if (id == 0 || id == 2) { | ||
| 35 | if (--dsp_use == 0) { | ||
| 36 | if (!IS_ERR(api_clk)) { | ||
| 37 | clk_disable(api_clk); | ||
| 38 | diff --git a/arch/arm/plat-omap/include/plat/mcbsp.h b/arch/arm/plat-omap/include/plat/mcbsp.h | ||
| 39 | index 63464ad..9882c657 100644 | ||
| 40 | --- a/arch/arm/plat-omap/include/plat/mcbsp.h | ||
| 41 | +++ b/arch/arm/plat-omap/include/plat/mcbsp.h | ||
| 42 | @@ -33,7 +33,7 @@ | ||
| 43 | #define OMAP_MCBSP_PLATFORM_DEVICE(port_nr) \ | ||
| 44 | static struct platform_device omap_mcbsp##port_nr = { \ | ||
| 45 | .name = "omap-mcbsp-dai", \ | ||
| 46 | - .id = OMAP_MCBSP##port_nr, \ | ||
| 47 | + .id = port_nr - 1, \ | ||
| 48 | } | ||
| 49 | |||
| 50 | #define MCBSP_CONFIG_TYPE2 0x2 | ||
| 51 | @@ -332,14 +332,6 @@ struct omap_mcbsp_reg_cfg { | ||
| 52 | }; | ||
| 53 | |||
| 54 | typedef enum { | ||
| 55 | - OMAP_MCBSP1 = 0, | ||
| 56 | - OMAP_MCBSP2, | ||
| 57 | - OMAP_MCBSP3, | ||
| 58 | - OMAP_MCBSP4, | ||
| 59 | - OMAP_MCBSP5 | ||
| 60 | -} omap_mcbsp_id; | ||
| 61 | - | ||
| 62 | -typedef enum { | ||
| 63 | OMAP_MCBSP_WORD_8 = 0, | ||
| 64 | OMAP_MCBSP_WORD_12, | ||
| 65 | OMAP_MCBSP_WORD_16, | ||
| 66 | -- | ||
| 67 | 1.7.2.5 | ||
| 68 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0028-OMAP-dmtimer-add-missing-include.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0028-OMAP-dmtimer-add-missing-include.patch deleted file mode 100644 index 04a711e3..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0028-OMAP-dmtimer-add-missing-include.patch +++ /dev/null | |||
| @@ -1,31 +0,0 @@ | |||
| 1 | From 4e6a7403182e1e30f8b403e7931ce7c832cb5db3 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Paul Walmsley <paul@pwsan.com> | ||
| 3 | Date: Sat, 9 Jul 2011 18:00:25 -0600 | ||
| 4 | Subject: [PATCH 028/149] OMAP: dmtimer: add missing include | ||
| 5 | |||
| 6 | After commit caf64f2fdc48472995d40656eb1a75524c464447 ("omap: Make a subset | ||
| 7 | of dmtimer functions into inline functions"), | ||
| 8 | arch/arm/plat-omap/include/plat/dmtimer.h is missing an include of linux/io.h | ||
| 9 | - add it. | ||
| 10 | |||
| 11 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 12 | Cc: Tony Lindgren <tony@atomide.com> | ||
| 13 | --- | ||
| 14 | arch/arm/plat-omap/include/plat/dmtimer.h | 1 + | ||
| 15 | 1 files changed, 1 insertions(+), 0 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/arch/arm/plat-omap/include/plat/dmtimer.h b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 18 | index d0f3a2d..eb5d16c 100644 | ||
| 19 | --- a/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 20 | +++ b/arch/arm/plat-omap/include/plat/dmtimer.h | ||
| 21 | @@ -34,6 +34,7 @@ | ||
| 22 | |||
| 23 | #include <linux/clk.h> | ||
| 24 | #include <linux/delay.h> | ||
| 25 | +#include <linux/io.h> | ||
| 26 | |||
| 27 | #ifndef __ASM_ARCH_DMTIMER_H | ||
| 28 | #define __ASM_ARCH_DMTIMER_H | ||
| 29 | -- | ||
| 30 | 1.7.2.5 | ||
| 31 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0029-OMAP2-hwmod-Fix-smart-standby-wakeup-support.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0029-OMAP2-hwmod-Fix-smart-standby-wakeup-support.patch deleted file mode 100644 index 95384bb2..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0029-OMAP2-hwmod-Fix-smart-standby-wakeup-support.patch +++ /dev/null | |||
| @@ -1,130 +0,0 @@ | |||
| 1 | From 8a9259c5eedfeb7e2dd3e001aa68e4e1a9149b41 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Fri, 1 Jul 2011 22:54:00 +0200 | ||
| 4 | Subject: [PATCH 029/149] OMAP2+: hwmod: Fix smart-standby + wakeup support | ||
| 5 | |||
| 6 | The commit 86009eb326afde34ffdc5648cd344aa86b8d58d4 was adding | ||
| 7 | the wakeup support for new OMAP4 IPs. This support is incomplete for | ||
| 8 | busmaster IPs that need as well to use smart-standby with wakeup. | ||
| 9 | |||
| 10 | This new standbymode is suported on HSI and USB_HOST_FS for the moment. | ||
| 11 | |||
| 12 | Add the new MSTANDBY_SMART_WKUP flag to mark the IPs that support this | ||
| 13 | capability. | ||
| 14 | |||
| 15 | Enable this new mode when applicable in _enable_wakeup, _disable_wakeup, | ||
| 16 | _enable_sysc and _idle_sysc. | ||
| 17 | |||
| 18 | The omap_hwmod_44xx_data.c will have to be updated to add this new flag. | ||
| 19 | |||
| 20 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 21 | Signed-off-by: Djamil Elaidi <d-elaidi@ti.com> | ||
| 22 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 23 | --- | ||
| 24 | arch/arm/mach-omap2/omap_hwmod.c | 34 +++++++++++++++++++++---- | ||
| 25 | arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 +- | ||
| 26 | 2 files changed, 29 insertions(+), 7 deletions(-) | ||
| 27 | |||
| 28 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 29 | index 293fa6c..384d3c3 100644 | ||
| 30 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 31 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 32 | @@ -391,7 +391,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) | ||
| 33 | |||
| 34 | if (!oh->class->sysc || | ||
| 35 | !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || | ||
| 36 | - (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) | ||
| 37 | + (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || | ||
| 38 | + (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) | ||
| 39 | return -EINVAL; | ||
| 40 | |||
| 41 | if (!oh->class->sysc->sysc_fields) { | ||
| 42 | @@ -405,6 +406,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) | ||
| 43 | |||
| 44 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) | ||
| 45 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); | ||
| 46 | + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) | ||
| 47 | + _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); | ||
| 48 | |||
| 49 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ | ||
| 50 | |||
| 51 | @@ -426,7 +429,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) | ||
| 52 | |||
| 53 | if (!oh->class->sysc || | ||
| 54 | !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || | ||
| 55 | - (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP))) | ||
| 56 | + (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || | ||
| 57 | + (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP))) | ||
| 58 | return -EINVAL; | ||
| 59 | |||
| 60 | if (!oh->class->sysc->sysc_fields) { | ||
| 61 | @@ -440,6 +444,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) | ||
| 62 | |||
| 63 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) | ||
| 64 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); | ||
| 65 | + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) | ||
| 66 | + _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); | ||
| 67 | |||
| 68 | /* XXX test pwrdm_get_wken for this hwmod's subsystem */ | ||
| 69 | |||
| 70 | @@ -781,8 +787,16 @@ static void _enable_sysc(struct omap_hwmod *oh) | ||
| 71 | } | ||
| 72 | |||
| 73 | if (sf & SYSC_HAS_MIDLEMODE) { | ||
| 74 | - idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? | ||
| 75 | - HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART; | ||
| 76 | + if (oh->flags & HWMOD_SWSUP_MSTANDBY) { | ||
| 77 | + idlemode = HWMOD_IDLEMODE_NO; | ||
| 78 | + } else { | ||
| 79 | + if (sf & SYSC_HAS_ENAWAKEUP) | ||
| 80 | + _enable_wakeup(oh, &v); | ||
| 81 | + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) | ||
| 82 | + idlemode = HWMOD_IDLEMODE_SMART_WKUP; | ||
| 83 | + else | ||
| 84 | + idlemode = HWMOD_IDLEMODE_SMART; | ||
| 85 | + } | ||
| 86 | _set_master_standbymode(oh, idlemode, &v); | ||
| 87 | } | ||
| 88 | |||
| 89 | @@ -840,8 +854,16 @@ static void _idle_sysc(struct omap_hwmod *oh) | ||
| 90 | } | ||
| 91 | |||
| 92 | if (sf & SYSC_HAS_MIDLEMODE) { | ||
| 93 | - idlemode = (oh->flags & HWMOD_SWSUP_MSTANDBY) ? | ||
| 94 | - HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART; | ||
| 95 | + if (oh->flags & HWMOD_SWSUP_MSTANDBY) { | ||
| 96 | + idlemode = HWMOD_IDLEMODE_FORCE; | ||
| 97 | + } else { | ||
| 98 | + if (sf & SYSC_HAS_ENAWAKEUP) | ||
| 99 | + _enable_wakeup(oh, &v); | ||
| 100 | + if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP) | ||
| 101 | + idlemode = HWMOD_IDLEMODE_SMART_WKUP; | ||
| 102 | + else | ||
| 103 | + idlemode = HWMOD_IDLEMODE_SMART; | ||
| 104 | + } | ||
| 105 | _set_master_standbymode(oh, idlemode, &v); | ||
| 106 | } | ||
| 107 | |||
| 108 | diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 109 | index 1adea9c..e93438c 100644 | ||
| 110 | --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 111 | +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 112 | @@ -77,7 +77,6 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; | ||
| 113 | #define HWMOD_IDLEMODE_FORCE (1 << 0) | ||
| 114 | #define HWMOD_IDLEMODE_NO (1 << 1) | ||
| 115 | #define HWMOD_IDLEMODE_SMART (1 << 2) | ||
| 116 | -/* Slave idle mode flag only */ | ||
| 117 | #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3) | ||
| 118 | |||
| 119 | /** | ||
| 120 | @@ -258,6 +257,7 @@ struct omap_hwmod_ocp_if { | ||
| 121 | #define MSTANDBY_FORCE (HWMOD_IDLEMODE_FORCE << MASTER_STANDBY_SHIFT) | ||
| 122 | #define MSTANDBY_NO (HWMOD_IDLEMODE_NO << MASTER_STANDBY_SHIFT) | ||
| 123 | #define MSTANDBY_SMART (HWMOD_IDLEMODE_SMART << MASTER_STANDBY_SHIFT) | ||
| 124 | +#define MSTANDBY_SMART_WKUP (HWMOD_IDLEMODE_SMART_WKUP << MASTER_STANDBY_SHIFT) | ||
| 125 | |||
| 126 | /* omap_hwmod_sysconfig.sysc_flags capability flags */ | ||
| 127 | #define SYSC_HAS_AUTOIDLE (1 << 0) | ||
| 128 | -- | ||
| 129 | 1.7.2.5 | ||
| 130 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0030-OMAP4-hwmod-data-Add-MSTANDBY_SMART_WKUP-flag.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0030-OMAP4-hwmod-data-Add-MSTANDBY_SMART_WKUP-flag.patch deleted file mode 100644 index a5a664ed..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0030-OMAP4-hwmod-data-Add-MSTANDBY_SMART_WKUP-flag.patch +++ /dev/null | |||
| @@ -1,61 +0,0 @@ | |||
| 1 | From 8823fd9b9f1d6e6406c0b98438ad6282491b0ae5 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Fri, 1 Jul 2011 22:54:01 +0200 | ||
| 4 | Subject: [PATCH 030/149] OMAP4: hwmod data: Add MSTANDBY_SMART_WKUP flag | ||
| 5 | |||
| 6 | Add the flag to every IPs that support it to allow the | ||
| 7 | framework to enable it instead of the SMART_STANDBY default | ||
| 8 | mode. | ||
| 9 | Without that, an IP with busmaster capability will not | ||
| 10 | be able to wakeup the interconnect at all. | ||
| 11 | |||
| 12 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 13 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 9 +++++---- | ||
| 16 | 1 files changed, 5 insertions(+), 4 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 19 | index e1c69ff..8cbbfbf 100644 | ||
| 20 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 21 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 22 | @@ -660,7 +660,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_aess_sysc = { | ||
| 23 | .sysc_offs = 0x0010, | ||
| 24 | .sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE), | ||
| 25 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
| 26 | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | ||
| 27 | + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART | | ||
| 28 | + MSTANDBY_SMART_WKUP), | ||
| 29 | .sysc_fields = &omap_hwmod_sysc_type2, | ||
| 30 | }; | ||
| 31 | |||
| 32 | @@ -2044,7 +2045,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_hsi_sysc = { | ||
| 33 | SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS), | ||
| 34 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
| 35 | SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | | ||
| 36 | - MSTANDBY_SMART), | ||
| 37 | + MSTANDBY_SMART | MSTANDBY_SMART_WKUP), | ||
| 38 | .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 39 | }; | ||
| 40 | |||
| 41 | @@ -2446,7 +2447,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_iss_sysc = { | ||
| 42 | SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET), | ||
| 43 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
| 44 | SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | | ||
| 45 | - MSTANDBY_SMART), | ||
| 46 | + MSTANDBY_SMART | MSTANDBY_SMART_WKUP), | ||
| 47 | .sysc_fields = &omap_hwmod_sysc_type2, | ||
| 48 | }; | ||
| 49 | |||
| 50 | @@ -3420,7 +3421,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_mmc_sysc = { | ||
| 51 | SYSC_HAS_SOFTRESET), | ||
| 52 | .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
| 53 | SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO | | ||
| 54 | - MSTANDBY_SMART), | ||
| 55 | + MSTANDBY_SMART | MSTANDBY_SMART_WKUP), | ||
| 56 | .sysc_fields = &omap_hwmod_sysc_type2, | ||
| 57 | }; | ||
| 58 | |||
| 59 | -- | ||
| 60 | 1.7.2.5 | ||
| 61 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0031-OMAP2-hwmod-Enable-module-in-shutdown-to-access-sysc.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0031-OMAP2-hwmod-Enable-module-in-shutdown-to-access-sysc.patch deleted file mode 100644 index ec066b45..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0031-OMAP2-hwmod-Enable-module-in-shutdown-to-access-sysc.patch +++ /dev/null | |||
| @@ -1,37 +0,0 @@ | |||
| 1 | From 3097e6265e79329635b528dd97b7fa3ed7dbb805 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Miguel Vadillo <vadillo@ti.com> | ||
| 3 | Date: Fri, 1 Jul 2011 22:54:02 +0200 | ||
| 4 | Subject: [PATCH 031/149] OMAP2+: hwmod: Enable module in shutdown to access sysconfig | ||
| 5 | |||
| 6 | When calling the shutdown, the module may be already in idle. | ||
| 7 | Accessing the sysconfig register will then lead to a crash. | ||
| 8 | In that case, re-enable the module in order to allow the access | ||
| 9 | to the sysconfig register. | ||
| 10 | |||
| 11 | Signed-off-by: Miguel Vadillo <vadillo@ti.com> | ||
| 12 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 13 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/omap_hwmod.c | 5 ++++- | ||
| 16 | 1 files changed, 4 insertions(+), 1 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 19 | index 384d3c3..cbc2a8a 100644 | ||
| 20 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 21 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 22 | @@ -1396,8 +1396,11 @@ static int _shutdown(struct omap_hwmod *oh) | ||
| 23 | } | ||
| 24 | } | ||
| 25 | |||
| 26 | - if (oh->class->sysc) | ||
| 27 | + if (oh->class->sysc) { | ||
| 28 | + if (oh->_state == _HWMOD_STATE_IDLE) | ||
| 29 | + _enable(oh); | ||
| 30 | _shutdown_sysc(oh); | ||
| 31 | + } | ||
| 32 | |||
| 33 | /* | ||
| 34 | * If an IP contains only one HW reset line, then assert it | ||
| 35 | -- | ||
| 36 | 1.7.2.5 | ||
| 37 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0032-OMAP2-hwmod-Do-not-write-the-enawakeup-bit-if-SYSC_H.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0032-OMAP2-hwmod-Do-not-write-the-enawakeup-bit-if-SYSC_H.patch deleted file mode 100644 index 6f921086..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0032-OMAP2-hwmod-Do-not-write-the-enawakeup-bit-if-SYSC_H.patch +++ /dev/null | |||
| @@ -1,65 +0,0 @@ | |||
| 1 | From 0b7a00a668b460c5a541d2d9d77a96cd0de3f57d Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Fri, 1 Jul 2011 22:54:03 +0200 | ||
| 4 | Subject: [PATCH 032/149] OMAP2+: hwmod: Do not write the enawakeup bit if SYSC_HAS_ENAWAKEUP is not set | ||
| 5 | |||
| 6 | The Type 2 type of IPs will not have any enawakeup bit in their sysconfig. | ||
| 7 | Writing to that bit will instead trigger a softreset. | ||
| 8 | Check the flag to write this bit only if the module supports it. | ||
| 9 | |||
| 10 | Reported-by: Miguel Vadillo <vadillo@ti.com> | ||
| 11 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 12 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/omap_hwmod.c | 14 ++++---------- | ||
| 15 | 1 files changed, 4 insertions(+), 10 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 18 | index cbc2a8a..3800084 100644 | ||
| 19 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 20 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 21 | @@ -387,8 +387,6 @@ static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle, | ||
| 22 | */ | ||
| 23 | static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) | ||
| 24 | { | ||
| 25 | - u32 wakeup_mask; | ||
| 26 | - | ||
| 27 | if (!oh->class->sysc || | ||
| 28 | !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || | ||
| 29 | (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || | ||
| 30 | @@ -400,9 +398,8 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) | ||
| 31 | return -EINVAL; | ||
| 32 | } | ||
| 33 | |||
| 34 | - wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); | ||
| 35 | - | ||
| 36 | - *v |= wakeup_mask; | ||
| 37 | + if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) | ||
| 38 | + *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift; | ||
| 39 | |||
| 40 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) | ||
| 41 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v); | ||
| 42 | @@ -425,8 +422,6 @@ static int _enable_wakeup(struct omap_hwmod *oh, u32 *v) | ||
| 43 | */ | ||
| 44 | static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) | ||
| 45 | { | ||
| 46 | - u32 wakeup_mask; | ||
| 47 | - | ||
| 48 | if (!oh->class->sysc || | ||
| 49 | !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) || | ||
| 50 | (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) || | ||
| 51 | @@ -438,9 +433,8 @@ static int _disable_wakeup(struct omap_hwmod *oh, u32 *v) | ||
| 52 | return -EINVAL; | ||
| 53 | } | ||
| 54 | |||
| 55 | - wakeup_mask = (0x1 << oh->class->sysc->sysc_fields->enwkup_shift); | ||
| 56 | - | ||
| 57 | - *v &= ~wakeup_mask; | ||
| 58 | + if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) | ||
| 59 | + *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift); | ||
| 60 | |||
| 61 | if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) | ||
| 62 | _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v); | ||
| 63 | -- | ||
| 64 | 1.7.2.5 | ||
| 65 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0033-OMAP2-hwmod-Remove-_populate_mpu_rt_base-warning.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0033-OMAP2-hwmod-Remove-_populate_mpu_rt_base-warning.patch deleted file mode 100644 index 8963785a..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0033-OMAP2-hwmod-Remove-_populate_mpu_rt_base-warning.patch +++ /dev/null | |||
| @@ -1,33 +0,0 @@ | |||
| 1 | From 9c5dd6c8e5a9dd6fc98e30a45a3d929034de664b Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Fri, 1 Jul 2011 22:54:04 +0200 | ||
| 4 | Subject: [PATCH 033/149] OMAP2+: hwmod: Remove _populate_mpu_rt_base warning | ||
| 5 | |||
| 6 | It is perfectly valid for some hwmod to not have any | ||
| 7 | register target address for sysconfig. This is especially | ||
| 8 | true for interconnect hwmods. | ||
| 9 | Remove the warning. | ||
| 10 | |||
| 11 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 12 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/omap_hwmod.c | 3 --- | ||
| 15 | 1 files changed, 0 insertions(+), 3 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 18 | index 3800084..f401417 100644 | ||
| 19 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 20 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 21 | @@ -1704,9 +1704,6 @@ static int __init _populate_mpu_rt_base(struct omap_hwmod *oh, void *data) | ||
| 22 | return 0; | ||
| 23 | |||
| 24 | oh->_mpu_rt_va = _find_mpu_rt_base(oh, oh->_mpu_port_index); | ||
| 25 | - if (!oh->_mpu_rt_va) | ||
| 26 | - pr_warning("omap_hwmod: %s found no _mpu_rt_va for %s\n", | ||
| 27 | - __func__, oh->name); | ||
| 28 | |||
| 29 | return 0; | ||
| 30 | } | ||
| 31 | -- | ||
| 32 | 1.7.2.5 | ||
| 33 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0034-OMAP2-hwmod-Fix-the-HW-reset-management.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0034-OMAP2-hwmod-Fix-the-HW-reset-management.patch deleted file mode 100644 index 7e390ed8..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0034-OMAP2-hwmod-Fix-the-HW-reset-management.patch +++ /dev/null | |||
| @@ -1,87 +0,0 @@ | |||
| 1 | From 0fdacba393a3d2b2c87b4a9c4b2bb811bd896c09 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Fri, 1 Jul 2011 22:54:05 +0200 | ||
| 4 | Subject: [PATCH 034/149] OMAP2+: hwmod: Fix the HW reset management | ||
| 5 | |||
| 6 | The HW reset must be de-assert after the clocks are enabled | ||
| 7 | but before waiting for the target to be ready. Otherwise the | ||
| 8 | reset might not work properly since the clock is not running | ||
| 9 | to proceed the reset. | ||
| 10 | |||
| 11 | De-assert the reset after _enable_clocks and before | ||
| 12 | _wait_target_ready. | ||
| 13 | Re-assert it only when the clocks are disabled. | ||
| 14 | |||
| 15 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 16 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 17 | --- | ||
| 18 | arch/arm/mach-omap2/omap_hwmod.c | 32 ++++++++++++++++---------------- | ||
| 19 | 1 files changed, 16 insertions(+), 16 deletions(-) | ||
| 20 | |||
| 21 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 22 | index f401417..df91bb1 100644 | ||
| 23 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 24 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 25 | @@ -1250,15 +1250,6 @@ static int _enable(struct omap_hwmod *oh) | ||
| 26 | |||
| 27 | pr_debug("omap_hwmod: %s: enabling\n", oh->name); | ||
| 28 | |||
| 29 | - /* | ||
| 30 | - * If an IP contains only one HW reset line, then de-assert it in order | ||
| 31 | - * to allow to enable the clocks. Otherwise the PRCM will return | ||
| 32 | - * Intransition status, and the init will failed. | ||
| 33 | - */ | ||
| 34 | - if ((oh->_state == _HWMOD_STATE_INITIALIZED || | ||
| 35 | - oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) | ||
| 36 | - _deassert_hardreset(oh, oh->rst_lines[0].name); | ||
| 37 | - | ||
| 38 | /* Mux pins for device runtime if populated */ | ||
| 39 | if (oh->mux && (!oh->mux->enabled || | ||
| 40 | ((oh->_state == _HWMOD_STATE_IDLE) && | ||
| 41 | @@ -1268,6 +1259,15 @@ static int _enable(struct omap_hwmod *oh) | ||
| 42 | _add_initiator_dep(oh, mpu_oh); | ||
| 43 | _enable_clocks(oh); | ||
| 44 | |||
| 45 | + /* | ||
| 46 | + * If an IP contains only one HW reset line, then de-assert it in order | ||
| 47 | + * to allow the module state transition. Otherwise the PRCM will return | ||
| 48 | + * Intransition status, and the init will failed. | ||
| 49 | + */ | ||
| 50 | + if ((oh->_state == _HWMOD_STATE_INITIALIZED || | ||
| 51 | + oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) | ||
| 52 | + _deassert_hardreset(oh, oh->rst_lines[0].name); | ||
| 53 | + | ||
| 54 | r = _wait_target_ready(oh); | ||
| 55 | if (!r) { | ||
| 56 | oh->_state = _HWMOD_STATE_ENABLED; | ||
| 57 | @@ -1396,13 +1396,6 @@ static int _shutdown(struct omap_hwmod *oh) | ||
| 58 | _shutdown_sysc(oh); | ||
| 59 | } | ||
| 60 | |||
| 61 | - /* | ||
| 62 | - * If an IP contains only one HW reset line, then assert it | ||
| 63 | - * before disabling the clocks and shutting down the IP. | ||
| 64 | - */ | ||
| 65 | - if (oh->rst_lines_cnt == 1) | ||
| 66 | - _assert_hardreset(oh, oh->rst_lines[0].name); | ||
| 67 | - | ||
| 68 | /* clocks and deps are already disabled in idle */ | ||
| 69 | if (oh->_state == _HWMOD_STATE_ENABLED) { | ||
| 70 | _del_initiator_dep(oh, mpu_oh); | ||
| 71 | @@ -1411,6 +1404,13 @@ static int _shutdown(struct omap_hwmod *oh) | ||
| 72 | } | ||
| 73 | /* XXX Should this code also force-disable the optional clocks? */ | ||
| 74 | |||
| 75 | + /* | ||
| 76 | + * If an IP contains only one HW reset line, then assert it | ||
| 77 | + * after disabling the clocks and before shutting down the IP. | ||
| 78 | + */ | ||
| 79 | + if (oh->rst_lines_cnt == 1) | ||
| 80 | + _assert_hardreset(oh, oh->rst_lines[0].name); | ||
| 81 | + | ||
| 82 | /* Mux pins to safe mode or use populated off mode values */ | ||
| 83 | if (oh->mux) | ||
| 84 | omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED); | ||
| 85 | -- | ||
| 86 | 1.7.2.5 | ||
| 87 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0035-OMAP-hwmod-Add-warnings-if-enable-failed.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0035-OMAP-hwmod-Add-warnings-if-enable-failed.patch deleted file mode 100644 index fbedcef0..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0035-OMAP-hwmod-Add-warnings-if-enable-failed.patch +++ /dev/null | |||
| @@ -1,30 +0,0 @@ | |||
| 1 | From ea1e84fd91f4bfa506f7d44c4183ab649308b940 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Fri, 1 Jul 2011 22:54:06 +0200 | ||
| 4 | Subject: [PATCH 035/149] OMAP: hwmod: Add warnings if enable failed | ||
| 5 | |||
| 6 | Change the debug into warning to check what IPs are failing. | ||
| 7 | |||
| 8 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 9 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 10 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/omap_hwmod.c | 2 ++ | ||
| 13 | 1 files changed, 2 insertions(+), 0 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 16 | index df91bb1..64e9830 100644 | ||
| 17 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 18 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 19 | @@ -944,6 +944,8 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) | ||
| 20 | |||
| 21 | if (!ret) | ||
| 22 | oh->_state = _HWMOD_STATE_CLKS_INITED; | ||
| 23 | + else | ||
| 24 | + pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name); | ||
| 25 | |||
| 26 | return ret; | ||
| 27 | } | ||
| 28 | -- | ||
| 29 | 1.7.2.5 | ||
| 30 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0036-OMAP-hwmod-Move-pr_debug-to-improve-the-readability.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0036-OMAP-hwmod-Move-pr_debug-to-improve-the-readability.patch deleted file mode 100644 index e484c437..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0036-OMAP-hwmod-Move-pr_debug-to-improve-the-readability.patch +++ /dev/null | |||
| @@ -1,95 +0,0 @@ | |||
| 1 | From 1a090fd9d66008314ef1963ff7335462b4231d8b Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Fri, 1 Jul 2011 22:54:07 +0200 | ||
| 4 | Subject: [PATCH 036/149] OMAP: hwmod: Move pr_debug to improve the readability | ||
| 5 | |||
| 6 | Move the pr_debug at the top of the function | ||
| 7 | to trace the entry even if the first test is failing. | ||
| 8 | That help understanding that we entered the function | ||
| 9 | but failed in it. | ||
| 10 | |||
| 11 | Move the _enable last part out of the test to reduce | ||
| 12 | indentation and improve readability. | ||
| 13 | |||
| 14 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 15 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 16 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 17 | --- | ||
| 18 | arch/arm/mach-omap2/omap_hwmod.c | 32 +++++++++++++++++--------------- | ||
| 19 | 1 files changed, 17 insertions(+), 15 deletions(-) | ||
| 20 | |||
| 21 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 22 | index 64e9830..e530bcb 100644 | ||
| 23 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 24 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 25 | @@ -1242,6 +1242,8 @@ static int _enable(struct omap_hwmod *oh) | ||
| 26 | { | ||
| 27 | int r; | ||
| 28 | |||
| 29 | + pr_debug("omap_hwmod: %s: enabling\n", oh->name); | ||
| 30 | + | ||
| 31 | if (oh->_state != _HWMOD_STATE_INITIALIZED && | ||
| 32 | oh->_state != _HWMOD_STATE_IDLE && | ||
| 33 | oh->_state != _HWMOD_STATE_DISABLED) { | ||
| 34 | @@ -1250,8 +1252,6 @@ static int _enable(struct omap_hwmod *oh) | ||
| 35 | return -EINVAL; | ||
| 36 | } | ||
| 37 | |||
| 38 | - pr_debug("omap_hwmod: %s: enabling\n", oh->name); | ||
| 39 | - | ||
| 40 | /* Mux pins for device runtime if populated */ | ||
| 41 | if (oh->mux && (!oh->mux->enabled || | ||
| 42 | ((oh->_state == _HWMOD_STATE_IDLE) && | ||
| 43 | @@ -1271,19 +1271,21 @@ static int _enable(struct omap_hwmod *oh) | ||
| 44 | _deassert_hardreset(oh, oh->rst_lines[0].name); | ||
| 45 | |||
| 46 | r = _wait_target_ready(oh); | ||
| 47 | - if (!r) { | ||
| 48 | - oh->_state = _HWMOD_STATE_ENABLED; | ||
| 49 | - | ||
| 50 | - /* Access the sysconfig only if the target is ready */ | ||
| 51 | - if (oh->class->sysc) { | ||
| 52 | - if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) | ||
| 53 | - _update_sysc_cache(oh); | ||
| 54 | - _enable_sysc(oh); | ||
| 55 | - } | ||
| 56 | - } else { | ||
| 57 | - _disable_clocks(oh); | ||
| 58 | + if (r) { | ||
| 59 | pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", | ||
| 60 | oh->name, r); | ||
| 61 | + _disable_clocks(oh); | ||
| 62 | + | ||
| 63 | + return r; | ||
| 64 | + } | ||
| 65 | + | ||
| 66 | + oh->_state = _HWMOD_STATE_ENABLED; | ||
| 67 | + | ||
| 68 | + /* Access the sysconfig only if the target is ready */ | ||
| 69 | + if (oh->class->sysc) { | ||
| 70 | + if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) | ||
| 71 | + _update_sysc_cache(oh); | ||
| 72 | + _enable_sysc(oh); | ||
| 73 | } | ||
| 74 | |||
| 75 | return r; | ||
| 76 | @@ -1299,14 +1301,14 @@ static int _enable(struct omap_hwmod *oh) | ||
| 77 | */ | ||
| 78 | static int _idle(struct omap_hwmod *oh) | ||
| 79 | { | ||
| 80 | + pr_debug("omap_hwmod: %s: idling\n", oh->name); | ||
| 81 | + | ||
| 82 | if (oh->_state != _HWMOD_STATE_ENABLED) { | ||
| 83 | WARN(1, "omap_hwmod: %s: idle state can only be entered from " | ||
| 84 | "enabled state\n", oh->name); | ||
| 85 | return -EINVAL; | ||
| 86 | } | ||
| 87 | |||
| 88 | - pr_debug("omap_hwmod: %s: idling\n", oh->name); | ||
| 89 | - | ||
| 90 | if (oh->class->sysc) | ||
| 91 | _idle_sysc(oh); | ||
| 92 | _del_initiator_dep(oh, mpu_oh); | ||
| 93 | -- | ||
| 94 | 1.7.2.5 | ||
| 95 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0037-omap_hwmod-use-a-null-structure-record-to-terminate-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0037-omap_hwmod-use-a-null-structure-record-to-terminate-.patch deleted file mode 100644 index 8618e746..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0037-omap_hwmod-use-a-null-structure-record-to-terminate-.patch +++ /dev/null | |||
| @@ -1,3529 +0,0 @@ | |||
| 1 | From 2c900775f726b160e5ce702e75554282c2869d60 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Paul Walmsley <paul@pwsan.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:05 -0600 | ||
| 4 | Subject: [PATCH 037/149] omap_hwmod: use a null structure record to terminate omap_hwmod_addr_space arrays | ||
| 5 | |||
| 6 | Previously, struct omap_hwmod_addr_space arrays were unterminated; and | ||
| 7 | users of these arrays used the ARRAY_SIZE() macro to determine the | ||
| 8 | length of the array. However, ARRAY_SIZE() only works when the array | ||
| 9 | is in the same scope as the macro user. | ||
| 10 | |||
| 11 | So far this hasn't been a problem. However, to reduce duplicated | ||
| 12 | data, a subsequent patch will move common data to a separate, shared | ||
| 13 | file. When this is done, ARRAY_SIZE() will no longer be usable. | ||
| 14 | |||
| 15 | This patch removes ARRAY_SIZE() usage for struct omap_hwmod_addr_space | ||
| 16 | arrays and uses a null structure member as the array terminator | ||
| 17 | instead. | ||
| 18 | |||
| 19 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 20 | --- | ||
| 21 | arch/arm/mach-omap2/omap_hwmod.c | 45 ++++++-- | ||
| 22 | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 66 +++++----- | ||
| 23 | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 83 ++++++------- | ||
| 24 | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 108 ++++++++-------- | ||
| 25 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 170 +++++++++++++------------- | ||
| 26 | arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 - | ||
| 27 | 6 files changed, 249 insertions(+), 225 deletions(-) | ||
| 28 | |||
| 29 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 30 | index e530bcb..73599f0 100644 | ||
| 31 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 32 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 33 | @@ -2,6 +2,7 @@ | ||
| 34 | * omap_hwmod implementation for OMAP2/3/4 | ||
| 35 | * | ||
| 36 | * Copyright (C) 2009-2011 Nokia Corporation | ||
| 37 | + * Copyright (C) 2011 Texas Instruments, Inc. | ||
| 38 | * | ||
| 39 | * Paul Walmsley, Benoît Cousson, Kevin Hilman | ||
| 40 | * | ||
| 41 | @@ -678,6 +679,29 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) | ||
| 42 | } | ||
| 43 | |||
| 44 | /** | ||
| 45 | + * _count_ocp_if_addr_spaces - count the number of address space entries for @oh | ||
| 46 | + * @oh: struct omap_hwmod *oh | ||
| 47 | + * | ||
| 48 | + * Count and return the number of address space ranges associated with | ||
| 49 | + * the hwmod @oh. Used to allocate struct resource data. Returns 0 | ||
| 50 | + * if @oh is NULL. | ||
| 51 | + */ | ||
| 52 | +static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os) | ||
| 53 | +{ | ||
| 54 | + struct omap_hwmod_addr_space *mem; | ||
| 55 | + int i = 0; | ||
| 56 | + | ||
| 57 | + if (!os || !os->addr) | ||
| 58 | + return 0; | ||
| 59 | + | ||
| 60 | + do { | ||
| 61 | + mem = &os->addr[i++]; | ||
| 62 | + } while (mem->pa_start != mem->pa_end); | ||
| 63 | + | ||
| 64 | + return i; | ||
| 65 | +} | ||
| 66 | + | ||
| 67 | +/** | ||
| 68 | * _find_mpu_port_index - find hwmod OCP slave port ID intended for MPU use | ||
| 69 | * @oh: struct omap_hwmod * | ||
| 70 | * | ||
| 71 | @@ -722,8 +746,7 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) | ||
| 72 | { | ||
| 73 | struct omap_hwmod_ocp_if *os; | ||
| 74 | struct omap_hwmod_addr_space *mem; | ||
| 75 | - int i; | ||
| 76 | - int found = 0; | ||
| 77 | + int i = 0, found = 0; | ||
| 78 | void __iomem *va_start; | ||
| 79 | |||
| 80 | if (!oh || oh->slaves_cnt == 0) | ||
| 81 | @@ -731,12 +754,14 @@ static void __iomem * __init _find_mpu_rt_base(struct omap_hwmod *oh, u8 index) | ||
| 82 | |||
| 83 | os = oh->slaves[index]; | ||
| 84 | |||
| 85 | - for (i = 0, mem = os->addr; i < os->addr_cnt; i++, mem++) { | ||
| 86 | - if (mem->flags & ADDR_TYPE_RT) { | ||
| 87 | + if (!os->addr) | ||
| 88 | + return NULL; | ||
| 89 | + | ||
| 90 | + do { | ||
| 91 | + mem = &os->addr[i++]; | ||
| 92 | + if (mem->flags & ADDR_TYPE_RT) | ||
| 93 | found = 1; | ||
| 94 | - break; | ||
| 95 | - } | ||
| 96 | - } | ||
| 97 | + } while (!found && mem->pa_start != mem->pa_end); | ||
| 98 | |||
| 99 | if (found) { | ||
| 100 | va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start); | ||
| 101 | @@ -1962,7 +1987,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) | ||
| 102 | ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; | ||
| 103 | |||
| 104 | for (i = 0; i < oh->slaves_cnt; i++) | ||
| 105 | - ret += oh->slaves[i]->addr_cnt; | ||
| 106 | + ret += _count_ocp_if_addr_spaces(oh->slaves[i]); | ||
| 107 | |||
| 108 | return ret; | ||
| 109 | } | ||
| 110 | @@ -2002,10 +2027,12 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) | ||
| 111 | |||
| 112 | for (i = 0; i < oh->slaves_cnt; i++) { | ||
| 113 | struct omap_hwmod_ocp_if *os; | ||
| 114 | + int addr_cnt; | ||
| 115 | |||
| 116 | os = oh->slaves[i]; | ||
| 117 | + addr_cnt = _count_ocp_if_addr_spaces(os); | ||
| 118 | |||
| 119 | - for (j = 0; j < os->addr_cnt; j++) { | ||
| 120 | + for (j = 0; j < addr_cnt; j++) { | ||
| 121 | (res + r)->name = (os->addr + j)->name; | ||
| 122 | (res + r)->start = (os->addr + j)->pa_start; | ||
| 123 | (res + r)->end = (os->addr + j)->pa_end; | ||
| 124 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 125 | index c4d0ae8..1a7ce3e 100644 | ||
| 126 | --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 127 | +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 128 | @@ -1,7 +1,7 @@ | ||
| 129 | /* | ||
| 130 | * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips | ||
| 131 | * | ||
| 132 | - * Copyright (C) 2009-2010 Nokia Corporation | ||
| 133 | + * Copyright (C) 2009-2011 Nokia Corporation | ||
| 134 | * Paul Walmsley | ||
| 135 | * | ||
| 136 | * This program is free software; you can redistribute it and/or modify | ||
| 137 | @@ -120,6 +120,7 @@ static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { | ||
| 138 | .pa_end = 0x480980ff, | ||
| 139 | .flags = ADDR_TYPE_RT, | ||
| 140 | }, | ||
| 141 | + { } | ||
| 142 | }; | ||
| 143 | |||
| 144 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { | ||
| 145 | @@ -127,7 +128,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { | ||
| 146 | .slave = &omap2420_mcspi1_hwmod, | ||
| 147 | .clk = "mcspi1_ick", | ||
| 148 | .addr = omap2420_mcspi1_addr_space, | ||
| 149 | - .addr_cnt = ARRAY_SIZE(omap2420_mcspi1_addr_space), | ||
| 150 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 151 | }; | ||
| 152 | |||
| 153 | @@ -138,6 +138,7 @@ static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { | ||
| 154 | .pa_end = 0x4809a0ff, | ||
| 155 | .flags = ADDR_TYPE_RT, | ||
| 156 | }, | ||
| 157 | + { } | ||
| 158 | }; | ||
| 159 | |||
| 160 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { | ||
| 161 | @@ -145,7 +146,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { | ||
| 162 | .slave = &omap2420_mcspi2_hwmod, | ||
| 163 | .clk = "mcspi2_ick", | ||
| 164 | .addr = omap2420_mcspi2_addr_space, | ||
| 165 | - .addr_cnt = ARRAY_SIZE(omap2420_mcspi2_addr_space), | ||
| 166 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 167 | }; | ||
| 168 | |||
| 169 | @@ -163,6 +163,7 @@ static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = { | ||
| 170 | .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, | ||
| 171 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 172 | }, | ||
| 173 | + { } | ||
| 174 | }; | ||
| 175 | |||
| 176 | static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { | ||
| 177 | @@ -170,7 +171,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { | ||
| 178 | .slave = &omap2420_uart1_hwmod, | ||
| 179 | .clk = "uart1_ick", | ||
| 180 | .addr = omap2420_uart1_addr_space, | ||
| 181 | - .addr_cnt = ARRAY_SIZE(omap2420_uart1_addr_space), | ||
| 182 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 183 | }; | ||
| 184 | |||
| 185 | @@ -181,6 +181,7 @@ static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = { | ||
| 186 | .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, | ||
| 187 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 188 | }, | ||
| 189 | + { } | ||
| 190 | }; | ||
| 191 | |||
| 192 | static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { | ||
| 193 | @@ -188,7 +189,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { | ||
| 194 | .slave = &omap2420_uart2_hwmod, | ||
| 195 | .clk = "uart2_ick", | ||
| 196 | .addr = omap2420_uart2_addr_space, | ||
| 197 | - .addr_cnt = ARRAY_SIZE(omap2420_uart2_addr_space), | ||
| 198 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 199 | }; | ||
| 200 | |||
| 201 | @@ -199,6 +199,7 @@ static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = { | ||
| 202 | .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, | ||
| 203 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 204 | }, | ||
| 205 | + { } | ||
| 206 | }; | ||
| 207 | |||
| 208 | static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { | ||
| 209 | @@ -206,7 +207,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { | ||
| 210 | .slave = &omap2420_uart3_hwmod, | ||
| 211 | .clk = "uart3_ick", | ||
| 212 | .addr = omap2420_uart3_addr_space, | ||
| 213 | - .addr_cnt = ARRAY_SIZE(omap2420_uart3_addr_space), | ||
| 214 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 215 | }; | ||
| 216 | |||
| 217 | @@ -220,6 +220,7 @@ static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = { | ||
| 218 | .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, | ||
| 219 | .flags = ADDR_TYPE_RT, | ||
| 220 | }, | ||
| 221 | + { } | ||
| 222 | }; | ||
| 223 | |||
| 224 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { | ||
| 225 | @@ -227,7 +228,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { | ||
| 226 | .slave = &omap2420_i2c1_hwmod, | ||
| 227 | .clk = "i2c1_ick", | ||
| 228 | .addr = omap2420_i2c1_addr_space, | ||
| 229 | - .addr_cnt = ARRAY_SIZE(omap2420_i2c1_addr_space), | ||
| 230 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 231 | }; | ||
| 232 | |||
| 233 | @@ -238,6 +238,7 @@ static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = { | ||
| 234 | .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, | ||
| 235 | .flags = ADDR_TYPE_RT, | ||
| 236 | }, | ||
| 237 | + { } | ||
| 238 | }; | ||
| 239 | |||
| 240 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { | ||
| 241 | @@ -245,7 +246,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { | ||
| 242 | .slave = &omap2420_i2c2_hwmod, | ||
| 243 | .clk = "i2c2_ick", | ||
| 244 | .addr = omap2420_i2c2_addr_space, | ||
| 245 | - .addr_cnt = ARRAY_SIZE(omap2420_i2c2_addr_space), | ||
| 246 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 247 | }; | ||
| 248 | |||
| 249 | @@ -370,6 +370,7 @@ static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { | ||
| 250 | .pa_end = 0x48028000 + SZ_1K - 1, | ||
| 251 | .flags = ADDR_TYPE_RT | ||
| 252 | }, | ||
| 253 | + { } | ||
| 254 | }; | ||
| 255 | |||
| 256 | /* l4_wkup -> timer1 */ | ||
| 257 | @@ -378,7 +379,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = { | ||
| 258 | .slave = &omap2420_timer1_hwmod, | ||
| 259 | .clk = "gpt1_ick", | ||
| 260 | .addr = omap2420_timer1_addrs, | ||
| 261 | - .addr_cnt = ARRAY_SIZE(omap2420_timer1_addrs), | ||
| 262 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 263 | }; | ||
| 264 | |||
| 265 | @@ -420,6 +420,7 @@ static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = { | ||
| 266 | .pa_end = 0x4802a000 + SZ_1K - 1, | ||
| 267 | .flags = ADDR_TYPE_RT | ||
| 268 | }, | ||
| 269 | + { } | ||
| 270 | }; | ||
| 271 | |||
| 272 | /* l4_core -> timer2 */ | ||
| 273 | @@ -428,7 +429,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { | ||
| 274 | .slave = &omap2420_timer2_hwmod, | ||
| 275 | .clk = "gpt2_ick", | ||
| 276 | .addr = omap2420_timer2_addrs, | ||
| 277 | - .addr_cnt = ARRAY_SIZE(omap2420_timer2_addrs), | ||
| 278 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 279 | }; | ||
| 280 | |||
| 281 | @@ -470,6 +470,7 @@ static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = { | ||
| 282 | .pa_end = 0x48078000 + SZ_1K - 1, | ||
| 283 | .flags = ADDR_TYPE_RT | ||
| 284 | }, | ||
| 285 | + { } | ||
| 286 | }; | ||
| 287 | |||
| 288 | /* l4_core -> timer3 */ | ||
| 289 | @@ -478,7 +479,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { | ||
| 290 | .slave = &omap2420_timer3_hwmod, | ||
| 291 | .clk = "gpt3_ick", | ||
| 292 | .addr = omap2420_timer3_addrs, | ||
| 293 | - .addr_cnt = ARRAY_SIZE(omap2420_timer3_addrs), | ||
| 294 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 295 | }; | ||
| 296 | |||
| 297 | @@ -520,6 +520,7 @@ static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = { | ||
| 298 | .pa_end = 0x4807a000 + SZ_1K - 1, | ||
| 299 | .flags = ADDR_TYPE_RT | ||
| 300 | }, | ||
| 301 | + { } | ||
| 302 | }; | ||
| 303 | |||
| 304 | /* l4_core -> timer4 */ | ||
| 305 | @@ -528,7 +529,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { | ||
| 306 | .slave = &omap2420_timer4_hwmod, | ||
| 307 | .clk = "gpt4_ick", | ||
| 308 | .addr = omap2420_timer4_addrs, | ||
| 309 | - .addr_cnt = ARRAY_SIZE(omap2420_timer4_addrs), | ||
| 310 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 311 | }; | ||
| 312 | |||
| 313 | @@ -570,6 +570,7 @@ static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = { | ||
| 314 | .pa_end = 0x4807c000 + SZ_1K - 1, | ||
| 315 | .flags = ADDR_TYPE_RT | ||
| 316 | }, | ||
| 317 | + { } | ||
| 318 | }; | ||
| 319 | |||
| 320 | /* l4_core -> timer5 */ | ||
| 321 | @@ -578,7 +579,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { | ||
| 322 | .slave = &omap2420_timer5_hwmod, | ||
| 323 | .clk = "gpt5_ick", | ||
| 324 | .addr = omap2420_timer5_addrs, | ||
| 325 | - .addr_cnt = ARRAY_SIZE(omap2420_timer5_addrs), | ||
| 326 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 327 | }; | ||
| 328 | |||
| 329 | @@ -621,6 +621,7 @@ static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = { | ||
| 330 | .pa_end = 0x4807e000 + SZ_1K - 1, | ||
| 331 | .flags = ADDR_TYPE_RT | ||
| 332 | }, | ||
| 333 | + { } | ||
| 334 | }; | ||
| 335 | |||
| 336 | /* l4_core -> timer6 */ | ||
| 337 | @@ -629,7 +630,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { | ||
| 338 | .slave = &omap2420_timer6_hwmod, | ||
| 339 | .clk = "gpt6_ick", | ||
| 340 | .addr = omap2420_timer6_addrs, | ||
| 341 | - .addr_cnt = ARRAY_SIZE(omap2420_timer6_addrs), | ||
| 342 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 343 | }; | ||
| 344 | |||
| 345 | @@ -671,6 +671,7 @@ static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = { | ||
| 346 | .pa_end = 0x48080000 + SZ_1K - 1, | ||
| 347 | .flags = ADDR_TYPE_RT | ||
| 348 | }, | ||
| 349 | + { } | ||
| 350 | }; | ||
| 351 | |||
| 352 | /* l4_core -> timer7 */ | ||
| 353 | @@ -679,7 +680,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { | ||
| 354 | .slave = &omap2420_timer7_hwmod, | ||
| 355 | .clk = "gpt7_ick", | ||
| 356 | .addr = omap2420_timer7_addrs, | ||
| 357 | - .addr_cnt = ARRAY_SIZE(omap2420_timer7_addrs), | ||
| 358 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 359 | }; | ||
| 360 | |||
| 361 | @@ -721,6 +721,7 @@ static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = { | ||
| 362 | .pa_end = 0x48082000 + SZ_1K - 1, | ||
| 363 | .flags = ADDR_TYPE_RT | ||
| 364 | }, | ||
| 365 | + { } | ||
| 366 | }; | ||
| 367 | |||
| 368 | /* l4_core -> timer8 */ | ||
| 369 | @@ -729,7 +730,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { | ||
| 370 | .slave = &omap2420_timer8_hwmod, | ||
| 371 | .clk = "gpt8_ick", | ||
| 372 | .addr = omap2420_timer8_addrs, | ||
| 373 | - .addr_cnt = ARRAY_SIZE(omap2420_timer8_addrs), | ||
| 374 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 375 | }; | ||
| 376 | |||
| 377 | @@ -771,6 +771,7 @@ static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = { | ||
| 378 | .pa_end = 0x48084000 + SZ_1K - 1, | ||
| 379 | .flags = ADDR_TYPE_RT | ||
| 380 | }, | ||
| 381 | + { } | ||
| 382 | }; | ||
| 383 | |||
| 384 | /* l4_core -> timer9 */ | ||
| 385 | @@ -779,7 +780,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { | ||
| 386 | .slave = &omap2420_timer9_hwmod, | ||
| 387 | .clk = "gpt9_ick", | ||
| 388 | .addr = omap2420_timer9_addrs, | ||
| 389 | - .addr_cnt = ARRAY_SIZE(omap2420_timer9_addrs), | ||
| 390 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 391 | }; | ||
| 392 | |||
| 393 | @@ -821,6 +821,7 @@ static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = { | ||
| 394 | .pa_end = 0x48086000 + SZ_1K - 1, | ||
| 395 | .flags = ADDR_TYPE_RT | ||
| 396 | }, | ||
| 397 | + { } | ||
| 398 | }; | ||
| 399 | |||
| 400 | /* l4_core -> timer10 */ | ||
| 401 | @@ -829,7 +830,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { | ||
| 402 | .slave = &omap2420_timer10_hwmod, | ||
| 403 | .clk = "gpt10_ick", | ||
| 404 | .addr = omap2420_timer10_addrs, | ||
| 405 | - .addr_cnt = ARRAY_SIZE(omap2420_timer10_addrs), | ||
| 406 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 407 | }; | ||
| 408 | |||
| 409 | @@ -871,6 +871,7 @@ static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = { | ||
| 410 | .pa_end = 0x48088000 + SZ_1K - 1, | ||
| 411 | .flags = ADDR_TYPE_RT | ||
| 412 | }, | ||
| 413 | + { } | ||
| 414 | }; | ||
| 415 | |||
| 416 | /* l4_core -> timer11 */ | ||
| 417 | @@ -879,7 +880,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { | ||
| 418 | .slave = &omap2420_timer11_hwmod, | ||
| 419 | .clk = "gpt11_ick", | ||
| 420 | .addr = omap2420_timer11_addrs, | ||
| 421 | - .addr_cnt = ARRAY_SIZE(omap2420_timer11_addrs), | ||
| 422 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 423 | }; | ||
| 424 | |||
| 425 | @@ -921,6 +921,7 @@ static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = { | ||
| 426 | .pa_end = 0x4808a000 + SZ_1K - 1, | ||
| 427 | .flags = ADDR_TYPE_RT | ||
| 428 | }, | ||
| 429 | + { } | ||
| 430 | }; | ||
| 431 | |||
| 432 | /* l4_core -> timer12 */ | ||
| 433 | @@ -929,7 +930,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { | ||
| 434 | .slave = &omap2420_timer12_hwmod, | ||
| 435 | .clk = "gpt12_ick", | ||
| 436 | .addr = omap2420_timer12_addrs, | ||
| 437 | - .addr_cnt = ARRAY_SIZE(omap2420_timer12_addrs), | ||
| 438 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 439 | }; | ||
| 440 | |||
| 441 | @@ -966,6 +966,7 @@ static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { | ||
| 442 | .pa_end = 0x4802207f, | ||
| 443 | .flags = ADDR_TYPE_RT | ||
| 444 | }, | ||
| 445 | + { } | ||
| 446 | }; | ||
| 447 | |||
| 448 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { | ||
| 449 | @@ -973,7 +974,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { | ||
| 450 | .slave = &omap2420_wd_timer2_hwmod, | ||
| 451 | .clk = "mpu_wdt_ick", | ||
| 452 | .addr = omap2420_wd_timer2_addrs, | ||
| 453 | - .addr_cnt = ARRAY_SIZE(omap2420_wd_timer2_addrs), | ||
| 454 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 455 | }; | ||
| 456 | |||
| 457 | @@ -1184,6 +1184,7 @@ static struct omap_hwmod_addr_space omap2420_dss_addrs[] = { | ||
| 458 | .pa_end = 0x480503FF, | ||
| 459 | .flags = ADDR_TYPE_RT | ||
| 460 | }, | ||
| 461 | + { } | ||
| 462 | }; | ||
| 463 | |||
| 464 | /* l4_core -> dss */ | ||
| 465 | @@ -1192,7 +1193,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { | ||
| 466 | .slave = &omap2420_dss_core_hwmod, | ||
| 467 | .clk = "dss_ick", | ||
| 468 | .addr = omap2420_dss_addrs, | ||
| 469 | - .addr_cnt = ARRAY_SIZE(omap2420_dss_addrs), | ||
| 470 | .fw = { | ||
| 471 | .omap2 = { | ||
| 472 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, | ||
| 473 | @@ -1268,6 +1268,7 @@ static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { | ||
| 474 | .pa_end = 0x480507FF, | ||
| 475 | .flags = ADDR_TYPE_RT | ||
| 476 | }, | ||
| 477 | + { } | ||
| 478 | }; | ||
| 479 | |||
| 480 | /* l4_core -> dss_dispc */ | ||
| 481 | @@ -1276,7 +1277,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { | ||
| 482 | .slave = &omap2420_dss_dispc_hwmod, | ||
| 483 | .clk = "dss_ick", | ||
| 484 | .addr = omap2420_dss_dispc_addrs, | ||
| 485 | - .addr_cnt = ARRAY_SIZE(omap2420_dss_dispc_addrs), | ||
| 486 | .fw = { | ||
| 487 | .omap2 = { | ||
| 488 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, | ||
| 489 | @@ -1338,6 +1338,7 @@ static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = { | ||
| 490 | .pa_end = 0x48050BFF, | ||
| 491 | .flags = ADDR_TYPE_RT | ||
| 492 | }, | ||
| 493 | + { } | ||
| 494 | }; | ||
| 495 | |||
| 496 | /* l4_core -> dss_rfbi */ | ||
| 497 | @@ -1346,7 +1347,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { | ||
| 498 | .slave = &omap2420_dss_rfbi_hwmod, | ||
| 499 | .clk = "dss_ick", | ||
| 500 | .addr = omap2420_dss_rfbi_addrs, | ||
| 501 | - .addr_cnt = ARRAY_SIZE(omap2420_dss_rfbi_addrs), | ||
| 502 | .fw = { | ||
| 503 | .omap2 = { | ||
| 504 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, | ||
| 505 | @@ -1394,6 +1394,7 @@ static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = { | ||
| 506 | .pa_end = 0x48050FFF, | ||
| 507 | .flags = ADDR_TYPE_RT | ||
| 508 | }, | ||
| 509 | + { } | ||
| 510 | }; | ||
| 511 | |||
| 512 | /* l4_core -> dss_venc */ | ||
| 513 | @@ -1402,7 +1403,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { | ||
| 514 | .slave = &omap2420_dss_venc_hwmod, | ||
| 515 | .clk = "dss_54m_fck", | ||
| 516 | .addr = omap2420_dss_venc_addrs, | ||
| 517 | - .addr_cnt = ARRAY_SIZE(omap2420_dss_venc_addrs), | ||
| 518 | .fw = { | ||
| 519 | .omap2 = { | ||
| 520 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, | ||
| 521 | @@ -1536,6 +1536,7 @@ static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = { | ||
| 522 | .pa_end = 0x480181ff, | ||
| 523 | .flags = ADDR_TYPE_RT | ||
| 524 | }, | ||
| 525 | + { } | ||
| 526 | }; | ||
| 527 | |||
| 528 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { | ||
| 529 | @@ -1543,7 +1544,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { | ||
| 530 | .slave = &omap2420_gpio1_hwmod, | ||
| 531 | .clk = "gpios_ick", | ||
| 532 | .addr = omap2420_gpio1_addr_space, | ||
| 533 | - .addr_cnt = ARRAY_SIZE(omap2420_gpio1_addr_space), | ||
| 534 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 535 | }; | ||
| 536 | |||
| 537 | @@ -1554,6 +1554,7 @@ static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = { | ||
| 538 | .pa_end = 0x4801a1ff, | ||
| 539 | .flags = ADDR_TYPE_RT | ||
| 540 | }, | ||
| 541 | + { } | ||
| 542 | }; | ||
| 543 | |||
| 544 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { | ||
| 545 | @@ -1561,7 +1562,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { | ||
| 546 | .slave = &omap2420_gpio2_hwmod, | ||
| 547 | .clk = "gpios_ick", | ||
| 548 | .addr = omap2420_gpio2_addr_space, | ||
| 549 | - .addr_cnt = ARRAY_SIZE(omap2420_gpio2_addr_space), | ||
| 550 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 551 | }; | ||
| 552 | |||
| 553 | @@ -1572,6 +1572,7 @@ static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = { | ||
| 554 | .pa_end = 0x4801c1ff, | ||
| 555 | .flags = ADDR_TYPE_RT | ||
| 556 | }, | ||
| 557 | + { } | ||
| 558 | }; | ||
| 559 | |||
| 560 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { | ||
| 561 | @@ -1579,7 +1580,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { | ||
| 562 | .slave = &omap2420_gpio3_hwmod, | ||
| 563 | .clk = "gpios_ick", | ||
| 564 | .addr = omap2420_gpio3_addr_space, | ||
| 565 | - .addr_cnt = ARRAY_SIZE(omap2420_gpio3_addr_space), | ||
| 566 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 567 | }; | ||
| 568 | |||
| 569 | @@ -1590,6 +1590,7 @@ static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = { | ||
| 570 | .pa_end = 0x4801e1ff, | ||
| 571 | .flags = ADDR_TYPE_RT | ||
| 572 | }, | ||
| 573 | + { } | ||
| 574 | }; | ||
| 575 | |||
| 576 | static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { | ||
| 577 | @@ -1597,7 +1598,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { | ||
| 578 | .slave = &omap2420_gpio4_hwmod, | ||
| 579 | .clk = "gpios_ick", | ||
| 580 | .addr = omap2420_gpio4_addr_space, | ||
| 581 | - .addr_cnt = ARRAY_SIZE(omap2420_gpio4_addr_space), | ||
| 582 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 583 | }; | ||
| 584 | |||
| 585 | @@ -1789,6 +1789,7 @@ static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { | ||
| 586 | .pa_end = 0x48056fff, | ||
| 587 | .flags = ADDR_TYPE_RT | ||
| 588 | }, | ||
| 589 | + { } | ||
| 590 | }; | ||
| 591 | |||
| 592 | /* dma_system -> L3 */ | ||
| 593 | @@ -1810,7 +1811,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { | ||
| 594 | .slave = &omap2420_dma_system_hwmod, | ||
| 595 | .clk = "sdma_ick", | ||
| 596 | .addr = omap2420_dma_system_addrs, | ||
| 597 | - .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs), | ||
| 598 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 599 | }; | ||
| 600 | |||
| 601 | @@ -1868,6 +1868,7 @@ static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = { | ||
| 602 | .pa_end = 0x480941ff, | ||
| 603 | .flags = ADDR_TYPE_RT, | ||
| 604 | }, | ||
| 605 | + { } | ||
| 606 | }; | ||
| 607 | |||
| 608 | /* l4_core -> mailbox */ | ||
| 609 | @@ -1875,7 +1876,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { | ||
| 610 | .master = &omap2420_l4_core_hwmod, | ||
| 611 | .slave = &omap2420_mailbox_hwmod, | ||
| 612 | .addr = omap2420_mailbox_addrs, | ||
| 613 | - .addr_cnt = ARRAY_SIZE(omap2420_mailbox_addrs), | ||
| 614 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 615 | }; | ||
| 616 | |||
| 617 | @@ -2044,6 +2044,7 @@ static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { | ||
| 618 | .pa_end = 0x480740ff, | ||
| 619 | .flags = ADDR_TYPE_RT | ||
| 620 | }, | ||
| 621 | + { } | ||
| 622 | }; | ||
| 623 | |||
| 624 | /* l4_core -> mcbsp1 */ | ||
| 625 | @@ -2052,7 +2053,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { | ||
| 626 | .slave = &omap2420_mcbsp1_hwmod, | ||
| 627 | .clk = "mcbsp1_ick", | ||
| 628 | .addr = omap2420_mcbsp1_addrs, | ||
| 629 | - .addr_cnt = ARRAY_SIZE(omap2420_mcbsp1_addrs), | ||
| 630 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 631 | }; | ||
| 632 | |||
| 633 | @@ -2101,6 +2101,7 @@ static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { | ||
| 634 | .pa_end = 0x480760ff, | ||
| 635 | .flags = ADDR_TYPE_RT | ||
| 636 | }, | ||
| 637 | + { } | ||
| 638 | }; | ||
| 639 | |||
| 640 | /* l4_core -> mcbsp2 */ | ||
| 641 | @@ -2109,7 +2110,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { | ||
| 642 | .slave = &omap2420_mcbsp2_hwmod, | ||
| 643 | .clk = "mcbsp2_ick", | ||
| 644 | .addr = omap2420_mcbsp2_addrs, | ||
| 645 | - .addr_cnt = ARRAY_SIZE(omap2420_mcbsp2_addrs), | ||
| 646 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 647 | }; | ||
| 648 | |||
| 649 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 650 | index 9682dd5..da28794 100644 | ||
| 651 | --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 652 | +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 653 | @@ -1,7 +1,7 @@ | ||
| 654 | /* | ||
| 655 | * omap_hwmod_2430_data.c - hardware modules present on the OMAP2430 chips | ||
| 656 | * | ||
| 657 | - * Copyright (C) 2009-2010 Nokia Corporation | ||
| 658 | + * Copyright (C) 2009-2011 Nokia Corporation | ||
| 659 | * Paul Walmsley | ||
| 660 | * | ||
| 661 | * This program is free software; you can redistribute it and/or modify | ||
| 662 | @@ -141,6 +141,7 @@ static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { | ||
| 663 | .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, | ||
| 664 | .flags = ADDR_TYPE_RT, | ||
| 665 | }, | ||
| 666 | + { } | ||
| 667 | }; | ||
| 668 | |||
| 669 | static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { | ||
| 670 | @@ -148,7 +149,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { | ||
| 671 | .slave = &omap2430_i2c1_hwmod, | ||
| 672 | .clk = "i2c1_ick", | ||
| 673 | .addr = omap2430_i2c1_addr_space, | ||
| 674 | - .addr_cnt = ARRAY_SIZE(omap2430_i2c1_addr_space), | ||
| 675 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 676 | }; | ||
| 677 | |||
| 678 | @@ -159,6 +159,7 @@ static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { | ||
| 679 | .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, | ||
| 680 | .flags = ADDR_TYPE_RT, | ||
| 681 | }, | ||
| 682 | + { } | ||
| 683 | }; | ||
| 684 | |||
| 685 | static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { | ||
| 686 | @@ -166,7 +167,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { | ||
| 687 | .slave = &omap2430_i2c2_hwmod, | ||
| 688 | .clk = "i2c2_ick", | ||
| 689 | .addr = omap2430_i2c2_addr_space, | ||
| 690 | - .addr_cnt = ARRAY_SIZE(omap2430_i2c2_addr_space), | ||
| 691 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 692 | }; | ||
| 693 | |||
| 694 | @@ -184,6 +184,7 @@ static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { | ||
| 695 | .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, | ||
| 696 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 697 | }, | ||
| 698 | + { } | ||
| 699 | }; | ||
| 700 | |||
| 701 | static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { | ||
| 702 | @@ -191,7 +192,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { | ||
| 703 | .slave = &omap2430_uart1_hwmod, | ||
| 704 | .clk = "uart1_ick", | ||
| 705 | .addr = omap2430_uart1_addr_space, | ||
| 706 | - .addr_cnt = ARRAY_SIZE(omap2430_uart1_addr_space), | ||
| 707 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 708 | }; | ||
| 709 | |||
| 710 | @@ -202,6 +202,7 @@ static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { | ||
| 711 | .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, | ||
| 712 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 713 | }, | ||
| 714 | + { } | ||
| 715 | }; | ||
| 716 | |||
| 717 | static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { | ||
| 718 | @@ -209,7 +210,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { | ||
| 719 | .slave = &omap2430_uart2_hwmod, | ||
| 720 | .clk = "uart2_ick", | ||
| 721 | .addr = omap2430_uart2_addr_space, | ||
| 722 | - .addr_cnt = ARRAY_SIZE(omap2430_uart2_addr_space), | ||
| 723 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 724 | }; | ||
| 725 | |||
| 726 | @@ -220,6 +220,7 @@ static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { | ||
| 727 | .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, | ||
| 728 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 729 | }, | ||
| 730 | + { } | ||
| 731 | }; | ||
| 732 | |||
| 733 | static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { | ||
| 734 | @@ -227,7 +228,6 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { | ||
| 735 | .slave = &omap2430_uart3_hwmod, | ||
| 736 | .clk = "uart3_ick", | ||
| 737 | .addr = omap2430_uart3_addr_space, | ||
| 738 | - .addr_cnt = ARRAY_SIZE(omap2430_uart3_addr_space), | ||
| 739 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 740 | }; | ||
| 741 | |||
| 742 | @@ -248,7 +248,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = { | ||
| 743 | .slave = &omap2430_usbhsotg_hwmod, | ||
| 744 | .clk = "usb_l4_ick", | ||
| 745 | .addr = omap2430_usbhsotg_addrs, | ||
| 746 | - .addr_cnt = ARRAY_SIZE(omap2430_usbhsotg_addrs), | ||
| 747 | .user = OCP_USER_MPU, | ||
| 748 | }; | ||
| 749 | |||
| 750 | @@ -267,6 +266,7 @@ static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { | ||
| 751 | .pa_end = 0x4809c1ff, | ||
| 752 | .flags = ADDR_TYPE_RT, | ||
| 753 | }, | ||
| 754 | + { } | ||
| 755 | }; | ||
| 756 | |||
| 757 | static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { | ||
| 758 | @@ -274,7 +274,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { | ||
| 759 | .slave = &omap2430_mmc1_hwmod, | ||
| 760 | .clk = "mmchs1_ick", | ||
| 761 | .addr = omap2430_mmc1_addr_space, | ||
| 762 | - .addr_cnt = ARRAY_SIZE(omap2430_mmc1_addr_space), | ||
| 763 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 764 | }; | ||
| 765 | |||
| 766 | @@ -285,14 +284,14 @@ static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { | ||
| 767 | .pa_end = 0x480b41ff, | ||
| 768 | .flags = ADDR_TYPE_RT, | ||
| 769 | }, | ||
| 770 | + { } | ||
| 771 | }; | ||
| 772 | |||
| 773 | static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { | ||
| 774 | .master = &omap2430_l4_core_hwmod, | ||
| 775 | .slave = &omap2430_mmc2_hwmod, | ||
| 776 | - .addr = omap2430_mmc2_addr_space, | ||
| 777 | .clk = "mmchs2_ick", | ||
| 778 | - .addr_cnt = ARRAY_SIZE(omap2430_mmc2_addr_space), | ||
| 779 | + .addr = omap2430_mmc2_addr_space, | ||
| 780 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 781 | }; | ||
| 782 | |||
| 783 | @@ -339,6 +338,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { | ||
| 784 | .pa_end = 0x480980ff, | ||
| 785 | .flags = ADDR_TYPE_RT, | ||
| 786 | }, | ||
| 787 | + { } | ||
| 788 | }; | ||
| 789 | |||
| 790 | static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { | ||
| 791 | @@ -346,7 +346,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { | ||
| 792 | .slave = &omap2430_mcspi1_hwmod, | ||
| 793 | .clk = "mcspi1_ick", | ||
| 794 | .addr = omap2430_mcspi1_addr_space, | ||
| 795 | - .addr_cnt = ARRAY_SIZE(omap2430_mcspi1_addr_space), | ||
| 796 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 797 | }; | ||
| 798 | |||
| 799 | @@ -357,6 +356,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { | ||
| 800 | .pa_end = 0x4809a0ff, | ||
| 801 | .flags = ADDR_TYPE_RT, | ||
| 802 | }, | ||
| 803 | + { } | ||
| 804 | }; | ||
| 805 | |||
| 806 | static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { | ||
| 807 | @@ -364,7 +364,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { | ||
| 808 | .slave = &omap2430_mcspi2_hwmod, | ||
| 809 | .clk = "mcspi2_ick", | ||
| 810 | .addr = omap2430_mcspi2_addr_space, | ||
| 811 | - .addr_cnt = ARRAY_SIZE(omap2430_mcspi2_addr_space), | ||
| 812 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 813 | }; | ||
| 814 | |||
| 815 | @@ -375,6 +374,7 @@ static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { | ||
| 816 | .pa_end = 0x480b80ff, | ||
| 817 | .flags = ADDR_TYPE_RT, | ||
| 818 | }, | ||
| 819 | + { } | ||
| 820 | }; | ||
| 821 | |||
| 822 | static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { | ||
| 823 | @@ -382,7 +382,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { | ||
| 824 | .slave = &omap2430_mcspi3_hwmod, | ||
| 825 | .clk = "mcspi3_ick", | ||
| 826 | .addr = omap2430_mcspi3_addr_space, | ||
| 827 | - .addr_cnt = ARRAY_SIZE(omap2430_mcspi3_addr_space), | ||
| 828 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 829 | }; | ||
| 830 | |||
| 831 | @@ -471,6 +470,7 @@ static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { | ||
| 832 | .pa_end = 0x49018000 + SZ_1K - 1, | ||
| 833 | .flags = ADDR_TYPE_RT | ||
| 834 | }, | ||
| 835 | + { } | ||
| 836 | }; | ||
| 837 | |||
| 838 | /* l4_wkup -> timer1 */ | ||
| 839 | @@ -479,7 +479,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__timer1 = { | ||
| 840 | .slave = &omap2430_timer1_hwmod, | ||
| 841 | .clk = "gpt1_ick", | ||
| 842 | .addr = omap2430_timer1_addrs, | ||
| 843 | - .addr_cnt = ARRAY_SIZE(omap2430_timer1_addrs), | ||
| 844 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 845 | }; | ||
| 846 | |||
| 847 | @@ -521,6 +520,7 @@ static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = { | ||
| 848 | .pa_end = 0x4802a000 + SZ_1K - 1, | ||
| 849 | .flags = ADDR_TYPE_RT | ||
| 850 | }, | ||
| 851 | + { } | ||
| 852 | }; | ||
| 853 | |||
| 854 | /* l4_core -> timer2 */ | ||
| 855 | @@ -529,7 +529,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { | ||
| 856 | .slave = &omap2430_timer2_hwmod, | ||
| 857 | .clk = "gpt2_ick", | ||
| 858 | .addr = omap2430_timer2_addrs, | ||
| 859 | - .addr_cnt = ARRAY_SIZE(omap2430_timer2_addrs), | ||
| 860 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 861 | }; | ||
| 862 | |||
| 863 | @@ -571,6 +570,7 @@ static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = { | ||
| 864 | .pa_end = 0x48078000 + SZ_1K - 1, | ||
| 865 | .flags = ADDR_TYPE_RT | ||
| 866 | }, | ||
| 867 | + { } | ||
| 868 | }; | ||
| 869 | |||
| 870 | /* l4_core -> timer3 */ | ||
| 871 | @@ -579,7 +579,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { | ||
| 872 | .slave = &omap2430_timer3_hwmod, | ||
| 873 | .clk = "gpt3_ick", | ||
| 874 | .addr = omap2430_timer3_addrs, | ||
| 875 | - .addr_cnt = ARRAY_SIZE(omap2430_timer3_addrs), | ||
| 876 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 877 | }; | ||
| 878 | |||
| 879 | @@ -621,6 +620,7 @@ static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = { | ||
| 880 | .pa_end = 0x4807a000 + SZ_1K - 1, | ||
| 881 | .flags = ADDR_TYPE_RT | ||
| 882 | }, | ||
| 883 | + { } | ||
| 884 | }; | ||
| 885 | |||
| 886 | /* l4_core -> timer4 */ | ||
| 887 | @@ -629,7 +629,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { | ||
| 888 | .slave = &omap2430_timer4_hwmod, | ||
| 889 | .clk = "gpt4_ick", | ||
| 890 | .addr = omap2430_timer4_addrs, | ||
| 891 | - .addr_cnt = ARRAY_SIZE(omap2430_timer4_addrs), | ||
| 892 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 893 | }; | ||
| 894 | |||
| 895 | @@ -671,6 +670,7 @@ static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = { | ||
| 896 | .pa_end = 0x4807c000 + SZ_1K - 1, | ||
| 897 | .flags = ADDR_TYPE_RT | ||
| 898 | }, | ||
| 899 | + { } | ||
| 900 | }; | ||
| 901 | |||
| 902 | /* l4_core -> timer5 */ | ||
| 903 | @@ -679,7 +679,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { | ||
| 904 | .slave = &omap2430_timer5_hwmod, | ||
| 905 | .clk = "gpt5_ick", | ||
| 906 | .addr = omap2430_timer5_addrs, | ||
| 907 | - .addr_cnt = ARRAY_SIZE(omap2430_timer5_addrs), | ||
| 908 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 909 | }; | ||
| 910 | |||
| 911 | @@ -721,6 +720,7 @@ static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = { | ||
| 912 | .pa_end = 0x4807e000 + SZ_1K - 1, | ||
| 913 | .flags = ADDR_TYPE_RT | ||
| 914 | }, | ||
| 915 | + { } | ||
| 916 | }; | ||
| 917 | |||
| 918 | /* l4_core -> timer6 */ | ||
| 919 | @@ -729,7 +729,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { | ||
| 920 | .slave = &omap2430_timer6_hwmod, | ||
| 921 | .clk = "gpt6_ick", | ||
| 922 | .addr = omap2430_timer6_addrs, | ||
| 923 | - .addr_cnt = ARRAY_SIZE(omap2430_timer6_addrs), | ||
| 924 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 925 | }; | ||
| 926 | |||
| 927 | @@ -771,6 +770,7 @@ static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = { | ||
| 928 | .pa_end = 0x48080000 + SZ_1K - 1, | ||
| 929 | .flags = ADDR_TYPE_RT | ||
| 930 | }, | ||
| 931 | + { } | ||
| 932 | }; | ||
| 933 | |||
| 934 | /* l4_core -> timer7 */ | ||
| 935 | @@ -779,7 +779,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { | ||
| 936 | .slave = &omap2430_timer7_hwmod, | ||
| 937 | .clk = "gpt7_ick", | ||
| 938 | .addr = omap2430_timer7_addrs, | ||
| 939 | - .addr_cnt = ARRAY_SIZE(omap2430_timer7_addrs), | ||
| 940 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 941 | }; | ||
| 942 | |||
| 943 | @@ -821,6 +820,7 @@ static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = { | ||
| 944 | .pa_end = 0x48082000 + SZ_1K - 1, | ||
| 945 | .flags = ADDR_TYPE_RT | ||
| 946 | }, | ||
| 947 | + { } | ||
| 948 | }; | ||
| 949 | |||
| 950 | /* l4_core -> timer8 */ | ||
| 951 | @@ -829,7 +829,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { | ||
| 952 | .slave = &omap2430_timer8_hwmod, | ||
| 953 | .clk = "gpt8_ick", | ||
| 954 | .addr = omap2430_timer8_addrs, | ||
| 955 | - .addr_cnt = ARRAY_SIZE(omap2430_timer8_addrs), | ||
| 956 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 957 | }; | ||
| 958 | |||
| 959 | @@ -871,6 +870,7 @@ static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = { | ||
| 960 | .pa_end = 0x48084000 + SZ_1K - 1, | ||
| 961 | .flags = ADDR_TYPE_RT | ||
| 962 | }, | ||
| 963 | + { } | ||
| 964 | }; | ||
| 965 | |||
| 966 | /* l4_core -> timer9 */ | ||
| 967 | @@ -879,7 +879,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { | ||
| 968 | .slave = &omap2430_timer9_hwmod, | ||
| 969 | .clk = "gpt9_ick", | ||
| 970 | .addr = omap2430_timer9_addrs, | ||
| 971 | - .addr_cnt = ARRAY_SIZE(omap2430_timer9_addrs), | ||
| 972 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 973 | }; | ||
| 974 | |||
| 975 | @@ -921,6 +920,7 @@ static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = { | ||
| 976 | .pa_end = 0x48086000 + SZ_1K - 1, | ||
| 977 | .flags = ADDR_TYPE_RT | ||
| 978 | }, | ||
| 979 | + { } | ||
| 980 | }; | ||
| 981 | |||
| 982 | /* l4_core -> timer10 */ | ||
| 983 | @@ -929,7 +929,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { | ||
| 984 | .slave = &omap2430_timer10_hwmod, | ||
| 985 | .clk = "gpt10_ick", | ||
| 986 | .addr = omap2430_timer10_addrs, | ||
| 987 | - .addr_cnt = ARRAY_SIZE(omap2430_timer10_addrs), | ||
| 988 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 989 | }; | ||
| 990 | |||
| 991 | @@ -971,6 +970,7 @@ static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = { | ||
| 992 | .pa_end = 0x48088000 + SZ_1K - 1, | ||
| 993 | .flags = ADDR_TYPE_RT | ||
| 994 | }, | ||
| 995 | + { } | ||
| 996 | }; | ||
| 997 | |||
| 998 | /* l4_core -> timer11 */ | ||
| 999 | @@ -979,7 +979,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { | ||
| 1000 | .slave = &omap2430_timer11_hwmod, | ||
| 1001 | .clk = "gpt11_ick", | ||
| 1002 | .addr = omap2430_timer11_addrs, | ||
| 1003 | - .addr_cnt = ARRAY_SIZE(omap2430_timer11_addrs), | ||
| 1004 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1005 | }; | ||
| 1006 | |||
| 1007 | @@ -1021,6 +1020,7 @@ static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = { | ||
| 1008 | .pa_end = 0x4808a000 + SZ_1K - 1, | ||
| 1009 | .flags = ADDR_TYPE_RT | ||
| 1010 | }, | ||
| 1011 | + { } | ||
| 1012 | }; | ||
| 1013 | |||
| 1014 | /* l4_core -> timer12 */ | ||
| 1015 | @@ -1029,7 +1029,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { | ||
| 1016 | .slave = &omap2430_timer12_hwmod, | ||
| 1017 | .clk = "gpt12_ick", | ||
| 1018 | .addr = omap2430_timer12_addrs, | ||
| 1019 | - .addr_cnt = ARRAY_SIZE(omap2430_timer12_addrs), | ||
| 1020 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1021 | }; | ||
| 1022 | |||
| 1023 | @@ -1066,6 +1065,7 @@ static struct omap_hwmod_addr_space omap2430_wd_timer2_addrs[] = { | ||
| 1024 | .pa_end = 0x4901607f, | ||
| 1025 | .flags = ADDR_TYPE_RT | ||
| 1026 | }, | ||
| 1027 | + { } | ||
| 1028 | }; | ||
| 1029 | |||
| 1030 | static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { | ||
| 1031 | @@ -1073,7 +1073,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { | ||
| 1032 | .slave = &omap2430_wd_timer2_hwmod, | ||
| 1033 | .clk = "mpu_wdt_ick", | ||
| 1034 | .addr = omap2430_wd_timer2_addrs, | ||
| 1035 | - .addr_cnt = ARRAY_SIZE(omap2430_wd_timer2_addrs), | ||
| 1036 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1037 | }; | ||
| 1038 | |||
| 1039 | @@ -1284,6 +1283,7 @@ static struct omap_hwmod_addr_space omap2430_dss_addrs[] = { | ||
| 1040 | .pa_end = 0x480503FF, | ||
| 1041 | .flags = ADDR_TYPE_RT | ||
| 1042 | }, | ||
| 1043 | + { } | ||
| 1044 | }; | ||
| 1045 | |||
| 1046 | /* l4_core -> dss */ | ||
| 1047 | @@ -1292,7 +1292,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { | ||
| 1048 | .slave = &omap2430_dss_core_hwmod, | ||
| 1049 | .clk = "dss_ick", | ||
| 1050 | .addr = omap2430_dss_addrs, | ||
| 1051 | - .addr_cnt = ARRAY_SIZE(omap2430_dss_addrs), | ||
| 1052 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1053 | }; | ||
| 1054 | |||
| 1055 | @@ -1362,6 +1361,7 @@ static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { | ||
| 1056 | .pa_end = 0x480507FF, | ||
| 1057 | .flags = ADDR_TYPE_RT | ||
| 1058 | }, | ||
| 1059 | + { } | ||
| 1060 | }; | ||
| 1061 | |||
| 1062 | /* l4_core -> dss_dispc */ | ||
| 1063 | @@ -1370,7 +1370,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { | ||
| 1064 | .slave = &omap2430_dss_dispc_hwmod, | ||
| 1065 | .clk = "dss_ick", | ||
| 1066 | .addr = omap2430_dss_dispc_addrs, | ||
| 1067 | - .addr_cnt = ARRAY_SIZE(omap2430_dss_dispc_addrs), | ||
| 1068 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1069 | }; | ||
| 1070 | |||
| 1071 | @@ -1426,6 +1425,7 @@ static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = { | ||
| 1072 | .pa_end = 0x48050BFF, | ||
| 1073 | .flags = ADDR_TYPE_RT | ||
| 1074 | }, | ||
| 1075 | + { } | ||
| 1076 | }; | ||
| 1077 | |||
| 1078 | /* l4_core -> dss_rfbi */ | ||
| 1079 | @@ -1434,7 +1434,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { | ||
| 1080 | .slave = &omap2430_dss_rfbi_hwmod, | ||
| 1081 | .clk = "dss_ick", | ||
| 1082 | .addr = omap2430_dss_rfbi_addrs, | ||
| 1083 | - .addr_cnt = ARRAY_SIZE(omap2430_dss_rfbi_addrs), | ||
| 1084 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1085 | }; | ||
| 1086 | |||
| 1087 | @@ -1476,6 +1475,7 @@ static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = { | ||
| 1088 | .pa_end = 0x48050FFF, | ||
| 1089 | .flags = ADDR_TYPE_RT | ||
| 1090 | }, | ||
| 1091 | + { } | ||
| 1092 | }; | ||
| 1093 | |||
| 1094 | /* l4_core -> dss_venc */ | ||
| 1095 | @@ -1484,7 +1484,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { | ||
| 1096 | .slave = &omap2430_dss_venc_hwmod, | ||
| 1097 | .clk = "dss_54m_fck", | ||
| 1098 | .addr = omap2430_dss_venc_addrs, | ||
| 1099 | - .addr_cnt = ARRAY_SIZE(omap2430_dss_venc_addrs), | ||
| 1100 | .flags = OCPIF_SWSUP_IDLE, | ||
| 1101 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1102 | }; | ||
| 1103 | @@ -1621,6 +1620,7 @@ static struct omap_hwmod_addr_space omap2430_gpio1_addr_space[] = { | ||
| 1104 | .pa_end = 0x4900C1ff, | ||
| 1105 | .flags = ADDR_TYPE_RT | ||
| 1106 | }, | ||
| 1107 | + { } | ||
| 1108 | }; | ||
| 1109 | |||
| 1110 | static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { | ||
| 1111 | @@ -1628,7 +1628,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio1 = { | ||
| 1112 | .slave = &omap2430_gpio1_hwmod, | ||
| 1113 | .clk = "gpios_ick", | ||
| 1114 | .addr = omap2430_gpio1_addr_space, | ||
| 1115 | - .addr_cnt = ARRAY_SIZE(omap2430_gpio1_addr_space), | ||
| 1116 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1117 | }; | ||
| 1118 | |||
| 1119 | @@ -1639,6 +1638,7 @@ static struct omap_hwmod_addr_space omap2430_gpio2_addr_space[] = { | ||
| 1120 | .pa_end = 0x4900E1ff, | ||
| 1121 | .flags = ADDR_TYPE_RT | ||
| 1122 | }, | ||
| 1123 | + { } | ||
| 1124 | }; | ||
| 1125 | |||
| 1126 | static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { | ||
| 1127 | @@ -1646,7 +1646,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio2 = { | ||
| 1128 | .slave = &omap2430_gpio2_hwmod, | ||
| 1129 | .clk = "gpios_ick", | ||
| 1130 | .addr = omap2430_gpio2_addr_space, | ||
| 1131 | - .addr_cnt = ARRAY_SIZE(omap2430_gpio2_addr_space), | ||
| 1132 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1133 | }; | ||
| 1134 | |||
| 1135 | @@ -1657,6 +1656,7 @@ static struct omap_hwmod_addr_space omap2430_gpio3_addr_space[] = { | ||
| 1136 | .pa_end = 0x490101ff, | ||
| 1137 | .flags = ADDR_TYPE_RT | ||
| 1138 | }, | ||
| 1139 | + { } | ||
| 1140 | }; | ||
| 1141 | |||
| 1142 | static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { | ||
| 1143 | @@ -1664,7 +1664,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio3 = { | ||
| 1144 | .slave = &omap2430_gpio3_hwmod, | ||
| 1145 | .clk = "gpios_ick", | ||
| 1146 | .addr = omap2430_gpio3_addr_space, | ||
| 1147 | - .addr_cnt = ARRAY_SIZE(omap2430_gpio3_addr_space), | ||
| 1148 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1149 | }; | ||
| 1150 | |||
| 1151 | @@ -1675,6 +1674,7 @@ static struct omap_hwmod_addr_space omap2430_gpio4_addr_space[] = { | ||
| 1152 | .pa_end = 0x490121ff, | ||
| 1153 | .flags = ADDR_TYPE_RT | ||
| 1154 | }, | ||
| 1155 | + { } | ||
| 1156 | }; | ||
| 1157 | |||
| 1158 | static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { | ||
| 1159 | @@ -1682,7 +1682,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__gpio4 = { | ||
| 1160 | .slave = &omap2430_gpio4_hwmod, | ||
| 1161 | .clk = "gpios_ick", | ||
| 1162 | .addr = omap2430_gpio4_addr_space, | ||
| 1163 | - .addr_cnt = ARRAY_SIZE(omap2430_gpio4_addr_space), | ||
| 1164 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1165 | }; | ||
| 1166 | |||
| 1167 | @@ -1693,6 +1692,7 @@ static struct omap_hwmod_addr_space omap2430_gpio5_addr_space[] = { | ||
| 1168 | .pa_end = 0x480B61ff, | ||
| 1169 | .flags = ADDR_TYPE_RT | ||
| 1170 | }, | ||
| 1171 | + { } | ||
| 1172 | }; | ||
| 1173 | |||
| 1174 | static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { | ||
| 1175 | @@ -1700,7 +1700,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__gpio5 = { | ||
| 1176 | .slave = &omap2430_gpio5_hwmod, | ||
| 1177 | .clk = "gpio5_ick", | ||
| 1178 | .addr = omap2430_gpio5_addr_space, | ||
| 1179 | - .addr_cnt = ARRAY_SIZE(omap2430_gpio5_addr_space), | ||
| 1180 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1181 | }; | ||
| 1182 | |||
| 1183 | @@ -1923,6 +1922,7 @@ static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { | ||
| 1184 | .pa_end = 0x48056fff, | ||
| 1185 | .flags = ADDR_TYPE_RT | ||
| 1186 | }, | ||
| 1187 | + { } | ||
| 1188 | }; | ||
| 1189 | |||
| 1190 | /* dma_system -> L3 */ | ||
| 1191 | @@ -1944,7 +1944,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { | ||
| 1192 | .slave = &omap2430_dma_system_hwmod, | ||
| 1193 | .clk = "sdma_ick", | ||
| 1194 | .addr = omap2430_dma_system_addrs, | ||
| 1195 | - .addr_cnt = ARRAY_SIZE(omap2430_dma_system_addrs), | ||
| 1196 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1197 | }; | ||
| 1198 | |||
| 1199 | @@ -2001,6 +2000,7 @@ static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = { | ||
| 1200 | .pa_end = 0x480941ff, | ||
| 1201 | .flags = ADDR_TYPE_RT, | ||
| 1202 | }, | ||
| 1203 | + { } | ||
| 1204 | }; | ||
| 1205 | |||
| 1206 | /* l4_core -> mailbox */ | ||
| 1207 | @@ -2008,7 +2008,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { | ||
| 1208 | .master = &omap2430_l4_core_hwmod, | ||
| 1209 | .slave = &omap2430_mailbox_hwmod, | ||
| 1210 | .addr = omap2430_mailbox_addrs, | ||
| 1211 | - .addr_cnt = ARRAY_SIZE(omap2430_mailbox_addrs), | ||
| 1212 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1213 | }; | ||
| 1214 | |||
| 1215 | @@ -2287,6 +2286,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = { | ||
| 1216 | .pa_end = 0x480740ff, | ||
| 1217 | .flags = ADDR_TYPE_RT | ||
| 1218 | }, | ||
| 1219 | + { } | ||
| 1220 | }; | ||
| 1221 | |||
| 1222 | /* l4_core -> mcbsp1 */ | ||
| 1223 | @@ -2295,7 +2295,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { | ||
| 1224 | .slave = &omap2430_mcbsp1_hwmod, | ||
| 1225 | .clk = "mcbsp1_ick", | ||
| 1226 | .addr = omap2430_mcbsp1_addrs, | ||
| 1227 | - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp1_addrs), | ||
| 1228 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1229 | }; | ||
| 1230 | |||
| 1231 | @@ -2345,6 +2344,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = { | ||
| 1232 | .pa_end = 0x480760ff, | ||
| 1233 | .flags = ADDR_TYPE_RT | ||
| 1234 | }, | ||
| 1235 | + { } | ||
| 1236 | }; | ||
| 1237 | |||
| 1238 | /* l4_core -> mcbsp2 */ | ||
| 1239 | @@ -2353,7 +2353,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { | ||
| 1240 | .slave = &omap2430_mcbsp2_hwmod, | ||
| 1241 | .clk = "mcbsp2_ick", | ||
| 1242 | .addr = omap2430_mcbsp2_addrs, | ||
| 1243 | - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp2_addrs), | ||
| 1244 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1245 | }; | ||
| 1246 | |||
| 1247 | @@ -2403,6 +2402,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { | ||
| 1248 | .pa_end = 0x4808C0ff, | ||
| 1249 | .flags = ADDR_TYPE_RT | ||
| 1250 | }, | ||
| 1251 | + { } | ||
| 1252 | }; | ||
| 1253 | |||
| 1254 | /* l4_core -> mcbsp3 */ | ||
| 1255 | @@ -2411,7 +2411,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp3 = { | ||
| 1256 | .slave = &omap2430_mcbsp3_hwmod, | ||
| 1257 | .clk = "mcbsp3_ick", | ||
| 1258 | .addr = omap2430_mcbsp3_addrs, | ||
| 1259 | - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp3_addrs), | ||
| 1260 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1261 | }; | ||
| 1262 | |||
| 1263 | @@ -2461,6 +2460,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { | ||
| 1264 | .pa_end = 0x4808E0ff, | ||
| 1265 | .flags = ADDR_TYPE_RT | ||
| 1266 | }, | ||
| 1267 | + { } | ||
| 1268 | }; | ||
| 1269 | |||
| 1270 | /* l4_core -> mcbsp4 */ | ||
| 1271 | @@ -2469,7 +2469,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp4 = { | ||
| 1272 | .slave = &omap2430_mcbsp4_hwmod, | ||
| 1273 | .clk = "mcbsp4_ick", | ||
| 1274 | .addr = omap2430_mcbsp4_addrs, | ||
| 1275 | - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp4_addrs), | ||
| 1276 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1277 | }; | ||
| 1278 | |||
| 1279 | @@ -2519,6 +2518,7 @@ static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { | ||
| 1280 | .pa_end = 0x480960ff, | ||
| 1281 | .flags = ADDR_TYPE_RT | ||
| 1282 | }, | ||
| 1283 | + { } | ||
| 1284 | }; | ||
| 1285 | |||
| 1286 | /* l4_core -> mcbsp5 */ | ||
| 1287 | @@ -2527,7 +2527,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = { | ||
| 1288 | .slave = &omap2430_mcbsp5_hwmod, | ||
| 1289 | .clk = "mcbsp5_ick", | ||
| 1290 | .addr = omap2430_mcbsp5_addrs, | ||
| 1291 | - .addr_cnt = ARRAY_SIZE(omap2430_mcbsp5_addrs), | ||
| 1292 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1293 | }; | ||
| 1294 | |||
| 1295 | diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1296 | index 909a84d..6410779 100644 | ||
| 1297 | --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1298 | +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1299 | @@ -1,7 +1,7 @@ | ||
| 1300 | /* | ||
| 1301 | * omap_hwmod_3xxx_data.c - hardware modules present on the OMAP3xxx chips | ||
| 1302 | * | ||
| 1303 | - * Copyright (C) 2009-2010 Nokia Corporation | ||
| 1304 | + * Copyright (C) 2009-2011 Nokia Corporation | ||
| 1305 | * Paul Walmsley | ||
| 1306 | * | ||
| 1307 | * This program is free software; you can redistribute it and/or modify | ||
| 1308 | @@ -111,6 +111,7 @@ static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { | ||
| 1309 | .pa_end = 0x6800ffff, | ||
| 1310 | .flags = ADDR_TYPE_RT, | ||
| 1311 | }, | ||
| 1312 | + { } | ||
| 1313 | }; | ||
| 1314 | |||
| 1315 | /* MPU -> L3 interface */ | ||
| 1316 | @@ -118,7 +119,6 @@ static struct omap_hwmod_ocp_if omap3xxx_mpu__l3_main = { | ||
| 1317 | .master = &omap3xxx_mpu_hwmod, | ||
| 1318 | .slave = &omap3xxx_l3_main_hwmod, | ||
| 1319 | .addr = omap3xxx_l3_main_addrs, | ||
| 1320 | - .addr_cnt = ARRAY_SIZE(omap3xxx_l3_main_addrs), | ||
| 1321 | .user = OCP_USER_MPU, | ||
| 1322 | }; | ||
| 1323 | |||
| 1324 | @@ -196,6 +196,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = { | ||
| 1325 | .pa_end = 0x4809c1ff, | ||
| 1326 | .flags = ADDR_TYPE_RT, | ||
| 1327 | }, | ||
| 1328 | + { } | ||
| 1329 | }; | ||
| 1330 | |||
| 1331 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { | ||
| 1332 | @@ -203,7 +204,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { | ||
| 1333 | .slave = &omap3xxx_mmc1_hwmod, | ||
| 1334 | .clk = "mmchs1_ick", | ||
| 1335 | .addr = omap3xxx_mmc1_addr_space, | ||
| 1336 | - .addr_cnt = ARRAY_SIZE(omap3xxx_mmc1_addr_space), | ||
| 1337 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1338 | .flags = OMAP_FIREWALL_L4 | ||
| 1339 | }; | ||
| 1340 | @@ -215,6 +215,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = { | ||
| 1341 | .pa_end = 0x480b41ff, | ||
| 1342 | .flags = ADDR_TYPE_RT, | ||
| 1343 | }, | ||
| 1344 | + { } | ||
| 1345 | }; | ||
| 1346 | |||
| 1347 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { | ||
| 1348 | @@ -222,7 +223,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { | ||
| 1349 | .slave = &omap3xxx_mmc2_hwmod, | ||
| 1350 | .clk = "mmchs2_ick", | ||
| 1351 | .addr = omap3xxx_mmc2_addr_space, | ||
| 1352 | - .addr_cnt = ARRAY_SIZE(omap3xxx_mmc2_addr_space), | ||
| 1353 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1354 | .flags = OMAP_FIREWALL_L4 | ||
| 1355 | }; | ||
| 1356 | @@ -234,6 +234,7 @@ static struct omap_hwmod_addr_space omap3xxx_mmc3_addr_space[] = { | ||
| 1357 | .pa_end = 0x480ad1ff, | ||
| 1358 | .flags = ADDR_TYPE_RT, | ||
| 1359 | }, | ||
| 1360 | + { } | ||
| 1361 | }; | ||
| 1362 | |||
| 1363 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = { | ||
| 1364 | @@ -241,7 +242,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc3 = { | ||
| 1365 | .slave = &omap3xxx_mmc3_hwmod, | ||
| 1366 | .clk = "mmchs3_ick", | ||
| 1367 | .addr = omap3xxx_mmc3_addr_space, | ||
| 1368 | - .addr_cnt = ARRAY_SIZE(omap3xxx_mmc3_addr_space), | ||
| 1369 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1370 | .flags = OMAP_FIREWALL_L4 | ||
| 1371 | }; | ||
| 1372 | @@ -253,6 +253,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart1_addr_space[] = { | ||
| 1373 | .pa_end = OMAP3_UART1_BASE + SZ_8K - 1, | ||
| 1374 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 1375 | }, | ||
| 1376 | + { } | ||
| 1377 | }; | ||
| 1378 | |||
| 1379 | static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = { | ||
| 1380 | @@ -260,7 +261,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart1 = { | ||
| 1381 | .slave = &omap3xxx_uart1_hwmod, | ||
| 1382 | .clk = "uart1_ick", | ||
| 1383 | .addr = omap3xxx_uart1_addr_space, | ||
| 1384 | - .addr_cnt = ARRAY_SIZE(omap3xxx_uart1_addr_space), | ||
| 1385 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1386 | }; | ||
| 1387 | |||
| 1388 | @@ -271,6 +271,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart2_addr_space[] = { | ||
| 1389 | .pa_end = OMAP3_UART2_BASE + SZ_1K - 1, | ||
| 1390 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 1391 | }, | ||
| 1392 | + { } | ||
| 1393 | }; | ||
| 1394 | |||
| 1395 | static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = { | ||
| 1396 | @@ -278,7 +279,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__uart2 = { | ||
| 1397 | .slave = &omap3xxx_uart2_hwmod, | ||
| 1398 | .clk = "uart2_ick", | ||
| 1399 | .addr = omap3xxx_uart2_addr_space, | ||
| 1400 | - .addr_cnt = ARRAY_SIZE(omap3xxx_uart2_addr_space), | ||
| 1401 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1402 | }; | ||
| 1403 | |||
| 1404 | @@ -289,6 +289,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart3_addr_space[] = { | ||
| 1405 | .pa_end = OMAP3_UART3_BASE + SZ_1K - 1, | ||
| 1406 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 1407 | }, | ||
| 1408 | + { } | ||
| 1409 | }; | ||
| 1410 | |||
| 1411 | static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = { | ||
| 1412 | @@ -296,7 +297,6 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart3 = { | ||
| 1413 | .slave = &omap3xxx_uart3_hwmod, | ||
| 1414 | .clk = "uart3_ick", | ||
| 1415 | .addr = omap3xxx_uart3_addr_space, | ||
| 1416 | - .addr_cnt = ARRAY_SIZE(omap3xxx_uart3_addr_space), | ||
| 1417 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1418 | }; | ||
| 1419 | |||
| 1420 | @@ -307,6 +307,7 @@ static struct omap_hwmod_addr_space omap3xxx_uart4_addr_space[] = { | ||
| 1421 | .pa_end = OMAP3_UART4_BASE + SZ_1K - 1, | ||
| 1422 | .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 1423 | }, | ||
| 1424 | + { } | ||
| 1425 | }; | ||
| 1426 | |||
| 1427 | static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { | ||
| 1428 | @@ -314,7 +315,6 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { | ||
| 1429 | .slave = &omap3xxx_uart4_hwmod, | ||
| 1430 | .clk = "uart4_ick", | ||
| 1431 | .addr = omap3xxx_uart4_addr_space, | ||
| 1432 | - .addr_cnt = ARRAY_SIZE(omap3xxx_uart4_addr_space), | ||
| 1433 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1434 | }; | ||
| 1435 | |||
| 1436 | @@ -328,6 +328,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = { | ||
| 1437 | .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, | ||
| 1438 | .flags = ADDR_TYPE_RT, | ||
| 1439 | }, | ||
| 1440 | + { } | ||
| 1441 | }; | ||
| 1442 | |||
| 1443 | static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { | ||
| 1444 | @@ -335,7 +336,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { | ||
| 1445 | .slave = &omap3xxx_i2c1_hwmod, | ||
| 1446 | .clk = "i2c1_ick", | ||
| 1447 | .addr = omap3xxx_i2c1_addr_space, | ||
| 1448 | - .addr_cnt = ARRAY_SIZE(omap3xxx_i2c1_addr_space), | ||
| 1449 | .fw = { | ||
| 1450 | .omap2 = { | ||
| 1451 | .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION, | ||
| 1452 | @@ -353,6 +353,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = { | ||
| 1453 | .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, | ||
| 1454 | .flags = ADDR_TYPE_RT, | ||
| 1455 | }, | ||
| 1456 | + { } | ||
| 1457 | }; | ||
| 1458 | |||
| 1459 | static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { | ||
| 1460 | @@ -360,7 +361,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { | ||
| 1461 | .slave = &omap3xxx_i2c2_hwmod, | ||
| 1462 | .clk = "i2c2_ick", | ||
| 1463 | .addr = omap3xxx_i2c2_addr_space, | ||
| 1464 | - .addr_cnt = ARRAY_SIZE(omap3xxx_i2c2_addr_space), | ||
| 1465 | .fw = { | ||
| 1466 | .omap2 = { | ||
| 1467 | .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION, | ||
| 1468 | @@ -378,6 +378,7 @@ static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = { | ||
| 1469 | .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN - 1, | ||
| 1470 | .flags = ADDR_TYPE_RT, | ||
| 1471 | }, | ||
| 1472 | + { } | ||
| 1473 | }; | ||
| 1474 | |||
| 1475 | static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { | ||
| 1476 | @@ -385,7 +386,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c3 = { | ||
| 1477 | .slave = &omap3xxx_i2c3_hwmod, | ||
| 1478 | .clk = "i2c3_ick", | ||
| 1479 | .addr = omap3xxx_i2c3_addr_space, | ||
| 1480 | - .addr_cnt = ARRAY_SIZE(omap3xxx_i2c3_addr_space), | ||
| 1481 | .fw = { | ||
| 1482 | .omap2 = { | ||
| 1483 | .l4_fw_region = OMAP3_L4_CORE_FW_I2C3_REGION, | ||
| 1484 | @@ -403,6 +403,7 @@ static struct omap_hwmod_addr_space omap3_sr1_addr_space[] = { | ||
| 1485 | .pa_end = OMAP34XX_SR1_BASE + SZ_1K - 1, | ||
| 1486 | .flags = ADDR_TYPE_RT, | ||
| 1487 | }, | ||
| 1488 | + { } | ||
| 1489 | }; | ||
| 1490 | |||
| 1491 | static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { | ||
| 1492 | @@ -410,7 +411,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr1 = { | ||
| 1493 | .slave = &omap34xx_sr1_hwmod, | ||
| 1494 | .clk = "sr_l4_ick", | ||
| 1495 | .addr = omap3_sr1_addr_space, | ||
| 1496 | - .addr_cnt = ARRAY_SIZE(omap3_sr1_addr_space), | ||
| 1497 | .user = OCP_USER_MPU, | ||
| 1498 | }; | ||
| 1499 | |||
| 1500 | @@ -421,6 +421,7 @@ static struct omap_hwmod_addr_space omap3_sr2_addr_space[] = { | ||
| 1501 | .pa_end = OMAP34XX_SR2_BASE + SZ_1K - 1, | ||
| 1502 | .flags = ADDR_TYPE_RT, | ||
| 1503 | }, | ||
| 1504 | + { } | ||
| 1505 | }; | ||
| 1506 | |||
| 1507 | static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { | ||
| 1508 | @@ -428,7 +429,6 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = { | ||
| 1509 | .slave = &omap34xx_sr2_hwmod, | ||
| 1510 | .clk = "sr_l4_ick", | ||
| 1511 | .addr = omap3_sr2_addr_space, | ||
| 1512 | - .addr_cnt = ARRAY_SIZE(omap3_sr2_addr_space), | ||
| 1513 | .user = OCP_USER_MPU, | ||
| 1514 | }; | ||
| 1515 | |||
| 1516 | @@ -442,6 +442,7 @@ static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = { | ||
| 1517 | .pa_end = OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1, | ||
| 1518 | .flags = ADDR_TYPE_RT | ||
| 1519 | }, | ||
| 1520 | + { } | ||
| 1521 | }; | ||
| 1522 | |||
| 1523 | /* l4_core -> usbhsotg */ | ||
| 1524 | @@ -450,7 +451,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = { | ||
| 1525 | .slave = &omap3xxx_usbhsotg_hwmod, | ||
| 1526 | .clk = "l4_ick", | ||
| 1527 | .addr = omap3xxx_usbhsotg_addrs, | ||
| 1528 | - .addr_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_addrs), | ||
| 1529 | .user = OCP_USER_MPU, | ||
| 1530 | }; | ||
| 1531 | |||
| 1532 | @@ -468,6 +468,7 @@ static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = { | ||
| 1533 | .pa_end = AM35XX_IPSS_USBOTGSS_BASE + SZ_4K - 1, | ||
| 1534 | .flags = ADDR_TYPE_RT | ||
| 1535 | }, | ||
| 1536 | + { } | ||
| 1537 | }; | ||
| 1538 | |||
| 1539 | /* l4_core -> usbhsotg */ | ||
| 1540 | @@ -476,7 +477,6 @@ static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = { | ||
| 1541 | .slave = &am35xx_usbhsotg_hwmod, | ||
| 1542 | .clk = "l4_ick", | ||
| 1543 | .addr = am35xx_usbhsotg_addrs, | ||
| 1544 | - .addr_cnt = ARRAY_SIZE(am35xx_usbhsotg_addrs), | ||
| 1545 | .user = OCP_USER_MPU, | ||
| 1546 | }; | ||
| 1547 | |||
| 1548 | @@ -621,6 +621,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { | ||
| 1549 | .pa_end = 0x48318000 + SZ_1K - 1, | ||
| 1550 | .flags = ADDR_TYPE_RT | ||
| 1551 | }, | ||
| 1552 | + { } | ||
| 1553 | }; | ||
| 1554 | |||
| 1555 | /* l4_wkup -> timer1 */ | ||
| 1556 | @@ -629,7 +630,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__timer1 = { | ||
| 1557 | .slave = &omap3xxx_timer1_hwmod, | ||
| 1558 | .clk = "gpt1_ick", | ||
| 1559 | .addr = omap3xxx_timer1_addrs, | ||
| 1560 | - .addr_cnt = ARRAY_SIZE(omap3xxx_timer1_addrs), | ||
| 1561 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1562 | }; | ||
| 1563 | |||
| 1564 | @@ -671,6 +671,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { | ||
| 1565 | .pa_end = 0x49032000 + SZ_1K - 1, | ||
| 1566 | .flags = ADDR_TYPE_RT | ||
| 1567 | }, | ||
| 1568 | + { } | ||
| 1569 | }; | ||
| 1570 | |||
| 1571 | /* l4_per -> timer2 */ | ||
| 1572 | @@ -679,7 +680,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer2 = { | ||
| 1573 | .slave = &omap3xxx_timer2_hwmod, | ||
| 1574 | .clk = "gpt2_ick", | ||
| 1575 | .addr = omap3xxx_timer2_addrs, | ||
| 1576 | - .addr_cnt = ARRAY_SIZE(omap3xxx_timer2_addrs), | ||
| 1577 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1578 | }; | ||
| 1579 | |||
| 1580 | @@ -721,6 +721,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { | ||
| 1581 | .pa_end = 0x49034000 + SZ_1K - 1, | ||
| 1582 | .flags = ADDR_TYPE_RT | ||
| 1583 | }, | ||
| 1584 | + { } | ||
| 1585 | }; | ||
| 1586 | |||
| 1587 | /* l4_per -> timer3 */ | ||
| 1588 | @@ -729,7 +730,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer3 = { | ||
| 1589 | .slave = &omap3xxx_timer3_hwmod, | ||
| 1590 | .clk = "gpt3_ick", | ||
| 1591 | .addr = omap3xxx_timer3_addrs, | ||
| 1592 | - .addr_cnt = ARRAY_SIZE(omap3xxx_timer3_addrs), | ||
| 1593 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1594 | }; | ||
| 1595 | |||
| 1596 | @@ -771,6 +771,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { | ||
| 1597 | .pa_end = 0x49036000 + SZ_1K - 1, | ||
| 1598 | .flags = ADDR_TYPE_RT | ||
| 1599 | }, | ||
| 1600 | + { } | ||
| 1601 | }; | ||
| 1602 | |||
| 1603 | /* l4_per -> timer4 */ | ||
| 1604 | @@ -779,7 +780,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer4 = { | ||
| 1605 | .slave = &omap3xxx_timer4_hwmod, | ||
| 1606 | .clk = "gpt4_ick", | ||
| 1607 | .addr = omap3xxx_timer4_addrs, | ||
| 1608 | - .addr_cnt = ARRAY_SIZE(omap3xxx_timer4_addrs), | ||
| 1609 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1610 | }; | ||
| 1611 | |||
| 1612 | @@ -821,6 +821,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { | ||
| 1613 | .pa_end = 0x49038000 + SZ_1K - 1, | ||
| 1614 | .flags = ADDR_TYPE_RT | ||
| 1615 | }, | ||
| 1616 | + { } | ||
| 1617 | }; | ||
| 1618 | |||
| 1619 | /* l4_per -> timer5 */ | ||
| 1620 | @@ -829,7 +830,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer5 = { | ||
| 1621 | .slave = &omap3xxx_timer5_hwmod, | ||
| 1622 | .clk = "gpt5_ick", | ||
| 1623 | .addr = omap3xxx_timer5_addrs, | ||
| 1624 | - .addr_cnt = ARRAY_SIZE(omap3xxx_timer5_addrs), | ||
| 1625 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1626 | }; | ||
| 1627 | |||
| 1628 | @@ -871,6 +871,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { | ||
| 1629 | .pa_end = 0x4903A000 + SZ_1K - 1, | ||
| 1630 | .flags = ADDR_TYPE_RT | ||
| 1631 | }, | ||
| 1632 | + { } | ||
| 1633 | }; | ||
| 1634 | |||
| 1635 | /* l4_per -> timer6 */ | ||
| 1636 | @@ -879,7 +880,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer6 = { | ||
| 1637 | .slave = &omap3xxx_timer6_hwmod, | ||
| 1638 | .clk = "gpt6_ick", | ||
| 1639 | .addr = omap3xxx_timer6_addrs, | ||
| 1640 | - .addr_cnt = ARRAY_SIZE(omap3xxx_timer6_addrs), | ||
| 1641 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1642 | }; | ||
| 1643 | |||
| 1644 | @@ -921,6 +921,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { | ||
| 1645 | .pa_end = 0x4903C000 + SZ_1K - 1, | ||
| 1646 | .flags = ADDR_TYPE_RT | ||
| 1647 | }, | ||
| 1648 | + { } | ||
| 1649 | }; | ||
| 1650 | |||
| 1651 | /* l4_per -> timer7 */ | ||
| 1652 | @@ -929,7 +930,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer7 = { | ||
| 1653 | .slave = &omap3xxx_timer7_hwmod, | ||
| 1654 | .clk = "gpt7_ick", | ||
| 1655 | .addr = omap3xxx_timer7_addrs, | ||
| 1656 | - .addr_cnt = ARRAY_SIZE(omap3xxx_timer7_addrs), | ||
| 1657 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1658 | }; | ||
| 1659 | |||
| 1660 | @@ -971,6 +971,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { | ||
| 1661 | .pa_end = 0x4903E000 + SZ_1K - 1, | ||
| 1662 | .flags = ADDR_TYPE_RT | ||
| 1663 | }, | ||
| 1664 | + { } | ||
| 1665 | }; | ||
| 1666 | |||
| 1667 | /* l4_per -> timer8 */ | ||
| 1668 | @@ -979,7 +980,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer8 = { | ||
| 1669 | .slave = &omap3xxx_timer8_hwmod, | ||
| 1670 | .clk = "gpt8_ick", | ||
| 1671 | .addr = omap3xxx_timer8_addrs, | ||
| 1672 | - .addr_cnt = ARRAY_SIZE(omap3xxx_timer8_addrs), | ||
| 1673 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1674 | }; | ||
| 1675 | |||
| 1676 | @@ -1021,6 +1021,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { | ||
| 1677 | .pa_end = 0x49040000 + SZ_1K - 1, | ||
| 1678 | .flags = ADDR_TYPE_RT | ||
| 1679 | }, | ||
| 1680 | + { } | ||
| 1681 | }; | ||
| 1682 | |||
| 1683 | /* l4_per -> timer9 */ | ||
| 1684 | @@ -1029,7 +1030,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__timer9 = { | ||
| 1685 | .slave = &omap3xxx_timer9_hwmod, | ||
| 1686 | .clk = "gpt9_ick", | ||
| 1687 | .addr = omap3xxx_timer9_addrs, | ||
| 1688 | - .addr_cnt = ARRAY_SIZE(omap3xxx_timer9_addrs), | ||
| 1689 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1690 | }; | ||
| 1691 | |||
| 1692 | @@ -1071,6 +1071,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = { | ||
| 1693 | .pa_end = 0x48086000 + SZ_1K - 1, | ||
| 1694 | .flags = ADDR_TYPE_RT | ||
| 1695 | }, | ||
| 1696 | + { } | ||
| 1697 | }; | ||
| 1698 | |||
| 1699 | /* l4_core -> timer10 */ | ||
| 1700 | @@ -1079,7 +1080,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { | ||
| 1701 | .slave = &omap3xxx_timer10_hwmod, | ||
| 1702 | .clk = "gpt10_ick", | ||
| 1703 | .addr = omap3xxx_timer10_addrs, | ||
| 1704 | - .addr_cnt = ARRAY_SIZE(omap3xxx_timer10_addrs), | ||
| 1705 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1706 | }; | ||
| 1707 | |||
| 1708 | @@ -1121,6 +1121,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = { | ||
| 1709 | .pa_end = 0x48088000 + SZ_1K - 1, | ||
| 1710 | .flags = ADDR_TYPE_RT | ||
| 1711 | }, | ||
| 1712 | + { } | ||
| 1713 | }; | ||
| 1714 | |||
| 1715 | /* l4_core -> timer11 */ | ||
| 1716 | @@ -1129,7 +1130,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { | ||
| 1717 | .slave = &omap3xxx_timer11_hwmod, | ||
| 1718 | .clk = "gpt11_ick", | ||
| 1719 | .addr = omap3xxx_timer11_addrs, | ||
| 1720 | - .addr_cnt = ARRAY_SIZE(omap3xxx_timer11_addrs), | ||
| 1721 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1722 | }; | ||
| 1723 | |||
| 1724 | @@ -1171,6 +1171,7 @@ static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { | ||
| 1725 | .pa_end = 0x48304000 + SZ_1K - 1, | ||
| 1726 | .flags = ADDR_TYPE_RT | ||
| 1727 | }, | ||
| 1728 | + { } | ||
| 1729 | }; | ||
| 1730 | |||
| 1731 | /* l4_core -> timer12 */ | ||
| 1732 | @@ -1179,7 +1180,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer12 = { | ||
| 1733 | .slave = &omap3xxx_timer12_hwmod, | ||
| 1734 | .clk = "gpt12_ick", | ||
| 1735 | .addr = omap3xxx_timer12_addrs, | ||
| 1736 | - .addr_cnt = ARRAY_SIZE(omap3xxx_timer12_addrs), | ||
| 1737 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1738 | }; | ||
| 1739 | |||
| 1740 | @@ -1216,6 +1216,7 @@ static struct omap_hwmod_addr_space omap3xxx_wd_timer2_addrs[] = { | ||
| 1741 | .pa_end = 0x4831407f, | ||
| 1742 | .flags = ADDR_TYPE_RT | ||
| 1743 | }, | ||
| 1744 | + { } | ||
| 1745 | }; | ||
| 1746 | |||
| 1747 | static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { | ||
| 1748 | @@ -1223,7 +1224,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__wd_timer2 = { | ||
| 1749 | .slave = &omap3xxx_wd_timer2_hwmod, | ||
| 1750 | .clk = "wdt2_ick", | ||
| 1751 | .addr = omap3xxx_wd_timer2_addrs, | ||
| 1752 | - .addr_cnt = ARRAY_SIZE(omap3xxx_wd_timer2_addrs), | ||
| 1753 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1754 | }; | ||
| 1755 | |||
| 1756 | @@ -1497,6 +1497,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = { | ||
| 1757 | .pa_end = 0x480503FF, | ||
| 1758 | .flags = ADDR_TYPE_RT | ||
| 1759 | }, | ||
| 1760 | + { } | ||
| 1761 | }; | ||
| 1762 | |||
| 1763 | /* l4_core -> dss */ | ||
| 1764 | @@ -1505,7 +1506,6 @@ static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { | ||
| 1765 | .slave = &omap3430es1_dss_core_hwmod, | ||
| 1766 | .clk = "dss_ick", | ||
| 1767 | .addr = omap3xxx_dss_addrs, | ||
| 1768 | - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs), | ||
| 1769 | .fw = { | ||
| 1770 | .omap2 = { | ||
| 1771 | .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, | ||
| 1772 | @@ -1521,7 +1521,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = { | ||
| 1773 | .slave = &omap3xxx_dss_core_hwmod, | ||
| 1774 | .clk = "dss_ick", | ||
| 1775 | .addr = omap3xxx_dss_addrs, | ||
| 1776 | - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_addrs), | ||
| 1777 | .fw = { | ||
| 1778 | .omap2 = { | ||
| 1779 | .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION, | ||
| 1780 | @@ -1632,6 +1631,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { | ||
| 1781 | .pa_end = 0x480507FF, | ||
| 1782 | .flags = ADDR_TYPE_RT | ||
| 1783 | }, | ||
| 1784 | + { } | ||
| 1785 | }; | ||
| 1786 | |||
| 1787 | /* l4_core -> dss_dispc */ | ||
| 1788 | @@ -1640,7 +1640,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { | ||
| 1789 | .slave = &omap3xxx_dss_dispc_hwmod, | ||
| 1790 | .clk = "dss_ick", | ||
| 1791 | .addr = omap3xxx_dss_dispc_addrs, | ||
| 1792 | - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dispc_addrs), | ||
| 1793 | .fw = { | ||
| 1794 | .omap2 = { | ||
| 1795 | .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION, | ||
| 1796 | @@ -1697,6 +1696,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = { | ||
| 1797 | .pa_end = 0x4804FFFF, | ||
| 1798 | .flags = ADDR_TYPE_RT | ||
| 1799 | }, | ||
| 1800 | + { } | ||
| 1801 | }; | ||
| 1802 | |||
| 1803 | /* l4_core -> dss_dsi1 */ | ||
| 1804 | @@ -1704,7 +1704,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = { | ||
| 1805 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1806 | .slave = &omap3xxx_dss_dsi1_hwmod, | ||
| 1807 | .addr = omap3xxx_dss_dsi1_addrs, | ||
| 1808 | - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_dsi1_addrs), | ||
| 1809 | .fw = { | ||
| 1810 | .omap2 = { | ||
| 1811 | .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DSI_REGION, | ||
| 1812 | @@ -1767,6 +1766,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = { | ||
| 1813 | .pa_end = 0x48050BFF, | ||
| 1814 | .flags = ADDR_TYPE_RT | ||
| 1815 | }, | ||
| 1816 | + { } | ||
| 1817 | }; | ||
| 1818 | |||
| 1819 | /* l4_core -> dss_rfbi */ | ||
| 1820 | @@ -1775,7 +1775,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { | ||
| 1821 | .slave = &omap3xxx_dss_rfbi_hwmod, | ||
| 1822 | .clk = "dss_ick", | ||
| 1823 | .addr = omap3xxx_dss_rfbi_addrs, | ||
| 1824 | - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_rfbi_addrs), | ||
| 1825 | .fw = { | ||
| 1826 | .omap2 = { | ||
| 1827 | .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION, | ||
| 1828 | @@ -1826,6 +1825,7 @@ static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = { | ||
| 1829 | .pa_end = 0x48050FFF, | ||
| 1830 | .flags = ADDR_TYPE_RT | ||
| 1831 | }, | ||
| 1832 | + { } | ||
| 1833 | }; | ||
| 1834 | |||
| 1835 | /* l4_core -> dss_venc */ | ||
| 1836 | @@ -1834,7 +1834,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { | ||
| 1837 | .slave = &omap3xxx_dss_venc_hwmod, | ||
| 1838 | .clk = "dss_tv_fck", | ||
| 1839 | .addr = omap3xxx_dss_venc_addrs, | ||
| 1840 | - .addr_cnt = ARRAY_SIZE(omap3xxx_dss_venc_addrs), | ||
| 1841 | .fw = { | ||
| 1842 | .omap2 = { | ||
| 1843 | .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION, | ||
| 1844 | @@ -2003,13 +2002,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio1_addrs[] = { | ||
| 1845 | .pa_end = 0x483101ff, | ||
| 1846 | .flags = ADDR_TYPE_RT | ||
| 1847 | }, | ||
| 1848 | + { } | ||
| 1849 | }; | ||
| 1850 | |||
| 1851 | static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__gpio1 = { | ||
| 1852 | .master = &omap3xxx_l4_wkup_hwmod, | ||
| 1853 | .slave = &omap3xxx_gpio1_hwmod, | ||
| 1854 | .addr = omap3xxx_gpio1_addrs, | ||
| 1855 | - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio1_addrs), | ||
| 1856 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1857 | }; | ||
| 1858 | |||
| 1859 | @@ -2020,13 +2019,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio2_addrs[] = { | ||
| 1860 | .pa_end = 0x490501ff, | ||
| 1861 | .flags = ADDR_TYPE_RT | ||
| 1862 | }, | ||
| 1863 | + { } | ||
| 1864 | }; | ||
| 1865 | |||
| 1866 | static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio2 = { | ||
| 1867 | .master = &omap3xxx_l4_per_hwmod, | ||
| 1868 | .slave = &omap3xxx_gpio2_hwmod, | ||
| 1869 | .addr = omap3xxx_gpio2_addrs, | ||
| 1870 | - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio2_addrs), | ||
| 1871 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1872 | }; | ||
| 1873 | |||
| 1874 | @@ -2037,13 +2036,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio3_addrs[] = { | ||
| 1875 | .pa_end = 0x490521ff, | ||
| 1876 | .flags = ADDR_TYPE_RT | ||
| 1877 | }, | ||
| 1878 | + { } | ||
| 1879 | }; | ||
| 1880 | |||
| 1881 | static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio3 = { | ||
| 1882 | .master = &omap3xxx_l4_per_hwmod, | ||
| 1883 | .slave = &omap3xxx_gpio3_hwmod, | ||
| 1884 | .addr = omap3xxx_gpio3_addrs, | ||
| 1885 | - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio3_addrs), | ||
| 1886 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1887 | }; | ||
| 1888 | |||
| 1889 | @@ -2054,13 +2053,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio4_addrs[] = { | ||
| 1890 | .pa_end = 0x490541ff, | ||
| 1891 | .flags = ADDR_TYPE_RT | ||
| 1892 | }, | ||
| 1893 | + { } | ||
| 1894 | }; | ||
| 1895 | |||
| 1896 | static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio4 = { | ||
| 1897 | .master = &omap3xxx_l4_per_hwmod, | ||
| 1898 | .slave = &omap3xxx_gpio4_hwmod, | ||
| 1899 | .addr = omap3xxx_gpio4_addrs, | ||
| 1900 | - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio4_addrs), | ||
| 1901 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1902 | }; | ||
| 1903 | |||
| 1904 | @@ -2071,13 +2070,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio5_addrs[] = { | ||
| 1905 | .pa_end = 0x490561ff, | ||
| 1906 | .flags = ADDR_TYPE_RT | ||
| 1907 | }, | ||
| 1908 | + { } | ||
| 1909 | }; | ||
| 1910 | |||
| 1911 | static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio5 = { | ||
| 1912 | .master = &omap3xxx_l4_per_hwmod, | ||
| 1913 | .slave = &omap3xxx_gpio5_hwmod, | ||
| 1914 | .addr = omap3xxx_gpio5_addrs, | ||
| 1915 | - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio5_addrs), | ||
| 1916 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1917 | }; | ||
| 1918 | |||
| 1919 | @@ -2088,13 +2087,13 @@ static struct omap_hwmod_addr_space omap3xxx_gpio6_addrs[] = { | ||
| 1920 | .pa_end = 0x490581ff, | ||
| 1921 | .flags = ADDR_TYPE_RT | ||
| 1922 | }, | ||
| 1923 | + { } | ||
| 1924 | }; | ||
| 1925 | |||
| 1926 | static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio6 = { | ||
| 1927 | .master = &omap3xxx_l4_per_hwmod, | ||
| 1928 | .slave = &omap3xxx_gpio6_hwmod, | ||
| 1929 | .addr = omap3xxx_gpio6_addrs, | ||
| 1930 | - .addr_cnt = ARRAY_SIZE(omap3xxx_gpio6_addrs), | ||
| 1931 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1932 | }; | ||
| 1933 | |||
| 1934 | @@ -2395,6 +2394,7 @@ static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { | ||
| 1935 | .pa_end = 0x48056fff, | ||
| 1936 | .flags = ADDR_TYPE_RT | ||
| 1937 | }, | ||
| 1938 | + { } | ||
| 1939 | }; | ||
| 1940 | |||
| 1941 | /* dma_system master ports */ | ||
| 1942 | @@ -2408,7 +2408,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dma_system = { | ||
| 1943 | .slave = &omap3xxx_dma_system_hwmod, | ||
| 1944 | .clk = "core_l4_ick", | ||
| 1945 | .addr = omap3xxx_dma_system_addrs, | ||
| 1946 | - .addr_cnt = ARRAY_SIZE(omap3xxx_dma_system_addrs), | ||
| 1947 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1948 | }; | ||
| 1949 | |||
| 1950 | @@ -2480,6 +2479,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { | ||
| 1951 | .pa_end = 0x480740ff, | ||
| 1952 | .flags = ADDR_TYPE_RT | ||
| 1953 | }, | ||
| 1954 | + { } | ||
| 1955 | }; | ||
| 1956 | |||
| 1957 | /* l4_core -> mcbsp1 */ | ||
| 1958 | @@ -2488,7 +2488,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp1 = { | ||
| 1959 | .slave = &omap3xxx_mcbsp1_hwmod, | ||
| 1960 | .clk = "mcbsp1_ick", | ||
| 1961 | .addr = omap3xxx_mcbsp1_addrs, | ||
| 1962 | - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_addrs), | ||
| 1963 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1964 | }; | ||
| 1965 | |||
| 1966 | @@ -2538,6 +2537,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { | ||
| 1967 | .pa_end = 0x490220ff, | ||
| 1968 | .flags = ADDR_TYPE_RT | ||
| 1969 | }, | ||
| 1970 | + { } | ||
| 1971 | }; | ||
| 1972 | |||
| 1973 | /* l4_per -> mcbsp2 */ | ||
| 1974 | @@ -2546,7 +2546,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = { | ||
| 1975 | .slave = &omap3xxx_mcbsp2_hwmod, | ||
| 1976 | .clk = "mcbsp2_ick", | ||
| 1977 | .addr = omap3xxx_mcbsp2_addrs, | ||
| 1978 | - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_addrs), | ||
| 1979 | + | ||
| 1980 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1981 | }; | ||
| 1982 | |||
| 1983 | @@ -2601,6 +2601,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { | ||
| 1984 | .pa_end = 0x490240ff, | ||
| 1985 | .flags = ADDR_TYPE_RT | ||
| 1986 | }, | ||
| 1987 | + { } | ||
| 1988 | }; | ||
| 1989 | |||
| 1990 | /* l4_per -> mcbsp3 */ | ||
| 1991 | @@ -2609,7 +2610,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3 = { | ||
| 1992 | .slave = &omap3xxx_mcbsp3_hwmod, | ||
| 1993 | .clk = "mcbsp3_ick", | ||
| 1994 | .addr = omap3xxx_mcbsp3_addrs, | ||
| 1995 | - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_addrs), | ||
| 1996 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1997 | }; | ||
| 1998 | |||
| 1999 | @@ -2664,6 +2664,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { | ||
| 2000 | .pa_end = 0x490260ff, | ||
| 2001 | .flags = ADDR_TYPE_RT | ||
| 2002 | }, | ||
| 2003 | + { } | ||
| 2004 | }; | ||
| 2005 | |||
| 2006 | /* l4_per -> mcbsp4 */ | ||
| 2007 | @@ -2672,7 +2673,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp4 = { | ||
| 2008 | .slave = &omap3xxx_mcbsp4_hwmod, | ||
| 2009 | .clk = "mcbsp4_ick", | ||
| 2010 | .addr = omap3xxx_mcbsp4_addrs, | ||
| 2011 | - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_addrs), | ||
| 2012 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2013 | }; | ||
| 2014 | |||
| 2015 | @@ -2722,6 +2722,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { | ||
| 2016 | .pa_end = 0x480960ff, | ||
| 2017 | .flags = ADDR_TYPE_RT | ||
| 2018 | }, | ||
| 2019 | + { } | ||
| 2020 | }; | ||
| 2021 | |||
| 2022 | /* l4_core -> mcbsp5 */ | ||
| 2023 | @@ -2730,7 +2731,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mcbsp5 = { | ||
| 2024 | .slave = &omap3xxx_mcbsp5_hwmod, | ||
| 2025 | .clk = "mcbsp5_ick", | ||
| 2026 | .addr = omap3xxx_mcbsp5_addrs, | ||
| 2027 | - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_addrs), | ||
| 2028 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2029 | }; | ||
| 2030 | |||
| 2031 | @@ -2785,6 +2785,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { | ||
| 2032 | .pa_end = 0x490280ff, | ||
| 2033 | .flags = ADDR_TYPE_RT | ||
| 2034 | }, | ||
| 2035 | + { } | ||
| 2036 | }; | ||
| 2037 | |||
| 2038 | /* l4_per -> mcbsp2_sidetone */ | ||
| 2039 | @@ -2793,7 +2794,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2_sidetone = { | ||
| 2040 | .slave = &omap3xxx_mcbsp2_sidetone_hwmod, | ||
| 2041 | .clk = "mcbsp2_ick", | ||
| 2042 | .addr = omap3xxx_mcbsp2_sidetone_addrs, | ||
| 2043 | - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_addrs), | ||
| 2044 | .user = OCP_USER_MPU, | ||
| 2045 | }; | ||
| 2046 | |||
| 2047 | @@ -2834,6 +2834,7 @@ static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { | ||
| 2048 | .pa_end = 0x4902A0ff, | ||
| 2049 | .flags = ADDR_TYPE_RT | ||
| 2050 | }, | ||
| 2051 | + { } | ||
| 2052 | }; | ||
| 2053 | |||
| 2054 | /* l4_per -> mcbsp3_sidetone */ | ||
| 2055 | @@ -2842,7 +2843,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp3_sidetone = { | ||
| 2056 | .slave = &omap3xxx_mcbsp3_sidetone_hwmod, | ||
| 2057 | .clk = "mcbsp3_ick", | ||
| 2058 | .addr = omap3xxx_mcbsp3_sidetone_addrs, | ||
| 2059 | - .addr_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_addrs), | ||
| 2060 | .user = OCP_USER_MPU, | ||
| 2061 | }; | ||
| 2062 | |||
| 2063 | @@ -3033,6 +3033,7 @@ static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = { | ||
| 2064 | .pa_end = 0x480941ff, | ||
| 2065 | .flags = ADDR_TYPE_RT, | ||
| 2066 | }, | ||
| 2067 | + { } | ||
| 2068 | }; | ||
| 2069 | |||
| 2070 | /* l4_core -> mailbox */ | ||
| 2071 | @@ -3040,7 +3041,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__mailbox = { | ||
| 2072 | .master = &omap3xxx_l4_core_hwmod, | ||
| 2073 | .slave = &omap3xxx_mailbox_hwmod, | ||
| 2074 | .addr = omap3xxx_mailbox_addrs, | ||
| 2075 | - .addr_cnt = ARRAY_SIZE(omap3xxx_mailbox_addrs), | ||
| 2076 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2077 | }; | ||
| 2078 | |||
| 2079 | @@ -3076,6 +3076,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = { | ||
| 2080 | .pa_end = 0x480980ff, | ||
| 2081 | .flags = ADDR_TYPE_RT, | ||
| 2082 | }, | ||
| 2083 | + { } | ||
| 2084 | }; | ||
| 2085 | |||
| 2086 | static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { | ||
| 2087 | @@ -3083,7 +3084,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { | ||
| 2088 | .slave = &omap34xx_mcspi1, | ||
| 2089 | .clk = "mcspi1_ick", | ||
| 2090 | .addr = omap34xx_mcspi1_addr_space, | ||
| 2091 | - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi1_addr_space), | ||
| 2092 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2093 | }; | ||
| 2094 | |||
| 2095 | @@ -3094,6 +3094,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = { | ||
| 2096 | .pa_end = 0x4809a0ff, | ||
| 2097 | .flags = ADDR_TYPE_RT, | ||
| 2098 | }, | ||
| 2099 | + { } | ||
| 2100 | }; | ||
| 2101 | |||
| 2102 | static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { | ||
| 2103 | @@ -3101,7 +3102,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { | ||
| 2104 | .slave = &omap34xx_mcspi2, | ||
| 2105 | .clk = "mcspi2_ick", | ||
| 2106 | .addr = omap34xx_mcspi2_addr_space, | ||
| 2107 | - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi2_addr_space), | ||
| 2108 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2109 | }; | ||
| 2110 | |||
| 2111 | @@ -3112,6 +3112,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = { | ||
| 2112 | .pa_end = 0x480b80ff, | ||
| 2113 | .flags = ADDR_TYPE_RT, | ||
| 2114 | }, | ||
| 2115 | + { } | ||
| 2116 | }; | ||
| 2117 | |||
| 2118 | static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { | ||
| 2119 | @@ -3119,7 +3120,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { | ||
| 2120 | .slave = &omap34xx_mcspi3, | ||
| 2121 | .clk = "mcspi3_ick", | ||
| 2122 | .addr = omap34xx_mcspi3_addr_space, | ||
| 2123 | - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi3_addr_space), | ||
| 2124 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2125 | }; | ||
| 2126 | |||
| 2127 | @@ -3130,6 +3130,7 @@ static struct omap_hwmod_addr_space omap34xx_mcspi4_addr_space[] = { | ||
| 2128 | .pa_end = 0x480ba0ff, | ||
| 2129 | .flags = ADDR_TYPE_RT, | ||
| 2130 | }, | ||
| 2131 | + { } | ||
| 2132 | }; | ||
| 2133 | |||
| 2134 | static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = { | ||
| 2135 | @@ -3137,7 +3138,6 @@ static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi4 = { | ||
| 2136 | .slave = &omap34xx_mcspi4, | ||
| 2137 | .clk = "mcspi4_ick", | ||
| 2138 | .addr = omap34xx_mcspi4_addr_space, | ||
| 2139 | - .addr_cnt = ARRAY_SIZE(omap34xx_mcspi4_addr_space), | ||
| 2140 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2141 | }; | ||
| 2142 | |||
| 2143 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 2144 | index 8cbbfbf..f8ccc4a 100644 | ||
| 2145 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 2146 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 2147 | @@ -95,6 +95,7 @@ static struct omap_hwmod_addr_space omap44xx_dmm_addrs[] = { | ||
| 2148 | .pa_end = 0x4e0007ff, | ||
| 2149 | .flags = ADDR_TYPE_RT | ||
| 2150 | }, | ||
| 2151 | + { } | ||
| 2152 | }; | ||
| 2153 | |||
| 2154 | /* mpu -> dmm */ | ||
| 2155 | @@ -103,7 +104,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__dmm = { | ||
| 2156 | .slave = &omap44xx_dmm_hwmod, | ||
| 2157 | .clk = "l3_div_ck", | ||
| 2158 | .addr = omap44xx_dmm_addrs, | ||
| 2159 | - .addr_cnt = ARRAY_SIZE(omap44xx_dmm_addrs), | ||
| 2160 | .user = OCP_USER_MPU, | ||
| 2161 | }; | ||
| 2162 | |||
| 2163 | @@ -150,6 +150,7 @@ static struct omap_hwmod_addr_space omap44xx_emif_fw_addrs[] = { | ||
| 2164 | .pa_end = 0x4a20c0ff, | ||
| 2165 | .flags = ADDR_TYPE_RT | ||
| 2166 | }, | ||
| 2167 | + { } | ||
| 2168 | }; | ||
| 2169 | |||
| 2170 | /* l4_cfg -> emif_fw */ | ||
| 2171 | @@ -158,7 +159,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__emif_fw = { | ||
| 2172 | .slave = &omap44xx_emif_fw_hwmod, | ||
| 2173 | .clk = "l4_div_ck", | ||
| 2174 | .addr = omap44xx_emif_fw_addrs, | ||
| 2175 | - .addr_cnt = ARRAY_SIZE(omap44xx_emif_fw_addrs), | ||
| 2176 | .user = OCP_USER_MPU, | ||
| 2177 | }; | ||
| 2178 | |||
| 2179 | @@ -276,6 +276,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { | ||
| 2180 | .pa_end = 0x44000fff, | ||
| 2181 | .flags = ADDR_TYPE_RT, | ||
| 2182 | }, | ||
| 2183 | + { } | ||
| 2184 | }; | ||
| 2185 | |||
| 2186 | /* mpu -> l3_main_1 */ | ||
| 2187 | @@ -284,7 +285,6 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { | ||
| 2188 | .slave = &omap44xx_l3_main_1_hwmod, | ||
| 2189 | .clk = "l3_div_ck", | ||
| 2190 | .addr = omap44xx_l3_main_1_addrs, | ||
| 2191 | - .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_1_addrs), | ||
| 2192 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2193 | }; | ||
| 2194 | |||
| 2195 | @@ -356,6 +356,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = { | ||
| 2196 | .pa_end = 0x44801fff, | ||
| 2197 | .flags = ADDR_TYPE_RT, | ||
| 2198 | }, | ||
| 2199 | + { } | ||
| 2200 | }; | ||
| 2201 | |||
| 2202 | /* l3_main_1 -> l3_main_2 */ | ||
| 2203 | @@ -364,7 +365,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { | ||
| 2204 | .slave = &omap44xx_l3_main_2_hwmod, | ||
| 2205 | .clk = "l3_div_ck", | ||
| 2206 | .addr = omap44xx_l3_main_2_addrs, | ||
| 2207 | - .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_2_addrs), | ||
| 2208 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2209 | }; | ||
| 2210 | |||
| 2211 | @@ -411,6 +411,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { | ||
| 2212 | .pa_end = 0x45000fff, | ||
| 2213 | .flags = ADDR_TYPE_RT, | ||
| 2214 | }, | ||
| 2215 | + { } | ||
| 2216 | }; | ||
| 2217 | |||
| 2218 | /* l3_main_1 -> l3_main_3 */ | ||
| 2219 | @@ -419,7 +420,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { | ||
| 2220 | .slave = &omap44xx_l3_main_3_hwmod, | ||
| 2221 | .clk = "l3_div_ck", | ||
| 2222 | .addr = omap44xx_l3_main_3_addrs, | ||
| 2223 | - .addr_cnt = ARRAY_SIZE(omap44xx_l3_main_3_addrs), | ||
| 2224 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2225 | }; | ||
| 2226 | |||
| 2227 | @@ -697,6 +697,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_addrs[] = { | ||
| 2228 | .pa_end = 0x401f13ff, | ||
| 2229 | .flags = ADDR_TYPE_RT | ||
| 2230 | }, | ||
| 2231 | + { } | ||
| 2232 | }; | ||
| 2233 | |||
| 2234 | /* l4_abe -> aess */ | ||
| 2235 | @@ -705,7 +706,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess = { | ||
| 2236 | .slave = &omap44xx_aess_hwmod, | ||
| 2237 | .clk = "ocp_abe_iclk", | ||
| 2238 | .addr = omap44xx_aess_addrs, | ||
| 2239 | - .addr_cnt = ARRAY_SIZE(omap44xx_aess_addrs), | ||
| 2240 | .user = OCP_USER_MPU, | ||
| 2241 | }; | ||
| 2242 | |||
| 2243 | @@ -715,6 +715,7 @@ static struct omap_hwmod_addr_space omap44xx_aess_dma_addrs[] = { | ||
| 2244 | .pa_end = 0x490f13ff, | ||
| 2245 | .flags = ADDR_TYPE_RT | ||
| 2246 | }, | ||
| 2247 | + { } | ||
| 2248 | }; | ||
| 2249 | |||
| 2250 | /* l4_abe -> aess (dma) */ | ||
| 2251 | @@ -723,7 +724,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__aess_dma = { | ||
| 2252 | .slave = &omap44xx_aess_hwmod, | ||
| 2253 | .clk = "ocp_abe_iclk", | ||
| 2254 | .addr = omap44xx_aess_dma_addrs, | ||
| 2255 | - .addr_cnt = ARRAY_SIZE(omap44xx_aess_dma_addrs), | ||
| 2256 | .user = OCP_USER_SDMA, | ||
| 2257 | }; | ||
| 2258 | |||
| 2259 | @@ -807,6 +807,7 @@ static struct omap_hwmod_addr_space omap44xx_counter_32k_addrs[] = { | ||
| 2260 | .pa_end = 0x4a30401f, | ||
| 2261 | .flags = ADDR_TYPE_RT | ||
| 2262 | }, | ||
| 2263 | + { } | ||
| 2264 | }; | ||
| 2265 | |||
| 2266 | /* l4_wkup -> counter_32k */ | ||
| 2267 | @@ -815,7 +816,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__counter_32k = { | ||
| 2268 | .slave = &omap44xx_counter_32k_hwmod, | ||
| 2269 | .clk = "l4_wkup_clk_mux_ck", | ||
| 2270 | .addr = omap44xx_counter_32k_addrs, | ||
| 2271 | - .addr_cnt = ARRAY_SIZE(omap44xx_counter_32k_addrs), | ||
| 2272 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2273 | }; | ||
| 2274 | |||
| 2275 | @@ -889,6 +889,7 @@ static struct omap_hwmod_addr_space omap44xx_dma_system_addrs[] = { | ||
| 2276 | .pa_end = 0x4a056fff, | ||
| 2277 | .flags = ADDR_TYPE_RT | ||
| 2278 | }, | ||
| 2279 | + { } | ||
| 2280 | }; | ||
| 2281 | |||
| 2282 | /* l4_cfg -> dma_system */ | ||
| 2283 | @@ -897,7 +898,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__dma_system = { | ||
| 2284 | .slave = &omap44xx_dma_system_hwmod, | ||
| 2285 | .clk = "l4_div_ck", | ||
| 2286 | .addr = omap44xx_dma_system_addrs, | ||
| 2287 | - .addr_cnt = ARRAY_SIZE(omap44xx_dma_system_addrs), | ||
| 2288 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2289 | }; | ||
| 2290 | |||
| 2291 | @@ -961,6 +961,7 @@ static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { | ||
| 2292 | .pa_end = 0x4012e07f, | ||
| 2293 | .flags = ADDR_TYPE_RT | ||
| 2294 | }, | ||
| 2295 | + { } | ||
| 2296 | }; | ||
| 2297 | |||
| 2298 | /* l4_abe -> dmic */ | ||
| 2299 | @@ -969,7 +970,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic = { | ||
| 2300 | .slave = &omap44xx_dmic_hwmod, | ||
| 2301 | .clk = "ocp_abe_iclk", | ||
| 2302 | .addr = omap44xx_dmic_addrs, | ||
| 2303 | - .addr_cnt = ARRAY_SIZE(omap44xx_dmic_addrs), | ||
| 2304 | .user = OCP_USER_MPU, | ||
| 2305 | }; | ||
| 2306 | |||
| 2307 | @@ -979,6 +979,7 @@ static struct omap_hwmod_addr_space omap44xx_dmic_dma_addrs[] = { | ||
| 2308 | .pa_end = 0x4902e07f, | ||
| 2309 | .flags = ADDR_TYPE_RT | ||
| 2310 | }, | ||
| 2311 | + { } | ||
| 2312 | }; | ||
| 2313 | |||
| 2314 | /* l4_abe -> dmic (dma) */ | ||
| 2315 | @@ -987,7 +988,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__dmic_dma = { | ||
| 2316 | .slave = &omap44xx_dmic_hwmod, | ||
| 2317 | .clk = "ocp_abe_iclk", | ||
| 2318 | .addr = omap44xx_dmic_dma_addrs, | ||
| 2319 | - .addr_cnt = ARRAY_SIZE(omap44xx_dmic_dma_addrs), | ||
| 2320 | .user = OCP_USER_SDMA, | ||
| 2321 | }; | ||
| 2322 | |||
| 2323 | @@ -1128,6 +1128,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { | ||
| 2324 | .pa_end = 0x5800007f, | ||
| 2325 | .flags = ADDR_TYPE_RT | ||
| 2326 | }, | ||
| 2327 | + { } | ||
| 2328 | }; | ||
| 2329 | |||
| 2330 | /* l3_main_2 -> dss */ | ||
| 2331 | @@ -1136,7 +1137,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { | ||
| 2332 | .slave = &omap44xx_dss_hwmod, | ||
| 2333 | .clk = "l3_div_ck", | ||
| 2334 | .addr = omap44xx_dss_dma_addrs, | ||
| 2335 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dma_addrs), | ||
| 2336 | .user = OCP_USER_SDMA, | ||
| 2337 | }; | ||
| 2338 | |||
| 2339 | @@ -1146,6 +1146,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_addrs[] = { | ||
| 2340 | .pa_end = 0x4804007f, | ||
| 2341 | .flags = ADDR_TYPE_RT | ||
| 2342 | }, | ||
| 2343 | + { } | ||
| 2344 | }; | ||
| 2345 | |||
| 2346 | /* l4_per -> dss */ | ||
| 2347 | @@ -1154,7 +1155,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss = { | ||
| 2348 | .slave = &omap44xx_dss_hwmod, | ||
| 2349 | .clk = "l4_div_ck", | ||
| 2350 | .addr = omap44xx_dss_addrs, | ||
| 2351 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_addrs), | ||
| 2352 | .user = OCP_USER_MPU, | ||
| 2353 | }; | ||
| 2354 | |||
| 2355 | @@ -1228,6 +1228,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { | ||
| 2356 | .pa_end = 0x58001fff, | ||
| 2357 | .flags = ADDR_TYPE_RT | ||
| 2358 | }, | ||
| 2359 | + { } | ||
| 2360 | }; | ||
| 2361 | |||
| 2362 | /* l3_main_2 -> dss_dispc */ | ||
| 2363 | @@ -1236,7 +1237,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { | ||
| 2364 | .slave = &omap44xx_dss_dispc_hwmod, | ||
| 2365 | .clk = "l3_div_ck", | ||
| 2366 | .addr = omap44xx_dss_dispc_dma_addrs, | ||
| 2367 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_dma_addrs), | ||
| 2368 | .user = OCP_USER_SDMA, | ||
| 2369 | }; | ||
| 2370 | |||
| 2371 | @@ -1246,6 +1246,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_addrs[] = { | ||
| 2372 | .pa_end = 0x48041fff, | ||
| 2373 | .flags = ADDR_TYPE_RT | ||
| 2374 | }, | ||
| 2375 | + { } | ||
| 2376 | }; | ||
| 2377 | |||
| 2378 | /* l4_per -> dss_dispc */ | ||
| 2379 | @@ -1254,7 +1255,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dispc = { | ||
| 2380 | .slave = &omap44xx_dss_dispc_hwmod, | ||
| 2381 | .clk = "l4_div_ck", | ||
| 2382 | .addr = omap44xx_dss_dispc_addrs, | ||
| 2383 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dispc_addrs), | ||
| 2384 | .user = OCP_USER_MPU, | ||
| 2385 | }; | ||
| 2386 | |||
| 2387 | @@ -1319,6 +1319,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { | ||
| 2388 | .pa_end = 0x580041ff, | ||
| 2389 | .flags = ADDR_TYPE_RT | ||
| 2390 | }, | ||
| 2391 | + { } | ||
| 2392 | }; | ||
| 2393 | |||
| 2394 | /* l3_main_2 -> dss_dsi1 */ | ||
| 2395 | @@ -1327,7 +1328,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { | ||
| 2396 | .slave = &omap44xx_dss_dsi1_hwmod, | ||
| 2397 | .clk = "l3_div_ck", | ||
| 2398 | .addr = omap44xx_dss_dsi1_dma_addrs, | ||
| 2399 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_dma_addrs), | ||
| 2400 | .user = OCP_USER_SDMA, | ||
| 2401 | }; | ||
| 2402 | |||
| 2403 | @@ -1337,6 +1337,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_addrs[] = { | ||
| 2404 | .pa_end = 0x480441ff, | ||
| 2405 | .flags = ADDR_TYPE_RT | ||
| 2406 | }, | ||
| 2407 | + { } | ||
| 2408 | }; | ||
| 2409 | |||
| 2410 | /* l4_per -> dss_dsi1 */ | ||
| 2411 | @@ -1345,7 +1346,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi1 = { | ||
| 2412 | .slave = &omap44xx_dss_dsi1_hwmod, | ||
| 2413 | .clk = "l4_div_ck", | ||
| 2414 | .addr = omap44xx_dss_dsi1_addrs, | ||
| 2415 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_addrs), | ||
| 2416 | .user = OCP_USER_MPU, | ||
| 2417 | }; | ||
| 2418 | |||
| 2419 | @@ -1389,6 +1389,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { | ||
| 2420 | .pa_end = 0x580051ff, | ||
| 2421 | .flags = ADDR_TYPE_RT | ||
| 2422 | }, | ||
| 2423 | + { } | ||
| 2424 | }; | ||
| 2425 | |||
| 2426 | /* l3_main_2 -> dss_dsi2 */ | ||
| 2427 | @@ -1397,7 +1398,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { | ||
| 2428 | .slave = &omap44xx_dss_dsi2_hwmod, | ||
| 2429 | .clk = "l3_div_ck", | ||
| 2430 | .addr = omap44xx_dss_dsi2_dma_addrs, | ||
| 2431 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_dma_addrs), | ||
| 2432 | .user = OCP_USER_SDMA, | ||
| 2433 | }; | ||
| 2434 | |||
| 2435 | @@ -1407,6 +1407,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_addrs[] = { | ||
| 2436 | .pa_end = 0x480451ff, | ||
| 2437 | .flags = ADDR_TYPE_RT | ||
| 2438 | }, | ||
| 2439 | + { } | ||
| 2440 | }; | ||
| 2441 | |||
| 2442 | /* l4_per -> dss_dsi2 */ | ||
| 2443 | @@ -1415,7 +1416,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_dsi2 = { | ||
| 2444 | .slave = &omap44xx_dss_dsi2_hwmod, | ||
| 2445 | .clk = "l4_div_ck", | ||
| 2446 | .addr = omap44xx_dss_dsi2_addrs, | ||
| 2447 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_addrs), | ||
| 2448 | .user = OCP_USER_MPU, | ||
| 2449 | }; | ||
| 2450 | |||
| 2451 | @@ -1479,6 +1479,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { | ||
| 2452 | .pa_end = 0x58006fff, | ||
| 2453 | .flags = ADDR_TYPE_RT | ||
| 2454 | }, | ||
| 2455 | + { } | ||
| 2456 | }; | ||
| 2457 | |||
| 2458 | /* l3_main_2 -> dss_hdmi */ | ||
| 2459 | @@ -1487,7 +1488,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { | ||
| 2460 | .slave = &omap44xx_dss_hdmi_hwmod, | ||
| 2461 | .clk = "l3_div_ck", | ||
| 2462 | .addr = omap44xx_dss_hdmi_dma_addrs, | ||
| 2463 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_dma_addrs), | ||
| 2464 | .user = OCP_USER_SDMA, | ||
| 2465 | }; | ||
| 2466 | |||
| 2467 | @@ -1497,6 +1497,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_addrs[] = { | ||
| 2468 | .pa_end = 0x48046fff, | ||
| 2469 | .flags = ADDR_TYPE_RT | ||
| 2470 | }, | ||
| 2471 | + { } | ||
| 2472 | }; | ||
| 2473 | |||
| 2474 | /* l4_per -> dss_hdmi */ | ||
| 2475 | @@ -1505,7 +1506,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_hdmi = { | ||
| 2476 | .slave = &omap44xx_dss_hdmi_hwmod, | ||
| 2477 | .clk = "l4_div_ck", | ||
| 2478 | .addr = omap44xx_dss_hdmi_addrs, | ||
| 2479 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_addrs), | ||
| 2480 | .user = OCP_USER_MPU, | ||
| 2481 | }; | ||
| 2482 | |||
| 2483 | @@ -1565,6 +1565,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { | ||
| 2484 | .pa_end = 0x580020ff, | ||
| 2485 | .flags = ADDR_TYPE_RT | ||
| 2486 | }, | ||
| 2487 | + { } | ||
| 2488 | }; | ||
| 2489 | |||
| 2490 | /* l3_main_2 -> dss_rfbi */ | ||
| 2491 | @@ -1573,7 +1574,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { | ||
| 2492 | .slave = &omap44xx_dss_rfbi_hwmod, | ||
| 2493 | .clk = "l3_div_ck", | ||
| 2494 | .addr = omap44xx_dss_rfbi_dma_addrs, | ||
| 2495 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_dma_addrs), | ||
| 2496 | .user = OCP_USER_SDMA, | ||
| 2497 | }; | ||
| 2498 | |||
| 2499 | @@ -1583,6 +1583,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_addrs[] = { | ||
| 2500 | .pa_end = 0x480420ff, | ||
| 2501 | .flags = ADDR_TYPE_RT | ||
| 2502 | }, | ||
| 2503 | + { } | ||
| 2504 | }; | ||
| 2505 | |||
| 2506 | /* l4_per -> dss_rfbi */ | ||
| 2507 | @@ -1591,7 +1592,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_rfbi = { | ||
| 2508 | .slave = &omap44xx_dss_rfbi_hwmod, | ||
| 2509 | .clk = "l4_div_ck", | ||
| 2510 | .addr = omap44xx_dss_rfbi_addrs, | ||
| 2511 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_addrs), | ||
| 2512 | .user = OCP_USER_MPU, | ||
| 2513 | }; | ||
| 2514 | |||
| 2515 | @@ -1634,6 +1634,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = { | ||
| 2516 | .pa_end = 0x580030ff, | ||
| 2517 | .flags = ADDR_TYPE_RT | ||
| 2518 | }, | ||
| 2519 | + { } | ||
| 2520 | }; | ||
| 2521 | |||
| 2522 | /* l3_main_2 -> dss_venc */ | ||
| 2523 | @@ -1642,7 +1643,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { | ||
| 2524 | .slave = &omap44xx_dss_venc_hwmod, | ||
| 2525 | .clk = "l3_div_ck", | ||
| 2526 | .addr = omap44xx_dss_venc_dma_addrs, | ||
| 2527 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_dma_addrs), | ||
| 2528 | .user = OCP_USER_SDMA, | ||
| 2529 | }; | ||
| 2530 | |||
| 2531 | @@ -1652,6 +1652,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_addrs[] = { | ||
| 2532 | .pa_end = 0x480430ff, | ||
| 2533 | .flags = ADDR_TYPE_RT | ||
| 2534 | }, | ||
| 2535 | + { } | ||
| 2536 | }; | ||
| 2537 | |||
| 2538 | /* l4_per -> dss_venc */ | ||
| 2539 | @@ -1660,7 +1661,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = { | ||
| 2540 | .slave = &omap44xx_dss_venc_hwmod, | ||
| 2541 | .clk = "l4_div_ck", | ||
| 2542 | .addr = omap44xx_dss_venc_addrs, | ||
| 2543 | - .addr_cnt = ARRAY_SIZE(omap44xx_dss_venc_addrs), | ||
| 2544 | .user = OCP_USER_MPU, | ||
| 2545 | }; | ||
| 2546 | |||
| 2547 | @@ -1725,6 +1725,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { | ||
| 2548 | .pa_end = 0x4a3101ff, | ||
| 2549 | .flags = ADDR_TYPE_RT | ||
| 2550 | }, | ||
| 2551 | + { } | ||
| 2552 | }; | ||
| 2553 | |||
| 2554 | /* l4_wkup -> gpio1 */ | ||
| 2555 | @@ -1733,7 +1734,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__gpio1 = { | ||
| 2556 | .slave = &omap44xx_gpio1_hwmod, | ||
| 2557 | .clk = "l4_wkup_clk_mux_ck", | ||
| 2558 | .addr = omap44xx_gpio1_addrs, | ||
| 2559 | - .addr_cnt = ARRAY_SIZE(omap44xx_gpio1_addrs), | ||
| 2560 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2561 | }; | ||
| 2562 | |||
| 2563 | @@ -1777,6 +1777,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { | ||
| 2564 | .pa_end = 0x480551ff, | ||
| 2565 | .flags = ADDR_TYPE_RT | ||
| 2566 | }, | ||
| 2567 | + { } | ||
| 2568 | }; | ||
| 2569 | |||
| 2570 | /* l4_per -> gpio2 */ | ||
| 2571 | @@ -1785,7 +1786,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio2 = { | ||
| 2572 | .slave = &omap44xx_gpio2_hwmod, | ||
| 2573 | .clk = "l4_div_ck", | ||
| 2574 | .addr = omap44xx_gpio2_addrs, | ||
| 2575 | - .addr_cnt = ARRAY_SIZE(omap44xx_gpio2_addrs), | ||
| 2576 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2577 | }; | ||
| 2578 | |||
| 2579 | @@ -1830,6 +1830,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { | ||
| 2580 | .pa_end = 0x480571ff, | ||
| 2581 | .flags = ADDR_TYPE_RT | ||
| 2582 | }, | ||
| 2583 | + { } | ||
| 2584 | }; | ||
| 2585 | |||
| 2586 | /* l4_per -> gpio3 */ | ||
| 2587 | @@ -1838,7 +1839,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio3 = { | ||
| 2588 | .slave = &omap44xx_gpio3_hwmod, | ||
| 2589 | .clk = "l4_div_ck", | ||
| 2590 | .addr = omap44xx_gpio3_addrs, | ||
| 2591 | - .addr_cnt = ARRAY_SIZE(omap44xx_gpio3_addrs), | ||
| 2592 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2593 | }; | ||
| 2594 | |||
| 2595 | @@ -1883,6 +1883,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { | ||
| 2596 | .pa_end = 0x480591ff, | ||
| 2597 | .flags = ADDR_TYPE_RT | ||
| 2598 | }, | ||
| 2599 | + { } | ||
| 2600 | }; | ||
| 2601 | |||
| 2602 | /* l4_per -> gpio4 */ | ||
| 2603 | @@ -1891,7 +1892,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio4 = { | ||
| 2604 | .slave = &omap44xx_gpio4_hwmod, | ||
| 2605 | .clk = "l4_div_ck", | ||
| 2606 | .addr = omap44xx_gpio4_addrs, | ||
| 2607 | - .addr_cnt = ARRAY_SIZE(omap44xx_gpio4_addrs), | ||
| 2608 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2609 | }; | ||
| 2610 | |||
| 2611 | @@ -1936,6 +1936,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { | ||
| 2612 | .pa_end = 0x4805b1ff, | ||
| 2613 | .flags = ADDR_TYPE_RT | ||
| 2614 | }, | ||
| 2615 | + { } | ||
| 2616 | }; | ||
| 2617 | |||
| 2618 | /* l4_per -> gpio5 */ | ||
| 2619 | @@ -1944,7 +1945,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio5 = { | ||
| 2620 | .slave = &omap44xx_gpio5_hwmod, | ||
| 2621 | .clk = "l4_div_ck", | ||
| 2622 | .addr = omap44xx_gpio5_addrs, | ||
| 2623 | - .addr_cnt = ARRAY_SIZE(omap44xx_gpio5_addrs), | ||
| 2624 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2625 | }; | ||
| 2626 | |||
| 2627 | @@ -1989,6 +1989,7 @@ static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { | ||
| 2628 | .pa_end = 0x4805d1ff, | ||
| 2629 | .flags = ADDR_TYPE_RT | ||
| 2630 | }, | ||
| 2631 | + { } | ||
| 2632 | }; | ||
| 2633 | |||
| 2634 | /* l4_per -> gpio6 */ | ||
| 2635 | @@ -1997,7 +1998,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__gpio6 = { | ||
| 2636 | .slave = &omap44xx_gpio6_hwmod, | ||
| 2637 | .clk = "l4_div_ck", | ||
| 2638 | .addr = omap44xx_gpio6_addrs, | ||
| 2639 | - .addr_cnt = ARRAY_SIZE(omap44xx_gpio6_addrs), | ||
| 2640 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2641 | }; | ||
| 2642 | |||
| 2643 | @@ -2072,6 +2072,7 @@ static struct omap_hwmod_addr_space omap44xx_hsi_addrs[] = { | ||
| 2644 | .pa_end = 0x4a05bfff, | ||
| 2645 | .flags = ADDR_TYPE_RT | ||
| 2646 | }, | ||
| 2647 | + { } | ||
| 2648 | }; | ||
| 2649 | |||
| 2650 | /* l4_cfg -> hsi */ | ||
| 2651 | @@ -2080,7 +2081,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__hsi = { | ||
| 2652 | .slave = &omap44xx_hsi_hwmod, | ||
| 2653 | .clk = "l4_div_ck", | ||
| 2654 | .addr = omap44xx_hsi_addrs, | ||
| 2655 | - .addr_cnt = ARRAY_SIZE(omap44xx_hsi_addrs), | ||
| 2656 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2657 | }; | ||
| 2658 | |||
| 2659 | @@ -2145,6 +2145,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { | ||
| 2660 | .pa_end = 0x480700ff, | ||
| 2661 | .flags = ADDR_TYPE_RT | ||
| 2662 | }, | ||
| 2663 | + { } | ||
| 2664 | }; | ||
| 2665 | |||
| 2666 | /* l4_per -> i2c1 */ | ||
| 2667 | @@ -2153,7 +2154,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c1 = { | ||
| 2668 | .slave = &omap44xx_i2c1_hwmod, | ||
| 2669 | .clk = "l4_div_ck", | ||
| 2670 | .addr = omap44xx_i2c1_addrs, | ||
| 2671 | - .addr_cnt = ARRAY_SIZE(omap44xx_i2c1_addrs), | ||
| 2672 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2673 | }; | ||
| 2674 | |||
| 2675 | @@ -2198,6 +2198,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { | ||
| 2676 | .pa_end = 0x480720ff, | ||
| 2677 | .flags = ADDR_TYPE_RT | ||
| 2678 | }, | ||
| 2679 | + { } | ||
| 2680 | }; | ||
| 2681 | |||
| 2682 | /* l4_per -> i2c2 */ | ||
| 2683 | @@ -2206,7 +2207,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c2 = { | ||
| 2684 | .slave = &omap44xx_i2c2_hwmod, | ||
| 2685 | .clk = "l4_div_ck", | ||
| 2686 | .addr = omap44xx_i2c2_addrs, | ||
| 2687 | - .addr_cnt = ARRAY_SIZE(omap44xx_i2c2_addrs), | ||
| 2688 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2689 | }; | ||
| 2690 | |||
| 2691 | @@ -2251,6 +2251,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { | ||
| 2692 | .pa_end = 0x480600ff, | ||
| 2693 | .flags = ADDR_TYPE_RT | ||
| 2694 | }, | ||
| 2695 | + { } | ||
| 2696 | }; | ||
| 2697 | |||
| 2698 | /* l4_per -> i2c3 */ | ||
| 2699 | @@ -2259,7 +2260,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c3 = { | ||
| 2700 | .slave = &omap44xx_i2c3_hwmod, | ||
| 2701 | .clk = "l4_div_ck", | ||
| 2702 | .addr = omap44xx_i2c3_addrs, | ||
| 2703 | - .addr_cnt = ARRAY_SIZE(omap44xx_i2c3_addrs), | ||
| 2704 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2705 | }; | ||
| 2706 | |||
| 2707 | @@ -2304,6 +2304,7 @@ static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { | ||
| 2708 | .pa_end = 0x483500ff, | ||
| 2709 | .flags = ADDR_TYPE_RT | ||
| 2710 | }, | ||
| 2711 | + { } | ||
| 2712 | }; | ||
| 2713 | |||
| 2714 | /* l4_per -> i2c4 */ | ||
| 2715 | @@ -2312,7 +2313,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__i2c4 = { | ||
| 2716 | .slave = &omap44xx_i2c4_hwmod, | ||
| 2717 | .clk = "l4_div_ck", | ||
| 2718 | .addr = omap44xx_i2c4_addrs, | ||
| 2719 | - .addr_cnt = ARRAY_SIZE(omap44xx_i2c4_addrs), | ||
| 2720 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2721 | }; | ||
| 2722 | |||
| 2723 | @@ -2479,6 +2479,7 @@ static struct omap_hwmod_addr_space omap44xx_iss_addrs[] = { | ||
| 2724 | .pa_end = 0x520000ff, | ||
| 2725 | .flags = ADDR_TYPE_RT | ||
| 2726 | }, | ||
| 2727 | + { } | ||
| 2728 | }; | ||
| 2729 | |||
| 2730 | /* l3_main_2 -> iss */ | ||
| 2731 | @@ -2487,7 +2488,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iss = { | ||
| 2732 | .slave = &omap44xx_iss_hwmod, | ||
| 2733 | .clk = "l3_div_ck", | ||
| 2734 | .addr = omap44xx_iss_addrs, | ||
| 2735 | - .addr_cnt = ARRAY_SIZE(omap44xx_iss_addrs), | ||
| 2736 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2737 | }; | ||
| 2738 | |||
| 2739 | @@ -2562,6 +2562,7 @@ static struct omap_hwmod_addr_space omap44xx_iva_addrs[] = { | ||
| 2740 | .pa_end = 0x5a07ffff, | ||
| 2741 | .flags = ADDR_TYPE_RT | ||
| 2742 | }, | ||
| 2743 | + { } | ||
| 2744 | }; | ||
| 2745 | |||
| 2746 | /* l3_main_2 -> iva */ | ||
| 2747 | @@ -2570,7 +2571,6 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_2__iva = { | ||
| 2748 | .slave = &omap44xx_iva_hwmod, | ||
| 2749 | .clk = "l3_div_ck", | ||
| 2750 | .addr = omap44xx_iva_addrs, | ||
| 2751 | - .addr_cnt = ARRAY_SIZE(omap44xx_iva_addrs), | ||
| 2752 | .user = OCP_USER_MPU, | ||
| 2753 | }; | ||
| 2754 | |||
| 2755 | @@ -2665,6 +2665,7 @@ static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { | ||
| 2756 | .pa_end = 0x4a31c07f, | ||
| 2757 | .flags = ADDR_TYPE_RT | ||
| 2758 | }, | ||
| 2759 | + { } | ||
| 2760 | }; | ||
| 2761 | |||
| 2762 | /* l4_wkup -> kbd */ | ||
| 2763 | @@ -2673,7 +2674,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__kbd = { | ||
| 2764 | .slave = &omap44xx_kbd_hwmod, | ||
| 2765 | .clk = "l4_wkup_clk_mux_ck", | ||
| 2766 | .addr = omap44xx_kbd_addrs, | ||
| 2767 | - .addr_cnt = ARRAY_SIZE(omap44xx_kbd_addrs), | ||
| 2768 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2769 | }; | ||
| 2770 | |||
| 2771 | @@ -2730,6 +2730,7 @@ static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { | ||
| 2772 | .pa_end = 0x4a0f41ff, | ||
| 2773 | .flags = ADDR_TYPE_RT | ||
| 2774 | }, | ||
| 2775 | + { } | ||
| 2776 | }; | ||
| 2777 | |||
| 2778 | /* l4_cfg -> mailbox */ | ||
| 2779 | @@ -2738,7 +2739,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__mailbox = { | ||
| 2780 | .slave = &omap44xx_mailbox_hwmod, | ||
| 2781 | .clk = "l4_div_ck", | ||
| 2782 | .addr = omap44xx_mailbox_addrs, | ||
| 2783 | - .addr_cnt = ARRAY_SIZE(omap44xx_mailbox_addrs), | ||
| 2784 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2785 | }; | ||
| 2786 | |||
| 2787 | @@ -2799,6 +2799,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { | ||
| 2788 | .pa_end = 0x401220ff, | ||
| 2789 | .flags = ADDR_TYPE_RT | ||
| 2790 | }, | ||
| 2791 | + { } | ||
| 2792 | }; | ||
| 2793 | |||
| 2794 | /* l4_abe -> mcbsp1 */ | ||
| 2795 | @@ -2807,7 +2808,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1 = { | ||
| 2796 | .slave = &omap44xx_mcbsp1_hwmod, | ||
| 2797 | .clk = "ocp_abe_iclk", | ||
| 2798 | .addr = omap44xx_mcbsp1_addrs, | ||
| 2799 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_addrs), | ||
| 2800 | .user = OCP_USER_MPU, | ||
| 2801 | }; | ||
| 2802 | |||
| 2803 | @@ -2818,6 +2818,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp1_dma_addrs[] = { | ||
| 2804 | .pa_end = 0x490220ff, | ||
| 2805 | .flags = ADDR_TYPE_RT | ||
| 2806 | }, | ||
| 2807 | + { } | ||
| 2808 | }; | ||
| 2809 | |||
| 2810 | /* l4_abe -> mcbsp1 (dma) */ | ||
| 2811 | @@ -2826,7 +2827,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp1_dma = { | ||
| 2812 | .slave = &omap44xx_mcbsp1_hwmod, | ||
| 2813 | .clk = "ocp_abe_iclk", | ||
| 2814 | .addr = omap44xx_mcbsp1_dma_addrs, | ||
| 2815 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp1_dma_addrs), | ||
| 2816 | .user = OCP_USER_SDMA, | ||
| 2817 | }; | ||
| 2818 | |||
| 2819 | @@ -2872,6 +2872,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { | ||
| 2820 | .pa_end = 0x401240ff, | ||
| 2821 | .flags = ADDR_TYPE_RT | ||
| 2822 | }, | ||
| 2823 | + { } | ||
| 2824 | }; | ||
| 2825 | |||
| 2826 | /* l4_abe -> mcbsp2 */ | ||
| 2827 | @@ -2880,7 +2881,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2 = { | ||
| 2828 | .slave = &omap44xx_mcbsp2_hwmod, | ||
| 2829 | .clk = "ocp_abe_iclk", | ||
| 2830 | .addr = omap44xx_mcbsp2_addrs, | ||
| 2831 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_addrs), | ||
| 2832 | .user = OCP_USER_MPU, | ||
| 2833 | }; | ||
| 2834 | |||
| 2835 | @@ -2891,6 +2891,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp2_dma_addrs[] = { | ||
| 2836 | .pa_end = 0x490240ff, | ||
| 2837 | .flags = ADDR_TYPE_RT | ||
| 2838 | }, | ||
| 2839 | + { } | ||
| 2840 | }; | ||
| 2841 | |||
| 2842 | /* l4_abe -> mcbsp2 (dma) */ | ||
| 2843 | @@ -2899,7 +2900,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp2_dma = { | ||
| 2844 | .slave = &omap44xx_mcbsp2_hwmod, | ||
| 2845 | .clk = "ocp_abe_iclk", | ||
| 2846 | .addr = omap44xx_mcbsp2_dma_addrs, | ||
| 2847 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp2_dma_addrs), | ||
| 2848 | .user = OCP_USER_SDMA, | ||
| 2849 | }; | ||
| 2850 | |||
| 2851 | @@ -2945,6 +2945,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { | ||
| 2852 | .pa_end = 0x401260ff, | ||
| 2853 | .flags = ADDR_TYPE_RT | ||
| 2854 | }, | ||
| 2855 | + { } | ||
| 2856 | }; | ||
| 2857 | |||
| 2858 | /* l4_abe -> mcbsp3 */ | ||
| 2859 | @@ -2953,7 +2954,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3 = { | ||
| 2860 | .slave = &omap44xx_mcbsp3_hwmod, | ||
| 2861 | .clk = "ocp_abe_iclk", | ||
| 2862 | .addr = omap44xx_mcbsp3_addrs, | ||
| 2863 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_addrs), | ||
| 2864 | .user = OCP_USER_MPU, | ||
| 2865 | }; | ||
| 2866 | |||
| 2867 | @@ -2964,6 +2964,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp3_dma_addrs[] = { | ||
| 2868 | .pa_end = 0x490260ff, | ||
| 2869 | .flags = ADDR_TYPE_RT | ||
| 2870 | }, | ||
| 2871 | + { } | ||
| 2872 | }; | ||
| 2873 | |||
| 2874 | /* l4_abe -> mcbsp3 (dma) */ | ||
| 2875 | @@ -2972,7 +2973,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcbsp3_dma = { | ||
| 2876 | .slave = &omap44xx_mcbsp3_hwmod, | ||
| 2877 | .clk = "ocp_abe_iclk", | ||
| 2878 | .addr = omap44xx_mcbsp3_dma_addrs, | ||
| 2879 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp3_dma_addrs), | ||
| 2880 | .user = OCP_USER_SDMA, | ||
| 2881 | }; | ||
| 2882 | |||
| 2883 | @@ -3017,6 +3017,7 @@ static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { | ||
| 2884 | .pa_end = 0x480960ff, | ||
| 2885 | .flags = ADDR_TYPE_RT | ||
| 2886 | }, | ||
| 2887 | + { } | ||
| 2888 | }; | ||
| 2889 | |||
| 2890 | /* l4_per -> mcbsp4 */ | ||
| 2891 | @@ -3025,7 +3026,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcbsp4 = { | ||
| 2892 | .slave = &omap44xx_mcbsp4_hwmod, | ||
| 2893 | .clk = "l4_div_ck", | ||
| 2894 | .addr = omap44xx_mcbsp4_addrs, | ||
| 2895 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcbsp4_addrs), | ||
| 2896 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2897 | }; | ||
| 2898 | |||
| 2899 | @@ -3090,6 +3090,7 @@ static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { | ||
| 2900 | .pa_end = 0x4013207f, | ||
| 2901 | .flags = ADDR_TYPE_RT | ||
| 2902 | }, | ||
| 2903 | + { } | ||
| 2904 | }; | ||
| 2905 | |||
| 2906 | /* l4_abe -> mcpdm */ | ||
| 2907 | @@ -3098,7 +3099,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm = { | ||
| 2908 | .slave = &omap44xx_mcpdm_hwmod, | ||
| 2909 | .clk = "ocp_abe_iclk", | ||
| 2910 | .addr = omap44xx_mcpdm_addrs, | ||
| 2911 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcpdm_addrs), | ||
| 2912 | .user = OCP_USER_MPU, | ||
| 2913 | }; | ||
| 2914 | |||
| 2915 | @@ -3108,6 +3108,7 @@ static struct omap_hwmod_addr_space omap44xx_mcpdm_dma_addrs[] = { | ||
| 2916 | .pa_end = 0x4903207f, | ||
| 2917 | .flags = ADDR_TYPE_RT | ||
| 2918 | }, | ||
| 2919 | + { } | ||
| 2920 | }; | ||
| 2921 | |||
| 2922 | /* l4_abe -> mcpdm (dma) */ | ||
| 2923 | @@ -3116,7 +3117,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__mcpdm_dma = { | ||
| 2924 | .slave = &omap44xx_mcpdm_hwmod, | ||
| 2925 | .clk = "ocp_abe_iclk", | ||
| 2926 | .addr = omap44xx_mcpdm_dma_addrs, | ||
| 2927 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcpdm_dma_addrs), | ||
| 2928 | .user = OCP_USER_SDMA, | ||
| 2929 | }; | ||
| 2930 | |||
| 2931 | @@ -3189,6 +3189,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { | ||
| 2932 | .pa_end = 0x480981ff, | ||
| 2933 | .flags = ADDR_TYPE_RT | ||
| 2934 | }, | ||
| 2935 | + { } | ||
| 2936 | }; | ||
| 2937 | |||
| 2938 | /* l4_per -> mcspi1 */ | ||
| 2939 | @@ -3197,7 +3198,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi1 = { | ||
| 2940 | .slave = &omap44xx_mcspi1_hwmod, | ||
| 2941 | .clk = "l4_div_ck", | ||
| 2942 | .addr = omap44xx_mcspi1_addrs, | ||
| 2943 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi1_addrs), | ||
| 2944 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2945 | }; | ||
| 2946 | |||
| 2947 | @@ -3249,6 +3249,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { | ||
| 2948 | .pa_end = 0x4809a1ff, | ||
| 2949 | .flags = ADDR_TYPE_RT | ||
| 2950 | }, | ||
| 2951 | + { } | ||
| 2952 | }; | ||
| 2953 | |||
| 2954 | /* l4_per -> mcspi2 */ | ||
| 2955 | @@ -3257,7 +3258,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi2 = { | ||
| 2956 | .slave = &omap44xx_mcspi2_hwmod, | ||
| 2957 | .clk = "l4_div_ck", | ||
| 2958 | .addr = omap44xx_mcspi2_addrs, | ||
| 2959 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi2_addrs), | ||
| 2960 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2961 | }; | ||
| 2962 | |||
| 2963 | @@ -3309,6 +3309,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { | ||
| 2964 | .pa_end = 0x480b81ff, | ||
| 2965 | .flags = ADDR_TYPE_RT | ||
| 2966 | }, | ||
| 2967 | + { } | ||
| 2968 | }; | ||
| 2969 | |||
| 2970 | /* l4_per -> mcspi3 */ | ||
| 2971 | @@ -3317,7 +3318,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi3 = { | ||
| 2972 | .slave = &omap44xx_mcspi3_hwmod, | ||
| 2973 | .clk = "l4_div_ck", | ||
| 2974 | .addr = omap44xx_mcspi3_addrs, | ||
| 2975 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi3_addrs), | ||
| 2976 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2977 | }; | ||
| 2978 | |||
| 2979 | @@ -3367,6 +3367,7 @@ static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { | ||
| 2980 | .pa_end = 0x480ba1ff, | ||
| 2981 | .flags = ADDR_TYPE_RT | ||
| 2982 | }, | ||
| 2983 | + { } | ||
| 2984 | }; | ||
| 2985 | |||
| 2986 | /* l4_per -> mcspi4 */ | ||
| 2987 | @@ -3375,7 +3376,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mcspi4 = { | ||
| 2988 | .slave = &omap44xx_mcspi4_hwmod, | ||
| 2989 | .clk = "l4_div_ck", | ||
| 2990 | .addr = omap44xx_mcspi4_addrs, | ||
| 2991 | - .addr_cnt = ARRAY_SIZE(omap44xx_mcspi4_addrs), | ||
| 2992 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 2993 | }; | ||
| 2994 | |||
| 2995 | @@ -3452,6 +3452,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc1_addrs[] = { | ||
| 2996 | .pa_end = 0x4809c3ff, | ||
| 2997 | .flags = ADDR_TYPE_RT | ||
| 2998 | }, | ||
| 2999 | + { } | ||
| 3000 | }; | ||
| 3001 | |||
| 3002 | /* l4_per -> mmc1 */ | ||
| 3003 | @@ -3460,7 +3461,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc1 = { | ||
| 3004 | .slave = &omap44xx_mmc1_hwmod, | ||
| 3005 | .clk = "l4_div_ck", | ||
| 3006 | .addr = omap44xx_mmc1_addrs, | ||
| 3007 | - .addr_cnt = ARRAY_SIZE(omap44xx_mmc1_addrs), | ||
| 3008 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3009 | }; | ||
| 3010 | |||
| 3011 | @@ -3516,6 +3516,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc2_addrs[] = { | ||
| 3012 | .pa_end = 0x480b43ff, | ||
| 3013 | .flags = ADDR_TYPE_RT | ||
| 3014 | }, | ||
| 3015 | + { } | ||
| 3016 | }; | ||
| 3017 | |||
| 3018 | /* l4_per -> mmc2 */ | ||
| 3019 | @@ -3524,7 +3525,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc2 = { | ||
| 3020 | .slave = &omap44xx_mmc2_hwmod, | ||
| 3021 | .clk = "l4_div_ck", | ||
| 3022 | .addr = omap44xx_mmc2_addrs, | ||
| 3023 | - .addr_cnt = ARRAY_SIZE(omap44xx_mmc2_addrs), | ||
| 3024 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3025 | }; | ||
| 3026 | |||
| 3027 | @@ -3570,6 +3570,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { | ||
| 3028 | .pa_end = 0x480ad3ff, | ||
| 3029 | .flags = ADDR_TYPE_RT | ||
| 3030 | }, | ||
| 3031 | + { } | ||
| 3032 | }; | ||
| 3033 | |||
| 3034 | /* l4_per -> mmc3 */ | ||
| 3035 | @@ -3578,7 +3579,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc3 = { | ||
| 3036 | .slave = &omap44xx_mmc3_hwmod, | ||
| 3037 | .clk = "l4_div_ck", | ||
| 3038 | .addr = omap44xx_mmc3_addrs, | ||
| 3039 | - .addr_cnt = ARRAY_SIZE(omap44xx_mmc3_addrs), | ||
| 3040 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3041 | }; | ||
| 3042 | |||
| 3043 | @@ -3622,6 +3622,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { | ||
| 3044 | .pa_end = 0x480d13ff, | ||
| 3045 | .flags = ADDR_TYPE_RT | ||
| 3046 | }, | ||
| 3047 | + { } | ||
| 3048 | }; | ||
| 3049 | |||
| 3050 | /* l4_per -> mmc4 */ | ||
| 3051 | @@ -3630,7 +3631,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc4 = { | ||
| 3052 | .slave = &omap44xx_mmc4_hwmod, | ||
| 3053 | .clk = "l4_div_ck", | ||
| 3054 | .addr = omap44xx_mmc4_addrs, | ||
| 3055 | - .addr_cnt = ARRAY_SIZE(omap44xx_mmc4_addrs), | ||
| 3056 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3057 | }; | ||
| 3058 | |||
| 3059 | @@ -3674,6 +3674,7 @@ static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { | ||
| 3060 | .pa_end = 0x480d53ff, | ||
| 3061 | .flags = ADDR_TYPE_RT | ||
| 3062 | }, | ||
| 3063 | + { } | ||
| 3064 | }; | ||
| 3065 | |||
| 3066 | /* l4_per -> mmc5 */ | ||
| 3067 | @@ -3682,7 +3683,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__mmc5 = { | ||
| 3068 | .slave = &omap44xx_mmc5_hwmod, | ||
| 3069 | .clk = "l4_div_ck", | ||
| 3070 | .addr = omap44xx_mmc5_addrs, | ||
| 3071 | - .addr_cnt = ARRAY_SIZE(omap44xx_mmc5_addrs), | ||
| 3072 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3073 | }; | ||
| 3074 | |||
| 3075 | @@ -3787,6 +3787,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { | ||
| 3076 | .pa_end = 0x4a0dd03f, | ||
| 3077 | .flags = ADDR_TYPE_RT | ||
| 3078 | }, | ||
| 3079 | + { } | ||
| 3080 | }; | ||
| 3081 | |||
| 3082 | /* l4_cfg -> smartreflex_core */ | ||
| 3083 | @@ -3795,7 +3796,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_core = { | ||
| 3084 | .slave = &omap44xx_smartreflex_core_hwmod, | ||
| 3085 | .clk = "l4_div_ck", | ||
| 3086 | .addr = omap44xx_smartreflex_core_addrs, | ||
| 3087 | - .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_addrs), | ||
| 3088 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3089 | }; | ||
| 3090 | |||
| 3091 | @@ -3833,6 +3833,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { | ||
| 3092 | .pa_end = 0x4a0db03f, | ||
| 3093 | .flags = ADDR_TYPE_RT | ||
| 3094 | }, | ||
| 3095 | + { } | ||
| 3096 | }; | ||
| 3097 | |||
| 3098 | /* l4_cfg -> smartreflex_iva */ | ||
| 3099 | @@ -3841,7 +3842,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_iva = { | ||
| 3100 | .slave = &omap44xx_smartreflex_iva_hwmod, | ||
| 3101 | .clk = "l4_div_ck", | ||
| 3102 | .addr = omap44xx_smartreflex_iva_addrs, | ||
| 3103 | - .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_addrs), | ||
| 3104 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3105 | }; | ||
| 3106 | |||
| 3107 | @@ -3879,6 +3879,7 @@ static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { | ||
| 3108 | .pa_end = 0x4a0d903f, | ||
| 3109 | .flags = ADDR_TYPE_RT | ||
| 3110 | }, | ||
| 3111 | + { } | ||
| 3112 | }; | ||
| 3113 | |||
| 3114 | /* l4_cfg -> smartreflex_mpu */ | ||
| 3115 | @@ -3887,7 +3888,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__smartreflex_mpu = { | ||
| 3116 | .slave = &omap44xx_smartreflex_mpu_hwmod, | ||
| 3117 | .clk = "l4_div_ck", | ||
| 3118 | .addr = omap44xx_smartreflex_mpu_addrs, | ||
| 3119 | - .addr_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_addrs), | ||
| 3120 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3121 | }; | ||
| 3122 | |||
| 3123 | @@ -3944,6 +3944,7 @@ static struct omap_hwmod_addr_space omap44xx_spinlock_addrs[] = { | ||
| 3124 | .pa_end = 0x4a0f6fff, | ||
| 3125 | .flags = ADDR_TYPE_RT | ||
| 3126 | }, | ||
| 3127 | + { } | ||
| 3128 | }; | ||
| 3129 | |||
| 3130 | /* l4_cfg -> spinlock */ | ||
| 3131 | @@ -3952,7 +3953,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__spinlock = { | ||
| 3132 | .slave = &omap44xx_spinlock_hwmod, | ||
| 3133 | .clk = "l4_div_ck", | ||
| 3134 | .addr = omap44xx_spinlock_addrs, | ||
| 3135 | - .addr_cnt = ARRAY_SIZE(omap44xx_spinlock_addrs), | ||
| 3136 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3137 | }; | ||
| 3138 | |||
| 3139 | @@ -4024,6 +4024,7 @@ static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { | ||
| 3140 | .pa_end = 0x4a31807f, | ||
| 3141 | .flags = ADDR_TYPE_RT | ||
| 3142 | }, | ||
| 3143 | + { } | ||
| 3144 | }; | ||
| 3145 | |||
| 3146 | /* l4_wkup -> timer1 */ | ||
| 3147 | @@ -4032,7 +4033,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__timer1 = { | ||
| 3148 | .slave = &omap44xx_timer1_hwmod, | ||
| 3149 | .clk = "l4_wkup_clk_mux_ck", | ||
| 3150 | .addr = omap44xx_timer1_addrs, | ||
| 3151 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer1_addrs), | ||
| 3152 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3153 | }; | ||
| 3154 | |||
| 3155 | @@ -4069,6 +4069,7 @@ static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { | ||
| 3156 | .pa_end = 0x4803207f, | ||
| 3157 | .flags = ADDR_TYPE_RT | ||
| 3158 | }, | ||
| 3159 | + { } | ||
| 3160 | }; | ||
| 3161 | |||
| 3162 | /* l4_per -> timer2 */ | ||
| 3163 | @@ -4077,7 +4078,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer2 = { | ||
| 3164 | .slave = &omap44xx_timer2_hwmod, | ||
| 3165 | .clk = "l4_div_ck", | ||
| 3166 | .addr = omap44xx_timer2_addrs, | ||
| 3167 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer2_addrs), | ||
| 3168 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3169 | }; | ||
| 3170 | |||
| 3171 | @@ -4114,6 +4114,7 @@ static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { | ||
| 3172 | .pa_end = 0x4803407f, | ||
| 3173 | .flags = ADDR_TYPE_RT | ||
| 3174 | }, | ||
| 3175 | + { } | ||
| 3176 | }; | ||
| 3177 | |||
| 3178 | /* l4_per -> timer3 */ | ||
| 3179 | @@ -4122,7 +4123,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer3 = { | ||
| 3180 | .slave = &omap44xx_timer3_hwmod, | ||
| 3181 | .clk = "l4_div_ck", | ||
| 3182 | .addr = omap44xx_timer3_addrs, | ||
| 3183 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer3_addrs), | ||
| 3184 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3185 | }; | ||
| 3186 | |||
| 3187 | @@ -4159,6 +4159,7 @@ static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { | ||
| 3188 | .pa_end = 0x4803607f, | ||
| 3189 | .flags = ADDR_TYPE_RT | ||
| 3190 | }, | ||
| 3191 | + { } | ||
| 3192 | }; | ||
| 3193 | |||
| 3194 | /* l4_per -> timer4 */ | ||
| 3195 | @@ -4167,7 +4168,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer4 = { | ||
| 3196 | .slave = &omap44xx_timer4_hwmod, | ||
| 3197 | .clk = "l4_div_ck", | ||
| 3198 | .addr = omap44xx_timer4_addrs, | ||
| 3199 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer4_addrs), | ||
| 3200 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3201 | }; | ||
| 3202 | |||
| 3203 | @@ -4204,6 +4204,7 @@ static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { | ||
| 3204 | .pa_end = 0x4013807f, | ||
| 3205 | .flags = ADDR_TYPE_RT | ||
| 3206 | }, | ||
| 3207 | + { } | ||
| 3208 | }; | ||
| 3209 | |||
| 3210 | /* l4_abe -> timer5 */ | ||
| 3211 | @@ -4212,7 +4213,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5 = { | ||
| 3212 | .slave = &omap44xx_timer5_hwmod, | ||
| 3213 | .clk = "ocp_abe_iclk", | ||
| 3214 | .addr = omap44xx_timer5_addrs, | ||
| 3215 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer5_addrs), | ||
| 3216 | .user = OCP_USER_MPU, | ||
| 3217 | }; | ||
| 3218 | |||
| 3219 | @@ -4222,6 +4222,7 @@ static struct omap_hwmod_addr_space omap44xx_timer5_dma_addrs[] = { | ||
| 3220 | .pa_end = 0x4903807f, | ||
| 3221 | .flags = ADDR_TYPE_RT | ||
| 3222 | }, | ||
| 3223 | + { } | ||
| 3224 | }; | ||
| 3225 | |||
| 3226 | /* l4_abe -> timer5 (dma) */ | ||
| 3227 | @@ -4230,7 +4231,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer5_dma = { | ||
| 3228 | .slave = &omap44xx_timer5_hwmod, | ||
| 3229 | .clk = "ocp_abe_iclk", | ||
| 3230 | .addr = omap44xx_timer5_dma_addrs, | ||
| 3231 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer5_dma_addrs), | ||
| 3232 | .user = OCP_USER_SDMA, | ||
| 3233 | }; | ||
| 3234 | |||
| 3235 | @@ -4268,6 +4268,7 @@ static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { | ||
| 3236 | .pa_end = 0x4013a07f, | ||
| 3237 | .flags = ADDR_TYPE_RT | ||
| 3238 | }, | ||
| 3239 | + { } | ||
| 3240 | }; | ||
| 3241 | |||
| 3242 | /* l4_abe -> timer6 */ | ||
| 3243 | @@ -4276,7 +4277,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6 = { | ||
| 3244 | .slave = &omap44xx_timer6_hwmod, | ||
| 3245 | .clk = "ocp_abe_iclk", | ||
| 3246 | .addr = omap44xx_timer6_addrs, | ||
| 3247 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer6_addrs), | ||
| 3248 | .user = OCP_USER_MPU, | ||
| 3249 | }; | ||
| 3250 | |||
| 3251 | @@ -4286,6 +4286,7 @@ static struct omap_hwmod_addr_space omap44xx_timer6_dma_addrs[] = { | ||
| 3252 | .pa_end = 0x4903a07f, | ||
| 3253 | .flags = ADDR_TYPE_RT | ||
| 3254 | }, | ||
| 3255 | + { } | ||
| 3256 | }; | ||
| 3257 | |||
| 3258 | /* l4_abe -> timer6 (dma) */ | ||
| 3259 | @@ -4294,7 +4295,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer6_dma = { | ||
| 3260 | .slave = &omap44xx_timer6_hwmod, | ||
| 3261 | .clk = "ocp_abe_iclk", | ||
| 3262 | .addr = omap44xx_timer6_dma_addrs, | ||
| 3263 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer6_dma_addrs), | ||
| 3264 | .user = OCP_USER_SDMA, | ||
| 3265 | }; | ||
| 3266 | |||
| 3267 | @@ -4332,6 +4332,7 @@ static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { | ||
| 3268 | .pa_end = 0x4013c07f, | ||
| 3269 | .flags = ADDR_TYPE_RT | ||
| 3270 | }, | ||
| 3271 | + { } | ||
| 3272 | }; | ||
| 3273 | |||
| 3274 | /* l4_abe -> timer7 */ | ||
| 3275 | @@ -4340,7 +4341,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7 = { | ||
| 3276 | .slave = &omap44xx_timer7_hwmod, | ||
| 3277 | .clk = "ocp_abe_iclk", | ||
| 3278 | .addr = omap44xx_timer7_addrs, | ||
| 3279 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer7_addrs), | ||
| 3280 | .user = OCP_USER_MPU, | ||
| 3281 | }; | ||
| 3282 | |||
| 3283 | @@ -4350,6 +4350,7 @@ static struct omap_hwmod_addr_space omap44xx_timer7_dma_addrs[] = { | ||
| 3284 | .pa_end = 0x4903c07f, | ||
| 3285 | .flags = ADDR_TYPE_RT | ||
| 3286 | }, | ||
| 3287 | + { } | ||
| 3288 | }; | ||
| 3289 | |||
| 3290 | /* l4_abe -> timer7 (dma) */ | ||
| 3291 | @@ -4358,7 +4359,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer7_dma = { | ||
| 3292 | .slave = &omap44xx_timer7_hwmod, | ||
| 3293 | .clk = "ocp_abe_iclk", | ||
| 3294 | .addr = omap44xx_timer7_dma_addrs, | ||
| 3295 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer7_dma_addrs), | ||
| 3296 | .user = OCP_USER_SDMA, | ||
| 3297 | }; | ||
| 3298 | |||
| 3299 | @@ -4396,6 +4396,7 @@ static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { | ||
| 3300 | .pa_end = 0x4013e07f, | ||
| 3301 | .flags = ADDR_TYPE_RT | ||
| 3302 | }, | ||
| 3303 | + { } | ||
| 3304 | }; | ||
| 3305 | |||
| 3306 | /* l4_abe -> timer8 */ | ||
| 3307 | @@ -4404,7 +4405,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8 = { | ||
| 3308 | .slave = &omap44xx_timer8_hwmod, | ||
| 3309 | .clk = "ocp_abe_iclk", | ||
| 3310 | .addr = omap44xx_timer8_addrs, | ||
| 3311 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer8_addrs), | ||
| 3312 | .user = OCP_USER_MPU, | ||
| 3313 | }; | ||
| 3314 | |||
| 3315 | @@ -4414,6 +4414,7 @@ static struct omap_hwmod_addr_space omap44xx_timer8_dma_addrs[] = { | ||
| 3316 | .pa_end = 0x4903e07f, | ||
| 3317 | .flags = ADDR_TYPE_RT | ||
| 3318 | }, | ||
| 3319 | + { } | ||
| 3320 | }; | ||
| 3321 | |||
| 3322 | /* l4_abe -> timer8 (dma) */ | ||
| 3323 | @@ -4422,7 +4423,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__timer8_dma = { | ||
| 3324 | .slave = &omap44xx_timer8_hwmod, | ||
| 3325 | .clk = "ocp_abe_iclk", | ||
| 3326 | .addr = omap44xx_timer8_dma_addrs, | ||
| 3327 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer8_dma_addrs), | ||
| 3328 | .user = OCP_USER_SDMA, | ||
| 3329 | }; | ||
| 3330 | |||
| 3331 | @@ -4460,6 +4460,7 @@ static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { | ||
| 3332 | .pa_end = 0x4803e07f, | ||
| 3333 | .flags = ADDR_TYPE_RT | ||
| 3334 | }, | ||
| 3335 | + { } | ||
| 3336 | }; | ||
| 3337 | |||
| 3338 | /* l4_per -> timer9 */ | ||
| 3339 | @@ -4468,7 +4469,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer9 = { | ||
| 3340 | .slave = &omap44xx_timer9_hwmod, | ||
| 3341 | .clk = "l4_div_ck", | ||
| 3342 | .addr = omap44xx_timer9_addrs, | ||
| 3343 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer9_addrs), | ||
| 3344 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3345 | }; | ||
| 3346 | |||
| 3347 | @@ -4505,6 +4505,7 @@ static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { | ||
| 3348 | .pa_end = 0x4808607f, | ||
| 3349 | .flags = ADDR_TYPE_RT | ||
| 3350 | }, | ||
| 3351 | + { } | ||
| 3352 | }; | ||
| 3353 | |||
| 3354 | /* l4_per -> timer10 */ | ||
| 3355 | @@ -4513,7 +4514,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer10 = { | ||
| 3356 | .slave = &omap44xx_timer10_hwmod, | ||
| 3357 | .clk = "l4_div_ck", | ||
| 3358 | .addr = omap44xx_timer10_addrs, | ||
| 3359 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer10_addrs), | ||
| 3360 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3361 | }; | ||
| 3362 | |||
| 3363 | @@ -4550,6 +4550,7 @@ static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { | ||
| 3364 | .pa_end = 0x4808807f, | ||
| 3365 | .flags = ADDR_TYPE_RT | ||
| 3366 | }, | ||
| 3367 | + { } | ||
| 3368 | }; | ||
| 3369 | |||
| 3370 | /* l4_per -> timer11 */ | ||
| 3371 | @@ -4558,7 +4559,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__timer11 = { | ||
| 3372 | .slave = &omap44xx_timer11_hwmod, | ||
| 3373 | .clk = "l4_div_ck", | ||
| 3374 | .addr = omap44xx_timer11_addrs, | ||
| 3375 | - .addr_cnt = ARRAY_SIZE(omap44xx_timer11_addrs), | ||
| 3376 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3377 | }; | ||
| 3378 | |||
| 3379 | @@ -4622,6 +4622,7 @@ static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { | ||
| 3380 | .pa_end = 0x4806a0ff, | ||
| 3381 | .flags = ADDR_TYPE_RT | ||
| 3382 | }, | ||
| 3383 | + { } | ||
| 3384 | }; | ||
| 3385 | |||
| 3386 | /* l4_per -> uart1 */ | ||
| 3387 | @@ -4630,7 +4631,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart1 = { | ||
| 3388 | .slave = &omap44xx_uart1_hwmod, | ||
| 3389 | .clk = "l4_div_ck", | ||
| 3390 | .addr = omap44xx_uart1_addrs, | ||
| 3391 | - .addr_cnt = ARRAY_SIZE(omap44xx_uart1_addrs), | ||
| 3392 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3393 | }; | ||
| 3394 | |||
| 3395 | @@ -4674,6 +4674,7 @@ static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { | ||
| 3396 | .pa_end = 0x4806c0ff, | ||
| 3397 | .flags = ADDR_TYPE_RT | ||
| 3398 | }, | ||
| 3399 | + { } | ||
| 3400 | }; | ||
| 3401 | |||
| 3402 | /* l4_per -> uart2 */ | ||
| 3403 | @@ -4682,7 +4683,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart2 = { | ||
| 3404 | .slave = &omap44xx_uart2_hwmod, | ||
| 3405 | .clk = "l4_div_ck", | ||
| 3406 | .addr = omap44xx_uart2_addrs, | ||
| 3407 | - .addr_cnt = ARRAY_SIZE(omap44xx_uart2_addrs), | ||
| 3408 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3409 | }; | ||
| 3410 | |||
| 3411 | @@ -4726,6 +4726,7 @@ static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { | ||
| 3412 | .pa_end = 0x480200ff, | ||
| 3413 | .flags = ADDR_TYPE_RT | ||
| 3414 | }, | ||
| 3415 | + { } | ||
| 3416 | }; | ||
| 3417 | |||
| 3418 | /* l4_per -> uart3 */ | ||
| 3419 | @@ -4734,7 +4735,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart3 = { | ||
| 3420 | .slave = &omap44xx_uart3_hwmod, | ||
| 3421 | .clk = "l4_div_ck", | ||
| 3422 | .addr = omap44xx_uart3_addrs, | ||
| 3423 | - .addr_cnt = ARRAY_SIZE(omap44xx_uart3_addrs), | ||
| 3424 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3425 | }; | ||
| 3426 | |||
| 3427 | @@ -4779,6 +4779,7 @@ static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { | ||
| 3428 | .pa_end = 0x4806e0ff, | ||
| 3429 | .flags = ADDR_TYPE_RT | ||
| 3430 | }, | ||
| 3431 | + { } | ||
| 3432 | }; | ||
| 3433 | |||
| 3434 | /* l4_per -> uart4 */ | ||
| 3435 | @@ -4787,7 +4788,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__uart4 = { | ||
| 3436 | .slave = &omap44xx_uart4_hwmod, | ||
| 3437 | .clk = "l4_div_ck", | ||
| 3438 | .addr = omap44xx_uart4_addrs, | ||
| 3439 | - .addr_cnt = ARRAY_SIZE(omap44xx_uart4_addrs), | ||
| 3440 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3441 | }; | ||
| 3442 | |||
| 3443 | @@ -4854,6 +4854,7 @@ static struct omap_hwmod_addr_space omap44xx_usb_otg_hs_addrs[] = { | ||
| 3444 | .pa_end = 0x4a0ab003, | ||
| 3445 | .flags = ADDR_TYPE_RT | ||
| 3446 | }, | ||
| 3447 | + { } | ||
| 3448 | }; | ||
| 3449 | |||
| 3450 | /* l4_cfg -> usb_otg_hs */ | ||
| 3451 | @@ -4862,7 +4863,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_otg_hs = { | ||
| 3452 | .slave = &omap44xx_usb_otg_hs_hwmod, | ||
| 3453 | .clk = "l4_div_ck", | ||
| 3454 | .addr = omap44xx_usb_otg_hs_addrs, | ||
| 3455 | - .addr_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_addrs), | ||
| 3456 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3457 | }; | ||
| 3458 | |||
| 3459 | @@ -4931,6 +4931,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { | ||
| 3460 | .pa_end = 0x4a31407f, | ||
| 3461 | .flags = ADDR_TYPE_RT | ||
| 3462 | }, | ||
| 3463 | + { } | ||
| 3464 | }; | ||
| 3465 | |||
| 3466 | /* l4_wkup -> wd_timer2 */ | ||
| 3467 | @@ -4939,7 +4940,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_wkup__wd_timer2 = { | ||
| 3468 | .slave = &omap44xx_wd_timer2_hwmod, | ||
| 3469 | .clk = "l4_wkup_clk_mux_ck", | ||
| 3470 | .addr = omap44xx_wd_timer2_addrs, | ||
| 3471 | - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer2_addrs), | ||
| 3472 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 3473 | }; | ||
| 3474 | |||
| 3475 | @@ -4976,6 +4976,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { | ||
| 3476 | .pa_end = 0x4013007f, | ||
| 3477 | .flags = ADDR_TYPE_RT | ||
| 3478 | }, | ||
| 3479 | + { } | ||
| 3480 | }; | ||
| 3481 | |||
| 3482 | /* l4_abe -> wd_timer3 */ | ||
| 3483 | @@ -4984,7 +4985,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3 = { | ||
| 3484 | .slave = &omap44xx_wd_timer3_hwmod, | ||
| 3485 | .clk = "ocp_abe_iclk", | ||
| 3486 | .addr = omap44xx_wd_timer3_addrs, | ||
| 3487 | - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_addrs), | ||
| 3488 | .user = OCP_USER_MPU, | ||
| 3489 | }; | ||
| 3490 | |||
| 3491 | @@ -4994,6 +4994,7 @@ static struct omap_hwmod_addr_space omap44xx_wd_timer3_dma_addrs[] = { | ||
| 3492 | .pa_end = 0x4903007f, | ||
| 3493 | .flags = ADDR_TYPE_RT | ||
| 3494 | }, | ||
| 3495 | + { } | ||
| 3496 | }; | ||
| 3497 | |||
| 3498 | /* l4_abe -> wd_timer3 (dma) */ | ||
| 3499 | @@ -5002,7 +5003,6 @@ static struct omap_hwmod_ocp_if omap44xx_l4_abe__wd_timer3_dma = { | ||
| 3500 | .slave = &omap44xx_wd_timer3_hwmod, | ||
| 3501 | .clk = "ocp_abe_iclk", | ||
| 3502 | .addr = omap44xx_wd_timer3_dma_addrs, | ||
| 3503 | - .addr_cnt = ARRAY_SIZE(omap44xx_wd_timer3_dma_addrs), | ||
| 3504 | .user = OCP_USER_SDMA, | ||
| 3505 | }; | ||
| 3506 | |||
| 3507 | diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 3508 | index e93438c..f3a3bff 100644 | ||
| 3509 | --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 3510 | +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 3511 | @@ -219,7 +219,6 @@ struct omap_hwmod_addr_space { | ||
| 3512 | * @clk: interface clock: OMAP clock name | ||
| 3513 | * @_clk: pointer to the interface struct clk (filled in at runtime) | ||
| 3514 | * @fw: interface firewall data | ||
| 3515 | - * @addr_cnt: ARRAY_SIZE(@addr) | ||
| 3516 | * @width: OCP data width | ||
| 3517 | * @user: initiators using this interface (see OCP_USER_* macros above) | ||
| 3518 | * @flags: OCP interface flags (see OCPIF_* macros above) | ||
| 3519 | @@ -238,7 +237,6 @@ struct omap_hwmod_ocp_if { | ||
| 3520 | union { | ||
| 3521 | struct omap_hwmod_omap2_firewall omap2; | ||
| 3522 | } fw; | ||
| 3523 | - u8 addr_cnt; | ||
| 3524 | u8 width; | ||
| 3525 | u8 user; | ||
| 3526 | u8 flags; | ||
| 3527 | -- | ||
| 3528 | 1.7.2.5 | ||
| 3529 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0038-omap_hwmod-share-identical-omap_hwmod_addr_space-arr.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0038-omap_hwmod-share-identical-omap_hwmod_addr_space-arr.patch deleted file mode 100644 index 991fe9a0..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0038-omap_hwmod-share-identical-omap_hwmod_addr_space-arr.patch +++ /dev/null | |||
| @@ -1,1958 +0,0 @@ | |||
| 1 | From 6d88f17e46fda46214da43af303c4f4aa442bd39 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Paul Walmsley <paul@pwsan.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:06 -0600 | ||
| 4 | Subject: [PATCH 038/149] omap_hwmod: share identical omap_hwmod_addr_space arrays | ||
| 5 | |||
| 6 | To reduce kernel source file data duplication, share struct | ||
| 7 | omap_hwmod_addr_space arrays across OMAP2xxx and 3xxx hwmod data | ||
| 8 | files. | ||
| 9 | |||
| 10 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/Makefile | 11 +- | ||
| 13 | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 291 ++---------------- | ||
| 14 | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 319 ++------------------ | ||
| 15 | .../omap_hwmod_2xxx_3xxx_interconnect_data.c | 173 +++++++++++ | ||
| 16 | .../mach-omap2/omap_hwmod_2xxx_interconnect_data.c | 130 ++++++++ | ||
| 17 | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 151 +--------- | ||
| 18 | arch/arm/mach-omap2/omap_hwmod_common_data.h | 38 +++- | ||
| 19 | 7 files changed, 414 insertions(+), 699 deletions(-) | ||
| 20 | create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c | ||
| 21 | create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c | ||
| 22 | |||
| 23 | diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile | ||
| 24 | index ff1466f..8a75d17 100644 | ||
| 25 | --- a/arch/arm/mach-omap2/Makefile | ||
| 26 | +++ b/arch/arm/mach-omap2/Makefile | ||
| 27 | @@ -145,9 +145,14 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o | ||
| 28 | obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o | ||
| 29 | |||
| 30 | # hwmod data | ||
| 31 | -obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2420_data.o | ||
| 32 | -obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2430_data.o | ||
| 33 | -obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_3xxx_data.o | ||
| 34 | +obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o \ | ||
| 35 | + omap_hwmod_2xxx_3xxx_interconnect_data.o \ | ||
| 36 | + omap_hwmod_2420_data.o | ||
| 37 | +obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o \ | ||
| 38 | + omap_hwmod_2xxx_3xxx_interconnect_data.o \ | ||
| 39 | + omap_hwmod_2430_data.o | ||
| 40 | +obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o \ | ||
| 41 | + omap_hwmod_3xxx_data.o | ||
| 42 | obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o | ||
| 43 | |||
| 44 | # EMU peripherals | ||
| 45 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 46 | index 1a7ce3e..3ec625c 100644 | ||
| 47 | --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 48 | +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 49 | @@ -114,38 +114,20 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod; | ||
| 50 | static struct omap_hwmod omap2420_mcbsp2_hwmod; | ||
| 51 | |||
| 52 | /* l4 core -> mcspi1 interface */ | ||
| 53 | -static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { | ||
| 54 | - { | ||
| 55 | - .pa_start = 0x48098000, | ||
| 56 | - .pa_end = 0x480980ff, | ||
| 57 | - .flags = ADDR_TYPE_RT, | ||
| 58 | - }, | ||
| 59 | - { } | ||
| 60 | -}; | ||
| 61 | - | ||
| 62 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { | ||
| 63 | .master = &omap2420_l4_core_hwmod, | ||
| 64 | .slave = &omap2420_mcspi1_hwmod, | ||
| 65 | .clk = "mcspi1_ick", | ||
| 66 | - .addr = omap2420_mcspi1_addr_space, | ||
| 67 | + .addr = omap2_mcspi1_addr_space, | ||
| 68 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 69 | }; | ||
| 70 | |||
| 71 | /* l4 core -> mcspi2 interface */ | ||
| 72 | -static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { | ||
| 73 | - { | ||
| 74 | - .pa_start = 0x4809a000, | ||
| 75 | - .pa_end = 0x4809a0ff, | ||
| 76 | - .flags = ADDR_TYPE_RT, | ||
| 77 | - }, | ||
| 78 | - { } | ||
| 79 | -}; | ||
| 80 | - | ||
| 81 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { | ||
| 82 | .master = &omap2420_l4_core_hwmod, | ||
| 83 | .slave = &omap2420_mcspi2_hwmod, | ||
| 84 | .clk = "mcspi2_ick", | ||
| 85 | - .addr = omap2420_mcspi2_addr_space, | ||
| 86 | + .addr = omap2_mcspi2_addr_space, | ||
| 87 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 88 | }; | ||
| 89 | |||
| 90 | @@ -157,95 +139,47 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { | ||
| 91 | }; | ||
| 92 | |||
| 93 | /* L4 CORE -> UART1 interface */ | ||
| 94 | -static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = { | ||
| 95 | - { | ||
| 96 | - .pa_start = OMAP2_UART1_BASE, | ||
| 97 | - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, | ||
| 98 | - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 99 | - }, | ||
| 100 | - { } | ||
| 101 | -}; | ||
| 102 | - | ||
| 103 | static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { | ||
| 104 | .master = &omap2420_l4_core_hwmod, | ||
| 105 | .slave = &omap2420_uart1_hwmod, | ||
| 106 | .clk = "uart1_ick", | ||
| 107 | - .addr = omap2420_uart1_addr_space, | ||
| 108 | + .addr = omap2xxx_uart1_addr_space, | ||
| 109 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 110 | }; | ||
| 111 | |||
| 112 | /* L4 CORE -> UART2 interface */ | ||
| 113 | -static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = { | ||
| 114 | - { | ||
| 115 | - .pa_start = OMAP2_UART2_BASE, | ||
| 116 | - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, | ||
| 117 | - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 118 | - }, | ||
| 119 | - { } | ||
| 120 | -}; | ||
| 121 | - | ||
| 122 | static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { | ||
| 123 | .master = &omap2420_l4_core_hwmod, | ||
| 124 | .slave = &omap2420_uart2_hwmod, | ||
| 125 | .clk = "uart2_ick", | ||
| 126 | - .addr = omap2420_uart2_addr_space, | ||
| 127 | + .addr = omap2xxx_uart2_addr_space, | ||
| 128 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 129 | }; | ||
| 130 | |||
| 131 | /* L4 PER -> UART3 interface */ | ||
| 132 | -static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = { | ||
| 133 | - { | ||
| 134 | - .pa_start = OMAP2_UART3_BASE, | ||
| 135 | - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, | ||
| 136 | - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 137 | - }, | ||
| 138 | - { } | ||
| 139 | -}; | ||
| 140 | - | ||
| 141 | static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { | ||
| 142 | .master = &omap2420_l4_core_hwmod, | ||
| 143 | .slave = &omap2420_uart3_hwmod, | ||
| 144 | .clk = "uart3_ick", | ||
| 145 | - .addr = omap2420_uart3_addr_space, | ||
| 146 | + .addr = omap2xxx_uart3_addr_space, | ||
| 147 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 148 | }; | ||
| 149 | |||
| 150 | -/* I2C IP block address space length (in bytes) */ | ||
| 151 | -#define OMAP2_I2C_AS_LEN 128 | ||
| 152 | - | ||
| 153 | /* L4 CORE -> I2C1 interface */ | ||
| 154 | -static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = { | ||
| 155 | - { | ||
| 156 | - .pa_start = 0x48070000, | ||
| 157 | - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, | ||
| 158 | - .flags = ADDR_TYPE_RT, | ||
| 159 | - }, | ||
| 160 | - { } | ||
| 161 | -}; | ||
| 162 | - | ||
| 163 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { | ||
| 164 | .master = &omap2420_l4_core_hwmod, | ||
| 165 | .slave = &omap2420_i2c1_hwmod, | ||
| 166 | .clk = "i2c1_ick", | ||
| 167 | - .addr = omap2420_i2c1_addr_space, | ||
| 168 | + .addr = omap2_i2c1_addr_space, | ||
| 169 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 170 | }; | ||
| 171 | |||
| 172 | /* L4 CORE -> I2C2 interface */ | ||
| 173 | -static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = { | ||
| 174 | - { | ||
| 175 | - .pa_start = 0x48072000, | ||
| 176 | - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, | ||
| 177 | - .flags = ADDR_TYPE_RT, | ||
| 178 | - }, | ||
| 179 | - { } | ||
| 180 | -}; | ||
| 181 | - | ||
| 182 | static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { | ||
| 183 | .master = &omap2420_l4_core_hwmod, | ||
| 184 | .slave = &omap2420_i2c2_hwmod, | ||
| 185 | .clk = "i2c2_ick", | ||
| 186 | - .addr = omap2420_i2c2_addr_space, | ||
| 187 | + .addr = omap2_i2c2_addr_space, | ||
| 188 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 189 | }; | ||
| 190 | |||
| 191 | @@ -414,21 +348,13 @@ static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { | ||
| 192 | { .irq = 38, }, | ||
| 193 | }; | ||
| 194 | |||
| 195 | -static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = { | ||
| 196 | - { | ||
| 197 | - .pa_start = 0x4802a000, | ||
| 198 | - .pa_end = 0x4802a000 + SZ_1K - 1, | ||
| 199 | - .flags = ADDR_TYPE_RT | ||
| 200 | - }, | ||
| 201 | - { } | ||
| 202 | -}; | ||
| 203 | |||
| 204 | /* l4_core -> timer2 */ | ||
| 205 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { | ||
| 206 | .master = &omap2420_l4_core_hwmod, | ||
| 207 | .slave = &omap2420_timer2_hwmod, | ||
| 208 | .clk = "gpt2_ick", | ||
| 209 | - .addr = omap2420_timer2_addrs, | ||
| 210 | + .addr = omap2xxx_timer2_addrs, | ||
| 211 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 212 | }; | ||
| 213 | |||
| 214 | @@ -464,21 +390,12 @@ static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { | ||
| 215 | { .irq = 39, }, | ||
| 216 | }; | ||
| 217 | |||
| 218 | -static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = { | ||
| 219 | - { | ||
| 220 | - .pa_start = 0x48078000, | ||
| 221 | - .pa_end = 0x48078000 + SZ_1K - 1, | ||
| 222 | - .flags = ADDR_TYPE_RT | ||
| 223 | - }, | ||
| 224 | - { } | ||
| 225 | -}; | ||
| 226 | - | ||
| 227 | /* l4_core -> timer3 */ | ||
| 228 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { | ||
| 229 | .master = &omap2420_l4_core_hwmod, | ||
| 230 | .slave = &omap2420_timer3_hwmod, | ||
| 231 | .clk = "gpt3_ick", | ||
| 232 | - .addr = omap2420_timer3_addrs, | ||
| 233 | + .addr = omap2xxx_timer3_addrs, | ||
| 234 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 235 | }; | ||
| 236 | |||
| 237 | @@ -514,21 +431,12 @@ static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { | ||
| 238 | { .irq = 40, }, | ||
| 239 | }; | ||
| 240 | |||
| 241 | -static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = { | ||
| 242 | - { | ||
| 243 | - .pa_start = 0x4807a000, | ||
| 244 | - .pa_end = 0x4807a000 + SZ_1K - 1, | ||
| 245 | - .flags = ADDR_TYPE_RT | ||
| 246 | - }, | ||
| 247 | - { } | ||
| 248 | -}; | ||
| 249 | - | ||
| 250 | /* l4_core -> timer4 */ | ||
| 251 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { | ||
| 252 | .master = &omap2420_l4_core_hwmod, | ||
| 253 | .slave = &omap2420_timer4_hwmod, | ||
| 254 | .clk = "gpt4_ick", | ||
| 255 | - .addr = omap2420_timer4_addrs, | ||
| 256 | + .addr = omap2xxx_timer4_addrs, | ||
| 257 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 258 | }; | ||
| 259 | |||
| 260 | @@ -564,21 +472,12 @@ static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { | ||
| 261 | { .irq = 41, }, | ||
| 262 | }; | ||
| 263 | |||
| 264 | -static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = { | ||
| 265 | - { | ||
| 266 | - .pa_start = 0x4807c000, | ||
| 267 | - .pa_end = 0x4807c000 + SZ_1K - 1, | ||
| 268 | - .flags = ADDR_TYPE_RT | ||
| 269 | - }, | ||
| 270 | - { } | ||
| 271 | -}; | ||
| 272 | - | ||
| 273 | /* l4_core -> timer5 */ | ||
| 274 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { | ||
| 275 | .master = &omap2420_l4_core_hwmod, | ||
| 276 | .slave = &omap2420_timer5_hwmod, | ||
| 277 | .clk = "gpt5_ick", | ||
| 278 | - .addr = omap2420_timer5_addrs, | ||
| 279 | + .addr = omap2xxx_timer5_addrs, | ||
| 280 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 281 | }; | ||
| 282 | |||
| 283 | @@ -615,21 +514,12 @@ static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { | ||
| 284 | { .irq = 42, }, | ||
| 285 | }; | ||
| 286 | |||
| 287 | -static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = { | ||
| 288 | - { | ||
| 289 | - .pa_start = 0x4807e000, | ||
| 290 | - .pa_end = 0x4807e000 + SZ_1K - 1, | ||
| 291 | - .flags = ADDR_TYPE_RT | ||
| 292 | - }, | ||
| 293 | - { } | ||
| 294 | -}; | ||
| 295 | - | ||
| 296 | /* l4_core -> timer6 */ | ||
| 297 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { | ||
| 298 | .master = &omap2420_l4_core_hwmod, | ||
| 299 | .slave = &omap2420_timer6_hwmod, | ||
| 300 | .clk = "gpt6_ick", | ||
| 301 | - .addr = omap2420_timer6_addrs, | ||
| 302 | + .addr = omap2xxx_timer6_addrs, | ||
| 303 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 304 | }; | ||
| 305 | |||
| 306 | @@ -665,21 +555,12 @@ static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { | ||
| 307 | { .irq = 43, }, | ||
| 308 | }; | ||
| 309 | |||
| 310 | -static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = { | ||
| 311 | - { | ||
| 312 | - .pa_start = 0x48080000, | ||
| 313 | - .pa_end = 0x48080000 + SZ_1K - 1, | ||
| 314 | - .flags = ADDR_TYPE_RT | ||
| 315 | - }, | ||
| 316 | - { } | ||
| 317 | -}; | ||
| 318 | - | ||
| 319 | /* l4_core -> timer7 */ | ||
| 320 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { | ||
| 321 | .master = &omap2420_l4_core_hwmod, | ||
| 322 | .slave = &omap2420_timer7_hwmod, | ||
| 323 | .clk = "gpt7_ick", | ||
| 324 | - .addr = omap2420_timer7_addrs, | ||
| 325 | + .addr = omap2xxx_timer7_addrs, | ||
| 326 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 327 | }; | ||
| 328 | |||
| 329 | @@ -715,21 +596,12 @@ static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { | ||
| 330 | { .irq = 44, }, | ||
| 331 | }; | ||
| 332 | |||
| 333 | -static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = { | ||
| 334 | - { | ||
| 335 | - .pa_start = 0x48082000, | ||
| 336 | - .pa_end = 0x48082000 + SZ_1K - 1, | ||
| 337 | - .flags = ADDR_TYPE_RT | ||
| 338 | - }, | ||
| 339 | - { } | ||
| 340 | -}; | ||
| 341 | - | ||
| 342 | /* l4_core -> timer8 */ | ||
| 343 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { | ||
| 344 | .master = &omap2420_l4_core_hwmod, | ||
| 345 | .slave = &omap2420_timer8_hwmod, | ||
| 346 | .clk = "gpt8_ick", | ||
| 347 | - .addr = omap2420_timer8_addrs, | ||
| 348 | + .addr = omap2xxx_timer8_addrs, | ||
| 349 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 350 | }; | ||
| 351 | |||
| 352 | @@ -765,21 +637,12 @@ static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { | ||
| 353 | { .irq = 45, }, | ||
| 354 | }; | ||
| 355 | |||
| 356 | -static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = { | ||
| 357 | - { | ||
| 358 | - .pa_start = 0x48084000, | ||
| 359 | - .pa_end = 0x48084000 + SZ_1K - 1, | ||
| 360 | - .flags = ADDR_TYPE_RT | ||
| 361 | - }, | ||
| 362 | - { } | ||
| 363 | -}; | ||
| 364 | - | ||
| 365 | /* l4_core -> timer9 */ | ||
| 366 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { | ||
| 367 | .master = &omap2420_l4_core_hwmod, | ||
| 368 | .slave = &omap2420_timer9_hwmod, | ||
| 369 | .clk = "gpt9_ick", | ||
| 370 | - .addr = omap2420_timer9_addrs, | ||
| 371 | + .addr = omap2xxx_timer9_addrs, | ||
| 372 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 373 | }; | ||
| 374 | |||
| 375 | @@ -815,21 +678,12 @@ static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { | ||
| 376 | { .irq = 46, }, | ||
| 377 | }; | ||
| 378 | |||
| 379 | -static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = { | ||
| 380 | - { | ||
| 381 | - .pa_start = 0x48086000, | ||
| 382 | - .pa_end = 0x48086000 + SZ_1K - 1, | ||
| 383 | - .flags = ADDR_TYPE_RT | ||
| 384 | - }, | ||
| 385 | - { } | ||
| 386 | -}; | ||
| 387 | - | ||
| 388 | /* l4_core -> timer10 */ | ||
| 389 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { | ||
| 390 | .master = &omap2420_l4_core_hwmod, | ||
| 391 | .slave = &omap2420_timer10_hwmod, | ||
| 392 | .clk = "gpt10_ick", | ||
| 393 | - .addr = omap2420_timer10_addrs, | ||
| 394 | + .addr = omap2_timer10_addrs, | ||
| 395 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 396 | }; | ||
| 397 | |||
| 398 | @@ -865,21 +719,12 @@ static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { | ||
| 399 | { .irq = 47, }, | ||
| 400 | }; | ||
| 401 | |||
| 402 | -static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = { | ||
| 403 | - { | ||
| 404 | - .pa_start = 0x48088000, | ||
| 405 | - .pa_end = 0x48088000 + SZ_1K - 1, | ||
| 406 | - .flags = ADDR_TYPE_RT | ||
| 407 | - }, | ||
| 408 | - { } | ||
| 409 | -}; | ||
| 410 | - | ||
| 411 | /* l4_core -> timer11 */ | ||
| 412 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { | ||
| 413 | .master = &omap2420_l4_core_hwmod, | ||
| 414 | .slave = &omap2420_timer11_hwmod, | ||
| 415 | .clk = "gpt11_ick", | ||
| 416 | - .addr = omap2420_timer11_addrs, | ||
| 417 | + .addr = omap2_timer11_addrs, | ||
| 418 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 419 | }; | ||
| 420 | |||
| 421 | @@ -915,21 +760,12 @@ static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { | ||
| 422 | { .irq = 48, }, | ||
| 423 | }; | ||
| 424 | |||
| 425 | -static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = { | ||
| 426 | - { | ||
| 427 | - .pa_start = 0x4808a000, | ||
| 428 | - .pa_end = 0x4808a000 + SZ_1K - 1, | ||
| 429 | - .flags = ADDR_TYPE_RT | ||
| 430 | - }, | ||
| 431 | - { } | ||
| 432 | -}; | ||
| 433 | - | ||
| 434 | /* l4_core -> timer12 */ | ||
| 435 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { | ||
| 436 | .master = &omap2420_l4_core_hwmod, | ||
| 437 | .slave = &omap2420_timer12_hwmod, | ||
| 438 | .clk = "gpt12_ick", | ||
| 439 | - .addr = omap2420_timer12_addrs, | ||
| 440 | + .addr = omap2xxx_timer12_addrs, | ||
| 441 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 442 | }; | ||
| 443 | |||
| 444 | @@ -1178,21 +1014,12 @@ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { | ||
| 445 | &omap2420_dss__l3, | ||
| 446 | }; | ||
| 447 | |||
| 448 | -static struct omap_hwmod_addr_space omap2420_dss_addrs[] = { | ||
| 449 | - { | ||
| 450 | - .pa_start = 0x48050000, | ||
| 451 | - .pa_end = 0x480503FF, | ||
| 452 | - .flags = ADDR_TYPE_RT | ||
| 453 | - }, | ||
| 454 | - { } | ||
| 455 | -}; | ||
| 456 | - | ||
| 457 | /* l4_core -> dss */ | ||
| 458 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { | ||
| 459 | .master = &omap2420_l4_core_hwmod, | ||
| 460 | .slave = &omap2420_dss_core_hwmod, | ||
| 461 | .clk = "dss_ick", | ||
| 462 | - .addr = omap2420_dss_addrs, | ||
| 463 | + .addr = omap2_dss_addrs, | ||
| 464 | .fw = { | ||
| 465 | .omap2 = { | ||
| 466 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, | ||
| 467 | @@ -1262,21 +1089,12 @@ static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { | ||
| 468 | { .irq = 25 }, | ||
| 469 | }; | ||
| 470 | |||
| 471 | -static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { | ||
| 472 | - { | ||
| 473 | - .pa_start = 0x48050400, | ||
| 474 | - .pa_end = 0x480507FF, | ||
| 475 | - .flags = ADDR_TYPE_RT | ||
| 476 | - }, | ||
| 477 | - { } | ||
| 478 | -}; | ||
| 479 | - | ||
| 480 | /* l4_core -> dss_dispc */ | ||
| 481 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { | ||
| 482 | .master = &omap2420_l4_core_hwmod, | ||
| 483 | .slave = &omap2420_dss_dispc_hwmod, | ||
| 484 | .clk = "dss_ick", | ||
| 485 | - .addr = omap2420_dss_dispc_addrs, | ||
| 486 | + .addr = omap2_dss_dispc_addrs, | ||
| 487 | .fw = { | ||
| 488 | .omap2 = { | ||
| 489 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, | ||
| 490 | @@ -1332,21 +1150,12 @@ static struct omap_hwmod_class omap2420_rfbi_hwmod_class = { | ||
| 491 | .sysc = &omap2420_rfbi_sysc, | ||
| 492 | }; | ||
| 493 | |||
| 494 | -static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = { | ||
| 495 | - { | ||
| 496 | - .pa_start = 0x48050800, | ||
| 497 | - .pa_end = 0x48050BFF, | ||
| 498 | - .flags = ADDR_TYPE_RT | ||
| 499 | - }, | ||
| 500 | - { } | ||
| 501 | -}; | ||
| 502 | - | ||
| 503 | /* l4_core -> dss_rfbi */ | ||
| 504 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { | ||
| 505 | .master = &omap2420_l4_core_hwmod, | ||
| 506 | .slave = &omap2420_dss_rfbi_hwmod, | ||
| 507 | .clk = "dss_ick", | ||
| 508 | - .addr = omap2420_dss_rfbi_addrs, | ||
| 509 | + .addr = omap2_dss_rfbi_addrs, | ||
| 510 | .fw = { | ||
| 511 | .omap2 = { | ||
| 512 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, | ||
| 513 | @@ -1387,22 +1196,12 @@ static struct omap_hwmod_class omap2420_venc_hwmod_class = { | ||
| 514 | .name = "venc", | ||
| 515 | }; | ||
| 516 | |||
| 517 | -/* dss_venc */ | ||
| 518 | -static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = { | ||
| 519 | - { | ||
| 520 | - .pa_start = 0x48050C00, | ||
| 521 | - .pa_end = 0x48050FFF, | ||
| 522 | - .flags = ADDR_TYPE_RT | ||
| 523 | - }, | ||
| 524 | - { } | ||
| 525 | -}; | ||
| 526 | - | ||
| 527 | /* l4_core -> dss_venc */ | ||
| 528 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { | ||
| 529 | .master = &omap2420_l4_core_hwmod, | ||
| 530 | .slave = &omap2420_dss_venc_hwmod, | ||
| 531 | .clk = "dss_54m_fck", | ||
| 532 | - .addr = omap2420_dss_venc_addrs, | ||
| 533 | + .addr = omap2_dss_venc_addrs, | ||
| 534 | .fw = { | ||
| 535 | .omap2 = { | ||
| 536 | .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, | ||
| 537 | @@ -1783,15 +1582,6 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { | ||
| 538 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
| 539 | }; | ||
| 540 | |||
| 541 | -static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { | ||
| 542 | - { | ||
| 543 | - .pa_start = 0x48056000, | ||
| 544 | - .pa_end = 0x48056fff, | ||
| 545 | - .flags = ADDR_TYPE_RT | ||
| 546 | - }, | ||
| 547 | - { } | ||
| 548 | -}; | ||
| 549 | - | ||
| 550 | /* dma_system -> L3 */ | ||
| 551 | static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { | ||
| 552 | .master = &omap2420_dma_system_hwmod, | ||
| 553 | @@ -1810,7 +1600,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { | ||
| 554 | .master = &omap2420_l4_core_hwmod, | ||
| 555 | .slave = &omap2420_dma_system_hwmod, | ||
| 556 | .clk = "sdma_ick", | ||
| 557 | - .addr = omap2420_dma_system_addrs, | ||
| 558 | + .addr = omap2_dma_system_addrs, | ||
| 559 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 560 | }; | ||
| 561 | |||
| 562 | @@ -1862,20 +1652,11 @@ static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { | ||
| 563 | { .name = "iva", .irq = 34 }, | ||
| 564 | }; | ||
| 565 | |||
| 566 | -static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = { | ||
| 567 | - { | ||
| 568 | - .pa_start = 0x48094000, | ||
| 569 | - .pa_end = 0x480941ff, | ||
| 570 | - .flags = ADDR_TYPE_RT, | ||
| 571 | - }, | ||
| 572 | - { } | ||
| 573 | -}; | ||
| 574 | - | ||
| 575 | /* l4_core -> mailbox */ | ||
| 576 | static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { | ||
| 577 | .master = &omap2420_l4_core_hwmod, | ||
| 578 | .slave = &omap2420_mailbox_hwmod, | ||
| 579 | - .addr = omap2420_mailbox_addrs, | ||
| 580 | + .addr = omap2_mailbox_addrs, | ||
| 581 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 582 | }; | ||
| 583 | |||
| 584 | @@ -2037,22 +1818,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { | ||
| 585 | { .name = "tx", .dma_req = 31 }, | ||
| 586 | }; | ||
| 587 | |||
| 588 | -static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { | ||
| 589 | - { | ||
| 590 | - .name = "mpu", | ||
| 591 | - .pa_start = 0x48074000, | ||
| 592 | - .pa_end = 0x480740ff, | ||
| 593 | - .flags = ADDR_TYPE_RT | ||
| 594 | - }, | ||
| 595 | - { } | ||
| 596 | -}; | ||
| 597 | - | ||
| 598 | /* l4_core -> mcbsp1 */ | ||
| 599 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { | ||
| 600 | .master = &omap2420_l4_core_hwmod, | ||
| 601 | .slave = &omap2420_mcbsp1_hwmod, | ||
| 602 | .clk = "mcbsp1_ick", | ||
| 603 | - .addr = omap2420_mcbsp1_addrs, | ||
| 604 | + .addr = omap2_mcbsp1_addrs, | ||
| 605 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 606 | }; | ||
| 607 | |||
| 608 | @@ -2094,22 +1865,12 @@ static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { | ||
| 609 | { .name = "tx", .dma_req = 33 }, | ||
| 610 | }; | ||
| 611 | |||
| 612 | -static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { | ||
| 613 | - { | ||
| 614 | - .name = "mpu", | ||
| 615 | - .pa_start = 0x48076000, | ||
| 616 | - .pa_end = 0x480760ff, | ||
| 617 | - .flags = ADDR_TYPE_RT | ||
| 618 | - }, | ||
| 619 | - { } | ||
| 620 | -}; | ||
| 621 | - | ||
| 622 | /* l4_core -> mcbsp2 */ | ||
| 623 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { | ||
| 624 | .master = &omap2420_l4_core_hwmod, | ||
| 625 | .slave = &omap2420_mcbsp2_hwmod, | ||
| 626 | .clk = "mcbsp2_ick", | ||
| 627 | - .addr = omap2420_mcbsp2_addrs, | ||
| 628 | + .addr = omap2xxx_mcbsp2_addrs, | ||
| 629 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 630 | }; | ||
| 631 | |||
| 632 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 633 | index da28794..9531ef2 100644 | ||
| 634 | --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 635 | +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 636 | @@ -131,42 +131,21 @@ static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = { | ||
| 637 | .user = OCP_USER_MPU, | ||
| 638 | }; | ||
| 639 | |||
| 640 | -/* I2C IP block address space length (in bytes) */ | ||
| 641 | -#define OMAP2_I2C_AS_LEN 128 | ||
| 642 | - | ||
| 643 | /* L4 CORE -> I2C1 interface */ | ||
| 644 | -static struct omap_hwmod_addr_space omap2430_i2c1_addr_space[] = { | ||
| 645 | - { | ||
| 646 | - .pa_start = 0x48070000, | ||
| 647 | - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, | ||
| 648 | - .flags = ADDR_TYPE_RT, | ||
| 649 | - }, | ||
| 650 | - { } | ||
| 651 | -}; | ||
| 652 | - | ||
| 653 | static struct omap_hwmod_ocp_if omap2430_l4_core__i2c1 = { | ||
| 654 | .master = &omap2430_l4_core_hwmod, | ||
| 655 | .slave = &omap2430_i2c1_hwmod, | ||
| 656 | .clk = "i2c1_ick", | ||
| 657 | - .addr = omap2430_i2c1_addr_space, | ||
| 658 | + .addr = omap2_i2c1_addr_space, | ||
| 659 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 660 | }; | ||
| 661 | |||
| 662 | /* L4 CORE -> I2C2 interface */ | ||
| 663 | -static struct omap_hwmod_addr_space omap2430_i2c2_addr_space[] = { | ||
| 664 | - { | ||
| 665 | - .pa_start = 0x48072000, | ||
| 666 | - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, | ||
| 667 | - .flags = ADDR_TYPE_RT, | ||
| 668 | - }, | ||
| 669 | - { } | ||
| 670 | -}; | ||
| 671 | - | ||
| 672 | static struct omap_hwmod_ocp_if omap2430_l4_core__i2c2 = { | ||
| 673 | .master = &omap2430_l4_core_hwmod, | ||
| 674 | .slave = &omap2430_i2c2_hwmod, | ||
| 675 | .clk = "i2c2_ick", | ||
| 676 | - .addr = omap2430_i2c2_addr_space, | ||
| 677 | + .addr = omap2_i2c2_addr_space, | ||
| 678 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 679 | }; | ||
| 680 | |||
| 681 | @@ -178,56 +157,29 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__l4_wkup = { | ||
| 682 | }; | ||
| 683 | |||
| 684 | /* L4 CORE -> UART1 interface */ | ||
| 685 | -static struct omap_hwmod_addr_space omap2430_uart1_addr_space[] = { | ||
| 686 | - { | ||
| 687 | - .pa_start = OMAP2_UART1_BASE, | ||
| 688 | - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, | ||
| 689 | - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 690 | - }, | ||
| 691 | - { } | ||
| 692 | -}; | ||
| 693 | - | ||
| 694 | static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { | ||
| 695 | .master = &omap2430_l4_core_hwmod, | ||
| 696 | .slave = &omap2430_uart1_hwmod, | ||
| 697 | .clk = "uart1_ick", | ||
| 698 | - .addr = omap2430_uart1_addr_space, | ||
| 699 | + .addr = omap2xxx_uart1_addr_space, | ||
| 700 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 701 | }; | ||
| 702 | |||
| 703 | /* L4 CORE -> UART2 interface */ | ||
| 704 | -static struct omap_hwmod_addr_space omap2430_uart2_addr_space[] = { | ||
| 705 | - { | ||
| 706 | - .pa_start = OMAP2_UART2_BASE, | ||
| 707 | - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, | ||
| 708 | - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 709 | - }, | ||
| 710 | - { } | ||
| 711 | -}; | ||
| 712 | - | ||
| 713 | static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { | ||
| 714 | .master = &omap2430_l4_core_hwmod, | ||
| 715 | .slave = &omap2430_uart2_hwmod, | ||
| 716 | .clk = "uart2_ick", | ||
| 717 | - .addr = omap2430_uart2_addr_space, | ||
| 718 | + .addr = omap2xxx_uart2_addr_space, | ||
| 719 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 720 | }; | ||
| 721 | |||
| 722 | /* L4 PER -> UART3 interface */ | ||
| 723 | -static struct omap_hwmod_addr_space omap2430_uart3_addr_space[] = { | ||
| 724 | - { | ||
| 725 | - .pa_start = OMAP2_UART3_BASE, | ||
| 726 | - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, | ||
| 727 | - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 728 | - }, | ||
| 729 | - { } | ||
| 730 | -}; | ||
| 731 | - | ||
| 732 | static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { | ||
| 733 | .master = &omap2430_l4_core_hwmod, | ||
| 734 | .slave = &omap2430_uart3_hwmod, | ||
| 735 | .clk = "uart3_ick", | ||
| 736 | - .addr = omap2430_uart3_addr_space, | ||
| 737 | + .addr = omap2xxx_uart3_addr_space, | ||
| 738 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 739 | }; | ||
| 740 | |||
| 741 | @@ -260,15 +212,6 @@ static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = { | ||
| 742 | }; | ||
| 743 | |||
| 744 | /* L4 CORE -> MMC1 interface */ | ||
| 745 | -static struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { | ||
| 746 | - { | ||
| 747 | - .pa_start = 0x4809c000, | ||
| 748 | - .pa_end = 0x4809c1ff, | ||
| 749 | - .flags = ADDR_TYPE_RT, | ||
| 750 | - }, | ||
| 751 | - { } | ||
| 752 | -}; | ||
| 753 | - | ||
| 754 | static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { | ||
| 755 | .master = &omap2430_l4_core_hwmod, | ||
| 756 | .slave = &omap2430_mmc1_hwmod, | ||
| 757 | @@ -278,15 +221,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mmc1 = { | ||
| 758 | }; | ||
| 759 | |||
| 760 | /* L4 CORE -> MMC2 interface */ | ||
| 761 | -static struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { | ||
| 762 | - { | ||
| 763 | - .pa_start = 0x480b4000, | ||
| 764 | - .pa_end = 0x480b41ff, | ||
| 765 | - .flags = ADDR_TYPE_RT, | ||
| 766 | - }, | ||
| 767 | - { } | ||
| 768 | -}; | ||
| 769 | - | ||
| 770 | static struct omap_hwmod_ocp_if omap2430_l4_core__mmc2 = { | ||
| 771 | .master = &omap2430_l4_core_hwmod, | ||
| 772 | .slave = &omap2430_mmc2_hwmod, | ||
| 773 | @@ -332,51 +266,24 @@ static struct omap_hwmod_ocp_if *omap2430_l4_wkup_masters[] = { | ||
| 774 | }; | ||
| 775 | |||
| 776 | /* l4 core -> mcspi1 interface */ | ||
| 777 | -static struct omap_hwmod_addr_space omap2430_mcspi1_addr_space[] = { | ||
| 778 | - { | ||
| 779 | - .pa_start = 0x48098000, | ||
| 780 | - .pa_end = 0x480980ff, | ||
| 781 | - .flags = ADDR_TYPE_RT, | ||
| 782 | - }, | ||
| 783 | - { } | ||
| 784 | -}; | ||
| 785 | - | ||
| 786 | static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi1 = { | ||
| 787 | .master = &omap2430_l4_core_hwmod, | ||
| 788 | .slave = &omap2430_mcspi1_hwmod, | ||
| 789 | .clk = "mcspi1_ick", | ||
| 790 | - .addr = omap2430_mcspi1_addr_space, | ||
| 791 | + .addr = omap2_mcspi1_addr_space, | ||
| 792 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 793 | }; | ||
| 794 | |||
| 795 | /* l4 core -> mcspi2 interface */ | ||
| 796 | -static struct omap_hwmod_addr_space omap2430_mcspi2_addr_space[] = { | ||
| 797 | - { | ||
| 798 | - .pa_start = 0x4809a000, | ||
| 799 | - .pa_end = 0x4809a0ff, | ||
| 800 | - .flags = ADDR_TYPE_RT, | ||
| 801 | - }, | ||
| 802 | - { } | ||
| 803 | -}; | ||
| 804 | - | ||
| 805 | static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi2 = { | ||
| 806 | .master = &omap2430_l4_core_hwmod, | ||
| 807 | .slave = &omap2430_mcspi2_hwmod, | ||
| 808 | .clk = "mcspi2_ick", | ||
| 809 | - .addr = omap2430_mcspi2_addr_space, | ||
| 810 | + .addr = omap2_mcspi2_addr_space, | ||
| 811 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 812 | }; | ||
| 813 | |||
| 814 | /* l4 core -> mcspi3 interface */ | ||
| 815 | -static struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { | ||
| 816 | - { | ||
| 817 | - .pa_start = 0x480b8000, | ||
| 818 | - .pa_end = 0x480b80ff, | ||
| 819 | - .flags = ADDR_TYPE_RT, | ||
| 820 | - }, | ||
| 821 | - { } | ||
| 822 | -}; | ||
| 823 | - | ||
| 824 | static struct omap_hwmod_ocp_if omap2430_l4_core__mcspi3 = { | ||
| 825 | .master = &omap2430_l4_core_hwmod, | ||
| 826 | .slave = &omap2430_mcspi3_hwmod, | ||
| 827 | @@ -514,21 +421,12 @@ static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { | ||
| 828 | { .irq = 38, }, | ||
| 829 | }; | ||
| 830 | |||
| 831 | -static struct omap_hwmod_addr_space omap2430_timer2_addrs[] = { | ||
| 832 | - { | ||
| 833 | - .pa_start = 0x4802a000, | ||
| 834 | - .pa_end = 0x4802a000 + SZ_1K - 1, | ||
| 835 | - .flags = ADDR_TYPE_RT | ||
| 836 | - }, | ||
| 837 | - { } | ||
| 838 | -}; | ||
| 839 | - | ||
| 840 | /* l4_core -> timer2 */ | ||
| 841 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { | ||
| 842 | .master = &omap2430_l4_core_hwmod, | ||
| 843 | .slave = &omap2430_timer2_hwmod, | ||
| 844 | .clk = "gpt2_ick", | ||
| 845 | - .addr = omap2430_timer2_addrs, | ||
| 846 | + .addr = omap2xxx_timer2_addrs, | ||
| 847 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 848 | }; | ||
| 849 | |||
| 850 | @@ -564,21 +462,12 @@ static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { | ||
| 851 | { .irq = 39, }, | ||
| 852 | }; | ||
| 853 | |||
| 854 | -static struct omap_hwmod_addr_space omap2430_timer3_addrs[] = { | ||
| 855 | - { | ||
| 856 | - .pa_start = 0x48078000, | ||
| 857 | - .pa_end = 0x48078000 + SZ_1K - 1, | ||
| 858 | - .flags = ADDR_TYPE_RT | ||
| 859 | - }, | ||
| 860 | - { } | ||
| 861 | -}; | ||
| 862 | - | ||
| 863 | /* l4_core -> timer3 */ | ||
| 864 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { | ||
| 865 | .master = &omap2430_l4_core_hwmod, | ||
| 866 | .slave = &omap2430_timer3_hwmod, | ||
| 867 | .clk = "gpt3_ick", | ||
| 868 | - .addr = omap2430_timer3_addrs, | ||
| 869 | + .addr = omap2xxx_timer3_addrs, | ||
| 870 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 871 | }; | ||
| 872 | |||
| 873 | @@ -614,21 +503,12 @@ static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { | ||
| 874 | { .irq = 40, }, | ||
| 875 | }; | ||
| 876 | |||
| 877 | -static struct omap_hwmod_addr_space omap2430_timer4_addrs[] = { | ||
| 878 | - { | ||
| 879 | - .pa_start = 0x4807a000, | ||
| 880 | - .pa_end = 0x4807a000 + SZ_1K - 1, | ||
| 881 | - .flags = ADDR_TYPE_RT | ||
| 882 | - }, | ||
| 883 | - { } | ||
| 884 | -}; | ||
| 885 | - | ||
| 886 | /* l4_core -> timer4 */ | ||
| 887 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { | ||
| 888 | .master = &omap2430_l4_core_hwmod, | ||
| 889 | .slave = &omap2430_timer4_hwmod, | ||
| 890 | .clk = "gpt4_ick", | ||
| 891 | - .addr = omap2430_timer4_addrs, | ||
| 892 | + .addr = omap2xxx_timer4_addrs, | ||
| 893 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 894 | }; | ||
| 895 | |||
| 896 | @@ -664,21 +544,12 @@ static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { | ||
| 897 | { .irq = 41, }, | ||
| 898 | }; | ||
| 899 | |||
| 900 | -static struct omap_hwmod_addr_space omap2430_timer5_addrs[] = { | ||
| 901 | - { | ||
| 902 | - .pa_start = 0x4807c000, | ||
| 903 | - .pa_end = 0x4807c000 + SZ_1K - 1, | ||
| 904 | - .flags = ADDR_TYPE_RT | ||
| 905 | - }, | ||
| 906 | - { } | ||
| 907 | -}; | ||
| 908 | - | ||
| 909 | /* l4_core -> timer5 */ | ||
| 910 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { | ||
| 911 | .master = &omap2430_l4_core_hwmod, | ||
| 912 | .slave = &omap2430_timer5_hwmod, | ||
| 913 | .clk = "gpt5_ick", | ||
| 914 | - .addr = omap2430_timer5_addrs, | ||
| 915 | + .addr = omap2xxx_timer5_addrs, | ||
| 916 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 917 | }; | ||
| 918 | |||
| 919 | @@ -714,21 +585,12 @@ static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { | ||
| 920 | { .irq = 42, }, | ||
| 921 | }; | ||
| 922 | |||
| 923 | -static struct omap_hwmod_addr_space omap2430_timer6_addrs[] = { | ||
| 924 | - { | ||
| 925 | - .pa_start = 0x4807e000, | ||
| 926 | - .pa_end = 0x4807e000 + SZ_1K - 1, | ||
| 927 | - .flags = ADDR_TYPE_RT | ||
| 928 | - }, | ||
| 929 | - { } | ||
| 930 | -}; | ||
| 931 | - | ||
| 932 | /* l4_core -> timer6 */ | ||
| 933 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { | ||
| 934 | .master = &omap2430_l4_core_hwmod, | ||
| 935 | .slave = &omap2430_timer6_hwmod, | ||
| 936 | .clk = "gpt6_ick", | ||
| 937 | - .addr = omap2430_timer6_addrs, | ||
| 938 | + .addr = omap2xxx_timer6_addrs, | ||
| 939 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 940 | }; | ||
| 941 | |||
| 942 | @@ -764,21 +626,12 @@ static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { | ||
| 943 | { .irq = 43, }, | ||
| 944 | }; | ||
| 945 | |||
| 946 | -static struct omap_hwmod_addr_space omap2430_timer7_addrs[] = { | ||
| 947 | - { | ||
| 948 | - .pa_start = 0x48080000, | ||
| 949 | - .pa_end = 0x48080000 + SZ_1K - 1, | ||
| 950 | - .flags = ADDR_TYPE_RT | ||
| 951 | - }, | ||
| 952 | - { } | ||
| 953 | -}; | ||
| 954 | - | ||
| 955 | /* l4_core -> timer7 */ | ||
| 956 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { | ||
| 957 | .master = &omap2430_l4_core_hwmod, | ||
| 958 | .slave = &omap2430_timer7_hwmod, | ||
| 959 | .clk = "gpt7_ick", | ||
| 960 | - .addr = omap2430_timer7_addrs, | ||
| 961 | + .addr = omap2xxx_timer7_addrs, | ||
| 962 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 963 | }; | ||
| 964 | |||
| 965 | @@ -814,21 +667,12 @@ static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { | ||
| 966 | { .irq = 44, }, | ||
| 967 | }; | ||
| 968 | |||
| 969 | -static struct omap_hwmod_addr_space omap2430_timer8_addrs[] = { | ||
| 970 | - { | ||
| 971 | - .pa_start = 0x48082000, | ||
| 972 | - .pa_end = 0x48082000 + SZ_1K - 1, | ||
| 973 | - .flags = ADDR_TYPE_RT | ||
| 974 | - }, | ||
| 975 | - { } | ||
| 976 | -}; | ||
| 977 | - | ||
| 978 | /* l4_core -> timer8 */ | ||
| 979 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { | ||
| 980 | .master = &omap2430_l4_core_hwmod, | ||
| 981 | .slave = &omap2430_timer8_hwmod, | ||
| 982 | .clk = "gpt8_ick", | ||
| 983 | - .addr = omap2430_timer8_addrs, | ||
| 984 | + .addr = omap2xxx_timer8_addrs, | ||
| 985 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 986 | }; | ||
| 987 | |||
| 988 | @@ -864,21 +708,12 @@ static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { | ||
| 989 | { .irq = 45, }, | ||
| 990 | }; | ||
| 991 | |||
| 992 | -static struct omap_hwmod_addr_space omap2430_timer9_addrs[] = { | ||
| 993 | - { | ||
| 994 | - .pa_start = 0x48084000, | ||
| 995 | - .pa_end = 0x48084000 + SZ_1K - 1, | ||
| 996 | - .flags = ADDR_TYPE_RT | ||
| 997 | - }, | ||
| 998 | - { } | ||
| 999 | -}; | ||
| 1000 | - | ||
| 1001 | /* l4_core -> timer9 */ | ||
| 1002 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { | ||
| 1003 | .master = &omap2430_l4_core_hwmod, | ||
| 1004 | .slave = &omap2430_timer9_hwmod, | ||
| 1005 | .clk = "gpt9_ick", | ||
| 1006 | - .addr = omap2430_timer9_addrs, | ||
| 1007 | + .addr = omap2xxx_timer9_addrs, | ||
| 1008 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1009 | }; | ||
| 1010 | |||
| 1011 | @@ -914,21 +749,12 @@ static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { | ||
| 1012 | { .irq = 46, }, | ||
| 1013 | }; | ||
| 1014 | |||
| 1015 | -static struct omap_hwmod_addr_space omap2430_timer10_addrs[] = { | ||
| 1016 | - { | ||
| 1017 | - .pa_start = 0x48086000, | ||
| 1018 | - .pa_end = 0x48086000 + SZ_1K - 1, | ||
| 1019 | - .flags = ADDR_TYPE_RT | ||
| 1020 | - }, | ||
| 1021 | - { } | ||
| 1022 | -}; | ||
| 1023 | - | ||
| 1024 | /* l4_core -> timer10 */ | ||
| 1025 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { | ||
| 1026 | .master = &omap2430_l4_core_hwmod, | ||
| 1027 | .slave = &omap2430_timer10_hwmod, | ||
| 1028 | .clk = "gpt10_ick", | ||
| 1029 | - .addr = omap2430_timer10_addrs, | ||
| 1030 | + .addr = omap2_timer10_addrs, | ||
| 1031 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1032 | }; | ||
| 1033 | |||
| 1034 | @@ -964,21 +790,12 @@ static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { | ||
| 1035 | { .irq = 47, }, | ||
| 1036 | }; | ||
| 1037 | |||
| 1038 | -static struct omap_hwmod_addr_space omap2430_timer11_addrs[] = { | ||
| 1039 | - { | ||
| 1040 | - .pa_start = 0x48088000, | ||
| 1041 | - .pa_end = 0x48088000 + SZ_1K - 1, | ||
| 1042 | - .flags = ADDR_TYPE_RT | ||
| 1043 | - }, | ||
| 1044 | - { } | ||
| 1045 | -}; | ||
| 1046 | - | ||
| 1047 | /* l4_core -> timer11 */ | ||
| 1048 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { | ||
| 1049 | .master = &omap2430_l4_core_hwmod, | ||
| 1050 | .slave = &omap2430_timer11_hwmod, | ||
| 1051 | .clk = "gpt11_ick", | ||
| 1052 | - .addr = omap2430_timer11_addrs, | ||
| 1053 | + .addr = omap2_timer11_addrs, | ||
| 1054 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1055 | }; | ||
| 1056 | |||
| 1057 | @@ -1014,21 +831,12 @@ static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { | ||
| 1058 | { .irq = 48, }, | ||
| 1059 | }; | ||
| 1060 | |||
| 1061 | -static struct omap_hwmod_addr_space omap2430_timer12_addrs[] = { | ||
| 1062 | - { | ||
| 1063 | - .pa_start = 0x4808a000, | ||
| 1064 | - .pa_end = 0x4808a000 + SZ_1K - 1, | ||
| 1065 | - .flags = ADDR_TYPE_RT | ||
| 1066 | - }, | ||
| 1067 | - { } | ||
| 1068 | -}; | ||
| 1069 | - | ||
| 1070 | /* l4_core -> timer12 */ | ||
| 1071 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { | ||
| 1072 | .master = &omap2430_l4_core_hwmod, | ||
| 1073 | .slave = &omap2430_timer12_hwmod, | ||
| 1074 | .clk = "gpt12_ick", | ||
| 1075 | - .addr = omap2430_timer12_addrs, | ||
| 1076 | + .addr = omap2xxx_timer12_addrs, | ||
| 1077 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1078 | }; | ||
| 1079 | |||
| 1080 | @@ -1277,21 +1085,12 @@ static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { | ||
| 1081 | &omap2430_dss__l3, | ||
| 1082 | }; | ||
| 1083 | |||
| 1084 | -static struct omap_hwmod_addr_space omap2430_dss_addrs[] = { | ||
| 1085 | - { | ||
| 1086 | - .pa_start = 0x48050000, | ||
| 1087 | - .pa_end = 0x480503FF, | ||
| 1088 | - .flags = ADDR_TYPE_RT | ||
| 1089 | - }, | ||
| 1090 | - { } | ||
| 1091 | -}; | ||
| 1092 | - | ||
| 1093 | /* l4_core -> dss */ | ||
| 1094 | static struct omap_hwmod_ocp_if omap2430_l4_core__dss = { | ||
| 1095 | .master = &omap2430_l4_core_hwmod, | ||
| 1096 | .slave = &omap2430_dss_core_hwmod, | ||
| 1097 | .clk = "dss_ick", | ||
| 1098 | - .addr = omap2430_dss_addrs, | ||
| 1099 | + .addr = omap2_dss_addrs, | ||
| 1100 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1101 | }; | ||
| 1102 | |||
| 1103 | @@ -1355,21 +1154,12 @@ static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { | ||
| 1104 | { .irq = 25 }, | ||
| 1105 | }; | ||
| 1106 | |||
| 1107 | -static struct omap_hwmod_addr_space omap2430_dss_dispc_addrs[] = { | ||
| 1108 | - { | ||
| 1109 | - .pa_start = 0x48050400, | ||
| 1110 | - .pa_end = 0x480507FF, | ||
| 1111 | - .flags = ADDR_TYPE_RT | ||
| 1112 | - }, | ||
| 1113 | - { } | ||
| 1114 | -}; | ||
| 1115 | - | ||
| 1116 | /* l4_core -> dss_dispc */ | ||
| 1117 | static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { | ||
| 1118 | .master = &omap2430_l4_core_hwmod, | ||
| 1119 | .slave = &omap2430_dss_dispc_hwmod, | ||
| 1120 | .clk = "dss_ick", | ||
| 1121 | - .addr = omap2430_dss_dispc_addrs, | ||
| 1122 | + .addr = omap2_dss_dispc_addrs, | ||
| 1123 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1124 | }; | ||
| 1125 | |||
| 1126 | @@ -1419,21 +1209,12 @@ static struct omap_hwmod_class omap2430_rfbi_hwmod_class = { | ||
| 1127 | .sysc = &omap2430_rfbi_sysc, | ||
| 1128 | }; | ||
| 1129 | |||
| 1130 | -static struct omap_hwmod_addr_space omap2430_dss_rfbi_addrs[] = { | ||
| 1131 | - { | ||
| 1132 | - .pa_start = 0x48050800, | ||
| 1133 | - .pa_end = 0x48050BFF, | ||
| 1134 | - .flags = ADDR_TYPE_RT | ||
| 1135 | - }, | ||
| 1136 | - { } | ||
| 1137 | -}; | ||
| 1138 | - | ||
| 1139 | /* l4_core -> dss_rfbi */ | ||
| 1140 | static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { | ||
| 1141 | .master = &omap2430_l4_core_hwmod, | ||
| 1142 | .slave = &omap2430_dss_rfbi_hwmod, | ||
| 1143 | .clk = "dss_ick", | ||
| 1144 | - .addr = omap2430_dss_rfbi_addrs, | ||
| 1145 | + .addr = omap2_dss_rfbi_addrs, | ||
| 1146 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1147 | }; | ||
| 1148 | |||
| 1149 | @@ -1468,22 +1249,12 @@ static struct omap_hwmod_class omap2430_venc_hwmod_class = { | ||
| 1150 | .name = "venc", | ||
| 1151 | }; | ||
| 1152 | |||
| 1153 | -/* dss_venc */ | ||
| 1154 | -static struct omap_hwmod_addr_space omap2430_dss_venc_addrs[] = { | ||
| 1155 | - { | ||
| 1156 | - .pa_start = 0x48050C00, | ||
| 1157 | - .pa_end = 0x48050FFF, | ||
| 1158 | - .flags = ADDR_TYPE_RT | ||
| 1159 | - }, | ||
| 1160 | - { } | ||
| 1161 | -}; | ||
| 1162 | - | ||
| 1163 | /* l4_core -> dss_venc */ | ||
| 1164 | static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { | ||
| 1165 | .master = &omap2430_l4_core_hwmod, | ||
| 1166 | .slave = &omap2430_dss_venc_hwmod, | ||
| 1167 | .clk = "dss_54m_fck", | ||
| 1168 | - .addr = omap2430_dss_venc_addrs, | ||
| 1169 | + .addr = omap2_dss_venc_addrs, | ||
| 1170 | .flags = OCPIF_SWSUP_IDLE, | ||
| 1171 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1172 | }; | ||
| 1173 | @@ -1916,15 +1687,6 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { | ||
| 1174 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
| 1175 | }; | ||
| 1176 | |||
| 1177 | -static struct omap_hwmod_addr_space omap2430_dma_system_addrs[] = { | ||
| 1178 | - { | ||
| 1179 | - .pa_start = 0x48056000, | ||
| 1180 | - .pa_end = 0x48056fff, | ||
| 1181 | - .flags = ADDR_TYPE_RT | ||
| 1182 | - }, | ||
| 1183 | - { } | ||
| 1184 | -}; | ||
| 1185 | - | ||
| 1186 | /* dma_system -> L3 */ | ||
| 1187 | static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { | ||
| 1188 | .master = &omap2430_dma_system_hwmod, | ||
| 1189 | @@ -1943,7 +1705,7 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__dma_system = { | ||
| 1190 | .master = &omap2430_l4_core_hwmod, | ||
| 1191 | .slave = &omap2430_dma_system_hwmod, | ||
| 1192 | .clk = "sdma_ick", | ||
| 1193 | - .addr = omap2430_dma_system_addrs, | ||
| 1194 | + .addr = omap2_dma_system_addrs, | ||
| 1195 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1196 | }; | ||
| 1197 | |||
| 1198 | @@ -1994,20 +1756,11 @@ static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { | ||
| 1199 | { .irq = 26 }, | ||
| 1200 | }; | ||
| 1201 | |||
| 1202 | -static struct omap_hwmod_addr_space omap2430_mailbox_addrs[] = { | ||
| 1203 | - { | ||
| 1204 | - .pa_start = 0x48094000, | ||
| 1205 | - .pa_end = 0x480941ff, | ||
| 1206 | - .flags = ADDR_TYPE_RT, | ||
| 1207 | - }, | ||
| 1208 | - { } | ||
| 1209 | -}; | ||
| 1210 | - | ||
| 1211 | /* l4_core -> mailbox */ | ||
| 1212 | static struct omap_hwmod_ocp_if omap2430_l4_core__mailbox = { | ||
| 1213 | .master = &omap2430_l4_core_hwmod, | ||
| 1214 | .slave = &omap2430_mailbox_hwmod, | ||
| 1215 | - .addr = omap2430_mailbox_addrs, | ||
| 1216 | + .addr = omap2_mailbox_addrs, | ||
| 1217 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1218 | }; | ||
| 1219 | |||
| 1220 | @@ -2279,22 +2032,12 @@ static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { | ||
| 1221 | { .name = "tx", .dma_req = 31 }, | ||
| 1222 | }; | ||
| 1223 | |||
| 1224 | -static struct omap_hwmod_addr_space omap2430_mcbsp1_addrs[] = { | ||
| 1225 | - { | ||
| 1226 | - .name = "mpu", | ||
| 1227 | - .pa_start = 0x48074000, | ||
| 1228 | - .pa_end = 0x480740ff, | ||
| 1229 | - .flags = ADDR_TYPE_RT | ||
| 1230 | - }, | ||
| 1231 | - { } | ||
| 1232 | -}; | ||
| 1233 | - | ||
| 1234 | /* l4_core -> mcbsp1 */ | ||
| 1235 | static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { | ||
| 1236 | .master = &omap2430_l4_core_hwmod, | ||
| 1237 | .slave = &omap2430_mcbsp1_hwmod, | ||
| 1238 | .clk = "mcbsp1_ick", | ||
| 1239 | - .addr = omap2430_mcbsp1_addrs, | ||
| 1240 | + .addr = omap2_mcbsp1_addrs, | ||
| 1241 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1242 | }; | ||
| 1243 | |||
| 1244 | @@ -2337,22 +2080,12 @@ static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { | ||
| 1245 | { .name = "tx", .dma_req = 33 }, | ||
| 1246 | }; | ||
| 1247 | |||
| 1248 | -static struct omap_hwmod_addr_space omap2430_mcbsp2_addrs[] = { | ||
| 1249 | - { | ||
| 1250 | - .name = "mpu", | ||
| 1251 | - .pa_start = 0x48076000, | ||
| 1252 | - .pa_end = 0x480760ff, | ||
| 1253 | - .flags = ADDR_TYPE_RT | ||
| 1254 | - }, | ||
| 1255 | - { } | ||
| 1256 | -}; | ||
| 1257 | - | ||
| 1258 | /* l4_core -> mcbsp2 */ | ||
| 1259 | static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { | ||
| 1260 | .master = &omap2430_l4_core_hwmod, | ||
| 1261 | .slave = &omap2430_mcbsp2_hwmod, | ||
| 1262 | .clk = "mcbsp2_ick", | ||
| 1263 | - .addr = omap2430_mcbsp2_addrs, | ||
| 1264 | + .addr = omap2xxx_mcbsp2_addrs, | ||
| 1265 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1266 | }; | ||
| 1267 | |||
| 1268 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c | ||
| 1269 | new file mode 100644 | ||
| 1270 | index 0000000..04637fa | ||
| 1271 | --- /dev/null | ||
| 1272 | +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_interconnect_data.c | ||
| 1273 | @@ -0,0 +1,173 @@ | ||
| 1274 | +/* | ||
| 1275 | + * omap_hwmod_2xxx_3xxx_interconnect_data.c - common interconnect data, OMAP2/3 | ||
| 1276 | + * | ||
| 1277 | + * Copyright (C) 2009-2011 Nokia Corporation | ||
| 1278 | + * Paul Walmsley | ||
| 1279 | + * | ||
| 1280 | + * This program is free software; you can redistribute it and/or modify | ||
| 1281 | + * it under the terms of the GNU General Public License version 2 as | ||
| 1282 | + * published by the Free Software Foundation. | ||
| 1283 | + * | ||
| 1284 | + * XXX handle crossbar/shared link difference for L3? | ||
| 1285 | + * XXX these should be marked initdata for multi-OMAP kernels | ||
| 1286 | + */ | ||
| 1287 | +#include <asm/sizes.h> | ||
| 1288 | + | ||
| 1289 | +#include <plat/omap_hwmod.h> | ||
| 1290 | +#include <plat/serial.h> | ||
| 1291 | + | ||
| 1292 | +#include "omap_hwmod_common_data.h" | ||
| 1293 | + | ||
| 1294 | +struct omap_hwmod_addr_space omap2430_mmc1_addr_space[] = { | ||
| 1295 | + { | ||
| 1296 | + .pa_start = 0x4809c000, | ||
| 1297 | + .pa_end = 0x4809c1ff, | ||
| 1298 | + .flags = ADDR_TYPE_RT, | ||
| 1299 | + }, | ||
| 1300 | + { } | ||
| 1301 | +}; | ||
| 1302 | + | ||
| 1303 | +struct omap_hwmod_addr_space omap2430_mmc2_addr_space[] = { | ||
| 1304 | + { | ||
| 1305 | + .pa_start = 0x480b4000, | ||
| 1306 | + .pa_end = 0x480b41ff, | ||
| 1307 | + .flags = ADDR_TYPE_RT, | ||
| 1308 | + }, | ||
| 1309 | + { } | ||
| 1310 | +}; | ||
| 1311 | + | ||
| 1312 | +struct omap_hwmod_addr_space omap2_i2c1_addr_space[] = { | ||
| 1313 | + { | ||
| 1314 | + .pa_start = 0x48070000, | ||
| 1315 | + .pa_end = 0x48070000 + SZ_128 - 1, | ||
| 1316 | + .flags = ADDR_TYPE_RT, | ||
| 1317 | + }, | ||
| 1318 | + { } | ||
| 1319 | +}; | ||
| 1320 | + | ||
| 1321 | +struct omap_hwmod_addr_space omap2_i2c2_addr_space[] = { | ||
| 1322 | + { | ||
| 1323 | + .pa_start = 0x48072000, | ||
| 1324 | + .pa_end = 0x48072000 + SZ_128 - 1, | ||
| 1325 | + .flags = ADDR_TYPE_RT, | ||
| 1326 | + }, | ||
| 1327 | + { } | ||
| 1328 | +}; | ||
| 1329 | + | ||
| 1330 | +struct omap_hwmod_addr_space omap2_dss_addrs[] = { | ||
| 1331 | + { | ||
| 1332 | + .pa_start = 0x48050000, | ||
| 1333 | + .pa_end = 0x48050000 + SZ_1K - 1, | ||
| 1334 | + .flags = ADDR_TYPE_RT | ||
| 1335 | + }, | ||
| 1336 | + { } | ||
| 1337 | +}; | ||
| 1338 | + | ||
| 1339 | +struct omap_hwmod_addr_space omap2_dss_dispc_addrs[] = { | ||
| 1340 | + { | ||
| 1341 | + .pa_start = 0x48050400, | ||
| 1342 | + .pa_end = 0x48050400 + SZ_1K - 1, | ||
| 1343 | + .flags = ADDR_TYPE_RT | ||
| 1344 | + }, | ||
| 1345 | + { } | ||
| 1346 | +}; | ||
| 1347 | + | ||
| 1348 | +struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[] = { | ||
| 1349 | + { | ||
| 1350 | + .pa_start = 0x48050800, | ||
| 1351 | + .pa_end = 0x48050800 + SZ_1K - 1, | ||
| 1352 | + .flags = ADDR_TYPE_RT | ||
| 1353 | + }, | ||
| 1354 | + { } | ||
| 1355 | +}; | ||
| 1356 | + | ||
| 1357 | +struct omap_hwmod_addr_space omap2_dss_venc_addrs[] = { | ||
| 1358 | + { | ||
| 1359 | + .pa_start = 0x48050C00, | ||
| 1360 | + .pa_end = 0x48050C00 + SZ_1K - 1, | ||
| 1361 | + .flags = ADDR_TYPE_RT | ||
| 1362 | + }, | ||
| 1363 | + { } | ||
| 1364 | +}; | ||
| 1365 | + | ||
| 1366 | +struct omap_hwmod_addr_space omap2_timer10_addrs[] = { | ||
| 1367 | + { | ||
| 1368 | + .pa_start = 0x48086000, | ||
| 1369 | + .pa_end = 0x48086000 + SZ_1K - 1, | ||
| 1370 | + .flags = ADDR_TYPE_RT | ||
| 1371 | + }, | ||
| 1372 | + { } | ||
| 1373 | +}; | ||
| 1374 | + | ||
| 1375 | +struct omap_hwmod_addr_space omap2_timer11_addrs[] = { | ||
| 1376 | + { | ||
| 1377 | + .pa_start = 0x48088000, | ||
| 1378 | + .pa_end = 0x48088000 + SZ_1K - 1, | ||
| 1379 | + .flags = ADDR_TYPE_RT | ||
| 1380 | + }, | ||
| 1381 | + { } | ||
| 1382 | +}; | ||
| 1383 | + | ||
| 1384 | +struct omap_hwmod_addr_space omap2xxx_timer12_addrs[] = { | ||
| 1385 | + { | ||
| 1386 | + .pa_start = 0x4808a000, | ||
| 1387 | + .pa_end = 0x4808a000 + SZ_1K - 1, | ||
| 1388 | + .flags = ADDR_TYPE_RT | ||
| 1389 | + }, | ||
| 1390 | + { } | ||
| 1391 | +}; | ||
| 1392 | + | ||
| 1393 | +struct omap_hwmod_addr_space omap2_mcspi1_addr_space[] = { | ||
| 1394 | + { | ||
| 1395 | + .pa_start = 0x48098000, | ||
| 1396 | + .pa_end = 0x48098000 + SZ_256 - 1, | ||
| 1397 | + .flags = ADDR_TYPE_RT, | ||
| 1398 | + }, | ||
| 1399 | + { } | ||
| 1400 | +}; | ||
| 1401 | + | ||
| 1402 | +struct omap_hwmod_addr_space omap2_mcspi2_addr_space[] = { | ||
| 1403 | + { | ||
| 1404 | + .pa_start = 0x4809a000, | ||
| 1405 | + .pa_end = 0x4809a000 + SZ_256 - 1, | ||
| 1406 | + .flags = ADDR_TYPE_RT, | ||
| 1407 | + }, | ||
| 1408 | + { } | ||
| 1409 | +}; | ||
| 1410 | + | ||
| 1411 | +struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[] = { | ||
| 1412 | + { | ||
| 1413 | + .pa_start = 0x480b8000, | ||
| 1414 | + .pa_end = 0x480b8000 + SZ_256 - 1, | ||
| 1415 | + .flags = ADDR_TYPE_RT, | ||
| 1416 | + }, | ||
| 1417 | + { } | ||
| 1418 | +}; | ||
| 1419 | + | ||
| 1420 | +struct omap_hwmod_addr_space omap2_dma_system_addrs[] = { | ||
| 1421 | + { | ||
| 1422 | + .pa_start = 0x48056000, | ||
| 1423 | + .pa_end = 0x48056000 + SZ_4K - 1, | ||
| 1424 | + .flags = ADDR_TYPE_RT | ||
| 1425 | + }, | ||
| 1426 | + { } | ||
| 1427 | +}; | ||
| 1428 | + | ||
| 1429 | +struct omap_hwmod_addr_space omap2_mailbox_addrs[] = { | ||
| 1430 | + { | ||
| 1431 | + .pa_start = 0x48094000, | ||
| 1432 | + .pa_end = 0x48094000 + SZ_512 - 1, | ||
| 1433 | + .flags = ADDR_TYPE_RT, | ||
| 1434 | + }, | ||
| 1435 | + { } | ||
| 1436 | +}; | ||
| 1437 | + | ||
| 1438 | +struct omap_hwmod_addr_space omap2_mcbsp1_addrs[] = { | ||
| 1439 | + { | ||
| 1440 | + .name = "mpu", | ||
| 1441 | + .pa_start = 0x48074000, | ||
| 1442 | + .pa_end = 0x480740ff, | ||
| 1443 | + .flags = ADDR_TYPE_RT | ||
| 1444 | + }, | ||
| 1445 | + { } | ||
| 1446 | +}; | ||
| 1447 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c | ||
| 1448 | new file mode 100644 | ||
| 1449 | index 0000000..4f3547c | ||
| 1450 | --- /dev/null | ||
| 1451 | +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_interconnect_data.c | ||
| 1452 | @@ -0,0 +1,130 @@ | ||
| 1453 | +/* | ||
| 1454 | + * omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx | ||
| 1455 | + * | ||
| 1456 | + * Copyright (C) 2009-2011 Nokia Corporation | ||
| 1457 | + * Paul Walmsley | ||
| 1458 | + * | ||
| 1459 | + * This program is free software; you can redistribute it and/or modify | ||
| 1460 | + * it under the terms of the GNU General Public License version 2 as | ||
| 1461 | + * published by the Free Software Foundation. | ||
| 1462 | + * | ||
| 1463 | + * XXX handle crossbar/shared link difference for L3? | ||
| 1464 | + * XXX these should be marked initdata for multi-OMAP kernels | ||
| 1465 | + */ | ||
| 1466 | +#include <asm/sizes.h> | ||
| 1467 | + | ||
| 1468 | +#include <plat/omap_hwmod.h> | ||
| 1469 | +#include <plat/serial.h> | ||
| 1470 | + | ||
| 1471 | +#include "omap_hwmod_common_data.h" | ||
| 1472 | + | ||
| 1473 | +struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[] = { | ||
| 1474 | + { | ||
| 1475 | + .pa_start = OMAP2_UART1_BASE, | ||
| 1476 | + .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, | ||
| 1477 | + .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 1478 | + }, | ||
| 1479 | + { } | ||
| 1480 | +}; | ||
| 1481 | + | ||
| 1482 | +struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[] = { | ||
| 1483 | + { | ||
| 1484 | + .pa_start = OMAP2_UART2_BASE, | ||
| 1485 | + .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, | ||
| 1486 | + .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 1487 | + }, | ||
| 1488 | + { } | ||
| 1489 | +}; | ||
| 1490 | + | ||
| 1491 | +struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[] = { | ||
| 1492 | + { | ||
| 1493 | + .pa_start = OMAP2_UART3_BASE, | ||
| 1494 | + .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, | ||
| 1495 | + .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, | ||
| 1496 | + }, | ||
| 1497 | + { } | ||
| 1498 | +}; | ||
| 1499 | + | ||
| 1500 | +struct omap_hwmod_addr_space omap2xxx_timer2_addrs[] = { | ||
| 1501 | + { | ||
| 1502 | + .pa_start = 0x4802a000, | ||
| 1503 | + .pa_end = 0x4802a000 + SZ_1K - 1, | ||
| 1504 | + .flags = ADDR_TYPE_RT | ||
| 1505 | + }, | ||
| 1506 | + { } | ||
| 1507 | +}; | ||
| 1508 | + | ||
| 1509 | +struct omap_hwmod_addr_space omap2xxx_timer3_addrs[] = { | ||
| 1510 | + { | ||
| 1511 | + .pa_start = 0x48078000, | ||
| 1512 | + .pa_end = 0x48078000 + SZ_1K - 1, | ||
| 1513 | + .flags = ADDR_TYPE_RT | ||
| 1514 | + }, | ||
| 1515 | + { } | ||
| 1516 | +}; | ||
| 1517 | + | ||
| 1518 | +struct omap_hwmod_addr_space omap2xxx_timer4_addrs[] = { | ||
| 1519 | + { | ||
| 1520 | + .pa_start = 0x4807a000, | ||
| 1521 | + .pa_end = 0x4807a000 + SZ_1K - 1, | ||
| 1522 | + .flags = ADDR_TYPE_RT | ||
| 1523 | + }, | ||
| 1524 | + { } | ||
| 1525 | +}; | ||
| 1526 | + | ||
| 1527 | +struct omap_hwmod_addr_space omap2xxx_timer5_addrs[] = { | ||
| 1528 | + { | ||
| 1529 | + .pa_start = 0x4807c000, | ||
| 1530 | + .pa_end = 0x4807c000 + SZ_1K - 1, | ||
| 1531 | + .flags = ADDR_TYPE_RT | ||
| 1532 | + }, | ||
| 1533 | + { } | ||
| 1534 | +}; | ||
| 1535 | + | ||
| 1536 | +struct omap_hwmod_addr_space omap2xxx_timer6_addrs[] = { | ||
| 1537 | + { | ||
| 1538 | + .pa_start = 0x4807e000, | ||
| 1539 | + .pa_end = 0x4807e000 + SZ_1K - 1, | ||
| 1540 | + .flags = ADDR_TYPE_RT | ||
| 1541 | + }, | ||
| 1542 | + { } | ||
| 1543 | +}; | ||
| 1544 | + | ||
| 1545 | +struct omap_hwmod_addr_space omap2xxx_timer7_addrs[] = { | ||
| 1546 | + { | ||
| 1547 | + .pa_start = 0x48080000, | ||
| 1548 | + .pa_end = 0x48080000 + SZ_1K - 1, | ||
| 1549 | + .flags = ADDR_TYPE_RT | ||
| 1550 | + }, | ||
| 1551 | + { } | ||
| 1552 | +}; | ||
| 1553 | + | ||
| 1554 | +struct omap_hwmod_addr_space omap2xxx_timer8_addrs[] = { | ||
| 1555 | + { | ||
| 1556 | + .pa_start = 0x48082000, | ||
| 1557 | + .pa_end = 0x48082000 + SZ_1K - 1, | ||
| 1558 | + .flags = ADDR_TYPE_RT | ||
| 1559 | + }, | ||
| 1560 | + { } | ||
| 1561 | +}; | ||
| 1562 | + | ||
| 1563 | +struct omap_hwmod_addr_space omap2xxx_timer9_addrs[] = { | ||
| 1564 | + { | ||
| 1565 | + .pa_start = 0x48084000, | ||
| 1566 | + .pa_end = 0x48084000 + SZ_1K - 1, | ||
| 1567 | + .flags = ADDR_TYPE_RT | ||
| 1568 | + }, | ||
| 1569 | + { } | ||
| 1570 | +}; | ||
| 1571 | + | ||
| 1572 | +struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[] = { | ||
| 1573 | + { | ||
| 1574 | + .name = "mpu", | ||
| 1575 | + .pa_start = 0x48076000, | ||
| 1576 | + .pa_end = 0x480760ff, | ||
| 1577 | + .flags = ADDR_TYPE_RT | ||
| 1578 | + }, | ||
| 1579 | + { } | ||
| 1580 | +}; | ||
| 1581 | + | ||
| 1582 | + | ||
| 1583 | diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1584 | index 6410779..791f9b2 100644 | ||
| 1585 | --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1586 | +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1587 | @@ -190,39 +190,21 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = { | ||
| 1588 | }; | ||
| 1589 | |||
| 1590 | /* L4 CORE -> MMC1 interface */ | ||
| 1591 | -static struct omap_hwmod_addr_space omap3xxx_mmc1_addr_space[] = { | ||
| 1592 | - { | ||
| 1593 | - .pa_start = 0x4809c000, | ||
| 1594 | - .pa_end = 0x4809c1ff, | ||
| 1595 | - .flags = ADDR_TYPE_RT, | ||
| 1596 | - }, | ||
| 1597 | - { } | ||
| 1598 | -}; | ||
| 1599 | - | ||
| 1600 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc1 = { | ||
| 1601 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1602 | .slave = &omap3xxx_mmc1_hwmod, | ||
| 1603 | .clk = "mmchs1_ick", | ||
| 1604 | - .addr = omap3xxx_mmc1_addr_space, | ||
| 1605 | + .addr = omap2430_mmc1_addr_space, | ||
| 1606 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1607 | .flags = OMAP_FIREWALL_L4 | ||
| 1608 | }; | ||
| 1609 | |||
| 1610 | /* L4 CORE -> MMC2 interface */ | ||
| 1611 | -static struct omap_hwmod_addr_space omap3xxx_mmc2_addr_space[] = { | ||
| 1612 | - { | ||
| 1613 | - .pa_start = 0x480b4000, | ||
| 1614 | - .pa_end = 0x480b41ff, | ||
| 1615 | - .flags = ADDR_TYPE_RT, | ||
| 1616 | - }, | ||
| 1617 | - { } | ||
| 1618 | -}; | ||
| 1619 | - | ||
| 1620 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__mmc2 = { | ||
| 1621 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1622 | .slave = &omap3xxx_mmc2_hwmod, | ||
| 1623 | .clk = "mmchs2_ick", | ||
| 1624 | - .addr = omap3xxx_mmc2_addr_space, | ||
| 1625 | + .addr = omap2430_mmc2_addr_space, | ||
| 1626 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1627 | .flags = OMAP_FIREWALL_L4 | ||
| 1628 | }; | ||
| 1629 | @@ -318,24 +300,12 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = { | ||
| 1630 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1631 | }; | ||
| 1632 | |||
| 1633 | -/* I2C IP block address space length (in bytes) */ | ||
| 1634 | -#define OMAP2_I2C_AS_LEN 128 | ||
| 1635 | - | ||
| 1636 | /* L4 CORE -> I2C1 interface */ | ||
| 1637 | -static struct omap_hwmod_addr_space omap3xxx_i2c1_addr_space[] = { | ||
| 1638 | - { | ||
| 1639 | - .pa_start = 0x48070000, | ||
| 1640 | - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, | ||
| 1641 | - .flags = ADDR_TYPE_RT, | ||
| 1642 | - }, | ||
| 1643 | - { } | ||
| 1644 | -}; | ||
| 1645 | - | ||
| 1646 | static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { | ||
| 1647 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1648 | .slave = &omap3xxx_i2c1_hwmod, | ||
| 1649 | .clk = "i2c1_ick", | ||
| 1650 | - .addr = omap3xxx_i2c1_addr_space, | ||
| 1651 | + .addr = omap2_i2c1_addr_space, | ||
| 1652 | .fw = { | ||
| 1653 | .omap2 = { | ||
| 1654 | .l4_fw_region = OMAP3_L4_CORE_FW_I2C1_REGION, | ||
| 1655 | @@ -347,20 +317,11 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = { | ||
| 1656 | }; | ||
| 1657 | |||
| 1658 | /* L4 CORE -> I2C2 interface */ | ||
| 1659 | -static struct omap_hwmod_addr_space omap3xxx_i2c2_addr_space[] = { | ||
| 1660 | - { | ||
| 1661 | - .pa_start = 0x48072000, | ||
| 1662 | - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, | ||
| 1663 | - .flags = ADDR_TYPE_RT, | ||
| 1664 | - }, | ||
| 1665 | - { } | ||
| 1666 | -}; | ||
| 1667 | - | ||
| 1668 | static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { | ||
| 1669 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1670 | .slave = &omap3xxx_i2c2_hwmod, | ||
| 1671 | .clk = "i2c2_ick", | ||
| 1672 | - .addr = omap3xxx_i2c2_addr_space, | ||
| 1673 | + .addr = omap2_i2c2_addr_space, | ||
| 1674 | .fw = { | ||
| 1675 | .omap2 = { | ||
| 1676 | .l4_fw_region = OMAP3_L4_CORE_FW_I2C2_REGION, | ||
| 1677 | @@ -375,7 +336,7 @@ static struct omap_hwmod_ocp_if omap3_l4_core__i2c2 = { | ||
| 1678 | static struct omap_hwmod_addr_space omap3xxx_i2c3_addr_space[] = { | ||
| 1679 | { | ||
| 1680 | .pa_start = 0x48060000, | ||
| 1681 | - .pa_end = 0x48060000 + OMAP2_I2C_AS_LEN - 1, | ||
| 1682 | + .pa_end = 0x48060000 + SZ_128 - 1, | ||
| 1683 | .flags = ADDR_TYPE_RT, | ||
| 1684 | }, | ||
| 1685 | { } | ||
| 1686 | @@ -1065,21 +1026,12 @@ static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { | ||
| 1687 | { .irq = 46, }, | ||
| 1688 | }; | ||
| 1689 | |||
| 1690 | -static struct omap_hwmod_addr_space omap3xxx_timer10_addrs[] = { | ||
| 1691 | - { | ||
| 1692 | - .pa_start = 0x48086000, | ||
| 1693 | - .pa_end = 0x48086000 + SZ_1K - 1, | ||
| 1694 | - .flags = ADDR_TYPE_RT | ||
| 1695 | - }, | ||
| 1696 | - { } | ||
| 1697 | -}; | ||
| 1698 | - | ||
| 1699 | /* l4_core -> timer10 */ | ||
| 1700 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { | ||
| 1701 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1702 | .slave = &omap3xxx_timer10_hwmod, | ||
| 1703 | .clk = "gpt10_ick", | ||
| 1704 | - .addr = omap3xxx_timer10_addrs, | ||
| 1705 | + .addr = omap2_timer10_addrs, | ||
| 1706 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1707 | }; | ||
| 1708 | |||
| 1709 | @@ -1115,21 +1067,12 @@ static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { | ||
| 1710 | { .irq = 47, }, | ||
| 1711 | }; | ||
| 1712 | |||
| 1713 | -static struct omap_hwmod_addr_space omap3xxx_timer11_addrs[] = { | ||
| 1714 | - { | ||
| 1715 | - .pa_start = 0x48088000, | ||
| 1716 | - .pa_end = 0x48088000 + SZ_1K - 1, | ||
| 1717 | - .flags = ADDR_TYPE_RT | ||
| 1718 | - }, | ||
| 1719 | - { } | ||
| 1720 | -}; | ||
| 1721 | - | ||
| 1722 | /* l4_core -> timer11 */ | ||
| 1723 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { | ||
| 1724 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1725 | .slave = &omap3xxx_timer11_hwmod, | ||
| 1726 | .clk = "gpt11_ick", | ||
| 1727 | - .addr = omap3xxx_timer11_addrs, | ||
| 1728 | + .addr = omap2_timer11_addrs, | ||
| 1729 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1730 | }; | ||
| 1731 | |||
| 1732 | @@ -1491,21 +1434,12 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_masters[] = { | ||
| 1733 | &omap3xxx_dss__l3, | ||
| 1734 | }; | ||
| 1735 | |||
| 1736 | -static struct omap_hwmod_addr_space omap3xxx_dss_addrs[] = { | ||
| 1737 | - { | ||
| 1738 | - .pa_start = 0x48050000, | ||
| 1739 | - .pa_end = 0x480503FF, | ||
| 1740 | - .flags = ADDR_TYPE_RT | ||
| 1741 | - }, | ||
| 1742 | - { } | ||
| 1743 | -}; | ||
| 1744 | - | ||
| 1745 | /* l4_core -> dss */ | ||
| 1746 | static struct omap_hwmod_ocp_if omap3430es1_l4_core__dss = { | ||
| 1747 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1748 | .slave = &omap3430es1_dss_core_hwmod, | ||
| 1749 | .clk = "dss_ick", | ||
| 1750 | - .addr = omap3xxx_dss_addrs, | ||
| 1751 | + .addr = omap2_dss_addrs, | ||
| 1752 | .fw = { | ||
| 1753 | .omap2 = { | ||
| 1754 | .l4_fw_region = OMAP3ES1_L4_CORE_FW_DSS_CORE_REGION, | ||
| 1755 | @@ -1520,7 +1454,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss = { | ||
| 1756 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1757 | .slave = &omap3xxx_dss_core_hwmod, | ||
| 1758 | .clk = "dss_ick", | ||
| 1759 | - .addr = omap3xxx_dss_addrs, | ||
| 1760 | + .addr = omap2_dss_addrs, | ||
| 1761 | .fw = { | ||
| 1762 | .omap2 = { | ||
| 1763 | .l4_fw_region = OMAP3_L4_CORE_FW_DSS_CORE_REGION, | ||
| 1764 | @@ -1625,21 +1559,12 @@ static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { | ||
| 1765 | { .irq = 25 }, | ||
| 1766 | }; | ||
| 1767 | |||
| 1768 | -static struct omap_hwmod_addr_space omap3xxx_dss_dispc_addrs[] = { | ||
| 1769 | - { | ||
| 1770 | - .pa_start = 0x48050400, | ||
| 1771 | - .pa_end = 0x480507FF, | ||
| 1772 | - .flags = ADDR_TYPE_RT | ||
| 1773 | - }, | ||
| 1774 | - { } | ||
| 1775 | -}; | ||
| 1776 | - | ||
| 1777 | /* l4_core -> dss_dispc */ | ||
| 1778 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { | ||
| 1779 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1780 | .slave = &omap3xxx_dss_dispc_hwmod, | ||
| 1781 | .clk = "dss_ick", | ||
| 1782 | - .addr = omap3xxx_dss_dispc_addrs, | ||
| 1783 | + .addr = omap2_dss_dispc_addrs, | ||
| 1784 | .fw = { | ||
| 1785 | .omap2 = { | ||
| 1786 | .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DISPC_REGION, | ||
| 1787 | @@ -1760,21 +1685,12 @@ static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = { | ||
| 1788 | .sysc = &omap3xxx_rfbi_sysc, | ||
| 1789 | }; | ||
| 1790 | |||
| 1791 | -static struct omap_hwmod_addr_space omap3xxx_dss_rfbi_addrs[] = { | ||
| 1792 | - { | ||
| 1793 | - .pa_start = 0x48050800, | ||
| 1794 | - .pa_end = 0x48050BFF, | ||
| 1795 | - .flags = ADDR_TYPE_RT | ||
| 1796 | - }, | ||
| 1797 | - { } | ||
| 1798 | -}; | ||
| 1799 | - | ||
| 1800 | /* l4_core -> dss_rfbi */ | ||
| 1801 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { | ||
| 1802 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1803 | .slave = &omap3xxx_dss_rfbi_hwmod, | ||
| 1804 | .clk = "dss_ick", | ||
| 1805 | - .addr = omap3xxx_dss_rfbi_addrs, | ||
| 1806 | + .addr = omap2_dss_rfbi_addrs, | ||
| 1807 | .fw = { | ||
| 1808 | .omap2 = { | ||
| 1809 | .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION, | ||
| 1810 | @@ -1818,22 +1734,12 @@ static struct omap_hwmod_class omap3xxx_venc_hwmod_class = { | ||
| 1811 | .name = "venc", | ||
| 1812 | }; | ||
| 1813 | |||
| 1814 | -/* dss_venc */ | ||
| 1815 | -static struct omap_hwmod_addr_space omap3xxx_dss_venc_addrs[] = { | ||
| 1816 | - { | ||
| 1817 | - .pa_start = 0x48050C00, | ||
| 1818 | - .pa_end = 0x48050FFF, | ||
| 1819 | - .flags = ADDR_TYPE_RT | ||
| 1820 | - }, | ||
| 1821 | - { } | ||
| 1822 | -}; | ||
| 1823 | - | ||
| 1824 | /* l4_core -> dss_venc */ | ||
| 1825 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { | ||
| 1826 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1827 | .slave = &omap3xxx_dss_venc_hwmod, | ||
| 1828 | .clk = "dss_tv_fck", | ||
| 1829 | - .addr = omap3xxx_dss_venc_addrs, | ||
| 1830 | + .addr = omap2_dss_venc_addrs, | ||
| 1831 | .fw = { | ||
| 1832 | .omap2 = { | ||
| 1833 | .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION, | ||
| 1834 | @@ -3070,56 +2976,29 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = { | ||
| 1835 | }; | ||
| 1836 | |||
| 1837 | /* l4 core -> mcspi1 interface */ | ||
| 1838 | -static struct omap_hwmod_addr_space omap34xx_mcspi1_addr_space[] = { | ||
| 1839 | - { | ||
| 1840 | - .pa_start = 0x48098000, | ||
| 1841 | - .pa_end = 0x480980ff, | ||
| 1842 | - .flags = ADDR_TYPE_RT, | ||
| 1843 | - }, | ||
| 1844 | - { } | ||
| 1845 | -}; | ||
| 1846 | - | ||
| 1847 | static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi1 = { | ||
| 1848 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1849 | .slave = &omap34xx_mcspi1, | ||
| 1850 | .clk = "mcspi1_ick", | ||
| 1851 | - .addr = omap34xx_mcspi1_addr_space, | ||
| 1852 | + .addr = omap2_mcspi1_addr_space, | ||
| 1853 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1854 | }; | ||
| 1855 | |||
| 1856 | /* l4 core -> mcspi2 interface */ | ||
| 1857 | -static struct omap_hwmod_addr_space omap34xx_mcspi2_addr_space[] = { | ||
| 1858 | - { | ||
| 1859 | - .pa_start = 0x4809a000, | ||
| 1860 | - .pa_end = 0x4809a0ff, | ||
| 1861 | - .flags = ADDR_TYPE_RT, | ||
| 1862 | - }, | ||
| 1863 | - { } | ||
| 1864 | -}; | ||
| 1865 | - | ||
| 1866 | static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi2 = { | ||
| 1867 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1868 | .slave = &omap34xx_mcspi2, | ||
| 1869 | .clk = "mcspi2_ick", | ||
| 1870 | - .addr = omap34xx_mcspi2_addr_space, | ||
| 1871 | + .addr = omap2_mcspi2_addr_space, | ||
| 1872 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1873 | }; | ||
| 1874 | |||
| 1875 | /* l4 core -> mcspi3 interface */ | ||
| 1876 | -static struct omap_hwmod_addr_space omap34xx_mcspi3_addr_space[] = { | ||
| 1877 | - { | ||
| 1878 | - .pa_start = 0x480b8000, | ||
| 1879 | - .pa_end = 0x480b80ff, | ||
| 1880 | - .flags = ADDR_TYPE_RT, | ||
| 1881 | - }, | ||
| 1882 | - { } | ||
| 1883 | -}; | ||
| 1884 | - | ||
| 1885 | static struct omap_hwmod_ocp_if omap34xx_l4_core__mcspi3 = { | ||
| 1886 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1887 | .slave = &omap34xx_mcspi3, | ||
| 1888 | .clk = "mcspi3_ick", | ||
| 1889 | - .addr = omap34xx_mcspi3_addr_space, | ||
| 1890 | + .addr = omap2430_mcspi3_addr_space, | ||
| 1891 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 1892 | }; | ||
| 1893 | |||
| 1894 | diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h | ||
| 1895 | index c34e98b..76a2f11 100644 | ||
| 1896 | --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h | ||
| 1897 | +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h | ||
| 1898 | @@ -1,10 +1,10 @@ | ||
| 1899 | /* | ||
| 1900 | * omap_hwmod_common_data.h - OMAP hwmod common macros and declarations | ||
| 1901 | * | ||
| 1902 | - * Copyright (C) 2010 Nokia Corporation | ||
| 1903 | + * Copyright (C) 2010-2011 Nokia Corporation | ||
| 1904 | * Paul Walmsley | ||
| 1905 | * | ||
| 1906 | - * Copyright (C) 2010 Texas Instruments, Inc. | ||
| 1907 | + * Copyright (C) 2010-2011 Texas Instruments, Inc. | ||
| 1908 | * Benoît Cousson | ||
| 1909 | * | ||
| 1910 | * This program is free software; you can redistribute it and/or modify | ||
| 1911 | @@ -16,10 +16,44 @@ | ||
| 1912 | |||
| 1913 | #include <plat/omap_hwmod.h> | ||
| 1914 | |||
| 1915 | +/* Common address space across OMAP2xxx */ | ||
| 1916 | +extern struct omap_hwmod_addr_space omap2xxx_uart1_addr_space[]; | ||
| 1917 | +extern struct omap_hwmod_addr_space omap2xxx_uart2_addr_space[]; | ||
| 1918 | +extern struct omap_hwmod_addr_space omap2xxx_uart3_addr_space[]; | ||
| 1919 | +extern struct omap_hwmod_addr_space omap2xxx_timer2_addrs[]; | ||
| 1920 | +extern struct omap_hwmod_addr_space omap2xxx_timer3_addrs[]; | ||
| 1921 | +extern struct omap_hwmod_addr_space omap2xxx_timer4_addrs[]; | ||
| 1922 | +extern struct omap_hwmod_addr_space omap2xxx_timer5_addrs[]; | ||
| 1923 | +extern struct omap_hwmod_addr_space omap2xxx_timer6_addrs[]; | ||
| 1924 | +extern struct omap_hwmod_addr_space omap2xxx_timer7_addrs[]; | ||
| 1925 | +extern struct omap_hwmod_addr_space omap2xxx_timer8_addrs[]; | ||
| 1926 | +extern struct omap_hwmod_addr_space omap2xxx_timer9_addrs[]; | ||
| 1927 | +extern struct omap_hwmod_addr_space omap2xxx_timer12_addrs[]; | ||
| 1928 | +extern struct omap_hwmod_addr_space omap2xxx_mcbsp2_addrs[]; | ||
| 1929 | + | ||
| 1930 | +/* Common address space across OMAP2xxx/3xxx */ | ||
| 1931 | +extern struct omap_hwmod_addr_space omap2_i2c1_addr_space[]; | ||
| 1932 | +extern struct omap_hwmod_addr_space omap2_i2c2_addr_space[]; | ||
| 1933 | +extern struct omap_hwmod_addr_space omap2_dss_addrs[]; | ||
| 1934 | +extern struct omap_hwmod_addr_space omap2_dss_dispc_addrs[]; | ||
| 1935 | +extern struct omap_hwmod_addr_space omap2_dss_rfbi_addrs[]; | ||
| 1936 | +extern struct omap_hwmod_addr_space omap2_dss_venc_addrs[]; | ||
| 1937 | +extern struct omap_hwmod_addr_space omap2_timer10_addrs[]; | ||
| 1938 | +extern struct omap_hwmod_addr_space omap2_timer11_addrs[]; | ||
| 1939 | +extern struct omap_hwmod_addr_space omap2430_mmc1_addr_space[]; | ||
| 1940 | +extern struct omap_hwmod_addr_space omap2430_mmc2_addr_space[]; | ||
| 1941 | +extern struct omap_hwmod_addr_space omap2_mcspi1_addr_space[]; | ||
| 1942 | +extern struct omap_hwmod_addr_space omap2_mcspi2_addr_space[]; | ||
| 1943 | +extern struct omap_hwmod_addr_space omap2430_mcspi3_addr_space[]; | ||
| 1944 | +extern struct omap_hwmod_addr_space omap2_dma_system_addrs[]; | ||
| 1945 | +extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; | ||
| 1946 | +extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; | ||
| 1947 | + | ||
| 1948 | /* OMAP hwmod classes - forward declarations */ | ||
| 1949 | extern struct omap_hwmod_class l3_hwmod_class; | ||
| 1950 | extern struct omap_hwmod_class l4_hwmod_class; | ||
| 1951 | extern struct omap_hwmod_class mpu_hwmod_class; | ||
| 1952 | extern struct omap_hwmod_class iva_hwmod_class; | ||
| 1953 | |||
| 1954 | + | ||
| 1955 | #endif | ||
| 1956 | -- | ||
| 1957 | 1.7.2.5 | ||
| 1958 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0039-omap_hwmod-use-a-terminator-record-with-omap_hwmod_m.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0039-omap_hwmod-use-a-terminator-record-with-omap_hwmod_m.patch deleted file mode 100644 index b83e6dfe..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0039-omap_hwmod-use-a-terminator-record-with-omap_hwmod_m.patch +++ /dev/null | |||
| @@ -1,2904 +0,0 @@ | |||
| 1 | From 75a125341387435415e8390130066d56178291ef Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Paul Walmsley <paul@pwsan.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:06 -0600 | ||
| 4 | Subject: [PATCH 039/149] omap_hwmod: use a terminator record with omap_hwmod_mpu_irqs arrays | ||
| 5 | |||
| 6 | Previously, struct omap_hwmod_mpu_irqs arrays were unterminated; and | ||
| 7 | users of these arrays used the ARRAY_SIZE() macro to determine the | ||
| 8 | length of the array. However, ARRAY_SIZE() only works when the array | ||
| 9 | is in the same scope as the macro user. | ||
| 10 | |||
| 11 | So far this hasn't been a problem. However, to reduce duplicated | ||
| 12 | data, a subsequent patch will move common data to a separate, shared | ||
| 13 | file. When this is done, ARRAY_SIZE() will no longer be usable. | ||
| 14 | |||
| 15 | This patch removes ARRAY_SIZE() usage for struct omap_hwmod_mpu_irqs | ||
| 16 | arrays and uses a sentinel value (irq == -1) as the array terminator | ||
| 17 | instead. | ||
| 18 | |||
| 19 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 20 | --- | ||
| 21 | arch/arm/mach-omap2/omap_hwmod.c | 30 ++++++- | ||
| 22 | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 56 ++++++------ | ||
| 23 | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 72 +++++++------- | ||
| 24 | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 92 +++++++++--------- | ||
| 25 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 127 +++++++++++++------------- | ||
| 26 | arch/arm/plat-omap/include/plat/omap_hwmod.h | 8 +- | ||
| 27 | 6 files changed, 205 insertions(+), 180 deletions(-) | ||
| 28 | |||
| 29 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 30 | index 73599f0..b761968 100644 | ||
| 31 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 32 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 33 | @@ -679,6 +679,29 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) | ||
| 34 | } | ||
| 35 | |||
| 36 | /** | ||
| 37 | + * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh | ||
| 38 | + * @oh: struct omap_hwmod *oh | ||
| 39 | + * | ||
| 40 | + * Count and return the number of MPU IRQs associated with the hwmod | ||
| 41 | + * @oh. Used to allocate struct resource data. Returns 0 if @oh is | ||
| 42 | + * NULL. | ||
| 43 | + */ | ||
| 44 | +static int _count_mpu_irqs(struct omap_hwmod *oh) | ||
| 45 | +{ | ||
| 46 | + struct omap_hwmod_irq_info *ohii; | ||
| 47 | + int i = 0; | ||
| 48 | + | ||
| 49 | + if (!oh || !oh->mpu_irqs) | ||
| 50 | + return 0; | ||
| 51 | + | ||
| 52 | + do { | ||
| 53 | + ohii = &oh->mpu_irqs[i++]; | ||
| 54 | + } while (ohii->irq != -1); | ||
| 55 | + | ||
| 56 | + return i; | ||
| 57 | +} | ||
| 58 | + | ||
| 59 | +/** | ||
| 60 | * _count_ocp_if_addr_spaces - count the number of address space entries for @oh | ||
| 61 | * @oh: struct omap_hwmod *oh | ||
| 62 | * | ||
| 63 | @@ -1984,7 +2007,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) | ||
| 64 | { | ||
| 65 | int ret, i; | ||
| 66 | |||
| 67 | - ret = oh->mpu_irqs_cnt + oh->sdma_reqs_cnt; | ||
| 68 | + ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; | ||
| 69 | |||
| 70 | for (i = 0; i < oh->slaves_cnt; i++) | ||
| 71 | ret += _count_ocp_if_addr_spaces(oh->slaves[i]); | ||
| 72 | @@ -2004,12 +2027,13 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) | ||
| 73 | */ | ||
| 74 | int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) | ||
| 75 | { | ||
| 76 | - int i, j; | ||
| 77 | + int i, j, mpu_irqs_cnt; | ||
| 78 | int r = 0; | ||
| 79 | |||
| 80 | /* For each IRQ, DMA, memory area, fill in array.*/ | ||
| 81 | |||
| 82 | - for (i = 0; i < oh->mpu_irqs_cnt; i++) { | ||
| 83 | + mpu_irqs_cnt = _count_mpu_irqs(oh); | ||
| 84 | + for (i = 0; i < mpu_irqs_cnt; i++) { | ||
| 85 | (res + r)->name = (oh->mpu_irqs + i)->name; | ||
| 86 | (res + r)->start = (oh->mpu_irqs + i)->irq; | ||
| 87 | (res + r)->end = (oh->mpu_irqs + i)->irq; | ||
| 88 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 89 | index 3ec625c..04730d3 100644 | ||
| 90 | --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 91 | +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 92 | @@ -296,6 +296,7 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = { | ||
| 93 | static struct omap_hwmod omap2420_timer1_hwmod; | ||
| 94 | static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { | ||
| 95 | { .irq = 37, }, | ||
| 96 | + { .irq = -1 } | ||
| 97 | }; | ||
| 98 | |||
| 99 | static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { | ||
| 100 | @@ -325,7 +326,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = { | ||
| 101 | static struct omap_hwmod omap2420_timer1_hwmod = { | ||
| 102 | .name = "timer1", | ||
| 103 | .mpu_irqs = omap2420_timer1_mpu_irqs, | ||
| 104 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer1_mpu_irqs), | ||
| 105 | .main_clk = "gpt1_fck", | ||
| 106 | .prcm = { | ||
| 107 | .omap2 = { | ||
| 108 | @@ -346,6 +346,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = { | ||
| 109 | static struct omap_hwmod omap2420_timer2_hwmod; | ||
| 110 | static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { | ||
| 111 | { .irq = 38, }, | ||
| 112 | + { .irq = -1 } | ||
| 113 | }; | ||
| 114 | |||
| 115 | |||
| 116 | @@ -367,7 +368,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = { | ||
| 117 | static struct omap_hwmod omap2420_timer2_hwmod = { | ||
| 118 | .name = "timer2", | ||
| 119 | .mpu_irqs = omap2420_timer2_mpu_irqs, | ||
| 120 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer2_mpu_irqs), | ||
| 121 | .main_clk = "gpt2_fck", | ||
| 122 | .prcm = { | ||
| 123 | .omap2 = { | ||
| 124 | @@ -388,6 +388,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = { | ||
| 125 | static struct omap_hwmod omap2420_timer3_hwmod; | ||
| 126 | static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { | ||
| 127 | { .irq = 39, }, | ||
| 128 | + { .irq = -1 } | ||
| 129 | }; | ||
| 130 | |||
| 131 | /* l4_core -> timer3 */ | ||
| 132 | @@ -408,7 +409,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = { | ||
| 133 | static struct omap_hwmod omap2420_timer3_hwmod = { | ||
| 134 | .name = "timer3", | ||
| 135 | .mpu_irqs = omap2420_timer3_mpu_irqs, | ||
| 136 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer3_mpu_irqs), | ||
| 137 | .main_clk = "gpt3_fck", | ||
| 138 | .prcm = { | ||
| 139 | .omap2 = { | ||
| 140 | @@ -429,6 +429,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = { | ||
| 141 | static struct omap_hwmod omap2420_timer4_hwmod; | ||
| 142 | static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { | ||
| 143 | { .irq = 40, }, | ||
| 144 | + { .irq = -1 } | ||
| 145 | }; | ||
| 146 | |||
| 147 | /* l4_core -> timer4 */ | ||
| 148 | @@ -449,7 +450,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = { | ||
| 149 | static struct omap_hwmod omap2420_timer4_hwmod = { | ||
| 150 | .name = "timer4", | ||
| 151 | .mpu_irqs = omap2420_timer4_mpu_irqs, | ||
| 152 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer4_mpu_irqs), | ||
| 153 | .main_clk = "gpt4_fck", | ||
| 154 | .prcm = { | ||
| 155 | .omap2 = { | ||
| 156 | @@ -470,6 +470,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = { | ||
| 157 | static struct omap_hwmod omap2420_timer5_hwmod; | ||
| 158 | static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { | ||
| 159 | { .irq = 41, }, | ||
| 160 | + { .irq = -1 } | ||
| 161 | }; | ||
| 162 | |||
| 163 | /* l4_core -> timer5 */ | ||
| 164 | @@ -490,7 +491,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = { | ||
| 165 | static struct omap_hwmod omap2420_timer5_hwmod = { | ||
| 166 | .name = "timer5", | ||
| 167 | .mpu_irqs = omap2420_timer5_mpu_irqs, | ||
| 168 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer5_mpu_irqs), | ||
| 169 | .main_clk = "gpt5_fck", | ||
| 170 | .prcm = { | ||
| 171 | .omap2 = { | ||
| 172 | @@ -512,6 +512,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = { | ||
| 173 | static struct omap_hwmod omap2420_timer6_hwmod; | ||
| 174 | static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { | ||
| 175 | { .irq = 42, }, | ||
| 176 | + { .irq = -1 } | ||
| 177 | }; | ||
| 178 | |||
| 179 | /* l4_core -> timer6 */ | ||
| 180 | @@ -532,7 +533,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = { | ||
| 181 | static struct omap_hwmod omap2420_timer6_hwmod = { | ||
| 182 | .name = "timer6", | ||
| 183 | .mpu_irqs = omap2420_timer6_mpu_irqs, | ||
| 184 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer6_mpu_irqs), | ||
| 185 | .main_clk = "gpt6_fck", | ||
| 186 | .prcm = { | ||
| 187 | .omap2 = { | ||
| 188 | @@ -553,6 +553,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = { | ||
| 189 | static struct omap_hwmod omap2420_timer7_hwmod; | ||
| 190 | static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { | ||
| 191 | { .irq = 43, }, | ||
| 192 | + { .irq = -1 } | ||
| 193 | }; | ||
| 194 | |||
| 195 | /* l4_core -> timer7 */ | ||
| 196 | @@ -573,7 +574,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = { | ||
| 197 | static struct omap_hwmod omap2420_timer7_hwmod = { | ||
| 198 | .name = "timer7", | ||
| 199 | .mpu_irqs = omap2420_timer7_mpu_irqs, | ||
| 200 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer7_mpu_irqs), | ||
| 201 | .main_clk = "gpt7_fck", | ||
| 202 | .prcm = { | ||
| 203 | .omap2 = { | ||
| 204 | @@ -594,6 +594,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = { | ||
| 205 | static struct omap_hwmod omap2420_timer8_hwmod; | ||
| 206 | static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { | ||
| 207 | { .irq = 44, }, | ||
| 208 | + { .irq = -1 } | ||
| 209 | }; | ||
| 210 | |||
| 211 | /* l4_core -> timer8 */ | ||
| 212 | @@ -614,7 +615,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = { | ||
| 213 | static struct omap_hwmod omap2420_timer8_hwmod = { | ||
| 214 | .name = "timer8", | ||
| 215 | .mpu_irqs = omap2420_timer8_mpu_irqs, | ||
| 216 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer8_mpu_irqs), | ||
| 217 | .main_clk = "gpt8_fck", | ||
| 218 | .prcm = { | ||
| 219 | .omap2 = { | ||
| 220 | @@ -635,6 +635,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = { | ||
| 221 | static struct omap_hwmod omap2420_timer9_hwmod; | ||
| 222 | static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { | ||
| 223 | { .irq = 45, }, | ||
| 224 | + { .irq = -1 } | ||
| 225 | }; | ||
| 226 | |||
| 227 | /* l4_core -> timer9 */ | ||
| 228 | @@ -655,7 +656,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = { | ||
| 229 | static struct omap_hwmod omap2420_timer9_hwmod = { | ||
| 230 | .name = "timer9", | ||
| 231 | .mpu_irqs = omap2420_timer9_mpu_irqs, | ||
| 232 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer9_mpu_irqs), | ||
| 233 | .main_clk = "gpt9_fck", | ||
| 234 | .prcm = { | ||
| 235 | .omap2 = { | ||
| 236 | @@ -676,6 +676,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = { | ||
| 237 | static struct omap_hwmod omap2420_timer10_hwmod; | ||
| 238 | static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { | ||
| 239 | { .irq = 46, }, | ||
| 240 | + { .irq = -1 } | ||
| 241 | }; | ||
| 242 | |||
| 243 | /* l4_core -> timer10 */ | ||
| 244 | @@ -696,7 +697,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = { | ||
| 245 | static struct omap_hwmod omap2420_timer10_hwmod = { | ||
| 246 | .name = "timer10", | ||
| 247 | .mpu_irqs = omap2420_timer10_mpu_irqs, | ||
| 248 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer10_mpu_irqs), | ||
| 249 | .main_clk = "gpt10_fck", | ||
| 250 | .prcm = { | ||
| 251 | .omap2 = { | ||
| 252 | @@ -717,6 +717,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = { | ||
| 253 | static struct omap_hwmod omap2420_timer11_hwmod; | ||
| 254 | static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { | ||
| 255 | { .irq = 47, }, | ||
| 256 | + { .irq = -1 } | ||
| 257 | }; | ||
| 258 | |||
| 259 | /* l4_core -> timer11 */ | ||
| 260 | @@ -737,7 +738,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = { | ||
| 261 | static struct omap_hwmod omap2420_timer11_hwmod = { | ||
| 262 | .name = "timer11", | ||
| 263 | .mpu_irqs = omap2420_timer11_mpu_irqs, | ||
| 264 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer11_mpu_irqs), | ||
| 265 | .main_clk = "gpt11_fck", | ||
| 266 | .prcm = { | ||
| 267 | .omap2 = { | ||
| 268 | @@ -758,6 +758,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = { | ||
| 269 | static struct omap_hwmod omap2420_timer12_hwmod; | ||
| 270 | static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { | ||
| 271 | { .irq = 48, }, | ||
| 272 | + { .irq = -1 } | ||
| 273 | }; | ||
| 274 | |||
| 275 | /* l4_core -> timer12 */ | ||
| 276 | @@ -778,7 +779,6 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = { | ||
| 277 | static struct omap_hwmod omap2420_timer12_hwmod = { | ||
| 278 | .name = "timer12", | ||
| 279 | .mpu_irqs = omap2420_timer12_mpu_irqs, | ||
| 280 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer12_mpu_irqs), | ||
| 281 | .main_clk = "gpt12_fck", | ||
| 282 | .prcm = { | ||
| 283 | .omap2 = { | ||
| 284 | @@ -879,6 +879,7 @@ static struct omap_hwmod_class uart_class = { | ||
| 285 | |||
| 286 | static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { | ||
| 287 | { .irq = INT_24XX_UART1_IRQ, }, | ||
| 288 | + { .irq = -1 } | ||
| 289 | }; | ||
| 290 | |||
| 291 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | ||
| 292 | @@ -893,7 +894,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { | ||
| 293 | static struct omap_hwmod omap2420_uart1_hwmod = { | ||
| 294 | .name = "uart1", | ||
| 295 | .mpu_irqs = uart1_mpu_irqs, | ||
| 296 | - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), | ||
| 297 | .sdma_reqs = uart1_sdma_reqs, | ||
| 298 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | ||
| 299 | .main_clk = "uart1_fck", | ||
| 300 | @@ -916,6 +916,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { | ||
| 301 | |||
| 302 | static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { | ||
| 303 | { .irq = INT_24XX_UART2_IRQ, }, | ||
| 304 | + { .irq = -1 } | ||
| 305 | }; | ||
| 306 | |||
| 307 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | ||
| 308 | @@ -930,7 +931,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { | ||
| 309 | static struct omap_hwmod omap2420_uart2_hwmod = { | ||
| 310 | .name = "uart2", | ||
| 311 | .mpu_irqs = uart2_mpu_irqs, | ||
| 312 | - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), | ||
| 313 | .sdma_reqs = uart2_sdma_reqs, | ||
| 314 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | ||
| 315 | .main_clk = "uart2_fck", | ||
| 316 | @@ -953,6 +953,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { | ||
| 317 | |||
| 318 | static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { | ||
| 319 | { .irq = INT_24XX_UART3_IRQ, }, | ||
| 320 | + { .irq = -1 } | ||
| 321 | }; | ||
| 322 | |||
| 323 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | ||
| 324 | @@ -967,7 +968,6 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { | ||
| 325 | static struct omap_hwmod omap2420_uart3_hwmod = { | ||
| 326 | .name = "uart3", | ||
| 327 | .mpu_irqs = uart3_mpu_irqs, | ||
| 328 | - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), | ||
| 329 | .sdma_reqs = uart3_sdma_reqs, | ||
| 330 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | ||
| 331 | .main_clk = "uart3_fck", | ||
| 332 | @@ -1087,6 +1087,7 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = { | ||
| 333 | |||
| 334 | static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { | ||
| 335 | { .irq = 25 }, | ||
| 336 | + { .irq = -1 } | ||
| 337 | }; | ||
| 338 | |||
| 339 | /* l4_core -> dss_dispc */ | ||
| 340 | @@ -1113,7 +1114,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = { | ||
| 341 | .name = "dss_dispc", | ||
| 342 | .class = &omap2420_dispc_hwmod_class, | ||
| 343 | .mpu_irqs = omap2420_dispc_irqs, | ||
| 344 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs), | ||
| 345 | .main_clk = "dss1_fck", | ||
| 346 | .prcm = { | ||
| 347 | .omap2 = { | ||
| 348 | @@ -1254,6 +1254,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; | ||
| 349 | |||
| 350 | static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { | ||
| 351 | { .irq = INT_24XX_I2C1_IRQ, }, | ||
| 352 | + { .irq = -1 } | ||
| 353 | }; | ||
| 354 | |||
| 355 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | ||
| 356 | @@ -1268,7 +1269,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { | ||
| 357 | static struct omap_hwmod omap2420_i2c1_hwmod = { | ||
| 358 | .name = "i2c1", | ||
| 359 | .mpu_irqs = i2c1_mpu_irqs, | ||
| 360 | - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), | ||
| 361 | .sdma_reqs = i2c1_sdma_reqs, | ||
| 362 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | ||
| 363 | .main_clk = "i2c1_fck", | ||
| 364 | @@ -1293,6 +1293,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { | ||
| 365 | |||
| 366 | static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { | ||
| 367 | { .irq = INT_24XX_I2C2_IRQ, }, | ||
| 368 | + { .irq = -1 } | ||
| 369 | }; | ||
| 370 | |||
| 371 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | ||
| 372 | @@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { | ||
| 373 | static struct omap_hwmod omap2420_i2c2_hwmod = { | ||
| 374 | .name = "i2c2", | ||
| 375 | .mpu_irqs = i2c2_mpu_irqs, | ||
| 376 | - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), | ||
| 377 | .sdma_reqs = i2c2_sdma_reqs, | ||
| 378 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | ||
| 379 | .main_clk = "i2c2_fck", | ||
| 380 | @@ -1430,6 +1430,7 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = { | ||
| 381 | /* gpio1 */ | ||
| 382 | static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { | ||
| 383 | { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ | ||
| 384 | + { .irq = -1 } | ||
| 385 | }; | ||
| 386 | |||
| 387 | static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { | ||
| 388 | @@ -1440,7 +1441,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { | ||
| 389 | .name = "gpio1", | ||
| 390 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 391 | .mpu_irqs = omap242x_gpio1_irqs, | ||
| 392 | - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs), | ||
| 393 | .main_clk = "gpios_fck", | ||
| 394 | .prcm = { | ||
| 395 | .omap2 = { | ||
| 396 | @@ -1461,6 +1461,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { | ||
| 397 | /* gpio2 */ | ||
| 398 | static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { | ||
| 399 | { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ | ||
| 400 | + { .irq = -1 } | ||
| 401 | }; | ||
| 402 | |||
| 403 | static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { | ||
| 404 | @@ -1471,7 +1472,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { | ||
| 405 | .name = "gpio2", | ||
| 406 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 407 | .mpu_irqs = omap242x_gpio2_irqs, | ||
| 408 | - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs), | ||
| 409 | .main_clk = "gpios_fck", | ||
| 410 | .prcm = { | ||
| 411 | .omap2 = { | ||
| 412 | @@ -1492,6 +1492,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { | ||
| 413 | /* gpio3 */ | ||
| 414 | static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { | ||
| 415 | { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ | ||
| 416 | + { .irq = -1 } | ||
| 417 | }; | ||
| 418 | |||
| 419 | static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { | ||
| 420 | @@ -1502,7 +1503,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { | ||
| 421 | .name = "gpio3", | ||
| 422 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 423 | .mpu_irqs = omap242x_gpio3_irqs, | ||
| 424 | - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs), | ||
| 425 | .main_clk = "gpios_fck", | ||
| 426 | .prcm = { | ||
| 427 | .omap2 = { | ||
| 428 | @@ -1523,6 +1523,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { | ||
| 429 | /* gpio4 */ | ||
| 430 | static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { | ||
| 431 | { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ | ||
| 432 | + { .irq = -1 } | ||
| 433 | }; | ||
| 434 | |||
| 435 | static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { | ||
| 436 | @@ -1533,7 +1534,6 @@ static struct omap_hwmod omap2420_gpio4_hwmod = { | ||
| 437 | .name = "gpio4", | ||
| 438 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 439 | .mpu_irqs = omap242x_gpio4_irqs, | ||
| 440 | - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs), | ||
| 441 | .main_clk = "gpios_fck", | ||
| 442 | .prcm = { | ||
| 443 | .omap2 = { | ||
| 444 | @@ -1580,6 +1580,7 @@ static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { | ||
| 445 | { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
| 446 | { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
| 447 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
| 448 | + { .irq = -1 } | ||
| 449 | }; | ||
| 450 | |||
| 451 | /* dma_system -> L3 */ | ||
| 452 | @@ -1613,7 +1614,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { | ||
| 453 | .name = "dma", | ||
| 454 | .class = &omap2420_dma_hwmod_class, | ||
| 455 | .mpu_irqs = omap2420_dma_system_irqs, | ||
| 456 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs), | ||
| 457 | .main_clk = "core_l3_ck", | ||
| 458 | .slaves = omap2420_dma_system_slaves, | ||
| 459 | .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), | ||
| 460 | @@ -1650,6 +1650,7 @@ static struct omap_hwmod omap2420_mailbox_hwmod; | ||
| 461 | static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { | ||
| 462 | { .name = "dsp", .irq = 26 }, | ||
| 463 | { .name = "iva", .irq = 34 }, | ||
| 464 | + { .irq = -1 } | ||
| 465 | }; | ||
| 466 | |||
| 467 | /* l4_core -> mailbox */ | ||
| 468 | @@ -1669,7 +1670,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { | ||
| 469 | .name = "mailbox", | ||
| 470 | .class = &omap2420_mailbox_hwmod_class, | ||
| 471 | .mpu_irqs = omap2420_mailbox_irqs, | ||
| 472 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mailbox_irqs), | ||
| 473 | .main_clk = "mailboxes_ick", | ||
| 474 | .prcm = { | ||
| 475 | .omap2 = { | ||
| 476 | @@ -1711,6 +1711,7 @@ static struct omap_hwmod_class omap2420_mcspi_class = { | ||
| 477 | /* mcspi1 */ | ||
| 478 | static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { | ||
| 479 | { .irq = 65 }, | ||
| 480 | + { .irq = -1 } | ||
| 481 | }; | ||
| 482 | |||
| 483 | static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { | ||
| 484 | @@ -1735,7 +1736,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | ||
| 485 | static struct omap_hwmod omap2420_mcspi1_hwmod = { | ||
| 486 | .name = "mcspi1_hwmod", | ||
| 487 | .mpu_irqs = omap2420_mcspi1_mpu_irqs, | ||
| 488 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi1_mpu_irqs), | ||
| 489 | .sdma_reqs = omap2420_mcspi1_sdma_reqs, | ||
| 490 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), | ||
| 491 | .main_clk = "mcspi1_fck", | ||
| 492 | @@ -1758,6 +1758,7 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { | ||
| 493 | /* mcspi2 */ | ||
| 494 | static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { | ||
| 495 | { .irq = 66 }, | ||
| 496 | + { .irq = -1 } | ||
| 497 | }; | ||
| 498 | |||
| 499 | static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { | ||
| 500 | @@ -1778,7 +1779,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | ||
| 501 | static struct omap_hwmod omap2420_mcspi2_hwmod = { | ||
| 502 | .name = "mcspi2_hwmod", | ||
| 503 | .mpu_irqs = omap2420_mcspi2_mpu_irqs, | ||
| 504 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi2_mpu_irqs), | ||
| 505 | .sdma_reqs = omap2420_mcspi2_sdma_reqs, | ||
| 506 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), | ||
| 507 | .main_clk = "mcspi2_fck", | ||
| 508 | @@ -1811,6 +1811,7 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { | ||
| 509 | static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { | ||
| 510 | { .name = "tx", .irq = 59 }, | ||
| 511 | { .name = "rx", .irq = 60 }, | ||
| 512 | + { .irq = -1 } | ||
| 513 | }; | ||
| 514 | |||
| 515 | static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { | ||
| 516 | @@ -1836,7 +1837,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { | ||
| 517 | .name = "mcbsp1", | ||
| 518 | .class = &omap2420_mcbsp_hwmod_class, | ||
| 519 | .mpu_irqs = omap2420_mcbsp1_irqs, | ||
| 520 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_irqs), | ||
| 521 | .sdma_reqs = omap2420_mcbsp1_sdma_chs, | ||
| 522 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), | ||
| 523 | .main_clk = "mcbsp1_fck", | ||
| 524 | @@ -1858,6 +1858,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { | ||
| 525 | static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { | ||
| 526 | { .name = "tx", .irq = 62 }, | ||
| 527 | { .name = "rx", .irq = 63 }, | ||
| 528 | + { .irq = -1 } | ||
| 529 | }; | ||
| 530 | |||
| 531 | static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { | ||
| 532 | @@ -1883,7 +1884,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { | ||
| 533 | .name = "mcbsp2", | ||
| 534 | .class = &omap2420_mcbsp_hwmod_class, | ||
| 535 | .mpu_irqs = omap2420_mcbsp2_irqs, | ||
| 536 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_irqs), | ||
| 537 | .sdma_reqs = omap2420_mcbsp2_sdma_chs, | ||
| 538 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), | ||
| 539 | .main_clk = "mcbsp2_fck", | ||
| 540 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 541 | index 9531ef2..2c28468 100644 | ||
| 542 | --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 543 | +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 544 | @@ -369,6 +369,7 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = { | ||
| 545 | static struct omap_hwmod omap2430_timer1_hwmod; | ||
| 546 | static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { | ||
| 547 | { .irq = 37, }, | ||
| 548 | + { .irq = -1 } | ||
| 549 | }; | ||
| 550 | |||
| 551 | static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { | ||
| 552 | @@ -398,7 +399,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = { | ||
| 553 | static struct omap_hwmod omap2430_timer1_hwmod = { | ||
| 554 | .name = "timer1", | ||
| 555 | .mpu_irqs = omap2430_timer1_mpu_irqs, | ||
| 556 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer1_mpu_irqs), | ||
| 557 | .main_clk = "gpt1_fck", | ||
| 558 | .prcm = { | ||
| 559 | .omap2 = { | ||
| 560 | @@ -419,6 +419,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = { | ||
| 561 | static struct omap_hwmod omap2430_timer2_hwmod; | ||
| 562 | static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { | ||
| 563 | { .irq = 38, }, | ||
| 564 | + { .irq = -1 } | ||
| 565 | }; | ||
| 566 | |||
| 567 | /* l4_core -> timer2 */ | ||
| 568 | @@ -439,7 +440,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = { | ||
| 569 | static struct omap_hwmod omap2430_timer2_hwmod = { | ||
| 570 | .name = "timer2", | ||
| 571 | .mpu_irqs = omap2430_timer2_mpu_irqs, | ||
| 572 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer2_mpu_irqs), | ||
| 573 | .main_clk = "gpt2_fck", | ||
| 574 | .prcm = { | ||
| 575 | .omap2 = { | ||
| 576 | @@ -460,6 +460,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = { | ||
| 577 | static struct omap_hwmod omap2430_timer3_hwmod; | ||
| 578 | static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { | ||
| 579 | { .irq = 39, }, | ||
| 580 | + { .irq = -1 } | ||
| 581 | }; | ||
| 582 | |||
| 583 | /* l4_core -> timer3 */ | ||
| 584 | @@ -480,7 +481,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = { | ||
| 585 | static struct omap_hwmod omap2430_timer3_hwmod = { | ||
| 586 | .name = "timer3", | ||
| 587 | .mpu_irqs = omap2430_timer3_mpu_irqs, | ||
| 588 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer3_mpu_irqs), | ||
| 589 | .main_clk = "gpt3_fck", | ||
| 590 | .prcm = { | ||
| 591 | .omap2 = { | ||
| 592 | @@ -501,6 +501,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = { | ||
| 593 | static struct omap_hwmod omap2430_timer4_hwmod; | ||
| 594 | static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { | ||
| 595 | { .irq = 40, }, | ||
| 596 | + { .irq = -1 } | ||
| 597 | }; | ||
| 598 | |||
| 599 | /* l4_core -> timer4 */ | ||
| 600 | @@ -521,7 +522,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = { | ||
| 601 | static struct omap_hwmod omap2430_timer4_hwmod = { | ||
| 602 | .name = "timer4", | ||
| 603 | .mpu_irqs = omap2430_timer4_mpu_irqs, | ||
| 604 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer4_mpu_irqs), | ||
| 605 | .main_clk = "gpt4_fck", | ||
| 606 | .prcm = { | ||
| 607 | .omap2 = { | ||
| 608 | @@ -542,6 +542,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = { | ||
| 609 | static struct omap_hwmod omap2430_timer5_hwmod; | ||
| 610 | static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { | ||
| 611 | { .irq = 41, }, | ||
| 612 | + { .irq = -1 } | ||
| 613 | }; | ||
| 614 | |||
| 615 | /* l4_core -> timer5 */ | ||
| 616 | @@ -562,7 +563,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = { | ||
| 617 | static struct omap_hwmod omap2430_timer5_hwmod = { | ||
| 618 | .name = "timer5", | ||
| 619 | .mpu_irqs = omap2430_timer5_mpu_irqs, | ||
| 620 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer5_mpu_irqs), | ||
| 621 | .main_clk = "gpt5_fck", | ||
| 622 | .prcm = { | ||
| 623 | .omap2 = { | ||
| 624 | @@ -583,6 +583,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = { | ||
| 625 | static struct omap_hwmod omap2430_timer6_hwmod; | ||
| 626 | static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { | ||
| 627 | { .irq = 42, }, | ||
| 628 | + { .irq = -1 } | ||
| 629 | }; | ||
| 630 | |||
| 631 | /* l4_core -> timer6 */ | ||
| 632 | @@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = { | ||
| 633 | static struct omap_hwmod omap2430_timer6_hwmod = { | ||
| 634 | .name = "timer6", | ||
| 635 | .mpu_irqs = omap2430_timer6_mpu_irqs, | ||
| 636 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer6_mpu_irqs), | ||
| 637 | .main_clk = "gpt6_fck", | ||
| 638 | .prcm = { | ||
| 639 | .omap2 = { | ||
| 640 | @@ -624,6 +624,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = { | ||
| 641 | static struct omap_hwmod omap2430_timer7_hwmod; | ||
| 642 | static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { | ||
| 643 | { .irq = 43, }, | ||
| 644 | + { .irq = -1 } | ||
| 645 | }; | ||
| 646 | |||
| 647 | /* l4_core -> timer7 */ | ||
| 648 | @@ -644,7 +645,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = { | ||
| 649 | static struct omap_hwmod omap2430_timer7_hwmod = { | ||
| 650 | .name = "timer7", | ||
| 651 | .mpu_irqs = omap2430_timer7_mpu_irqs, | ||
| 652 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer7_mpu_irqs), | ||
| 653 | .main_clk = "gpt7_fck", | ||
| 654 | .prcm = { | ||
| 655 | .omap2 = { | ||
| 656 | @@ -665,6 +665,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = { | ||
| 657 | static struct omap_hwmod omap2430_timer8_hwmod; | ||
| 658 | static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { | ||
| 659 | { .irq = 44, }, | ||
| 660 | + { .irq = -1 } | ||
| 661 | }; | ||
| 662 | |||
| 663 | /* l4_core -> timer8 */ | ||
| 664 | @@ -685,7 +686,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = { | ||
| 665 | static struct omap_hwmod omap2430_timer8_hwmod = { | ||
| 666 | .name = "timer8", | ||
| 667 | .mpu_irqs = omap2430_timer8_mpu_irqs, | ||
| 668 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer8_mpu_irqs), | ||
| 669 | .main_clk = "gpt8_fck", | ||
| 670 | .prcm = { | ||
| 671 | .omap2 = { | ||
| 672 | @@ -706,6 +706,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = { | ||
| 673 | static struct omap_hwmod omap2430_timer9_hwmod; | ||
| 674 | static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { | ||
| 675 | { .irq = 45, }, | ||
| 676 | + { .irq = -1 } | ||
| 677 | }; | ||
| 678 | |||
| 679 | /* l4_core -> timer9 */ | ||
| 680 | @@ -726,7 +727,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = { | ||
| 681 | static struct omap_hwmod omap2430_timer9_hwmod = { | ||
| 682 | .name = "timer9", | ||
| 683 | .mpu_irqs = omap2430_timer9_mpu_irqs, | ||
| 684 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer9_mpu_irqs), | ||
| 685 | .main_clk = "gpt9_fck", | ||
| 686 | .prcm = { | ||
| 687 | .omap2 = { | ||
| 688 | @@ -747,6 +747,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = { | ||
| 689 | static struct omap_hwmod omap2430_timer10_hwmod; | ||
| 690 | static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { | ||
| 691 | { .irq = 46, }, | ||
| 692 | + { .irq = -1 } | ||
| 693 | }; | ||
| 694 | |||
| 695 | /* l4_core -> timer10 */ | ||
| 696 | @@ -767,7 +768,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = { | ||
| 697 | static struct omap_hwmod omap2430_timer10_hwmod = { | ||
| 698 | .name = "timer10", | ||
| 699 | .mpu_irqs = omap2430_timer10_mpu_irqs, | ||
| 700 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer10_mpu_irqs), | ||
| 701 | .main_clk = "gpt10_fck", | ||
| 702 | .prcm = { | ||
| 703 | .omap2 = { | ||
| 704 | @@ -788,6 +788,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = { | ||
| 705 | static struct omap_hwmod omap2430_timer11_hwmod; | ||
| 706 | static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { | ||
| 707 | { .irq = 47, }, | ||
| 708 | + { .irq = -1 } | ||
| 709 | }; | ||
| 710 | |||
| 711 | /* l4_core -> timer11 */ | ||
| 712 | @@ -808,7 +809,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = { | ||
| 713 | static struct omap_hwmod omap2430_timer11_hwmod = { | ||
| 714 | .name = "timer11", | ||
| 715 | .mpu_irqs = omap2430_timer11_mpu_irqs, | ||
| 716 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer11_mpu_irqs), | ||
| 717 | .main_clk = "gpt11_fck", | ||
| 718 | .prcm = { | ||
| 719 | .omap2 = { | ||
| 720 | @@ -829,6 +829,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = { | ||
| 721 | static struct omap_hwmod omap2430_timer12_hwmod; | ||
| 722 | static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { | ||
| 723 | { .irq = 48, }, | ||
| 724 | + { .irq = -1 } | ||
| 725 | }; | ||
| 726 | |||
| 727 | /* l4_core -> timer12 */ | ||
| 728 | @@ -849,7 +850,6 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = { | ||
| 729 | static struct omap_hwmod omap2430_timer12_hwmod = { | ||
| 730 | .name = "timer12", | ||
| 731 | .mpu_irqs = omap2430_timer12_mpu_irqs, | ||
| 732 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_timer12_mpu_irqs), | ||
| 733 | .main_clk = "gpt12_fck", | ||
| 734 | .prcm = { | ||
| 735 | .omap2 = { | ||
| 736 | @@ -950,6 +950,7 @@ static struct omap_hwmod_class uart_class = { | ||
| 737 | |||
| 738 | static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { | ||
| 739 | { .irq = INT_24XX_UART1_IRQ, }, | ||
| 740 | + { .irq = -1 } | ||
| 741 | }; | ||
| 742 | |||
| 743 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | ||
| 744 | @@ -964,7 +965,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { | ||
| 745 | static struct omap_hwmod omap2430_uart1_hwmod = { | ||
| 746 | .name = "uart1", | ||
| 747 | .mpu_irqs = uart1_mpu_irqs, | ||
| 748 | - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), | ||
| 749 | .sdma_reqs = uart1_sdma_reqs, | ||
| 750 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | ||
| 751 | .main_clk = "uart1_fck", | ||
| 752 | @@ -987,6 +987,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { | ||
| 753 | |||
| 754 | static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { | ||
| 755 | { .irq = INT_24XX_UART2_IRQ, }, | ||
| 756 | + { .irq = -1 } | ||
| 757 | }; | ||
| 758 | |||
| 759 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | ||
| 760 | @@ -1001,7 +1002,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { | ||
| 761 | static struct omap_hwmod omap2430_uart2_hwmod = { | ||
| 762 | .name = "uart2", | ||
| 763 | .mpu_irqs = uart2_mpu_irqs, | ||
| 764 | - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), | ||
| 765 | .sdma_reqs = uart2_sdma_reqs, | ||
| 766 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | ||
| 767 | .main_clk = "uart2_fck", | ||
| 768 | @@ -1024,6 +1024,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { | ||
| 769 | |||
| 770 | static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { | ||
| 771 | { .irq = INT_24XX_UART3_IRQ, }, | ||
| 772 | + { .irq = -1 } | ||
| 773 | }; | ||
| 774 | |||
| 775 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | ||
| 776 | @@ -1038,7 +1039,6 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { | ||
| 777 | static struct omap_hwmod omap2430_uart3_hwmod = { | ||
| 778 | .name = "uart3", | ||
| 779 | .mpu_irqs = uart3_mpu_irqs, | ||
| 780 | - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), | ||
| 781 | .sdma_reqs = uart3_sdma_reqs, | ||
| 782 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | ||
| 783 | .main_clk = "uart3_fck", | ||
| 784 | @@ -1152,6 +1152,7 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { | ||
| 785 | |||
| 786 | static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { | ||
| 787 | { .irq = 25 }, | ||
| 788 | + { .irq = -1 } | ||
| 789 | }; | ||
| 790 | |||
| 791 | /* l4_core -> dss_dispc */ | ||
| 792 | @@ -1172,7 +1173,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = { | ||
| 793 | .name = "dss_dispc", | ||
| 794 | .class = &omap2430_dispc_hwmod_class, | ||
| 795 | .mpu_irqs = omap2430_dispc_irqs, | ||
| 796 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dispc_irqs), | ||
| 797 | .main_clk = "dss1_fck", | ||
| 798 | .prcm = { | ||
| 799 | .omap2 = { | ||
| 800 | @@ -1304,6 +1304,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { | ||
| 801 | |||
| 802 | static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { | ||
| 803 | { .irq = INT_24XX_I2C1_IRQ, }, | ||
| 804 | + { .irq = -1 } | ||
| 805 | }; | ||
| 806 | |||
| 807 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | ||
| 808 | @@ -1318,7 +1319,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { | ||
| 809 | static struct omap_hwmod omap2430_i2c1_hwmod = { | ||
| 810 | .name = "i2c1", | ||
| 811 | .mpu_irqs = i2c1_mpu_irqs, | ||
| 812 | - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), | ||
| 813 | .sdma_reqs = i2c1_sdma_reqs, | ||
| 814 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | ||
| 815 | .main_clk = "i2chs1_fck", | ||
| 816 | @@ -1350,6 +1350,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { | ||
| 817 | |||
| 818 | static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { | ||
| 819 | { .irq = INT_24XX_I2C2_IRQ, }, | ||
| 820 | + { .irq = -1 } | ||
| 821 | }; | ||
| 822 | |||
| 823 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | ||
| 824 | @@ -1364,7 +1365,6 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { | ||
| 825 | static struct omap_hwmod omap2430_i2c2_hwmod = { | ||
| 826 | .name = "i2c2", | ||
| 827 | .mpu_irqs = i2c2_mpu_irqs, | ||
| 828 | - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), | ||
| 829 | .sdma_reqs = i2c2_sdma_reqs, | ||
| 830 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | ||
| 831 | .main_clk = "i2chs2_fck", | ||
| 832 | @@ -1504,6 +1504,7 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = { | ||
| 833 | /* gpio1 */ | ||
| 834 | static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { | ||
| 835 | { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ | ||
| 836 | + { .irq = -1 } | ||
| 837 | }; | ||
| 838 | |||
| 839 | static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { | ||
| 840 | @@ -1514,7 +1515,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { | ||
| 841 | .name = "gpio1", | ||
| 842 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 843 | .mpu_irqs = omap243x_gpio1_irqs, | ||
| 844 | - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio1_irqs), | ||
| 845 | .main_clk = "gpios_fck", | ||
| 846 | .prcm = { | ||
| 847 | .omap2 = { | ||
| 848 | @@ -1535,6 +1535,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { | ||
| 849 | /* gpio2 */ | ||
| 850 | static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { | ||
| 851 | { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ | ||
| 852 | + { .irq = -1 } | ||
| 853 | }; | ||
| 854 | |||
| 855 | static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { | ||
| 856 | @@ -1545,7 +1546,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { | ||
| 857 | .name = "gpio2", | ||
| 858 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 859 | .mpu_irqs = omap243x_gpio2_irqs, | ||
| 860 | - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio2_irqs), | ||
| 861 | .main_clk = "gpios_fck", | ||
| 862 | .prcm = { | ||
| 863 | .omap2 = { | ||
| 864 | @@ -1566,6 +1566,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { | ||
| 865 | /* gpio3 */ | ||
| 866 | static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { | ||
| 867 | { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ | ||
| 868 | + { .irq = -1 } | ||
| 869 | }; | ||
| 870 | |||
| 871 | static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { | ||
| 872 | @@ -1576,7 +1577,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { | ||
| 873 | .name = "gpio3", | ||
| 874 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 875 | .mpu_irqs = omap243x_gpio3_irqs, | ||
| 876 | - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio3_irqs), | ||
| 877 | .main_clk = "gpios_fck", | ||
| 878 | .prcm = { | ||
| 879 | .omap2 = { | ||
| 880 | @@ -1597,6 +1597,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { | ||
| 881 | /* gpio4 */ | ||
| 882 | static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { | ||
| 883 | { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ | ||
| 884 | + { .irq = -1 } | ||
| 885 | }; | ||
| 886 | |||
| 887 | static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { | ||
| 888 | @@ -1607,7 +1608,6 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { | ||
| 889 | .name = "gpio4", | ||
| 890 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 891 | .mpu_irqs = omap243x_gpio4_irqs, | ||
| 892 | - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio4_irqs), | ||
| 893 | .main_clk = "gpios_fck", | ||
| 894 | .prcm = { | ||
| 895 | .omap2 = { | ||
| 896 | @@ -1628,6 +1628,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { | ||
| 897 | /* gpio5 */ | ||
| 898 | static struct omap_hwmod_irq_info omap243x_gpio5_irqs[] = { | ||
| 899 | { .irq = 33 }, /* INT_24XX_GPIO_BANK5 */ | ||
| 900 | + { .irq = -1 } | ||
| 901 | }; | ||
| 902 | |||
| 903 | static struct omap_hwmod_ocp_if *omap2430_gpio5_slaves[] = { | ||
| 904 | @@ -1638,7 +1639,6 @@ static struct omap_hwmod omap2430_gpio5_hwmod = { | ||
| 905 | .name = "gpio5", | ||
| 906 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 907 | .mpu_irqs = omap243x_gpio5_irqs, | ||
| 908 | - .mpu_irqs_cnt = ARRAY_SIZE(omap243x_gpio5_irqs), | ||
| 909 | .main_clk = "gpio5_fck", | ||
| 910 | .prcm = { | ||
| 911 | .omap2 = { | ||
| 912 | @@ -1685,6 +1685,7 @@ static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { | ||
| 913 | { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
| 914 | { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
| 915 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
| 916 | + { .irq = -1 } | ||
| 917 | }; | ||
| 918 | |||
| 919 | /* dma_system -> L3 */ | ||
| 920 | @@ -1718,7 +1719,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { | ||
| 921 | .name = "dma", | ||
| 922 | .class = &omap2430_dma_hwmod_class, | ||
| 923 | .mpu_irqs = omap2430_dma_system_irqs, | ||
| 924 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_dma_system_irqs), | ||
| 925 | .main_clk = "core_l3_ck", | ||
| 926 | .slaves = omap2430_dma_system_slaves, | ||
| 927 | .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), | ||
| 928 | @@ -1754,6 +1754,7 @@ static struct omap_hwmod_class omap2430_mailbox_hwmod_class = { | ||
| 929 | static struct omap_hwmod omap2430_mailbox_hwmod; | ||
| 930 | static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { | ||
| 931 | { .irq = 26 }, | ||
| 932 | + { .irq = -1 } | ||
| 933 | }; | ||
| 934 | |||
| 935 | /* l4_core -> mailbox */ | ||
| 936 | @@ -1773,7 +1774,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { | ||
| 937 | .name = "mailbox", | ||
| 938 | .class = &omap2430_mailbox_hwmod_class, | ||
| 939 | .mpu_irqs = omap2430_mailbox_irqs, | ||
| 940 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mailbox_irqs), | ||
| 941 | .main_clk = "mailboxes_ick", | ||
| 942 | .prcm = { | ||
| 943 | .omap2 = { | ||
| 944 | @@ -1815,6 +1815,7 @@ static struct omap_hwmod_class omap2430_mcspi_class = { | ||
| 945 | /* mcspi1 */ | ||
| 946 | static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { | ||
| 947 | { .irq = 65 }, | ||
| 948 | + { .irq = -1 } | ||
| 949 | }; | ||
| 950 | |||
| 951 | static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { | ||
| 952 | @@ -1839,7 +1840,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | ||
| 953 | static struct omap_hwmod omap2430_mcspi1_hwmod = { | ||
| 954 | .name = "mcspi1_hwmod", | ||
| 955 | .mpu_irqs = omap2430_mcspi1_mpu_irqs, | ||
| 956 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi1_mpu_irqs), | ||
| 957 | .sdma_reqs = omap2430_mcspi1_sdma_reqs, | ||
| 958 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), | ||
| 959 | .main_clk = "mcspi1_fck", | ||
| 960 | @@ -1862,6 +1862,7 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { | ||
| 961 | /* mcspi2 */ | ||
| 962 | static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { | ||
| 963 | { .irq = 66 }, | ||
| 964 | + { .irq = -1 } | ||
| 965 | }; | ||
| 966 | |||
| 967 | static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { | ||
| 968 | @@ -1882,7 +1883,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | ||
| 969 | static struct omap_hwmod omap2430_mcspi2_hwmod = { | ||
| 970 | .name = "mcspi2_hwmod", | ||
| 971 | .mpu_irqs = omap2430_mcspi2_mpu_irqs, | ||
| 972 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi2_mpu_irqs), | ||
| 973 | .sdma_reqs = omap2430_mcspi2_sdma_reqs, | ||
| 974 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), | ||
| 975 | .main_clk = "mcspi2_fck", | ||
| 976 | @@ -1905,6 +1905,7 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { | ||
| 977 | /* mcspi3 */ | ||
| 978 | static struct omap_hwmod_irq_info omap2430_mcspi3_mpu_irqs[] = { | ||
| 979 | { .irq = 91 }, | ||
| 980 | + { .irq = -1 } | ||
| 981 | }; | ||
| 982 | |||
| 983 | static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { | ||
| 984 | @@ -1925,7 +1926,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { | ||
| 985 | static struct omap_hwmod omap2430_mcspi3_hwmod = { | ||
| 986 | .name = "mcspi3_hwmod", | ||
| 987 | .mpu_irqs = omap2430_mcspi3_mpu_irqs, | ||
| 988 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcspi3_mpu_irqs), | ||
| 989 | .sdma_reqs = omap2430_mcspi3_sdma_reqs, | ||
| 990 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), | ||
| 991 | .main_clk = "mcspi3_fck", | ||
| 992 | @@ -1970,12 +1970,12 @@ static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = { | ||
| 993 | |||
| 994 | { .name = "mc", .irq = 92 }, | ||
| 995 | { .name = "dma", .irq = 93 }, | ||
| 996 | + { .irq = -1 } | ||
| 997 | }; | ||
| 998 | |||
| 999 | static struct omap_hwmod omap2430_usbhsotg_hwmod = { | ||
| 1000 | .name = "usb_otg_hs", | ||
| 1001 | .mpu_irqs = omap2430_usbhsotg_mpu_irqs, | ||
| 1002 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_usbhsotg_mpu_irqs), | ||
| 1003 | .main_clk = "usbhs_ick", | ||
| 1004 | .prcm = { | ||
| 1005 | .omap2 = { | ||
| 1006 | @@ -2025,6 +2025,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { | ||
| 1007 | { .name = "rx", .irq = 60 }, | ||
| 1008 | { .name = "ovr", .irq = 61 }, | ||
| 1009 | { .name = "common", .irq = 64 }, | ||
| 1010 | + { .irq = -1 } | ||
| 1011 | }; | ||
| 1012 | |||
| 1013 | static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { | ||
| 1014 | @@ -2050,7 +2051,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { | ||
| 1015 | .name = "mcbsp1", | ||
| 1016 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 1017 | .mpu_irqs = omap2430_mcbsp1_irqs, | ||
| 1018 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_irqs), | ||
| 1019 | .sdma_reqs = omap2430_mcbsp1_sdma_chs, | ||
| 1020 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), | ||
| 1021 | .main_clk = "mcbsp1_fck", | ||
| 1022 | @@ -2073,6 +2073,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { | ||
| 1023 | { .name = "tx", .irq = 62 }, | ||
| 1024 | { .name = "rx", .irq = 63 }, | ||
| 1025 | { .name = "common", .irq = 16 }, | ||
| 1026 | + { .irq = -1 } | ||
| 1027 | }; | ||
| 1028 | |||
| 1029 | static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { | ||
| 1030 | @@ -2098,7 +2099,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { | ||
| 1031 | .name = "mcbsp2", | ||
| 1032 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 1033 | .mpu_irqs = omap2430_mcbsp2_irqs, | ||
| 1034 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_irqs), | ||
| 1035 | .sdma_reqs = omap2430_mcbsp2_sdma_chs, | ||
| 1036 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), | ||
| 1037 | .main_clk = "mcbsp2_fck", | ||
| 1038 | @@ -2121,6 +2121,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { | ||
| 1039 | { .name = "tx", .irq = 89 }, | ||
| 1040 | { .name = "rx", .irq = 90 }, | ||
| 1041 | { .name = "common", .irq = 17 }, | ||
| 1042 | + { .irq = -1 } | ||
| 1043 | }; | ||
| 1044 | |||
| 1045 | static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { | ||
| 1046 | @@ -2156,7 +2157,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { | ||
| 1047 | .name = "mcbsp3", | ||
| 1048 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 1049 | .mpu_irqs = omap2430_mcbsp3_irqs, | ||
| 1050 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_irqs), | ||
| 1051 | .sdma_reqs = omap2430_mcbsp3_sdma_chs, | ||
| 1052 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), | ||
| 1053 | .main_clk = "mcbsp3_fck", | ||
| 1054 | @@ -2179,6 +2179,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { | ||
| 1055 | { .name = "tx", .irq = 54 }, | ||
| 1056 | { .name = "rx", .irq = 55 }, | ||
| 1057 | { .name = "common", .irq = 18 }, | ||
| 1058 | + { .irq = -1 } | ||
| 1059 | }; | ||
| 1060 | |||
| 1061 | static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { | ||
| 1062 | @@ -2214,7 +2215,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { | ||
| 1063 | .name = "mcbsp4", | ||
| 1064 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 1065 | .mpu_irqs = omap2430_mcbsp4_irqs, | ||
| 1066 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_irqs), | ||
| 1067 | .sdma_reqs = omap2430_mcbsp4_sdma_chs, | ||
| 1068 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), | ||
| 1069 | .main_clk = "mcbsp4_fck", | ||
| 1070 | @@ -2237,6 +2237,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { | ||
| 1071 | { .name = "tx", .irq = 81 }, | ||
| 1072 | { .name = "rx", .irq = 82 }, | ||
| 1073 | { .name = "common", .irq = 19 }, | ||
| 1074 | + { .irq = -1 } | ||
| 1075 | }; | ||
| 1076 | |||
| 1077 | static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { | ||
| 1078 | @@ -2272,7 +2273,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { | ||
| 1079 | .name = "mcbsp5", | ||
| 1080 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 1081 | .mpu_irqs = omap2430_mcbsp5_irqs, | ||
| 1082 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_irqs), | ||
| 1083 | .sdma_reqs = omap2430_mcbsp5_sdma_chs, | ||
| 1084 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), | ||
| 1085 | .main_clk = "mcbsp5_fck", | ||
| 1086 | @@ -2312,6 +2312,7 @@ static struct omap_hwmod_class omap2430_mmc_class = { | ||
| 1087 | |||
| 1088 | static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { | ||
| 1089 | { .irq = 83 }, | ||
| 1090 | + { .irq = -1 } | ||
| 1091 | }; | ||
| 1092 | |||
| 1093 | static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { | ||
| 1094 | @@ -2335,7 +2336,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { | ||
| 1095 | .name = "mmc1", | ||
| 1096 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1097 | .mpu_irqs = omap2430_mmc1_mpu_irqs, | ||
| 1098 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc1_mpu_irqs), | ||
| 1099 | .sdma_reqs = omap2430_mmc1_sdma_reqs, | ||
| 1100 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), | ||
| 1101 | .opt_clks = omap2430_mmc1_opt_clks, | ||
| 1102 | @@ -2361,6 +2361,7 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { | ||
| 1103 | |||
| 1104 | static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { | ||
| 1105 | { .irq = 86 }, | ||
| 1106 | + { .irq = -1 } | ||
| 1107 | }; | ||
| 1108 | |||
| 1109 | static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { | ||
| 1110 | @@ -2380,7 +2381,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { | ||
| 1111 | .name = "mmc2", | ||
| 1112 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1113 | .mpu_irqs = omap2430_mmc2_mpu_irqs, | ||
| 1114 | - .mpu_irqs_cnt = ARRAY_SIZE(omap2430_mmc2_mpu_irqs), | ||
| 1115 | .sdma_reqs = omap2430_mmc2_sdma_reqs, | ||
| 1116 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), | ||
| 1117 | .opt_clks = omap2430_mmc2_opt_clks, | ||
| 1118 | diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1119 | index 791f9b2..cc178b5 100644 | ||
| 1120 | --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1121 | +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1122 | @@ -103,6 +103,7 @@ static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_per = { | ||
| 1123 | static struct omap_hwmod_irq_info omap3xxx_l3_main_irqs[] = { | ||
| 1124 | { .irq = INT_34XX_L3_DBG_IRQ }, | ||
| 1125 | { .irq = INT_34XX_L3_APP_IRQ }, | ||
| 1126 | + { .irq = -1 } | ||
| 1127 | }; | ||
| 1128 | |||
| 1129 | static struct omap_hwmod_addr_space omap3xxx_l3_main_addrs[] = { | ||
| 1130 | @@ -151,7 +152,6 @@ static struct omap_hwmod omap3xxx_l3_main_hwmod = { | ||
| 1131 | .name = "l3_main", | ||
| 1132 | .class = &l3_hwmod_class, | ||
| 1133 | .mpu_irqs = omap3xxx_l3_main_irqs, | ||
| 1134 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_l3_main_irqs), | ||
| 1135 | .masters = omap3xxx_l3_main_masters, | ||
| 1136 | .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), | ||
| 1137 | .slaves = omap3xxx_l3_main_slaves, | ||
| 1138 | @@ -574,6 +574,7 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { | ||
| 1139 | static struct omap_hwmod omap3xxx_timer1_hwmod; | ||
| 1140 | static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { | ||
| 1141 | { .irq = 37, }, | ||
| 1142 | + { .irq = -1 } | ||
| 1143 | }; | ||
| 1144 | |||
| 1145 | static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { | ||
| 1146 | @@ -603,7 +604,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = { | ||
| 1147 | static struct omap_hwmod omap3xxx_timer1_hwmod = { | ||
| 1148 | .name = "timer1", | ||
| 1149 | .mpu_irqs = omap3xxx_timer1_mpu_irqs, | ||
| 1150 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer1_mpu_irqs), | ||
| 1151 | .main_clk = "gpt1_fck", | ||
| 1152 | .prcm = { | ||
| 1153 | .omap2 = { | ||
| 1154 | @@ -624,6 +624,7 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { | ||
| 1155 | static struct omap_hwmod omap3xxx_timer2_hwmod; | ||
| 1156 | static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { | ||
| 1157 | { .irq = 38, }, | ||
| 1158 | + { .irq = -1 } | ||
| 1159 | }; | ||
| 1160 | |||
| 1161 | static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { | ||
| 1162 | @@ -653,7 +654,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = { | ||
| 1163 | static struct omap_hwmod omap3xxx_timer2_hwmod = { | ||
| 1164 | .name = "timer2", | ||
| 1165 | .mpu_irqs = omap3xxx_timer2_mpu_irqs, | ||
| 1166 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer2_mpu_irqs), | ||
| 1167 | .main_clk = "gpt2_fck", | ||
| 1168 | .prcm = { | ||
| 1169 | .omap2 = { | ||
| 1170 | @@ -674,6 +674,7 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { | ||
| 1171 | static struct omap_hwmod omap3xxx_timer3_hwmod; | ||
| 1172 | static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { | ||
| 1173 | { .irq = 39, }, | ||
| 1174 | + { .irq = -1 } | ||
| 1175 | }; | ||
| 1176 | |||
| 1177 | static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { | ||
| 1178 | @@ -703,7 +704,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = { | ||
| 1179 | static struct omap_hwmod omap3xxx_timer3_hwmod = { | ||
| 1180 | .name = "timer3", | ||
| 1181 | .mpu_irqs = omap3xxx_timer3_mpu_irqs, | ||
| 1182 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer3_mpu_irqs), | ||
| 1183 | .main_clk = "gpt3_fck", | ||
| 1184 | .prcm = { | ||
| 1185 | .omap2 = { | ||
| 1186 | @@ -724,6 +724,7 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { | ||
| 1187 | static struct omap_hwmod omap3xxx_timer4_hwmod; | ||
| 1188 | static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { | ||
| 1189 | { .irq = 40, }, | ||
| 1190 | + { .irq = -1 } | ||
| 1191 | }; | ||
| 1192 | |||
| 1193 | static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { | ||
| 1194 | @@ -753,7 +754,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = { | ||
| 1195 | static struct omap_hwmod omap3xxx_timer4_hwmod = { | ||
| 1196 | .name = "timer4", | ||
| 1197 | .mpu_irqs = omap3xxx_timer4_mpu_irqs, | ||
| 1198 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer4_mpu_irqs), | ||
| 1199 | .main_clk = "gpt4_fck", | ||
| 1200 | .prcm = { | ||
| 1201 | .omap2 = { | ||
| 1202 | @@ -774,6 +774,7 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { | ||
| 1203 | static struct omap_hwmod omap3xxx_timer5_hwmod; | ||
| 1204 | static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { | ||
| 1205 | { .irq = 41, }, | ||
| 1206 | + { .irq = -1 } | ||
| 1207 | }; | ||
| 1208 | |||
| 1209 | static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { | ||
| 1210 | @@ -803,7 +804,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = { | ||
| 1211 | static struct omap_hwmod omap3xxx_timer5_hwmod = { | ||
| 1212 | .name = "timer5", | ||
| 1213 | .mpu_irqs = omap3xxx_timer5_mpu_irqs, | ||
| 1214 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer5_mpu_irqs), | ||
| 1215 | .main_clk = "gpt5_fck", | ||
| 1216 | .prcm = { | ||
| 1217 | .omap2 = { | ||
| 1218 | @@ -824,6 +824,7 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { | ||
| 1219 | static struct omap_hwmod omap3xxx_timer6_hwmod; | ||
| 1220 | static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { | ||
| 1221 | { .irq = 42, }, | ||
| 1222 | + { .irq = -1 } | ||
| 1223 | }; | ||
| 1224 | |||
| 1225 | static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { | ||
| 1226 | @@ -853,7 +854,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = { | ||
| 1227 | static struct omap_hwmod omap3xxx_timer6_hwmod = { | ||
| 1228 | .name = "timer6", | ||
| 1229 | .mpu_irqs = omap3xxx_timer6_mpu_irqs, | ||
| 1230 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer6_mpu_irqs), | ||
| 1231 | .main_clk = "gpt6_fck", | ||
| 1232 | .prcm = { | ||
| 1233 | .omap2 = { | ||
| 1234 | @@ -874,6 +874,7 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { | ||
| 1235 | static struct omap_hwmod omap3xxx_timer7_hwmod; | ||
| 1236 | static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { | ||
| 1237 | { .irq = 43, }, | ||
| 1238 | + { .irq = -1 } | ||
| 1239 | }; | ||
| 1240 | |||
| 1241 | static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { | ||
| 1242 | @@ -903,7 +904,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = { | ||
| 1243 | static struct omap_hwmod omap3xxx_timer7_hwmod = { | ||
| 1244 | .name = "timer7", | ||
| 1245 | .mpu_irqs = omap3xxx_timer7_mpu_irqs, | ||
| 1246 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer7_mpu_irqs), | ||
| 1247 | .main_clk = "gpt7_fck", | ||
| 1248 | .prcm = { | ||
| 1249 | .omap2 = { | ||
| 1250 | @@ -924,6 +924,7 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { | ||
| 1251 | static struct omap_hwmod omap3xxx_timer8_hwmod; | ||
| 1252 | static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { | ||
| 1253 | { .irq = 44, }, | ||
| 1254 | + { .irq = -1 } | ||
| 1255 | }; | ||
| 1256 | |||
| 1257 | static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { | ||
| 1258 | @@ -953,7 +954,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = { | ||
| 1259 | static struct omap_hwmod omap3xxx_timer8_hwmod = { | ||
| 1260 | .name = "timer8", | ||
| 1261 | .mpu_irqs = omap3xxx_timer8_mpu_irqs, | ||
| 1262 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer8_mpu_irqs), | ||
| 1263 | .main_clk = "gpt8_fck", | ||
| 1264 | .prcm = { | ||
| 1265 | .omap2 = { | ||
| 1266 | @@ -974,6 +974,7 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { | ||
| 1267 | static struct omap_hwmod omap3xxx_timer9_hwmod; | ||
| 1268 | static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { | ||
| 1269 | { .irq = 45, }, | ||
| 1270 | + { .irq = -1 } | ||
| 1271 | }; | ||
| 1272 | |||
| 1273 | static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { | ||
| 1274 | @@ -1003,7 +1004,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = { | ||
| 1275 | static struct omap_hwmod omap3xxx_timer9_hwmod = { | ||
| 1276 | .name = "timer9", | ||
| 1277 | .mpu_irqs = omap3xxx_timer9_mpu_irqs, | ||
| 1278 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer9_mpu_irqs), | ||
| 1279 | .main_clk = "gpt9_fck", | ||
| 1280 | .prcm = { | ||
| 1281 | .omap2 = { | ||
| 1282 | @@ -1024,6 +1024,7 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { | ||
| 1283 | static struct omap_hwmod omap3xxx_timer10_hwmod; | ||
| 1284 | static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { | ||
| 1285 | { .irq = 46, }, | ||
| 1286 | + { .irq = -1 } | ||
| 1287 | }; | ||
| 1288 | |||
| 1289 | /* l4_core -> timer10 */ | ||
| 1290 | @@ -1044,7 +1045,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = { | ||
| 1291 | static struct omap_hwmod omap3xxx_timer10_hwmod = { | ||
| 1292 | .name = "timer10", | ||
| 1293 | .mpu_irqs = omap3xxx_timer10_mpu_irqs, | ||
| 1294 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer10_mpu_irqs), | ||
| 1295 | .main_clk = "gpt10_fck", | ||
| 1296 | .prcm = { | ||
| 1297 | .omap2 = { | ||
| 1298 | @@ -1065,6 +1065,7 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { | ||
| 1299 | static struct omap_hwmod omap3xxx_timer11_hwmod; | ||
| 1300 | static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { | ||
| 1301 | { .irq = 47, }, | ||
| 1302 | + { .irq = -1 } | ||
| 1303 | }; | ||
| 1304 | |||
| 1305 | /* l4_core -> timer11 */ | ||
| 1306 | @@ -1085,7 +1086,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = { | ||
| 1307 | static struct omap_hwmod omap3xxx_timer11_hwmod = { | ||
| 1308 | .name = "timer11", | ||
| 1309 | .mpu_irqs = omap3xxx_timer11_mpu_irqs, | ||
| 1310 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer11_mpu_irqs), | ||
| 1311 | .main_clk = "gpt11_fck", | ||
| 1312 | .prcm = { | ||
| 1313 | .omap2 = { | ||
| 1314 | @@ -1106,6 +1106,7 @@ static struct omap_hwmod omap3xxx_timer11_hwmod = { | ||
| 1315 | static struct omap_hwmod omap3xxx_timer12_hwmod; | ||
| 1316 | static struct omap_hwmod_irq_info omap3xxx_timer12_mpu_irqs[] = { | ||
| 1317 | { .irq = 95, }, | ||
| 1318 | + { .irq = -1 } | ||
| 1319 | }; | ||
| 1320 | |||
| 1321 | static struct omap_hwmod_addr_space omap3xxx_timer12_addrs[] = { | ||
| 1322 | @@ -1135,7 +1136,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer12_slaves[] = { | ||
| 1323 | static struct omap_hwmod omap3xxx_timer12_hwmod = { | ||
| 1324 | .name = "timer12", | ||
| 1325 | .mpu_irqs = omap3xxx_timer12_mpu_irqs, | ||
| 1326 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_timer12_mpu_irqs), | ||
| 1327 | .main_clk = "gpt12_fck", | ||
| 1328 | .prcm = { | ||
| 1329 | .omap2 = { | ||
| 1330 | @@ -1256,6 +1256,7 @@ static struct omap_hwmod_class uart_class = { | ||
| 1331 | |||
| 1332 | static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { | ||
| 1333 | { .irq = INT_24XX_UART1_IRQ, }, | ||
| 1334 | + { .irq = -1 } | ||
| 1335 | }; | ||
| 1336 | |||
| 1337 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | ||
| 1338 | @@ -1270,7 +1271,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { | ||
| 1339 | static struct omap_hwmod omap3xxx_uart1_hwmod = { | ||
| 1340 | .name = "uart1", | ||
| 1341 | .mpu_irqs = uart1_mpu_irqs, | ||
| 1342 | - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), | ||
| 1343 | .sdma_reqs = uart1_sdma_reqs, | ||
| 1344 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | ||
| 1345 | .main_clk = "uart1_fck", | ||
| 1346 | @@ -1293,6 +1293,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { | ||
| 1347 | |||
| 1348 | static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { | ||
| 1349 | { .irq = INT_24XX_UART2_IRQ, }, | ||
| 1350 | + { .irq = -1 } | ||
| 1351 | }; | ||
| 1352 | |||
| 1353 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | ||
| 1354 | @@ -1307,7 +1308,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { | ||
| 1355 | static struct omap_hwmod omap3xxx_uart2_hwmod = { | ||
| 1356 | .name = "uart2", | ||
| 1357 | .mpu_irqs = uart2_mpu_irqs, | ||
| 1358 | - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), | ||
| 1359 | .sdma_reqs = uart2_sdma_reqs, | ||
| 1360 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | ||
| 1361 | .main_clk = "uart2_fck", | ||
| 1362 | @@ -1330,6 +1330,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { | ||
| 1363 | |||
| 1364 | static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { | ||
| 1365 | { .irq = INT_24XX_UART3_IRQ, }, | ||
| 1366 | + { .irq = -1 } | ||
| 1367 | }; | ||
| 1368 | |||
| 1369 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | ||
| 1370 | @@ -1344,7 +1345,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { | ||
| 1371 | static struct omap_hwmod omap3xxx_uart3_hwmod = { | ||
| 1372 | .name = "uart3", | ||
| 1373 | .mpu_irqs = uart3_mpu_irqs, | ||
| 1374 | - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), | ||
| 1375 | .sdma_reqs = uart3_sdma_reqs, | ||
| 1376 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | ||
| 1377 | .main_clk = "uart3_fck", | ||
| 1378 | @@ -1367,6 +1367,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { | ||
| 1379 | |||
| 1380 | static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { | ||
| 1381 | { .irq = INT_36XX_UART4_IRQ, }, | ||
| 1382 | + { .irq = -1 } | ||
| 1383 | }; | ||
| 1384 | |||
| 1385 | static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { | ||
| 1386 | @@ -1381,7 +1382,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { | ||
| 1387 | static struct omap_hwmod omap3xxx_uart4_hwmod = { | ||
| 1388 | .name = "uart4", | ||
| 1389 | .mpu_irqs = uart4_mpu_irqs, | ||
| 1390 | - .mpu_irqs_cnt = ARRAY_SIZE(uart4_mpu_irqs), | ||
| 1391 | .sdma_reqs = uart4_sdma_reqs, | ||
| 1392 | .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), | ||
| 1393 | .main_clk = "uart4_fck", | ||
| 1394 | @@ -1557,6 +1557,7 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { | ||
| 1395 | |||
| 1396 | static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { | ||
| 1397 | { .irq = 25 }, | ||
| 1398 | + { .irq = -1 } | ||
| 1399 | }; | ||
| 1400 | |||
| 1401 | /* l4_core -> dss_dispc */ | ||
| 1402 | @@ -1584,7 +1585,6 @@ static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { | ||
| 1403 | .name = "dss_dispc", | ||
| 1404 | .class = &omap3xxx_dispc_hwmod_class, | ||
| 1405 | .mpu_irqs = omap3xxx_dispc_irqs, | ||
| 1406 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dispc_irqs), | ||
| 1407 | .main_clk = "dss1_alwon_fck", | ||
| 1408 | .prcm = { | ||
| 1409 | .omap2 = { | ||
| 1410 | @@ -1612,6 +1612,7 @@ static struct omap_hwmod_class omap3xxx_dsi_hwmod_class = { | ||
| 1411 | |||
| 1412 | static struct omap_hwmod_irq_info omap3xxx_dsi1_irqs[] = { | ||
| 1413 | { .irq = 25 }, | ||
| 1414 | + { .irq = -1 } | ||
| 1415 | }; | ||
| 1416 | |||
| 1417 | /* dss_dsi1 */ | ||
| 1418 | @@ -1648,7 +1649,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { | ||
| 1419 | .name = "dss_dsi1", | ||
| 1420 | .class = &omap3xxx_dsi_hwmod_class, | ||
| 1421 | .mpu_irqs = omap3xxx_dsi1_irqs, | ||
| 1422 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dsi1_irqs), | ||
| 1423 | .main_clk = "dss1_alwon_fck", | ||
| 1424 | .prcm = { | ||
| 1425 | .omap2 = { | ||
| 1426 | @@ -1783,6 +1783,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { | ||
| 1427 | |||
| 1428 | static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { | ||
| 1429 | { .irq = INT_24XX_I2C1_IRQ, }, | ||
| 1430 | + { .irq = -1 } | ||
| 1431 | }; | ||
| 1432 | |||
| 1433 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | ||
| 1434 | @@ -1797,7 +1798,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { | ||
| 1435 | static struct omap_hwmod omap3xxx_i2c1_hwmod = { | ||
| 1436 | .name = "i2c1", | ||
| 1437 | .mpu_irqs = i2c1_mpu_irqs, | ||
| 1438 | - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), | ||
| 1439 | .sdma_reqs = i2c1_sdma_reqs, | ||
| 1440 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | ||
| 1441 | .main_clk = "i2c1_fck", | ||
| 1442 | @@ -1825,6 +1825,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { | ||
| 1443 | |||
| 1444 | static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { | ||
| 1445 | { .irq = INT_24XX_I2C2_IRQ, }, | ||
| 1446 | + { .irq = -1 } | ||
| 1447 | }; | ||
| 1448 | |||
| 1449 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | ||
| 1450 | @@ -1839,7 +1840,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { | ||
| 1451 | static struct omap_hwmod omap3xxx_i2c2_hwmod = { | ||
| 1452 | .name = "i2c2", | ||
| 1453 | .mpu_irqs = i2c2_mpu_irqs, | ||
| 1454 | - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), | ||
| 1455 | .sdma_reqs = i2c2_sdma_reqs, | ||
| 1456 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | ||
| 1457 | .main_clk = "i2c2_fck", | ||
| 1458 | @@ -1867,6 +1867,7 @@ static struct omap_i2c_dev_attr i2c3_dev_attr = { | ||
| 1459 | |||
| 1460 | static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { | ||
| 1461 | { .irq = INT_34XX_I2C3_IRQ, }, | ||
| 1462 | + { .irq = -1 } | ||
| 1463 | }; | ||
| 1464 | |||
| 1465 | static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { | ||
| 1466 | @@ -1881,7 +1882,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { | ||
| 1467 | static struct omap_hwmod omap3xxx_i2c3_hwmod = { | ||
| 1468 | .name = "i2c3", | ||
| 1469 | .mpu_irqs = i2c3_mpu_irqs, | ||
| 1470 | - .mpu_irqs_cnt = ARRAY_SIZE(i2c3_mpu_irqs), | ||
| 1471 | .sdma_reqs = i2c3_sdma_reqs, | ||
| 1472 | .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), | ||
| 1473 | .main_clk = "i2c3_fck", | ||
| 1474 | @@ -2034,6 +2034,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { | ||
| 1475 | /* gpio1 */ | ||
| 1476 | static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { | ||
| 1477 | { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ | ||
| 1478 | + { .irq = -1 } | ||
| 1479 | }; | ||
| 1480 | |||
| 1481 | static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { | ||
| 1482 | @@ -2048,7 +2049,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { | ||
| 1483 | .name = "gpio1", | ||
| 1484 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1485 | .mpu_irqs = omap3xxx_gpio1_irqs, | ||
| 1486 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio1_irqs), | ||
| 1487 | .main_clk = "gpio1_ick", | ||
| 1488 | .opt_clks = gpio1_opt_clks, | ||
| 1489 | .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), | ||
| 1490 | @@ -2071,6 +2071,7 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { | ||
| 1491 | /* gpio2 */ | ||
| 1492 | static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { | ||
| 1493 | { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ | ||
| 1494 | + { .irq = -1 } | ||
| 1495 | }; | ||
| 1496 | |||
| 1497 | static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { | ||
| 1498 | @@ -2085,7 +2086,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { | ||
| 1499 | .name = "gpio2", | ||
| 1500 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1501 | .mpu_irqs = omap3xxx_gpio2_irqs, | ||
| 1502 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio2_irqs), | ||
| 1503 | .main_clk = "gpio2_ick", | ||
| 1504 | .opt_clks = gpio2_opt_clks, | ||
| 1505 | .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), | ||
| 1506 | @@ -2108,6 +2108,7 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { | ||
| 1507 | /* gpio3 */ | ||
| 1508 | static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { | ||
| 1509 | { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ | ||
| 1510 | + { .irq = -1 } | ||
| 1511 | }; | ||
| 1512 | |||
| 1513 | static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { | ||
| 1514 | @@ -2122,7 +2123,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { | ||
| 1515 | .name = "gpio3", | ||
| 1516 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1517 | .mpu_irqs = omap3xxx_gpio3_irqs, | ||
| 1518 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio3_irqs), | ||
| 1519 | .main_clk = "gpio3_ick", | ||
| 1520 | .opt_clks = gpio3_opt_clks, | ||
| 1521 | .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), | ||
| 1522 | @@ -2145,6 +2145,7 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { | ||
| 1523 | /* gpio4 */ | ||
| 1524 | static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { | ||
| 1525 | { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ | ||
| 1526 | + { .irq = -1 } | ||
| 1527 | }; | ||
| 1528 | |||
| 1529 | static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { | ||
| 1530 | @@ -2159,7 +2160,6 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = { | ||
| 1531 | .name = "gpio4", | ||
| 1532 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1533 | .mpu_irqs = omap3xxx_gpio4_irqs, | ||
| 1534 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio4_irqs), | ||
| 1535 | .main_clk = "gpio4_ick", | ||
| 1536 | .opt_clks = gpio4_opt_clks, | ||
| 1537 | .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), | ||
| 1538 | @@ -2182,6 +2182,7 @@ static struct omap_hwmod omap3xxx_gpio4_hwmod = { | ||
| 1539 | /* gpio5 */ | ||
| 1540 | static struct omap_hwmod_irq_info omap3xxx_gpio5_irqs[] = { | ||
| 1541 | { .irq = 33 }, /* INT_34XX_GPIO_BANK5 */ | ||
| 1542 | + { .irq = -1 } | ||
| 1543 | }; | ||
| 1544 | |||
| 1545 | static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { | ||
| 1546 | @@ -2196,7 +2197,6 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = { | ||
| 1547 | .name = "gpio5", | ||
| 1548 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1549 | .mpu_irqs = omap3xxx_gpio5_irqs, | ||
| 1550 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio5_irqs), | ||
| 1551 | .main_clk = "gpio5_ick", | ||
| 1552 | .opt_clks = gpio5_opt_clks, | ||
| 1553 | .opt_clks_cnt = ARRAY_SIZE(gpio5_opt_clks), | ||
| 1554 | @@ -2219,6 +2219,7 @@ static struct omap_hwmod omap3xxx_gpio5_hwmod = { | ||
| 1555 | /* gpio6 */ | ||
| 1556 | static struct omap_hwmod_irq_info omap3xxx_gpio6_irqs[] = { | ||
| 1557 | { .irq = 34 }, /* INT_34XX_GPIO_BANK6 */ | ||
| 1558 | + { .irq = -1 } | ||
| 1559 | }; | ||
| 1560 | |||
| 1561 | static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { | ||
| 1562 | @@ -2233,7 +2234,6 @@ static struct omap_hwmod omap3xxx_gpio6_hwmod = { | ||
| 1563 | .name = "gpio6", | ||
| 1564 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1565 | .mpu_irqs = omap3xxx_gpio6_irqs, | ||
| 1566 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_gpio6_irqs), | ||
| 1567 | .main_clk = "gpio6_ick", | ||
| 1568 | .opt_clks = gpio6_opt_clks, | ||
| 1569 | .opt_clks_cnt = ARRAY_SIZE(gpio6_opt_clks), | ||
| 1570 | @@ -2292,6 +2292,7 @@ static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { | ||
| 1571 | { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
| 1572 | { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
| 1573 | { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
| 1574 | + { .irq = -1 } | ||
| 1575 | }; | ||
| 1576 | |||
| 1577 | static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { | ||
| 1578 | @@ -2326,7 +2327,6 @@ static struct omap_hwmod omap3xxx_dma_system_hwmod = { | ||
| 1579 | .name = "dma", | ||
| 1580 | .class = &omap3xxx_dma_hwmod_class, | ||
| 1581 | .mpu_irqs = omap3xxx_dma_system_irqs, | ||
| 1582 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_dma_system_irqs), | ||
| 1583 | .main_clk = "core_l3_ick", | ||
| 1584 | .prcm = { | ||
| 1585 | .omap2 = { | ||
| 1586 | @@ -2371,6 +2371,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { | ||
| 1587 | { .name = "irq", .irq = 16 }, | ||
| 1588 | { .name = "tx", .irq = 59 }, | ||
| 1589 | { .name = "rx", .irq = 60 }, | ||
| 1590 | + { .irq = -1 } | ||
| 1591 | }; | ||
| 1592 | |||
| 1593 | static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { | ||
| 1594 | @@ -2406,7 +2407,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { | ||
| 1595 | .name = "mcbsp1", | ||
| 1596 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 1597 | .mpu_irqs = omap3xxx_mcbsp1_irqs, | ||
| 1598 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_irqs), | ||
| 1599 | .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, | ||
| 1600 | .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), | ||
| 1601 | .main_clk = "mcbsp1_fck", | ||
| 1602 | @@ -2429,6 +2429,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { | ||
| 1603 | { .name = "irq", .irq = 17 }, | ||
| 1604 | { .name = "tx", .irq = 62 }, | ||
| 1605 | { .name = "rx", .irq = 63 }, | ||
| 1606 | + { .irq = -1 } | ||
| 1607 | }; | ||
| 1608 | |||
| 1609 | static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { | ||
| 1610 | @@ -2469,7 +2470,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { | ||
| 1611 | .name = "mcbsp2", | ||
| 1612 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 1613 | .mpu_irqs = omap3xxx_mcbsp2_irqs, | ||
| 1614 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_irqs), | ||
| 1615 | .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, | ||
| 1616 | .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), | ||
| 1617 | .main_clk = "mcbsp2_fck", | ||
| 1618 | @@ -2493,6 +2493,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { | ||
| 1619 | { .name = "irq", .irq = 22 }, | ||
| 1620 | { .name = "tx", .irq = 89 }, | ||
| 1621 | { .name = "rx", .irq = 90 }, | ||
| 1622 | + { .irq = -1 } | ||
| 1623 | }; | ||
| 1624 | |||
| 1625 | static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { | ||
| 1626 | @@ -2532,7 +2533,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { | ||
| 1627 | .name = "mcbsp3", | ||
| 1628 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 1629 | .mpu_irqs = omap3xxx_mcbsp3_irqs, | ||
| 1630 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_irqs), | ||
| 1631 | .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, | ||
| 1632 | .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), | ||
| 1633 | .main_clk = "mcbsp3_fck", | ||
| 1634 | @@ -2556,6 +2556,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = { | ||
| 1635 | { .name = "irq", .irq = 23 }, | ||
| 1636 | { .name = "tx", .irq = 54 }, | ||
| 1637 | { .name = "rx", .irq = 55 }, | ||
| 1638 | + { .irq = -1 } | ||
| 1639 | }; | ||
| 1640 | |||
| 1641 | static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { | ||
| 1642 | @@ -2591,7 +2592,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { | ||
| 1643 | .name = "mcbsp4", | ||
| 1644 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 1645 | .mpu_irqs = omap3xxx_mcbsp4_irqs, | ||
| 1646 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_irqs), | ||
| 1647 | .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, | ||
| 1648 | .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), | ||
| 1649 | .main_clk = "mcbsp4_fck", | ||
| 1650 | @@ -2614,6 +2614,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = { | ||
| 1651 | { .name = "irq", .irq = 27 }, | ||
| 1652 | { .name = "tx", .irq = 81 }, | ||
| 1653 | { .name = "rx", .irq = 82 }, | ||
| 1654 | + { .irq = -1 } | ||
| 1655 | }; | ||
| 1656 | |||
| 1657 | static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { | ||
| 1658 | @@ -2649,7 +2650,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { | ||
| 1659 | .name = "mcbsp5", | ||
| 1660 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 1661 | .mpu_irqs = omap3xxx_mcbsp5_irqs, | ||
| 1662 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_irqs), | ||
| 1663 | .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, | ||
| 1664 | .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), | ||
| 1665 | .main_clk = "mcbsp5_fck", | ||
| 1666 | @@ -2682,6 +2682,7 @@ static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = { | ||
| 1667 | /* mcbsp2_sidetone */ | ||
| 1668 | static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = { | ||
| 1669 | { .name = "irq", .irq = 4 }, | ||
| 1670 | + { .irq = -1 } | ||
| 1671 | }; | ||
| 1672 | |||
| 1673 | static struct omap_hwmod_addr_space omap3xxx_mcbsp2_sidetone_addrs[] = { | ||
| 1674 | @@ -2712,7 +2713,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { | ||
| 1675 | .name = "mcbsp2_sidetone", | ||
| 1676 | .class = &omap3xxx_mcbsp_sidetone_hwmod_class, | ||
| 1677 | .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs, | ||
| 1678 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sidetone_irqs), | ||
| 1679 | .main_clk = "mcbsp2_fck", | ||
| 1680 | .prcm = { | ||
| 1681 | .omap2 = { | ||
| 1682 | @@ -2731,6 +2731,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = { | ||
| 1683 | /* mcbsp3_sidetone */ | ||
| 1684 | static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = { | ||
| 1685 | { .name = "irq", .irq = 5 }, | ||
| 1686 | + { .irq = -1 } | ||
| 1687 | }; | ||
| 1688 | |||
| 1689 | static struct omap_hwmod_addr_space omap3xxx_mcbsp3_sidetone_addrs[] = { | ||
| 1690 | @@ -2761,7 +2762,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = { | ||
| 1691 | .name = "mcbsp3_sidetone", | ||
| 1692 | .class = &omap3xxx_mcbsp_sidetone_hwmod_class, | ||
| 1693 | .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs, | ||
| 1694 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sidetone_irqs), | ||
| 1695 | .main_clk = "mcbsp3_fck", | ||
| 1696 | .prcm = { | ||
| 1697 | .omap2 = { | ||
| 1698 | @@ -2931,6 +2931,7 @@ static struct omap_hwmod_class omap3xxx_mailbox_hwmod_class = { | ||
| 1699 | static struct omap_hwmod omap3xxx_mailbox_hwmod; | ||
| 1700 | static struct omap_hwmod_irq_info omap3xxx_mailbox_irqs[] = { | ||
| 1701 | { .irq = 26 }, | ||
| 1702 | + { .irq = -1 } | ||
| 1703 | }; | ||
| 1704 | |||
| 1705 | static struct omap_hwmod_addr_space omap3xxx_mailbox_addrs[] = { | ||
| 1706 | @@ -2959,7 +2960,6 @@ static struct omap_hwmod omap3xxx_mailbox_hwmod = { | ||
| 1707 | .name = "mailbox", | ||
| 1708 | .class = &omap3xxx_mailbox_hwmod_class, | ||
| 1709 | .mpu_irqs = omap3xxx_mailbox_irqs, | ||
| 1710 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_mailbox_irqs), | ||
| 1711 | .main_clk = "mailboxes_ick", | ||
| 1712 | .prcm = { | ||
| 1713 | .omap2 = { | ||
| 1714 | @@ -3046,6 +3046,7 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { | ||
| 1715 | /* mcspi1 */ | ||
| 1716 | static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { | ||
| 1717 | { .name = "irq", .irq = 65 }, | ||
| 1718 | + { .irq = -1 } | ||
| 1719 | }; | ||
| 1720 | |||
| 1721 | static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { | ||
| 1722 | @@ -3070,7 +3071,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | ||
| 1723 | static struct omap_hwmod omap34xx_mcspi1 = { | ||
| 1724 | .name = "mcspi1", | ||
| 1725 | .mpu_irqs = omap34xx_mcspi1_mpu_irqs, | ||
| 1726 | - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_mpu_irqs), | ||
| 1727 | .sdma_reqs = omap34xx_mcspi1_sdma_reqs, | ||
| 1728 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), | ||
| 1729 | .main_clk = "mcspi1_fck", | ||
| 1730 | @@ -3093,6 +3093,7 @@ static struct omap_hwmod omap34xx_mcspi1 = { | ||
| 1731 | /* mcspi2 */ | ||
| 1732 | static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { | ||
| 1733 | { .name = "irq", .irq = 66 }, | ||
| 1734 | + { .irq = -1 } | ||
| 1735 | }; | ||
| 1736 | |||
| 1737 | static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { | ||
| 1738 | @@ -3113,7 +3114,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | ||
| 1739 | static struct omap_hwmod omap34xx_mcspi2 = { | ||
| 1740 | .name = "mcspi2", | ||
| 1741 | .mpu_irqs = omap34xx_mcspi2_mpu_irqs, | ||
| 1742 | - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_mpu_irqs), | ||
| 1743 | .sdma_reqs = omap34xx_mcspi2_sdma_reqs, | ||
| 1744 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), | ||
| 1745 | .main_clk = "mcspi2_fck", | ||
| 1746 | @@ -3136,6 +3136,7 @@ static struct omap_hwmod omap34xx_mcspi2 = { | ||
| 1747 | /* mcspi3 */ | ||
| 1748 | static struct omap_hwmod_irq_info omap34xx_mcspi3_mpu_irqs[] = { | ||
| 1749 | { .name = "irq", .irq = 91 }, /* 91 */ | ||
| 1750 | + { .irq = -1 } | ||
| 1751 | }; | ||
| 1752 | |||
| 1753 | static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { | ||
| 1754 | @@ -3156,7 +3157,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi3_dev_attr = { | ||
| 1755 | static struct omap_hwmod omap34xx_mcspi3 = { | ||
| 1756 | .name = "mcspi3", | ||
| 1757 | .mpu_irqs = omap34xx_mcspi3_mpu_irqs, | ||
| 1758 | - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_mpu_irqs), | ||
| 1759 | .sdma_reqs = omap34xx_mcspi3_sdma_reqs, | ||
| 1760 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), | ||
| 1761 | .main_clk = "mcspi3_fck", | ||
| 1762 | @@ -3179,6 +3179,7 @@ static struct omap_hwmod omap34xx_mcspi3 = { | ||
| 1763 | /* SPI4 */ | ||
| 1764 | static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { | ||
| 1765 | { .name = "irq", .irq = INT_34XX_SPI4_IRQ }, /* 48 */ | ||
| 1766 | + { .irq = -1 } | ||
| 1767 | }; | ||
| 1768 | |||
| 1769 | static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { | ||
| 1770 | @@ -3197,7 +3198,6 @@ static struct omap2_mcspi_dev_attr omap_mcspi4_dev_attr = { | ||
| 1771 | static struct omap_hwmod omap34xx_mcspi4 = { | ||
| 1772 | .name = "mcspi4", | ||
| 1773 | .mpu_irqs = omap34xx_mcspi4_mpu_irqs, | ||
| 1774 | - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_mpu_irqs), | ||
| 1775 | .sdma_reqs = omap34xx_mcspi4_sdma_reqs, | ||
| 1776 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), | ||
| 1777 | .main_clk = "mcspi4_fck", | ||
| 1778 | @@ -3241,12 +3241,12 @@ static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = { | ||
| 1779 | |||
| 1780 | { .name = "mc", .irq = 92 }, | ||
| 1781 | { .name = "dma", .irq = 93 }, | ||
| 1782 | + { .irq = -1 } | ||
| 1783 | }; | ||
| 1784 | |||
| 1785 | static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { | ||
| 1786 | .name = "usb_otg_hs", | ||
| 1787 | .mpu_irqs = omap3xxx_usbhsotg_mpu_irqs, | ||
| 1788 | - .mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs), | ||
| 1789 | .main_clk = "hsotgusb_ick", | ||
| 1790 | .prcm = { | ||
| 1791 | .omap2 = { | ||
| 1792 | @@ -3278,6 +3278,7 @@ static struct omap_hwmod omap3xxx_usbhsotg_hwmod = { | ||
| 1793 | static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = { | ||
| 1794 | |||
| 1795 | { .name = "mc", .irq = 71 }, | ||
| 1796 | + { .irq = -1 } | ||
| 1797 | }; | ||
| 1798 | |||
| 1799 | static struct omap_hwmod_class am35xx_usbotg_class = { | ||
| 1800 | @@ -3288,7 +3289,6 @@ static struct omap_hwmod_class am35xx_usbotg_class = { | ||
| 1801 | static struct omap_hwmod am35xx_usbhsotg_hwmod = { | ||
| 1802 | .name = "am35x_otg_hs", | ||
| 1803 | .mpu_irqs = am35xx_usbhsotg_mpu_irqs, | ||
| 1804 | - .mpu_irqs_cnt = ARRAY_SIZE(am35xx_usbhsotg_mpu_irqs), | ||
| 1805 | .main_clk = NULL, | ||
| 1806 | .prcm = { | ||
| 1807 | .omap2 = { | ||
| 1808 | @@ -3324,6 +3324,7 @@ static struct omap_hwmod_class omap34xx_mmc_class = { | ||
| 1809 | |||
| 1810 | static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { | ||
| 1811 | { .irq = 83, }, | ||
| 1812 | + { .irq = -1 } | ||
| 1813 | }; | ||
| 1814 | |||
| 1815 | static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { | ||
| 1816 | @@ -3346,7 +3347,6 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = { | ||
| 1817 | static struct omap_hwmod omap3xxx_mmc1_hwmod = { | ||
| 1818 | .name = "mmc1", | ||
| 1819 | .mpu_irqs = omap34xx_mmc1_mpu_irqs, | ||
| 1820 | - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc1_mpu_irqs), | ||
| 1821 | .sdma_reqs = omap34xx_mmc1_sdma_reqs, | ||
| 1822 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), | ||
| 1823 | .opt_clks = omap34xx_mmc1_opt_clks, | ||
| 1824 | @@ -3372,6 +3372,7 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = { | ||
| 1825 | |||
| 1826 | static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { | ||
| 1827 | { .irq = INT_24XX_MMC2_IRQ, }, | ||
| 1828 | + { .irq = -1 } | ||
| 1829 | }; | ||
| 1830 | |||
| 1831 | static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { | ||
| 1832 | @@ -3390,7 +3391,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = { | ||
| 1833 | static struct omap_hwmod omap3xxx_mmc2_hwmod = { | ||
| 1834 | .name = "mmc2", | ||
| 1835 | .mpu_irqs = omap34xx_mmc2_mpu_irqs, | ||
| 1836 | - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc2_mpu_irqs), | ||
| 1837 | .sdma_reqs = omap34xx_mmc2_sdma_reqs, | ||
| 1838 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), | ||
| 1839 | .opt_clks = omap34xx_mmc2_opt_clks, | ||
| 1840 | @@ -3415,6 +3415,7 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = { | ||
| 1841 | |||
| 1842 | static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { | ||
| 1843 | { .irq = 94, }, | ||
| 1844 | + { .irq = -1 } | ||
| 1845 | }; | ||
| 1846 | |||
| 1847 | static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { | ||
| 1848 | @@ -3433,7 +3434,6 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc3_slaves[] = { | ||
| 1849 | static struct omap_hwmod omap3xxx_mmc3_hwmod = { | ||
| 1850 | .name = "mmc3", | ||
| 1851 | .mpu_irqs = omap34xx_mmc3_mpu_irqs, | ||
| 1852 | - .mpu_irqs_cnt = ARRAY_SIZE(omap34xx_mmc3_mpu_irqs), | ||
| 1853 | .sdma_reqs = omap34xx_mmc3_sdma_reqs, | ||
| 1854 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), | ||
| 1855 | .opt_clks = omap34xx_mmc3_opt_clks, | ||
| 1856 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 1857 | index f8ccc4a..f7ff937 100644 | ||
| 1858 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 1859 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 1860 | @@ -115,6 +115,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { | ||
| 1861 | |||
| 1862 | static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { | ||
| 1863 | { .irq = 113 + OMAP44XX_IRQ_GIC_START }, | ||
| 1864 | + { .irq = -1 } | ||
| 1865 | }; | ||
| 1866 | |||
| 1867 | static struct omap_hwmod omap44xx_dmm_hwmod = { | ||
| 1868 | @@ -123,7 +124,6 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { | ||
| 1869 | .slaves = omap44xx_dmm_slaves, | ||
| 1870 | .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), | ||
| 1871 | .mpu_irqs = omap44xx_dmm_irqs, | ||
| 1872 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmm_irqs), | ||
| 1873 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 1874 | }; | ||
| 1875 | |||
| 1876 | @@ -268,6 +268,7 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = { | ||
| 1877 | static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { | ||
| 1878 | { .irq = 9 + OMAP44XX_IRQ_GIC_START }, | ||
| 1879 | { .irq = 10 + OMAP44XX_IRQ_GIC_START }, | ||
| 1880 | + { .irq = -1 } | ||
| 1881 | }; | ||
| 1882 | |||
| 1883 | static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { | ||
| 1884 | @@ -303,7 +304,6 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { | ||
| 1885 | .name = "l3_main_1", | ||
| 1886 | .class = &omap44xx_l3_hwmod_class, | ||
| 1887 | .mpu_irqs = omap44xx_l3_targ_irqs, | ||
| 1888 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_l3_targ_irqs), | ||
| 1889 | .slaves = omap44xx_l3_main_1_slaves, | ||
| 1890 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), | ||
| 1891 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 1892 | @@ -673,6 +673,7 @@ static struct omap_hwmod_class omap44xx_aess_hwmod_class = { | ||
| 1893 | /* aess */ | ||
| 1894 | static struct omap_hwmod_irq_info omap44xx_aess_irqs[] = { | ||
| 1895 | { .irq = 99 + OMAP44XX_IRQ_GIC_START }, | ||
| 1896 | + { .irq = -1 } | ||
| 1897 | }; | ||
| 1898 | |||
| 1899 | static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { | ||
| 1900 | @@ -737,7 +738,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { | ||
| 1901 | .name = "aess", | ||
| 1902 | .class = &omap44xx_aess_hwmod_class, | ||
| 1903 | .mpu_irqs = omap44xx_aess_irqs, | ||
| 1904 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_aess_irqs), | ||
| 1905 | .sdma_reqs = omap44xx_aess_sdma_reqs, | ||
| 1906 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), | ||
| 1907 | .main_clk = "aess_fck", | ||
| 1908 | @@ -876,6 +876,7 @@ static struct omap_hwmod_irq_info omap44xx_dma_system_irqs[] = { | ||
| 1909 | { .name = "1", .irq = 13 + OMAP44XX_IRQ_GIC_START }, | ||
| 1910 | { .name = "2", .irq = 14 + OMAP44XX_IRQ_GIC_START }, | ||
| 1911 | { .name = "3", .irq = 15 + OMAP44XX_IRQ_GIC_START }, | ||
| 1912 | + { .irq = -1 } | ||
| 1913 | }; | ||
| 1914 | |||
| 1915 | /* dma_system master ports */ | ||
| 1916 | @@ -910,7 +911,6 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { | ||
| 1917 | .name = "dma_system", | ||
| 1918 | .class = &omap44xx_dma_hwmod_class, | ||
| 1919 | .mpu_irqs = omap44xx_dma_system_irqs, | ||
| 1920 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dma_system_irqs), | ||
| 1921 | .main_clk = "l3_div_ck", | ||
| 1922 | .prcm = { | ||
| 1923 | .omap4 = { | ||
| 1924 | @@ -949,6 +949,7 @@ static struct omap_hwmod_class omap44xx_dmic_hwmod_class = { | ||
| 1925 | static struct omap_hwmod omap44xx_dmic_hwmod; | ||
| 1926 | static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { | ||
| 1927 | { .irq = 114 + OMAP44XX_IRQ_GIC_START }, | ||
| 1928 | + { .irq = -1 } | ||
| 1929 | }; | ||
| 1930 | |||
| 1931 | static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { | ||
| 1932 | @@ -1001,7 +1002,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { | ||
| 1933 | .name = "dmic", | ||
| 1934 | .class = &omap44xx_dmic_hwmod_class, | ||
| 1935 | .mpu_irqs = omap44xx_dmic_irqs, | ||
| 1936 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dmic_irqs), | ||
| 1937 | .sdma_reqs = omap44xx_dmic_sdma_reqs, | ||
| 1938 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), | ||
| 1939 | .main_clk = "dmic_fck", | ||
| 1940 | @@ -1027,6 +1027,7 @@ static struct omap_hwmod_class omap44xx_dsp_hwmod_class = { | ||
| 1941 | /* dsp */ | ||
| 1942 | static struct omap_hwmod_irq_info omap44xx_dsp_irqs[] = { | ||
| 1943 | { .irq = 28 + OMAP44XX_IRQ_GIC_START }, | ||
| 1944 | + { .irq = -1 } | ||
| 1945 | }; | ||
| 1946 | |||
| 1947 | static struct omap_hwmod_rst_info omap44xx_dsp_resets[] = { | ||
| 1948 | @@ -1083,7 +1084,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { | ||
| 1949 | .name = "dsp", | ||
| 1950 | .class = &omap44xx_dsp_hwmod_class, | ||
| 1951 | .mpu_irqs = omap44xx_dsp_irqs, | ||
| 1952 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dsp_irqs), | ||
| 1953 | .rst_lines = omap44xx_dsp_resets, | ||
| 1954 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), | ||
| 1955 | .main_clk = "dsp_fck", | ||
| 1956 | @@ -1216,6 +1216,7 @@ static struct omap_hwmod_class omap44xx_dispc_hwmod_class = { | ||
| 1957 | static struct omap_hwmod omap44xx_dss_dispc_hwmod; | ||
| 1958 | static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { | ||
| 1959 | { .irq = 25 + OMAP44XX_IRQ_GIC_START }, | ||
| 1960 | + { .irq = -1 } | ||
| 1961 | }; | ||
| 1962 | |||
| 1963 | static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { | ||
| 1964 | @@ -1268,7 +1269,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | ||
| 1965 | .name = "dss_dispc", | ||
| 1966 | .class = &omap44xx_dispc_hwmod_class, | ||
| 1967 | .mpu_irqs = omap44xx_dss_dispc_irqs, | ||
| 1968 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_irqs), | ||
| 1969 | .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, | ||
| 1970 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), | ||
| 1971 | .main_clk = "dss_fck", | ||
| 1972 | @@ -1307,6 +1307,7 @@ static struct omap_hwmod_class omap44xx_dsi_hwmod_class = { | ||
| 1973 | static struct omap_hwmod omap44xx_dss_dsi1_hwmod; | ||
| 1974 | static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { | ||
| 1975 | { .irq = 53 + OMAP44XX_IRQ_GIC_START }, | ||
| 1976 | + { .irq = -1 } | ||
| 1977 | }; | ||
| 1978 | |||
| 1979 | static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { | ||
| 1980 | @@ -1359,7 +1360,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | ||
| 1981 | .name = "dss_dsi1", | ||
| 1982 | .class = &omap44xx_dsi_hwmod_class, | ||
| 1983 | .mpu_irqs = omap44xx_dss_dsi1_irqs, | ||
| 1984 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_irqs), | ||
| 1985 | .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, | ||
| 1986 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), | ||
| 1987 | .main_clk = "dss_fck", | ||
| 1988 | @@ -1377,6 +1377,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | ||
| 1989 | static struct omap_hwmod omap44xx_dss_dsi2_hwmod; | ||
| 1990 | static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { | ||
| 1991 | { .irq = 84 + OMAP44XX_IRQ_GIC_START }, | ||
| 1992 | + { .irq = -1 } | ||
| 1993 | }; | ||
| 1994 | |||
| 1995 | static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { | ||
| 1996 | @@ -1429,7 +1430,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { | ||
| 1997 | .name = "dss_dsi2", | ||
| 1998 | .class = &omap44xx_dsi_hwmod_class, | ||
| 1999 | .mpu_irqs = omap44xx_dss_dsi2_irqs, | ||
| 2000 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_irqs), | ||
| 2001 | .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, | ||
| 2002 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), | ||
| 2003 | .main_clk = "dss_fck", | ||
| 2004 | @@ -1467,6 +1467,7 @@ static struct omap_hwmod_class omap44xx_hdmi_hwmod_class = { | ||
| 2005 | static struct omap_hwmod omap44xx_dss_hdmi_hwmod; | ||
| 2006 | static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { | ||
| 2007 | { .irq = 101 + OMAP44XX_IRQ_GIC_START }, | ||
| 2008 | + { .irq = -1 } | ||
| 2009 | }; | ||
| 2010 | |||
| 2011 | static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { | ||
| 2012 | @@ -1519,7 +1520,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | ||
| 2013 | .name = "dss_hdmi", | ||
| 2014 | .class = &omap44xx_hdmi_hwmod_class, | ||
| 2015 | .mpu_irqs = omap44xx_dss_hdmi_irqs, | ||
| 2016 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_irqs), | ||
| 2017 | .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, | ||
| 2018 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), | ||
| 2019 | .main_clk = "dss_fck", | ||
| 2020 | @@ -1717,6 +1717,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { | ||
| 2021 | static struct omap_hwmod omap44xx_gpio1_hwmod; | ||
| 2022 | static struct omap_hwmod_irq_info omap44xx_gpio1_irqs[] = { | ||
| 2023 | { .irq = 29 + OMAP44XX_IRQ_GIC_START }, | ||
| 2024 | + { .irq = -1 } | ||
| 2025 | }; | ||
| 2026 | |||
| 2027 | static struct omap_hwmod_addr_space omap44xx_gpio1_addrs[] = { | ||
| 2028 | @@ -1750,7 +1751,6 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { | ||
| 2029 | .name = "gpio1", | ||
| 2030 | .class = &omap44xx_gpio_hwmod_class, | ||
| 2031 | .mpu_irqs = omap44xx_gpio1_irqs, | ||
| 2032 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio1_irqs), | ||
| 2033 | .main_clk = "gpio1_ick", | ||
| 2034 | .prcm = { | ||
| 2035 | .omap4 = { | ||
| 2036 | @@ -1769,6 +1769,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { | ||
| 2037 | static struct omap_hwmod omap44xx_gpio2_hwmod; | ||
| 2038 | static struct omap_hwmod_irq_info omap44xx_gpio2_irqs[] = { | ||
| 2039 | { .irq = 30 + OMAP44XX_IRQ_GIC_START }, | ||
| 2040 | + { .irq = -1 } | ||
| 2041 | }; | ||
| 2042 | |||
| 2043 | static struct omap_hwmod_addr_space omap44xx_gpio2_addrs[] = { | ||
| 2044 | @@ -1803,7 +1804,6 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { | ||
| 2045 | .class = &omap44xx_gpio_hwmod_class, | ||
| 2046 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 2047 | .mpu_irqs = omap44xx_gpio2_irqs, | ||
| 2048 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio2_irqs), | ||
| 2049 | .main_clk = "gpio2_ick", | ||
| 2050 | .prcm = { | ||
| 2051 | .omap4 = { | ||
| 2052 | @@ -1822,6 +1822,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { | ||
| 2053 | static struct omap_hwmod omap44xx_gpio3_hwmod; | ||
| 2054 | static struct omap_hwmod_irq_info omap44xx_gpio3_irqs[] = { | ||
| 2055 | { .irq = 31 + OMAP44XX_IRQ_GIC_START }, | ||
| 2056 | + { .irq = -1 } | ||
| 2057 | }; | ||
| 2058 | |||
| 2059 | static struct omap_hwmod_addr_space omap44xx_gpio3_addrs[] = { | ||
| 2060 | @@ -1856,7 +1857,6 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { | ||
| 2061 | .class = &omap44xx_gpio_hwmod_class, | ||
| 2062 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 2063 | .mpu_irqs = omap44xx_gpio3_irqs, | ||
| 2064 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio3_irqs), | ||
| 2065 | .main_clk = "gpio3_ick", | ||
| 2066 | .prcm = { | ||
| 2067 | .omap4 = { | ||
| 2068 | @@ -1875,6 +1875,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { | ||
| 2069 | static struct omap_hwmod omap44xx_gpio4_hwmod; | ||
| 2070 | static struct omap_hwmod_irq_info omap44xx_gpio4_irqs[] = { | ||
| 2071 | { .irq = 32 + OMAP44XX_IRQ_GIC_START }, | ||
| 2072 | + { .irq = -1 } | ||
| 2073 | }; | ||
| 2074 | |||
| 2075 | static struct omap_hwmod_addr_space omap44xx_gpio4_addrs[] = { | ||
| 2076 | @@ -1909,7 +1910,6 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { | ||
| 2077 | .class = &omap44xx_gpio_hwmod_class, | ||
| 2078 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 2079 | .mpu_irqs = omap44xx_gpio4_irqs, | ||
| 2080 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio4_irqs), | ||
| 2081 | .main_clk = "gpio4_ick", | ||
| 2082 | .prcm = { | ||
| 2083 | .omap4 = { | ||
| 2084 | @@ -1928,6 +1928,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { | ||
| 2085 | static struct omap_hwmod omap44xx_gpio5_hwmod; | ||
| 2086 | static struct omap_hwmod_irq_info omap44xx_gpio5_irqs[] = { | ||
| 2087 | { .irq = 33 + OMAP44XX_IRQ_GIC_START }, | ||
| 2088 | + { .irq = -1 } | ||
| 2089 | }; | ||
| 2090 | |||
| 2091 | static struct omap_hwmod_addr_space omap44xx_gpio5_addrs[] = { | ||
| 2092 | @@ -1962,7 +1963,6 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { | ||
| 2093 | .class = &omap44xx_gpio_hwmod_class, | ||
| 2094 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 2095 | .mpu_irqs = omap44xx_gpio5_irqs, | ||
| 2096 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio5_irqs), | ||
| 2097 | .main_clk = "gpio5_ick", | ||
| 2098 | .prcm = { | ||
| 2099 | .omap4 = { | ||
| 2100 | @@ -1981,6 +1981,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { | ||
| 2101 | static struct omap_hwmod omap44xx_gpio6_hwmod; | ||
| 2102 | static struct omap_hwmod_irq_info omap44xx_gpio6_irqs[] = { | ||
| 2103 | { .irq = 34 + OMAP44XX_IRQ_GIC_START }, | ||
| 2104 | + { .irq = -1 } | ||
| 2105 | }; | ||
| 2106 | |||
| 2107 | static struct omap_hwmod_addr_space omap44xx_gpio6_addrs[] = { | ||
| 2108 | @@ -2015,7 +2016,6 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { | ||
| 2109 | .class = &omap44xx_gpio_hwmod_class, | ||
| 2110 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 2111 | .mpu_irqs = omap44xx_gpio6_irqs, | ||
| 2112 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_gpio6_irqs), | ||
| 2113 | .main_clk = "gpio6_ick", | ||
| 2114 | .prcm = { | ||
| 2115 | .omap4 = { | ||
| 2116 | @@ -2059,6 +2059,7 @@ static struct omap_hwmod_irq_info omap44xx_hsi_irqs[] = { | ||
| 2117 | { .name = "mpu_p1", .irq = 67 + OMAP44XX_IRQ_GIC_START }, | ||
| 2118 | { .name = "mpu_p2", .irq = 68 + OMAP44XX_IRQ_GIC_START }, | ||
| 2119 | { .name = "mpu_dma", .irq = 71 + OMAP44XX_IRQ_GIC_START }, | ||
| 2120 | + { .irq = -1 } | ||
| 2121 | }; | ||
| 2122 | |||
| 2123 | /* hsi master ports */ | ||
| 2124 | @@ -2093,7 +2094,6 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { | ||
| 2125 | .name = "hsi", | ||
| 2126 | .class = &omap44xx_hsi_hwmod_class, | ||
| 2127 | .mpu_irqs = omap44xx_hsi_irqs, | ||
| 2128 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_hsi_irqs), | ||
| 2129 | .main_clk = "hsi_fck", | ||
| 2130 | .prcm = { | ||
| 2131 | .omap4 = { | ||
| 2132 | @@ -2132,6 +2132,7 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { | ||
| 2133 | static struct omap_hwmod omap44xx_i2c1_hwmod; | ||
| 2134 | static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { | ||
| 2135 | { .irq = 56 + OMAP44XX_IRQ_GIC_START }, | ||
| 2136 | + { .irq = -1 } | ||
| 2137 | }; | ||
| 2138 | |||
| 2139 | static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { | ||
| 2140 | @@ -2167,7 +2168,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { | ||
| 2141 | .class = &omap44xx_i2c_hwmod_class, | ||
| 2142 | .flags = HWMOD_INIT_NO_RESET, | ||
| 2143 | .mpu_irqs = omap44xx_i2c1_irqs, | ||
| 2144 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c1_irqs), | ||
| 2145 | .sdma_reqs = omap44xx_i2c1_sdma_reqs, | ||
| 2146 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), | ||
| 2147 | .main_clk = "i2c1_fck", | ||
| 2148 | @@ -2185,6 +2185,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { | ||
| 2149 | static struct omap_hwmod omap44xx_i2c2_hwmod; | ||
| 2150 | static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { | ||
| 2151 | { .irq = 57 + OMAP44XX_IRQ_GIC_START }, | ||
| 2152 | + { .irq = -1 } | ||
| 2153 | }; | ||
| 2154 | |||
| 2155 | static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { | ||
| 2156 | @@ -2220,7 +2221,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { | ||
| 2157 | .class = &omap44xx_i2c_hwmod_class, | ||
| 2158 | .flags = HWMOD_INIT_NO_RESET, | ||
| 2159 | .mpu_irqs = omap44xx_i2c2_irqs, | ||
| 2160 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c2_irqs), | ||
| 2161 | .sdma_reqs = omap44xx_i2c2_sdma_reqs, | ||
| 2162 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), | ||
| 2163 | .main_clk = "i2c2_fck", | ||
| 2164 | @@ -2238,6 +2238,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { | ||
| 2165 | static struct omap_hwmod omap44xx_i2c3_hwmod; | ||
| 2166 | static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { | ||
| 2167 | { .irq = 61 + OMAP44XX_IRQ_GIC_START }, | ||
| 2168 | + { .irq = -1 } | ||
| 2169 | }; | ||
| 2170 | |||
| 2171 | static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { | ||
| 2172 | @@ -2273,7 +2274,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { | ||
| 2173 | .class = &omap44xx_i2c_hwmod_class, | ||
| 2174 | .flags = HWMOD_INIT_NO_RESET, | ||
| 2175 | .mpu_irqs = omap44xx_i2c3_irqs, | ||
| 2176 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c3_irqs), | ||
| 2177 | .sdma_reqs = omap44xx_i2c3_sdma_reqs, | ||
| 2178 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), | ||
| 2179 | .main_clk = "i2c3_fck", | ||
| 2180 | @@ -2291,6 +2291,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { | ||
| 2181 | static struct omap_hwmod omap44xx_i2c4_hwmod; | ||
| 2182 | static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { | ||
| 2183 | { .irq = 62 + OMAP44XX_IRQ_GIC_START }, | ||
| 2184 | + { .irq = -1 } | ||
| 2185 | }; | ||
| 2186 | |||
| 2187 | static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { | ||
| 2188 | @@ -2326,7 +2327,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { | ||
| 2189 | .class = &omap44xx_i2c_hwmod_class, | ||
| 2190 | .flags = HWMOD_INIT_NO_RESET, | ||
| 2191 | .mpu_irqs = omap44xx_i2c4_irqs, | ||
| 2192 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_i2c4_irqs), | ||
| 2193 | .sdma_reqs = omap44xx_i2c4_sdma_reqs, | ||
| 2194 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), | ||
| 2195 | .main_clk = "i2c4_fck", | ||
| 2196 | @@ -2352,6 +2352,7 @@ static struct omap_hwmod_class omap44xx_ipu_hwmod_class = { | ||
| 2197 | /* ipu */ | ||
| 2198 | static struct omap_hwmod_irq_info omap44xx_ipu_irqs[] = { | ||
| 2199 | { .irq = 100 + OMAP44XX_IRQ_GIC_START }, | ||
| 2200 | + { .irq = -1 } | ||
| 2201 | }; | ||
| 2202 | |||
| 2203 | static struct omap_hwmod_rst_info omap44xx_ipu_c0_resets[] = { | ||
| 2204 | @@ -2418,7 +2419,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { | ||
| 2205 | .name = "ipu", | ||
| 2206 | .class = &omap44xx_ipu_hwmod_class, | ||
| 2207 | .mpu_irqs = omap44xx_ipu_irqs, | ||
| 2208 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_ipu_irqs), | ||
| 2209 | .rst_lines = omap44xx_ipu_resets, | ||
| 2210 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), | ||
| 2211 | .main_clk = "ipu_fck", | ||
| 2212 | @@ -2459,6 +2459,7 @@ static struct omap_hwmod_class omap44xx_iss_hwmod_class = { | ||
| 2213 | /* iss */ | ||
| 2214 | static struct omap_hwmod_irq_info omap44xx_iss_irqs[] = { | ||
| 2215 | { .irq = 24 + OMAP44XX_IRQ_GIC_START }, | ||
| 2216 | + { .irq = -1 } | ||
| 2217 | }; | ||
| 2218 | |||
| 2219 | static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { | ||
| 2220 | @@ -2504,7 +2505,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { | ||
| 2221 | .name = "iss", | ||
| 2222 | .class = &omap44xx_iss_hwmod_class, | ||
| 2223 | .mpu_irqs = omap44xx_iss_irqs, | ||
| 2224 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iss_irqs), | ||
| 2225 | .sdma_reqs = omap44xx_iss_sdma_reqs, | ||
| 2226 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), | ||
| 2227 | .main_clk = "iss_fck", | ||
| 2228 | @@ -2536,6 +2536,7 @@ static struct omap_hwmod_irq_info omap44xx_iva_irqs[] = { | ||
| 2229 | { .name = "sync_1", .irq = 103 + OMAP44XX_IRQ_GIC_START }, | ||
| 2230 | { .name = "sync_0", .irq = 104 + OMAP44XX_IRQ_GIC_START }, | ||
| 2231 | { .name = "mailbox_0", .irq = 107 + OMAP44XX_IRQ_GIC_START }, | ||
| 2232 | + { .irq = -1 } | ||
| 2233 | }; | ||
| 2234 | |||
| 2235 | static struct omap_hwmod_rst_info omap44xx_iva_resets[] = { | ||
| 2236 | @@ -2614,7 +2615,6 @@ static struct omap_hwmod omap44xx_iva_hwmod = { | ||
| 2237 | .name = "iva", | ||
| 2238 | .class = &omap44xx_iva_hwmod_class, | ||
| 2239 | .mpu_irqs = omap44xx_iva_irqs, | ||
| 2240 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_iva_irqs), | ||
| 2241 | .rst_lines = omap44xx_iva_resets, | ||
| 2242 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), | ||
| 2243 | .main_clk = "iva_fck", | ||
| 2244 | @@ -2657,6 +2657,7 @@ static struct omap_hwmod_class omap44xx_kbd_hwmod_class = { | ||
| 2245 | static struct omap_hwmod omap44xx_kbd_hwmod; | ||
| 2246 | static struct omap_hwmod_irq_info omap44xx_kbd_irqs[] = { | ||
| 2247 | { .irq = 120 + OMAP44XX_IRQ_GIC_START }, | ||
| 2248 | + { .irq = -1 } | ||
| 2249 | }; | ||
| 2250 | |||
| 2251 | static struct omap_hwmod_addr_space omap44xx_kbd_addrs[] = { | ||
| 2252 | @@ -2686,7 +2687,6 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { | ||
| 2253 | .name = "kbd", | ||
| 2254 | .class = &omap44xx_kbd_hwmod_class, | ||
| 2255 | .mpu_irqs = omap44xx_kbd_irqs, | ||
| 2256 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_kbd_irqs), | ||
| 2257 | .main_clk = "kbd_fck", | ||
| 2258 | .prcm = { | ||
| 2259 | .omap4 = { | ||
| 2260 | @@ -2722,6 +2722,7 @@ static struct omap_hwmod_class omap44xx_mailbox_hwmod_class = { | ||
| 2261 | static struct omap_hwmod omap44xx_mailbox_hwmod; | ||
| 2262 | static struct omap_hwmod_irq_info omap44xx_mailbox_irqs[] = { | ||
| 2263 | { .irq = 26 + OMAP44XX_IRQ_GIC_START }, | ||
| 2264 | + { .irq = -1 } | ||
| 2265 | }; | ||
| 2266 | |||
| 2267 | static struct omap_hwmod_addr_space omap44xx_mailbox_addrs[] = { | ||
| 2268 | @@ -2751,7 +2752,6 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { | ||
| 2269 | .name = "mailbox", | ||
| 2270 | .class = &omap44xx_mailbox_hwmod_class, | ||
| 2271 | .mpu_irqs = omap44xx_mailbox_irqs, | ||
| 2272 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mailbox_irqs), | ||
| 2273 | .prcm = { | ||
| 2274 | .omap4 = { | ||
| 2275 | .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, | ||
| 2276 | @@ -2785,6 +2785,7 @@ static struct omap_hwmod_class omap44xx_mcbsp_hwmod_class = { | ||
| 2277 | static struct omap_hwmod omap44xx_mcbsp1_hwmod; | ||
| 2278 | static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { | ||
| 2279 | { .irq = 17 + OMAP44XX_IRQ_GIC_START }, | ||
| 2280 | + { .irq = -1 } | ||
| 2281 | }; | ||
| 2282 | |||
| 2283 | static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { | ||
| 2284 | @@ -2840,7 +2841,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { | ||
| 2285 | .name = "mcbsp1", | ||
| 2286 | .class = &omap44xx_mcbsp_hwmod_class, | ||
| 2287 | .mpu_irqs = omap44xx_mcbsp1_irqs, | ||
| 2288 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_irqs), | ||
| 2289 | .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, | ||
| 2290 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), | ||
| 2291 | .main_clk = "mcbsp1_fck", | ||
| 2292 | @@ -2858,6 +2858,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { | ||
| 2293 | static struct omap_hwmod omap44xx_mcbsp2_hwmod; | ||
| 2294 | static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { | ||
| 2295 | { .irq = 22 + OMAP44XX_IRQ_GIC_START }, | ||
| 2296 | + { .irq = -1 } | ||
| 2297 | }; | ||
| 2298 | |||
| 2299 | static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { | ||
| 2300 | @@ -2913,7 +2914,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { | ||
| 2301 | .name = "mcbsp2", | ||
| 2302 | .class = &omap44xx_mcbsp_hwmod_class, | ||
| 2303 | .mpu_irqs = omap44xx_mcbsp2_irqs, | ||
| 2304 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_irqs), | ||
| 2305 | .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, | ||
| 2306 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), | ||
| 2307 | .main_clk = "mcbsp2_fck", | ||
| 2308 | @@ -2931,6 +2931,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { | ||
| 2309 | static struct omap_hwmod omap44xx_mcbsp3_hwmod; | ||
| 2310 | static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { | ||
| 2311 | { .irq = 23 + OMAP44XX_IRQ_GIC_START }, | ||
| 2312 | + { .irq = -1 } | ||
| 2313 | }; | ||
| 2314 | |||
| 2315 | static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { | ||
| 2316 | @@ -2986,7 +2987,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { | ||
| 2317 | .name = "mcbsp3", | ||
| 2318 | .class = &omap44xx_mcbsp_hwmod_class, | ||
| 2319 | .mpu_irqs = omap44xx_mcbsp3_irqs, | ||
| 2320 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_irqs), | ||
| 2321 | .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, | ||
| 2322 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), | ||
| 2323 | .main_clk = "mcbsp3_fck", | ||
| 2324 | @@ -3004,6 +3004,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { | ||
| 2325 | static struct omap_hwmod omap44xx_mcbsp4_hwmod; | ||
| 2326 | static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { | ||
| 2327 | { .irq = 16 + OMAP44XX_IRQ_GIC_START }, | ||
| 2328 | + { .irq = -1 } | ||
| 2329 | }; | ||
| 2330 | |||
| 2331 | static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { | ||
| 2332 | @@ -3038,7 +3039,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { | ||
| 2333 | .name = "mcbsp4", | ||
| 2334 | .class = &omap44xx_mcbsp_hwmod_class, | ||
| 2335 | .mpu_irqs = omap44xx_mcbsp4_irqs, | ||
| 2336 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_irqs), | ||
| 2337 | .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, | ||
| 2338 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), | ||
| 2339 | .main_clk = "mcbsp4_fck", | ||
| 2340 | @@ -3077,6 +3077,7 @@ static struct omap_hwmod_class omap44xx_mcpdm_hwmod_class = { | ||
| 2341 | static struct omap_hwmod omap44xx_mcpdm_hwmod; | ||
| 2342 | static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { | ||
| 2343 | { .irq = 112 + OMAP44XX_IRQ_GIC_START }, | ||
| 2344 | + { .irq = -1 } | ||
| 2345 | }; | ||
| 2346 | |||
| 2347 | static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { | ||
| 2348 | @@ -3130,7 +3131,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { | ||
| 2349 | .name = "mcpdm", | ||
| 2350 | .class = &omap44xx_mcpdm_hwmod_class, | ||
| 2351 | .mpu_irqs = omap44xx_mcpdm_irqs, | ||
| 2352 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_irqs), | ||
| 2353 | .sdma_reqs = omap44xx_mcpdm_sdma_reqs, | ||
| 2354 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), | ||
| 2355 | .main_clk = "mcpdm_fck", | ||
| 2356 | @@ -3170,6 +3170,7 @@ static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = { | ||
| 2357 | static struct omap_hwmod omap44xx_mcspi1_hwmod; | ||
| 2358 | static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = { | ||
| 2359 | { .irq = 65 + OMAP44XX_IRQ_GIC_START }, | ||
| 2360 | + { .irq = -1 } | ||
| 2361 | }; | ||
| 2362 | |||
| 2363 | static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { | ||
| 2364 | @@ -3215,7 +3216,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { | ||
| 2365 | .name = "mcspi1", | ||
| 2366 | .class = &omap44xx_mcspi_hwmod_class, | ||
| 2367 | .mpu_irqs = omap44xx_mcspi1_irqs, | ||
| 2368 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_irqs), | ||
| 2369 | .sdma_reqs = omap44xx_mcspi1_sdma_reqs, | ||
| 2370 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), | ||
| 2371 | .main_clk = "mcspi1_fck", | ||
| 2372 | @@ -3234,6 +3234,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { | ||
| 2373 | static struct omap_hwmod omap44xx_mcspi2_hwmod; | ||
| 2374 | static struct omap_hwmod_irq_info omap44xx_mcspi2_irqs[] = { | ||
| 2375 | { .irq = 66 + OMAP44XX_IRQ_GIC_START }, | ||
| 2376 | + { .irq = -1 } | ||
| 2377 | }; | ||
| 2378 | |||
| 2379 | static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { | ||
| 2380 | @@ -3275,7 +3276,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { | ||
| 2381 | .name = "mcspi2", | ||
| 2382 | .class = &omap44xx_mcspi_hwmod_class, | ||
| 2383 | .mpu_irqs = omap44xx_mcspi2_irqs, | ||
| 2384 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_irqs), | ||
| 2385 | .sdma_reqs = omap44xx_mcspi2_sdma_reqs, | ||
| 2386 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), | ||
| 2387 | .main_clk = "mcspi2_fck", | ||
| 2388 | @@ -3294,6 +3294,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { | ||
| 2389 | static struct omap_hwmod omap44xx_mcspi3_hwmod; | ||
| 2390 | static struct omap_hwmod_irq_info omap44xx_mcspi3_irqs[] = { | ||
| 2391 | { .irq = 91 + OMAP44XX_IRQ_GIC_START }, | ||
| 2392 | + { .irq = -1 } | ||
| 2393 | }; | ||
| 2394 | |||
| 2395 | static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { | ||
| 2396 | @@ -3335,7 +3336,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { | ||
| 2397 | .name = "mcspi3", | ||
| 2398 | .class = &omap44xx_mcspi_hwmod_class, | ||
| 2399 | .mpu_irqs = omap44xx_mcspi3_irqs, | ||
| 2400 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_irqs), | ||
| 2401 | .sdma_reqs = omap44xx_mcspi3_sdma_reqs, | ||
| 2402 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), | ||
| 2403 | .main_clk = "mcspi3_fck", | ||
| 2404 | @@ -3354,6 +3354,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { | ||
| 2405 | static struct omap_hwmod omap44xx_mcspi4_hwmod; | ||
| 2406 | static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { | ||
| 2407 | { .irq = 48 + OMAP44XX_IRQ_GIC_START }, | ||
| 2408 | + { .irq = -1 } | ||
| 2409 | }; | ||
| 2410 | |||
| 2411 | static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { | ||
| 2412 | @@ -3393,7 +3394,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { | ||
| 2413 | .name = "mcspi4", | ||
| 2414 | .class = &omap44xx_mcspi_hwmod_class, | ||
| 2415 | .mpu_irqs = omap44xx_mcspi4_irqs, | ||
| 2416 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_irqs), | ||
| 2417 | .sdma_reqs = omap44xx_mcspi4_sdma_reqs, | ||
| 2418 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), | ||
| 2419 | .main_clk = "mcspi4_fck", | ||
| 2420 | @@ -3434,6 +3434,7 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = { | ||
| 2421 | |||
| 2422 | static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { | ||
| 2423 | { .irq = 83 + OMAP44XX_IRQ_GIC_START }, | ||
| 2424 | + { .irq = -1 } | ||
| 2425 | }; | ||
| 2426 | |||
| 2427 | static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { | ||
| 2428 | @@ -3478,7 +3479,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { | ||
| 2429 | .name = "mmc1", | ||
| 2430 | .class = &omap44xx_mmc_hwmod_class, | ||
| 2431 | .mpu_irqs = omap44xx_mmc1_irqs, | ||
| 2432 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc1_irqs), | ||
| 2433 | .sdma_reqs = omap44xx_mmc1_sdma_reqs, | ||
| 2434 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), | ||
| 2435 | .main_clk = "mmc1_fck", | ||
| 2436 | @@ -3498,6 +3498,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { | ||
| 2437 | /* mmc2 */ | ||
| 2438 | static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = { | ||
| 2439 | { .irq = 86 + OMAP44XX_IRQ_GIC_START }, | ||
| 2440 | + { .irq = -1 } | ||
| 2441 | }; | ||
| 2442 | |||
| 2443 | static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { | ||
| 2444 | @@ -3537,7 +3538,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { | ||
| 2445 | .name = "mmc2", | ||
| 2446 | .class = &omap44xx_mmc_hwmod_class, | ||
| 2447 | .mpu_irqs = omap44xx_mmc2_irqs, | ||
| 2448 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc2_irqs), | ||
| 2449 | .sdma_reqs = omap44xx_mmc2_sdma_reqs, | ||
| 2450 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), | ||
| 2451 | .main_clk = "mmc2_fck", | ||
| 2452 | @@ -3557,6 +3557,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { | ||
| 2453 | static struct omap_hwmod omap44xx_mmc3_hwmod; | ||
| 2454 | static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { | ||
| 2455 | { .irq = 94 + OMAP44XX_IRQ_GIC_START }, | ||
| 2456 | + { .irq = -1 } | ||
| 2457 | }; | ||
| 2458 | |||
| 2459 | static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { | ||
| 2460 | @@ -3591,7 +3592,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { | ||
| 2461 | .name = "mmc3", | ||
| 2462 | .class = &omap44xx_mmc_hwmod_class, | ||
| 2463 | .mpu_irqs = omap44xx_mmc3_irqs, | ||
| 2464 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc3_irqs), | ||
| 2465 | .sdma_reqs = omap44xx_mmc3_sdma_reqs, | ||
| 2466 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), | ||
| 2467 | .main_clk = "mmc3_fck", | ||
| 2468 | @@ -3609,6 +3609,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { | ||
| 2469 | static struct omap_hwmod omap44xx_mmc4_hwmod; | ||
| 2470 | static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { | ||
| 2471 | { .irq = 96 + OMAP44XX_IRQ_GIC_START }, | ||
| 2472 | + { .irq = -1 } | ||
| 2473 | }; | ||
| 2474 | |||
| 2475 | static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { | ||
| 2476 | @@ -3643,7 +3644,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { | ||
| 2477 | .name = "mmc4", | ||
| 2478 | .class = &omap44xx_mmc_hwmod_class, | ||
| 2479 | .mpu_irqs = omap44xx_mmc4_irqs, | ||
| 2480 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc4_irqs), | ||
| 2481 | + | ||
| 2482 | .sdma_reqs = omap44xx_mmc4_sdma_reqs, | ||
| 2483 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), | ||
| 2484 | .main_clk = "mmc4_fck", | ||
| 2485 | @@ -3661,6 +3662,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { | ||
| 2486 | static struct omap_hwmod omap44xx_mmc5_hwmod; | ||
| 2487 | static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { | ||
| 2488 | { .irq = 59 + OMAP44XX_IRQ_GIC_START }, | ||
| 2489 | + { .irq = -1 } | ||
| 2490 | }; | ||
| 2491 | |||
| 2492 | static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { | ||
| 2493 | @@ -3695,7 +3697,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { | ||
| 2494 | .name = "mmc5", | ||
| 2495 | .class = &omap44xx_mmc_hwmod_class, | ||
| 2496 | .mpu_irqs = omap44xx_mmc5_irqs, | ||
| 2497 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mmc5_irqs), | ||
| 2498 | .sdma_reqs = omap44xx_mmc5_sdma_reqs, | ||
| 2499 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), | ||
| 2500 | .main_clk = "mmc5_fck", | ||
| 2501 | @@ -3723,6 +3724,7 @@ static struct omap_hwmod_irq_info omap44xx_mpu_irqs[] = { | ||
| 2502 | { .name = "pl310", .irq = 0 + OMAP44XX_IRQ_GIC_START }, | ||
| 2503 | { .name = "cti0", .irq = 1 + OMAP44XX_IRQ_GIC_START }, | ||
| 2504 | { .name = "cti1", .irq = 2 + OMAP44XX_IRQ_GIC_START }, | ||
| 2505 | + { .irq = -1 } | ||
| 2506 | }; | ||
| 2507 | |||
| 2508 | /* mpu master ports */ | ||
| 2509 | @@ -3737,7 +3739,6 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { | ||
| 2510 | .class = &omap44xx_mpu_hwmod_class, | ||
| 2511 | .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), | ||
| 2512 | .mpu_irqs = omap44xx_mpu_irqs, | ||
| 2513 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_mpu_irqs), | ||
| 2514 | .main_clk = "dpll_mpu_m2_ck", | ||
| 2515 | .prcm = { | ||
| 2516 | .omap4 = { | ||
| 2517 | @@ -3779,6 +3780,7 @@ static struct omap_hwmod_class omap44xx_smartreflex_hwmod_class = { | ||
| 2518 | static struct omap_hwmod omap44xx_smartreflex_core_hwmod; | ||
| 2519 | static struct omap_hwmod_irq_info omap44xx_smartreflex_core_irqs[] = { | ||
| 2520 | { .irq = 19 + OMAP44XX_IRQ_GIC_START }, | ||
| 2521 | + { .irq = -1 } | ||
| 2522 | }; | ||
| 2523 | |||
| 2524 | static struct omap_hwmod_addr_space omap44xx_smartreflex_core_addrs[] = { | ||
| 2525 | @@ -3808,7 +3810,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { | ||
| 2526 | .name = "smartreflex_core", | ||
| 2527 | .class = &omap44xx_smartreflex_hwmod_class, | ||
| 2528 | .mpu_irqs = omap44xx_smartreflex_core_irqs, | ||
| 2529 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_core_irqs), | ||
| 2530 | + | ||
| 2531 | .main_clk = "smartreflex_core_fck", | ||
| 2532 | .vdd_name = "core", | ||
| 2533 | .prcm = { | ||
| 2534 | @@ -3825,6 +3827,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { | ||
| 2535 | static struct omap_hwmod omap44xx_smartreflex_iva_hwmod; | ||
| 2536 | static struct omap_hwmod_irq_info omap44xx_smartreflex_iva_irqs[] = { | ||
| 2537 | { .irq = 102 + OMAP44XX_IRQ_GIC_START }, | ||
| 2538 | + { .irq = -1 } | ||
| 2539 | }; | ||
| 2540 | |||
| 2541 | static struct omap_hwmod_addr_space omap44xx_smartreflex_iva_addrs[] = { | ||
| 2542 | @@ -3854,7 +3857,6 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { | ||
| 2543 | .name = "smartreflex_iva", | ||
| 2544 | .class = &omap44xx_smartreflex_hwmod_class, | ||
| 2545 | .mpu_irqs = omap44xx_smartreflex_iva_irqs, | ||
| 2546 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_iva_irqs), | ||
| 2547 | .main_clk = "smartreflex_iva_fck", | ||
| 2548 | .vdd_name = "iva", | ||
| 2549 | .prcm = { | ||
| 2550 | @@ -3871,6 +3873,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { | ||
| 2551 | static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod; | ||
| 2552 | static struct omap_hwmod_irq_info omap44xx_smartreflex_mpu_irqs[] = { | ||
| 2553 | { .irq = 18 + OMAP44XX_IRQ_GIC_START }, | ||
| 2554 | + { .irq = -1 } | ||
| 2555 | }; | ||
| 2556 | |||
| 2557 | static struct omap_hwmod_addr_space omap44xx_smartreflex_mpu_addrs[] = { | ||
| 2558 | @@ -3900,7 +3903,6 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { | ||
| 2559 | .name = "smartreflex_mpu", | ||
| 2560 | .class = &omap44xx_smartreflex_hwmod_class, | ||
| 2561 | .mpu_irqs = omap44xx_smartreflex_mpu_irqs, | ||
| 2562 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_smartreflex_mpu_irqs), | ||
| 2563 | .main_clk = "smartreflex_mpu_fck", | ||
| 2564 | .vdd_name = "mpu", | ||
| 2565 | .prcm = { | ||
| 2566 | @@ -4016,6 +4018,7 @@ static struct omap_hwmod_class omap44xx_timer_hwmod_class = { | ||
| 2567 | static struct omap_hwmod omap44xx_timer1_hwmod; | ||
| 2568 | static struct omap_hwmod_irq_info omap44xx_timer1_irqs[] = { | ||
| 2569 | { .irq = 37 + OMAP44XX_IRQ_GIC_START }, | ||
| 2570 | + { .irq = -1 } | ||
| 2571 | }; | ||
| 2572 | |||
| 2573 | static struct omap_hwmod_addr_space omap44xx_timer1_addrs[] = { | ||
| 2574 | @@ -4045,7 +4048,6 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { | ||
| 2575 | .name = "timer1", | ||
| 2576 | .class = &omap44xx_timer_1ms_hwmod_class, | ||
| 2577 | .mpu_irqs = omap44xx_timer1_irqs, | ||
| 2578 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer1_irqs), | ||
| 2579 | .main_clk = "timer1_fck", | ||
| 2580 | .prcm = { | ||
| 2581 | .omap4 = { | ||
| 2582 | @@ -4061,6 +4063,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { | ||
| 2583 | static struct omap_hwmod omap44xx_timer2_hwmod; | ||
| 2584 | static struct omap_hwmod_irq_info omap44xx_timer2_irqs[] = { | ||
| 2585 | { .irq = 38 + OMAP44XX_IRQ_GIC_START }, | ||
| 2586 | + { .irq = -1 } | ||
| 2587 | }; | ||
| 2588 | |||
| 2589 | static struct omap_hwmod_addr_space omap44xx_timer2_addrs[] = { | ||
| 2590 | @@ -4090,7 +4093,6 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { | ||
| 2591 | .name = "timer2", | ||
| 2592 | .class = &omap44xx_timer_1ms_hwmod_class, | ||
| 2593 | .mpu_irqs = omap44xx_timer2_irqs, | ||
| 2594 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer2_irqs), | ||
| 2595 | .main_clk = "timer2_fck", | ||
| 2596 | .prcm = { | ||
| 2597 | .omap4 = { | ||
| 2598 | @@ -4106,6 +4108,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { | ||
| 2599 | static struct omap_hwmod omap44xx_timer3_hwmod; | ||
| 2600 | static struct omap_hwmod_irq_info omap44xx_timer3_irqs[] = { | ||
| 2601 | { .irq = 39 + OMAP44XX_IRQ_GIC_START }, | ||
| 2602 | + { .irq = -1 } | ||
| 2603 | }; | ||
| 2604 | |||
| 2605 | static struct omap_hwmod_addr_space omap44xx_timer3_addrs[] = { | ||
| 2606 | @@ -4135,7 +4138,6 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { | ||
| 2607 | .name = "timer3", | ||
| 2608 | .class = &omap44xx_timer_hwmod_class, | ||
| 2609 | .mpu_irqs = omap44xx_timer3_irqs, | ||
| 2610 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer3_irqs), | ||
| 2611 | .main_clk = "timer3_fck", | ||
| 2612 | .prcm = { | ||
| 2613 | .omap4 = { | ||
| 2614 | @@ -4151,6 +4153,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { | ||
| 2615 | static struct omap_hwmod omap44xx_timer4_hwmod; | ||
| 2616 | static struct omap_hwmod_irq_info omap44xx_timer4_irqs[] = { | ||
| 2617 | { .irq = 40 + OMAP44XX_IRQ_GIC_START }, | ||
| 2618 | + { .irq = -1 } | ||
| 2619 | }; | ||
| 2620 | |||
| 2621 | static struct omap_hwmod_addr_space omap44xx_timer4_addrs[] = { | ||
| 2622 | @@ -4180,7 +4183,6 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { | ||
| 2623 | .name = "timer4", | ||
| 2624 | .class = &omap44xx_timer_hwmod_class, | ||
| 2625 | .mpu_irqs = omap44xx_timer4_irqs, | ||
| 2626 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer4_irqs), | ||
| 2627 | .main_clk = "timer4_fck", | ||
| 2628 | .prcm = { | ||
| 2629 | .omap4 = { | ||
| 2630 | @@ -4196,6 +4198,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { | ||
| 2631 | static struct omap_hwmod omap44xx_timer5_hwmod; | ||
| 2632 | static struct omap_hwmod_irq_info omap44xx_timer5_irqs[] = { | ||
| 2633 | { .irq = 41 + OMAP44XX_IRQ_GIC_START }, | ||
| 2634 | + { .irq = -1 } | ||
| 2635 | }; | ||
| 2636 | |||
| 2637 | static struct omap_hwmod_addr_space omap44xx_timer5_addrs[] = { | ||
| 2638 | @@ -4244,7 +4247,6 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { | ||
| 2639 | .name = "timer5", | ||
| 2640 | .class = &omap44xx_timer_hwmod_class, | ||
| 2641 | .mpu_irqs = omap44xx_timer5_irqs, | ||
| 2642 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer5_irqs), | ||
| 2643 | .main_clk = "timer5_fck", | ||
| 2644 | .prcm = { | ||
| 2645 | .omap4 = { | ||
| 2646 | @@ -4260,6 +4262,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { | ||
| 2647 | static struct omap_hwmod omap44xx_timer6_hwmod; | ||
| 2648 | static struct omap_hwmod_irq_info omap44xx_timer6_irqs[] = { | ||
| 2649 | { .irq = 42 + OMAP44XX_IRQ_GIC_START }, | ||
| 2650 | + { .irq = -1 } | ||
| 2651 | }; | ||
| 2652 | |||
| 2653 | static struct omap_hwmod_addr_space omap44xx_timer6_addrs[] = { | ||
| 2654 | @@ -4308,7 +4311,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { | ||
| 2655 | .name = "timer6", | ||
| 2656 | .class = &omap44xx_timer_hwmod_class, | ||
| 2657 | .mpu_irqs = omap44xx_timer6_irqs, | ||
| 2658 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer6_irqs), | ||
| 2659 | + | ||
| 2660 | .main_clk = "timer6_fck", | ||
| 2661 | .prcm = { | ||
| 2662 | .omap4 = { | ||
| 2663 | @@ -4324,6 +4327,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { | ||
| 2664 | static struct omap_hwmod omap44xx_timer7_hwmod; | ||
| 2665 | static struct omap_hwmod_irq_info omap44xx_timer7_irqs[] = { | ||
| 2666 | { .irq = 43 + OMAP44XX_IRQ_GIC_START }, | ||
| 2667 | + { .irq = -1 } | ||
| 2668 | }; | ||
| 2669 | |||
| 2670 | static struct omap_hwmod_addr_space omap44xx_timer7_addrs[] = { | ||
| 2671 | @@ -4372,7 +4376,6 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { | ||
| 2672 | .name = "timer7", | ||
| 2673 | .class = &omap44xx_timer_hwmod_class, | ||
| 2674 | .mpu_irqs = omap44xx_timer7_irqs, | ||
| 2675 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer7_irqs), | ||
| 2676 | .main_clk = "timer7_fck", | ||
| 2677 | .prcm = { | ||
| 2678 | .omap4 = { | ||
| 2679 | @@ -4388,6 +4391,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { | ||
| 2680 | static struct omap_hwmod omap44xx_timer8_hwmod; | ||
| 2681 | static struct omap_hwmod_irq_info omap44xx_timer8_irqs[] = { | ||
| 2682 | { .irq = 44 + OMAP44XX_IRQ_GIC_START }, | ||
| 2683 | + { .irq = -1 } | ||
| 2684 | }; | ||
| 2685 | |||
| 2686 | static struct omap_hwmod_addr_space omap44xx_timer8_addrs[] = { | ||
| 2687 | @@ -4436,7 +4440,6 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { | ||
| 2688 | .name = "timer8", | ||
| 2689 | .class = &omap44xx_timer_hwmod_class, | ||
| 2690 | .mpu_irqs = omap44xx_timer8_irqs, | ||
| 2691 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer8_irqs), | ||
| 2692 | .main_clk = "timer8_fck", | ||
| 2693 | .prcm = { | ||
| 2694 | .omap4 = { | ||
| 2695 | @@ -4452,6 +4455,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { | ||
| 2696 | static struct omap_hwmod omap44xx_timer9_hwmod; | ||
| 2697 | static struct omap_hwmod_irq_info omap44xx_timer9_irqs[] = { | ||
| 2698 | { .irq = 45 + OMAP44XX_IRQ_GIC_START }, | ||
| 2699 | + { .irq = -1 } | ||
| 2700 | }; | ||
| 2701 | |||
| 2702 | static struct omap_hwmod_addr_space omap44xx_timer9_addrs[] = { | ||
| 2703 | @@ -4481,7 +4485,6 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { | ||
| 2704 | .name = "timer9", | ||
| 2705 | .class = &omap44xx_timer_hwmod_class, | ||
| 2706 | .mpu_irqs = omap44xx_timer9_irqs, | ||
| 2707 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer9_irqs), | ||
| 2708 | .main_clk = "timer9_fck", | ||
| 2709 | .prcm = { | ||
| 2710 | .omap4 = { | ||
| 2711 | @@ -4497,6 +4500,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { | ||
| 2712 | static struct omap_hwmod omap44xx_timer10_hwmod; | ||
| 2713 | static struct omap_hwmod_irq_info omap44xx_timer10_irqs[] = { | ||
| 2714 | { .irq = 46 + OMAP44XX_IRQ_GIC_START }, | ||
| 2715 | + { .irq = -1 } | ||
| 2716 | }; | ||
| 2717 | |||
| 2718 | static struct omap_hwmod_addr_space omap44xx_timer10_addrs[] = { | ||
| 2719 | @@ -4526,7 +4530,6 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { | ||
| 2720 | .name = "timer10", | ||
| 2721 | .class = &omap44xx_timer_1ms_hwmod_class, | ||
| 2722 | .mpu_irqs = omap44xx_timer10_irqs, | ||
| 2723 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer10_irqs), | ||
| 2724 | .main_clk = "timer10_fck", | ||
| 2725 | .prcm = { | ||
| 2726 | .omap4 = { | ||
| 2727 | @@ -4542,6 +4545,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { | ||
| 2728 | static struct omap_hwmod omap44xx_timer11_hwmod; | ||
| 2729 | static struct omap_hwmod_irq_info omap44xx_timer11_irqs[] = { | ||
| 2730 | { .irq = 47 + OMAP44XX_IRQ_GIC_START }, | ||
| 2731 | + { .irq = -1 } | ||
| 2732 | }; | ||
| 2733 | |||
| 2734 | static struct omap_hwmod_addr_space omap44xx_timer11_addrs[] = { | ||
| 2735 | @@ -4571,7 +4575,6 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { | ||
| 2736 | .name = "timer11", | ||
| 2737 | .class = &omap44xx_timer_hwmod_class, | ||
| 2738 | .mpu_irqs = omap44xx_timer11_irqs, | ||
| 2739 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_timer11_irqs), | ||
| 2740 | .main_clk = "timer11_fck", | ||
| 2741 | .prcm = { | ||
| 2742 | .omap4 = { | ||
| 2743 | @@ -4609,6 +4612,7 @@ static struct omap_hwmod_class omap44xx_uart_hwmod_class = { | ||
| 2744 | static struct omap_hwmod omap44xx_uart1_hwmod; | ||
| 2745 | static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { | ||
| 2746 | { .irq = 72 + OMAP44XX_IRQ_GIC_START }, | ||
| 2747 | + { .irq = -1 } | ||
| 2748 | }; | ||
| 2749 | |||
| 2750 | static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { | ||
| 2751 | @@ -4643,7 +4647,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { | ||
| 2752 | .name = "uart1", | ||
| 2753 | .class = &omap44xx_uart_hwmod_class, | ||
| 2754 | .mpu_irqs = omap44xx_uart1_irqs, | ||
| 2755 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart1_irqs), | ||
| 2756 | .sdma_reqs = omap44xx_uart1_sdma_reqs, | ||
| 2757 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), | ||
| 2758 | .main_clk = "uart1_fck", | ||
| 2759 | @@ -4661,6 +4664,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { | ||
| 2760 | static struct omap_hwmod omap44xx_uart2_hwmod; | ||
| 2761 | static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { | ||
| 2762 | { .irq = 73 + OMAP44XX_IRQ_GIC_START }, | ||
| 2763 | + { .irq = -1 } | ||
| 2764 | }; | ||
| 2765 | |||
| 2766 | static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { | ||
| 2767 | @@ -4695,7 +4699,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { | ||
| 2768 | .name = "uart2", | ||
| 2769 | .class = &omap44xx_uart_hwmod_class, | ||
| 2770 | .mpu_irqs = omap44xx_uart2_irqs, | ||
| 2771 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart2_irqs), | ||
| 2772 | .sdma_reqs = omap44xx_uart2_sdma_reqs, | ||
| 2773 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), | ||
| 2774 | .main_clk = "uart2_fck", | ||
| 2775 | @@ -4713,6 +4716,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { | ||
| 2776 | static struct omap_hwmod omap44xx_uart3_hwmod; | ||
| 2777 | static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { | ||
| 2778 | { .irq = 74 + OMAP44XX_IRQ_GIC_START }, | ||
| 2779 | + { .irq = -1 } | ||
| 2780 | }; | ||
| 2781 | |||
| 2782 | static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { | ||
| 2783 | @@ -4748,7 +4752,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { | ||
| 2784 | .class = &omap44xx_uart_hwmod_class, | ||
| 2785 | .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), | ||
| 2786 | .mpu_irqs = omap44xx_uart3_irqs, | ||
| 2787 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart3_irqs), | ||
| 2788 | .sdma_reqs = omap44xx_uart3_sdma_reqs, | ||
| 2789 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), | ||
| 2790 | .main_clk = "uart3_fck", | ||
| 2791 | @@ -4766,6 +4769,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { | ||
| 2792 | static struct omap_hwmod omap44xx_uart4_hwmod; | ||
| 2793 | static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { | ||
| 2794 | { .irq = 70 + OMAP44XX_IRQ_GIC_START }, | ||
| 2795 | + { .irq = -1 } | ||
| 2796 | }; | ||
| 2797 | |||
| 2798 | static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { | ||
| 2799 | @@ -4800,7 +4804,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { | ||
| 2800 | .name = "uart4", | ||
| 2801 | .class = &omap44xx_uart_hwmod_class, | ||
| 2802 | .mpu_irqs = omap44xx_uart4_irqs, | ||
| 2803 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_uart4_irqs), | ||
| 2804 | .sdma_reqs = omap44xx_uart4_sdma_reqs, | ||
| 2805 | .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), | ||
| 2806 | .main_clk = "uart4_fck", | ||
| 2807 | @@ -4841,6 +4844,7 @@ static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = { | ||
| 2808 | static struct omap_hwmod_irq_info omap44xx_usb_otg_hs_irqs[] = { | ||
| 2809 | { .name = "mc", .irq = 92 + OMAP44XX_IRQ_GIC_START }, | ||
| 2810 | { .name = "dma", .irq = 93 + OMAP44XX_IRQ_GIC_START }, | ||
| 2811 | + { .irq = -1 } | ||
| 2812 | }; | ||
| 2813 | |||
| 2814 | /* usb_otg_hs master ports */ | ||
| 2815 | @@ -4880,7 +4884,6 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { | ||
| 2816 | .class = &omap44xx_usb_otg_hs_hwmod_class, | ||
| 2817 | .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, | ||
| 2818 | .mpu_irqs = omap44xx_usb_otg_hs_irqs, | ||
| 2819 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_irqs), | ||
| 2820 | .main_clk = "usb_otg_hs_ick", | ||
| 2821 | .prcm = { | ||
| 2822 | .omap4 = { | ||
| 2823 | @@ -4923,6 +4926,7 @@ static struct omap_hwmod_class omap44xx_wd_timer_hwmod_class = { | ||
| 2824 | static struct omap_hwmod omap44xx_wd_timer2_hwmod; | ||
| 2825 | static struct omap_hwmod_irq_info omap44xx_wd_timer2_irqs[] = { | ||
| 2826 | { .irq = 80 + OMAP44XX_IRQ_GIC_START }, | ||
| 2827 | + { .irq = -1 } | ||
| 2828 | }; | ||
| 2829 | |||
| 2830 | static struct omap_hwmod_addr_space omap44xx_wd_timer2_addrs[] = { | ||
| 2831 | @@ -4952,7 +4956,6 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { | ||
| 2832 | .name = "wd_timer2", | ||
| 2833 | .class = &omap44xx_wd_timer_hwmod_class, | ||
| 2834 | .mpu_irqs = omap44xx_wd_timer2_irqs, | ||
| 2835 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer2_irqs), | ||
| 2836 | .main_clk = "wd_timer2_fck", | ||
| 2837 | .prcm = { | ||
| 2838 | .omap4 = { | ||
| 2839 | @@ -4968,6 +4971,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { | ||
| 2840 | static struct omap_hwmod omap44xx_wd_timer3_hwmod; | ||
| 2841 | static struct omap_hwmod_irq_info omap44xx_wd_timer3_irqs[] = { | ||
| 2842 | { .irq = 36 + OMAP44XX_IRQ_GIC_START }, | ||
| 2843 | + { .irq = -1 } | ||
| 2844 | }; | ||
| 2845 | |||
| 2846 | static struct omap_hwmod_addr_space omap44xx_wd_timer3_addrs[] = { | ||
| 2847 | @@ -5016,7 +5020,6 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { | ||
| 2848 | .name = "wd_timer3", | ||
| 2849 | .class = &omap44xx_wd_timer_hwmod_class, | ||
| 2850 | .mpu_irqs = omap44xx_wd_timer3_irqs, | ||
| 2851 | - .mpu_irqs_cnt = ARRAY_SIZE(omap44xx_wd_timer3_irqs), | ||
| 2852 | .main_clk = "wd_timer3_fck", | ||
| 2853 | .prcm = { | ||
| 2854 | .omap4 = { | ||
| 2855 | diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 2856 | index f3a3bff..b8385e2 100644 | ||
| 2857 | --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 2858 | +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 2859 | @@ -97,7 +97,7 @@ struct omap_hwmod_mux_info { | ||
| 2860 | /** | ||
| 2861 | * struct omap_hwmod_irq_info - MPU IRQs used by the hwmod | ||
| 2862 | * @name: name of the IRQ channel (module local name) | ||
| 2863 | - * @irq_ch: IRQ channel ID | ||
| 2864 | + * @irq: IRQ channel ID (should be non-negative except -1 = terminator) | ||
| 2865 | * | ||
| 2866 | * @name should be something short, e.g., "tx" or "rx". It is for use | ||
| 2867 | * by platform_get_resource_byname(). It is defined locally to the | ||
| 2868 | @@ -105,7 +105,7 @@ struct omap_hwmod_mux_info { | ||
| 2869 | */ | ||
| 2870 | struct omap_hwmod_irq_info { | ||
| 2871 | const char *name; | ||
| 2872 | - u16 irq; | ||
| 2873 | + s16 irq; | ||
| 2874 | }; | ||
| 2875 | |||
| 2876 | /** | ||
| 2877 | @@ -466,7 +466,7 @@ struct omap_hwmod_class { | ||
| 2878 | * @name: name of the hwmod | ||
| 2879 | * @class: struct omap_hwmod_class * to the class of this hwmod | ||
| 2880 | * @od: struct omap_device currently associated with this hwmod (internal use) | ||
| 2881 | - * @mpu_irqs: ptr to an array of MPU IRQs (see also mpu_irqs_cnt) | ||
| 2882 | + * @mpu_irqs: ptr to an array of MPU IRQs | ||
| 2883 | * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) | ||
| 2884 | * @prcm: PRCM data pertaining to this hwmod | ||
| 2885 | * @main_clk: main clock: OMAP clock name | ||
| 2886 | @@ -480,7 +480,6 @@ struct omap_hwmod_class { | ||
| 2887 | * @_sysc_cache: internal-use hwmod flags | ||
| 2888 | * @_mpu_rt_va: cached register target start address (internal use) | ||
| 2889 | * @_mpu_port_index: cached MPU register target slave ID (internal use) | ||
| 2890 | - * @mpu_irqs_cnt: number of @mpu_irqs | ||
| 2891 | * @sdma_reqs_cnt: number of @sdma_reqs | ||
| 2892 | * @opt_clks_cnt: number of @opt_clks | ||
| 2893 | * @master_cnt: number of @master entries | ||
| 2894 | @@ -529,7 +528,6 @@ struct omap_hwmod { | ||
| 2895 | u16 flags; | ||
| 2896 | u8 _mpu_port_index; | ||
| 2897 | u8 response_lat; | ||
| 2898 | - u8 mpu_irqs_cnt; | ||
| 2899 | u8 sdma_reqs_cnt; | ||
| 2900 | u8 rst_lines_cnt; | ||
| 2901 | u8 opt_clks_cnt; | ||
| 2902 | -- | ||
| 2903 | 1.7.2.5 | ||
| 2904 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0040-omap_hwmod-share-identical-omap_hwmod_mpu_irqs-array.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0040-omap_hwmod-share-identical-omap_hwmod_mpu_irqs-array.patch deleted file mode 100644 index fabe223d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0040-omap_hwmod-share-identical-omap_hwmod_mpu_irqs-array.patch +++ /dev/null | |||
| @@ -1,1815 +0,0 @@ | |||
| 1 | From 5cd00a6a7afe6757255da2256157ce5504cf4b1a Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Paul Walmsley <paul@pwsan.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:07 -0600 | ||
| 4 | Subject: [PATCH 040/149] omap_hwmod: share identical omap_hwmod_mpu_irqs arrays | ||
| 5 | |||
| 6 | To reduce kernel source file data duplication, share struct | ||
| 7 | omap_hwmod_mpu_irqs arrays across OMAP2xxx and 3xxx hwmod data files. | ||
| 8 | |||
| 9 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 10 | --- | ||
| 11 | arch/arm/mach-omap2/Makefile | 11 +- | ||
| 12 | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 167 +++----------------- | ||
| 13 | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 166 +++----------------- | ||
| 14 | .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 142 +++++++++++++++++ | ||
| 15 | arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 21 +++ | ||
| 16 | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 162 +++---------------- | ||
| 17 | arch/arm/mach-omap2/omap_hwmod_common_data.h | 29 ++++ | ||
| 18 | 7 files changed, 275 insertions(+), 423 deletions(-) | ||
| 19 | create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | ||
| 20 | create mode 100644 arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | ||
| 21 | |||
| 22 | diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile | ||
| 23 | index 8a75d17..f343365 100644 | ||
| 24 | --- a/arch/arm/mach-omap2/Makefile | ||
| 25 | +++ b/arch/arm/mach-omap2/Makefile | ||
| 26 | @@ -145,13 +145,18 @@ obj-$(CONFIG_SOC_OMAP2420) += opp2420_data.o | ||
| 27 | obj-$(CONFIG_SOC_OMAP2430) += opp2430_data.o | ||
| 28 | |||
| 29 | # hwmod data | ||
| 30 | -obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_interconnect_data.o \ | ||
| 31 | +obj-$(CONFIG_SOC_OMAP2420) += omap_hwmod_2xxx_ipblock_data.o \ | ||
| 32 | + omap_hwmod_2xxx_3xxx_ipblock_data.o \ | ||
| 33 | + omap_hwmod_2xxx_interconnect_data.o \ | ||
| 34 | omap_hwmod_2xxx_3xxx_interconnect_data.o \ | ||
| 35 | omap_hwmod_2420_data.o | ||
| 36 | -obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_interconnect_data.o \ | ||
| 37 | +obj-$(CONFIG_SOC_OMAP2430) += omap_hwmod_2xxx_ipblock_data.o \ | ||
| 38 | + omap_hwmod_2xxx_3xxx_ipblock_data.o \ | ||
| 39 | + omap_hwmod_2xxx_interconnect_data.o \ | ||
| 40 | omap_hwmod_2xxx_3xxx_interconnect_data.o \ | ||
| 41 | omap_hwmod_2430_data.o | ||
| 42 | -obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_interconnect_data.o \ | ||
| 43 | +obj-$(CONFIG_ARCH_OMAP3) += omap_hwmod_2xxx_3xxx_ipblock_data.o \ | ||
| 44 | + omap_hwmod_2xxx_3xxx_interconnect_data.o \ | ||
| 45 | omap_hwmod_3xxx_data.o | ||
| 46 | obj-$(CONFIG_ARCH_OMAP4) += omap_hwmod_44xx_data.o | ||
| 47 | |||
| 48 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 49 | index 04730d3..73157ee 100644 | ||
| 50 | --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 51 | +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 52 | @@ -294,10 +294,6 @@ static struct omap_hwmod_class omap2420_timer_hwmod_class = { | ||
| 53 | |||
| 54 | /* timer1 */ | ||
| 55 | static struct omap_hwmod omap2420_timer1_hwmod; | ||
| 56 | -static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { | ||
| 57 | - { .irq = 37, }, | ||
| 58 | - { .irq = -1 } | ||
| 59 | -}; | ||
| 60 | |||
| 61 | static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { | ||
| 62 | { | ||
| 63 | @@ -325,7 +321,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = { | ||
| 64 | /* timer1 hwmod */ | ||
| 65 | static struct omap_hwmod omap2420_timer1_hwmod = { | ||
| 66 | .name = "timer1", | ||
| 67 | - .mpu_irqs = omap2420_timer1_mpu_irqs, | ||
| 68 | + .mpu_irqs = omap2_timer1_mpu_irqs, | ||
| 69 | .main_clk = "gpt1_fck", | ||
| 70 | .prcm = { | ||
| 71 | .omap2 = { | ||
| 72 | @@ -344,11 +340,6 @@ static struct omap_hwmod omap2420_timer1_hwmod = { | ||
| 73 | |||
| 74 | /* timer2 */ | ||
| 75 | static struct omap_hwmod omap2420_timer2_hwmod; | ||
| 76 | -static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { | ||
| 77 | - { .irq = 38, }, | ||
| 78 | - { .irq = -1 } | ||
| 79 | -}; | ||
| 80 | - | ||
| 81 | |||
| 82 | /* l4_core -> timer2 */ | ||
| 83 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { | ||
| 84 | @@ -367,7 +358,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = { | ||
| 85 | /* timer2 hwmod */ | ||
| 86 | static struct omap_hwmod omap2420_timer2_hwmod = { | ||
| 87 | .name = "timer2", | ||
| 88 | - .mpu_irqs = omap2420_timer2_mpu_irqs, | ||
| 89 | + .mpu_irqs = omap2_timer2_mpu_irqs, | ||
| 90 | .main_clk = "gpt2_fck", | ||
| 91 | .prcm = { | ||
| 92 | .omap2 = { | ||
| 93 | @@ -386,10 +377,6 @@ static struct omap_hwmod omap2420_timer2_hwmod = { | ||
| 94 | |||
| 95 | /* timer3 */ | ||
| 96 | static struct omap_hwmod omap2420_timer3_hwmod; | ||
| 97 | -static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { | ||
| 98 | - { .irq = 39, }, | ||
| 99 | - { .irq = -1 } | ||
| 100 | -}; | ||
| 101 | |||
| 102 | /* l4_core -> timer3 */ | ||
| 103 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { | ||
| 104 | @@ -408,7 +395,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = { | ||
| 105 | /* timer3 hwmod */ | ||
| 106 | static struct omap_hwmod omap2420_timer3_hwmod = { | ||
| 107 | .name = "timer3", | ||
| 108 | - .mpu_irqs = omap2420_timer3_mpu_irqs, | ||
| 109 | + .mpu_irqs = omap2_timer3_mpu_irqs, | ||
| 110 | .main_clk = "gpt3_fck", | ||
| 111 | .prcm = { | ||
| 112 | .omap2 = { | ||
| 113 | @@ -427,10 +414,6 @@ static struct omap_hwmod omap2420_timer3_hwmod = { | ||
| 114 | |||
| 115 | /* timer4 */ | ||
| 116 | static struct omap_hwmod omap2420_timer4_hwmod; | ||
| 117 | -static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { | ||
| 118 | - { .irq = 40, }, | ||
| 119 | - { .irq = -1 } | ||
| 120 | -}; | ||
| 121 | |||
| 122 | /* l4_core -> timer4 */ | ||
| 123 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { | ||
| 124 | @@ -449,7 +432,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = { | ||
| 125 | /* timer4 hwmod */ | ||
| 126 | static struct omap_hwmod omap2420_timer4_hwmod = { | ||
| 127 | .name = "timer4", | ||
| 128 | - .mpu_irqs = omap2420_timer4_mpu_irqs, | ||
| 129 | + .mpu_irqs = omap2_timer4_mpu_irqs, | ||
| 130 | .main_clk = "gpt4_fck", | ||
| 131 | .prcm = { | ||
| 132 | .omap2 = { | ||
| 133 | @@ -468,10 +451,6 @@ static struct omap_hwmod omap2420_timer4_hwmod = { | ||
| 134 | |||
| 135 | /* timer5 */ | ||
| 136 | static struct omap_hwmod omap2420_timer5_hwmod; | ||
| 137 | -static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { | ||
| 138 | - { .irq = 41, }, | ||
| 139 | - { .irq = -1 } | ||
| 140 | -}; | ||
| 141 | |||
| 142 | /* l4_core -> timer5 */ | ||
| 143 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { | ||
| 144 | @@ -490,7 +469,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = { | ||
| 145 | /* timer5 hwmod */ | ||
| 146 | static struct omap_hwmod omap2420_timer5_hwmod = { | ||
| 147 | .name = "timer5", | ||
| 148 | - .mpu_irqs = omap2420_timer5_mpu_irqs, | ||
| 149 | + .mpu_irqs = omap2_timer5_mpu_irqs, | ||
| 150 | .main_clk = "gpt5_fck", | ||
| 151 | .prcm = { | ||
| 152 | .omap2 = { | ||
| 153 | @@ -510,10 +489,6 @@ static struct omap_hwmod omap2420_timer5_hwmod = { | ||
| 154 | |||
| 155 | /* timer6 */ | ||
| 156 | static struct omap_hwmod omap2420_timer6_hwmod; | ||
| 157 | -static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { | ||
| 158 | - { .irq = 42, }, | ||
| 159 | - { .irq = -1 } | ||
| 160 | -}; | ||
| 161 | |||
| 162 | /* l4_core -> timer6 */ | ||
| 163 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { | ||
| 164 | @@ -532,7 +507,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = { | ||
| 165 | /* timer6 hwmod */ | ||
| 166 | static struct omap_hwmod omap2420_timer6_hwmod = { | ||
| 167 | .name = "timer6", | ||
| 168 | - .mpu_irqs = omap2420_timer6_mpu_irqs, | ||
| 169 | + .mpu_irqs = omap2_timer6_mpu_irqs, | ||
| 170 | .main_clk = "gpt6_fck", | ||
| 171 | .prcm = { | ||
| 172 | .omap2 = { | ||
| 173 | @@ -551,10 +526,6 @@ static struct omap_hwmod omap2420_timer6_hwmod = { | ||
| 174 | |||
| 175 | /* timer7 */ | ||
| 176 | static struct omap_hwmod omap2420_timer7_hwmod; | ||
| 177 | -static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { | ||
| 178 | - { .irq = 43, }, | ||
| 179 | - { .irq = -1 } | ||
| 180 | -}; | ||
| 181 | |||
| 182 | /* l4_core -> timer7 */ | ||
| 183 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { | ||
| 184 | @@ -573,7 +544,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = { | ||
| 185 | /* timer7 hwmod */ | ||
| 186 | static struct omap_hwmod omap2420_timer7_hwmod = { | ||
| 187 | .name = "timer7", | ||
| 188 | - .mpu_irqs = omap2420_timer7_mpu_irqs, | ||
| 189 | + .mpu_irqs = omap2_timer7_mpu_irqs, | ||
| 190 | .main_clk = "gpt7_fck", | ||
| 191 | .prcm = { | ||
| 192 | .omap2 = { | ||
| 193 | @@ -592,10 +563,6 @@ static struct omap_hwmod omap2420_timer7_hwmod = { | ||
| 194 | |||
| 195 | /* timer8 */ | ||
| 196 | static struct omap_hwmod omap2420_timer8_hwmod; | ||
| 197 | -static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { | ||
| 198 | - { .irq = 44, }, | ||
| 199 | - { .irq = -1 } | ||
| 200 | -}; | ||
| 201 | |||
| 202 | /* l4_core -> timer8 */ | ||
| 203 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { | ||
| 204 | @@ -614,7 +581,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = { | ||
| 205 | /* timer8 hwmod */ | ||
| 206 | static struct omap_hwmod omap2420_timer8_hwmod = { | ||
| 207 | .name = "timer8", | ||
| 208 | - .mpu_irqs = omap2420_timer8_mpu_irqs, | ||
| 209 | + .mpu_irqs = omap2_timer8_mpu_irqs, | ||
| 210 | .main_clk = "gpt8_fck", | ||
| 211 | .prcm = { | ||
| 212 | .omap2 = { | ||
| 213 | @@ -633,10 +600,6 @@ static struct omap_hwmod omap2420_timer8_hwmod = { | ||
| 214 | |||
| 215 | /* timer9 */ | ||
| 216 | static struct omap_hwmod omap2420_timer9_hwmod; | ||
| 217 | -static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { | ||
| 218 | - { .irq = 45, }, | ||
| 219 | - { .irq = -1 } | ||
| 220 | -}; | ||
| 221 | |||
| 222 | /* l4_core -> timer9 */ | ||
| 223 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { | ||
| 224 | @@ -655,7 +618,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = { | ||
| 225 | /* timer9 hwmod */ | ||
| 226 | static struct omap_hwmod omap2420_timer9_hwmod = { | ||
| 227 | .name = "timer9", | ||
| 228 | - .mpu_irqs = omap2420_timer9_mpu_irqs, | ||
| 229 | + .mpu_irqs = omap2_timer9_mpu_irqs, | ||
| 230 | .main_clk = "gpt9_fck", | ||
| 231 | .prcm = { | ||
| 232 | .omap2 = { | ||
| 233 | @@ -674,10 +637,6 @@ static struct omap_hwmod omap2420_timer9_hwmod = { | ||
| 234 | |||
| 235 | /* timer10 */ | ||
| 236 | static struct omap_hwmod omap2420_timer10_hwmod; | ||
| 237 | -static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { | ||
| 238 | - { .irq = 46, }, | ||
| 239 | - { .irq = -1 } | ||
| 240 | -}; | ||
| 241 | |||
| 242 | /* l4_core -> timer10 */ | ||
| 243 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { | ||
| 244 | @@ -696,7 +655,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = { | ||
| 245 | /* timer10 hwmod */ | ||
| 246 | static struct omap_hwmod omap2420_timer10_hwmod = { | ||
| 247 | .name = "timer10", | ||
| 248 | - .mpu_irqs = omap2420_timer10_mpu_irqs, | ||
| 249 | + .mpu_irqs = omap2_timer10_mpu_irqs, | ||
| 250 | .main_clk = "gpt10_fck", | ||
| 251 | .prcm = { | ||
| 252 | .omap2 = { | ||
| 253 | @@ -715,10 +674,6 @@ static struct omap_hwmod omap2420_timer10_hwmod = { | ||
| 254 | |||
| 255 | /* timer11 */ | ||
| 256 | static struct omap_hwmod omap2420_timer11_hwmod; | ||
| 257 | -static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { | ||
| 258 | - { .irq = 47, }, | ||
| 259 | - { .irq = -1 } | ||
| 260 | -}; | ||
| 261 | |||
| 262 | /* l4_core -> timer11 */ | ||
| 263 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { | ||
| 264 | @@ -737,7 +692,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = { | ||
| 265 | /* timer11 hwmod */ | ||
| 266 | static struct omap_hwmod omap2420_timer11_hwmod = { | ||
| 267 | .name = "timer11", | ||
| 268 | - .mpu_irqs = omap2420_timer11_mpu_irqs, | ||
| 269 | + .mpu_irqs = omap2_timer11_mpu_irqs, | ||
| 270 | .main_clk = "gpt11_fck", | ||
| 271 | .prcm = { | ||
| 272 | .omap2 = { | ||
| 273 | @@ -756,10 +711,6 @@ static struct omap_hwmod omap2420_timer11_hwmod = { | ||
| 274 | |||
| 275 | /* timer12 */ | ||
| 276 | static struct omap_hwmod omap2420_timer12_hwmod; | ||
| 277 | -static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { | ||
| 278 | - { .irq = 48, }, | ||
| 279 | - { .irq = -1 } | ||
| 280 | -}; | ||
| 281 | |||
| 282 | /* l4_core -> timer12 */ | ||
| 283 | static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { | ||
| 284 | @@ -778,7 +729,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = { | ||
| 285 | /* timer12 hwmod */ | ||
| 286 | static struct omap_hwmod omap2420_timer12_hwmod = { | ||
| 287 | .name = "timer12", | ||
| 288 | - .mpu_irqs = omap2420_timer12_mpu_irqs, | ||
| 289 | + .mpu_irqs = omap2xxx_timer12_mpu_irqs, | ||
| 290 | .main_clk = "gpt12_fck", | ||
| 291 | .prcm = { | ||
| 292 | .omap2 = { | ||
| 293 | @@ -877,11 +828,6 @@ static struct omap_hwmod_class uart_class = { | ||
| 294 | |||
| 295 | /* UART1 */ | ||
| 296 | |||
| 297 | -static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { | ||
| 298 | - { .irq = INT_24XX_UART1_IRQ, }, | ||
| 299 | - { .irq = -1 } | ||
| 300 | -}; | ||
| 301 | - | ||
| 302 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | ||
| 303 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | ||
| 304 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | ||
| 305 | @@ -893,7 +839,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { | ||
| 306 | |||
| 307 | static struct omap_hwmod omap2420_uart1_hwmod = { | ||
| 308 | .name = "uart1", | ||
| 309 | - .mpu_irqs = uart1_mpu_irqs, | ||
| 310 | + .mpu_irqs = omap2_uart1_mpu_irqs, | ||
| 311 | .sdma_reqs = uart1_sdma_reqs, | ||
| 312 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | ||
| 313 | .main_clk = "uart1_fck", | ||
| 314 | @@ -914,11 +860,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { | ||
| 315 | |||
| 316 | /* UART2 */ | ||
| 317 | |||
| 318 | -static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { | ||
| 319 | - { .irq = INT_24XX_UART2_IRQ, }, | ||
| 320 | - { .irq = -1 } | ||
| 321 | -}; | ||
| 322 | - | ||
| 323 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | ||
| 324 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | ||
| 325 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | ||
| 326 | @@ -930,7 +871,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { | ||
| 327 | |||
| 328 | static struct omap_hwmod omap2420_uart2_hwmod = { | ||
| 329 | .name = "uart2", | ||
| 330 | - .mpu_irqs = uart2_mpu_irqs, | ||
| 331 | + .mpu_irqs = omap2_uart2_mpu_irqs, | ||
| 332 | .sdma_reqs = uart2_sdma_reqs, | ||
| 333 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | ||
| 334 | .main_clk = "uart2_fck", | ||
| 335 | @@ -951,11 +892,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { | ||
| 336 | |||
| 337 | /* UART3 */ | ||
| 338 | |||
| 339 | -static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { | ||
| 340 | - { .irq = INT_24XX_UART3_IRQ, }, | ||
| 341 | - { .irq = -1 } | ||
| 342 | -}; | ||
| 343 | - | ||
| 344 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | ||
| 345 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | ||
| 346 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | ||
| 347 | @@ -967,7 +903,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { | ||
| 348 | |||
| 349 | static struct omap_hwmod omap2420_uart3_hwmod = { | ||
| 350 | .name = "uart3", | ||
| 351 | - .mpu_irqs = uart3_mpu_irqs, | ||
| 352 | + .mpu_irqs = omap2_uart3_mpu_irqs, | ||
| 353 | .sdma_reqs = uart3_sdma_reqs, | ||
| 354 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | ||
| 355 | .main_clk = "uart3_fck", | ||
| 356 | @@ -1085,11 +1021,6 @@ static struct omap_hwmod_class omap2420_dispc_hwmod_class = { | ||
| 357 | .sysc = &omap2420_dispc_sysc, | ||
| 358 | }; | ||
| 359 | |||
| 360 | -static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { | ||
| 361 | - { .irq = 25 }, | ||
| 362 | - { .irq = -1 } | ||
| 363 | -}; | ||
| 364 | - | ||
| 365 | /* l4_core -> dss_dispc */ | ||
| 366 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { | ||
| 367 | .master = &omap2420_l4_core_hwmod, | ||
| 368 | @@ -1113,7 +1044,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = { | ||
| 369 | static struct omap_hwmod omap2420_dss_dispc_hwmod = { | ||
| 370 | .name = "dss_dispc", | ||
| 371 | .class = &omap2420_dispc_hwmod_class, | ||
| 372 | - .mpu_irqs = omap2420_dispc_irqs, | ||
| 373 | + .mpu_irqs = omap2_dispc_irqs, | ||
| 374 | .main_clk = "dss1_fck", | ||
| 375 | .prcm = { | ||
| 376 | .omap2 = { | ||
| 377 | @@ -1252,11 +1183,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr; | ||
| 378 | |||
| 379 | /* I2C1 */ | ||
| 380 | |||
| 381 | -static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { | ||
| 382 | - { .irq = INT_24XX_I2C1_IRQ, }, | ||
| 383 | - { .irq = -1 } | ||
| 384 | -}; | ||
| 385 | - | ||
| 386 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | ||
| 387 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | ||
| 388 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | ||
| 389 | @@ -1268,7 +1194,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { | ||
| 390 | |||
| 391 | static struct omap_hwmod omap2420_i2c1_hwmod = { | ||
| 392 | .name = "i2c1", | ||
| 393 | - .mpu_irqs = i2c1_mpu_irqs, | ||
| 394 | + .mpu_irqs = omap2_i2c1_mpu_irqs, | ||
| 395 | .sdma_reqs = i2c1_sdma_reqs, | ||
| 396 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | ||
| 397 | .main_clk = "i2c1_fck", | ||
| 398 | @@ -1291,11 +1217,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { | ||
| 399 | |||
| 400 | /* I2C2 */ | ||
| 401 | |||
| 402 | -static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { | ||
| 403 | - { .irq = INT_24XX_I2C2_IRQ, }, | ||
| 404 | - { .irq = -1 } | ||
| 405 | -}; | ||
| 406 | - | ||
| 407 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | ||
| 408 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | ||
| 409 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | ||
| 410 | @@ -1307,7 +1228,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { | ||
| 411 | |||
| 412 | static struct omap_hwmod omap2420_i2c2_hwmod = { | ||
| 413 | .name = "i2c2", | ||
| 414 | - .mpu_irqs = i2c2_mpu_irqs, | ||
| 415 | + .mpu_irqs = omap2_i2c2_mpu_irqs, | ||
| 416 | .sdma_reqs = i2c2_sdma_reqs, | ||
| 417 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | ||
| 418 | .main_clk = "i2c2_fck", | ||
| 419 | @@ -1428,11 +1349,6 @@ static struct omap_hwmod_class omap242x_gpio_hwmod_class = { | ||
| 420 | }; | ||
| 421 | |||
| 422 | /* gpio1 */ | ||
| 423 | -static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { | ||
| 424 | - { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ | ||
| 425 | - { .irq = -1 } | ||
| 426 | -}; | ||
| 427 | - | ||
| 428 | static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { | ||
| 429 | &omap2420_l4_wkup__gpio1, | ||
| 430 | }; | ||
| 431 | @@ -1440,7 +1356,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { | ||
| 432 | static struct omap_hwmod omap2420_gpio1_hwmod = { | ||
| 433 | .name = "gpio1", | ||
| 434 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 435 | - .mpu_irqs = omap242x_gpio1_irqs, | ||
| 436 | + .mpu_irqs = omap2_gpio1_irqs, | ||
| 437 | .main_clk = "gpios_fck", | ||
| 438 | .prcm = { | ||
| 439 | .omap2 = { | ||
| 440 | @@ -1459,11 +1375,6 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { | ||
| 441 | }; | ||
| 442 | |||
| 443 | /* gpio2 */ | ||
| 444 | -static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { | ||
| 445 | - { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ | ||
| 446 | - { .irq = -1 } | ||
| 447 | -}; | ||
| 448 | - | ||
| 449 | static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { | ||
| 450 | &omap2420_l4_wkup__gpio2, | ||
| 451 | }; | ||
| 452 | @@ -1471,7 +1382,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { | ||
| 453 | static struct omap_hwmod omap2420_gpio2_hwmod = { | ||
| 454 | .name = "gpio2", | ||
| 455 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 456 | - .mpu_irqs = omap242x_gpio2_irqs, | ||
| 457 | + .mpu_irqs = omap2_gpio2_irqs, | ||
| 458 | .main_clk = "gpios_fck", | ||
| 459 | .prcm = { | ||
| 460 | .omap2 = { | ||
| 461 | @@ -1490,11 +1401,6 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { | ||
| 462 | }; | ||
| 463 | |||
| 464 | /* gpio3 */ | ||
| 465 | -static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { | ||
| 466 | - { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ | ||
| 467 | - { .irq = -1 } | ||
| 468 | -}; | ||
| 469 | - | ||
| 470 | static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { | ||
| 471 | &omap2420_l4_wkup__gpio3, | ||
| 472 | }; | ||
| 473 | @@ -1502,7 +1408,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { | ||
| 474 | static struct omap_hwmod omap2420_gpio3_hwmod = { | ||
| 475 | .name = "gpio3", | ||
| 476 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 477 | - .mpu_irqs = omap242x_gpio3_irqs, | ||
| 478 | + .mpu_irqs = omap2_gpio3_irqs, | ||
| 479 | .main_clk = "gpios_fck", | ||
| 480 | .prcm = { | ||
| 481 | .omap2 = { | ||
| 482 | @@ -1521,11 +1427,6 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { | ||
| 483 | }; | ||
| 484 | |||
| 485 | /* gpio4 */ | ||
| 486 | -static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { | ||
| 487 | - { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ | ||
| 488 | - { .irq = -1 } | ||
| 489 | -}; | ||
| 490 | - | ||
| 491 | static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { | ||
| 492 | &omap2420_l4_wkup__gpio4, | ||
| 493 | }; | ||
| 494 | @@ -1533,7 +1434,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { | ||
| 495 | static struct omap_hwmod omap2420_gpio4_hwmod = { | ||
| 496 | .name = "gpio4", | ||
| 497 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 498 | - .mpu_irqs = omap242x_gpio4_irqs, | ||
| 499 | + .mpu_irqs = omap2_gpio4_irqs, | ||
| 500 | .main_clk = "gpios_fck", | ||
| 501 | .prcm = { | ||
| 502 | .omap2 = { | ||
| 503 | @@ -1575,14 +1476,6 @@ static struct omap_dma_dev_attr dma_dev_attr = { | ||
| 504 | .lch_count = 32, | ||
| 505 | }; | ||
| 506 | |||
| 507 | -static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { | ||
| 508 | - { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ | ||
| 509 | - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
| 510 | - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
| 511 | - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
| 512 | - { .irq = -1 } | ||
| 513 | -}; | ||
| 514 | - | ||
| 515 | /* dma_system -> L3 */ | ||
| 516 | static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { | ||
| 517 | .master = &omap2420_dma_system_hwmod, | ||
| 518 | @@ -1613,7 +1506,7 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = { | ||
| 519 | static struct omap_hwmod omap2420_dma_system_hwmod = { | ||
| 520 | .name = "dma", | ||
| 521 | .class = &omap2420_dma_hwmod_class, | ||
| 522 | - .mpu_irqs = omap2420_dma_system_irqs, | ||
| 523 | + .mpu_irqs = omap2_dma_system_irqs, | ||
| 524 | .main_clk = "core_l3_ck", | ||
| 525 | .slaves = omap2420_dma_system_slaves, | ||
| 526 | .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), | ||
| 527 | @@ -1709,11 +1602,6 @@ static struct omap_hwmod_class omap2420_mcspi_class = { | ||
| 528 | }; | ||
| 529 | |||
| 530 | /* mcspi1 */ | ||
| 531 | -static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { | ||
| 532 | - { .irq = 65 }, | ||
| 533 | - { .irq = -1 } | ||
| 534 | -}; | ||
| 535 | - | ||
| 536 | static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { | ||
| 537 | { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ | ||
| 538 | { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ | ||
| 539 | @@ -1735,7 +1623,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | ||
| 540 | |||
| 541 | static struct omap_hwmod omap2420_mcspi1_hwmod = { | ||
| 542 | .name = "mcspi1_hwmod", | ||
| 543 | - .mpu_irqs = omap2420_mcspi1_mpu_irqs, | ||
| 544 | + .mpu_irqs = omap2_mcspi1_mpu_irqs, | ||
| 545 | .sdma_reqs = omap2420_mcspi1_sdma_reqs, | ||
| 546 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), | ||
| 547 | .main_clk = "mcspi1_fck", | ||
| 548 | @@ -1756,11 +1644,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { | ||
| 549 | }; | ||
| 550 | |||
| 551 | /* mcspi2 */ | ||
| 552 | -static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { | ||
| 553 | - { .irq = 66 }, | ||
| 554 | - { .irq = -1 } | ||
| 555 | -}; | ||
| 556 | - | ||
| 557 | static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { | ||
| 558 | { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ | ||
| 559 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | ||
| 560 | @@ -1778,7 +1661,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | ||
| 561 | |||
| 562 | static struct omap_hwmod omap2420_mcspi2_hwmod = { | ||
| 563 | .name = "mcspi2_hwmod", | ||
| 564 | - .mpu_irqs = omap2420_mcspi2_mpu_irqs, | ||
| 565 | + .mpu_irqs = omap2_mcspi2_mpu_irqs, | ||
| 566 | .sdma_reqs = omap2420_mcspi2_sdma_reqs, | ||
| 567 | .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), | ||
| 568 | .main_clk = "mcspi2_fck", | ||
| 569 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 570 | index 2c28468..62ecc68 100644 | ||
| 571 | --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 572 | +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 573 | @@ -367,10 +367,6 @@ static struct omap_hwmod_class omap2430_timer_hwmod_class = { | ||
| 574 | |||
| 575 | /* timer1 */ | ||
| 576 | static struct omap_hwmod omap2430_timer1_hwmod; | ||
| 577 | -static struct omap_hwmod_irq_info omap2430_timer1_mpu_irqs[] = { | ||
| 578 | - { .irq = 37, }, | ||
| 579 | - { .irq = -1 } | ||
| 580 | -}; | ||
| 581 | |||
| 582 | static struct omap_hwmod_addr_space omap2430_timer1_addrs[] = { | ||
| 583 | { | ||
| 584 | @@ -398,7 +394,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer1_slaves[] = { | ||
| 585 | /* timer1 hwmod */ | ||
| 586 | static struct omap_hwmod omap2430_timer1_hwmod = { | ||
| 587 | .name = "timer1", | ||
| 588 | - .mpu_irqs = omap2430_timer1_mpu_irqs, | ||
| 589 | + .mpu_irqs = omap2_timer1_mpu_irqs, | ||
| 590 | .main_clk = "gpt1_fck", | ||
| 591 | .prcm = { | ||
| 592 | .omap2 = { | ||
| 593 | @@ -417,10 +413,6 @@ static struct omap_hwmod omap2430_timer1_hwmod = { | ||
| 594 | |||
| 595 | /* timer2 */ | ||
| 596 | static struct omap_hwmod omap2430_timer2_hwmod; | ||
| 597 | -static struct omap_hwmod_irq_info omap2430_timer2_mpu_irqs[] = { | ||
| 598 | - { .irq = 38, }, | ||
| 599 | - { .irq = -1 } | ||
| 600 | -}; | ||
| 601 | |||
| 602 | /* l4_core -> timer2 */ | ||
| 603 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer2 = { | ||
| 604 | @@ -439,7 +431,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer2_slaves[] = { | ||
| 605 | /* timer2 hwmod */ | ||
| 606 | static struct omap_hwmod omap2430_timer2_hwmod = { | ||
| 607 | .name = "timer2", | ||
| 608 | - .mpu_irqs = omap2430_timer2_mpu_irqs, | ||
| 609 | + .mpu_irqs = omap2_timer2_mpu_irqs, | ||
| 610 | .main_clk = "gpt2_fck", | ||
| 611 | .prcm = { | ||
| 612 | .omap2 = { | ||
| 613 | @@ -458,10 +450,6 @@ static struct omap_hwmod omap2430_timer2_hwmod = { | ||
| 614 | |||
| 615 | /* timer3 */ | ||
| 616 | static struct omap_hwmod omap2430_timer3_hwmod; | ||
| 617 | -static struct omap_hwmod_irq_info omap2430_timer3_mpu_irqs[] = { | ||
| 618 | - { .irq = 39, }, | ||
| 619 | - { .irq = -1 } | ||
| 620 | -}; | ||
| 621 | |||
| 622 | /* l4_core -> timer3 */ | ||
| 623 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer3 = { | ||
| 624 | @@ -480,7 +468,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer3_slaves[] = { | ||
| 625 | /* timer3 hwmod */ | ||
| 626 | static struct omap_hwmod omap2430_timer3_hwmod = { | ||
| 627 | .name = "timer3", | ||
| 628 | - .mpu_irqs = omap2430_timer3_mpu_irqs, | ||
| 629 | + .mpu_irqs = omap2_timer3_mpu_irqs, | ||
| 630 | .main_clk = "gpt3_fck", | ||
| 631 | .prcm = { | ||
| 632 | .omap2 = { | ||
| 633 | @@ -499,10 +487,6 @@ static struct omap_hwmod omap2430_timer3_hwmod = { | ||
| 634 | |||
| 635 | /* timer4 */ | ||
| 636 | static struct omap_hwmod omap2430_timer4_hwmod; | ||
| 637 | -static struct omap_hwmod_irq_info omap2430_timer4_mpu_irqs[] = { | ||
| 638 | - { .irq = 40, }, | ||
| 639 | - { .irq = -1 } | ||
| 640 | -}; | ||
| 641 | |||
| 642 | /* l4_core -> timer4 */ | ||
| 643 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer4 = { | ||
| 644 | @@ -521,7 +505,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer4_slaves[] = { | ||
| 645 | /* timer4 hwmod */ | ||
| 646 | static struct omap_hwmod omap2430_timer4_hwmod = { | ||
| 647 | .name = "timer4", | ||
| 648 | - .mpu_irqs = omap2430_timer4_mpu_irqs, | ||
| 649 | + .mpu_irqs = omap2_timer4_mpu_irqs, | ||
| 650 | .main_clk = "gpt4_fck", | ||
| 651 | .prcm = { | ||
| 652 | .omap2 = { | ||
| 653 | @@ -540,10 +524,6 @@ static struct omap_hwmod omap2430_timer4_hwmod = { | ||
| 654 | |||
| 655 | /* timer5 */ | ||
| 656 | static struct omap_hwmod omap2430_timer5_hwmod; | ||
| 657 | -static struct omap_hwmod_irq_info omap2430_timer5_mpu_irqs[] = { | ||
| 658 | - { .irq = 41, }, | ||
| 659 | - { .irq = -1 } | ||
| 660 | -}; | ||
| 661 | |||
| 662 | /* l4_core -> timer5 */ | ||
| 663 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer5 = { | ||
| 664 | @@ -562,7 +542,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer5_slaves[] = { | ||
| 665 | /* timer5 hwmod */ | ||
| 666 | static struct omap_hwmod omap2430_timer5_hwmod = { | ||
| 667 | .name = "timer5", | ||
| 668 | - .mpu_irqs = omap2430_timer5_mpu_irqs, | ||
| 669 | + .mpu_irqs = omap2_timer5_mpu_irqs, | ||
| 670 | .main_clk = "gpt5_fck", | ||
| 671 | .prcm = { | ||
| 672 | .omap2 = { | ||
| 673 | @@ -581,10 +561,6 @@ static struct omap_hwmod omap2430_timer5_hwmod = { | ||
| 674 | |||
| 675 | /* timer6 */ | ||
| 676 | static struct omap_hwmod omap2430_timer6_hwmod; | ||
| 677 | -static struct omap_hwmod_irq_info omap2430_timer6_mpu_irqs[] = { | ||
| 678 | - { .irq = 42, }, | ||
| 679 | - { .irq = -1 } | ||
| 680 | -}; | ||
| 681 | |||
| 682 | /* l4_core -> timer6 */ | ||
| 683 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer6 = { | ||
| 684 | @@ -603,7 +579,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer6_slaves[] = { | ||
| 685 | /* timer6 hwmod */ | ||
| 686 | static struct omap_hwmod omap2430_timer6_hwmod = { | ||
| 687 | .name = "timer6", | ||
| 688 | - .mpu_irqs = omap2430_timer6_mpu_irqs, | ||
| 689 | + .mpu_irqs = omap2_timer6_mpu_irqs, | ||
| 690 | .main_clk = "gpt6_fck", | ||
| 691 | .prcm = { | ||
| 692 | .omap2 = { | ||
| 693 | @@ -622,10 +598,6 @@ static struct omap_hwmod omap2430_timer6_hwmod = { | ||
| 694 | |||
| 695 | /* timer7 */ | ||
| 696 | static struct omap_hwmod omap2430_timer7_hwmod; | ||
| 697 | -static struct omap_hwmod_irq_info omap2430_timer7_mpu_irqs[] = { | ||
| 698 | - { .irq = 43, }, | ||
| 699 | - { .irq = -1 } | ||
| 700 | -}; | ||
| 701 | |||
| 702 | /* l4_core -> timer7 */ | ||
| 703 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer7 = { | ||
| 704 | @@ -644,7 +616,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer7_slaves[] = { | ||
| 705 | /* timer7 hwmod */ | ||
| 706 | static struct omap_hwmod omap2430_timer7_hwmod = { | ||
| 707 | .name = "timer7", | ||
| 708 | - .mpu_irqs = omap2430_timer7_mpu_irqs, | ||
| 709 | + .mpu_irqs = omap2_timer7_mpu_irqs, | ||
| 710 | .main_clk = "gpt7_fck", | ||
| 711 | .prcm = { | ||
| 712 | .omap2 = { | ||
| 713 | @@ -663,10 +635,6 @@ static struct omap_hwmod omap2430_timer7_hwmod = { | ||
| 714 | |||
| 715 | /* timer8 */ | ||
| 716 | static struct omap_hwmod omap2430_timer8_hwmod; | ||
| 717 | -static struct omap_hwmod_irq_info omap2430_timer8_mpu_irqs[] = { | ||
| 718 | - { .irq = 44, }, | ||
| 719 | - { .irq = -1 } | ||
| 720 | -}; | ||
| 721 | |||
| 722 | /* l4_core -> timer8 */ | ||
| 723 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer8 = { | ||
| 724 | @@ -685,7 +653,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer8_slaves[] = { | ||
| 725 | /* timer8 hwmod */ | ||
| 726 | static struct omap_hwmod omap2430_timer8_hwmod = { | ||
| 727 | .name = "timer8", | ||
| 728 | - .mpu_irqs = omap2430_timer8_mpu_irqs, | ||
| 729 | + .mpu_irqs = omap2_timer8_mpu_irqs, | ||
| 730 | .main_clk = "gpt8_fck", | ||
| 731 | .prcm = { | ||
| 732 | .omap2 = { | ||
| 733 | @@ -704,10 +672,6 @@ static struct omap_hwmod omap2430_timer8_hwmod = { | ||
| 734 | |||
| 735 | /* timer9 */ | ||
| 736 | static struct omap_hwmod omap2430_timer9_hwmod; | ||
| 737 | -static struct omap_hwmod_irq_info omap2430_timer9_mpu_irqs[] = { | ||
| 738 | - { .irq = 45, }, | ||
| 739 | - { .irq = -1 } | ||
| 740 | -}; | ||
| 741 | |||
| 742 | /* l4_core -> timer9 */ | ||
| 743 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer9 = { | ||
| 744 | @@ -726,7 +690,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer9_slaves[] = { | ||
| 745 | /* timer9 hwmod */ | ||
| 746 | static struct omap_hwmod omap2430_timer9_hwmod = { | ||
| 747 | .name = "timer9", | ||
| 748 | - .mpu_irqs = omap2430_timer9_mpu_irqs, | ||
| 749 | + .mpu_irqs = omap2_timer9_mpu_irqs, | ||
| 750 | .main_clk = "gpt9_fck", | ||
| 751 | .prcm = { | ||
| 752 | .omap2 = { | ||
| 753 | @@ -745,10 +709,6 @@ static struct omap_hwmod omap2430_timer9_hwmod = { | ||
| 754 | |||
| 755 | /* timer10 */ | ||
| 756 | static struct omap_hwmod omap2430_timer10_hwmod; | ||
| 757 | -static struct omap_hwmod_irq_info omap2430_timer10_mpu_irqs[] = { | ||
| 758 | - { .irq = 46, }, | ||
| 759 | - { .irq = -1 } | ||
| 760 | -}; | ||
| 761 | |||
| 762 | /* l4_core -> timer10 */ | ||
| 763 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer10 = { | ||
| 764 | @@ -767,7 +727,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer10_slaves[] = { | ||
| 765 | /* timer10 hwmod */ | ||
| 766 | static struct omap_hwmod omap2430_timer10_hwmod = { | ||
| 767 | .name = "timer10", | ||
| 768 | - .mpu_irqs = omap2430_timer10_mpu_irqs, | ||
| 769 | + .mpu_irqs = omap2_timer10_mpu_irqs, | ||
| 770 | .main_clk = "gpt10_fck", | ||
| 771 | .prcm = { | ||
| 772 | .omap2 = { | ||
| 773 | @@ -786,10 +746,6 @@ static struct omap_hwmod omap2430_timer10_hwmod = { | ||
| 774 | |||
| 775 | /* timer11 */ | ||
| 776 | static struct omap_hwmod omap2430_timer11_hwmod; | ||
| 777 | -static struct omap_hwmod_irq_info omap2430_timer11_mpu_irqs[] = { | ||
| 778 | - { .irq = 47, }, | ||
| 779 | - { .irq = -1 } | ||
| 780 | -}; | ||
| 781 | |||
| 782 | /* l4_core -> timer11 */ | ||
| 783 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer11 = { | ||
| 784 | @@ -808,7 +764,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer11_slaves[] = { | ||
| 785 | /* timer11 hwmod */ | ||
| 786 | static struct omap_hwmod omap2430_timer11_hwmod = { | ||
| 787 | .name = "timer11", | ||
| 788 | - .mpu_irqs = omap2430_timer11_mpu_irqs, | ||
| 789 | + .mpu_irqs = omap2_timer11_mpu_irqs, | ||
| 790 | .main_clk = "gpt11_fck", | ||
| 791 | .prcm = { | ||
| 792 | .omap2 = { | ||
| 793 | @@ -827,10 +783,6 @@ static struct omap_hwmod omap2430_timer11_hwmod = { | ||
| 794 | |||
| 795 | /* timer12 */ | ||
| 796 | static struct omap_hwmod omap2430_timer12_hwmod; | ||
| 797 | -static struct omap_hwmod_irq_info omap2430_timer12_mpu_irqs[] = { | ||
| 798 | - { .irq = 48, }, | ||
| 799 | - { .irq = -1 } | ||
| 800 | -}; | ||
| 801 | |||
| 802 | /* l4_core -> timer12 */ | ||
| 803 | static struct omap_hwmod_ocp_if omap2430_l4_core__timer12 = { | ||
| 804 | @@ -849,7 +801,7 @@ static struct omap_hwmod_ocp_if *omap2430_timer12_slaves[] = { | ||
| 805 | /* timer12 hwmod */ | ||
| 806 | static struct omap_hwmod omap2430_timer12_hwmod = { | ||
| 807 | .name = "timer12", | ||
| 808 | - .mpu_irqs = omap2430_timer12_mpu_irqs, | ||
| 809 | + .mpu_irqs = omap2xxx_timer12_mpu_irqs, | ||
| 810 | .main_clk = "gpt12_fck", | ||
| 811 | .prcm = { | ||
| 812 | .omap2 = { | ||
| 813 | @@ -948,11 +900,6 @@ static struct omap_hwmod_class uart_class = { | ||
| 814 | |||
| 815 | /* UART1 */ | ||
| 816 | |||
| 817 | -static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { | ||
| 818 | - { .irq = INT_24XX_UART1_IRQ, }, | ||
| 819 | - { .irq = -1 } | ||
| 820 | -}; | ||
| 821 | - | ||
| 822 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | ||
| 823 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | ||
| 824 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | ||
| 825 | @@ -964,7 +911,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { | ||
| 826 | |||
| 827 | static struct omap_hwmod omap2430_uart1_hwmod = { | ||
| 828 | .name = "uart1", | ||
| 829 | - .mpu_irqs = uart1_mpu_irqs, | ||
| 830 | + .mpu_irqs = omap2_uart1_mpu_irqs, | ||
| 831 | .sdma_reqs = uart1_sdma_reqs, | ||
| 832 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | ||
| 833 | .main_clk = "uart1_fck", | ||
| 834 | @@ -985,11 +932,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { | ||
| 835 | |||
| 836 | /* UART2 */ | ||
| 837 | |||
| 838 | -static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { | ||
| 839 | - { .irq = INT_24XX_UART2_IRQ, }, | ||
| 840 | - { .irq = -1 } | ||
| 841 | -}; | ||
| 842 | - | ||
| 843 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | ||
| 844 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | ||
| 845 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | ||
| 846 | @@ -1001,7 +943,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { | ||
| 847 | |||
| 848 | static struct omap_hwmod omap2430_uart2_hwmod = { | ||
| 849 | .name = "uart2", | ||
| 850 | - .mpu_irqs = uart2_mpu_irqs, | ||
| 851 | + .mpu_irqs = omap2_uart2_mpu_irqs, | ||
| 852 | .sdma_reqs = uart2_sdma_reqs, | ||
| 853 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | ||
| 854 | .main_clk = "uart2_fck", | ||
| 855 | @@ -1022,11 +964,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { | ||
| 856 | |||
| 857 | /* UART3 */ | ||
| 858 | |||
| 859 | -static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { | ||
| 860 | - { .irq = INT_24XX_UART3_IRQ, }, | ||
| 861 | - { .irq = -1 } | ||
| 862 | -}; | ||
| 863 | - | ||
| 864 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | ||
| 865 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | ||
| 866 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | ||
| 867 | @@ -1038,7 +975,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { | ||
| 868 | |||
| 869 | static struct omap_hwmod omap2430_uart3_hwmod = { | ||
| 870 | .name = "uart3", | ||
| 871 | - .mpu_irqs = uart3_mpu_irqs, | ||
| 872 | + .mpu_irqs = omap2_uart3_mpu_irqs, | ||
| 873 | .sdma_reqs = uart3_sdma_reqs, | ||
| 874 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | ||
| 875 | .main_clk = "uart3_fck", | ||
| 876 | @@ -1150,11 +1087,6 @@ static struct omap_hwmod_class omap2430_dispc_hwmod_class = { | ||
| 877 | .sysc = &omap2430_dispc_sysc, | ||
| 878 | }; | ||
| 879 | |||
| 880 | -static struct omap_hwmod_irq_info omap2430_dispc_irqs[] = { | ||
| 881 | - { .irq = 25 }, | ||
| 882 | - { .irq = -1 } | ||
| 883 | -}; | ||
| 884 | - | ||
| 885 | /* l4_core -> dss_dispc */ | ||
| 886 | static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { | ||
| 887 | .master = &omap2430_l4_core_hwmod, | ||
| 888 | @@ -1172,7 +1104,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { | ||
| 889 | static struct omap_hwmod omap2430_dss_dispc_hwmod = { | ||
| 890 | .name = "dss_dispc", | ||
| 891 | .class = &omap2430_dispc_hwmod_class, | ||
| 892 | - .mpu_irqs = omap2430_dispc_irqs, | ||
| 893 | + .mpu_irqs = omap2_dispc_irqs, | ||
| 894 | .main_clk = "dss1_fck", | ||
| 895 | .prcm = { | ||
| 896 | .omap2 = { | ||
| 897 | @@ -1302,11 +1234,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { | ||
| 898 | |||
| 899 | /* I2C1 */ | ||
| 900 | |||
| 901 | -static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { | ||
| 902 | - { .irq = INT_24XX_I2C1_IRQ, }, | ||
| 903 | - { .irq = -1 } | ||
| 904 | -}; | ||
| 905 | - | ||
| 906 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | ||
| 907 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | ||
| 908 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | ||
| 909 | @@ -1318,7 +1245,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { | ||
| 910 | |||
| 911 | static struct omap_hwmod omap2430_i2c1_hwmod = { | ||
| 912 | .name = "i2c1", | ||
| 913 | - .mpu_irqs = i2c1_mpu_irqs, | ||
| 914 | + .mpu_irqs = omap2_i2c1_mpu_irqs, | ||
| 915 | .sdma_reqs = i2c1_sdma_reqs, | ||
| 916 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | ||
| 917 | .main_clk = "i2chs1_fck", | ||
| 918 | @@ -1348,11 +1275,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { | ||
| 919 | |||
| 920 | /* I2C2 */ | ||
| 921 | |||
| 922 | -static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { | ||
| 923 | - { .irq = INT_24XX_I2C2_IRQ, }, | ||
| 924 | - { .irq = -1 } | ||
| 925 | -}; | ||
| 926 | - | ||
| 927 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | ||
| 928 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | ||
| 929 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | ||
| 930 | @@ -1364,7 +1286,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { | ||
| 931 | |||
| 932 | static struct omap_hwmod omap2430_i2c2_hwmod = { | ||
| 933 | .name = "i2c2", | ||
| 934 | - .mpu_irqs = i2c2_mpu_irqs, | ||
| 935 | + .mpu_irqs = omap2_i2c2_mpu_irqs, | ||
| 936 | .sdma_reqs = i2c2_sdma_reqs, | ||
| 937 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | ||
| 938 | .main_clk = "i2chs2_fck", | ||
| 939 | @@ -1502,11 +1424,6 @@ static struct omap_hwmod_class omap243x_gpio_hwmod_class = { | ||
| 940 | }; | ||
| 941 | |||
| 942 | /* gpio1 */ | ||
| 943 | -static struct omap_hwmod_irq_info omap243x_gpio1_irqs[] = { | ||
| 944 | - { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ | ||
| 945 | - { .irq = -1 } | ||
| 946 | -}; | ||
| 947 | - | ||
| 948 | static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { | ||
| 949 | &omap2430_l4_wkup__gpio1, | ||
| 950 | }; | ||
| 951 | @@ -1514,7 +1431,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { | ||
| 952 | static struct omap_hwmod omap2430_gpio1_hwmod = { | ||
| 953 | .name = "gpio1", | ||
| 954 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 955 | - .mpu_irqs = omap243x_gpio1_irqs, | ||
| 956 | + .mpu_irqs = omap2_gpio1_irqs, | ||
| 957 | .main_clk = "gpios_fck", | ||
| 958 | .prcm = { | ||
| 959 | .omap2 = { | ||
| 960 | @@ -1533,11 +1450,6 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { | ||
| 961 | }; | ||
| 962 | |||
| 963 | /* gpio2 */ | ||
| 964 | -static struct omap_hwmod_irq_info omap243x_gpio2_irqs[] = { | ||
| 965 | - { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ | ||
| 966 | - { .irq = -1 } | ||
| 967 | -}; | ||
| 968 | - | ||
| 969 | static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { | ||
| 970 | &omap2430_l4_wkup__gpio2, | ||
| 971 | }; | ||
| 972 | @@ -1545,7 +1457,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio2_slaves[] = { | ||
| 973 | static struct omap_hwmod omap2430_gpio2_hwmod = { | ||
| 974 | .name = "gpio2", | ||
| 975 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 976 | - .mpu_irqs = omap243x_gpio2_irqs, | ||
| 977 | + .mpu_irqs = omap2_gpio2_irqs, | ||
| 978 | .main_clk = "gpios_fck", | ||
| 979 | .prcm = { | ||
| 980 | .omap2 = { | ||
| 981 | @@ -1564,11 +1476,6 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { | ||
| 982 | }; | ||
| 983 | |||
| 984 | /* gpio3 */ | ||
| 985 | -static struct omap_hwmod_irq_info omap243x_gpio3_irqs[] = { | ||
| 986 | - { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ | ||
| 987 | - { .irq = -1 } | ||
| 988 | -}; | ||
| 989 | - | ||
| 990 | static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { | ||
| 991 | &omap2430_l4_wkup__gpio3, | ||
| 992 | }; | ||
| 993 | @@ -1576,7 +1483,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio3_slaves[] = { | ||
| 994 | static struct omap_hwmod omap2430_gpio3_hwmod = { | ||
| 995 | .name = "gpio3", | ||
| 996 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 997 | - .mpu_irqs = omap243x_gpio3_irqs, | ||
| 998 | + .mpu_irqs = omap2_gpio3_irqs, | ||
| 999 | .main_clk = "gpios_fck", | ||
| 1000 | .prcm = { | ||
| 1001 | .omap2 = { | ||
| 1002 | @@ -1595,11 +1502,6 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { | ||
| 1003 | }; | ||
| 1004 | |||
| 1005 | /* gpio4 */ | ||
| 1006 | -static struct omap_hwmod_irq_info omap243x_gpio4_irqs[] = { | ||
| 1007 | - { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ | ||
| 1008 | - { .irq = -1 } | ||
| 1009 | -}; | ||
| 1010 | - | ||
| 1011 | static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { | ||
| 1012 | &omap2430_l4_wkup__gpio4, | ||
| 1013 | }; | ||
| 1014 | @@ -1607,7 +1509,7 @@ static struct omap_hwmod_ocp_if *omap2430_gpio4_slaves[] = { | ||
| 1015 | static struct omap_hwmod omap2430_gpio4_hwmod = { | ||
| 1016 | .name = "gpio4", | ||
| 1017 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1018 | - .mpu_irqs = omap243x_gpio4_irqs, | ||
| 1019 | + .mpu_irqs = omap2_gpio4_irqs, | ||
| 1020 | .main_clk = "gpios_fck", | ||
| 1021 | .prcm = { | ||
| 1022 | .omap2 = { | ||
| 1023 | @@ -1680,14 +1582,6 @@ static struct omap_dma_dev_attr dma_dev_attr = { | ||
| 1024 | .lch_count = 32, | ||
| 1025 | }; | ||
| 1026 | |||
| 1027 | -static struct omap_hwmod_irq_info omap2430_dma_system_irqs[] = { | ||
| 1028 | - { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ | ||
| 1029 | - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
| 1030 | - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
| 1031 | - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
| 1032 | - { .irq = -1 } | ||
| 1033 | -}; | ||
| 1034 | - | ||
| 1035 | /* dma_system -> L3 */ | ||
| 1036 | static struct omap_hwmod_ocp_if omap2430_dma_system__l3 = { | ||
| 1037 | .master = &omap2430_dma_system_hwmod, | ||
| 1038 | @@ -1718,7 +1612,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { | ||
| 1039 | static struct omap_hwmod omap2430_dma_system_hwmod = { | ||
| 1040 | .name = "dma", | ||
| 1041 | .class = &omap2430_dma_hwmod_class, | ||
| 1042 | - .mpu_irqs = omap2430_dma_system_irqs, | ||
| 1043 | + .mpu_irqs = omap2_dma_system_irqs, | ||
| 1044 | .main_clk = "core_l3_ck", | ||
| 1045 | .slaves = omap2430_dma_system_slaves, | ||
| 1046 | .slaves_cnt = ARRAY_SIZE(omap2430_dma_system_slaves), | ||
| 1047 | @@ -1813,11 +1707,6 @@ static struct omap_hwmod_class omap2430_mcspi_class = { | ||
| 1048 | }; | ||
| 1049 | |||
| 1050 | /* mcspi1 */ | ||
| 1051 | -static struct omap_hwmod_irq_info omap2430_mcspi1_mpu_irqs[] = { | ||
| 1052 | - { .irq = 65 }, | ||
| 1053 | - { .irq = -1 } | ||
| 1054 | -}; | ||
| 1055 | - | ||
| 1056 | static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { | ||
| 1057 | { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ | ||
| 1058 | { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ | ||
| 1059 | @@ -1839,7 +1728,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | ||
| 1060 | |||
| 1061 | static struct omap_hwmod omap2430_mcspi1_hwmod = { | ||
| 1062 | .name = "mcspi1_hwmod", | ||
| 1063 | - .mpu_irqs = omap2430_mcspi1_mpu_irqs, | ||
| 1064 | + .mpu_irqs = omap2_mcspi1_mpu_irqs, | ||
| 1065 | .sdma_reqs = omap2430_mcspi1_sdma_reqs, | ||
| 1066 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), | ||
| 1067 | .main_clk = "mcspi1_fck", | ||
| 1068 | @@ -1860,11 +1749,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { | ||
| 1069 | }; | ||
| 1070 | |||
| 1071 | /* mcspi2 */ | ||
| 1072 | -static struct omap_hwmod_irq_info omap2430_mcspi2_mpu_irqs[] = { | ||
| 1073 | - { .irq = 66 }, | ||
| 1074 | - { .irq = -1 } | ||
| 1075 | -}; | ||
| 1076 | - | ||
| 1077 | static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { | ||
| 1078 | { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ | ||
| 1079 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | ||
| 1080 | @@ -1882,7 +1766,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | ||
| 1081 | |||
| 1082 | static struct omap_hwmod omap2430_mcspi2_hwmod = { | ||
| 1083 | .name = "mcspi2_hwmod", | ||
| 1084 | - .mpu_irqs = omap2430_mcspi2_mpu_irqs, | ||
| 1085 | + .mpu_irqs = omap2_mcspi2_mpu_irqs, | ||
| 1086 | .sdma_reqs = omap2430_mcspi2_sdma_reqs, | ||
| 1087 | .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), | ||
| 1088 | .main_clk = "mcspi2_fck", | ||
| 1089 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | ||
| 1090 | new file mode 100644 | ||
| 1091 | index 0000000..245294b | ||
| 1092 | --- /dev/null | ||
| 1093 | +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | ||
| 1094 | @@ -0,0 +1,142 @@ | ||
| 1095 | +/* | ||
| 1096 | + * omap_hwmod_2xxx_3xxx_ipblock_data.c - common IP block data for OMAP2/3 | ||
| 1097 | + * | ||
| 1098 | + * Copyright (C) 2011 Nokia Corporation | ||
| 1099 | + * Paul Walmsley | ||
| 1100 | + * | ||
| 1101 | + * This program is free software; you can redistribute it and/or modify | ||
| 1102 | + * it under the terms of the GNU General Public License version 2 as | ||
| 1103 | + * published by the Free Software Foundation. | ||
| 1104 | + */ | ||
| 1105 | +#include <plat/omap_hwmod.h> | ||
| 1106 | +#include <plat/serial.h> | ||
| 1107 | + | ||
| 1108 | +#include <mach/irqs.h> | ||
| 1109 | + | ||
| 1110 | +#include "omap_hwmod_common_data.h" | ||
| 1111 | + | ||
| 1112 | +struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = { | ||
| 1113 | + { .irq = 37, }, | ||
| 1114 | + { .irq = -1 } | ||
| 1115 | +}; | ||
| 1116 | + | ||
| 1117 | +struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[] = { | ||
| 1118 | + { .irq = 38, }, | ||
| 1119 | + { .irq = -1 } | ||
| 1120 | +}; | ||
| 1121 | + | ||
| 1122 | +struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[] = { | ||
| 1123 | + { .irq = 39, }, | ||
| 1124 | + { .irq = -1 } | ||
| 1125 | +}; | ||
| 1126 | + | ||
| 1127 | +struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[] = { | ||
| 1128 | + { .irq = 40, }, | ||
| 1129 | + { .irq = -1 } | ||
| 1130 | +}; | ||
| 1131 | + | ||
| 1132 | +struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[] = { | ||
| 1133 | + { .irq = 41, }, | ||
| 1134 | + { .irq = -1 } | ||
| 1135 | +}; | ||
| 1136 | + | ||
| 1137 | +struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[] = { | ||
| 1138 | + { .irq = 42, }, | ||
| 1139 | + { .irq = -1 } | ||
| 1140 | +}; | ||
| 1141 | + | ||
| 1142 | +struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[] = { | ||
| 1143 | + { .irq = 43, }, | ||
| 1144 | + { .irq = -1 } | ||
| 1145 | +}; | ||
| 1146 | + | ||
| 1147 | +struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[] = { | ||
| 1148 | + { .irq = 44, }, | ||
| 1149 | + { .irq = -1 } | ||
| 1150 | +}; | ||
| 1151 | + | ||
| 1152 | +struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[] = { | ||
| 1153 | + { .irq = 45, }, | ||
| 1154 | + { .irq = -1 } | ||
| 1155 | +}; | ||
| 1156 | + | ||
| 1157 | +struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[] = { | ||
| 1158 | + { .irq = 46, }, | ||
| 1159 | + { .irq = -1 } | ||
| 1160 | +}; | ||
| 1161 | + | ||
| 1162 | +struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[] = { | ||
| 1163 | + { .irq = 47, }, | ||
| 1164 | + { .irq = -1 } | ||
| 1165 | +}; | ||
| 1166 | + | ||
| 1167 | +struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[] = { | ||
| 1168 | + { .irq = INT_24XX_UART1_IRQ, }, | ||
| 1169 | + { .irq = -1 } | ||
| 1170 | +}; | ||
| 1171 | + | ||
| 1172 | +struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[] = { | ||
| 1173 | + { .irq = INT_24XX_UART2_IRQ, }, | ||
| 1174 | + { .irq = -1 } | ||
| 1175 | +}; | ||
| 1176 | + | ||
| 1177 | +struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[] = { | ||
| 1178 | + { .irq = INT_24XX_UART3_IRQ, }, | ||
| 1179 | + { .irq = -1 } | ||
| 1180 | +}; | ||
| 1181 | + | ||
| 1182 | +struct omap_hwmod_irq_info omap2_dispc_irqs[] = { | ||
| 1183 | + { .irq = 25 }, | ||
| 1184 | + { .irq = -1 } | ||
| 1185 | +}; | ||
| 1186 | + | ||
| 1187 | +struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[] = { | ||
| 1188 | + { .irq = INT_24XX_I2C1_IRQ, }, | ||
| 1189 | + { .irq = -1 } | ||
| 1190 | +}; | ||
| 1191 | + | ||
| 1192 | +struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[] = { | ||
| 1193 | + { .irq = INT_24XX_I2C2_IRQ, }, | ||
| 1194 | + { .irq = -1 } | ||
| 1195 | +}; | ||
| 1196 | + | ||
| 1197 | +struct omap_hwmod_irq_info omap2_gpio1_irqs[] = { | ||
| 1198 | + { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ | ||
| 1199 | + { .irq = -1 } | ||
| 1200 | +}; | ||
| 1201 | + | ||
| 1202 | +struct omap_hwmod_irq_info omap2_gpio2_irqs[] = { | ||
| 1203 | + { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ | ||
| 1204 | + { .irq = -1 } | ||
| 1205 | +}; | ||
| 1206 | + | ||
| 1207 | +struct omap_hwmod_irq_info omap2_gpio3_irqs[] = { | ||
| 1208 | + { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ | ||
| 1209 | + { .irq = -1 } | ||
| 1210 | +}; | ||
| 1211 | + | ||
| 1212 | +struct omap_hwmod_irq_info omap2_gpio4_irqs[] = { | ||
| 1213 | + { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ | ||
| 1214 | + { .irq = -1 } | ||
| 1215 | +}; | ||
| 1216 | + | ||
| 1217 | +struct omap_hwmod_irq_info omap2_dma_system_irqs[] = { | ||
| 1218 | + { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ | ||
| 1219 | + { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
| 1220 | + { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
| 1221 | + { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
| 1222 | + { .irq = -1 } | ||
| 1223 | +}; | ||
| 1224 | + | ||
| 1225 | +struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[] = { | ||
| 1226 | + { .irq = 65 }, | ||
| 1227 | + { .irq = -1 } | ||
| 1228 | +}; | ||
| 1229 | + | ||
| 1230 | +struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { | ||
| 1231 | + { .irq = 66 }, | ||
| 1232 | + { .irq = -1 } | ||
| 1233 | +}; | ||
| 1234 | + | ||
| 1235 | + | ||
| 1236 | + | ||
| 1237 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | ||
| 1238 | new file mode 100644 | ||
| 1239 | index 0000000..5a078a6 | ||
| 1240 | --- /dev/null | ||
| 1241 | +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | ||
| 1242 | @@ -0,0 +1,21 @@ | ||
| 1243 | +/* | ||
| 1244 | + * omap_hwmod_2xxx_ipblock_data.c - common IP block data for OMAP2xxx | ||
| 1245 | + * | ||
| 1246 | + * Copyright (C) 2011 Nokia Corporation | ||
| 1247 | + * Paul Walmsley | ||
| 1248 | + * | ||
| 1249 | + * This program is free software; you can redistribute it and/or modify | ||
| 1250 | + * it under the terms of the GNU General Public License version 2 as | ||
| 1251 | + * published by the Free Software Foundation. | ||
| 1252 | + */ | ||
| 1253 | +#include <plat/omap_hwmod.h> | ||
| 1254 | +#include <plat/serial.h> | ||
| 1255 | + | ||
| 1256 | +#include <mach/irqs.h> | ||
| 1257 | + | ||
| 1258 | +#include "omap_hwmod_common_data.h" | ||
| 1259 | + | ||
| 1260 | +struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { | ||
| 1261 | + { .irq = 48, }, | ||
| 1262 | + { .irq = -1 } | ||
| 1263 | +}; | ||
| 1264 | diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1265 | index cc178b5..6bac4bb 100644 | ||
| 1266 | --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1267 | +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1268 | @@ -151,7 +151,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_l3_main_masters[] = { | ||
| 1269 | static struct omap_hwmod omap3xxx_l3_main_hwmod = { | ||
| 1270 | .name = "l3_main", | ||
| 1271 | .class = &l3_hwmod_class, | ||
| 1272 | - .mpu_irqs = omap3xxx_l3_main_irqs, | ||
| 1273 | + .mpu_irqs = omap3xxx_l3_main_irqs, | ||
| 1274 | .masters = omap3xxx_l3_main_masters, | ||
| 1275 | .masters_cnt = ARRAY_SIZE(omap3xxx_l3_main_masters), | ||
| 1276 | .slaves = omap3xxx_l3_main_slaves, | ||
| 1277 | @@ -572,10 +572,6 @@ static struct omap_hwmod_class omap3xxx_timer_hwmod_class = { | ||
| 1278 | |||
| 1279 | /* timer1 */ | ||
| 1280 | static struct omap_hwmod omap3xxx_timer1_hwmod; | ||
| 1281 | -static struct omap_hwmod_irq_info omap3xxx_timer1_mpu_irqs[] = { | ||
| 1282 | - { .irq = 37, }, | ||
| 1283 | - { .irq = -1 } | ||
| 1284 | -}; | ||
| 1285 | |||
| 1286 | static struct omap_hwmod_addr_space omap3xxx_timer1_addrs[] = { | ||
| 1287 | { | ||
| 1288 | @@ -603,7 +599,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer1_slaves[] = { | ||
| 1289 | /* timer1 hwmod */ | ||
| 1290 | static struct omap_hwmod omap3xxx_timer1_hwmod = { | ||
| 1291 | .name = "timer1", | ||
| 1292 | - .mpu_irqs = omap3xxx_timer1_mpu_irqs, | ||
| 1293 | + .mpu_irqs = omap2_timer1_mpu_irqs, | ||
| 1294 | .main_clk = "gpt1_fck", | ||
| 1295 | .prcm = { | ||
| 1296 | .omap2 = { | ||
| 1297 | @@ -622,10 +618,6 @@ static struct omap_hwmod omap3xxx_timer1_hwmod = { | ||
| 1298 | |||
| 1299 | /* timer2 */ | ||
| 1300 | static struct omap_hwmod omap3xxx_timer2_hwmod; | ||
| 1301 | -static struct omap_hwmod_irq_info omap3xxx_timer2_mpu_irqs[] = { | ||
| 1302 | - { .irq = 38, }, | ||
| 1303 | - { .irq = -1 } | ||
| 1304 | -}; | ||
| 1305 | |||
| 1306 | static struct omap_hwmod_addr_space omap3xxx_timer2_addrs[] = { | ||
| 1307 | { | ||
| 1308 | @@ -653,7 +645,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer2_slaves[] = { | ||
| 1309 | /* timer2 hwmod */ | ||
| 1310 | static struct omap_hwmod omap3xxx_timer2_hwmod = { | ||
| 1311 | .name = "timer2", | ||
| 1312 | - .mpu_irqs = omap3xxx_timer2_mpu_irqs, | ||
| 1313 | + .mpu_irqs = omap2_timer2_mpu_irqs, | ||
| 1314 | .main_clk = "gpt2_fck", | ||
| 1315 | .prcm = { | ||
| 1316 | .omap2 = { | ||
| 1317 | @@ -672,10 +664,6 @@ static struct omap_hwmod omap3xxx_timer2_hwmod = { | ||
| 1318 | |||
| 1319 | /* timer3 */ | ||
| 1320 | static struct omap_hwmod omap3xxx_timer3_hwmod; | ||
| 1321 | -static struct omap_hwmod_irq_info omap3xxx_timer3_mpu_irqs[] = { | ||
| 1322 | - { .irq = 39, }, | ||
| 1323 | - { .irq = -1 } | ||
| 1324 | -}; | ||
| 1325 | |||
| 1326 | static struct omap_hwmod_addr_space omap3xxx_timer3_addrs[] = { | ||
| 1327 | { | ||
| 1328 | @@ -703,7 +691,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer3_slaves[] = { | ||
| 1329 | /* timer3 hwmod */ | ||
| 1330 | static struct omap_hwmod omap3xxx_timer3_hwmod = { | ||
| 1331 | .name = "timer3", | ||
| 1332 | - .mpu_irqs = omap3xxx_timer3_mpu_irqs, | ||
| 1333 | + .mpu_irqs = omap2_timer3_mpu_irqs, | ||
| 1334 | .main_clk = "gpt3_fck", | ||
| 1335 | .prcm = { | ||
| 1336 | .omap2 = { | ||
| 1337 | @@ -722,10 +710,6 @@ static struct omap_hwmod omap3xxx_timer3_hwmod = { | ||
| 1338 | |||
| 1339 | /* timer4 */ | ||
| 1340 | static struct omap_hwmod omap3xxx_timer4_hwmod; | ||
| 1341 | -static struct omap_hwmod_irq_info omap3xxx_timer4_mpu_irqs[] = { | ||
| 1342 | - { .irq = 40, }, | ||
| 1343 | - { .irq = -1 } | ||
| 1344 | -}; | ||
| 1345 | |||
| 1346 | static struct omap_hwmod_addr_space omap3xxx_timer4_addrs[] = { | ||
| 1347 | { | ||
| 1348 | @@ -753,7 +737,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer4_slaves[] = { | ||
| 1349 | /* timer4 hwmod */ | ||
| 1350 | static struct omap_hwmod omap3xxx_timer4_hwmod = { | ||
| 1351 | .name = "timer4", | ||
| 1352 | - .mpu_irqs = omap3xxx_timer4_mpu_irqs, | ||
| 1353 | + .mpu_irqs = omap2_timer4_mpu_irqs, | ||
| 1354 | .main_clk = "gpt4_fck", | ||
| 1355 | .prcm = { | ||
| 1356 | .omap2 = { | ||
| 1357 | @@ -772,10 +756,6 @@ static struct omap_hwmod omap3xxx_timer4_hwmod = { | ||
| 1358 | |||
| 1359 | /* timer5 */ | ||
| 1360 | static struct omap_hwmod omap3xxx_timer5_hwmod; | ||
| 1361 | -static struct omap_hwmod_irq_info omap3xxx_timer5_mpu_irqs[] = { | ||
| 1362 | - { .irq = 41, }, | ||
| 1363 | - { .irq = -1 } | ||
| 1364 | -}; | ||
| 1365 | |||
| 1366 | static struct omap_hwmod_addr_space omap3xxx_timer5_addrs[] = { | ||
| 1367 | { | ||
| 1368 | @@ -803,7 +783,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer5_slaves[] = { | ||
| 1369 | /* timer5 hwmod */ | ||
| 1370 | static struct omap_hwmod omap3xxx_timer5_hwmod = { | ||
| 1371 | .name = "timer5", | ||
| 1372 | - .mpu_irqs = omap3xxx_timer5_mpu_irqs, | ||
| 1373 | + .mpu_irqs = omap2_timer5_mpu_irqs, | ||
| 1374 | .main_clk = "gpt5_fck", | ||
| 1375 | .prcm = { | ||
| 1376 | .omap2 = { | ||
| 1377 | @@ -822,10 +802,6 @@ static struct omap_hwmod omap3xxx_timer5_hwmod = { | ||
| 1378 | |||
| 1379 | /* timer6 */ | ||
| 1380 | static struct omap_hwmod omap3xxx_timer6_hwmod; | ||
| 1381 | -static struct omap_hwmod_irq_info omap3xxx_timer6_mpu_irqs[] = { | ||
| 1382 | - { .irq = 42, }, | ||
| 1383 | - { .irq = -1 } | ||
| 1384 | -}; | ||
| 1385 | |||
| 1386 | static struct omap_hwmod_addr_space omap3xxx_timer6_addrs[] = { | ||
| 1387 | { | ||
| 1388 | @@ -853,7 +829,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer6_slaves[] = { | ||
| 1389 | /* timer6 hwmod */ | ||
| 1390 | static struct omap_hwmod omap3xxx_timer6_hwmod = { | ||
| 1391 | .name = "timer6", | ||
| 1392 | - .mpu_irqs = omap3xxx_timer6_mpu_irqs, | ||
| 1393 | + .mpu_irqs = omap2_timer6_mpu_irqs, | ||
| 1394 | .main_clk = "gpt6_fck", | ||
| 1395 | .prcm = { | ||
| 1396 | .omap2 = { | ||
| 1397 | @@ -872,10 +848,6 @@ static struct omap_hwmod omap3xxx_timer6_hwmod = { | ||
| 1398 | |||
| 1399 | /* timer7 */ | ||
| 1400 | static struct omap_hwmod omap3xxx_timer7_hwmod; | ||
| 1401 | -static struct omap_hwmod_irq_info omap3xxx_timer7_mpu_irqs[] = { | ||
| 1402 | - { .irq = 43, }, | ||
| 1403 | - { .irq = -1 } | ||
| 1404 | -}; | ||
| 1405 | |||
| 1406 | static struct omap_hwmod_addr_space omap3xxx_timer7_addrs[] = { | ||
| 1407 | { | ||
| 1408 | @@ -903,7 +875,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer7_slaves[] = { | ||
| 1409 | /* timer7 hwmod */ | ||
| 1410 | static struct omap_hwmod omap3xxx_timer7_hwmod = { | ||
| 1411 | .name = "timer7", | ||
| 1412 | - .mpu_irqs = omap3xxx_timer7_mpu_irqs, | ||
| 1413 | + .mpu_irqs = omap2_timer7_mpu_irqs, | ||
| 1414 | .main_clk = "gpt7_fck", | ||
| 1415 | .prcm = { | ||
| 1416 | .omap2 = { | ||
| 1417 | @@ -922,10 +894,6 @@ static struct omap_hwmod omap3xxx_timer7_hwmod = { | ||
| 1418 | |||
| 1419 | /* timer8 */ | ||
| 1420 | static struct omap_hwmod omap3xxx_timer8_hwmod; | ||
| 1421 | -static struct omap_hwmod_irq_info omap3xxx_timer8_mpu_irqs[] = { | ||
| 1422 | - { .irq = 44, }, | ||
| 1423 | - { .irq = -1 } | ||
| 1424 | -}; | ||
| 1425 | |||
| 1426 | static struct omap_hwmod_addr_space omap3xxx_timer8_addrs[] = { | ||
| 1427 | { | ||
| 1428 | @@ -953,7 +921,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer8_slaves[] = { | ||
| 1429 | /* timer8 hwmod */ | ||
| 1430 | static struct omap_hwmod omap3xxx_timer8_hwmod = { | ||
| 1431 | .name = "timer8", | ||
| 1432 | - .mpu_irqs = omap3xxx_timer8_mpu_irqs, | ||
| 1433 | + .mpu_irqs = omap2_timer8_mpu_irqs, | ||
| 1434 | .main_clk = "gpt8_fck", | ||
| 1435 | .prcm = { | ||
| 1436 | .omap2 = { | ||
| 1437 | @@ -972,10 +940,6 @@ static struct omap_hwmod omap3xxx_timer8_hwmod = { | ||
| 1438 | |||
| 1439 | /* timer9 */ | ||
| 1440 | static struct omap_hwmod omap3xxx_timer9_hwmod; | ||
| 1441 | -static struct omap_hwmod_irq_info omap3xxx_timer9_mpu_irqs[] = { | ||
| 1442 | - { .irq = 45, }, | ||
| 1443 | - { .irq = -1 } | ||
| 1444 | -}; | ||
| 1445 | |||
| 1446 | static struct omap_hwmod_addr_space omap3xxx_timer9_addrs[] = { | ||
| 1447 | { | ||
| 1448 | @@ -1003,7 +967,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer9_slaves[] = { | ||
| 1449 | /* timer9 hwmod */ | ||
| 1450 | static struct omap_hwmod omap3xxx_timer9_hwmod = { | ||
| 1451 | .name = "timer9", | ||
| 1452 | - .mpu_irqs = omap3xxx_timer9_mpu_irqs, | ||
| 1453 | + .mpu_irqs = omap2_timer9_mpu_irqs, | ||
| 1454 | .main_clk = "gpt9_fck", | ||
| 1455 | .prcm = { | ||
| 1456 | .omap2 = { | ||
| 1457 | @@ -1022,10 +986,6 @@ static struct omap_hwmod omap3xxx_timer9_hwmod = { | ||
| 1458 | |||
| 1459 | /* timer10 */ | ||
| 1460 | static struct omap_hwmod omap3xxx_timer10_hwmod; | ||
| 1461 | -static struct omap_hwmod_irq_info omap3xxx_timer10_mpu_irqs[] = { | ||
| 1462 | - { .irq = 46, }, | ||
| 1463 | - { .irq = -1 } | ||
| 1464 | -}; | ||
| 1465 | |||
| 1466 | /* l4_core -> timer10 */ | ||
| 1467 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer10 = { | ||
| 1468 | @@ -1044,7 +1004,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer10_slaves[] = { | ||
| 1469 | /* timer10 hwmod */ | ||
| 1470 | static struct omap_hwmod omap3xxx_timer10_hwmod = { | ||
| 1471 | .name = "timer10", | ||
| 1472 | - .mpu_irqs = omap3xxx_timer10_mpu_irqs, | ||
| 1473 | + .mpu_irqs = omap2_timer10_mpu_irqs, | ||
| 1474 | .main_clk = "gpt10_fck", | ||
| 1475 | .prcm = { | ||
| 1476 | .omap2 = { | ||
| 1477 | @@ -1063,10 +1023,6 @@ static struct omap_hwmod omap3xxx_timer10_hwmod = { | ||
| 1478 | |||
| 1479 | /* timer11 */ | ||
| 1480 | static struct omap_hwmod omap3xxx_timer11_hwmod; | ||
| 1481 | -static struct omap_hwmod_irq_info omap3xxx_timer11_mpu_irqs[] = { | ||
| 1482 | - { .irq = 47, }, | ||
| 1483 | - { .irq = -1 } | ||
| 1484 | -}; | ||
| 1485 | |||
| 1486 | /* l4_core -> timer11 */ | ||
| 1487 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__timer11 = { | ||
| 1488 | @@ -1085,7 +1041,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_timer11_slaves[] = { | ||
| 1489 | /* timer11 hwmod */ | ||
| 1490 | static struct omap_hwmod omap3xxx_timer11_hwmod = { | ||
| 1491 | .name = "timer11", | ||
| 1492 | - .mpu_irqs = omap3xxx_timer11_mpu_irqs, | ||
| 1493 | + .mpu_irqs = omap2_timer11_mpu_irqs, | ||
| 1494 | .main_clk = "gpt11_fck", | ||
| 1495 | .prcm = { | ||
| 1496 | .omap2 = { | ||
| 1497 | @@ -1254,11 +1210,6 @@ static struct omap_hwmod_class uart_class = { | ||
| 1498 | |||
| 1499 | /* UART1 */ | ||
| 1500 | |||
| 1501 | -static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { | ||
| 1502 | - { .irq = INT_24XX_UART1_IRQ, }, | ||
| 1503 | - { .irq = -1 } | ||
| 1504 | -}; | ||
| 1505 | - | ||
| 1506 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | ||
| 1507 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | ||
| 1508 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | ||
| 1509 | @@ -1270,7 +1221,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { | ||
| 1510 | |||
| 1511 | static struct omap_hwmod omap3xxx_uart1_hwmod = { | ||
| 1512 | .name = "uart1", | ||
| 1513 | - .mpu_irqs = uart1_mpu_irqs, | ||
| 1514 | + .mpu_irqs = omap2_uart1_mpu_irqs, | ||
| 1515 | .sdma_reqs = uart1_sdma_reqs, | ||
| 1516 | .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | ||
| 1517 | .main_clk = "uart1_fck", | ||
| 1518 | @@ -1291,11 +1242,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { | ||
| 1519 | |||
| 1520 | /* UART2 */ | ||
| 1521 | |||
| 1522 | -static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { | ||
| 1523 | - { .irq = INT_24XX_UART2_IRQ, }, | ||
| 1524 | - { .irq = -1 } | ||
| 1525 | -}; | ||
| 1526 | - | ||
| 1527 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | ||
| 1528 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | ||
| 1529 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | ||
| 1530 | @@ -1307,7 +1253,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { | ||
| 1531 | |||
| 1532 | static struct omap_hwmod omap3xxx_uart2_hwmod = { | ||
| 1533 | .name = "uart2", | ||
| 1534 | - .mpu_irqs = uart2_mpu_irqs, | ||
| 1535 | + .mpu_irqs = omap2_uart2_mpu_irqs, | ||
| 1536 | .sdma_reqs = uart2_sdma_reqs, | ||
| 1537 | .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | ||
| 1538 | .main_clk = "uart2_fck", | ||
| 1539 | @@ -1328,11 +1274,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { | ||
| 1540 | |||
| 1541 | /* UART3 */ | ||
| 1542 | |||
| 1543 | -static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { | ||
| 1544 | - { .irq = INT_24XX_UART3_IRQ, }, | ||
| 1545 | - { .irq = -1 } | ||
| 1546 | -}; | ||
| 1547 | - | ||
| 1548 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | ||
| 1549 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | ||
| 1550 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | ||
| 1551 | @@ -1344,7 +1285,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { | ||
| 1552 | |||
| 1553 | static struct omap_hwmod omap3xxx_uart3_hwmod = { | ||
| 1554 | .name = "uart3", | ||
| 1555 | - .mpu_irqs = uart3_mpu_irqs, | ||
| 1556 | + .mpu_irqs = omap2_uart3_mpu_irqs, | ||
| 1557 | .sdma_reqs = uart3_sdma_reqs, | ||
| 1558 | .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | ||
| 1559 | .main_clk = "uart3_fck", | ||
| 1560 | @@ -1555,11 +1496,6 @@ static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { | ||
| 1561 | .sysc = &omap3xxx_dispc_sysc, | ||
| 1562 | }; | ||
| 1563 | |||
| 1564 | -static struct omap_hwmod_irq_info omap3xxx_dispc_irqs[] = { | ||
| 1565 | - { .irq = 25 }, | ||
| 1566 | - { .irq = -1 } | ||
| 1567 | -}; | ||
| 1568 | - | ||
| 1569 | /* l4_core -> dss_dispc */ | ||
| 1570 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { | ||
| 1571 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1572 | @@ -1584,7 +1520,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { | ||
| 1573 | static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { | ||
| 1574 | .name = "dss_dispc", | ||
| 1575 | .class = &omap3xxx_dispc_hwmod_class, | ||
| 1576 | - .mpu_irqs = omap3xxx_dispc_irqs, | ||
| 1577 | + .mpu_irqs = omap2_dispc_irqs, | ||
| 1578 | .main_clk = "dss1_alwon_fck", | ||
| 1579 | .prcm = { | ||
| 1580 | .omap2 = { | ||
| 1581 | @@ -1781,11 +1717,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { | ||
| 1582 | .fifo_depth = 8, /* bytes */ | ||
| 1583 | }; | ||
| 1584 | |||
| 1585 | -static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { | ||
| 1586 | - { .irq = INT_24XX_I2C1_IRQ, }, | ||
| 1587 | - { .irq = -1 } | ||
| 1588 | -}; | ||
| 1589 | - | ||
| 1590 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | ||
| 1591 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | ||
| 1592 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | ||
| 1593 | @@ -1797,7 +1728,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { | ||
| 1594 | |||
| 1595 | static struct omap_hwmod omap3xxx_i2c1_hwmod = { | ||
| 1596 | .name = "i2c1", | ||
| 1597 | - .mpu_irqs = i2c1_mpu_irqs, | ||
| 1598 | + .mpu_irqs = omap2_i2c1_mpu_irqs, | ||
| 1599 | .sdma_reqs = i2c1_sdma_reqs, | ||
| 1600 | .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | ||
| 1601 | .main_clk = "i2c1_fck", | ||
| 1602 | @@ -1823,11 +1754,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { | ||
| 1603 | .fifo_depth = 8, /* bytes */ | ||
| 1604 | }; | ||
| 1605 | |||
| 1606 | -static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { | ||
| 1607 | - { .irq = INT_24XX_I2C2_IRQ, }, | ||
| 1608 | - { .irq = -1 } | ||
| 1609 | -}; | ||
| 1610 | - | ||
| 1611 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | ||
| 1612 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | ||
| 1613 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | ||
| 1614 | @@ -1839,7 +1765,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { | ||
| 1615 | |||
| 1616 | static struct omap_hwmod omap3xxx_i2c2_hwmod = { | ||
| 1617 | .name = "i2c2", | ||
| 1618 | - .mpu_irqs = i2c2_mpu_irqs, | ||
| 1619 | + .mpu_irqs = omap2_i2c2_mpu_irqs, | ||
| 1620 | .sdma_reqs = i2c2_sdma_reqs, | ||
| 1621 | .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | ||
| 1622 | .main_clk = "i2c2_fck", | ||
| 1623 | @@ -2032,11 +1958,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { | ||
| 1624 | }; | ||
| 1625 | |||
| 1626 | /* gpio1 */ | ||
| 1627 | -static struct omap_hwmod_irq_info omap3xxx_gpio1_irqs[] = { | ||
| 1628 | - { .irq = 29 }, /* INT_34XX_GPIO_BANK1 */ | ||
| 1629 | - { .irq = -1 } | ||
| 1630 | -}; | ||
| 1631 | - | ||
| 1632 | static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { | ||
| 1633 | { .role = "dbclk", .clk = "gpio1_dbck", }, | ||
| 1634 | }; | ||
| 1635 | @@ -2048,7 +1969,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio1_slaves[] = { | ||
| 1636 | static struct omap_hwmod omap3xxx_gpio1_hwmod = { | ||
| 1637 | .name = "gpio1", | ||
| 1638 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1639 | - .mpu_irqs = omap3xxx_gpio1_irqs, | ||
| 1640 | + .mpu_irqs = omap2_gpio1_irqs, | ||
| 1641 | .main_clk = "gpio1_ick", | ||
| 1642 | .opt_clks = gpio1_opt_clks, | ||
| 1643 | .opt_clks_cnt = ARRAY_SIZE(gpio1_opt_clks), | ||
| 1644 | @@ -2069,11 +1990,6 @@ static struct omap_hwmod omap3xxx_gpio1_hwmod = { | ||
| 1645 | }; | ||
| 1646 | |||
| 1647 | /* gpio2 */ | ||
| 1648 | -static struct omap_hwmod_irq_info omap3xxx_gpio2_irqs[] = { | ||
| 1649 | - { .irq = 30 }, /* INT_34XX_GPIO_BANK2 */ | ||
| 1650 | - { .irq = -1 } | ||
| 1651 | -}; | ||
| 1652 | - | ||
| 1653 | static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { | ||
| 1654 | { .role = "dbclk", .clk = "gpio2_dbck", }, | ||
| 1655 | }; | ||
| 1656 | @@ -2085,7 +2001,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio2_slaves[] = { | ||
| 1657 | static struct omap_hwmod omap3xxx_gpio2_hwmod = { | ||
| 1658 | .name = "gpio2", | ||
| 1659 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1660 | - .mpu_irqs = omap3xxx_gpio2_irqs, | ||
| 1661 | + .mpu_irqs = omap2_gpio2_irqs, | ||
| 1662 | .main_clk = "gpio2_ick", | ||
| 1663 | .opt_clks = gpio2_opt_clks, | ||
| 1664 | .opt_clks_cnt = ARRAY_SIZE(gpio2_opt_clks), | ||
| 1665 | @@ -2106,11 +2022,6 @@ static struct omap_hwmod omap3xxx_gpio2_hwmod = { | ||
| 1666 | }; | ||
| 1667 | |||
| 1668 | /* gpio3 */ | ||
| 1669 | -static struct omap_hwmod_irq_info omap3xxx_gpio3_irqs[] = { | ||
| 1670 | - { .irq = 31 }, /* INT_34XX_GPIO_BANK3 */ | ||
| 1671 | - { .irq = -1 } | ||
| 1672 | -}; | ||
| 1673 | - | ||
| 1674 | static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { | ||
| 1675 | { .role = "dbclk", .clk = "gpio3_dbck", }, | ||
| 1676 | }; | ||
| 1677 | @@ -2122,7 +2033,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio3_slaves[] = { | ||
| 1678 | static struct omap_hwmod omap3xxx_gpio3_hwmod = { | ||
| 1679 | .name = "gpio3", | ||
| 1680 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1681 | - .mpu_irqs = omap3xxx_gpio3_irqs, | ||
| 1682 | + .mpu_irqs = omap2_gpio3_irqs, | ||
| 1683 | .main_clk = "gpio3_ick", | ||
| 1684 | .opt_clks = gpio3_opt_clks, | ||
| 1685 | .opt_clks_cnt = ARRAY_SIZE(gpio3_opt_clks), | ||
| 1686 | @@ -2143,11 +2054,6 @@ static struct omap_hwmod omap3xxx_gpio3_hwmod = { | ||
| 1687 | }; | ||
| 1688 | |||
| 1689 | /* gpio4 */ | ||
| 1690 | -static struct omap_hwmod_irq_info omap3xxx_gpio4_irqs[] = { | ||
| 1691 | - { .irq = 32 }, /* INT_34XX_GPIO_BANK4 */ | ||
| 1692 | - { .irq = -1 } | ||
| 1693 | -}; | ||
| 1694 | - | ||
| 1695 | static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { | ||
| 1696 | { .role = "dbclk", .clk = "gpio4_dbck", }, | ||
| 1697 | }; | ||
| 1698 | @@ -2159,7 +2065,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_gpio4_slaves[] = { | ||
| 1699 | static struct omap_hwmod omap3xxx_gpio4_hwmod = { | ||
| 1700 | .name = "gpio4", | ||
| 1701 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 1702 | - .mpu_irqs = omap3xxx_gpio4_irqs, | ||
| 1703 | + .mpu_irqs = omap2_gpio4_irqs, | ||
| 1704 | .main_clk = "gpio4_ick", | ||
| 1705 | .opt_clks = gpio4_opt_clks, | ||
| 1706 | .opt_clks_cnt = ARRAY_SIZE(gpio4_opt_clks), | ||
| 1707 | @@ -2287,14 +2193,6 @@ static struct omap_hwmod_class omap3xxx_dma_hwmod_class = { | ||
| 1708 | }; | ||
| 1709 | |||
| 1710 | /* dma_system */ | ||
| 1711 | -static struct omap_hwmod_irq_info omap3xxx_dma_system_irqs[] = { | ||
| 1712 | - { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ | ||
| 1713 | - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ | ||
| 1714 | - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ | ||
| 1715 | - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ | ||
| 1716 | - { .irq = -1 } | ||
| 1717 | -}; | ||
| 1718 | - | ||
| 1719 | static struct omap_hwmod_addr_space omap3xxx_dma_system_addrs[] = { | ||
| 1720 | { | ||
| 1721 | .pa_start = 0x48056000, | ||
| 1722 | @@ -2326,7 +2224,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dma_system_slaves[] = { | ||
| 1723 | static struct omap_hwmod omap3xxx_dma_system_hwmod = { | ||
| 1724 | .name = "dma", | ||
| 1725 | .class = &omap3xxx_dma_hwmod_class, | ||
| 1726 | - .mpu_irqs = omap3xxx_dma_system_irqs, | ||
| 1727 | + .mpu_irqs = omap2_dma_system_irqs, | ||
| 1728 | .main_clk = "core_l3_ick", | ||
| 1729 | .prcm = { | ||
| 1730 | .omap2 = { | ||
| 1731 | @@ -3044,11 +2942,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { | ||
| 1732 | }; | ||
| 1733 | |||
| 1734 | /* mcspi1 */ | ||
| 1735 | -static struct omap_hwmod_irq_info omap34xx_mcspi1_mpu_irqs[] = { | ||
| 1736 | - { .name = "irq", .irq = 65 }, | ||
| 1737 | - { .irq = -1 } | ||
| 1738 | -}; | ||
| 1739 | - | ||
| 1740 | static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { | ||
| 1741 | { .name = "tx0", .dma_req = 35 }, | ||
| 1742 | { .name = "rx0", .dma_req = 36 }, | ||
| 1743 | @@ -3070,7 +2963,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | ||
| 1744 | |||
| 1745 | static struct omap_hwmod omap34xx_mcspi1 = { | ||
| 1746 | .name = "mcspi1", | ||
| 1747 | - .mpu_irqs = omap34xx_mcspi1_mpu_irqs, | ||
| 1748 | + .mpu_irqs = omap2_mcspi1_mpu_irqs, | ||
| 1749 | .sdma_reqs = omap34xx_mcspi1_sdma_reqs, | ||
| 1750 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), | ||
| 1751 | .main_clk = "mcspi1_fck", | ||
| 1752 | @@ -3091,11 +2984,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { | ||
| 1753 | }; | ||
| 1754 | |||
| 1755 | /* mcspi2 */ | ||
| 1756 | -static struct omap_hwmod_irq_info omap34xx_mcspi2_mpu_irqs[] = { | ||
| 1757 | - { .name = "irq", .irq = 66 }, | ||
| 1758 | - { .irq = -1 } | ||
| 1759 | -}; | ||
| 1760 | - | ||
| 1761 | static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { | ||
| 1762 | { .name = "tx0", .dma_req = 43 }, | ||
| 1763 | { .name = "rx0", .dma_req = 44 }, | ||
| 1764 | @@ -3113,7 +3001,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | ||
| 1765 | |||
| 1766 | static struct omap_hwmod omap34xx_mcspi2 = { | ||
| 1767 | .name = "mcspi2", | ||
| 1768 | - .mpu_irqs = omap34xx_mcspi2_mpu_irqs, | ||
| 1769 | + .mpu_irqs = omap2_mcspi2_mpu_irqs, | ||
| 1770 | .sdma_reqs = omap34xx_mcspi2_sdma_reqs, | ||
| 1771 | .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), | ||
| 1772 | .main_clk = "mcspi2_fck", | ||
| 1773 | diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h | ||
| 1774 | index 76a2f11..1ac878c 100644 | ||
| 1775 | --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h | ||
| 1776 | +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h | ||
| 1777 | @@ -49,6 +49,35 @@ extern struct omap_hwmod_addr_space omap2_dma_system_addrs[]; | ||
| 1778 | extern struct omap_hwmod_addr_space omap2_mailbox_addrs[]; | ||
| 1779 | extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; | ||
| 1780 | |||
| 1781 | +/* Common IP block data across OMAP2xxx */ | ||
| 1782 | +extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[]; | ||
| 1783 | + | ||
| 1784 | +/* Common IP block data across OMAP2/3 */ | ||
| 1785 | +extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[]; | ||
| 1786 | +extern struct omap_hwmod_irq_info omap2_timer2_mpu_irqs[]; | ||
| 1787 | +extern struct omap_hwmod_irq_info omap2_timer3_mpu_irqs[]; | ||
| 1788 | +extern struct omap_hwmod_irq_info omap2_timer4_mpu_irqs[]; | ||
| 1789 | +extern struct omap_hwmod_irq_info omap2_timer5_mpu_irqs[]; | ||
| 1790 | +extern struct omap_hwmod_irq_info omap2_timer6_mpu_irqs[]; | ||
| 1791 | +extern struct omap_hwmod_irq_info omap2_timer7_mpu_irqs[]; | ||
| 1792 | +extern struct omap_hwmod_irq_info omap2_timer8_mpu_irqs[]; | ||
| 1793 | +extern struct omap_hwmod_irq_info omap2_timer9_mpu_irqs[]; | ||
| 1794 | +extern struct omap_hwmod_irq_info omap2_timer10_mpu_irqs[]; | ||
| 1795 | +extern struct omap_hwmod_irq_info omap2_timer11_mpu_irqs[]; | ||
| 1796 | +extern struct omap_hwmod_irq_info omap2_uart1_mpu_irqs[]; | ||
| 1797 | +extern struct omap_hwmod_irq_info omap2_uart2_mpu_irqs[]; | ||
| 1798 | +extern struct omap_hwmod_irq_info omap2_uart3_mpu_irqs[]; | ||
| 1799 | +extern struct omap_hwmod_irq_info omap2_dispc_irqs[]; | ||
| 1800 | +extern struct omap_hwmod_irq_info omap2_i2c1_mpu_irqs[]; | ||
| 1801 | +extern struct omap_hwmod_irq_info omap2_i2c2_mpu_irqs[]; | ||
| 1802 | +extern struct omap_hwmod_irq_info omap2_gpio1_irqs[]; | ||
| 1803 | +extern struct omap_hwmod_irq_info omap2_gpio2_irqs[]; | ||
| 1804 | +extern struct omap_hwmod_irq_info omap2_gpio3_irqs[]; | ||
| 1805 | +extern struct omap_hwmod_irq_info omap2_gpio4_irqs[]; | ||
| 1806 | +extern struct omap_hwmod_irq_info omap2_dma_system_irqs[]; | ||
| 1807 | +extern struct omap_hwmod_irq_info omap2_mcspi1_mpu_irqs[]; | ||
| 1808 | +extern struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[]; | ||
| 1809 | + | ||
| 1810 | /* OMAP hwmod classes - forward declarations */ | ||
| 1811 | extern struct omap_hwmod_class l3_hwmod_class; | ||
| 1812 | extern struct omap_hwmod_class l4_hwmod_class; | ||
| 1813 | -- | ||
| 1814 | 1.7.2.5 | ||
| 1815 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0041-omap_hwmod-use-a-terminator-record-with-omap_hwmod_d.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0041-omap_hwmod-use-a-terminator-record-with-omap_hwmod_d.patch deleted file mode 100644 index b1722a24..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0041-omap_hwmod-use-a-terminator-record-with-omap_hwmod_d.patch +++ /dev/null | |||
| @@ -1,1382 +0,0 @@ | |||
| 1 | From e890f701dbd58ecb9377097e1a565e34cbf73e4b Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Paul Walmsley <paul@pwsan.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:07 -0600 | ||
| 4 | Subject: [PATCH 041/149] omap_hwmod: use a terminator record with omap_hwmod_dma_info arrays | ||
| 5 | |||
| 6 | Previously, struct omap_hwmod_dma_info arrays were unterminated; and | ||
| 7 | users of these arrays used the ARRAY_SIZE() macro to determine the | ||
| 8 | length of the array. However, ARRAY_SIZE() only works when the array | ||
| 9 | is in the same scope as the macro user. | ||
| 10 | |||
| 11 | So far this hasn't been a problem. However, to reduce duplicated | ||
| 12 | data, a subsequent patch will move common data to a separate, shared | ||
| 13 | file. When this is done, ARRAY_SIZE() will no longer be usable. | ||
| 14 | |||
| 15 | This patch removes ARRAY_SIZE() usage for struct omap_hwmod_dma_info | ||
| 16 | arrays and uses a sentinel value (irq == -1) as the array terminator | ||
| 17 | instead. | ||
| 18 | |||
| 19 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 20 | --- | ||
| 21 | arch/arm/mach-omap2/omap_hwmod.c | 30 ++++++++++++- | ||
| 22 | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 20 ++++---- | ||
| 23 | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 32 +++++++------- | ||
| 24 | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 43 +++++++++---------- | ||
| 25 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 60 +++++++++++++------------- | ||
| 26 | arch/arm/plat-omap/include/plat/omap_hwmod.h | 8 +-- | ||
| 27 | 6 files changed, 106 insertions(+), 87 deletions(-) | ||
| 28 | |||
| 29 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 30 | index b761968..7d242c9 100644 | ||
| 31 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 32 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 33 | @@ -702,6 +702,29 @@ static int _count_mpu_irqs(struct omap_hwmod *oh) | ||
| 34 | } | ||
| 35 | |||
| 36 | /** | ||
| 37 | + * _count_sdma_reqs - count the number of SDMA request lines associated with @oh | ||
| 38 | + * @oh: struct omap_hwmod *oh | ||
| 39 | + * | ||
| 40 | + * Count and return the number of SDMA request lines associated with | ||
| 41 | + * the hwmod @oh. Used to allocate struct resource data. Returns 0 | ||
| 42 | + * if @oh is NULL. | ||
| 43 | + */ | ||
| 44 | +static int _count_sdma_reqs(struct omap_hwmod *oh) | ||
| 45 | +{ | ||
| 46 | + struct omap_hwmod_dma_info *ohdi; | ||
| 47 | + int i = 0; | ||
| 48 | + | ||
| 49 | + if (!oh || !oh->sdma_reqs) | ||
| 50 | + return 0; | ||
| 51 | + | ||
| 52 | + do { | ||
| 53 | + ohdi = &oh->sdma_reqs[i++]; | ||
| 54 | + } while (ohdi->dma_req != -1); | ||
| 55 | + | ||
| 56 | + return i; | ||
| 57 | +} | ||
| 58 | + | ||
| 59 | +/** | ||
| 60 | * _count_ocp_if_addr_spaces - count the number of address space entries for @oh | ||
| 61 | * @oh: struct omap_hwmod *oh | ||
| 62 | * | ||
| 63 | @@ -2007,7 +2030,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) | ||
| 64 | { | ||
| 65 | int ret, i; | ||
| 66 | |||
| 67 | - ret = _count_mpu_irqs(oh) + oh->sdma_reqs_cnt; | ||
| 68 | + ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh); | ||
| 69 | |||
| 70 | for (i = 0; i < oh->slaves_cnt; i++) | ||
| 71 | ret += _count_ocp_if_addr_spaces(oh->slaves[i]); | ||
| 72 | @@ -2027,7 +2050,7 @@ int omap_hwmod_count_resources(struct omap_hwmod *oh) | ||
| 73 | */ | ||
| 74 | int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) | ||
| 75 | { | ||
| 76 | - int i, j, mpu_irqs_cnt; | ||
| 77 | + int i, j, mpu_irqs_cnt, sdma_reqs_cnt; | ||
| 78 | int r = 0; | ||
| 79 | |||
| 80 | /* For each IRQ, DMA, memory area, fill in array.*/ | ||
| 81 | @@ -2041,7 +2064,8 @@ int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res) | ||
| 82 | r++; | ||
| 83 | } | ||
| 84 | |||
| 85 | - for (i = 0; i < oh->sdma_reqs_cnt; i++) { | ||
| 86 | + sdma_reqs_cnt = _count_sdma_reqs(oh); | ||
| 87 | + for (i = 0; i < sdma_reqs_cnt; i++) { | ||
| 88 | (res + r)->name = (oh->sdma_reqs + i)->name; | ||
| 89 | (res + r)->start = (oh->sdma_reqs + i)->dma_req; | ||
| 90 | (res + r)->end = (oh->sdma_reqs + i)->dma_req; | ||
| 91 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 92 | index 73157ee..60c817e 100644 | ||
| 93 | --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 94 | +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 95 | @@ -831,6 +831,7 @@ static struct omap_hwmod_class uart_class = { | ||
| 96 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | ||
| 97 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | ||
| 98 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | ||
| 99 | + { .dma_req = -1 } | ||
| 100 | }; | ||
| 101 | |||
| 102 | static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { | ||
| 103 | @@ -841,7 +842,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { | ||
| 104 | .name = "uart1", | ||
| 105 | .mpu_irqs = omap2_uart1_mpu_irqs, | ||
| 106 | .sdma_reqs = uart1_sdma_reqs, | ||
| 107 | - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | ||
| 108 | .main_clk = "uart1_fck", | ||
| 109 | .prcm = { | ||
| 110 | .omap2 = { | ||
| 111 | @@ -863,6 +863,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { | ||
| 112 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | ||
| 113 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | ||
| 114 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | ||
| 115 | + { .dma_req = -1 } | ||
| 116 | }; | ||
| 117 | |||
| 118 | static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { | ||
| 119 | @@ -873,7 +874,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { | ||
| 120 | .name = "uart2", | ||
| 121 | .mpu_irqs = omap2_uart2_mpu_irqs, | ||
| 122 | .sdma_reqs = uart2_sdma_reqs, | ||
| 123 | - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | ||
| 124 | .main_clk = "uart2_fck", | ||
| 125 | .prcm = { | ||
| 126 | .omap2 = { | ||
| 127 | @@ -895,6 +895,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { | ||
| 128 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | ||
| 129 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | ||
| 130 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | ||
| 131 | + { .dma_req = -1 } | ||
| 132 | }; | ||
| 133 | |||
| 134 | static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { | ||
| 135 | @@ -905,7 +906,6 @@ static struct omap_hwmod omap2420_uart3_hwmod = { | ||
| 136 | .name = "uart3", | ||
| 137 | .mpu_irqs = omap2_uart3_mpu_irqs, | ||
| 138 | .sdma_reqs = uart3_sdma_reqs, | ||
| 139 | - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | ||
| 140 | .main_clk = "uart3_fck", | ||
| 141 | .prcm = { | ||
| 142 | .omap2 = { | ||
| 143 | @@ -942,6 +942,7 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = { | ||
| 144 | |||
| 145 | static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { | ||
| 146 | { .name = "dispc", .dma_req = 5 }, | ||
| 147 | + { .dma_req = -1 } | ||
| 148 | }; | ||
| 149 | |||
| 150 | /* dss */ | ||
| 151 | @@ -980,7 +981,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { | ||
| 152 | .class = &omap2420_dss_hwmod_class, | ||
| 153 | .main_clk = "dss1_fck", /* instead of dss_fck */ | ||
| 154 | .sdma_reqs = omap2420_dss_sdma_chs, | ||
| 155 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs), | ||
| 156 | .prcm = { | ||
| 157 | .omap2 = { | ||
| 158 | .prcm_reg_id = 1, | ||
| 159 | @@ -1186,6 +1186,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr; | ||
| 160 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | ||
| 161 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | ||
| 162 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | ||
| 163 | + { .dma_req = -1 } | ||
| 164 | }; | ||
| 165 | |||
| 166 | static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { | ||
| 167 | @@ -1196,7 +1197,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { | ||
| 168 | .name = "i2c1", | ||
| 169 | .mpu_irqs = omap2_i2c1_mpu_irqs, | ||
| 170 | .sdma_reqs = i2c1_sdma_reqs, | ||
| 171 | - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | ||
| 172 | .main_clk = "i2c1_fck", | ||
| 173 | .prcm = { | ||
| 174 | .omap2 = { | ||
| 175 | @@ -1220,6 +1220,7 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { | ||
| 176 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | ||
| 177 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | ||
| 178 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | ||
| 179 | + { .dma_req = -1 } | ||
| 180 | }; | ||
| 181 | |||
| 182 | static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { | ||
| 183 | @@ -1230,7 +1231,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = { | ||
| 184 | .name = "i2c2", | ||
| 185 | .mpu_irqs = omap2_i2c2_mpu_irqs, | ||
| 186 | .sdma_reqs = i2c2_sdma_reqs, | ||
| 187 | - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | ||
| 188 | .main_clk = "i2c2_fck", | ||
| 189 | .prcm = { | ||
| 190 | .omap2 = { | ||
| 191 | @@ -1611,6 +1611,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { | ||
| 192 | { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ | ||
| 193 | { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ | ||
| 194 | { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ | ||
| 195 | + { .dma_req = -1 } | ||
| 196 | }; | ||
| 197 | |||
| 198 | static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { | ||
| 199 | @@ -1625,7 +1626,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { | ||
| 200 | .name = "mcspi1_hwmod", | ||
| 201 | .mpu_irqs = omap2_mcspi1_mpu_irqs, | ||
| 202 | .sdma_reqs = omap2420_mcspi1_sdma_reqs, | ||
| 203 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), | ||
| 204 | .main_clk = "mcspi1_fck", | ||
| 205 | .prcm = { | ||
| 206 | .omap2 = { | ||
| 207 | @@ -1649,6 +1649,7 @@ static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { | ||
| 208 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | ||
| 209 | { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ | ||
| 210 | { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ | ||
| 211 | + { .dma_req = -1 } | ||
| 212 | }; | ||
| 213 | |||
| 214 | static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { | ||
| 215 | @@ -1663,7 +1664,6 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = { | ||
| 216 | .name = "mcspi2_hwmod", | ||
| 217 | .mpu_irqs = omap2_mcspi2_mpu_irqs, | ||
| 218 | .sdma_reqs = omap2420_mcspi2_sdma_reqs, | ||
| 219 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), | ||
| 220 | .main_clk = "mcspi2_fck", | ||
| 221 | .prcm = { | ||
| 222 | .omap2 = { | ||
| 223 | @@ -1700,6 +1700,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { | ||
| 224 | static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { | ||
| 225 | { .name = "rx", .dma_req = 32 }, | ||
| 226 | { .name = "tx", .dma_req = 31 }, | ||
| 227 | + { .dma_req = -1 } | ||
| 228 | }; | ||
| 229 | |||
| 230 | /* l4_core -> mcbsp1 */ | ||
| 231 | @@ -1721,7 +1722,6 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { | ||
| 232 | .class = &omap2420_mcbsp_hwmod_class, | ||
| 233 | .mpu_irqs = omap2420_mcbsp1_irqs, | ||
| 234 | .sdma_reqs = omap2420_mcbsp1_sdma_chs, | ||
| 235 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), | ||
| 236 | .main_clk = "mcbsp1_fck", | ||
| 237 | .prcm = { | ||
| 238 | .omap2 = { | ||
| 239 | @@ -1747,6 +1747,7 @@ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { | ||
| 240 | static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { | ||
| 241 | { .name = "rx", .dma_req = 34 }, | ||
| 242 | { .name = "tx", .dma_req = 33 }, | ||
| 243 | + { .dma_req = -1 } | ||
| 244 | }; | ||
| 245 | |||
| 246 | /* l4_core -> mcbsp2 */ | ||
| 247 | @@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { | ||
| 248 | .class = &omap2420_mcbsp_hwmod_class, | ||
| 249 | .mpu_irqs = omap2420_mcbsp2_irqs, | ||
| 250 | .sdma_reqs = omap2420_mcbsp2_sdma_chs, | ||
| 251 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), | ||
| 252 | .main_clk = "mcbsp2_fck", | ||
| 253 | .prcm = { | ||
| 254 | .omap2 = { | ||
| 255 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 256 | index 62ecc68..af758b3 100644 | ||
| 257 | --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 258 | +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 259 | @@ -903,6 +903,7 @@ static struct omap_hwmod_class uart_class = { | ||
| 260 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | ||
| 261 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | ||
| 262 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | ||
| 263 | + { .dma_req = -1 } | ||
| 264 | }; | ||
| 265 | |||
| 266 | static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { | ||
| 267 | @@ -913,7 +914,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { | ||
| 268 | .name = "uart1", | ||
| 269 | .mpu_irqs = omap2_uart1_mpu_irqs, | ||
| 270 | .sdma_reqs = uart1_sdma_reqs, | ||
| 271 | - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | ||
| 272 | .main_clk = "uart1_fck", | ||
| 273 | .prcm = { | ||
| 274 | .omap2 = { | ||
| 275 | @@ -935,6 +935,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { | ||
| 276 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | ||
| 277 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | ||
| 278 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | ||
| 279 | + { .dma_req = -1 } | ||
| 280 | }; | ||
| 281 | |||
| 282 | static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { | ||
| 283 | @@ -945,7 +946,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { | ||
| 284 | .name = "uart2", | ||
| 285 | .mpu_irqs = omap2_uart2_mpu_irqs, | ||
| 286 | .sdma_reqs = uart2_sdma_reqs, | ||
| 287 | - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | ||
| 288 | .main_clk = "uart2_fck", | ||
| 289 | .prcm = { | ||
| 290 | .omap2 = { | ||
| 291 | @@ -967,6 +967,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { | ||
| 292 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | ||
| 293 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | ||
| 294 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | ||
| 295 | + { .dma_req = -1 } | ||
| 296 | }; | ||
| 297 | |||
| 298 | static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { | ||
| 299 | @@ -977,7 +978,6 @@ static struct omap_hwmod omap2430_uart3_hwmod = { | ||
| 300 | .name = "uart3", | ||
| 301 | .mpu_irqs = omap2_uart3_mpu_irqs, | ||
| 302 | .sdma_reqs = uart3_sdma_reqs, | ||
| 303 | - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | ||
| 304 | .main_clk = "uart3_fck", | ||
| 305 | .prcm = { | ||
| 306 | .omap2 = { | ||
| 307 | @@ -1014,6 +1014,7 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = { | ||
| 308 | |||
| 309 | static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { | ||
| 310 | { .name = "dispc", .dma_req = 5 }, | ||
| 311 | + { .dma_req = -1 } | ||
| 312 | }; | ||
| 313 | |||
| 314 | /* dss */ | ||
| 315 | @@ -1046,7 +1047,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { | ||
| 316 | .class = &omap2430_dss_hwmod_class, | ||
| 317 | .main_clk = "dss1_fck", /* instead of dss_fck */ | ||
| 318 | .sdma_reqs = omap2430_dss_sdma_chs, | ||
| 319 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_dss_sdma_chs), | ||
| 320 | .prcm = { | ||
| 321 | .omap2 = { | ||
| 322 | .prcm_reg_id = 1, | ||
| 323 | @@ -1237,6 +1237,7 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { | ||
| 324 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | ||
| 325 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | ||
| 326 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | ||
| 327 | + { .dma_req = -1 } | ||
| 328 | }; | ||
| 329 | |||
| 330 | static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { | ||
| 331 | @@ -1247,7 +1248,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { | ||
| 332 | .name = "i2c1", | ||
| 333 | .mpu_irqs = omap2_i2c1_mpu_irqs, | ||
| 334 | .sdma_reqs = i2c1_sdma_reqs, | ||
| 335 | - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | ||
| 336 | .main_clk = "i2chs1_fck", | ||
| 337 | .prcm = { | ||
| 338 | .omap2 = { | ||
| 339 | @@ -1278,6 +1278,7 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { | ||
| 340 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | ||
| 341 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | ||
| 342 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | ||
| 343 | + { .dma_req = -1 } | ||
| 344 | }; | ||
| 345 | |||
| 346 | static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { | ||
| 347 | @@ -1288,7 +1289,6 @@ static struct omap_hwmod omap2430_i2c2_hwmod = { | ||
| 348 | .name = "i2c2", | ||
| 349 | .mpu_irqs = omap2_i2c2_mpu_irqs, | ||
| 350 | .sdma_reqs = i2c2_sdma_reqs, | ||
| 351 | - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | ||
| 352 | .main_clk = "i2chs2_fck", | ||
| 353 | .prcm = { | ||
| 354 | .omap2 = { | ||
| 355 | @@ -1716,6 +1716,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { | ||
| 356 | { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ | ||
| 357 | { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ | ||
| 358 | { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ | ||
| 359 | + { .dma_req = -1 } | ||
| 360 | }; | ||
| 361 | |||
| 362 | static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { | ||
| 363 | @@ -1730,7 +1731,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { | ||
| 364 | .name = "mcspi1_hwmod", | ||
| 365 | .mpu_irqs = omap2_mcspi1_mpu_irqs, | ||
| 366 | .sdma_reqs = omap2430_mcspi1_sdma_reqs, | ||
| 367 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi1_sdma_reqs), | ||
| 368 | .main_clk = "mcspi1_fck", | ||
| 369 | .prcm = { | ||
| 370 | .omap2 = { | ||
| 371 | @@ -1754,6 +1754,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { | ||
| 372 | { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | ||
| 373 | { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ | ||
| 374 | { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ | ||
| 375 | + { .dma_req = -1 } | ||
| 376 | }; | ||
| 377 | |||
| 378 | static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { | ||
| 379 | @@ -1768,7 +1769,6 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { | ||
| 380 | .name = "mcspi2_hwmod", | ||
| 381 | .mpu_irqs = omap2_mcspi2_mpu_irqs, | ||
| 382 | .sdma_reqs = omap2430_mcspi2_sdma_reqs, | ||
| 383 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi2_sdma_reqs), | ||
| 384 | .main_clk = "mcspi2_fck", | ||
| 385 | .prcm = { | ||
| 386 | .omap2 = { | ||
| 387 | @@ -1797,6 +1797,7 @@ static struct omap_hwmod_dma_info omap2430_mcspi3_sdma_reqs[] = { | ||
| 388 | { .name = "rx0", .dma_req = 16 }, /* DMA_SPI3_RX0 */ | ||
| 389 | { .name = "tx1", .dma_req = 23 }, /* DMA_SPI3_TX1 */ | ||
| 390 | { .name = "rx1", .dma_req = 24 }, /* DMA_SPI3_RX1 */ | ||
| 391 | + { .dma_req = -1 } | ||
| 392 | }; | ||
| 393 | |||
| 394 | static struct omap_hwmod_ocp_if *omap2430_mcspi3_slaves[] = { | ||
| 395 | @@ -1811,7 +1812,6 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { | ||
| 396 | .name = "mcspi3_hwmod", | ||
| 397 | .mpu_irqs = omap2430_mcspi3_mpu_irqs, | ||
| 398 | .sdma_reqs = omap2430_mcspi3_sdma_reqs, | ||
| 399 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcspi3_sdma_reqs), | ||
| 400 | .main_clk = "mcspi3_fck", | ||
| 401 | .prcm = { | ||
| 402 | .omap2 = { | ||
| 403 | @@ -1915,6 +1915,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { | ||
| 404 | static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { | ||
| 405 | { .name = "rx", .dma_req = 32 }, | ||
| 406 | { .name = "tx", .dma_req = 31 }, | ||
| 407 | + { .dma_req = -1 } | ||
| 408 | }; | ||
| 409 | |||
| 410 | /* l4_core -> mcbsp1 */ | ||
| 411 | @@ -1936,7 +1937,6 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { | ||
| 412 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 413 | .mpu_irqs = omap2430_mcbsp1_irqs, | ||
| 414 | .sdma_reqs = omap2430_mcbsp1_sdma_chs, | ||
| 415 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp1_sdma_chs), | ||
| 416 | .main_clk = "mcbsp1_fck", | ||
| 417 | .prcm = { | ||
| 418 | .omap2 = { | ||
| 419 | @@ -1963,6 +1963,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { | ||
| 420 | static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { | ||
| 421 | { .name = "rx", .dma_req = 34 }, | ||
| 422 | { .name = "tx", .dma_req = 33 }, | ||
| 423 | + { .dma_req = -1 } | ||
| 424 | }; | ||
| 425 | |||
| 426 | /* l4_core -> mcbsp2 */ | ||
| 427 | @@ -1984,7 +1985,6 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { | ||
| 428 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 429 | .mpu_irqs = omap2430_mcbsp2_irqs, | ||
| 430 | .sdma_reqs = omap2430_mcbsp2_sdma_chs, | ||
| 431 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp2_sdma_chs), | ||
| 432 | .main_clk = "mcbsp2_fck", | ||
| 433 | .prcm = { | ||
| 434 | .omap2 = { | ||
| 435 | @@ -2011,6 +2011,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { | ||
| 436 | static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { | ||
| 437 | { .name = "rx", .dma_req = 18 }, | ||
| 438 | { .name = "tx", .dma_req = 17 }, | ||
| 439 | + { .dma_req = -1 } | ||
| 440 | }; | ||
| 441 | |||
| 442 | static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { | ||
| 443 | @@ -2042,7 +2043,6 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { | ||
| 444 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 445 | .mpu_irqs = omap2430_mcbsp3_irqs, | ||
| 446 | .sdma_reqs = omap2430_mcbsp3_sdma_chs, | ||
| 447 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp3_sdma_chs), | ||
| 448 | .main_clk = "mcbsp3_fck", | ||
| 449 | .prcm = { | ||
| 450 | .omap2 = { | ||
| 451 | @@ -2069,6 +2069,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp4_irqs[] = { | ||
| 452 | static struct omap_hwmod_dma_info omap2430_mcbsp4_sdma_chs[] = { | ||
| 453 | { .name = "rx", .dma_req = 20 }, | ||
| 454 | { .name = "tx", .dma_req = 19 }, | ||
| 455 | + { .dma_req = -1 } | ||
| 456 | }; | ||
| 457 | |||
| 458 | static struct omap_hwmod_addr_space omap2430_mcbsp4_addrs[] = { | ||
| 459 | @@ -2100,7 +2101,6 @@ static struct omap_hwmod omap2430_mcbsp4_hwmod = { | ||
| 460 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 461 | .mpu_irqs = omap2430_mcbsp4_irqs, | ||
| 462 | .sdma_reqs = omap2430_mcbsp4_sdma_chs, | ||
| 463 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp4_sdma_chs), | ||
| 464 | .main_clk = "mcbsp4_fck", | ||
| 465 | .prcm = { | ||
| 466 | .omap2 = { | ||
| 467 | @@ -2127,6 +2127,7 @@ static struct omap_hwmod_irq_info omap2430_mcbsp5_irqs[] = { | ||
| 468 | static struct omap_hwmod_dma_info omap2430_mcbsp5_sdma_chs[] = { | ||
| 469 | { .name = "rx", .dma_req = 22 }, | ||
| 470 | { .name = "tx", .dma_req = 21 }, | ||
| 471 | + { .dma_req = -1 } | ||
| 472 | }; | ||
| 473 | |||
| 474 | static struct omap_hwmod_addr_space omap2430_mcbsp5_addrs[] = { | ||
| 475 | @@ -2158,7 +2159,6 @@ static struct omap_hwmod omap2430_mcbsp5_hwmod = { | ||
| 476 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 477 | .mpu_irqs = omap2430_mcbsp5_irqs, | ||
| 478 | .sdma_reqs = omap2430_mcbsp5_sdma_chs, | ||
| 479 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mcbsp5_sdma_chs), | ||
| 480 | .main_clk = "mcbsp5_fck", | ||
| 481 | .prcm = { | ||
| 482 | .omap2 = { | ||
| 483 | @@ -2202,6 +2202,7 @@ static struct omap_hwmod_irq_info omap2430_mmc1_mpu_irqs[] = { | ||
| 484 | static struct omap_hwmod_dma_info omap2430_mmc1_sdma_reqs[] = { | ||
| 485 | { .name = "tx", .dma_req = 61 }, /* DMA_MMC1_TX */ | ||
| 486 | { .name = "rx", .dma_req = 62 }, /* DMA_MMC1_RX */ | ||
| 487 | + { .dma_req = -1 } | ||
| 488 | }; | ||
| 489 | |||
| 490 | static struct omap_hwmod_opt_clk omap2430_mmc1_opt_clks[] = { | ||
| 491 | @@ -2221,7 +2222,6 @@ static struct omap_hwmod omap2430_mmc1_hwmod = { | ||
| 492 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 493 | .mpu_irqs = omap2430_mmc1_mpu_irqs, | ||
| 494 | .sdma_reqs = omap2430_mmc1_sdma_reqs, | ||
| 495 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc1_sdma_reqs), | ||
| 496 | .opt_clks = omap2430_mmc1_opt_clks, | ||
| 497 | .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc1_opt_clks), | ||
| 498 | .main_clk = "mmchs1_fck", | ||
| 499 | @@ -2251,6 +2251,7 @@ static struct omap_hwmod_irq_info omap2430_mmc2_mpu_irqs[] = { | ||
| 500 | static struct omap_hwmod_dma_info omap2430_mmc2_sdma_reqs[] = { | ||
| 501 | { .name = "tx", .dma_req = 47 }, /* DMA_MMC2_TX */ | ||
| 502 | { .name = "rx", .dma_req = 48 }, /* DMA_MMC2_RX */ | ||
| 503 | + { .dma_req = -1 } | ||
| 504 | }; | ||
| 505 | |||
| 506 | static struct omap_hwmod_opt_clk omap2430_mmc2_opt_clks[] = { | ||
| 507 | @@ -2266,7 +2267,6 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { | ||
| 508 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 509 | .mpu_irqs = omap2430_mmc2_mpu_irqs, | ||
| 510 | .sdma_reqs = omap2430_mmc2_sdma_reqs, | ||
| 511 | - .sdma_reqs_cnt = ARRAY_SIZE(omap2430_mmc2_sdma_reqs), | ||
| 512 | .opt_clks = omap2430_mmc2_opt_clks, | ||
| 513 | .opt_clks_cnt = ARRAY_SIZE(omap2430_mmc2_opt_clks), | ||
| 514 | .main_clk = "mmchs2_fck", | ||
| 515 | diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 516 | index 6bac4bb..265f0b1 100644 | ||
| 517 | --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 518 | +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 519 | @@ -1213,6 +1213,7 @@ static struct omap_hwmod_class uart_class = { | ||
| 520 | static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | ||
| 521 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | ||
| 522 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | ||
| 523 | + { .dma_req = -1 } | ||
| 524 | }; | ||
| 525 | |||
| 526 | static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { | ||
| 527 | @@ -1223,7 +1224,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { | ||
| 528 | .name = "uart1", | ||
| 529 | .mpu_irqs = omap2_uart1_mpu_irqs, | ||
| 530 | .sdma_reqs = uart1_sdma_reqs, | ||
| 531 | - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), | ||
| 532 | .main_clk = "uart1_fck", | ||
| 533 | .prcm = { | ||
| 534 | .omap2 = { | ||
| 535 | @@ -1245,6 +1245,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { | ||
| 536 | static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | ||
| 537 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | ||
| 538 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | ||
| 539 | + { .dma_req = -1 } | ||
| 540 | }; | ||
| 541 | |||
| 542 | static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { | ||
| 543 | @@ -1255,7 +1256,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { | ||
| 544 | .name = "uart2", | ||
| 545 | .mpu_irqs = omap2_uart2_mpu_irqs, | ||
| 546 | .sdma_reqs = uart2_sdma_reqs, | ||
| 547 | - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), | ||
| 548 | .main_clk = "uart2_fck", | ||
| 549 | .prcm = { | ||
| 550 | .omap2 = { | ||
| 551 | @@ -1277,6 +1277,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { | ||
| 552 | static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | ||
| 553 | { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | ||
| 554 | { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | ||
| 555 | + { .dma_req = -1 } | ||
| 556 | }; | ||
| 557 | |||
| 558 | static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { | ||
| 559 | @@ -1287,7 +1288,6 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { | ||
| 560 | .name = "uart3", | ||
| 561 | .mpu_irqs = omap2_uart3_mpu_irqs, | ||
| 562 | .sdma_reqs = uart3_sdma_reqs, | ||
| 563 | - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), | ||
| 564 | .main_clk = "uart3_fck", | ||
| 565 | .prcm = { | ||
| 566 | .omap2 = { | ||
| 567 | @@ -1314,6 +1314,7 @@ static struct omap_hwmod_irq_info uart4_mpu_irqs[] = { | ||
| 568 | static struct omap_hwmod_dma_info uart4_sdma_reqs[] = { | ||
| 569 | { .name = "rx", .dma_req = OMAP36XX_DMA_UART4_RX, }, | ||
| 570 | { .name = "tx", .dma_req = OMAP36XX_DMA_UART4_TX, }, | ||
| 571 | + { .dma_req = -1 } | ||
| 572 | }; | ||
| 573 | |||
| 574 | static struct omap_hwmod_ocp_if *omap3xxx_uart4_slaves[] = { | ||
| 575 | @@ -1324,7 +1325,6 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { | ||
| 576 | .name = "uart4", | ||
| 577 | .mpu_irqs = uart4_mpu_irqs, | ||
| 578 | .sdma_reqs = uart4_sdma_reqs, | ||
| 579 | - .sdma_reqs_cnt = ARRAY_SIZE(uart4_sdma_reqs), | ||
| 580 | .main_clk = "uart4_fck", | ||
| 581 | .prcm = { | ||
| 582 | .omap2 = { | ||
| 583 | @@ -1367,6 +1367,7 @@ static struct omap_hwmod_class omap3xxx_dss_hwmod_class = { | ||
| 584 | static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { | ||
| 585 | { .name = "dispc", .dma_req = 5 }, | ||
| 586 | { .name = "dsi1", .dma_req = 74 }, | ||
| 587 | + { .dma_req = -1 } | ||
| 588 | }; | ||
| 589 | |||
| 590 | /* dss */ | ||
| 591 | @@ -1426,8 +1427,6 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { | ||
| 592 | .class = &omap3xxx_dss_hwmod_class, | ||
| 593 | .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ | ||
| 594 | .sdma_reqs = omap3xxx_dss_sdma_chs, | ||
| 595 | - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), | ||
| 596 | - | ||
| 597 | .prcm = { | ||
| 598 | .omap2 = { | ||
| 599 | .prcm_reg_id = 1, | ||
| 600 | @@ -1452,8 +1451,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { | ||
| 601 | .class = &omap3xxx_dss_hwmod_class, | ||
| 602 | .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ | ||
| 603 | .sdma_reqs = omap3xxx_dss_sdma_chs, | ||
| 604 | - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_dss_sdma_chs), | ||
| 605 | - | ||
| 606 | .prcm = { | ||
| 607 | .omap2 = { | ||
| 608 | .prcm_reg_id = 1, | ||
| 609 | @@ -1720,6 +1717,7 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { | ||
| 610 | static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | ||
| 611 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | ||
| 612 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | ||
| 613 | + { .dma_req = -1 } | ||
| 614 | }; | ||
| 615 | |||
| 616 | static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { | ||
| 617 | @@ -1730,7 +1728,6 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = { | ||
| 618 | .name = "i2c1", | ||
| 619 | .mpu_irqs = omap2_i2c1_mpu_irqs, | ||
| 620 | .sdma_reqs = i2c1_sdma_reqs, | ||
| 621 | - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), | ||
| 622 | .main_clk = "i2c1_fck", | ||
| 623 | .prcm = { | ||
| 624 | .omap2 = { | ||
| 625 | @@ -1757,6 +1754,7 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { | ||
| 626 | static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | ||
| 627 | { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | ||
| 628 | { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | ||
| 629 | + { .dma_req = -1 } | ||
| 630 | }; | ||
| 631 | |||
| 632 | static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { | ||
| 633 | @@ -1767,7 +1765,6 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = { | ||
| 634 | .name = "i2c2", | ||
| 635 | .mpu_irqs = omap2_i2c2_mpu_irqs, | ||
| 636 | .sdma_reqs = i2c2_sdma_reqs, | ||
| 637 | - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), | ||
| 638 | .main_clk = "i2c2_fck", | ||
| 639 | .prcm = { | ||
| 640 | .omap2 = { | ||
| 641 | @@ -1799,6 +1796,7 @@ static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { | ||
| 642 | static struct omap_hwmod_dma_info i2c3_sdma_reqs[] = { | ||
| 643 | { .name = "tx", .dma_req = OMAP34XX_DMA_I2C3_TX }, | ||
| 644 | { .name = "rx", .dma_req = OMAP34XX_DMA_I2C3_RX }, | ||
| 645 | + { .dma_req = -1 } | ||
| 646 | }; | ||
| 647 | |||
| 648 | static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { | ||
| 649 | @@ -1809,7 +1807,6 @@ static struct omap_hwmod omap3xxx_i2c3_hwmod = { | ||
| 650 | .name = "i2c3", | ||
| 651 | .mpu_irqs = i2c3_mpu_irqs, | ||
| 652 | .sdma_reqs = i2c3_sdma_reqs, | ||
| 653 | - .sdma_reqs_cnt = ARRAY_SIZE(i2c3_sdma_reqs), | ||
| 654 | .main_clk = "i2c3_fck", | ||
| 655 | .prcm = { | ||
| 656 | .omap2 = { | ||
| 657 | @@ -2275,6 +2272,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { | ||
| 658 | static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { | ||
| 659 | { .name = "rx", .dma_req = 32 }, | ||
| 660 | { .name = "tx", .dma_req = 31 }, | ||
| 661 | + { .dma_req = -1 } | ||
| 662 | }; | ||
| 663 | |||
| 664 | static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { | ||
| 665 | @@ -2306,7 +2304,6 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { | ||
| 666 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 667 | .mpu_irqs = omap3xxx_mcbsp1_irqs, | ||
| 668 | .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, | ||
| 669 | - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp1_sdma_chs), | ||
| 670 | .main_clk = "mcbsp1_fck", | ||
| 671 | .prcm = { | ||
| 672 | .omap2 = { | ||
| 673 | @@ -2333,6 +2330,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { | ||
| 674 | static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { | ||
| 675 | { .name = "rx", .dma_req = 34 }, | ||
| 676 | { .name = "tx", .dma_req = 33 }, | ||
| 677 | + { .dma_req = -1 } | ||
| 678 | }; | ||
| 679 | |||
| 680 | static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { | ||
| 681 | @@ -2369,7 +2367,6 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { | ||
| 682 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 683 | .mpu_irqs = omap3xxx_mcbsp2_irqs, | ||
| 684 | .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, | ||
| 685 | - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp2_sdma_chs), | ||
| 686 | .main_clk = "mcbsp2_fck", | ||
| 687 | .prcm = { | ||
| 688 | .omap2 = { | ||
| 689 | @@ -2397,6 +2394,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { | ||
| 690 | static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { | ||
| 691 | { .name = "rx", .dma_req = 18 }, | ||
| 692 | { .name = "tx", .dma_req = 17 }, | ||
| 693 | + { .dma_req = -1 } | ||
| 694 | }; | ||
| 695 | |||
| 696 | static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { | ||
| 697 | @@ -2432,7 +2430,6 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { | ||
| 698 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 699 | .mpu_irqs = omap3xxx_mcbsp3_irqs, | ||
| 700 | .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, | ||
| 701 | - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp3_sdma_chs), | ||
| 702 | .main_clk = "mcbsp3_fck", | ||
| 703 | .prcm = { | ||
| 704 | .omap2 = { | ||
| 705 | @@ -2460,6 +2457,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp4_irqs[] = { | ||
| 706 | static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = { | ||
| 707 | { .name = "rx", .dma_req = 20 }, | ||
| 708 | { .name = "tx", .dma_req = 19 }, | ||
| 709 | + { .dma_req = -1 } | ||
| 710 | }; | ||
| 711 | |||
| 712 | static struct omap_hwmod_addr_space omap3xxx_mcbsp4_addrs[] = { | ||
| 713 | @@ -2491,7 +2489,6 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod = { | ||
| 714 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 715 | .mpu_irqs = omap3xxx_mcbsp4_irqs, | ||
| 716 | .sdma_reqs = omap3xxx_mcbsp4_sdma_chs, | ||
| 717 | - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp4_sdma_chs), | ||
| 718 | .main_clk = "mcbsp4_fck", | ||
| 719 | .prcm = { | ||
| 720 | .omap2 = { | ||
| 721 | @@ -2518,6 +2515,7 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = { | ||
| 722 | static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = { | ||
| 723 | { .name = "rx", .dma_req = 22 }, | ||
| 724 | { .name = "tx", .dma_req = 21 }, | ||
| 725 | + { .dma_req = -1 } | ||
| 726 | }; | ||
| 727 | |||
| 728 | static struct omap_hwmod_addr_space omap3xxx_mcbsp5_addrs[] = { | ||
| 729 | @@ -2549,7 +2547,6 @@ static struct omap_hwmod omap3xxx_mcbsp5_hwmod = { | ||
| 730 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 731 | .mpu_irqs = omap3xxx_mcbsp5_irqs, | ||
| 732 | .sdma_reqs = omap3xxx_mcbsp5_sdma_chs, | ||
| 733 | - .sdma_reqs_cnt = ARRAY_SIZE(omap3xxx_mcbsp5_sdma_chs), | ||
| 734 | .main_clk = "mcbsp5_fck", | ||
| 735 | .prcm = { | ||
| 736 | .omap2 = { | ||
| 737 | @@ -2951,6 +2948,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { | ||
| 738 | { .name = "rx2", .dma_req = 40 }, | ||
| 739 | { .name = "tx3", .dma_req = 41 }, | ||
| 740 | { .name = "rx3", .dma_req = 42 }, | ||
| 741 | + { .dma_req = -1 } | ||
| 742 | }; | ||
| 743 | |||
| 744 | static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = { | ||
| 745 | @@ -2965,7 +2963,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { | ||
| 746 | .name = "mcspi1", | ||
| 747 | .mpu_irqs = omap2_mcspi1_mpu_irqs, | ||
| 748 | .sdma_reqs = omap34xx_mcspi1_sdma_reqs, | ||
| 749 | - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi1_sdma_reqs), | ||
| 750 | .main_clk = "mcspi1_fck", | ||
| 751 | .prcm = { | ||
| 752 | .omap2 = { | ||
| 753 | @@ -2989,6 +2986,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { | ||
| 754 | { .name = "rx0", .dma_req = 44 }, | ||
| 755 | { .name = "tx1", .dma_req = 45 }, | ||
| 756 | { .name = "rx1", .dma_req = 46 }, | ||
| 757 | + { .dma_req = -1 } | ||
| 758 | }; | ||
| 759 | |||
| 760 | static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = { | ||
| 761 | @@ -3003,7 +3001,6 @@ static struct omap_hwmod omap34xx_mcspi2 = { | ||
| 762 | .name = "mcspi2", | ||
| 763 | .mpu_irqs = omap2_mcspi2_mpu_irqs, | ||
| 764 | .sdma_reqs = omap34xx_mcspi2_sdma_reqs, | ||
| 765 | - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi2_sdma_reqs), | ||
| 766 | .main_clk = "mcspi2_fck", | ||
| 767 | .prcm = { | ||
| 768 | .omap2 = { | ||
| 769 | @@ -3032,6 +3029,7 @@ static struct omap_hwmod_dma_info omap34xx_mcspi3_sdma_reqs[] = { | ||
| 770 | { .name = "rx0", .dma_req = 16 }, | ||
| 771 | { .name = "tx1", .dma_req = 23 }, | ||
| 772 | { .name = "rx1", .dma_req = 24 }, | ||
| 773 | + { .dma_req = -1 } | ||
| 774 | }; | ||
| 775 | |||
| 776 | static struct omap_hwmod_ocp_if *omap34xx_mcspi3_slaves[] = { | ||
| 777 | @@ -3046,7 +3044,6 @@ static struct omap_hwmod omap34xx_mcspi3 = { | ||
| 778 | .name = "mcspi3", | ||
| 779 | .mpu_irqs = omap34xx_mcspi3_mpu_irqs, | ||
| 780 | .sdma_reqs = omap34xx_mcspi3_sdma_reqs, | ||
| 781 | - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi3_sdma_reqs), | ||
| 782 | .main_clk = "mcspi3_fck", | ||
| 783 | .prcm = { | ||
| 784 | .omap2 = { | ||
| 785 | @@ -3073,6 +3070,7 @@ static struct omap_hwmod_irq_info omap34xx_mcspi4_mpu_irqs[] = { | ||
| 786 | static struct omap_hwmod_dma_info omap34xx_mcspi4_sdma_reqs[] = { | ||
| 787 | { .name = "tx0", .dma_req = 70 }, /* DMA_SPI4_TX0 */ | ||
| 788 | { .name = "rx0", .dma_req = 71 }, /* DMA_SPI4_RX0 */ | ||
| 789 | + { .dma_req = -1 } | ||
| 790 | }; | ||
| 791 | |||
| 792 | static struct omap_hwmod_ocp_if *omap34xx_mcspi4_slaves[] = { | ||
| 793 | @@ -3087,7 +3085,6 @@ static struct omap_hwmod omap34xx_mcspi4 = { | ||
| 794 | .name = "mcspi4", | ||
| 795 | .mpu_irqs = omap34xx_mcspi4_mpu_irqs, | ||
| 796 | .sdma_reqs = omap34xx_mcspi4_sdma_reqs, | ||
| 797 | - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mcspi4_sdma_reqs), | ||
| 798 | .main_clk = "mcspi4_fck", | ||
| 799 | .prcm = { | ||
| 800 | .omap2 = { | ||
| 801 | @@ -3218,6 +3215,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc1_mpu_irqs[] = { | ||
| 802 | static struct omap_hwmod_dma_info omap34xx_mmc1_sdma_reqs[] = { | ||
| 803 | { .name = "tx", .dma_req = 61, }, | ||
| 804 | { .name = "rx", .dma_req = 62, }, | ||
| 805 | + { .dma_req = -1 } | ||
| 806 | }; | ||
| 807 | |||
| 808 | static struct omap_hwmod_opt_clk omap34xx_mmc1_opt_clks[] = { | ||
| 809 | @@ -3236,7 +3234,6 @@ static struct omap_hwmod omap3xxx_mmc1_hwmod = { | ||
| 810 | .name = "mmc1", | ||
| 811 | .mpu_irqs = omap34xx_mmc1_mpu_irqs, | ||
| 812 | .sdma_reqs = omap34xx_mmc1_sdma_reqs, | ||
| 813 | - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc1_sdma_reqs), | ||
| 814 | .opt_clks = omap34xx_mmc1_opt_clks, | ||
| 815 | .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks), | ||
| 816 | .main_clk = "mmchs1_fck", | ||
| 817 | @@ -3266,6 +3263,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc2_mpu_irqs[] = { | ||
| 818 | static struct omap_hwmod_dma_info omap34xx_mmc2_sdma_reqs[] = { | ||
| 819 | { .name = "tx", .dma_req = 47, }, | ||
| 820 | { .name = "rx", .dma_req = 48, }, | ||
| 821 | + { .dma_req = -1 } | ||
| 822 | }; | ||
| 823 | |||
| 824 | static struct omap_hwmod_opt_clk omap34xx_mmc2_opt_clks[] = { | ||
| 825 | @@ -3280,7 +3278,6 @@ static struct omap_hwmod omap3xxx_mmc2_hwmod = { | ||
| 826 | .name = "mmc2", | ||
| 827 | .mpu_irqs = omap34xx_mmc2_mpu_irqs, | ||
| 828 | .sdma_reqs = omap34xx_mmc2_sdma_reqs, | ||
| 829 | - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc2_sdma_reqs), | ||
| 830 | .opt_clks = omap34xx_mmc2_opt_clks, | ||
| 831 | .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks), | ||
| 832 | .main_clk = "mmchs2_fck", | ||
| 833 | @@ -3309,6 +3306,7 @@ static struct omap_hwmod_irq_info omap34xx_mmc3_mpu_irqs[] = { | ||
| 834 | static struct omap_hwmod_dma_info omap34xx_mmc3_sdma_reqs[] = { | ||
| 835 | { .name = "tx", .dma_req = 77, }, | ||
| 836 | { .name = "rx", .dma_req = 78, }, | ||
| 837 | + { .dma_req = -1 } | ||
| 838 | }; | ||
| 839 | |||
| 840 | static struct omap_hwmod_opt_clk omap34xx_mmc3_opt_clks[] = { | ||
| 841 | @@ -3323,7 +3321,6 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = { | ||
| 842 | .name = "mmc3", | ||
| 843 | .mpu_irqs = omap34xx_mmc3_mpu_irqs, | ||
| 844 | .sdma_reqs = omap34xx_mmc3_sdma_reqs, | ||
| 845 | - .sdma_reqs_cnt = ARRAY_SIZE(omap34xx_mmc3_sdma_reqs), | ||
| 846 | .opt_clks = omap34xx_mmc3_opt_clks, | ||
| 847 | .opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc3_opt_clks), | ||
| 848 | .main_clk = "mmchs3_fck", | ||
| 849 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 850 | index f7ff937..316e922 100644 | ||
| 851 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 852 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 853 | @@ -685,6 +685,7 @@ static struct omap_hwmod_dma_info omap44xx_aess_sdma_reqs[] = { | ||
| 854 | { .name = "fifo5", .dma_req = 105 + OMAP44XX_DMA_REQ_START }, | ||
| 855 | { .name = "fifo6", .dma_req = 106 + OMAP44XX_DMA_REQ_START }, | ||
| 856 | { .name = "fifo7", .dma_req = 107 + OMAP44XX_DMA_REQ_START }, | ||
| 857 | + { .dma_req = -1 } | ||
| 858 | }; | ||
| 859 | |||
| 860 | /* aess master ports */ | ||
| 861 | @@ -739,7 +740,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = { | ||
| 862 | .class = &omap44xx_aess_hwmod_class, | ||
| 863 | .mpu_irqs = omap44xx_aess_irqs, | ||
| 864 | .sdma_reqs = omap44xx_aess_sdma_reqs, | ||
| 865 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_aess_sdma_reqs), | ||
| 866 | .main_clk = "aess_fck", | ||
| 867 | .prcm = { | ||
| 868 | .omap4 = { | ||
| 869 | @@ -954,6 +954,7 @@ static struct omap_hwmod_irq_info omap44xx_dmic_irqs[] = { | ||
| 870 | |||
| 871 | static struct omap_hwmod_dma_info omap44xx_dmic_sdma_reqs[] = { | ||
| 872 | { .dma_req = 66 + OMAP44XX_DMA_REQ_START }, | ||
| 873 | + { .dma_req = -1 } | ||
| 874 | }; | ||
| 875 | |||
| 876 | static struct omap_hwmod_addr_space omap44xx_dmic_addrs[] = { | ||
| 877 | @@ -1003,7 +1004,6 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { | ||
| 878 | .class = &omap44xx_dmic_hwmod_class, | ||
| 879 | .mpu_irqs = omap44xx_dmic_irqs, | ||
| 880 | .sdma_reqs = omap44xx_dmic_sdma_reqs, | ||
| 881 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dmic_sdma_reqs), | ||
| 882 | .main_clk = "dmic_fck", | ||
| 883 | .prcm = { | ||
| 884 | .omap4 = { | ||
| 885 | @@ -1221,6 +1221,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dispc_irqs[] = { | ||
| 886 | |||
| 887 | static struct omap_hwmod_dma_info omap44xx_dss_dispc_sdma_reqs[] = { | ||
| 888 | { .dma_req = 5 + OMAP44XX_DMA_REQ_START }, | ||
| 889 | + { .dma_req = -1 } | ||
| 890 | }; | ||
| 891 | |||
| 892 | static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { | ||
| 893 | @@ -1270,7 +1271,6 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | ||
| 894 | .class = &omap44xx_dispc_hwmod_class, | ||
| 895 | .mpu_irqs = omap44xx_dss_dispc_irqs, | ||
| 896 | .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, | ||
| 897 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dispc_sdma_reqs), | ||
| 898 | .main_clk = "dss_fck", | ||
| 899 | .prcm = { | ||
| 900 | .omap4 = { | ||
| 901 | @@ -1312,6 +1312,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dsi1_irqs[] = { | ||
| 902 | |||
| 903 | static struct omap_hwmod_dma_info omap44xx_dss_dsi1_sdma_reqs[] = { | ||
| 904 | { .dma_req = 74 + OMAP44XX_DMA_REQ_START }, | ||
| 905 | + { .dma_req = -1 } | ||
| 906 | }; | ||
| 907 | |||
| 908 | static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { | ||
| 909 | @@ -1361,7 +1362,6 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | ||
| 910 | .class = &omap44xx_dsi_hwmod_class, | ||
| 911 | .mpu_irqs = omap44xx_dss_dsi1_irqs, | ||
| 912 | .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, | ||
| 913 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_sdma_reqs), | ||
| 914 | .main_clk = "dss_fck", | ||
| 915 | .prcm = { | ||
| 916 | .omap4 = { | ||
| 917 | @@ -1382,6 +1382,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_dsi2_irqs[] = { | ||
| 918 | |||
| 919 | static struct omap_hwmod_dma_info omap44xx_dss_dsi2_sdma_reqs[] = { | ||
| 920 | { .dma_req = 83 + OMAP44XX_DMA_REQ_START }, | ||
| 921 | + { .dma_req = -1 } | ||
| 922 | }; | ||
| 923 | |||
| 924 | static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { | ||
| 925 | @@ -1431,7 +1432,6 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { | ||
| 926 | .class = &omap44xx_dsi_hwmod_class, | ||
| 927 | .mpu_irqs = omap44xx_dss_dsi2_irqs, | ||
| 928 | .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, | ||
| 929 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_sdma_reqs), | ||
| 930 | .main_clk = "dss_fck", | ||
| 931 | .prcm = { | ||
| 932 | .omap4 = { | ||
| 933 | @@ -1472,6 +1472,7 @@ static struct omap_hwmod_irq_info omap44xx_dss_hdmi_irqs[] = { | ||
| 934 | |||
| 935 | static struct omap_hwmod_dma_info omap44xx_dss_hdmi_sdma_reqs[] = { | ||
| 936 | { .dma_req = 75 + OMAP44XX_DMA_REQ_START }, | ||
| 937 | + { .dma_req = -1 } | ||
| 938 | }; | ||
| 939 | |||
| 940 | static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { | ||
| 941 | @@ -1521,7 +1522,6 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | ||
| 942 | .class = &omap44xx_hdmi_hwmod_class, | ||
| 943 | .mpu_irqs = omap44xx_dss_hdmi_irqs, | ||
| 944 | .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, | ||
| 945 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_sdma_reqs), | ||
| 946 | .main_clk = "dss_fck", | ||
| 947 | .prcm = { | ||
| 948 | .omap4 = { | ||
| 949 | @@ -1557,6 +1557,7 @@ static struct omap_hwmod_class omap44xx_rfbi_hwmod_class = { | ||
| 950 | static struct omap_hwmod omap44xx_dss_rfbi_hwmod; | ||
| 951 | static struct omap_hwmod_dma_info omap44xx_dss_rfbi_sdma_reqs[] = { | ||
| 952 | { .dma_req = 13 + OMAP44XX_DMA_REQ_START }, | ||
| 953 | + { .dma_req = -1 } | ||
| 954 | }; | ||
| 955 | |||
| 956 | static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { | ||
| 957 | @@ -1605,7 +1606,6 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { | ||
| 958 | .name = "dss_rfbi", | ||
| 959 | .class = &omap44xx_rfbi_hwmod_class, | ||
| 960 | .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, | ||
| 961 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_sdma_reqs), | ||
| 962 | .main_clk = "dss_fck", | ||
| 963 | .prcm = { | ||
| 964 | .omap4 = { | ||
| 965 | @@ -2138,6 +2138,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { | ||
| 966 | static struct omap_hwmod_dma_info omap44xx_i2c1_sdma_reqs[] = { | ||
| 967 | { .name = "tx", .dma_req = 26 + OMAP44XX_DMA_REQ_START }, | ||
| 968 | { .name = "rx", .dma_req = 27 + OMAP44XX_DMA_REQ_START }, | ||
| 969 | + { .dma_req = -1 } | ||
| 970 | }; | ||
| 971 | |||
| 972 | static struct omap_hwmod_addr_space omap44xx_i2c1_addrs[] = { | ||
| 973 | @@ -2169,7 +2170,6 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { | ||
| 974 | .flags = HWMOD_INIT_NO_RESET, | ||
| 975 | .mpu_irqs = omap44xx_i2c1_irqs, | ||
| 976 | .sdma_reqs = omap44xx_i2c1_sdma_reqs, | ||
| 977 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c1_sdma_reqs), | ||
| 978 | .main_clk = "i2c1_fck", | ||
| 979 | .prcm = { | ||
| 980 | .omap4 = { | ||
| 981 | @@ -2191,6 +2191,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c2_irqs[] = { | ||
| 982 | static struct omap_hwmod_dma_info omap44xx_i2c2_sdma_reqs[] = { | ||
| 983 | { .name = "tx", .dma_req = 28 + OMAP44XX_DMA_REQ_START }, | ||
| 984 | { .name = "rx", .dma_req = 29 + OMAP44XX_DMA_REQ_START }, | ||
| 985 | + { .dma_req = -1 } | ||
| 986 | }; | ||
| 987 | |||
| 988 | static struct omap_hwmod_addr_space omap44xx_i2c2_addrs[] = { | ||
| 989 | @@ -2222,7 +2223,6 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { | ||
| 990 | .flags = HWMOD_INIT_NO_RESET, | ||
| 991 | .mpu_irqs = omap44xx_i2c2_irqs, | ||
| 992 | .sdma_reqs = omap44xx_i2c2_sdma_reqs, | ||
| 993 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c2_sdma_reqs), | ||
| 994 | .main_clk = "i2c2_fck", | ||
| 995 | .prcm = { | ||
| 996 | .omap4 = { | ||
| 997 | @@ -2244,6 +2244,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c3_irqs[] = { | ||
| 998 | static struct omap_hwmod_dma_info omap44xx_i2c3_sdma_reqs[] = { | ||
| 999 | { .name = "tx", .dma_req = 24 + OMAP44XX_DMA_REQ_START }, | ||
| 1000 | { .name = "rx", .dma_req = 25 + OMAP44XX_DMA_REQ_START }, | ||
| 1001 | + { .dma_req = -1 } | ||
| 1002 | }; | ||
| 1003 | |||
| 1004 | static struct omap_hwmod_addr_space omap44xx_i2c3_addrs[] = { | ||
| 1005 | @@ -2275,7 +2276,6 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { | ||
| 1006 | .flags = HWMOD_INIT_NO_RESET, | ||
| 1007 | .mpu_irqs = omap44xx_i2c3_irqs, | ||
| 1008 | .sdma_reqs = omap44xx_i2c3_sdma_reqs, | ||
| 1009 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c3_sdma_reqs), | ||
| 1010 | .main_clk = "i2c3_fck", | ||
| 1011 | .prcm = { | ||
| 1012 | .omap4 = { | ||
| 1013 | @@ -2297,6 +2297,7 @@ static struct omap_hwmod_irq_info omap44xx_i2c4_irqs[] = { | ||
| 1014 | static struct omap_hwmod_dma_info omap44xx_i2c4_sdma_reqs[] = { | ||
| 1015 | { .name = "tx", .dma_req = 123 + OMAP44XX_DMA_REQ_START }, | ||
| 1016 | { .name = "rx", .dma_req = 124 + OMAP44XX_DMA_REQ_START }, | ||
| 1017 | + { .dma_req = -1 } | ||
| 1018 | }; | ||
| 1019 | |||
| 1020 | static struct omap_hwmod_addr_space omap44xx_i2c4_addrs[] = { | ||
| 1021 | @@ -2328,7 +2329,6 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { | ||
| 1022 | .flags = HWMOD_INIT_NO_RESET, | ||
| 1023 | .mpu_irqs = omap44xx_i2c4_irqs, | ||
| 1024 | .sdma_reqs = omap44xx_i2c4_sdma_reqs, | ||
| 1025 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_i2c4_sdma_reqs), | ||
| 1026 | .main_clk = "i2c4_fck", | ||
| 1027 | .prcm = { | ||
| 1028 | .omap4 = { | ||
| 1029 | @@ -2467,6 +2467,7 @@ static struct omap_hwmod_dma_info omap44xx_iss_sdma_reqs[] = { | ||
| 1030 | { .name = "2", .dma_req = 9 + OMAP44XX_DMA_REQ_START }, | ||
| 1031 | { .name = "3", .dma_req = 11 + OMAP44XX_DMA_REQ_START }, | ||
| 1032 | { .name = "4", .dma_req = 12 + OMAP44XX_DMA_REQ_START }, | ||
| 1033 | + { .dma_req = -1 } | ||
| 1034 | }; | ||
| 1035 | |||
| 1036 | /* iss master ports */ | ||
| 1037 | @@ -2506,7 +2507,6 @@ static struct omap_hwmod omap44xx_iss_hwmod = { | ||
| 1038 | .class = &omap44xx_iss_hwmod_class, | ||
| 1039 | .mpu_irqs = omap44xx_iss_irqs, | ||
| 1040 | .sdma_reqs = omap44xx_iss_sdma_reqs, | ||
| 1041 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_iss_sdma_reqs), | ||
| 1042 | .main_clk = "iss_fck", | ||
| 1043 | .prcm = { | ||
| 1044 | .omap4 = { | ||
| 1045 | @@ -2791,6 +2791,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp1_irqs[] = { | ||
| 1046 | static struct omap_hwmod_dma_info omap44xx_mcbsp1_sdma_reqs[] = { | ||
| 1047 | { .name = "tx", .dma_req = 32 + OMAP44XX_DMA_REQ_START }, | ||
| 1048 | { .name = "rx", .dma_req = 33 + OMAP44XX_DMA_REQ_START }, | ||
| 1049 | + { .dma_req = -1 } | ||
| 1050 | }; | ||
| 1051 | |||
| 1052 | static struct omap_hwmod_addr_space omap44xx_mcbsp1_addrs[] = { | ||
| 1053 | @@ -2842,7 +2843,6 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { | ||
| 1054 | .class = &omap44xx_mcbsp_hwmod_class, | ||
| 1055 | .mpu_irqs = omap44xx_mcbsp1_irqs, | ||
| 1056 | .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, | ||
| 1057 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp1_sdma_reqs), | ||
| 1058 | .main_clk = "mcbsp1_fck", | ||
| 1059 | .prcm = { | ||
| 1060 | .omap4 = { | ||
| 1061 | @@ -2864,6 +2864,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp2_irqs[] = { | ||
| 1062 | static struct omap_hwmod_dma_info omap44xx_mcbsp2_sdma_reqs[] = { | ||
| 1063 | { .name = "tx", .dma_req = 16 + OMAP44XX_DMA_REQ_START }, | ||
| 1064 | { .name = "rx", .dma_req = 17 + OMAP44XX_DMA_REQ_START }, | ||
| 1065 | + { .dma_req = -1 } | ||
| 1066 | }; | ||
| 1067 | |||
| 1068 | static struct omap_hwmod_addr_space omap44xx_mcbsp2_addrs[] = { | ||
| 1069 | @@ -2915,7 +2916,6 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { | ||
| 1070 | .class = &omap44xx_mcbsp_hwmod_class, | ||
| 1071 | .mpu_irqs = omap44xx_mcbsp2_irqs, | ||
| 1072 | .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, | ||
| 1073 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp2_sdma_reqs), | ||
| 1074 | .main_clk = "mcbsp2_fck", | ||
| 1075 | .prcm = { | ||
| 1076 | .omap4 = { | ||
| 1077 | @@ -2937,6 +2937,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp3_irqs[] = { | ||
| 1078 | static struct omap_hwmod_dma_info omap44xx_mcbsp3_sdma_reqs[] = { | ||
| 1079 | { .name = "tx", .dma_req = 18 + OMAP44XX_DMA_REQ_START }, | ||
| 1080 | { .name = "rx", .dma_req = 19 + OMAP44XX_DMA_REQ_START }, | ||
| 1081 | + { .dma_req = -1 } | ||
| 1082 | }; | ||
| 1083 | |||
| 1084 | static struct omap_hwmod_addr_space omap44xx_mcbsp3_addrs[] = { | ||
| 1085 | @@ -2988,7 +2989,6 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { | ||
| 1086 | .class = &omap44xx_mcbsp_hwmod_class, | ||
| 1087 | .mpu_irqs = omap44xx_mcbsp3_irqs, | ||
| 1088 | .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, | ||
| 1089 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp3_sdma_reqs), | ||
| 1090 | .main_clk = "mcbsp3_fck", | ||
| 1091 | .prcm = { | ||
| 1092 | .omap4 = { | ||
| 1093 | @@ -3010,6 +3010,7 @@ static struct omap_hwmod_irq_info omap44xx_mcbsp4_irqs[] = { | ||
| 1094 | static struct omap_hwmod_dma_info omap44xx_mcbsp4_sdma_reqs[] = { | ||
| 1095 | { .name = "tx", .dma_req = 30 + OMAP44XX_DMA_REQ_START }, | ||
| 1096 | { .name = "rx", .dma_req = 31 + OMAP44XX_DMA_REQ_START }, | ||
| 1097 | + { .dma_req = -1 } | ||
| 1098 | }; | ||
| 1099 | |||
| 1100 | static struct omap_hwmod_addr_space omap44xx_mcbsp4_addrs[] = { | ||
| 1101 | @@ -3040,7 +3041,6 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { | ||
| 1102 | .class = &omap44xx_mcbsp_hwmod_class, | ||
| 1103 | .mpu_irqs = omap44xx_mcbsp4_irqs, | ||
| 1104 | .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, | ||
| 1105 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcbsp4_sdma_reqs), | ||
| 1106 | .main_clk = "mcbsp4_fck", | ||
| 1107 | .prcm = { | ||
| 1108 | .omap4 = { | ||
| 1109 | @@ -3083,6 +3083,7 @@ static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = { | ||
| 1110 | static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = { | ||
| 1111 | { .name = "up_link", .dma_req = 64 + OMAP44XX_DMA_REQ_START }, | ||
| 1112 | { .name = "dn_link", .dma_req = 65 + OMAP44XX_DMA_REQ_START }, | ||
| 1113 | + { .dma_req = -1 } | ||
| 1114 | }; | ||
| 1115 | |||
| 1116 | static struct omap_hwmod_addr_space omap44xx_mcpdm_addrs[] = { | ||
| 1117 | @@ -3132,7 +3133,6 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { | ||
| 1118 | .class = &omap44xx_mcpdm_hwmod_class, | ||
| 1119 | .mpu_irqs = omap44xx_mcpdm_irqs, | ||
| 1120 | .sdma_reqs = omap44xx_mcpdm_sdma_reqs, | ||
| 1121 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcpdm_sdma_reqs), | ||
| 1122 | .main_clk = "mcpdm_fck", | ||
| 1123 | .prcm = { | ||
| 1124 | .omap4 = { | ||
| 1125 | @@ -3182,6 +3182,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = { | ||
| 1126 | { .name = "rx2", .dma_req = 39 + OMAP44XX_DMA_REQ_START }, | ||
| 1127 | { .name = "tx3", .dma_req = 40 + OMAP44XX_DMA_REQ_START }, | ||
| 1128 | { .name = "rx3", .dma_req = 41 + OMAP44XX_DMA_REQ_START }, | ||
| 1129 | + { .dma_req = -1 } | ||
| 1130 | }; | ||
| 1131 | |||
| 1132 | static struct omap_hwmod_addr_space omap44xx_mcspi1_addrs[] = { | ||
| 1133 | @@ -3217,7 +3218,6 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { | ||
| 1134 | .class = &omap44xx_mcspi_hwmod_class, | ||
| 1135 | .mpu_irqs = omap44xx_mcspi1_irqs, | ||
| 1136 | .sdma_reqs = omap44xx_mcspi1_sdma_reqs, | ||
| 1137 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi1_sdma_reqs), | ||
| 1138 | .main_clk = "mcspi1_fck", | ||
| 1139 | .prcm = { | ||
| 1140 | .omap4 = { | ||
| 1141 | @@ -3242,6 +3242,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi2_sdma_reqs[] = { | ||
| 1142 | { .name = "rx0", .dma_req = 43 + OMAP44XX_DMA_REQ_START }, | ||
| 1143 | { .name = "tx1", .dma_req = 44 + OMAP44XX_DMA_REQ_START }, | ||
| 1144 | { .name = "rx1", .dma_req = 45 + OMAP44XX_DMA_REQ_START }, | ||
| 1145 | + { .dma_req = -1 } | ||
| 1146 | }; | ||
| 1147 | |||
| 1148 | static struct omap_hwmod_addr_space omap44xx_mcspi2_addrs[] = { | ||
| 1149 | @@ -3277,7 +3278,6 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { | ||
| 1150 | .class = &omap44xx_mcspi_hwmod_class, | ||
| 1151 | .mpu_irqs = omap44xx_mcspi2_irqs, | ||
| 1152 | .sdma_reqs = omap44xx_mcspi2_sdma_reqs, | ||
| 1153 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi2_sdma_reqs), | ||
| 1154 | .main_clk = "mcspi2_fck", | ||
| 1155 | .prcm = { | ||
| 1156 | .omap4 = { | ||
| 1157 | @@ -3302,6 +3302,7 @@ static struct omap_hwmod_dma_info omap44xx_mcspi3_sdma_reqs[] = { | ||
| 1158 | { .name = "rx0", .dma_req = 15 + OMAP44XX_DMA_REQ_START }, | ||
| 1159 | { .name = "tx1", .dma_req = 22 + OMAP44XX_DMA_REQ_START }, | ||
| 1160 | { .name = "rx1", .dma_req = 23 + OMAP44XX_DMA_REQ_START }, | ||
| 1161 | + { .dma_req = -1 } | ||
| 1162 | }; | ||
| 1163 | |||
| 1164 | static struct omap_hwmod_addr_space omap44xx_mcspi3_addrs[] = { | ||
| 1165 | @@ -3337,7 +3338,6 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { | ||
| 1166 | .class = &omap44xx_mcspi_hwmod_class, | ||
| 1167 | .mpu_irqs = omap44xx_mcspi3_irqs, | ||
| 1168 | .sdma_reqs = omap44xx_mcspi3_sdma_reqs, | ||
| 1169 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi3_sdma_reqs), | ||
| 1170 | .main_clk = "mcspi3_fck", | ||
| 1171 | .prcm = { | ||
| 1172 | .omap4 = { | ||
| 1173 | @@ -3360,6 +3360,7 @@ static struct omap_hwmod_irq_info omap44xx_mcspi4_irqs[] = { | ||
| 1174 | static struct omap_hwmod_dma_info omap44xx_mcspi4_sdma_reqs[] = { | ||
| 1175 | { .name = "tx0", .dma_req = 69 + OMAP44XX_DMA_REQ_START }, | ||
| 1176 | { .name = "rx0", .dma_req = 70 + OMAP44XX_DMA_REQ_START }, | ||
| 1177 | + { .dma_req = -1 } | ||
| 1178 | }; | ||
| 1179 | |||
| 1180 | static struct omap_hwmod_addr_space omap44xx_mcspi4_addrs[] = { | ||
| 1181 | @@ -3395,7 +3396,6 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { | ||
| 1182 | .class = &omap44xx_mcspi_hwmod_class, | ||
| 1183 | .mpu_irqs = omap44xx_mcspi4_irqs, | ||
| 1184 | .sdma_reqs = omap44xx_mcspi4_sdma_reqs, | ||
| 1185 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mcspi4_sdma_reqs), | ||
| 1186 | .main_clk = "mcspi4_fck", | ||
| 1187 | .prcm = { | ||
| 1188 | .omap4 = { | ||
| 1189 | @@ -3440,6 +3440,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { | ||
| 1190 | static struct omap_hwmod_dma_info omap44xx_mmc1_sdma_reqs[] = { | ||
| 1191 | { .name = "tx", .dma_req = 60 + OMAP44XX_DMA_REQ_START }, | ||
| 1192 | { .name = "rx", .dma_req = 61 + OMAP44XX_DMA_REQ_START }, | ||
| 1193 | + { .dma_req = -1 } | ||
| 1194 | }; | ||
| 1195 | |||
| 1196 | /* mmc1 master ports */ | ||
| 1197 | @@ -3480,7 +3481,6 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { | ||
| 1198 | .class = &omap44xx_mmc_hwmod_class, | ||
| 1199 | .mpu_irqs = omap44xx_mmc1_irqs, | ||
| 1200 | .sdma_reqs = omap44xx_mmc1_sdma_reqs, | ||
| 1201 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc1_sdma_reqs), | ||
| 1202 | .main_clk = "mmc1_fck", | ||
| 1203 | .prcm = { | ||
| 1204 | .omap4 = { | ||
| 1205 | @@ -3504,6 +3504,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc2_irqs[] = { | ||
| 1206 | static struct omap_hwmod_dma_info omap44xx_mmc2_sdma_reqs[] = { | ||
| 1207 | { .name = "tx", .dma_req = 46 + OMAP44XX_DMA_REQ_START }, | ||
| 1208 | { .name = "rx", .dma_req = 47 + OMAP44XX_DMA_REQ_START }, | ||
| 1209 | + { .dma_req = -1 } | ||
| 1210 | }; | ||
| 1211 | |||
| 1212 | /* mmc2 master ports */ | ||
| 1213 | @@ -3539,7 +3540,6 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { | ||
| 1214 | .class = &omap44xx_mmc_hwmod_class, | ||
| 1215 | .mpu_irqs = omap44xx_mmc2_irqs, | ||
| 1216 | .sdma_reqs = omap44xx_mmc2_sdma_reqs, | ||
| 1217 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc2_sdma_reqs), | ||
| 1218 | .main_clk = "mmc2_fck", | ||
| 1219 | .prcm = { | ||
| 1220 | .omap4 = { | ||
| 1221 | @@ -3563,6 +3563,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc3_irqs[] = { | ||
| 1222 | static struct omap_hwmod_dma_info omap44xx_mmc3_sdma_reqs[] = { | ||
| 1223 | { .name = "tx", .dma_req = 76 + OMAP44XX_DMA_REQ_START }, | ||
| 1224 | { .name = "rx", .dma_req = 77 + OMAP44XX_DMA_REQ_START }, | ||
| 1225 | + { .dma_req = -1 } | ||
| 1226 | }; | ||
| 1227 | |||
| 1228 | static struct omap_hwmod_addr_space omap44xx_mmc3_addrs[] = { | ||
| 1229 | @@ -3593,7 +3594,6 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { | ||
| 1230 | .class = &omap44xx_mmc_hwmod_class, | ||
| 1231 | .mpu_irqs = omap44xx_mmc3_irqs, | ||
| 1232 | .sdma_reqs = omap44xx_mmc3_sdma_reqs, | ||
| 1233 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc3_sdma_reqs), | ||
| 1234 | .main_clk = "mmc3_fck", | ||
| 1235 | .prcm = { | ||
| 1236 | .omap4 = { | ||
| 1237 | @@ -3615,6 +3615,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc4_irqs[] = { | ||
| 1238 | static struct omap_hwmod_dma_info omap44xx_mmc4_sdma_reqs[] = { | ||
| 1239 | { .name = "tx", .dma_req = 56 + OMAP44XX_DMA_REQ_START }, | ||
| 1240 | { .name = "rx", .dma_req = 57 + OMAP44XX_DMA_REQ_START }, | ||
| 1241 | + { .dma_req = -1 } | ||
| 1242 | }; | ||
| 1243 | |||
| 1244 | static struct omap_hwmod_addr_space omap44xx_mmc4_addrs[] = { | ||
| 1245 | @@ -3646,7 +3647,6 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { | ||
| 1246 | .mpu_irqs = omap44xx_mmc4_irqs, | ||
| 1247 | |||
| 1248 | .sdma_reqs = omap44xx_mmc4_sdma_reqs, | ||
| 1249 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc4_sdma_reqs), | ||
| 1250 | .main_clk = "mmc4_fck", | ||
| 1251 | .prcm = { | ||
| 1252 | .omap4 = { | ||
| 1253 | @@ -3668,6 +3668,7 @@ static struct omap_hwmod_irq_info omap44xx_mmc5_irqs[] = { | ||
| 1254 | static struct omap_hwmod_dma_info omap44xx_mmc5_sdma_reqs[] = { | ||
| 1255 | { .name = "tx", .dma_req = 58 + OMAP44XX_DMA_REQ_START }, | ||
| 1256 | { .name = "rx", .dma_req = 59 + OMAP44XX_DMA_REQ_START }, | ||
| 1257 | + { .dma_req = -1 } | ||
| 1258 | }; | ||
| 1259 | |||
| 1260 | static struct omap_hwmod_addr_space omap44xx_mmc5_addrs[] = { | ||
| 1261 | @@ -3698,7 +3699,6 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { | ||
| 1262 | .class = &omap44xx_mmc_hwmod_class, | ||
| 1263 | .mpu_irqs = omap44xx_mmc5_irqs, | ||
| 1264 | .sdma_reqs = omap44xx_mmc5_sdma_reqs, | ||
| 1265 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_mmc5_sdma_reqs), | ||
| 1266 | .main_clk = "mmc5_fck", | ||
| 1267 | .prcm = { | ||
| 1268 | .omap4 = { | ||
| 1269 | @@ -4618,6 +4618,7 @@ static struct omap_hwmod_irq_info omap44xx_uart1_irqs[] = { | ||
| 1270 | static struct omap_hwmod_dma_info omap44xx_uart1_sdma_reqs[] = { | ||
| 1271 | { .name = "tx", .dma_req = 48 + OMAP44XX_DMA_REQ_START }, | ||
| 1272 | { .name = "rx", .dma_req = 49 + OMAP44XX_DMA_REQ_START }, | ||
| 1273 | + { .dma_req = -1 } | ||
| 1274 | }; | ||
| 1275 | |||
| 1276 | static struct omap_hwmod_addr_space omap44xx_uart1_addrs[] = { | ||
| 1277 | @@ -4648,7 +4649,6 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { | ||
| 1278 | .class = &omap44xx_uart_hwmod_class, | ||
| 1279 | .mpu_irqs = omap44xx_uart1_irqs, | ||
| 1280 | .sdma_reqs = omap44xx_uart1_sdma_reqs, | ||
| 1281 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart1_sdma_reqs), | ||
| 1282 | .main_clk = "uart1_fck", | ||
| 1283 | .prcm = { | ||
| 1284 | .omap4 = { | ||
| 1285 | @@ -4670,6 +4670,7 @@ static struct omap_hwmod_irq_info omap44xx_uart2_irqs[] = { | ||
| 1286 | static struct omap_hwmod_dma_info omap44xx_uart2_sdma_reqs[] = { | ||
| 1287 | { .name = "tx", .dma_req = 50 + OMAP44XX_DMA_REQ_START }, | ||
| 1288 | { .name = "rx", .dma_req = 51 + OMAP44XX_DMA_REQ_START }, | ||
| 1289 | + { .dma_req = -1 } | ||
| 1290 | }; | ||
| 1291 | |||
| 1292 | static struct omap_hwmod_addr_space omap44xx_uart2_addrs[] = { | ||
| 1293 | @@ -4700,7 +4701,6 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { | ||
| 1294 | .class = &omap44xx_uart_hwmod_class, | ||
| 1295 | .mpu_irqs = omap44xx_uart2_irqs, | ||
| 1296 | .sdma_reqs = omap44xx_uart2_sdma_reqs, | ||
| 1297 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart2_sdma_reqs), | ||
| 1298 | .main_clk = "uart2_fck", | ||
| 1299 | .prcm = { | ||
| 1300 | .omap4 = { | ||
| 1301 | @@ -4722,6 +4722,7 @@ static struct omap_hwmod_irq_info omap44xx_uart3_irqs[] = { | ||
| 1302 | static struct omap_hwmod_dma_info omap44xx_uart3_sdma_reqs[] = { | ||
| 1303 | { .name = "tx", .dma_req = 52 + OMAP44XX_DMA_REQ_START }, | ||
| 1304 | { .name = "rx", .dma_req = 53 + OMAP44XX_DMA_REQ_START }, | ||
| 1305 | + { .dma_req = -1 } | ||
| 1306 | }; | ||
| 1307 | |||
| 1308 | static struct omap_hwmod_addr_space omap44xx_uart3_addrs[] = { | ||
| 1309 | @@ -4753,7 +4754,6 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { | ||
| 1310 | .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), | ||
| 1311 | .mpu_irqs = omap44xx_uart3_irqs, | ||
| 1312 | .sdma_reqs = omap44xx_uart3_sdma_reqs, | ||
| 1313 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart3_sdma_reqs), | ||
| 1314 | .main_clk = "uart3_fck", | ||
| 1315 | .prcm = { | ||
| 1316 | .omap4 = { | ||
| 1317 | @@ -4775,6 +4775,7 @@ static struct omap_hwmod_irq_info omap44xx_uart4_irqs[] = { | ||
| 1318 | static struct omap_hwmod_dma_info omap44xx_uart4_sdma_reqs[] = { | ||
| 1319 | { .name = "tx", .dma_req = 54 + OMAP44XX_DMA_REQ_START }, | ||
| 1320 | { .name = "rx", .dma_req = 55 + OMAP44XX_DMA_REQ_START }, | ||
| 1321 | + { .dma_req = -1 } | ||
| 1322 | }; | ||
| 1323 | |||
| 1324 | static struct omap_hwmod_addr_space omap44xx_uart4_addrs[] = { | ||
| 1325 | @@ -4805,7 +4806,6 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { | ||
| 1326 | .class = &omap44xx_uart_hwmod_class, | ||
| 1327 | .mpu_irqs = omap44xx_uart4_irqs, | ||
| 1328 | .sdma_reqs = omap44xx_uart4_sdma_reqs, | ||
| 1329 | - .sdma_reqs_cnt = ARRAY_SIZE(omap44xx_uart4_sdma_reqs), | ||
| 1330 | .main_clk = "uart4_fck", | ||
| 1331 | .prcm = { | ||
| 1332 | .omap4 = { | ||
| 1333 | diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 1334 | index b8385e2..ce06ac6 100644 | ||
| 1335 | --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 1336 | +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 1337 | @@ -111,7 +111,7 @@ struct omap_hwmod_irq_info { | ||
| 1338 | /** | ||
| 1339 | * struct omap_hwmod_dma_info - DMA channels used by the hwmod | ||
| 1340 | * @name: name of the DMA channel (module local name) | ||
| 1341 | - * @dma_req: DMA request ID | ||
| 1342 | + * @dma_req: DMA request ID (should be non-negative except -1 = terminator) | ||
| 1343 | * | ||
| 1344 | * @name should be something short, e.g., "tx" or "rx". It is for use | ||
| 1345 | * by platform_get_resource_byname(). It is defined locally to the | ||
| 1346 | @@ -119,7 +119,7 @@ struct omap_hwmod_irq_info { | ||
| 1347 | */ | ||
| 1348 | struct omap_hwmod_dma_info { | ||
| 1349 | const char *name; | ||
| 1350 | - u16 dma_req; | ||
| 1351 | + s16 dma_req; | ||
| 1352 | }; | ||
| 1353 | |||
| 1354 | /** | ||
| 1355 | @@ -467,7 +467,7 @@ struct omap_hwmod_class { | ||
| 1356 | * @class: struct omap_hwmod_class * to the class of this hwmod | ||
| 1357 | * @od: struct omap_device currently associated with this hwmod (internal use) | ||
| 1358 | * @mpu_irqs: ptr to an array of MPU IRQs | ||
| 1359 | - * @sdma_reqs: ptr to an array of System DMA request IDs (see sdma_reqs_cnt) | ||
| 1360 | + * @sdma_reqs: ptr to an array of System DMA request IDs | ||
| 1361 | * @prcm: PRCM data pertaining to this hwmod | ||
| 1362 | * @main_clk: main clock: OMAP clock name | ||
| 1363 | * @_clk: pointer to the main struct clk (filled in at runtime) | ||
| 1364 | @@ -480,7 +480,6 @@ struct omap_hwmod_class { | ||
| 1365 | * @_sysc_cache: internal-use hwmod flags | ||
| 1366 | * @_mpu_rt_va: cached register target start address (internal use) | ||
| 1367 | * @_mpu_port_index: cached MPU register target slave ID (internal use) | ||
| 1368 | - * @sdma_reqs_cnt: number of @sdma_reqs | ||
| 1369 | * @opt_clks_cnt: number of @opt_clks | ||
| 1370 | * @master_cnt: number of @master entries | ||
| 1371 | * @slaves_cnt: number of @slave entries | ||
| 1372 | @@ -528,7 +527,6 @@ struct omap_hwmod { | ||
| 1373 | u16 flags; | ||
| 1374 | u8 _mpu_port_index; | ||
| 1375 | u8 response_lat; | ||
| 1376 | - u8 sdma_reqs_cnt; | ||
| 1377 | u8 rst_lines_cnt; | ||
| 1378 | u8 opt_clks_cnt; | ||
| 1379 | u8 masters_cnt; | ||
| 1380 | -- | ||
| 1381 | 1.7.2.5 | ||
| 1382 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0042-omap_hwmod-share-identical-omap_hwmod_dma_info-array.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0042-omap_hwmod-share-identical-omap_hwmod_dma_info-array.patch deleted file mode 100644 index 56bc227d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0042-omap_hwmod-share-identical-omap_hwmod_dma_info-array.patch +++ /dev/null | |||
| @@ -1,935 +0,0 @@ | |||
| 1 | From 79a8b76e605e0930ef1c52c2a757eb523340cda1 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Paul Walmsley <paul@pwsan.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:07 -0600 | ||
| 4 | Subject: [PATCH 042/149] omap_hwmod: share identical omap_hwmod_dma_info arrays | ||
| 5 | |||
| 6 | To reduce kernel source file data duplication, share struct | ||
| 7 | omap_hwmod_dma_info arrays across OMAP2xxx and 3xxx hwmod data files. | ||
| 8 | |||
| 9 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 10 | --- | ||
| 11 | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 87 ++---------------- | ||
| 12 | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 95 +++----------------- | ||
| 13 | .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 92 +++++++++++++++++++ | ||
| 14 | arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 6 ++ | ||
| 15 | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 89 ++---------------- | ||
| 16 | arch/arm/mach-omap2/omap_hwmod_common_data.c | 20 ---- | ||
| 17 | arch/arm/mach-omap2/omap_hwmod_common_data.h | 15 +++ | ||
| 18 | 7 files changed, 144 insertions(+), 260 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 21 | index 60c817e..6acc01f 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 23 | +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 24 | @@ -828,12 +828,6 @@ static struct omap_hwmod_class uart_class = { | ||
| 25 | |||
| 26 | /* UART1 */ | ||
| 27 | |||
| 28 | -static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | ||
| 29 | - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | ||
| 30 | - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | ||
| 31 | - { .dma_req = -1 } | ||
| 32 | -}; | ||
| 33 | - | ||
| 34 | static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { | ||
| 35 | &omap2_l4_core__uart1, | ||
| 36 | }; | ||
| 37 | @@ -841,7 +835,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { | ||
| 38 | static struct omap_hwmod omap2420_uart1_hwmod = { | ||
| 39 | .name = "uart1", | ||
| 40 | .mpu_irqs = omap2_uart1_mpu_irqs, | ||
| 41 | - .sdma_reqs = uart1_sdma_reqs, | ||
| 42 | + .sdma_reqs = omap2_uart1_sdma_reqs, | ||
| 43 | .main_clk = "uart1_fck", | ||
| 44 | .prcm = { | ||
| 45 | .omap2 = { | ||
| 46 | @@ -860,12 +854,6 @@ static struct omap_hwmod omap2420_uart1_hwmod = { | ||
| 47 | |||
| 48 | /* UART2 */ | ||
| 49 | |||
| 50 | -static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | ||
| 51 | - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | ||
| 52 | - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | ||
| 53 | - { .dma_req = -1 } | ||
| 54 | -}; | ||
| 55 | - | ||
| 56 | static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { | ||
| 57 | &omap2_l4_core__uart2, | ||
| 58 | }; | ||
| 59 | @@ -873,7 +861,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { | ||
| 60 | static struct omap_hwmod omap2420_uart2_hwmod = { | ||
| 61 | .name = "uart2", | ||
| 62 | .mpu_irqs = omap2_uart2_mpu_irqs, | ||
| 63 | - .sdma_reqs = uart2_sdma_reqs, | ||
| 64 | + .sdma_reqs = omap2_uart2_sdma_reqs, | ||
| 65 | .main_clk = "uart2_fck", | ||
| 66 | .prcm = { | ||
| 67 | .omap2 = { | ||
| 68 | @@ -892,12 +880,6 @@ static struct omap_hwmod omap2420_uart2_hwmod = { | ||
| 69 | |||
| 70 | /* UART3 */ | ||
| 71 | |||
| 72 | -static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | ||
| 73 | - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | ||
| 74 | - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | ||
| 75 | - { .dma_req = -1 } | ||
| 76 | -}; | ||
| 77 | - | ||
| 78 | static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { | ||
| 79 | &omap2_l4_core__uart3, | ||
| 80 | }; | ||
| 81 | @@ -905,7 +887,7 @@ static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { | ||
| 82 | static struct omap_hwmod omap2420_uart3_hwmod = { | ||
| 83 | .name = "uart3", | ||
| 84 | .mpu_irqs = omap2_uart3_mpu_irqs, | ||
| 85 | - .sdma_reqs = uart3_sdma_reqs, | ||
| 86 | + .sdma_reqs = omap2_uart3_sdma_reqs, | ||
| 87 | .main_clk = "uart3_fck", | ||
| 88 | .prcm = { | ||
| 89 | .omap2 = { | ||
| 90 | @@ -940,11 +922,6 @@ static struct omap_hwmod_class omap2420_dss_hwmod_class = { | ||
| 91 | .sysc = &omap2420_dss_sysc, | ||
| 92 | }; | ||
| 93 | |||
| 94 | -static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { | ||
| 95 | - { .name = "dispc", .dma_req = 5 }, | ||
| 96 | - { .dma_req = -1 } | ||
| 97 | -}; | ||
| 98 | - | ||
| 99 | /* dss */ | ||
| 100 | /* dss master ports */ | ||
| 101 | static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { | ||
| 102 | @@ -980,7 +957,7 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { | ||
| 103 | .name = "dss_core", | ||
| 104 | .class = &omap2420_dss_hwmod_class, | ||
| 105 | .main_clk = "dss1_fck", /* instead of dss_fck */ | ||
| 106 | - .sdma_reqs = omap2420_dss_sdma_chs, | ||
| 107 | + .sdma_reqs = omap2xxx_dss_sdma_chs, | ||
| 108 | .prcm = { | ||
| 109 | .omap2 = { | ||
| 110 | .prcm_reg_id = 1, | ||
| 111 | @@ -1183,12 +1160,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr; | ||
| 112 | |||
| 113 | /* I2C1 */ | ||
| 114 | |||
| 115 | -static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | ||
| 116 | - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | ||
| 117 | - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | ||
| 118 | - { .dma_req = -1 } | ||
| 119 | -}; | ||
| 120 | - | ||
| 121 | static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { | ||
| 122 | &omap2420_l4_core__i2c1, | ||
| 123 | }; | ||
| 124 | @@ -1196,7 +1167,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { | ||
| 125 | static struct omap_hwmod omap2420_i2c1_hwmod = { | ||
| 126 | .name = "i2c1", | ||
| 127 | .mpu_irqs = omap2_i2c1_mpu_irqs, | ||
| 128 | - .sdma_reqs = i2c1_sdma_reqs, | ||
| 129 | + .sdma_reqs = omap2_i2c1_sdma_reqs, | ||
| 130 | .main_clk = "i2c1_fck", | ||
| 131 | .prcm = { | ||
| 132 | .omap2 = { | ||
| 133 | @@ -1217,12 +1188,6 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { | ||
| 134 | |||
| 135 | /* I2C2 */ | ||
| 136 | |||
| 137 | -static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | ||
| 138 | - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | ||
| 139 | - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | ||
| 140 | - { .dma_req = -1 } | ||
| 141 | -}; | ||
| 142 | - | ||
| 143 | static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { | ||
| 144 | &omap2420_l4_core__i2c2, | ||
| 145 | }; | ||
| 146 | @@ -1230,7 +1195,7 @@ static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { | ||
| 147 | static struct omap_hwmod omap2420_i2c2_hwmod = { | ||
| 148 | .name = "i2c2", | ||
| 149 | .mpu_irqs = omap2_i2c2_mpu_irqs, | ||
| 150 | - .sdma_reqs = i2c2_sdma_reqs, | ||
| 151 | + .sdma_reqs = omap2_i2c2_sdma_reqs, | ||
| 152 | .main_clk = "i2c2_fck", | ||
| 153 | .prcm = { | ||
| 154 | .omap2 = { | ||
| 155 | @@ -1602,18 +1567,6 @@ static struct omap_hwmod_class omap2420_mcspi_class = { | ||
| 156 | }; | ||
| 157 | |||
| 158 | /* mcspi1 */ | ||
| 159 | -static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { | ||
| 160 | - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ | ||
| 161 | - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ | ||
| 162 | - { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ | ||
| 163 | - { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ | ||
| 164 | - { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ | ||
| 165 | - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ | ||
| 166 | - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ | ||
| 167 | - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ | ||
| 168 | - { .dma_req = -1 } | ||
| 169 | -}; | ||
| 170 | - | ||
| 171 | static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { | ||
| 172 | &omap2420_l4_core__mcspi1, | ||
| 173 | }; | ||
| 174 | @@ -1625,7 +1578,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | ||
| 175 | static struct omap_hwmod omap2420_mcspi1_hwmod = { | ||
| 176 | .name = "mcspi1_hwmod", | ||
| 177 | .mpu_irqs = omap2_mcspi1_mpu_irqs, | ||
| 178 | - .sdma_reqs = omap2420_mcspi1_sdma_reqs, | ||
| 179 | + .sdma_reqs = omap2_mcspi1_sdma_reqs, | ||
| 180 | .main_clk = "mcspi1_fck", | ||
| 181 | .prcm = { | ||
| 182 | .omap2 = { | ||
| 183 | @@ -1644,14 +1597,6 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { | ||
| 184 | }; | ||
| 185 | |||
| 186 | /* mcspi2 */ | ||
| 187 | -static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { | ||
| 188 | - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ | ||
| 189 | - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | ||
| 190 | - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ | ||
| 191 | - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ | ||
| 192 | - { .dma_req = -1 } | ||
| 193 | -}; | ||
| 194 | - | ||
| 195 | static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { | ||
| 196 | &omap2420_l4_core__mcspi2, | ||
| 197 | }; | ||
| 198 | @@ -1663,7 +1608,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | ||
| 199 | static struct omap_hwmod omap2420_mcspi2_hwmod = { | ||
| 200 | .name = "mcspi2_hwmod", | ||
| 201 | .mpu_irqs = omap2_mcspi2_mpu_irqs, | ||
| 202 | - .sdma_reqs = omap2420_mcspi2_sdma_reqs, | ||
| 203 | + .sdma_reqs = omap2_mcspi2_sdma_reqs, | ||
| 204 | .main_clk = "mcspi2_fck", | ||
| 205 | .prcm = { | ||
| 206 | .omap2 = { | ||
| 207 | @@ -1697,12 +1642,6 @@ static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { | ||
| 208 | { .irq = -1 } | ||
| 209 | }; | ||
| 210 | |||
| 211 | -static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { | ||
| 212 | - { .name = "rx", .dma_req = 32 }, | ||
| 213 | - { .name = "tx", .dma_req = 31 }, | ||
| 214 | - { .dma_req = -1 } | ||
| 215 | -}; | ||
| 216 | - | ||
| 217 | /* l4_core -> mcbsp1 */ | ||
| 218 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { | ||
| 219 | .master = &omap2420_l4_core_hwmod, | ||
| 220 | @@ -1721,7 +1660,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { | ||
| 221 | .name = "mcbsp1", | ||
| 222 | .class = &omap2420_mcbsp_hwmod_class, | ||
| 223 | .mpu_irqs = omap2420_mcbsp1_irqs, | ||
| 224 | - .sdma_reqs = omap2420_mcbsp1_sdma_chs, | ||
| 225 | + .sdma_reqs = omap2_mcbsp1_sdma_reqs, | ||
| 226 | .main_clk = "mcbsp1_fck", | ||
| 227 | .prcm = { | ||
| 228 | .omap2 = { | ||
| 229 | @@ -1744,12 +1683,6 @@ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { | ||
| 230 | { .irq = -1 } | ||
| 231 | }; | ||
| 232 | |||
| 233 | -static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { | ||
| 234 | - { .name = "rx", .dma_req = 34 }, | ||
| 235 | - { .name = "tx", .dma_req = 33 }, | ||
| 236 | - { .dma_req = -1 } | ||
| 237 | -}; | ||
| 238 | - | ||
| 239 | /* l4_core -> mcbsp2 */ | ||
| 240 | static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { | ||
| 241 | .master = &omap2420_l4_core_hwmod, | ||
| 242 | @@ -1768,7 +1701,7 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { | ||
| 243 | .name = "mcbsp2", | ||
| 244 | .class = &omap2420_mcbsp_hwmod_class, | ||
| 245 | .mpu_irqs = omap2420_mcbsp2_irqs, | ||
| 246 | - .sdma_reqs = omap2420_mcbsp2_sdma_chs, | ||
| 247 | + .sdma_reqs = omap2_mcbsp2_sdma_reqs, | ||
| 248 | .main_clk = "mcbsp2_fck", | ||
| 249 | .prcm = { | ||
| 250 | .omap2 = { | ||
| 251 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 252 | index af758b3..639acd5 100644 | ||
| 253 | --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 254 | +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 255 | @@ -900,12 +900,6 @@ static struct omap_hwmod_class uart_class = { | ||
| 256 | |||
| 257 | /* UART1 */ | ||
| 258 | |||
| 259 | -static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | ||
| 260 | - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | ||
| 261 | - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | ||
| 262 | - { .dma_req = -1 } | ||
| 263 | -}; | ||
| 264 | - | ||
| 265 | static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { | ||
| 266 | &omap2_l4_core__uart1, | ||
| 267 | }; | ||
| 268 | @@ -913,7 +907,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { | ||
| 269 | static struct omap_hwmod omap2430_uart1_hwmod = { | ||
| 270 | .name = "uart1", | ||
| 271 | .mpu_irqs = omap2_uart1_mpu_irqs, | ||
| 272 | - .sdma_reqs = uart1_sdma_reqs, | ||
| 273 | + .sdma_reqs = omap2_uart1_sdma_reqs, | ||
| 274 | .main_clk = "uart1_fck", | ||
| 275 | .prcm = { | ||
| 276 | .omap2 = { | ||
| 277 | @@ -932,12 +926,6 @@ static struct omap_hwmod omap2430_uart1_hwmod = { | ||
| 278 | |||
| 279 | /* UART2 */ | ||
| 280 | |||
| 281 | -static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | ||
| 282 | - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | ||
| 283 | - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | ||
| 284 | - { .dma_req = -1 } | ||
| 285 | -}; | ||
| 286 | - | ||
| 287 | static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { | ||
| 288 | &omap2_l4_core__uart2, | ||
| 289 | }; | ||
| 290 | @@ -945,7 +933,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart2_slaves[] = { | ||
| 291 | static struct omap_hwmod omap2430_uart2_hwmod = { | ||
| 292 | .name = "uart2", | ||
| 293 | .mpu_irqs = omap2_uart2_mpu_irqs, | ||
| 294 | - .sdma_reqs = uart2_sdma_reqs, | ||
| 295 | + .sdma_reqs = omap2_uart2_sdma_reqs, | ||
| 296 | .main_clk = "uart2_fck", | ||
| 297 | .prcm = { | ||
| 298 | .omap2 = { | ||
| 299 | @@ -964,12 +952,6 @@ static struct omap_hwmod omap2430_uart2_hwmod = { | ||
| 300 | |||
| 301 | /* UART3 */ | ||
| 302 | |||
| 303 | -static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | ||
| 304 | - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | ||
| 305 | - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | ||
| 306 | - { .dma_req = -1 } | ||
| 307 | -}; | ||
| 308 | - | ||
| 309 | static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { | ||
| 310 | &omap2_l4_core__uart3, | ||
| 311 | }; | ||
| 312 | @@ -977,7 +959,7 @@ static struct omap_hwmod_ocp_if *omap2430_uart3_slaves[] = { | ||
| 313 | static struct omap_hwmod omap2430_uart3_hwmod = { | ||
| 314 | .name = "uart3", | ||
| 315 | .mpu_irqs = omap2_uart3_mpu_irqs, | ||
| 316 | - .sdma_reqs = uart3_sdma_reqs, | ||
| 317 | + .sdma_reqs = omap2_uart3_sdma_reqs, | ||
| 318 | .main_clk = "uart3_fck", | ||
| 319 | .prcm = { | ||
| 320 | .omap2 = { | ||
| 321 | @@ -1012,11 +994,6 @@ static struct omap_hwmod_class omap2430_dss_hwmod_class = { | ||
| 322 | .sysc = &omap2430_dss_sysc, | ||
| 323 | }; | ||
| 324 | |||
| 325 | -static struct omap_hwmod_dma_info omap2430_dss_sdma_chs[] = { | ||
| 326 | - { .name = "dispc", .dma_req = 5 }, | ||
| 327 | - { .dma_req = -1 } | ||
| 328 | -}; | ||
| 329 | - | ||
| 330 | /* dss */ | ||
| 331 | /* dss master ports */ | ||
| 332 | static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { | ||
| 333 | @@ -1046,7 +1023,7 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { | ||
| 334 | .name = "dss_core", | ||
| 335 | .class = &omap2430_dss_hwmod_class, | ||
| 336 | .main_clk = "dss1_fck", /* instead of dss_fck */ | ||
| 337 | - .sdma_reqs = omap2430_dss_sdma_chs, | ||
| 338 | + .sdma_reqs = omap2xxx_dss_sdma_chs, | ||
| 339 | .prcm = { | ||
| 340 | .omap2 = { | ||
| 341 | .prcm_reg_id = 1, | ||
| 342 | @@ -1234,12 +1211,6 @@ static struct omap_i2c_dev_attr i2c_dev_attr = { | ||
| 343 | |||
| 344 | /* I2C1 */ | ||
| 345 | |||
| 346 | -static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | ||
| 347 | - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | ||
| 348 | - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | ||
| 349 | - { .dma_req = -1 } | ||
| 350 | -}; | ||
| 351 | - | ||
| 352 | static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { | ||
| 353 | &omap2430_l4_core__i2c1, | ||
| 354 | }; | ||
| 355 | @@ -1247,7 +1218,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { | ||
| 356 | static struct omap_hwmod omap2430_i2c1_hwmod = { | ||
| 357 | .name = "i2c1", | ||
| 358 | .mpu_irqs = omap2_i2c1_mpu_irqs, | ||
| 359 | - .sdma_reqs = i2c1_sdma_reqs, | ||
| 360 | + .sdma_reqs = omap2_i2c1_sdma_reqs, | ||
| 361 | .main_clk = "i2chs1_fck", | ||
| 362 | .prcm = { | ||
| 363 | .omap2 = { | ||
| 364 | @@ -1275,12 +1246,6 @@ static struct omap_hwmod omap2430_i2c1_hwmod = { | ||
| 365 | |||
| 366 | /* I2C2 */ | ||
| 367 | |||
| 368 | -static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | ||
| 369 | - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | ||
| 370 | - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | ||
| 371 | - { .dma_req = -1 } | ||
| 372 | -}; | ||
| 373 | - | ||
| 374 | static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { | ||
| 375 | &omap2430_l4_core__i2c2, | ||
| 376 | }; | ||
| 377 | @@ -1288,7 +1253,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { | ||
| 378 | static struct omap_hwmod omap2430_i2c2_hwmod = { | ||
| 379 | .name = "i2c2", | ||
| 380 | .mpu_irqs = omap2_i2c2_mpu_irqs, | ||
| 381 | - .sdma_reqs = i2c2_sdma_reqs, | ||
| 382 | + .sdma_reqs = omap2_i2c2_sdma_reqs, | ||
| 383 | .main_clk = "i2chs2_fck", | ||
| 384 | .prcm = { | ||
| 385 | .omap2 = { | ||
| 386 | @@ -1707,18 +1672,6 @@ static struct omap_hwmod_class omap2430_mcspi_class = { | ||
| 387 | }; | ||
| 388 | |||
| 389 | /* mcspi1 */ | ||
| 390 | -static struct omap_hwmod_dma_info omap2430_mcspi1_sdma_reqs[] = { | ||
| 391 | - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ | ||
| 392 | - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ | ||
| 393 | - { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ | ||
| 394 | - { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ | ||
| 395 | - { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ | ||
| 396 | - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ | ||
| 397 | - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ | ||
| 398 | - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ | ||
| 399 | - { .dma_req = -1 } | ||
| 400 | -}; | ||
| 401 | - | ||
| 402 | static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { | ||
| 403 | &omap2430_l4_core__mcspi1, | ||
| 404 | }; | ||
| 405 | @@ -1730,7 +1683,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | ||
| 406 | static struct omap_hwmod omap2430_mcspi1_hwmod = { | ||
| 407 | .name = "mcspi1_hwmod", | ||
| 408 | .mpu_irqs = omap2_mcspi1_mpu_irqs, | ||
| 409 | - .sdma_reqs = omap2430_mcspi1_sdma_reqs, | ||
| 410 | + .sdma_reqs = omap2_mcspi1_sdma_reqs, | ||
| 411 | .main_clk = "mcspi1_fck", | ||
| 412 | .prcm = { | ||
| 413 | .omap2 = { | ||
| 414 | @@ -1749,14 +1702,6 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { | ||
| 415 | }; | ||
| 416 | |||
| 417 | /* mcspi2 */ | ||
| 418 | -static struct omap_hwmod_dma_info omap2430_mcspi2_sdma_reqs[] = { | ||
| 419 | - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ | ||
| 420 | - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | ||
| 421 | - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ | ||
| 422 | - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ | ||
| 423 | - { .dma_req = -1 } | ||
| 424 | -}; | ||
| 425 | - | ||
| 426 | static struct omap_hwmod_ocp_if *omap2430_mcspi2_slaves[] = { | ||
| 427 | &omap2430_l4_core__mcspi2, | ||
| 428 | }; | ||
| 429 | @@ -1768,7 +1713,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | ||
| 430 | static struct omap_hwmod omap2430_mcspi2_hwmod = { | ||
| 431 | .name = "mcspi2_hwmod", | ||
| 432 | .mpu_irqs = omap2_mcspi2_mpu_irqs, | ||
| 433 | - .sdma_reqs = omap2430_mcspi2_sdma_reqs, | ||
| 434 | + .sdma_reqs = omap2_mcspi2_sdma_reqs, | ||
| 435 | .main_clk = "mcspi2_fck", | ||
| 436 | .prcm = { | ||
| 437 | .omap2 = { | ||
| 438 | @@ -1912,12 +1857,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp1_irqs[] = { | ||
| 439 | { .irq = -1 } | ||
| 440 | }; | ||
| 441 | |||
| 442 | -static struct omap_hwmod_dma_info omap2430_mcbsp1_sdma_chs[] = { | ||
| 443 | - { .name = "rx", .dma_req = 32 }, | ||
| 444 | - { .name = "tx", .dma_req = 31 }, | ||
| 445 | - { .dma_req = -1 } | ||
| 446 | -}; | ||
| 447 | - | ||
| 448 | /* l4_core -> mcbsp1 */ | ||
| 449 | static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp1 = { | ||
| 450 | .master = &omap2430_l4_core_hwmod, | ||
| 451 | @@ -1936,7 +1875,7 @@ static struct omap_hwmod omap2430_mcbsp1_hwmod = { | ||
| 452 | .name = "mcbsp1", | ||
| 453 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 454 | .mpu_irqs = omap2430_mcbsp1_irqs, | ||
| 455 | - .sdma_reqs = omap2430_mcbsp1_sdma_chs, | ||
| 456 | + .sdma_reqs = omap2_mcbsp1_sdma_reqs, | ||
| 457 | .main_clk = "mcbsp1_fck", | ||
| 458 | .prcm = { | ||
| 459 | .omap2 = { | ||
| 460 | @@ -1960,12 +1899,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp2_irqs[] = { | ||
| 461 | { .irq = -1 } | ||
| 462 | }; | ||
| 463 | |||
| 464 | -static struct omap_hwmod_dma_info omap2430_mcbsp2_sdma_chs[] = { | ||
| 465 | - { .name = "rx", .dma_req = 34 }, | ||
| 466 | - { .name = "tx", .dma_req = 33 }, | ||
| 467 | - { .dma_req = -1 } | ||
| 468 | -}; | ||
| 469 | - | ||
| 470 | /* l4_core -> mcbsp2 */ | ||
| 471 | static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp2 = { | ||
| 472 | .master = &omap2430_l4_core_hwmod, | ||
| 473 | @@ -1984,7 +1917,7 @@ static struct omap_hwmod omap2430_mcbsp2_hwmod = { | ||
| 474 | .name = "mcbsp2", | ||
| 475 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 476 | .mpu_irqs = omap2430_mcbsp2_irqs, | ||
| 477 | - .sdma_reqs = omap2430_mcbsp2_sdma_chs, | ||
| 478 | + .sdma_reqs = omap2_mcbsp2_sdma_reqs, | ||
| 479 | .main_clk = "mcbsp2_fck", | ||
| 480 | .prcm = { | ||
| 481 | .omap2 = { | ||
| 482 | @@ -2008,12 +1941,6 @@ static struct omap_hwmod_irq_info omap2430_mcbsp3_irqs[] = { | ||
| 483 | { .irq = -1 } | ||
| 484 | }; | ||
| 485 | |||
| 486 | -static struct omap_hwmod_dma_info omap2430_mcbsp3_sdma_chs[] = { | ||
| 487 | - { .name = "rx", .dma_req = 18 }, | ||
| 488 | - { .name = "tx", .dma_req = 17 }, | ||
| 489 | - { .dma_req = -1 } | ||
| 490 | -}; | ||
| 491 | - | ||
| 492 | static struct omap_hwmod_addr_space omap2430_mcbsp3_addrs[] = { | ||
| 493 | { | ||
| 494 | .name = "mpu", | ||
| 495 | @@ -2042,7 +1969,7 @@ static struct omap_hwmod omap2430_mcbsp3_hwmod = { | ||
| 496 | .name = "mcbsp3", | ||
| 497 | .class = &omap2430_mcbsp_hwmod_class, | ||
| 498 | .mpu_irqs = omap2430_mcbsp3_irqs, | ||
| 499 | - .sdma_reqs = omap2430_mcbsp3_sdma_chs, | ||
| 500 | + .sdma_reqs = omap2_mcbsp3_sdma_reqs, | ||
| 501 | .main_clk = "mcbsp3_fck", | ||
| 502 | .prcm = { | ||
| 503 | .omap2 = { | ||
| 504 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | ||
| 505 | index 245294b..7c4f5ab 100644 | ||
| 506 | --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | ||
| 507 | +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | ||
| 508 | @@ -10,11 +10,35 @@ | ||
| 509 | */ | ||
| 510 | #include <plat/omap_hwmod.h> | ||
| 511 | #include <plat/serial.h> | ||
| 512 | +#include <plat/dma.h> | ||
| 513 | |||
| 514 | #include <mach/irqs.h> | ||
| 515 | |||
| 516 | #include "omap_hwmod_common_data.h" | ||
| 517 | |||
| 518 | + | ||
| 519 | +/* | ||
| 520 | + * omap_hwmod class data | ||
| 521 | + */ | ||
| 522 | + | ||
| 523 | +struct omap_hwmod_class l3_hwmod_class = { | ||
| 524 | + .name = "l3" | ||
| 525 | +}; | ||
| 526 | + | ||
| 527 | +struct omap_hwmod_class l4_hwmod_class = { | ||
| 528 | + .name = "l4" | ||
| 529 | +}; | ||
| 530 | + | ||
| 531 | +struct omap_hwmod_class mpu_hwmod_class = { | ||
| 532 | + .name = "mpu" | ||
| 533 | +}; | ||
| 534 | + | ||
| 535 | +struct omap_hwmod_class iva_hwmod_class = { | ||
| 536 | + .name = "iva" | ||
| 537 | +}; | ||
| 538 | + | ||
| 539 | +/* Common MPU IRQ line data */ | ||
| 540 | + | ||
| 541 | struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[] = { | ||
| 542 | { .irq = 37, }, | ||
| 543 | { .irq = -1 } | ||
| 544 | @@ -138,5 +162,73 @@ struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { | ||
| 545 | { .irq = -1 } | ||
| 546 | }; | ||
| 547 | |||
| 548 | +/* Common DMA request line data */ | ||
| 549 | +struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { | ||
| 550 | + { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | ||
| 551 | + { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | ||
| 552 | + { .dma_req = -1 } | ||
| 553 | +}; | ||
| 554 | + | ||
| 555 | +struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { | ||
| 556 | + { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | ||
| 557 | + { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | ||
| 558 | + { .dma_req = -1 } | ||
| 559 | +}; | ||
| 560 | + | ||
| 561 | +struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { | ||
| 562 | + { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | ||
| 563 | + { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | ||
| 564 | + { .dma_req = -1 } | ||
| 565 | +}; | ||
| 566 | + | ||
| 567 | +struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { | ||
| 568 | + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | ||
| 569 | + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | ||
| 570 | + { .dma_req = -1 } | ||
| 571 | +}; | ||
| 572 | + | ||
| 573 | +struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { | ||
| 574 | + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | ||
| 575 | + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | ||
| 576 | + { .dma_req = -1 } | ||
| 577 | +}; | ||
| 578 | + | ||
| 579 | +struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { | ||
| 580 | + { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ | ||
| 581 | + { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ | ||
| 582 | + { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ | ||
| 583 | + { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ | ||
| 584 | + { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ | ||
| 585 | + { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ | ||
| 586 | + { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ | ||
| 587 | + { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ | ||
| 588 | + { .dma_req = -1 } | ||
| 589 | +}; | ||
| 590 | + | ||
| 591 | +struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { | ||
| 592 | + { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ | ||
| 593 | + { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | ||
| 594 | + { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ | ||
| 595 | + { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ | ||
| 596 | + { .dma_req = -1 } | ||
| 597 | +}; | ||
| 598 | + | ||
| 599 | +struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { | ||
| 600 | + { .name = "rx", .dma_req = 32 }, | ||
| 601 | + { .name = "tx", .dma_req = 31 }, | ||
| 602 | + { .dma_req = -1 } | ||
| 603 | +}; | ||
| 604 | + | ||
| 605 | +struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { | ||
| 606 | + { .name = "rx", .dma_req = 34 }, | ||
| 607 | + { .name = "tx", .dma_req = 33 }, | ||
| 608 | + { .dma_req = -1 } | ||
| 609 | +}; | ||
| 610 | + | ||
| 611 | +struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { | ||
| 612 | + { .name = "rx", .dma_req = 18 }, | ||
| 613 | + { .name = "tx", .dma_req = 17 }, | ||
| 614 | + { .dma_req = -1 } | ||
| 615 | +}; | ||
| 616 | |||
| 617 | |||
| 618 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | ||
| 619 | index 5a078a6..f5b63ef 100644 | ||
| 620 | --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | ||
| 621 | +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | ||
| 622 | @@ -10,6 +10,7 @@ | ||
| 623 | */ | ||
| 624 | #include <plat/omap_hwmod.h> | ||
| 625 | #include <plat/serial.h> | ||
| 626 | +#include <plat/dma.h> | ||
| 627 | |||
| 628 | #include <mach/irqs.h> | ||
| 629 | |||
| 630 | @@ -19,3 +20,8 @@ struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { | ||
| 631 | { .irq = 48, }, | ||
| 632 | { .irq = -1 } | ||
| 633 | }; | ||
| 634 | + | ||
| 635 | +struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { | ||
| 636 | + { .name = "dispc", .dma_req = 5 }, | ||
| 637 | + { .dma_req = -1 } | ||
| 638 | +}; | ||
| 639 | diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 640 | index 265f0b1..001f67b 100644 | ||
| 641 | --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 642 | +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 643 | @@ -1210,12 +1210,6 @@ static struct omap_hwmod_class uart_class = { | ||
| 644 | |||
| 645 | /* UART1 */ | ||
| 646 | |||
| 647 | -static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { | ||
| 648 | - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | ||
| 649 | - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | ||
| 650 | - { .dma_req = -1 } | ||
| 651 | -}; | ||
| 652 | - | ||
| 653 | static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { | ||
| 654 | &omap3_l4_core__uart1, | ||
| 655 | }; | ||
| 656 | @@ -1223,7 +1217,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { | ||
| 657 | static struct omap_hwmod omap3xxx_uart1_hwmod = { | ||
| 658 | .name = "uart1", | ||
| 659 | .mpu_irqs = omap2_uart1_mpu_irqs, | ||
| 660 | - .sdma_reqs = uart1_sdma_reqs, | ||
| 661 | + .sdma_reqs = omap2_uart1_sdma_reqs, | ||
| 662 | .main_clk = "uart1_fck", | ||
| 663 | .prcm = { | ||
| 664 | .omap2 = { | ||
| 665 | @@ -1242,12 +1236,6 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { | ||
| 666 | |||
| 667 | /* UART2 */ | ||
| 668 | |||
| 669 | -static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { | ||
| 670 | - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | ||
| 671 | - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | ||
| 672 | - { .dma_req = -1 } | ||
| 673 | -}; | ||
| 674 | - | ||
| 675 | static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { | ||
| 676 | &omap3_l4_core__uart2, | ||
| 677 | }; | ||
| 678 | @@ -1255,7 +1243,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart2_slaves[] = { | ||
| 679 | static struct omap_hwmod omap3xxx_uart2_hwmod = { | ||
| 680 | .name = "uart2", | ||
| 681 | .mpu_irqs = omap2_uart2_mpu_irqs, | ||
| 682 | - .sdma_reqs = uart2_sdma_reqs, | ||
| 683 | + .sdma_reqs = omap2_uart2_sdma_reqs, | ||
| 684 | .main_clk = "uart2_fck", | ||
| 685 | .prcm = { | ||
| 686 | .omap2 = { | ||
| 687 | @@ -1274,12 +1262,6 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { | ||
| 688 | |||
| 689 | /* UART3 */ | ||
| 690 | |||
| 691 | -static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { | ||
| 692 | - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | ||
| 693 | - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | ||
| 694 | - { .dma_req = -1 } | ||
| 695 | -}; | ||
| 696 | - | ||
| 697 | static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { | ||
| 698 | &omap3_l4_per__uart3, | ||
| 699 | }; | ||
| 700 | @@ -1287,7 +1269,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_uart3_slaves[] = { | ||
| 701 | static struct omap_hwmod omap3xxx_uart3_hwmod = { | ||
| 702 | .name = "uart3", | ||
| 703 | .mpu_irqs = omap2_uart3_mpu_irqs, | ||
| 704 | - .sdma_reqs = uart3_sdma_reqs, | ||
| 705 | + .sdma_reqs = omap2_uart3_sdma_reqs, | ||
| 706 | .main_clk = "uart3_fck", | ||
| 707 | .prcm = { | ||
| 708 | .omap2 = { | ||
| 709 | @@ -1714,12 +1696,6 @@ static struct omap_i2c_dev_attr i2c1_dev_attr = { | ||
| 710 | .fifo_depth = 8, /* bytes */ | ||
| 711 | }; | ||
| 712 | |||
| 713 | -static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { | ||
| 714 | - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | ||
| 715 | - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | ||
| 716 | - { .dma_req = -1 } | ||
| 717 | -}; | ||
| 718 | - | ||
| 719 | static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { | ||
| 720 | &omap3_l4_core__i2c1, | ||
| 721 | }; | ||
| 722 | @@ -1727,7 +1703,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { | ||
| 723 | static struct omap_hwmod omap3xxx_i2c1_hwmod = { | ||
| 724 | .name = "i2c1", | ||
| 725 | .mpu_irqs = omap2_i2c1_mpu_irqs, | ||
| 726 | - .sdma_reqs = i2c1_sdma_reqs, | ||
| 727 | + .sdma_reqs = omap2_i2c1_sdma_reqs, | ||
| 728 | .main_clk = "i2c1_fck", | ||
| 729 | .prcm = { | ||
| 730 | .omap2 = { | ||
| 731 | @@ -1751,12 +1727,6 @@ static struct omap_i2c_dev_attr i2c2_dev_attr = { | ||
| 732 | .fifo_depth = 8, /* bytes */ | ||
| 733 | }; | ||
| 734 | |||
| 735 | -static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { | ||
| 736 | - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | ||
| 737 | - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | ||
| 738 | - { .dma_req = -1 } | ||
| 739 | -}; | ||
| 740 | - | ||
| 741 | static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { | ||
| 742 | &omap3_l4_core__i2c2, | ||
| 743 | }; | ||
| 744 | @@ -1764,7 +1734,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { | ||
| 745 | static struct omap_hwmod omap3xxx_i2c2_hwmod = { | ||
| 746 | .name = "i2c2", | ||
| 747 | .mpu_irqs = omap2_i2c2_mpu_irqs, | ||
| 748 | - .sdma_reqs = i2c2_sdma_reqs, | ||
| 749 | + .sdma_reqs = omap2_i2c2_sdma_reqs, | ||
| 750 | .main_clk = "i2c2_fck", | ||
| 751 | .prcm = { | ||
| 752 | .omap2 = { | ||
| 753 | @@ -2269,12 +2239,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp1_irqs[] = { | ||
| 754 | { .irq = -1 } | ||
| 755 | }; | ||
| 756 | |||
| 757 | -static struct omap_hwmod_dma_info omap3xxx_mcbsp1_sdma_chs[] = { | ||
| 758 | - { .name = "rx", .dma_req = 32 }, | ||
| 759 | - { .name = "tx", .dma_req = 31 }, | ||
| 760 | - { .dma_req = -1 } | ||
| 761 | -}; | ||
| 762 | - | ||
| 763 | static struct omap_hwmod_addr_space omap3xxx_mcbsp1_addrs[] = { | ||
| 764 | { | ||
| 765 | .name = "mpu", | ||
| 766 | @@ -2303,7 +2267,7 @@ static struct omap_hwmod omap3xxx_mcbsp1_hwmod = { | ||
| 767 | .name = "mcbsp1", | ||
| 768 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 769 | .mpu_irqs = omap3xxx_mcbsp1_irqs, | ||
| 770 | - .sdma_reqs = omap3xxx_mcbsp1_sdma_chs, | ||
| 771 | + .sdma_reqs = omap2_mcbsp1_sdma_reqs, | ||
| 772 | .main_clk = "mcbsp1_fck", | ||
| 773 | .prcm = { | ||
| 774 | .omap2 = { | ||
| 775 | @@ -2327,12 +2291,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp2_irqs[] = { | ||
| 776 | { .irq = -1 } | ||
| 777 | }; | ||
| 778 | |||
| 779 | -static struct omap_hwmod_dma_info omap3xxx_mcbsp2_sdma_chs[] = { | ||
| 780 | - { .name = "rx", .dma_req = 34 }, | ||
| 781 | - { .name = "tx", .dma_req = 33 }, | ||
| 782 | - { .dma_req = -1 } | ||
| 783 | -}; | ||
| 784 | - | ||
| 785 | static struct omap_hwmod_addr_space omap3xxx_mcbsp2_addrs[] = { | ||
| 786 | { | ||
| 787 | .name = "mpu", | ||
| 788 | @@ -2349,7 +2307,6 @@ static struct omap_hwmod_ocp_if omap3xxx_l4_per__mcbsp2 = { | ||
| 789 | .slave = &omap3xxx_mcbsp2_hwmod, | ||
| 790 | .clk = "mcbsp2_ick", | ||
| 791 | .addr = omap3xxx_mcbsp2_addrs, | ||
| 792 | - | ||
| 793 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 794 | }; | ||
| 795 | |||
| 796 | @@ -2366,7 +2323,7 @@ static struct omap_hwmod omap3xxx_mcbsp2_hwmod = { | ||
| 797 | .name = "mcbsp2", | ||
| 798 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 799 | .mpu_irqs = omap3xxx_mcbsp2_irqs, | ||
| 800 | - .sdma_reqs = omap3xxx_mcbsp2_sdma_chs, | ||
| 801 | + .sdma_reqs = omap2_mcbsp2_sdma_reqs, | ||
| 802 | .main_clk = "mcbsp2_fck", | ||
| 803 | .prcm = { | ||
| 804 | .omap2 = { | ||
| 805 | @@ -2391,12 +2348,6 @@ static struct omap_hwmod_irq_info omap3xxx_mcbsp3_irqs[] = { | ||
| 806 | { .irq = -1 } | ||
| 807 | }; | ||
| 808 | |||
| 809 | -static struct omap_hwmod_dma_info omap3xxx_mcbsp3_sdma_chs[] = { | ||
| 810 | - { .name = "rx", .dma_req = 18 }, | ||
| 811 | - { .name = "tx", .dma_req = 17 }, | ||
| 812 | - { .dma_req = -1 } | ||
| 813 | -}; | ||
| 814 | - | ||
| 815 | static struct omap_hwmod_addr_space omap3xxx_mcbsp3_addrs[] = { | ||
| 816 | { | ||
| 817 | .name = "mpu", | ||
| 818 | @@ -2429,7 +2380,7 @@ static struct omap_hwmod omap3xxx_mcbsp3_hwmod = { | ||
| 819 | .name = "mcbsp3", | ||
| 820 | .class = &omap3xxx_mcbsp_hwmod_class, | ||
| 821 | .mpu_irqs = omap3xxx_mcbsp3_irqs, | ||
| 822 | - .sdma_reqs = omap3xxx_mcbsp3_sdma_chs, | ||
| 823 | + .sdma_reqs = omap2_mcbsp3_sdma_reqs, | ||
| 824 | .main_clk = "mcbsp3_fck", | ||
| 825 | .prcm = { | ||
| 826 | .omap2 = { | ||
| 827 | @@ -2939,18 +2890,6 @@ static struct omap_hwmod_class omap34xx_mcspi_class = { | ||
| 828 | }; | ||
| 829 | |||
| 830 | /* mcspi1 */ | ||
| 831 | -static struct omap_hwmod_dma_info omap34xx_mcspi1_sdma_reqs[] = { | ||
| 832 | - { .name = "tx0", .dma_req = 35 }, | ||
| 833 | - { .name = "rx0", .dma_req = 36 }, | ||
| 834 | - { .name = "tx1", .dma_req = 37 }, | ||
| 835 | - { .name = "rx1", .dma_req = 38 }, | ||
| 836 | - { .name = "tx2", .dma_req = 39 }, | ||
| 837 | - { .name = "rx2", .dma_req = 40 }, | ||
| 838 | - { .name = "tx3", .dma_req = 41 }, | ||
| 839 | - { .name = "rx3", .dma_req = 42 }, | ||
| 840 | - { .dma_req = -1 } | ||
| 841 | -}; | ||
| 842 | - | ||
| 843 | static struct omap_hwmod_ocp_if *omap34xx_mcspi1_slaves[] = { | ||
| 844 | &omap34xx_l4_core__mcspi1, | ||
| 845 | }; | ||
| 846 | @@ -2962,7 +2901,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { | ||
| 847 | static struct omap_hwmod omap34xx_mcspi1 = { | ||
| 848 | .name = "mcspi1", | ||
| 849 | .mpu_irqs = omap2_mcspi1_mpu_irqs, | ||
| 850 | - .sdma_reqs = omap34xx_mcspi1_sdma_reqs, | ||
| 851 | + .sdma_reqs = omap2_mcspi1_sdma_reqs, | ||
| 852 | .main_clk = "mcspi1_fck", | ||
| 853 | .prcm = { | ||
| 854 | .omap2 = { | ||
| 855 | @@ -2981,14 +2920,6 @@ static struct omap_hwmod omap34xx_mcspi1 = { | ||
| 856 | }; | ||
| 857 | |||
| 858 | /* mcspi2 */ | ||
| 859 | -static struct omap_hwmod_dma_info omap34xx_mcspi2_sdma_reqs[] = { | ||
| 860 | - { .name = "tx0", .dma_req = 43 }, | ||
| 861 | - { .name = "rx0", .dma_req = 44 }, | ||
| 862 | - { .name = "tx1", .dma_req = 45 }, | ||
| 863 | - { .name = "rx1", .dma_req = 46 }, | ||
| 864 | - { .dma_req = -1 } | ||
| 865 | -}; | ||
| 866 | - | ||
| 867 | static struct omap_hwmod_ocp_if *omap34xx_mcspi2_slaves[] = { | ||
| 868 | &omap34xx_l4_core__mcspi2, | ||
| 869 | }; | ||
| 870 | @@ -3000,7 +2931,7 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { | ||
| 871 | static struct omap_hwmod omap34xx_mcspi2 = { | ||
| 872 | .name = "mcspi2", | ||
| 873 | .mpu_irqs = omap2_mcspi2_mpu_irqs, | ||
| 874 | - .sdma_reqs = omap34xx_mcspi2_sdma_reqs, | ||
| 875 | + .sdma_reqs = omap2_mcspi2_sdma_reqs, | ||
| 876 | .main_clk = "mcspi2_fck", | ||
| 877 | .prcm = { | ||
| 878 | .omap2 = { | ||
| 879 | diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c | ||
| 880 | index 08a1342..de832eb 100644 | ||
| 881 | --- a/arch/arm/mach-omap2/omap_hwmod_common_data.c | ||
| 882 | +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c | ||
| 883 | @@ -49,23 +49,3 @@ struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2 = { | ||
| 884 | .srst_shift = SYSC_TYPE2_SOFTRESET_SHIFT, | ||
| 885 | }; | ||
| 886 | |||
| 887 | - | ||
| 888 | -/* | ||
| 889 | - * omap_hwmod class data | ||
| 890 | - */ | ||
| 891 | - | ||
| 892 | -struct omap_hwmod_class l3_hwmod_class = { | ||
| 893 | - .name = "l3" | ||
| 894 | -}; | ||
| 895 | - | ||
| 896 | -struct omap_hwmod_class l4_hwmod_class = { | ||
| 897 | - .name = "l4" | ||
| 898 | -}; | ||
| 899 | - | ||
| 900 | -struct omap_hwmod_class mpu_hwmod_class = { | ||
| 901 | - .name = "mpu" | ||
| 902 | -}; | ||
| 903 | - | ||
| 904 | -struct omap_hwmod_class iva_hwmod_class = { | ||
| 905 | - .name = "iva" | ||
| 906 | -}; | ||
| 907 | diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h | ||
| 908 | index 1ac878c..b636cf6 100644 | ||
| 909 | --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h | ||
| 910 | +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h | ||
| 911 | @@ -51,6 +51,21 @@ extern struct omap_hwmod_addr_space omap2_mcbsp1_addrs[]; | ||
| 912 | |||
| 913 | /* Common IP block data across OMAP2xxx */ | ||
| 914 | extern struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[]; | ||
| 915 | +extern struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[]; | ||
| 916 | + | ||
| 917 | +/* Common IP block data */ | ||
| 918 | +extern struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[]; | ||
| 919 | +extern struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[]; | ||
| 920 | +extern struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[]; | ||
| 921 | +extern struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[]; | ||
| 922 | +extern struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[]; | ||
| 923 | +extern struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[]; | ||
| 924 | +extern struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[]; | ||
| 925 | +extern struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[]; | ||
| 926 | +extern struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[]; | ||
| 927 | + | ||
| 928 | +/* Common IP block data on OMAP2430/OMAP3 */ | ||
| 929 | +extern struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[]; | ||
| 930 | |||
| 931 | /* Common IP block data across OMAP2/3 */ | ||
| 932 | extern struct omap_hwmod_irq_info omap2_timer1_mpu_irqs[]; | ||
| 933 | -- | ||
| 934 | 1.7.2.5 | ||
| 935 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0043-omap_hwmod-share-identical-omap_hwmod_class-omap_hwm.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0043-omap_hwmod-share-identical-omap_hwmod_class-omap_hwm.patch deleted file mode 100644 index f4e644bb..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0043-omap_hwmod-share-identical-omap_hwmod_class-omap_hwm.patch +++ /dev/null | |||
| @@ -1,1730 +0,0 @@ | |||
| 1 | From 7fb59da1fff606542858e006b001e1cb63e1d708 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Paul Walmsley <paul@pwsan.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:08 -0600 | ||
| 4 | Subject: [PATCH 043/149] omap_hwmod: share identical omap_hwmod_class, omap_hwmod_class_sysconfig arrays | ||
| 5 | |||
| 6 | To reduce kernel source file data duplication, share struct | ||
| 7 | omap_hwmod_class and omap_hwmod_class_sysconfig arrays across OMAP2xxx | ||
| 8 | and 3xxx hwmod data files. | ||
| 9 | |||
| 10 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 267 +++----------------- | ||
| 13 | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 273 +++----------------- | ||
| 14 | .../mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | 228 +++++++++++----- | ||
| 15 | arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | 123 +++++++++ | ||
| 16 | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 105 +------- | ||
| 17 | arch/arm/mach-omap2/omap_hwmod_common_data.h | 11 + | ||
| 18 | 6 files changed, 364 insertions(+), 643 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 21 | index 6acc01f..f3901ab 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 23 | +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 24 | @@ -274,24 +274,6 @@ static struct omap_hwmod omap2420_iva_hwmod = { | ||
| 25 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 26 | }; | ||
| 27 | |||
| 28 | -/* Timer Common */ | ||
| 29 | -static struct omap_hwmod_class_sysconfig omap2420_timer_sysc = { | ||
| 30 | - .rev_offs = 0x0000, | ||
| 31 | - .sysc_offs = 0x0010, | ||
| 32 | - .syss_offs = 0x0014, | ||
| 33 | - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | | ||
| 34 | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
| 35 | - SYSC_HAS_AUTOIDLE), | ||
| 36 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 37 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 38 | -}; | ||
| 39 | - | ||
| 40 | -static struct omap_hwmod_class omap2420_timer_hwmod_class = { | ||
| 41 | - .name = "timer", | ||
| 42 | - .sysc = &omap2420_timer_sysc, | ||
| 43 | - .rev = OMAP_TIMER_IP_VERSION_1, | ||
| 44 | -}; | ||
| 45 | - | ||
| 46 | /* timer1 */ | ||
| 47 | static struct omap_hwmod omap2420_timer1_hwmod; | ||
| 48 | |||
| 49 | @@ -334,7 +316,7 @@ static struct omap_hwmod omap2420_timer1_hwmod = { | ||
| 50 | }, | ||
| 51 | .slaves = omap2420_timer1_slaves, | ||
| 52 | .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), | ||
| 53 | - .class = &omap2420_timer_hwmod_class, | ||
| 54 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 55 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 56 | }; | ||
| 57 | |||
| 58 | @@ -371,7 +353,7 @@ static struct omap_hwmod omap2420_timer2_hwmod = { | ||
| 59 | }, | ||
| 60 | .slaves = omap2420_timer2_slaves, | ||
| 61 | .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), | ||
| 62 | - .class = &omap2420_timer_hwmod_class, | ||
| 63 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 64 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 65 | }; | ||
| 66 | |||
| 67 | @@ -408,7 +390,7 @@ static struct omap_hwmod omap2420_timer3_hwmod = { | ||
| 68 | }, | ||
| 69 | .slaves = omap2420_timer3_slaves, | ||
| 70 | .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), | ||
| 71 | - .class = &omap2420_timer_hwmod_class, | ||
| 72 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 73 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 74 | }; | ||
| 75 | |||
| 76 | @@ -445,7 +427,7 @@ static struct omap_hwmod omap2420_timer4_hwmod = { | ||
| 77 | }, | ||
| 78 | .slaves = omap2420_timer4_slaves, | ||
| 79 | .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), | ||
| 80 | - .class = &omap2420_timer_hwmod_class, | ||
| 81 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 82 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 83 | }; | ||
| 84 | |||
| 85 | @@ -482,7 +464,7 @@ static struct omap_hwmod omap2420_timer5_hwmod = { | ||
| 86 | }, | ||
| 87 | .slaves = omap2420_timer5_slaves, | ||
| 88 | .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), | ||
| 89 | - .class = &omap2420_timer_hwmod_class, | ||
| 90 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 91 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 92 | }; | ||
| 93 | |||
| 94 | @@ -520,7 +502,7 @@ static struct omap_hwmod omap2420_timer6_hwmod = { | ||
| 95 | }, | ||
| 96 | .slaves = omap2420_timer6_slaves, | ||
| 97 | .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), | ||
| 98 | - .class = &omap2420_timer_hwmod_class, | ||
| 99 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 100 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 101 | }; | ||
| 102 | |||
| 103 | @@ -557,7 +539,7 @@ static struct omap_hwmod omap2420_timer7_hwmod = { | ||
| 104 | }, | ||
| 105 | .slaves = omap2420_timer7_slaves, | ||
| 106 | .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), | ||
| 107 | - .class = &omap2420_timer_hwmod_class, | ||
| 108 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 109 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 110 | }; | ||
| 111 | |||
| 112 | @@ -594,7 +576,7 @@ static struct omap_hwmod omap2420_timer8_hwmod = { | ||
| 113 | }, | ||
| 114 | .slaves = omap2420_timer8_slaves, | ||
| 115 | .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), | ||
| 116 | - .class = &omap2420_timer_hwmod_class, | ||
| 117 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 118 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 119 | }; | ||
| 120 | |||
| 121 | @@ -631,7 +613,7 @@ static struct omap_hwmod omap2420_timer9_hwmod = { | ||
| 122 | }, | ||
| 123 | .slaves = omap2420_timer9_slaves, | ||
| 124 | .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), | ||
| 125 | - .class = &omap2420_timer_hwmod_class, | ||
| 126 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 127 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 128 | }; | ||
| 129 | |||
| 130 | @@ -668,7 +650,7 @@ static struct omap_hwmod omap2420_timer10_hwmod = { | ||
| 131 | }, | ||
| 132 | .slaves = omap2420_timer10_slaves, | ||
| 133 | .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), | ||
| 134 | - .class = &omap2420_timer_hwmod_class, | ||
| 135 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 136 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 137 | }; | ||
| 138 | |||
| 139 | @@ -705,7 +687,7 @@ static struct omap_hwmod omap2420_timer11_hwmod = { | ||
| 140 | }, | ||
| 141 | .slaves = omap2420_timer11_slaves, | ||
| 142 | .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), | ||
| 143 | - .class = &omap2420_timer_hwmod_class, | ||
| 144 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 145 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 146 | }; | ||
| 147 | |||
| 148 | @@ -742,7 +724,7 @@ static struct omap_hwmod omap2420_timer12_hwmod = { | ||
| 149 | }, | ||
| 150 | .slaves = omap2420_timer12_slaves, | ||
| 151 | .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), | ||
| 152 | - .class = &omap2420_timer_hwmod_class, | ||
| 153 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 154 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) | ||
| 155 | }; | ||
| 156 | |||
| 157 | @@ -764,27 +746,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { | ||
| 158 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 159 | }; | ||
| 160 | |||
| 161 | -/* | ||
| 162 | - * 'wd_timer' class | ||
| 163 | - * 32-bit watchdog upward counter that generates a pulse on the reset pin on | ||
| 164 | - * overflow condition | ||
| 165 | - */ | ||
| 166 | - | ||
| 167 | -static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = { | ||
| 168 | - .rev_offs = 0x0000, | ||
| 169 | - .sysc_offs = 0x0010, | ||
| 170 | - .syss_offs = 0x0014, | ||
| 171 | - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | | ||
| 172 | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 173 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 174 | -}; | ||
| 175 | - | ||
| 176 | -static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = { | ||
| 177 | - .name = "wd_timer", | ||
| 178 | - .sysc = &omap2420_wd_timer_sysc, | ||
| 179 | - .pre_shutdown = &omap2_wd_timer_disable | ||
| 180 | -}; | ||
| 181 | - | ||
| 182 | /* wd_timer2 */ | ||
| 183 | static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { | ||
| 184 | &omap2420_l4_wkup__wd_timer2, | ||
| 185 | @@ -792,7 +753,7 @@ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { | ||
| 186 | |||
| 187 | static struct omap_hwmod omap2420_wd_timer2_hwmod = { | ||
| 188 | .name = "wd_timer2", | ||
| 189 | - .class = &omap2420_wd_timer_hwmod_class, | ||
| 190 | + .class = &omap2xxx_wd_timer_hwmod_class, | ||
| 191 | .main_clk = "mpu_wdt_fck", | ||
| 192 | .prcm = { | ||
| 193 | .omap2 = { | ||
| 194 | @@ -808,24 +769,6 @@ static struct omap_hwmod omap2420_wd_timer2_hwmod = { | ||
| 195 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | ||
| 196 | }; | ||
| 197 | |||
| 198 | -/* UART */ | ||
| 199 | - | ||
| 200 | -static struct omap_hwmod_class_sysconfig uart_sysc = { | ||
| 201 | - .rev_offs = 0x50, | ||
| 202 | - .sysc_offs = 0x54, | ||
| 203 | - .syss_offs = 0x58, | ||
| 204 | - .sysc_flags = (SYSC_HAS_SIDLEMODE | | ||
| 205 | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
| 206 | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 207 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 208 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 209 | -}; | ||
| 210 | - | ||
| 211 | -static struct omap_hwmod_class uart_class = { | ||
| 212 | - .name = "uart", | ||
| 213 | - .sysc = &uart_sysc, | ||
| 214 | -}; | ||
| 215 | - | ||
| 216 | /* UART1 */ | ||
| 217 | |||
| 218 | static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { | ||
| 219 | @@ -848,7 +791,7 @@ static struct omap_hwmod omap2420_uart1_hwmod = { | ||
| 220 | }, | ||
| 221 | .slaves = omap2420_uart1_slaves, | ||
| 222 | .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves), | ||
| 223 | - .class = &uart_class, | ||
| 224 | + .class = &omap2_uart_class, | ||
| 225 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | ||
| 226 | }; | ||
| 227 | |||
| 228 | @@ -874,7 +817,7 @@ static struct omap_hwmod omap2420_uart2_hwmod = { | ||
| 229 | }, | ||
| 230 | .slaves = omap2420_uart2_slaves, | ||
| 231 | .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves), | ||
| 232 | - .class = &uart_class, | ||
| 233 | + .class = &omap2_uart_class, | ||
| 234 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | ||
| 235 | }; | ||
| 236 | |||
| 237 | @@ -900,28 +843,10 @@ static struct omap_hwmod omap2420_uart3_hwmod = { | ||
| 238 | }, | ||
| 239 | .slaves = omap2420_uart3_slaves, | ||
| 240 | .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves), | ||
| 241 | - .class = &uart_class, | ||
| 242 | + .class = &omap2_uart_class, | ||
| 243 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | ||
| 244 | }; | ||
| 245 | |||
| 246 | -/* | ||
| 247 | - * 'dss' class | ||
| 248 | - * display sub-system | ||
| 249 | - */ | ||
| 250 | - | ||
| 251 | -static struct omap_hwmod_class_sysconfig omap2420_dss_sysc = { | ||
| 252 | - .rev_offs = 0x0000, | ||
| 253 | - .sysc_offs = 0x0010, | ||
| 254 | - .syss_offs = 0x0014, | ||
| 255 | - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | ||
| 256 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 257 | -}; | ||
| 258 | - | ||
| 259 | -static struct omap_hwmod_class omap2420_dss_hwmod_class = { | ||
| 260 | - .name = "dss", | ||
| 261 | - .sysc = &omap2420_dss_sysc, | ||
| 262 | -}; | ||
| 263 | - | ||
| 264 | /* dss */ | ||
| 265 | /* dss master ports */ | ||
| 266 | static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { | ||
| 267 | @@ -955,7 +880,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { | ||
| 268 | |||
| 269 | static struct omap_hwmod omap2420_dss_core_hwmod = { | ||
| 270 | .name = "dss_core", | ||
| 271 | - .class = &omap2420_dss_hwmod_class, | ||
| 272 | + .class = &omap2_dss_hwmod_class, | ||
| 273 | .main_clk = "dss1_fck", /* instead of dss_fck */ | ||
| 274 | .sdma_reqs = omap2xxx_dss_sdma_chs, | ||
| 275 | .prcm = { | ||
| 276 | @@ -977,27 +902,6 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { | ||
| 277 | .flags = HWMOD_NO_IDLEST, | ||
| 278 | }; | ||
| 279 | |||
| 280 | -/* | ||
| 281 | - * 'dispc' class | ||
| 282 | - * display controller | ||
| 283 | - */ | ||
| 284 | - | ||
| 285 | -static struct omap_hwmod_class_sysconfig omap2420_dispc_sysc = { | ||
| 286 | - .rev_offs = 0x0000, | ||
| 287 | - .sysc_offs = 0x0010, | ||
| 288 | - .syss_offs = 0x0014, | ||
| 289 | - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | | ||
| 290 | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | ||
| 291 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
| 292 | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | ||
| 293 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 294 | -}; | ||
| 295 | - | ||
| 296 | -static struct omap_hwmod_class omap2420_dispc_hwmod_class = { | ||
| 297 | - .name = "dispc", | ||
| 298 | - .sysc = &omap2420_dispc_sysc, | ||
| 299 | -}; | ||
| 300 | - | ||
| 301 | /* l4_core -> dss_dispc */ | ||
| 302 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { | ||
| 303 | .master = &omap2420_l4_core_hwmod, | ||
| 304 | @@ -1020,7 +924,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = { | ||
| 305 | |||
| 306 | static struct omap_hwmod omap2420_dss_dispc_hwmod = { | ||
| 307 | .name = "dss_dispc", | ||
| 308 | - .class = &omap2420_dispc_hwmod_class, | ||
| 309 | + .class = &omap2_dispc_hwmod_class, | ||
| 310 | .mpu_irqs = omap2_dispc_irqs, | ||
| 311 | .main_clk = "dss1_fck", | ||
| 312 | .prcm = { | ||
| 313 | @@ -1038,26 +942,6 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = { | ||
| 314 | .flags = HWMOD_NO_IDLEST, | ||
| 315 | }; | ||
| 316 | |||
| 317 | -/* | ||
| 318 | - * 'rfbi' class | ||
| 319 | - * remote frame buffer interface | ||
| 320 | - */ | ||
| 321 | - | ||
| 322 | -static struct omap_hwmod_class_sysconfig omap2420_rfbi_sysc = { | ||
| 323 | - .rev_offs = 0x0000, | ||
| 324 | - .sysc_offs = 0x0010, | ||
| 325 | - .syss_offs = 0x0014, | ||
| 326 | - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | | ||
| 327 | - SYSC_HAS_AUTOIDLE), | ||
| 328 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 329 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 330 | -}; | ||
| 331 | - | ||
| 332 | -static struct omap_hwmod_class omap2420_rfbi_hwmod_class = { | ||
| 333 | - .name = "rfbi", | ||
| 334 | - .sysc = &omap2420_rfbi_sysc, | ||
| 335 | -}; | ||
| 336 | - | ||
| 337 | /* l4_core -> dss_rfbi */ | ||
| 338 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { | ||
| 339 | .master = &omap2420_l4_core_hwmod, | ||
| 340 | @@ -1080,7 +964,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = { | ||
| 341 | |||
| 342 | static struct omap_hwmod omap2420_dss_rfbi_hwmod = { | ||
| 343 | .name = "dss_rfbi", | ||
| 344 | - .class = &omap2420_rfbi_hwmod_class, | ||
| 345 | + .class = &omap2_rfbi_hwmod_class, | ||
| 346 | .main_clk = "dss1_fck", | ||
| 347 | .prcm = { | ||
| 348 | .omap2 = { | ||
| 349 | @@ -1095,15 +979,6 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = { | ||
| 350 | .flags = HWMOD_NO_IDLEST, | ||
| 351 | }; | ||
| 352 | |||
| 353 | -/* | ||
| 354 | - * 'venc' class | ||
| 355 | - * video encoder | ||
| 356 | - */ | ||
| 357 | - | ||
| 358 | -static struct omap_hwmod_class omap2420_venc_hwmod_class = { | ||
| 359 | - .name = "venc", | ||
| 360 | -}; | ||
| 361 | - | ||
| 362 | /* l4_core -> dss_venc */ | ||
| 363 | static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { | ||
| 364 | .master = &omap2420_l4_core_hwmod, | ||
| 365 | @@ -1127,7 +1002,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = { | ||
| 366 | |||
| 367 | static struct omap_hwmod omap2420_dss_venc_hwmod = { | ||
| 368 | .name = "dss_venc", | ||
| 369 | - .class = &omap2420_venc_hwmod_class, | ||
| 370 | + .class = &omap2_venc_hwmod_class, | ||
| 371 | .main_clk = "dss1_fck", | ||
| 372 | .prcm = { | ||
| 373 | .omap2 = { | ||
| 374 | @@ -1292,27 +1167,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { | ||
| 375 | .dbck_flag = false, | ||
| 376 | }; | ||
| 377 | |||
| 378 | -static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = { | ||
| 379 | - .rev_offs = 0x0000, | ||
| 380 | - .sysc_offs = 0x0010, | ||
| 381 | - .syss_offs = 0x0014, | ||
| 382 | - .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | | ||
| 383 | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | | ||
| 384 | - SYSS_HAS_RESET_STATUS), | ||
| 385 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 386 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 387 | -}; | ||
| 388 | - | ||
| 389 | -/* | ||
| 390 | - * 'gpio' class | ||
| 391 | - * general purpose io module | ||
| 392 | - */ | ||
| 393 | -static struct omap_hwmod_class omap242x_gpio_hwmod_class = { | ||
| 394 | - .name = "gpio", | ||
| 395 | - .sysc = &omap242x_gpio_sysc, | ||
| 396 | - .rev = 0, | ||
| 397 | -}; | ||
| 398 | - | ||
| 399 | /* gpio1 */ | ||
| 400 | static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { | ||
| 401 | &omap2420_l4_wkup__gpio1, | ||
| 402 | @@ -1334,7 +1188,7 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { | ||
| 403 | }, | ||
| 404 | .slaves = omap2420_gpio1_slaves, | ||
| 405 | .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves), | ||
| 406 | - .class = &omap242x_gpio_hwmod_class, | ||
| 407 | + .class = &omap2xxx_gpio_hwmod_class, | ||
| 408 | .dev_attr = &gpio_dev_attr, | ||
| 409 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | ||
| 410 | }; | ||
| 411 | @@ -1360,7 +1214,7 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { | ||
| 412 | }, | ||
| 413 | .slaves = omap2420_gpio2_slaves, | ||
| 414 | .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves), | ||
| 415 | - .class = &omap242x_gpio_hwmod_class, | ||
| 416 | + .class = &omap2xxx_gpio_hwmod_class, | ||
| 417 | .dev_attr = &gpio_dev_attr, | ||
| 418 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | ||
| 419 | }; | ||
| 420 | @@ -1386,7 +1240,7 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { | ||
| 421 | }, | ||
| 422 | .slaves = omap2420_gpio3_slaves, | ||
| 423 | .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves), | ||
| 424 | - .class = &omap242x_gpio_hwmod_class, | ||
| 425 | + .class = &omap2xxx_gpio_hwmod_class, | ||
| 426 | .dev_attr = &gpio_dev_attr, | ||
| 427 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | ||
| 428 | }; | ||
| 429 | @@ -1412,28 +1266,11 @@ static struct omap_hwmod omap2420_gpio4_hwmod = { | ||
| 430 | }, | ||
| 431 | .slaves = omap2420_gpio4_slaves, | ||
| 432 | .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves), | ||
| 433 | - .class = &omap242x_gpio_hwmod_class, | ||
| 434 | + .class = &omap2xxx_gpio_hwmod_class, | ||
| 435 | .dev_attr = &gpio_dev_attr, | ||
| 436 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | ||
| 437 | }; | ||
| 438 | |||
| 439 | -/* system dma */ | ||
| 440 | -static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = { | ||
| 441 | - .rev_offs = 0x0000, | ||
| 442 | - .sysc_offs = 0x002c, | ||
| 443 | - .syss_offs = 0x0028, | ||
| 444 | - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | | ||
| 445 | - SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | | ||
| 446 | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 447 | - .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | ||
| 448 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 449 | -}; | ||
| 450 | - | ||
| 451 | -static struct omap_hwmod_class omap2420_dma_hwmod_class = { | ||
| 452 | - .name = "dma", | ||
| 453 | - .sysc = &omap2420_dma_sysc, | ||
| 454 | -}; | ||
| 455 | - | ||
| 456 | /* dma attributes */ | ||
| 457 | static struct omap_dma_dev_attr dma_dev_attr = { | ||
| 458 | .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | | ||
| 459 | @@ -1470,7 +1307,7 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = { | ||
| 460 | |||
| 461 | static struct omap_hwmod omap2420_dma_system_hwmod = { | ||
| 462 | .name = "dma", | ||
| 463 | - .class = &omap2420_dma_hwmod_class, | ||
| 464 | + .class = &omap2xxx_dma_hwmod_class, | ||
| 465 | .mpu_irqs = omap2_dma_system_irqs, | ||
| 466 | .main_clk = "core_l3_ck", | ||
| 467 | .slaves = omap2420_dma_system_slaves, | ||
| 468 | @@ -1482,27 +1319,6 @@ static struct omap_hwmod omap2420_dma_system_hwmod = { | ||
| 469 | .flags = HWMOD_NO_IDLEST, | ||
| 470 | }; | ||
| 471 | |||
| 472 | -/* | ||
| 473 | - * 'mailbox' class | ||
| 474 | - * mailbox module allowing communication between the on-chip processors | ||
| 475 | - * using a queued mailbox-interrupt mechanism. | ||
| 476 | - */ | ||
| 477 | - | ||
| 478 | -static struct omap_hwmod_class_sysconfig omap2420_mailbox_sysc = { | ||
| 479 | - .rev_offs = 0x000, | ||
| 480 | - .sysc_offs = 0x010, | ||
| 481 | - .syss_offs = 0x014, | ||
| 482 | - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | | ||
| 483 | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | ||
| 484 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 485 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 486 | -}; | ||
| 487 | - | ||
| 488 | -static struct omap_hwmod_class omap2420_mailbox_hwmod_class = { | ||
| 489 | - .name = "mailbox", | ||
| 490 | - .sysc = &omap2420_mailbox_sysc, | ||
| 491 | -}; | ||
| 492 | - | ||
| 493 | /* mailbox */ | ||
| 494 | static struct omap_hwmod omap2420_mailbox_hwmod; | ||
| 495 | static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { | ||
| 496 | @@ -1526,7 +1342,7 @@ static struct omap_hwmod_ocp_if *omap2420_mailbox_slaves[] = { | ||
| 497 | |||
| 498 | static struct omap_hwmod omap2420_mailbox_hwmod = { | ||
| 499 | .name = "mailbox", | ||
| 500 | - .class = &omap2420_mailbox_hwmod_class, | ||
| 501 | + .class = &omap2xxx_mailbox_hwmod_class, | ||
| 502 | .mpu_irqs = omap2420_mailbox_irqs, | ||
| 503 | .main_clk = "mailboxes_ick", | ||
| 504 | .prcm = { | ||
| 505 | @@ -1543,29 +1359,6 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { | ||
| 506 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | ||
| 507 | }; | ||
| 508 | |||
| 509 | -/* | ||
| 510 | - * 'mcspi' class | ||
| 511 | - * multichannel serial port interface (mcspi) / master/slave synchronous serial | ||
| 512 | - * bus | ||
| 513 | - */ | ||
| 514 | - | ||
| 515 | -static struct omap_hwmod_class_sysconfig omap2420_mcspi_sysc = { | ||
| 516 | - .rev_offs = 0x0000, | ||
| 517 | - .sysc_offs = 0x0010, | ||
| 518 | - .syss_offs = 0x0014, | ||
| 519 | - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | | ||
| 520 | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
| 521 | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 522 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 523 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 524 | -}; | ||
| 525 | - | ||
| 526 | -static struct omap_hwmod_class omap2420_mcspi_class = { | ||
| 527 | - .name = "mcspi", | ||
| 528 | - .sysc = &omap2420_mcspi_sysc, | ||
| 529 | - .rev = OMAP2_MCSPI_REV, | ||
| 530 | -}; | ||
| 531 | - | ||
| 532 | /* mcspi1 */ | ||
| 533 | static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { | ||
| 534 | &omap2420_l4_core__mcspi1, | ||
| 535 | @@ -1591,8 +1384,8 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { | ||
| 536 | }, | ||
| 537 | .slaves = omap2420_mcspi1_slaves, | ||
| 538 | .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves), | ||
| 539 | - .class = &omap2420_mcspi_class, | ||
| 540 | - .dev_attr = &omap_mcspi1_dev_attr, | ||
| 541 | + .class = &omap2xxx_mcspi_class, | ||
| 542 | + .dev_attr = &omap_mcspi1_dev_attr, | ||
| 543 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | ||
| 544 | }; | ||
| 545 | |||
| 546 | @@ -1621,8 +1414,8 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = { | ||
| 547 | }, | ||
| 548 | .slaves = omap2420_mcspi2_slaves, | ||
| 549 | .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves), | ||
| 550 | - .class = &omap2420_mcspi_class, | ||
| 551 | - .dev_attr = &omap_mcspi2_dev_attr, | ||
| 552 | + .class = &omap2xxx_mcspi_class, | ||
| 553 | + .dev_attr = &omap_mcspi2_dev_attr, | ||
| 554 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), | ||
| 555 | }; | ||
| 556 | |||
| 557 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 558 | index 639acd5..2a52f02 100644 | ||
| 559 | --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 560 | +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 561 | @@ -347,24 +347,6 @@ static struct omap_hwmod omap2430_iva_hwmod = { | ||
| 562 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 563 | }; | ||
| 564 | |||
| 565 | -/* Timer Common */ | ||
| 566 | -static struct omap_hwmod_class_sysconfig omap2430_timer_sysc = { | ||
| 567 | - .rev_offs = 0x0000, | ||
| 568 | - .sysc_offs = 0x0010, | ||
| 569 | - .syss_offs = 0x0014, | ||
| 570 | - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | | ||
| 571 | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
| 572 | - SYSC_HAS_AUTOIDLE), | ||
| 573 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 574 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 575 | -}; | ||
| 576 | - | ||
| 577 | -static struct omap_hwmod_class omap2430_timer_hwmod_class = { | ||
| 578 | - .name = "timer", | ||
| 579 | - .sysc = &omap2430_timer_sysc, | ||
| 580 | - .rev = OMAP_TIMER_IP_VERSION_1, | ||
| 581 | -}; | ||
| 582 | - | ||
| 583 | /* timer1 */ | ||
| 584 | static struct omap_hwmod omap2430_timer1_hwmod; | ||
| 585 | |||
| 586 | @@ -407,7 +389,7 @@ static struct omap_hwmod omap2430_timer1_hwmod = { | ||
| 587 | }, | ||
| 588 | .slaves = omap2430_timer1_slaves, | ||
| 589 | .slaves_cnt = ARRAY_SIZE(omap2430_timer1_slaves), | ||
| 590 | - .class = &omap2430_timer_hwmod_class, | ||
| 591 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 592 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 593 | }; | ||
| 594 | |||
| 595 | @@ -444,7 +426,7 @@ static struct omap_hwmod omap2430_timer2_hwmod = { | ||
| 596 | }, | ||
| 597 | .slaves = omap2430_timer2_slaves, | ||
| 598 | .slaves_cnt = ARRAY_SIZE(omap2430_timer2_slaves), | ||
| 599 | - .class = &omap2430_timer_hwmod_class, | ||
| 600 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 601 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 602 | }; | ||
| 603 | |||
| 604 | @@ -481,7 +463,7 @@ static struct omap_hwmod omap2430_timer3_hwmod = { | ||
| 605 | }, | ||
| 606 | .slaves = omap2430_timer3_slaves, | ||
| 607 | .slaves_cnt = ARRAY_SIZE(omap2430_timer3_slaves), | ||
| 608 | - .class = &omap2430_timer_hwmod_class, | ||
| 609 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 610 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 611 | }; | ||
| 612 | |||
| 613 | @@ -518,7 +500,7 @@ static struct omap_hwmod omap2430_timer4_hwmod = { | ||
| 614 | }, | ||
| 615 | .slaves = omap2430_timer4_slaves, | ||
| 616 | .slaves_cnt = ARRAY_SIZE(omap2430_timer4_slaves), | ||
| 617 | - .class = &omap2430_timer_hwmod_class, | ||
| 618 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 619 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 620 | }; | ||
| 621 | |||
| 622 | @@ -555,7 +537,7 @@ static struct omap_hwmod omap2430_timer5_hwmod = { | ||
| 623 | }, | ||
| 624 | .slaves = omap2430_timer5_slaves, | ||
| 625 | .slaves_cnt = ARRAY_SIZE(omap2430_timer5_slaves), | ||
| 626 | - .class = &omap2430_timer_hwmod_class, | ||
| 627 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 628 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 629 | }; | ||
| 630 | |||
| 631 | @@ -592,7 +574,7 @@ static struct omap_hwmod omap2430_timer6_hwmod = { | ||
| 632 | }, | ||
| 633 | .slaves = omap2430_timer6_slaves, | ||
| 634 | .slaves_cnt = ARRAY_SIZE(omap2430_timer6_slaves), | ||
| 635 | - .class = &omap2430_timer_hwmod_class, | ||
| 636 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 637 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 638 | }; | ||
| 639 | |||
| 640 | @@ -629,7 +611,7 @@ static struct omap_hwmod omap2430_timer7_hwmod = { | ||
| 641 | }, | ||
| 642 | .slaves = omap2430_timer7_slaves, | ||
| 643 | .slaves_cnt = ARRAY_SIZE(omap2430_timer7_slaves), | ||
| 644 | - .class = &omap2430_timer_hwmod_class, | ||
| 645 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 646 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 647 | }; | ||
| 648 | |||
| 649 | @@ -666,7 +648,7 @@ static struct omap_hwmod omap2430_timer8_hwmod = { | ||
| 650 | }, | ||
| 651 | .slaves = omap2430_timer8_slaves, | ||
| 652 | .slaves_cnt = ARRAY_SIZE(omap2430_timer8_slaves), | ||
| 653 | - .class = &omap2430_timer_hwmod_class, | ||
| 654 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 655 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 656 | }; | ||
| 657 | |||
| 658 | @@ -703,7 +685,7 @@ static struct omap_hwmod omap2430_timer9_hwmod = { | ||
| 659 | }, | ||
| 660 | .slaves = omap2430_timer9_slaves, | ||
| 661 | .slaves_cnt = ARRAY_SIZE(omap2430_timer9_slaves), | ||
| 662 | - .class = &omap2430_timer_hwmod_class, | ||
| 663 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 664 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 665 | }; | ||
| 666 | |||
| 667 | @@ -740,7 +722,7 @@ static struct omap_hwmod omap2430_timer10_hwmod = { | ||
| 668 | }, | ||
| 669 | .slaves = omap2430_timer10_slaves, | ||
| 670 | .slaves_cnt = ARRAY_SIZE(omap2430_timer10_slaves), | ||
| 671 | - .class = &omap2430_timer_hwmod_class, | ||
| 672 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 673 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 674 | }; | ||
| 675 | |||
| 676 | @@ -777,7 +759,7 @@ static struct omap_hwmod omap2430_timer11_hwmod = { | ||
| 677 | }, | ||
| 678 | .slaves = omap2430_timer11_slaves, | ||
| 679 | .slaves_cnt = ARRAY_SIZE(omap2430_timer11_slaves), | ||
| 680 | - .class = &omap2430_timer_hwmod_class, | ||
| 681 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 682 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 683 | }; | ||
| 684 | |||
| 685 | @@ -814,7 +796,7 @@ static struct omap_hwmod omap2430_timer12_hwmod = { | ||
| 686 | }, | ||
| 687 | .slaves = omap2430_timer12_slaves, | ||
| 688 | .slaves_cnt = ARRAY_SIZE(omap2430_timer12_slaves), | ||
| 689 | - .class = &omap2430_timer_hwmod_class, | ||
| 690 | + .class = &omap2xxx_timer_hwmod_class, | ||
| 691 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430) | ||
| 692 | }; | ||
| 693 | |||
| 694 | @@ -836,27 +818,6 @@ static struct omap_hwmod_ocp_if omap2430_l4_wkup__wd_timer2 = { | ||
| 695 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 696 | }; | ||
| 697 | |||
| 698 | -/* | ||
| 699 | - * 'wd_timer' class | ||
| 700 | - * 32-bit watchdog upward counter that generates a pulse on the reset pin on | ||
| 701 | - * overflow condition | ||
| 702 | - */ | ||
| 703 | - | ||
| 704 | -static struct omap_hwmod_class_sysconfig omap2430_wd_timer_sysc = { | ||
| 705 | - .rev_offs = 0x0, | ||
| 706 | - .sysc_offs = 0x0010, | ||
| 707 | - .syss_offs = 0x0014, | ||
| 708 | - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | | ||
| 709 | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 710 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 711 | -}; | ||
| 712 | - | ||
| 713 | -static struct omap_hwmod_class omap2430_wd_timer_hwmod_class = { | ||
| 714 | - .name = "wd_timer", | ||
| 715 | - .sysc = &omap2430_wd_timer_sysc, | ||
| 716 | - .pre_shutdown = &omap2_wd_timer_disable | ||
| 717 | -}; | ||
| 718 | - | ||
| 719 | /* wd_timer2 */ | ||
| 720 | static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { | ||
| 721 | &omap2430_l4_wkup__wd_timer2, | ||
| 722 | @@ -864,7 +825,7 @@ static struct omap_hwmod_ocp_if *omap2430_wd_timer2_slaves[] = { | ||
| 723 | |||
| 724 | static struct omap_hwmod omap2430_wd_timer2_hwmod = { | ||
| 725 | .name = "wd_timer2", | ||
| 726 | - .class = &omap2430_wd_timer_hwmod_class, | ||
| 727 | + .class = &omap2xxx_wd_timer_hwmod_class, | ||
| 728 | .main_clk = "mpu_wdt_fck", | ||
| 729 | .prcm = { | ||
| 730 | .omap2 = { | ||
| 731 | @@ -880,24 +841,6 @@ static struct omap_hwmod omap2430_wd_timer2_hwmod = { | ||
| 732 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 733 | }; | ||
| 734 | |||
| 735 | -/* UART */ | ||
| 736 | - | ||
| 737 | -static struct omap_hwmod_class_sysconfig uart_sysc = { | ||
| 738 | - .rev_offs = 0x50, | ||
| 739 | - .sysc_offs = 0x54, | ||
| 740 | - .syss_offs = 0x58, | ||
| 741 | - .sysc_flags = (SYSC_HAS_SIDLEMODE | | ||
| 742 | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
| 743 | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 744 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 745 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 746 | -}; | ||
| 747 | - | ||
| 748 | -static struct omap_hwmod_class uart_class = { | ||
| 749 | - .name = "uart", | ||
| 750 | - .sysc = &uart_sysc, | ||
| 751 | -}; | ||
| 752 | - | ||
| 753 | /* UART1 */ | ||
| 754 | |||
| 755 | static struct omap_hwmod_ocp_if *omap2430_uart1_slaves[] = { | ||
| 756 | @@ -920,7 +863,7 @@ static struct omap_hwmod omap2430_uart1_hwmod = { | ||
| 757 | }, | ||
| 758 | .slaves = omap2430_uart1_slaves, | ||
| 759 | .slaves_cnt = ARRAY_SIZE(omap2430_uart1_slaves), | ||
| 760 | - .class = &uart_class, | ||
| 761 | + .class = &omap2_uart_class, | ||
| 762 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 763 | }; | ||
| 764 | |||
| 765 | @@ -946,7 +889,7 @@ static struct omap_hwmod omap2430_uart2_hwmod = { | ||
| 766 | }, | ||
| 767 | .slaves = omap2430_uart2_slaves, | ||
| 768 | .slaves_cnt = ARRAY_SIZE(omap2430_uart2_slaves), | ||
| 769 | - .class = &uart_class, | ||
| 770 | + .class = &omap2_uart_class, | ||
| 771 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 772 | }; | ||
| 773 | |||
| 774 | @@ -972,28 +915,10 @@ static struct omap_hwmod omap2430_uart3_hwmod = { | ||
| 775 | }, | ||
| 776 | .slaves = omap2430_uart3_slaves, | ||
| 777 | .slaves_cnt = ARRAY_SIZE(omap2430_uart3_slaves), | ||
| 778 | - .class = &uart_class, | ||
| 779 | + .class = &omap2_uart_class, | ||
| 780 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 781 | }; | ||
| 782 | |||
| 783 | -/* | ||
| 784 | - * 'dss' class | ||
| 785 | - * display sub-system | ||
| 786 | - */ | ||
| 787 | - | ||
| 788 | -static struct omap_hwmod_class_sysconfig omap2430_dss_sysc = { | ||
| 789 | - .rev_offs = 0x0000, | ||
| 790 | - .sysc_offs = 0x0010, | ||
| 791 | - .syss_offs = 0x0014, | ||
| 792 | - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | ||
| 793 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 794 | -}; | ||
| 795 | - | ||
| 796 | -static struct omap_hwmod_class omap2430_dss_hwmod_class = { | ||
| 797 | - .name = "dss", | ||
| 798 | - .sysc = &omap2430_dss_sysc, | ||
| 799 | -}; | ||
| 800 | - | ||
| 801 | /* dss */ | ||
| 802 | /* dss master ports */ | ||
| 803 | static struct omap_hwmod_ocp_if *omap2430_dss_masters[] = { | ||
| 804 | @@ -1021,7 +946,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { | ||
| 805 | |||
| 806 | static struct omap_hwmod omap2430_dss_core_hwmod = { | ||
| 807 | .name = "dss_core", | ||
| 808 | - .class = &omap2430_dss_hwmod_class, | ||
| 809 | + .class = &omap2_dss_hwmod_class, | ||
| 810 | .main_clk = "dss1_fck", /* instead of dss_fck */ | ||
| 811 | .sdma_reqs = omap2xxx_dss_sdma_chs, | ||
| 812 | .prcm = { | ||
| 813 | @@ -1043,27 +968,6 @@ static struct omap_hwmod omap2430_dss_core_hwmod = { | ||
| 814 | .flags = HWMOD_NO_IDLEST, | ||
| 815 | }; | ||
| 816 | |||
| 817 | -/* | ||
| 818 | - * 'dispc' class | ||
| 819 | - * display controller | ||
| 820 | - */ | ||
| 821 | - | ||
| 822 | -static struct omap_hwmod_class_sysconfig omap2430_dispc_sysc = { | ||
| 823 | - .rev_offs = 0x0000, | ||
| 824 | - .sysc_offs = 0x0010, | ||
| 825 | - .syss_offs = 0x0014, | ||
| 826 | - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | | ||
| 827 | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | ||
| 828 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
| 829 | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | ||
| 830 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 831 | -}; | ||
| 832 | - | ||
| 833 | -static struct omap_hwmod_class omap2430_dispc_hwmod_class = { | ||
| 834 | - .name = "dispc", | ||
| 835 | - .sysc = &omap2430_dispc_sysc, | ||
| 836 | -}; | ||
| 837 | - | ||
| 838 | /* l4_core -> dss_dispc */ | ||
| 839 | static struct omap_hwmod_ocp_if omap2430_l4_core__dss_dispc = { | ||
| 840 | .master = &omap2430_l4_core_hwmod, | ||
| 841 | @@ -1080,7 +984,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_dispc_slaves[] = { | ||
| 842 | |||
| 843 | static struct omap_hwmod omap2430_dss_dispc_hwmod = { | ||
| 844 | .name = "dss_dispc", | ||
| 845 | - .class = &omap2430_dispc_hwmod_class, | ||
| 846 | + .class = &omap2_dispc_hwmod_class, | ||
| 847 | .mpu_irqs = omap2_dispc_irqs, | ||
| 848 | .main_clk = "dss1_fck", | ||
| 849 | .prcm = { | ||
| 850 | @@ -1098,26 +1002,6 @@ static struct omap_hwmod omap2430_dss_dispc_hwmod = { | ||
| 851 | .flags = HWMOD_NO_IDLEST, | ||
| 852 | }; | ||
| 853 | |||
| 854 | -/* | ||
| 855 | - * 'rfbi' class | ||
| 856 | - * remote frame buffer interface | ||
| 857 | - */ | ||
| 858 | - | ||
| 859 | -static struct omap_hwmod_class_sysconfig omap2430_rfbi_sysc = { | ||
| 860 | - .rev_offs = 0x0000, | ||
| 861 | - .sysc_offs = 0x0010, | ||
| 862 | - .syss_offs = 0x0014, | ||
| 863 | - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | | ||
| 864 | - SYSC_HAS_AUTOIDLE), | ||
| 865 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 866 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 867 | -}; | ||
| 868 | - | ||
| 869 | -static struct omap_hwmod_class omap2430_rfbi_hwmod_class = { | ||
| 870 | - .name = "rfbi", | ||
| 871 | - .sysc = &omap2430_rfbi_sysc, | ||
| 872 | -}; | ||
| 873 | - | ||
| 874 | /* l4_core -> dss_rfbi */ | ||
| 875 | static struct omap_hwmod_ocp_if omap2430_l4_core__dss_rfbi = { | ||
| 876 | .master = &omap2430_l4_core_hwmod, | ||
| 877 | @@ -1134,7 +1018,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_rfbi_slaves[] = { | ||
| 878 | |||
| 879 | static struct omap_hwmod omap2430_dss_rfbi_hwmod = { | ||
| 880 | .name = "dss_rfbi", | ||
| 881 | - .class = &omap2430_rfbi_hwmod_class, | ||
| 882 | + .class = &omap2_rfbi_hwmod_class, | ||
| 883 | .main_clk = "dss1_fck", | ||
| 884 | .prcm = { | ||
| 885 | .omap2 = { | ||
| 886 | @@ -1149,15 +1033,6 @@ static struct omap_hwmod omap2430_dss_rfbi_hwmod = { | ||
| 887 | .flags = HWMOD_NO_IDLEST, | ||
| 888 | }; | ||
| 889 | |||
| 890 | -/* | ||
| 891 | - * 'venc' class | ||
| 892 | - * video encoder | ||
| 893 | - */ | ||
| 894 | - | ||
| 895 | -static struct omap_hwmod_class omap2430_venc_hwmod_class = { | ||
| 896 | - .name = "venc", | ||
| 897 | -}; | ||
| 898 | - | ||
| 899 | /* l4_core -> dss_venc */ | ||
| 900 | static struct omap_hwmod_ocp_if omap2430_l4_core__dss_venc = { | ||
| 901 | .master = &omap2430_l4_core_hwmod, | ||
| 902 | @@ -1175,7 +1050,7 @@ static struct omap_hwmod_ocp_if *omap2430_dss_venc_slaves[] = { | ||
| 903 | |||
| 904 | static struct omap_hwmod omap2430_dss_venc_hwmod = { | ||
| 905 | .name = "dss_venc", | ||
| 906 | - .class = &omap2430_venc_hwmod_class, | ||
| 907 | + .class = &omap2_venc_hwmod_class, | ||
| 908 | .main_clk = "dss1_fck", | ||
| 909 | .prcm = { | ||
| 910 | .omap2 = { | ||
| 911 | @@ -1367,27 +1242,6 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { | ||
| 912 | .dbck_flag = false, | ||
| 913 | }; | ||
| 914 | |||
| 915 | -static struct omap_hwmod_class_sysconfig omap243x_gpio_sysc = { | ||
| 916 | - .rev_offs = 0x0000, | ||
| 917 | - .sysc_offs = 0x0010, | ||
| 918 | - .syss_offs = 0x0014, | ||
| 919 | - .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | | ||
| 920 | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | | ||
| 921 | - SYSS_HAS_RESET_STATUS), | ||
| 922 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 923 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 924 | -}; | ||
| 925 | - | ||
| 926 | -/* | ||
| 927 | - * 'gpio' class | ||
| 928 | - * general purpose io module | ||
| 929 | - */ | ||
| 930 | -static struct omap_hwmod_class omap243x_gpio_hwmod_class = { | ||
| 931 | - .name = "gpio", | ||
| 932 | - .sysc = &omap243x_gpio_sysc, | ||
| 933 | - .rev = 0, | ||
| 934 | -}; | ||
| 935 | - | ||
| 936 | /* gpio1 */ | ||
| 937 | static struct omap_hwmod_ocp_if *omap2430_gpio1_slaves[] = { | ||
| 938 | &omap2430_l4_wkup__gpio1, | ||
| 939 | @@ -1409,7 +1263,7 @@ static struct omap_hwmod omap2430_gpio1_hwmod = { | ||
| 940 | }, | ||
| 941 | .slaves = omap2430_gpio1_slaves, | ||
| 942 | .slaves_cnt = ARRAY_SIZE(omap2430_gpio1_slaves), | ||
| 943 | - .class = &omap243x_gpio_hwmod_class, | ||
| 944 | + .class = &omap2xxx_gpio_hwmod_class, | ||
| 945 | .dev_attr = &gpio_dev_attr, | ||
| 946 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 947 | }; | ||
| 948 | @@ -1435,7 +1289,7 @@ static struct omap_hwmod omap2430_gpio2_hwmod = { | ||
| 949 | }, | ||
| 950 | .slaves = omap2430_gpio2_slaves, | ||
| 951 | .slaves_cnt = ARRAY_SIZE(omap2430_gpio2_slaves), | ||
| 952 | - .class = &omap243x_gpio_hwmod_class, | ||
| 953 | + .class = &omap2xxx_gpio_hwmod_class, | ||
| 954 | .dev_attr = &gpio_dev_attr, | ||
| 955 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 956 | }; | ||
| 957 | @@ -1461,7 +1315,7 @@ static struct omap_hwmod omap2430_gpio3_hwmod = { | ||
| 958 | }, | ||
| 959 | .slaves = omap2430_gpio3_slaves, | ||
| 960 | .slaves_cnt = ARRAY_SIZE(omap2430_gpio3_slaves), | ||
| 961 | - .class = &omap243x_gpio_hwmod_class, | ||
| 962 | + .class = &omap2xxx_gpio_hwmod_class, | ||
| 963 | .dev_attr = &gpio_dev_attr, | ||
| 964 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 965 | }; | ||
| 966 | @@ -1487,7 +1341,7 @@ static struct omap_hwmod omap2430_gpio4_hwmod = { | ||
| 967 | }, | ||
| 968 | .slaves = omap2430_gpio4_slaves, | ||
| 969 | .slaves_cnt = ARRAY_SIZE(omap2430_gpio4_slaves), | ||
| 970 | - .class = &omap243x_gpio_hwmod_class, | ||
| 971 | + .class = &omap2xxx_gpio_hwmod_class, | ||
| 972 | .dev_attr = &gpio_dev_attr, | ||
| 973 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 974 | }; | ||
| 975 | @@ -1518,28 +1372,11 @@ static struct omap_hwmod omap2430_gpio5_hwmod = { | ||
| 976 | }, | ||
| 977 | .slaves = omap2430_gpio5_slaves, | ||
| 978 | .slaves_cnt = ARRAY_SIZE(omap2430_gpio5_slaves), | ||
| 979 | - .class = &omap243x_gpio_hwmod_class, | ||
| 980 | + .class = &omap2xxx_gpio_hwmod_class, | ||
| 981 | .dev_attr = &gpio_dev_attr, | ||
| 982 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 983 | }; | ||
| 984 | |||
| 985 | -/* dma_system */ | ||
| 986 | -static struct omap_hwmod_class_sysconfig omap2430_dma_sysc = { | ||
| 987 | - .rev_offs = 0x0000, | ||
| 988 | - .sysc_offs = 0x002c, | ||
| 989 | - .syss_offs = 0x0028, | ||
| 990 | - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | | ||
| 991 | - SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | | ||
| 992 | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 993 | - .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | ||
| 994 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 995 | -}; | ||
| 996 | - | ||
| 997 | -static struct omap_hwmod_class omap2430_dma_hwmod_class = { | ||
| 998 | - .name = "dma", | ||
| 999 | - .sysc = &omap2430_dma_sysc, | ||
| 1000 | -}; | ||
| 1001 | - | ||
| 1002 | /* dma attributes */ | ||
| 1003 | static struct omap_dma_dev_attr dma_dev_attr = { | ||
| 1004 | .dev_caps = RESERVE_CHANNEL | DMA_LINKED_LCH | GLOBAL_PRIORITY | | ||
| 1005 | @@ -1576,7 +1413,7 @@ static struct omap_hwmod_ocp_if *omap2430_dma_system_slaves[] = { | ||
| 1006 | |||
| 1007 | static struct omap_hwmod omap2430_dma_system_hwmod = { | ||
| 1008 | .name = "dma", | ||
| 1009 | - .class = &omap2430_dma_hwmod_class, | ||
| 1010 | + .class = &omap2xxx_dma_hwmod_class, | ||
| 1011 | .mpu_irqs = omap2_dma_system_irqs, | ||
| 1012 | .main_clk = "core_l3_ck", | ||
| 1013 | .slaves = omap2430_dma_system_slaves, | ||
| 1014 | @@ -1588,27 +1425,6 @@ static struct omap_hwmod omap2430_dma_system_hwmod = { | ||
| 1015 | .flags = HWMOD_NO_IDLEST, | ||
| 1016 | }; | ||
| 1017 | |||
| 1018 | -/* | ||
| 1019 | - * 'mailbox' class | ||
| 1020 | - * mailbox module allowing communication between the on-chip processors | ||
| 1021 | - * using a queued mailbox-interrupt mechanism. | ||
| 1022 | - */ | ||
| 1023 | - | ||
| 1024 | -static struct omap_hwmod_class_sysconfig omap2430_mailbox_sysc = { | ||
| 1025 | - .rev_offs = 0x000, | ||
| 1026 | - .sysc_offs = 0x010, | ||
| 1027 | - .syss_offs = 0x014, | ||
| 1028 | - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | | ||
| 1029 | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | ||
| 1030 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 1031 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1032 | -}; | ||
| 1033 | - | ||
| 1034 | -static struct omap_hwmod_class omap2430_mailbox_hwmod_class = { | ||
| 1035 | - .name = "mailbox", | ||
| 1036 | - .sysc = &omap2430_mailbox_sysc, | ||
| 1037 | -}; | ||
| 1038 | - | ||
| 1039 | /* mailbox */ | ||
| 1040 | static struct omap_hwmod omap2430_mailbox_hwmod; | ||
| 1041 | static struct omap_hwmod_irq_info omap2430_mailbox_irqs[] = { | ||
| 1042 | @@ -1631,7 +1447,7 @@ static struct omap_hwmod_ocp_if *omap2430_mailbox_slaves[] = { | ||
| 1043 | |||
| 1044 | static struct omap_hwmod omap2430_mailbox_hwmod = { | ||
| 1045 | .name = "mailbox", | ||
| 1046 | - .class = &omap2430_mailbox_hwmod_class, | ||
| 1047 | + .class = &omap2xxx_mailbox_hwmod_class, | ||
| 1048 | .mpu_irqs = omap2430_mailbox_irqs, | ||
| 1049 | .main_clk = "mailboxes_ick", | ||
| 1050 | .prcm = { | ||
| 1051 | @@ -1648,29 +1464,6 @@ static struct omap_hwmod omap2430_mailbox_hwmod = { | ||
| 1052 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 1053 | }; | ||
| 1054 | |||
| 1055 | -/* | ||
| 1056 | - * 'mcspi' class | ||
| 1057 | - * multichannel serial port interface (mcspi) / master/slave synchronous serial | ||
| 1058 | - * bus | ||
| 1059 | - */ | ||
| 1060 | - | ||
| 1061 | -static struct omap_hwmod_class_sysconfig omap2430_mcspi_sysc = { | ||
| 1062 | - .rev_offs = 0x0000, | ||
| 1063 | - .sysc_offs = 0x0010, | ||
| 1064 | - .syss_offs = 0x0014, | ||
| 1065 | - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | | ||
| 1066 | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
| 1067 | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 1068 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 1069 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1070 | -}; | ||
| 1071 | - | ||
| 1072 | -static struct omap_hwmod_class omap2430_mcspi_class = { | ||
| 1073 | - .name = "mcspi", | ||
| 1074 | - .sysc = &omap2430_mcspi_sysc, | ||
| 1075 | - .rev = OMAP2_MCSPI_REV, | ||
| 1076 | -}; | ||
| 1077 | - | ||
| 1078 | /* mcspi1 */ | ||
| 1079 | static struct omap_hwmod_ocp_if *omap2430_mcspi1_slaves[] = { | ||
| 1080 | &omap2430_l4_core__mcspi1, | ||
| 1081 | @@ -1696,8 +1489,8 @@ static struct omap_hwmod omap2430_mcspi1_hwmod = { | ||
| 1082 | }, | ||
| 1083 | .slaves = omap2430_mcspi1_slaves, | ||
| 1084 | .slaves_cnt = ARRAY_SIZE(omap2430_mcspi1_slaves), | ||
| 1085 | - .class = &omap2430_mcspi_class, | ||
| 1086 | - .dev_attr = &omap_mcspi1_dev_attr, | ||
| 1087 | + .class = &omap2xxx_mcspi_class, | ||
| 1088 | + .dev_attr = &omap_mcspi1_dev_attr, | ||
| 1089 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 1090 | }; | ||
| 1091 | |||
| 1092 | @@ -1726,8 +1519,8 @@ static struct omap_hwmod omap2430_mcspi2_hwmod = { | ||
| 1093 | }, | ||
| 1094 | .slaves = omap2430_mcspi2_slaves, | ||
| 1095 | .slaves_cnt = ARRAY_SIZE(omap2430_mcspi2_slaves), | ||
| 1096 | - .class = &omap2430_mcspi_class, | ||
| 1097 | - .dev_attr = &omap_mcspi2_dev_attr, | ||
| 1098 | + .class = &omap2xxx_mcspi_class, | ||
| 1099 | + .dev_attr = &omap_mcspi2_dev_attr, | ||
| 1100 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 1101 | }; | ||
| 1102 | |||
| 1103 | @@ -1769,8 +1562,8 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = { | ||
| 1104 | }, | ||
| 1105 | .slaves = omap2430_mcspi3_slaves, | ||
| 1106 | .slaves_cnt = ARRAY_SIZE(omap2430_mcspi3_slaves), | ||
| 1107 | - .class = &omap2430_mcspi_class, | ||
| 1108 | - .dev_attr = &omap_mcspi3_dev_attr, | ||
| 1109 | + .class = &omap2xxx_mcspi_class, | ||
| 1110 | + .dev_attr = &omap_mcspi3_dev_attr, | ||
| 1111 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430), | ||
| 1112 | }; | ||
| 1113 | |||
| 1114 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | ||
| 1115 | index 7c4f5ab..c451729 100644 | ||
| 1116 | --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | ||
| 1117 | +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_3xxx_ipblock_data.c | ||
| 1118 | @@ -16,6 +16,164 @@ | ||
| 1119 | |||
| 1120 | #include "omap_hwmod_common_data.h" | ||
| 1121 | |||
| 1122 | +/* UART */ | ||
| 1123 | + | ||
| 1124 | +static struct omap_hwmod_class_sysconfig omap2_uart_sysc = { | ||
| 1125 | + .rev_offs = 0x50, | ||
| 1126 | + .sysc_offs = 0x54, | ||
| 1127 | + .syss_offs = 0x58, | ||
| 1128 | + .sysc_flags = (SYSC_HAS_SIDLEMODE | | ||
| 1129 | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
| 1130 | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 1131 | + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 1132 | + .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1133 | +}; | ||
| 1134 | + | ||
| 1135 | +struct omap_hwmod_class omap2_uart_class = { | ||
| 1136 | + .name = "uart", | ||
| 1137 | + .sysc = &omap2_uart_sysc, | ||
| 1138 | +}; | ||
| 1139 | + | ||
| 1140 | +/* | ||
| 1141 | + * 'dss' class | ||
| 1142 | + * display sub-system | ||
| 1143 | + */ | ||
| 1144 | + | ||
| 1145 | +static struct omap_hwmod_class_sysconfig omap2_dss_sysc = { | ||
| 1146 | + .rev_offs = 0x0000, | ||
| 1147 | + .sysc_offs = 0x0010, | ||
| 1148 | + .syss_offs = 0x0014, | ||
| 1149 | + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | ||
| 1150 | + .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1151 | +}; | ||
| 1152 | + | ||
| 1153 | +struct omap_hwmod_class omap2_dss_hwmod_class = { | ||
| 1154 | + .name = "dss", | ||
| 1155 | + .sysc = &omap2_dss_sysc, | ||
| 1156 | +}; | ||
| 1157 | + | ||
| 1158 | +/* | ||
| 1159 | + * 'dispc' class | ||
| 1160 | + * display controller | ||
| 1161 | + */ | ||
| 1162 | + | ||
| 1163 | +static struct omap_hwmod_class_sysconfig omap2_dispc_sysc = { | ||
| 1164 | + .rev_offs = 0x0000, | ||
| 1165 | + .sysc_offs = 0x0010, | ||
| 1166 | + .syss_offs = 0x0014, | ||
| 1167 | + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | | ||
| 1168 | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | ||
| 1169 | + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
| 1170 | + MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | ||
| 1171 | + .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1172 | +}; | ||
| 1173 | + | ||
| 1174 | +struct omap_hwmod_class omap2_dispc_hwmod_class = { | ||
| 1175 | + .name = "dispc", | ||
| 1176 | + .sysc = &omap2_dispc_sysc, | ||
| 1177 | +}; | ||
| 1178 | + | ||
| 1179 | +/* | ||
| 1180 | + * 'rfbi' class | ||
| 1181 | + * remote frame buffer interface | ||
| 1182 | + */ | ||
| 1183 | + | ||
| 1184 | +static struct omap_hwmod_class_sysconfig omap2_rfbi_sysc = { | ||
| 1185 | + .rev_offs = 0x0000, | ||
| 1186 | + .sysc_offs = 0x0010, | ||
| 1187 | + .syss_offs = 0x0014, | ||
| 1188 | + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | | ||
| 1189 | + SYSC_HAS_AUTOIDLE), | ||
| 1190 | + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 1191 | + .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1192 | +}; | ||
| 1193 | + | ||
| 1194 | +struct omap_hwmod_class omap2_rfbi_hwmod_class = { | ||
| 1195 | + .name = "rfbi", | ||
| 1196 | + .sysc = &omap2_rfbi_sysc, | ||
| 1197 | +}; | ||
| 1198 | + | ||
| 1199 | +/* | ||
| 1200 | + * 'venc' class | ||
| 1201 | + * video encoder | ||
| 1202 | + */ | ||
| 1203 | + | ||
| 1204 | +struct omap_hwmod_class omap2_venc_hwmod_class = { | ||
| 1205 | + .name = "venc", | ||
| 1206 | +}; | ||
| 1207 | + | ||
| 1208 | + | ||
| 1209 | +/* Common DMA request line data */ | ||
| 1210 | +struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { | ||
| 1211 | + { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | ||
| 1212 | + { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | ||
| 1213 | + { .dma_req = -1 } | ||
| 1214 | +}; | ||
| 1215 | + | ||
| 1216 | +struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { | ||
| 1217 | + { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | ||
| 1218 | + { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | ||
| 1219 | + { .dma_req = -1 } | ||
| 1220 | +}; | ||
| 1221 | + | ||
| 1222 | +struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { | ||
| 1223 | + { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | ||
| 1224 | + { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | ||
| 1225 | + { .dma_req = -1 } | ||
| 1226 | +}; | ||
| 1227 | + | ||
| 1228 | +struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { | ||
| 1229 | + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | ||
| 1230 | + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | ||
| 1231 | + { .dma_req = -1 } | ||
| 1232 | +}; | ||
| 1233 | + | ||
| 1234 | +struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { | ||
| 1235 | + { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | ||
| 1236 | + { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | ||
| 1237 | + { .dma_req = -1 } | ||
| 1238 | +}; | ||
| 1239 | + | ||
| 1240 | +struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { | ||
| 1241 | + { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ | ||
| 1242 | + { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ | ||
| 1243 | + { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ | ||
| 1244 | + { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ | ||
| 1245 | + { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ | ||
| 1246 | + { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ | ||
| 1247 | + { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ | ||
| 1248 | + { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ | ||
| 1249 | + { .dma_req = -1 } | ||
| 1250 | +}; | ||
| 1251 | + | ||
| 1252 | +struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { | ||
| 1253 | + { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ | ||
| 1254 | + { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | ||
| 1255 | + { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ | ||
| 1256 | + { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ | ||
| 1257 | + { .dma_req = -1 } | ||
| 1258 | +}; | ||
| 1259 | + | ||
| 1260 | +struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { | ||
| 1261 | + { .name = "rx", .dma_req = 32 }, | ||
| 1262 | + { .name = "tx", .dma_req = 31 }, | ||
| 1263 | + { .dma_req = -1 } | ||
| 1264 | +}; | ||
| 1265 | + | ||
| 1266 | +struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { | ||
| 1267 | + { .name = "rx", .dma_req = 34 }, | ||
| 1268 | + { .name = "tx", .dma_req = 33 }, | ||
| 1269 | + { .dma_req = -1 } | ||
| 1270 | +}; | ||
| 1271 | + | ||
| 1272 | +struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { | ||
| 1273 | + { .name = "rx", .dma_req = 18 }, | ||
| 1274 | + { .name = "tx", .dma_req = 17 }, | ||
| 1275 | + { .dma_req = -1 } | ||
| 1276 | +}; | ||
| 1277 | + | ||
| 1278 | +/* Other IP block data */ | ||
| 1279 | + | ||
| 1280 | |||
| 1281 | /* | ||
| 1282 | * omap_hwmod class data | ||
| 1283 | @@ -162,73 +320,3 @@ struct omap_hwmod_irq_info omap2_mcspi2_mpu_irqs[] = { | ||
| 1284 | { .irq = -1 } | ||
| 1285 | }; | ||
| 1286 | |||
| 1287 | -/* Common DMA request line data */ | ||
| 1288 | -struct omap_hwmod_dma_info omap2_uart1_sdma_reqs[] = { | ||
| 1289 | - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, | ||
| 1290 | - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, | ||
| 1291 | - { .dma_req = -1 } | ||
| 1292 | -}; | ||
| 1293 | - | ||
| 1294 | -struct omap_hwmod_dma_info omap2_uart2_sdma_reqs[] = { | ||
| 1295 | - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, | ||
| 1296 | - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, | ||
| 1297 | - { .dma_req = -1 } | ||
| 1298 | -}; | ||
| 1299 | - | ||
| 1300 | -struct omap_hwmod_dma_info omap2_uart3_sdma_reqs[] = { | ||
| 1301 | - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, | ||
| 1302 | - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, | ||
| 1303 | - { .dma_req = -1 } | ||
| 1304 | -}; | ||
| 1305 | - | ||
| 1306 | -struct omap_hwmod_dma_info omap2_i2c1_sdma_reqs[] = { | ||
| 1307 | - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, | ||
| 1308 | - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, | ||
| 1309 | - { .dma_req = -1 } | ||
| 1310 | -}; | ||
| 1311 | - | ||
| 1312 | -struct omap_hwmod_dma_info omap2_i2c2_sdma_reqs[] = { | ||
| 1313 | - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, | ||
| 1314 | - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, | ||
| 1315 | - { .dma_req = -1 } | ||
| 1316 | -}; | ||
| 1317 | - | ||
| 1318 | -struct omap_hwmod_dma_info omap2_mcspi1_sdma_reqs[] = { | ||
| 1319 | - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ | ||
| 1320 | - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ | ||
| 1321 | - { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ | ||
| 1322 | - { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ | ||
| 1323 | - { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ | ||
| 1324 | - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ | ||
| 1325 | - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ | ||
| 1326 | - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ | ||
| 1327 | - { .dma_req = -1 } | ||
| 1328 | -}; | ||
| 1329 | - | ||
| 1330 | -struct omap_hwmod_dma_info omap2_mcspi2_sdma_reqs[] = { | ||
| 1331 | - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ | ||
| 1332 | - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ | ||
| 1333 | - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ | ||
| 1334 | - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ | ||
| 1335 | - { .dma_req = -1 } | ||
| 1336 | -}; | ||
| 1337 | - | ||
| 1338 | -struct omap_hwmod_dma_info omap2_mcbsp1_sdma_reqs[] = { | ||
| 1339 | - { .name = "rx", .dma_req = 32 }, | ||
| 1340 | - { .name = "tx", .dma_req = 31 }, | ||
| 1341 | - { .dma_req = -1 } | ||
| 1342 | -}; | ||
| 1343 | - | ||
| 1344 | -struct omap_hwmod_dma_info omap2_mcbsp2_sdma_reqs[] = { | ||
| 1345 | - { .name = "rx", .dma_req = 34 }, | ||
| 1346 | - { .name = "tx", .dma_req = 33 }, | ||
| 1347 | - { .dma_req = -1 } | ||
| 1348 | -}; | ||
| 1349 | - | ||
| 1350 | -struct omap_hwmod_dma_info omap2_mcbsp3_sdma_reqs[] = { | ||
| 1351 | - { .name = "rx", .dma_req = 18 }, | ||
| 1352 | - { .name = "tx", .dma_req = 17 }, | ||
| 1353 | - { .dma_req = -1 } | ||
| 1354 | -}; | ||
| 1355 | - | ||
| 1356 | - | ||
| 1357 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | ||
| 1358 | index f5b63ef..177dee2 100644 | ||
| 1359 | --- a/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | ||
| 1360 | +++ b/arch/arm/mach-omap2/omap_hwmod_2xxx_ipblock_data.c | ||
| 1361 | @@ -11,10 +11,13 @@ | ||
| 1362 | #include <plat/omap_hwmod.h> | ||
| 1363 | #include <plat/serial.h> | ||
| 1364 | #include <plat/dma.h> | ||
| 1365 | +#include <plat/dmtimer.h> | ||
| 1366 | +#include <plat/mcspi.h> | ||
| 1367 | |||
| 1368 | #include <mach/irqs.h> | ||
| 1369 | |||
| 1370 | #include "omap_hwmod_common_data.h" | ||
| 1371 | +#include "wd_timer.h" | ||
| 1372 | |||
| 1373 | struct omap_hwmod_irq_info omap2xxx_timer12_mpu_irqs[] = { | ||
| 1374 | { .irq = 48, }, | ||
| 1375 | @@ -25,3 +28,123 @@ struct omap_hwmod_dma_info omap2xxx_dss_sdma_chs[] = { | ||
| 1376 | { .name = "dispc", .dma_req = 5 }, | ||
| 1377 | { .dma_req = -1 } | ||
| 1378 | }; | ||
| 1379 | +/* OMAP2xxx Timer Common */ | ||
| 1380 | +static struct omap_hwmod_class_sysconfig omap2xxx_timer_sysc = { | ||
| 1381 | + .rev_offs = 0x0000, | ||
| 1382 | + .sysc_offs = 0x0010, | ||
| 1383 | + .syss_offs = 0x0014, | ||
| 1384 | + .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | | ||
| 1385 | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
| 1386 | + SYSC_HAS_AUTOIDLE), | ||
| 1387 | + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 1388 | + .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1389 | +}; | ||
| 1390 | + | ||
| 1391 | +struct omap_hwmod_class omap2xxx_timer_hwmod_class = { | ||
| 1392 | + .name = "timer", | ||
| 1393 | + .sysc = &omap2xxx_timer_sysc, | ||
| 1394 | + .rev = OMAP_TIMER_IP_VERSION_1, | ||
| 1395 | +}; | ||
| 1396 | + | ||
| 1397 | +/* | ||
| 1398 | + * 'wd_timer' class | ||
| 1399 | + * 32-bit watchdog upward counter that generates a pulse on the reset pin on | ||
| 1400 | + * overflow condition | ||
| 1401 | + */ | ||
| 1402 | + | ||
| 1403 | +static struct omap_hwmod_class_sysconfig omap2xxx_wd_timer_sysc = { | ||
| 1404 | + .rev_offs = 0x0000, | ||
| 1405 | + .sysc_offs = 0x0010, | ||
| 1406 | + .syss_offs = 0x0014, | ||
| 1407 | + .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | | ||
| 1408 | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 1409 | + .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1410 | +}; | ||
| 1411 | + | ||
| 1412 | +struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class = { | ||
| 1413 | + .name = "wd_timer", | ||
| 1414 | + .sysc = &omap2xxx_wd_timer_sysc, | ||
| 1415 | + .pre_shutdown = &omap2_wd_timer_disable | ||
| 1416 | +}; | ||
| 1417 | + | ||
| 1418 | +/* | ||
| 1419 | + * 'gpio' class | ||
| 1420 | + * general purpose io module | ||
| 1421 | + */ | ||
| 1422 | +static struct omap_hwmod_class_sysconfig omap2xxx_gpio_sysc = { | ||
| 1423 | + .rev_offs = 0x0000, | ||
| 1424 | + .sysc_offs = 0x0010, | ||
| 1425 | + .syss_offs = 0x0014, | ||
| 1426 | + .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | | ||
| 1427 | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | | ||
| 1428 | + SYSS_HAS_RESET_STATUS), | ||
| 1429 | + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 1430 | + .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1431 | +}; | ||
| 1432 | + | ||
| 1433 | +struct omap_hwmod_class omap2xxx_gpio_hwmod_class = { | ||
| 1434 | + .name = "gpio", | ||
| 1435 | + .sysc = &omap2xxx_gpio_sysc, | ||
| 1436 | + .rev = 0, | ||
| 1437 | +}; | ||
| 1438 | + | ||
| 1439 | +/* system dma */ | ||
| 1440 | +static struct omap_hwmod_class_sysconfig omap2xxx_dma_sysc = { | ||
| 1441 | + .rev_offs = 0x0000, | ||
| 1442 | + .sysc_offs = 0x002c, | ||
| 1443 | + .syss_offs = 0x0028, | ||
| 1444 | + .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | | ||
| 1445 | + SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | | ||
| 1446 | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 1447 | + .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | ||
| 1448 | + .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1449 | +}; | ||
| 1450 | + | ||
| 1451 | +struct omap_hwmod_class omap2xxx_dma_hwmod_class = { | ||
| 1452 | + .name = "dma", | ||
| 1453 | + .sysc = &omap2xxx_dma_sysc, | ||
| 1454 | +}; | ||
| 1455 | + | ||
| 1456 | +/* | ||
| 1457 | + * 'mailbox' class | ||
| 1458 | + * mailbox module allowing communication between the on-chip processors | ||
| 1459 | + * using a queued mailbox-interrupt mechanism. | ||
| 1460 | + */ | ||
| 1461 | + | ||
| 1462 | +static struct omap_hwmod_class_sysconfig omap2xxx_mailbox_sysc = { | ||
| 1463 | + .rev_offs = 0x000, | ||
| 1464 | + .sysc_offs = 0x010, | ||
| 1465 | + .syss_offs = 0x014, | ||
| 1466 | + .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | | ||
| 1467 | + SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | ||
| 1468 | + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 1469 | + .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1470 | +}; | ||
| 1471 | + | ||
| 1472 | +struct omap_hwmod_class omap2xxx_mailbox_hwmod_class = { | ||
| 1473 | + .name = "mailbox", | ||
| 1474 | + .sysc = &omap2xxx_mailbox_sysc, | ||
| 1475 | +}; | ||
| 1476 | + | ||
| 1477 | +/* | ||
| 1478 | + * 'mcspi' class | ||
| 1479 | + * multichannel serial port interface (mcspi) / master/slave synchronous serial | ||
| 1480 | + * bus | ||
| 1481 | + */ | ||
| 1482 | + | ||
| 1483 | +static struct omap_hwmod_class_sysconfig omap2xxx_mcspi_sysc = { | ||
| 1484 | + .rev_offs = 0x0000, | ||
| 1485 | + .sysc_offs = 0x0010, | ||
| 1486 | + .syss_offs = 0x0014, | ||
| 1487 | + .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | | ||
| 1488 | + SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
| 1489 | + SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 1490 | + .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 1491 | + .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1492 | +}; | ||
| 1493 | + | ||
| 1494 | +struct omap_hwmod_class omap2xxx_mcspi_class = { | ||
| 1495 | + .name = "mcspi", | ||
| 1496 | + .sysc = &omap2xxx_mcspi_sysc, | ||
| 1497 | + .rev = OMAP2_MCSPI_REV, | ||
| 1498 | +}; | ||
| 1499 | diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1500 | index 001f67b..1a52716 100644 | ||
| 1501 | --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1502 | +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 1503 | @@ -1190,24 +1190,6 @@ static struct omap_hwmod omap3xxx_wd_timer2_hwmod = { | ||
| 1504 | .flags = HWMOD_SWSUP_SIDLE, | ||
| 1505 | }; | ||
| 1506 | |||
| 1507 | -/* UART common */ | ||
| 1508 | - | ||
| 1509 | -static struct omap_hwmod_class_sysconfig uart_sysc = { | ||
| 1510 | - .rev_offs = 0x50, | ||
| 1511 | - .sysc_offs = 0x54, | ||
| 1512 | - .syss_offs = 0x58, | ||
| 1513 | - .sysc_flags = (SYSC_HAS_SIDLEMODE | | ||
| 1514 | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | | ||
| 1515 | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), | ||
| 1516 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 1517 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1518 | -}; | ||
| 1519 | - | ||
| 1520 | -static struct omap_hwmod_class uart_class = { | ||
| 1521 | - .name = "uart", | ||
| 1522 | - .sysc = &uart_sysc, | ||
| 1523 | -}; | ||
| 1524 | - | ||
| 1525 | /* UART1 */ | ||
| 1526 | |||
| 1527 | static struct omap_hwmod_ocp_if *omap3xxx_uart1_slaves[] = { | ||
| 1528 | @@ -1230,7 +1212,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod = { | ||
| 1529 | }, | ||
| 1530 | .slaves = omap3xxx_uart1_slaves, | ||
| 1531 | .slaves_cnt = ARRAY_SIZE(omap3xxx_uart1_slaves), | ||
| 1532 | - .class = &uart_class, | ||
| 1533 | + .class = &omap2_uart_class, | ||
| 1534 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | ||
| 1535 | }; | ||
| 1536 | |||
| 1537 | @@ -1256,7 +1238,7 @@ static struct omap_hwmod omap3xxx_uart2_hwmod = { | ||
| 1538 | }, | ||
| 1539 | .slaves = omap3xxx_uart2_slaves, | ||
| 1540 | .slaves_cnt = ARRAY_SIZE(omap3xxx_uart2_slaves), | ||
| 1541 | - .class = &uart_class, | ||
| 1542 | + .class = &omap2_uart_class, | ||
| 1543 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | ||
| 1544 | }; | ||
| 1545 | |||
| 1546 | @@ -1282,7 +1264,7 @@ static struct omap_hwmod omap3xxx_uart3_hwmod = { | ||
| 1547 | }, | ||
| 1548 | .slaves = omap3xxx_uart3_slaves, | ||
| 1549 | .slaves_cnt = ARRAY_SIZE(omap3xxx_uart3_slaves), | ||
| 1550 | - .class = &uart_class, | ||
| 1551 | + .class = &omap2_uart_class, | ||
| 1552 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | ||
| 1553 | }; | ||
| 1554 | |||
| 1555 | @@ -1319,7 +1301,7 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { | ||
| 1556 | }, | ||
| 1557 | .slaves = omap3xxx_uart4_slaves, | ||
| 1558 | .slaves_cnt = ARRAY_SIZE(omap3xxx_uart4_slaves), | ||
| 1559 | - .class = &uart_class, | ||
| 1560 | + .class = &omap2_uart_class, | ||
| 1561 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3630ES1), | ||
| 1562 | }; | ||
| 1563 | |||
| 1564 | @@ -1328,24 +1310,6 @@ static struct omap_hwmod_class i2c_class = { | ||
| 1565 | .sysc = &i2c_sysc, | ||
| 1566 | }; | ||
| 1567 | |||
| 1568 | -/* | ||
| 1569 | - * 'dss' class | ||
| 1570 | - * display sub-system | ||
| 1571 | - */ | ||
| 1572 | - | ||
| 1573 | -static struct omap_hwmod_class_sysconfig omap3xxx_dss_sysc = { | ||
| 1574 | - .rev_offs = 0x0000, | ||
| 1575 | - .sysc_offs = 0x0010, | ||
| 1576 | - .syss_offs = 0x0014, | ||
| 1577 | - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | ||
| 1578 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1579 | -}; | ||
| 1580 | - | ||
| 1581 | -static struct omap_hwmod_class omap3xxx_dss_hwmod_class = { | ||
| 1582 | - .name = "dss", | ||
| 1583 | - .sysc = &omap3xxx_dss_sysc, | ||
| 1584 | -}; | ||
| 1585 | - | ||
| 1586 | static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { | ||
| 1587 | { .name = "dispc", .dma_req = 5 }, | ||
| 1588 | { .name = "dsi1", .dma_req = 74 }, | ||
| 1589 | @@ -1406,7 +1370,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { | ||
| 1590 | |||
| 1591 | static struct omap_hwmod omap3430es1_dss_core_hwmod = { | ||
| 1592 | .name = "dss_core", | ||
| 1593 | - .class = &omap3xxx_dss_hwmod_class, | ||
| 1594 | + .class = &omap2_dss_hwmod_class, | ||
| 1595 | .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ | ||
| 1596 | .sdma_reqs = omap3xxx_dss_sdma_chs, | ||
| 1597 | .prcm = { | ||
| 1598 | @@ -1430,7 +1394,7 @@ static struct omap_hwmod omap3430es1_dss_core_hwmod = { | ||
| 1599 | |||
| 1600 | static struct omap_hwmod omap3xxx_dss_core_hwmod = { | ||
| 1601 | .name = "dss_core", | ||
| 1602 | - .class = &omap3xxx_dss_hwmod_class, | ||
| 1603 | + .class = &omap2_dss_hwmod_class, | ||
| 1604 | .main_clk = "dss1_alwon_fck", /* instead of dss_fck */ | ||
| 1605 | .sdma_reqs = omap3xxx_dss_sdma_chs, | ||
| 1606 | .prcm = { | ||
| 1607 | @@ -1453,28 +1417,6 @@ static struct omap_hwmod omap3xxx_dss_core_hwmod = { | ||
| 1608 | CHIP_IS_OMAP3630ES1 | CHIP_GE_OMAP3630ES1_1), | ||
| 1609 | }; | ||
| 1610 | |||
| 1611 | -/* | ||
| 1612 | - * 'dispc' class | ||
| 1613 | - * display controller | ||
| 1614 | - */ | ||
| 1615 | - | ||
| 1616 | -static struct omap_hwmod_class_sysconfig omap3xxx_dispc_sysc = { | ||
| 1617 | - .rev_offs = 0x0000, | ||
| 1618 | - .sysc_offs = 0x0010, | ||
| 1619 | - .syss_offs = 0x0014, | ||
| 1620 | - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | | ||
| 1621 | - SYSC_HAS_MIDLEMODE | SYSC_HAS_ENAWAKEUP | | ||
| 1622 | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), | ||
| 1623 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | | ||
| 1624 | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), | ||
| 1625 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1626 | -}; | ||
| 1627 | - | ||
| 1628 | -static struct omap_hwmod_class omap3xxx_dispc_hwmod_class = { | ||
| 1629 | - .name = "dispc", | ||
| 1630 | - .sysc = &omap3xxx_dispc_sysc, | ||
| 1631 | -}; | ||
| 1632 | - | ||
| 1633 | /* l4_core -> dss_dispc */ | ||
| 1634 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dispc = { | ||
| 1635 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1636 | @@ -1498,7 +1440,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_dispc_slaves[] = { | ||
| 1637 | |||
| 1638 | static struct omap_hwmod omap3xxx_dss_dispc_hwmod = { | ||
| 1639 | .name = "dss_dispc", | ||
| 1640 | - .class = &omap3xxx_dispc_hwmod_class, | ||
| 1641 | + .class = &omap2_dispc_hwmod_class, | ||
| 1642 | .mpu_irqs = omap2_dispc_irqs, | ||
| 1643 | .main_clk = "dss1_alwon_fck", | ||
| 1644 | .prcm = { | ||
| 1645 | @@ -1580,26 +1522,6 @@ static struct omap_hwmod omap3xxx_dss_dsi1_hwmod = { | ||
| 1646 | .flags = HWMOD_NO_IDLEST, | ||
| 1647 | }; | ||
| 1648 | |||
| 1649 | -/* | ||
| 1650 | - * 'rfbi' class | ||
| 1651 | - * remote frame buffer interface | ||
| 1652 | - */ | ||
| 1653 | - | ||
| 1654 | -static struct omap_hwmod_class_sysconfig omap3xxx_rfbi_sysc = { | ||
| 1655 | - .rev_offs = 0x0000, | ||
| 1656 | - .sysc_offs = 0x0010, | ||
| 1657 | - .syss_offs = 0x0014, | ||
| 1658 | - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | | ||
| 1659 | - SYSC_HAS_AUTOIDLE), | ||
| 1660 | - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), | ||
| 1661 | - .sysc_fields = &omap_hwmod_sysc_type1, | ||
| 1662 | -}; | ||
| 1663 | - | ||
| 1664 | -static struct omap_hwmod_class omap3xxx_rfbi_hwmod_class = { | ||
| 1665 | - .name = "rfbi", | ||
| 1666 | - .sysc = &omap3xxx_rfbi_sysc, | ||
| 1667 | -}; | ||
| 1668 | - | ||
| 1669 | /* l4_core -> dss_rfbi */ | ||
| 1670 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = { | ||
| 1671 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1672 | @@ -1623,7 +1545,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_rfbi_slaves[] = { | ||
| 1673 | |||
| 1674 | static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { | ||
| 1675 | .name = "dss_rfbi", | ||
| 1676 | - .class = &omap3xxx_rfbi_hwmod_class, | ||
| 1677 | + .class = &omap2_rfbi_hwmod_class, | ||
| 1678 | .main_clk = "dss1_alwon_fck", | ||
| 1679 | .prcm = { | ||
| 1680 | .omap2 = { | ||
| 1681 | @@ -1640,15 +1562,6 @@ static struct omap_hwmod omap3xxx_dss_rfbi_hwmod = { | ||
| 1682 | .flags = HWMOD_NO_IDLEST, | ||
| 1683 | }; | ||
| 1684 | |||
| 1685 | -/* | ||
| 1686 | - * 'venc' class | ||
| 1687 | - * video encoder | ||
| 1688 | - */ | ||
| 1689 | - | ||
| 1690 | -static struct omap_hwmod_class omap3xxx_venc_hwmod_class = { | ||
| 1691 | - .name = "venc", | ||
| 1692 | -}; | ||
| 1693 | - | ||
| 1694 | /* l4_core -> dss_venc */ | ||
| 1695 | static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = { | ||
| 1696 | .master = &omap3xxx_l4_core_hwmod, | ||
| 1697 | @@ -1673,7 +1586,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_venc_slaves[] = { | ||
| 1698 | |||
| 1699 | static struct omap_hwmod omap3xxx_dss_venc_hwmod = { | ||
| 1700 | .name = "dss_venc", | ||
| 1701 | - .class = &omap3xxx_venc_hwmod_class, | ||
| 1702 | + .class = &omap2_venc_hwmod_class, | ||
| 1703 | .main_clk = "dss1_alwon_fck", | ||
| 1704 | .prcm = { | ||
| 1705 | .omap2 = { | ||
| 1706 | diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.h b/arch/arm/mach-omap2/omap_hwmod_common_data.h | ||
| 1707 | index b636cf6..39a7c37 100644 | ||
| 1708 | --- a/arch/arm/mach-omap2/omap_hwmod_common_data.h | ||
| 1709 | +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.h | ||
| 1710 | @@ -98,6 +98,17 @@ extern struct omap_hwmod_class l3_hwmod_class; | ||
| 1711 | extern struct omap_hwmod_class l4_hwmod_class; | ||
| 1712 | extern struct omap_hwmod_class mpu_hwmod_class; | ||
| 1713 | extern struct omap_hwmod_class iva_hwmod_class; | ||
| 1714 | +extern struct omap_hwmod_class omap2_uart_class; | ||
| 1715 | +extern struct omap_hwmod_class omap2_dss_hwmod_class; | ||
| 1716 | +extern struct omap_hwmod_class omap2_dispc_hwmod_class; | ||
| 1717 | +extern struct omap_hwmod_class omap2_rfbi_hwmod_class; | ||
| 1718 | +extern struct omap_hwmod_class omap2_venc_hwmod_class; | ||
| 1719 | |||
| 1720 | +extern struct omap_hwmod_class omap2xxx_timer_hwmod_class; | ||
| 1721 | +extern struct omap_hwmod_class omap2xxx_wd_timer_hwmod_class; | ||
| 1722 | +extern struct omap_hwmod_class omap2xxx_gpio_hwmod_class; | ||
| 1723 | +extern struct omap_hwmod_class omap2xxx_dma_hwmod_class; | ||
| 1724 | +extern struct omap_hwmod_class omap2xxx_mailbox_hwmod_class; | ||
| 1725 | +extern struct omap_hwmod_class omap2xxx_mcspi_class; | ||
| 1726 | |||
| 1727 | #endif | ||
| 1728 | -- | ||
| 1729 | 1.7.2.5 | ||
| 1730 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0044-OMAP4-hwmod-data-Fix-L3-interconnect-data-order-and-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0044-OMAP4-hwmod-data-Fix-L3-interconnect-data-order-and-.patch deleted file mode 100644 index 0609f08a..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0044-OMAP4-hwmod-data-Fix-L3-interconnect-data-order-and-.patch +++ /dev/null | |||
| @@ -1,116 +0,0 @@ | |||
| 1 | From 9723d81494f83fd1f9beb8af0f440b0ed30435fb Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:27 -0600 | ||
| 4 | Subject: [PATCH 044/149] OMAP4: hwmod data: Fix L3 interconnect data order and alignement | ||
| 5 | |||
| 6 | Change the position of the ocp_if structure to match the template. | ||
| 7 | |||
| 8 | Remove unneeded comma at the end of address space flag field. | ||
| 9 | |||
| 10 | Remove USER_SDMA since this ocp link is only from the l3_main_1 | ||
| 11 | path that is accessible only from the MPU in that case and not | ||
| 12 | the SDMA. | ||
| 13 | |||
| 14 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 15 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 16 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 17 | --- | ||
| 18 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 27 +++++++++++++-------------- | ||
| 19 | 1 files changed, 13 insertions(+), 14 deletions(-) | ||
| 20 | |||
| 21 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 22 | index 316e922..94c0b60 100644 | ||
| 23 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 24 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 25 | @@ -216,6 +216,12 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { | ||
| 26 | }; | ||
| 27 | |||
| 28 | /* l3_main_1 interface data */ | ||
| 29 | +static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = { | ||
| 30 | + { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START }, | ||
| 31 | + { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START }, | ||
| 32 | + { .irq = -1 } | ||
| 33 | +}; | ||
| 34 | + | ||
| 35 | /* dsp -> l3_main_1 */ | ||
| 36 | static struct omap_hwmod_ocp_if omap44xx_dsp__l3_main_1 = { | ||
| 37 | .master = &omap44xx_dsp_hwmod, | ||
| 38 | @@ -264,18 +270,11 @@ static struct omap_hwmod_ocp_if omap44xx_mmc2__l3_main_1 = { | ||
| 39 | .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 40 | }; | ||
| 41 | |||
| 42 | -/* L3 target configuration and error log registers */ | ||
| 43 | -static struct omap_hwmod_irq_info omap44xx_l3_targ_irqs[] = { | ||
| 44 | - { .irq = 9 + OMAP44XX_IRQ_GIC_START }, | ||
| 45 | - { .irq = 10 + OMAP44XX_IRQ_GIC_START }, | ||
| 46 | - { .irq = -1 } | ||
| 47 | -}; | ||
| 48 | - | ||
| 49 | static struct omap_hwmod_addr_space omap44xx_l3_main_1_addrs[] = { | ||
| 50 | { | ||
| 51 | .pa_start = 0x44000000, | ||
| 52 | .pa_end = 0x44000fff, | ||
| 53 | - .flags = ADDR_TYPE_RT, | ||
| 54 | + .flags = ADDR_TYPE_RT | ||
| 55 | }, | ||
| 56 | { } | ||
| 57 | }; | ||
| 58 | @@ -286,7 +285,7 @@ static struct omap_hwmod_ocp_if omap44xx_mpu__l3_main_1 = { | ||
| 59 | .slave = &omap44xx_l3_main_1_hwmod, | ||
| 60 | .clk = "l3_div_ck", | ||
| 61 | .addr = omap44xx_l3_main_1_addrs, | ||
| 62 | - .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 63 | + .user = OCP_USER_MPU, | ||
| 64 | }; | ||
| 65 | |||
| 66 | /* l3_main_1 slave ports */ | ||
| 67 | @@ -303,9 +302,9 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { | ||
| 68 | static struct omap_hwmod omap44xx_l3_main_1_hwmod = { | ||
| 69 | .name = "l3_main_1", | ||
| 70 | .class = &omap44xx_l3_hwmod_class, | ||
| 71 | - .mpu_irqs = omap44xx_l3_targ_irqs, | ||
| 72 | .slaves = omap44xx_l3_main_1_slaves, | ||
| 73 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), | ||
| 74 | + .mpu_irqs = omap44xx_l3_main_1_irqs, | ||
| 75 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 76 | }; | ||
| 77 | |||
| 78 | @@ -354,7 +353,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_2_addrs[] = { | ||
| 79 | { | ||
| 80 | .pa_start = 0x44800000, | ||
| 81 | .pa_end = 0x44801fff, | ||
| 82 | - .flags = ADDR_TYPE_RT, | ||
| 83 | + .flags = ADDR_TYPE_RT | ||
| 84 | }, | ||
| 85 | { } | ||
| 86 | }; | ||
| 87 | @@ -365,7 +364,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_2 = { | ||
| 88 | .slave = &omap44xx_l3_main_2_hwmod, | ||
| 89 | .clk = "l3_div_ck", | ||
| 90 | .addr = omap44xx_l3_main_2_addrs, | ||
| 91 | - .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 92 | + .user = OCP_USER_MPU, | ||
| 93 | }; | ||
| 94 | |||
| 95 | /* l4_cfg -> l3_main_2 */ | ||
| 96 | @@ -409,7 +408,7 @@ static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { | ||
| 97 | { | ||
| 98 | .pa_start = 0x45000000, | ||
| 99 | .pa_end = 0x45000fff, | ||
| 100 | - .flags = ADDR_TYPE_RT, | ||
| 101 | + .flags = ADDR_TYPE_RT | ||
| 102 | }, | ||
| 103 | { } | ||
| 104 | }; | ||
| 105 | @@ -420,7 +419,7 @@ static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l3_main_3 = { | ||
| 106 | .slave = &omap44xx_l3_main_3_hwmod, | ||
| 107 | .clk = "l3_div_ck", | ||
| 108 | .addr = omap44xx_l3_main_3_addrs, | ||
| 109 | - .user = OCP_USER_MPU | OCP_USER_SDMA, | ||
| 110 | + .user = OCP_USER_MPU, | ||
| 111 | }; | ||
| 112 | |||
| 113 | /* l3_main_2 -> l3_main_3 */ | ||
| 114 | -- | ||
| 115 | 1.7.2.5 | ||
| 116 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0045-OMAP4-hwmod-data-Remove-un-needed-parens.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0045-OMAP4-hwmod-data-Remove-un-needed-parens.patch deleted file mode 100644 index eaf456e5..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0045-OMAP4-hwmod-data-Remove-un-needed-parens.patch +++ /dev/null | |||
| @@ -1,42 +0,0 @@ | |||
| 1 | From 27107815284e473d39b81df2ee65c1141f60a6cc Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:28 -0600 | ||
| 4 | Subject: [PATCH 045/149] OMAP4: hwmod data: Remove un-needed parens | ||
| 5 | |||
| 6 | A couple of parens were added around some flags. | ||
| 7 | |||
| 8 | Remove them, since they are not needed and not used | ||
| 9 | for any other hwmods. | ||
| 10 | |||
| 11 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 12 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 13 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 4 ++-- | ||
| 16 | 1 files changed, 2 insertions(+), 2 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 19 | index 94c0b60..7eed6a2 100644 | ||
| 20 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 21 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 22 | @@ -3736,7 +3736,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = { | ||
| 23 | static struct omap_hwmod omap44xx_mpu_hwmod = { | ||
| 24 | .name = "mpu", | ||
| 25 | .class = &omap44xx_mpu_hwmod_class, | ||
| 26 | - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), | ||
| 27 | + .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, | ||
| 28 | .mpu_irqs = omap44xx_mpu_irqs, | ||
| 29 | .main_clk = "dpll_mpu_m2_ck", | ||
| 30 | .prcm = { | ||
| 31 | @@ -4750,7 +4750,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = { | ||
| 32 | static struct omap_hwmod omap44xx_uart3_hwmod = { | ||
| 33 | .name = "uart3", | ||
| 34 | .class = &omap44xx_uart_hwmod_class, | ||
| 35 | - .flags = (HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET), | ||
| 36 | + .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, | ||
| 37 | .mpu_irqs = omap44xx_uart3_irqs, | ||
| 38 | .sdma_reqs = omap44xx_uart3_sdma_reqs, | ||
| 39 | .main_clk = "uart3_fck", | ||
| 40 | -- | ||
| 41 | 1.7.2.5 | ||
| 42 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0046-OMAP4-hwmod-data-Fix-bad-alignement.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0046-OMAP4-hwmod-data-Fix-bad-alignement.patch deleted file mode 100644 index b60f299c..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0046-OMAP4-hwmod-data-Fix-bad-alignement.patch +++ /dev/null | |||
| @@ -1,218 +0,0 @@ | |||
| 1 | From b3ef885514cc4b31d763b09dd78f26e2134c47c5 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:28 -0600 | ||
| 4 | Subject: [PATCH 046/149] OMAP4: hwmod data: Fix bad alignement | ||
| 5 | |||
| 6 | Fix .prcm alignement and usb_otg_hs class and hwmod structures. | ||
| 7 | |||
| 8 | Add a couple of more potential hwmods in the comment. | ||
| 9 | Remove hsi, since it is already included in the data. | ||
| 10 | |||
| 11 | Remove one blank line. | ||
| 12 | |||
| 13 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 14 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 15 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 16 | --- | ||
| 17 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 45 ++++++++++++++------------- | ||
| 18 | 1 files changed, 23 insertions(+), 22 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 21 | index 7eed6a2..1975b05 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 23 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 24 | @@ -632,7 +632,9 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = { | ||
| 25 | * gpmc | ||
| 26 | * gpu | ||
| 27 | * hdq1w | ||
| 28 | - * hsi | ||
| 29 | + * mcasp | ||
| 30 | + * mpu_c0 | ||
| 31 | + * mpu_c1 | ||
| 32 | * ocmc_ram | ||
| 33 | * ocp2scp_usb_phy | ||
| 34 | * ocp_wp_noc | ||
| 35 | @@ -740,7 +742,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { | ||
| 36 | .mpu_irqs = omap44xx_aess_irqs, | ||
| 37 | .sdma_reqs = omap44xx_aess_sdma_reqs, | ||
| 38 | .main_clk = "aess_fck", | ||
| 39 | - .prcm = { | ||
| 40 | + .prcm = { | ||
| 41 | .omap4 = { | ||
| 42 | .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL, | ||
| 43 | }, | ||
| 44 | @@ -769,7 +771,7 @@ static struct omap_hwmod_opt_clk bandgap_opt_clks[] = { | ||
| 45 | static struct omap_hwmod omap44xx_bandgap_hwmod = { | ||
| 46 | .name = "bandgap", | ||
| 47 | .class = &omap44xx_bandgap_hwmod_class, | ||
| 48 | - .prcm = { | ||
| 49 | + .prcm = { | ||
| 50 | .omap4 = { | ||
| 51 | .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, | ||
| 52 | }, | ||
| 53 | @@ -828,7 +830,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { | ||
| 54 | .class = &omap44xx_counter_hwmod_class, | ||
| 55 | .flags = HWMOD_SWSUP_SIDLE, | ||
| 56 | .main_clk = "sys_32k_ck", | ||
| 57 | - .prcm = { | ||
| 58 | + .prcm = { | ||
| 59 | .omap4 = { | ||
| 60 | .clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, | ||
| 61 | }, | ||
| 62 | @@ -1004,7 +1006,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { | ||
| 63 | .mpu_irqs = omap44xx_dmic_irqs, | ||
| 64 | .sdma_reqs = omap44xx_dmic_sdma_reqs, | ||
| 65 | .main_clk = "dmic_fck", | ||
| 66 | - .prcm = { | ||
| 67 | + .prcm = { | ||
| 68 | .omap4 = { | ||
| 69 | .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL, | ||
| 70 | }, | ||
| 71 | @@ -2094,7 +2096,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { | ||
| 72 | .class = &omap44xx_hsi_hwmod_class, | ||
| 73 | .mpu_irqs = omap44xx_hsi_irqs, | ||
| 74 | .main_clk = "hsi_fck", | ||
| 75 | - .prcm = { | ||
| 76 | + .prcm = { | ||
| 77 | .omap4 = { | ||
| 78 | .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL, | ||
| 79 | }, | ||
| 80 | @@ -2391,7 +2393,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = { | ||
| 81 | .flags = HWMOD_INIT_NO_RESET, | ||
| 82 | .rst_lines = omap44xx_ipu_c0_resets, | ||
| 83 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), | ||
| 84 | - .prcm = { | ||
| 85 | + .prcm = { | ||
| 86 | .omap4 = { | ||
| 87 | .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, | ||
| 88 | }, | ||
| 89 | @@ -2406,7 +2408,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = { | ||
| 90 | .flags = HWMOD_INIT_NO_RESET, | ||
| 91 | .rst_lines = omap44xx_ipu_c1_resets, | ||
| 92 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), | ||
| 93 | - .prcm = { | ||
| 94 | + .prcm = { | ||
| 95 | .omap4 = { | ||
| 96 | .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, | ||
| 97 | }, | ||
| 98 | @@ -2421,7 +2423,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { | ||
| 99 | .rst_lines = omap44xx_ipu_resets, | ||
| 100 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), | ||
| 101 | .main_clk = "ipu_fck", | ||
| 102 | - .prcm = { | ||
| 103 | + .prcm = { | ||
| 104 | .omap4 = { | ||
| 105 | .clkctrl_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL, | ||
| 106 | .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, | ||
| 107 | @@ -2507,7 +2509,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { | ||
| 108 | .mpu_irqs = omap44xx_iss_irqs, | ||
| 109 | .sdma_reqs = omap44xx_iss_sdma_reqs, | ||
| 110 | .main_clk = "iss_fck", | ||
| 111 | - .prcm = { | ||
| 112 | + .prcm = { | ||
| 113 | .omap4 = { | ||
| 114 | .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL, | ||
| 115 | }, | ||
| 116 | @@ -2687,7 +2689,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { | ||
| 117 | .class = &omap44xx_kbd_hwmod_class, | ||
| 118 | .mpu_irqs = omap44xx_kbd_irqs, | ||
| 119 | .main_clk = "kbd_fck", | ||
| 120 | - .prcm = { | ||
| 121 | + .prcm = { | ||
| 122 | .omap4 = { | ||
| 123 | .clkctrl_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, | ||
| 124 | }, | ||
| 125 | @@ -2751,7 +2753,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { | ||
| 126 | .name = "mailbox", | ||
| 127 | .class = &omap44xx_mailbox_hwmod_class, | ||
| 128 | .mpu_irqs = omap44xx_mailbox_irqs, | ||
| 129 | - .prcm = { | ||
| 130 | + .prcm = { | ||
| 131 | .omap4 = { | ||
| 132 | .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, | ||
| 133 | }, | ||
| 134 | @@ -3133,7 +3135,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { | ||
| 135 | .mpu_irqs = omap44xx_mcpdm_irqs, | ||
| 136 | .sdma_reqs = omap44xx_mcpdm_sdma_reqs, | ||
| 137 | .main_clk = "mcpdm_fck", | ||
| 138 | - .prcm = { | ||
| 139 | + .prcm = { | ||
| 140 | .omap4 = { | ||
| 141 | .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL, | ||
| 142 | }, | ||
| 143 | @@ -3430,7 +3432,6 @@ static struct omap_hwmod_class omap44xx_mmc_hwmod_class = { | ||
| 144 | }; | ||
| 145 | |||
| 146 | /* mmc1 */ | ||
| 147 | - | ||
| 148 | static struct omap_hwmod_irq_info omap44xx_mmc1_irqs[] = { | ||
| 149 | { .irq = 83 + OMAP44XX_IRQ_GIC_START }, | ||
| 150 | { .irq = -1 } | ||
| 151 | @@ -3481,7 +3482,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { | ||
| 152 | .mpu_irqs = omap44xx_mmc1_irqs, | ||
| 153 | .sdma_reqs = omap44xx_mmc1_sdma_reqs, | ||
| 154 | .main_clk = "mmc1_fck", | ||
| 155 | - .prcm = { | ||
| 156 | + .prcm = { | ||
| 157 | .omap4 = { | ||
| 158 | .clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, | ||
| 159 | }, | ||
| 160 | @@ -3540,7 +3541,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { | ||
| 161 | .mpu_irqs = omap44xx_mmc2_irqs, | ||
| 162 | .sdma_reqs = omap44xx_mmc2_sdma_reqs, | ||
| 163 | .main_clk = "mmc2_fck", | ||
| 164 | - .prcm = { | ||
| 165 | + .prcm = { | ||
| 166 | .omap4 = { | ||
| 167 | .clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, | ||
| 168 | }, | ||
| 169 | @@ -3594,7 +3595,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { | ||
| 170 | .mpu_irqs = omap44xx_mmc3_irqs, | ||
| 171 | .sdma_reqs = omap44xx_mmc3_sdma_reqs, | ||
| 172 | .main_clk = "mmc3_fck", | ||
| 173 | - .prcm = { | ||
| 174 | + .prcm = { | ||
| 175 | .omap4 = { | ||
| 176 | .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, | ||
| 177 | }, | ||
| 178 | @@ -3647,7 +3648,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { | ||
| 179 | |||
| 180 | .sdma_reqs = omap44xx_mmc4_sdma_reqs, | ||
| 181 | .main_clk = "mmc4_fck", | ||
| 182 | - .prcm = { | ||
| 183 | + .prcm = { | ||
| 184 | .omap4 = { | ||
| 185 | .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, | ||
| 186 | }, | ||
| 187 | @@ -3699,7 +3700,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { | ||
| 188 | .mpu_irqs = omap44xx_mmc5_irqs, | ||
| 189 | .sdma_reqs = omap44xx_mmc5_sdma_reqs, | ||
| 190 | .main_clk = "mmc5_fck", | ||
| 191 | - .prcm = { | ||
| 192 | + .prcm = { | ||
| 193 | .omap4 = { | ||
| 194 | .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, | ||
| 195 | }, | ||
| 196 | @@ -4835,8 +4836,8 @@ static struct omap_hwmod_class_sysconfig omap44xx_usb_otg_hs_sysc = { | ||
| 197 | }; | ||
| 198 | |||
| 199 | static struct omap_hwmod_class omap44xx_usb_otg_hs_hwmod_class = { | ||
| 200 | - .name = "usb_otg_hs", | ||
| 201 | - .sysc = &omap44xx_usb_otg_hs_sysc, | ||
| 202 | + .name = "usb_otg_hs", | ||
| 203 | + .sysc = &omap44xx_usb_otg_hs_sysc, | ||
| 204 | }; | ||
| 205 | |||
| 206 | /* usb_otg_hs */ | ||
| 207 | @@ -4890,7 +4891,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { | ||
| 208 | }, | ||
| 209 | }, | ||
| 210 | .opt_clks = usb_otg_hs_opt_clks, | ||
| 211 | - .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), | ||
| 212 | + .opt_clks_cnt = ARRAY_SIZE(usb_otg_hs_opt_clks), | ||
| 213 | .slaves = omap44xx_usb_otg_hs_slaves, | ||
| 214 | .slaves_cnt = ARRAY_SIZE(omap44xx_usb_otg_hs_slaves), | ||
| 215 | .masters = omap44xx_usb_otg_hs_masters, | ||
| 216 | -- | ||
| 217 | 1.7.2.5 | ||
| 218 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0047-OMAP4-hwmod-data-Align-interconnect-format-with-regu.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0047-OMAP4-hwmod-data-Align-interconnect-format-with-regu.patch deleted file mode 100644 index f4b48578..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0047-OMAP4-hwmod-data-Align-interconnect-format-with-regu.patch +++ /dev/null | |||
| @@ -1,154 +0,0 @@ | |||
| 1 | From b47c49426b8f986331816c48996d9a64f0ebc0aa Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:28 -0600 | ||
| 4 | Subject: [PATCH 047/149] OMAP4: hwmod data: Align interconnect format with regular modules | ||
| 5 | |||
| 6 | The interconnect modules were using a slightly different layout than | ||
| 7 | the regular modules. | ||
| 8 | Align the layout for better consitency. | ||
| 9 | |||
| 10 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 11 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 12 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 13 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 36 ++++++++++++++-------------- | ||
| 16 | 1 files changed, 18 insertions(+), 18 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 19 | index 1975b05..e011437 100644 | ||
| 20 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 21 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 22 | @@ -80,7 +80,12 @@ static struct omap_hwmod_class omap44xx_dmm_hwmod_class = { | ||
| 23 | .name = "dmm", | ||
| 24 | }; | ||
| 25 | |||
| 26 | -/* dmm interface data */ | ||
| 27 | +/* dmm */ | ||
| 28 | +static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { | ||
| 29 | + { .irq = 113 + OMAP44XX_IRQ_GIC_START }, | ||
| 30 | + { .irq = -1 } | ||
| 31 | +}; | ||
| 32 | + | ||
| 33 | /* l3_main_1 -> dmm */ | ||
| 34 | static struct omap_hwmod_ocp_if omap44xx_l3_main_1__dmm = { | ||
| 35 | .master = &omap44xx_l3_main_1_hwmod, | ||
| 36 | @@ -113,17 +118,12 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { | ||
| 37 | &omap44xx_mpu__dmm, | ||
| 38 | }; | ||
| 39 | |||
| 40 | -static struct omap_hwmod_irq_info omap44xx_dmm_irqs[] = { | ||
| 41 | - { .irq = 113 + OMAP44XX_IRQ_GIC_START }, | ||
| 42 | - { .irq = -1 } | ||
| 43 | -}; | ||
| 44 | - | ||
| 45 | static struct omap_hwmod omap44xx_dmm_hwmod = { | ||
| 46 | .name = "dmm", | ||
| 47 | .class = &omap44xx_dmm_hwmod_class, | ||
| 48 | + .mpu_irqs = omap44xx_dmm_irqs, | ||
| 49 | .slaves = omap44xx_dmm_slaves, | ||
| 50 | .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), | ||
| 51 | - .mpu_irqs = omap44xx_dmm_irqs, | ||
| 52 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 53 | }; | ||
| 54 | |||
| 55 | @@ -135,7 +135,7 @@ static struct omap_hwmod_class omap44xx_emif_fw_hwmod_class = { | ||
| 56 | .name = "emif_fw", | ||
| 57 | }; | ||
| 58 | |||
| 59 | -/* emif_fw interface data */ | ||
| 60 | +/* emif_fw */ | ||
| 61 | /* dmm -> emif_fw */ | ||
| 62 | static struct omap_hwmod_ocp_if omap44xx_dmm__emif_fw = { | ||
| 63 | .master = &omap44xx_dmm_hwmod, | ||
| 64 | @@ -184,7 +184,7 @@ static struct omap_hwmod_class omap44xx_l3_hwmod_class = { | ||
| 65 | .name = "l3", | ||
| 66 | }; | ||
| 67 | |||
| 68 | -/* l3_instr interface data */ | ||
| 69 | +/* l3_instr */ | ||
| 70 | /* iva -> l3_instr */ | ||
| 71 | static struct omap_hwmod_ocp_if omap44xx_iva__l3_instr = { | ||
| 72 | .master = &omap44xx_iva_hwmod, | ||
| 73 | @@ -215,7 +215,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { | ||
| 74 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 75 | }; | ||
| 76 | |||
| 77 | -/* l3_main_1 interface data */ | ||
| 78 | +/* l3_main_1 */ | ||
| 79 | static struct omap_hwmod_irq_info omap44xx_l3_main_1_irqs[] = { | ||
| 80 | { .name = "dbg_err", .irq = 9 + OMAP44XX_IRQ_GIC_START }, | ||
| 81 | { .name = "app_err", .irq = 10 + OMAP44XX_IRQ_GIC_START }, | ||
| 82 | @@ -302,13 +302,13 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { | ||
| 83 | static struct omap_hwmod omap44xx_l3_main_1_hwmod = { | ||
| 84 | .name = "l3_main_1", | ||
| 85 | .class = &omap44xx_l3_hwmod_class, | ||
| 86 | + .mpu_irqs = omap44xx_l3_main_1_irqs, | ||
| 87 | .slaves = omap44xx_l3_main_1_slaves, | ||
| 88 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), | ||
| 89 | - .mpu_irqs = omap44xx_l3_main_1_irqs, | ||
| 90 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 91 | }; | ||
| 92 | |||
| 93 | -/* l3_main_2 interface data */ | ||
| 94 | +/* l3_main_2 */ | ||
| 95 | /* dma_system -> l3_main_2 */ | ||
| 96 | static struct omap_hwmod_ocp_if omap44xx_dma_system__l3_main_2 = { | ||
| 97 | .master = &omap44xx_dma_system_hwmod, | ||
| 98 | @@ -403,7 +403,7 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { | ||
| 99 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 100 | }; | ||
| 101 | |||
| 102 | -/* l3_main_3 interface data */ | ||
| 103 | +/* l3_main_3 */ | ||
| 104 | static struct omap_hwmod_addr_space omap44xx_l3_main_3_addrs[] = { | ||
| 105 | { | ||
| 106 | .pa_start = 0x45000000, | ||
| 107 | @@ -461,7 +461,7 @@ static struct omap_hwmod_class omap44xx_l4_hwmod_class = { | ||
| 108 | .name = "l4", | ||
| 109 | }; | ||
| 110 | |||
| 111 | -/* l4_abe interface data */ | ||
| 112 | +/* l4_abe */ | ||
| 113 | /* aess -> l4_abe */ | ||
| 114 | static struct omap_hwmod_ocp_if omap44xx_aess__l4_abe = { | ||
| 115 | .master = &omap44xx_aess_hwmod, | ||
| 116 | @@ -510,7 +510,7 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = { | ||
| 117 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 118 | }; | ||
| 119 | |||
| 120 | -/* l4_cfg interface data */ | ||
| 121 | +/* l4_cfg */ | ||
| 122 | /* l3_main_1 -> l4_cfg */ | ||
| 123 | static struct omap_hwmod_ocp_if omap44xx_l3_main_1__l4_cfg = { | ||
| 124 | .master = &omap44xx_l3_main_1_hwmod, | ||
| 125 | @@ -532,7 +532,7 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { | ||
| 126 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 127 | }; | ||
| 128 | |||
| 129 | -/* l4_per interface data */ | ||
| 130 | +/* l4_per */ | ||
| 131 | /* l3_main_2 -> l4_per */ | ||
| 132 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__l4_per = { | ||
| 133 | .master = &omap44xx_l3_main_2_hwmod, | ||
| 134 | @@ -554,7 +554,7 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { | ||
| 135 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 136 | }; | ||
| 137 | |||
| 138 | -/* l4_wkup interface data */ | ||
| 139 | +/* l4_wkup */ | ||
| 140 | /* l4_cfg -> l4_wkup */ | ||
| 141 | static struct omap_hwmod_ocp_if omap44xx_l4_cfg__l4_wkup = { | ||
| 142 | .master = &omap44xx_l4_cfg_hwmod, | ||
| 143 | @@ -584,7 +584,7 @@ static struct omap_hwmod_class omap44xx_mpu_bus_hwmod_class = { | ||
| 144 | .name = "mpu_bus", | ||
| 145 | }; | ||
| 146 | |||
| 147 | -/* mpu_private interface data */ | ||
| 148 | +/* mpu_private */ | ||
| 149 | /* mpu -> mpu_private */ | ||
| 150 | static struct omap_hwmod_ocp_if omap44xx_mpu__mpu_private = { | ||
| 151 | .master = &omap44xx_mpu_hwmod, | ||
| 152 | -- | ||
| 153 | 1.7.2.5 | ||
| 154 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0048-OMAP4-clock-data-Add-sddiv-to-USB-DPLL.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0048-OMAP4-clock-data-Add-sddiv-to-USB-DPLL.patch deleted file mode 100644 index e3a50ac2..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0048-OMAP4-clock-data-Add-sddiv-to-USB-DPLL.patch +++ /dev/null | |||
| @@ -1,31 +0,0 @@ | |||
| 1 | From 4f6739c756baab556e7ad8ddb33c0d3fb822179a Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:45 -0600 | ||
| 4 | Subject: [PATCH 048/149] OMAP4: clock data: Add sddiv to USB DPLL | ||
| 5 | |||
| 6 | The USB DPLL is a J-Type DPLL with the sddiv extra parameter. Add it | ||
| 7 | in USB DPLL. | ||
| 8 | |||
| 9 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 10 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 11 | [paul@pwsan.com: dropped UNIPRO change since it is removed in a later patch] | ||
| 12 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/clock44xx_data.c | 1 + | ||
| 15 | 1 files changed, 1 insertions(+), 0 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 18 | index 8c96567..f28a9c9 100644 | ||
| 19 | --- a/arch/arm/mach-omap2/clock44xx_data.c | ||
| 20 | +++ b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 21 | @@ -1015,6 +1015,7 @@ static struct dpll_data dpll_usb_dd = { | ||
| 22 | .enable_mask = OMAP4430_DPLL_EN_MASK, | ||
| 23 | .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, | ||
| 24 | .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, | ||
| 25 | + .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, | ||
| 26 | .max_multiplier = OMAP4430_MAX_DPLL_MULT, | ||
| 27 | .max_divider = OMAP4430_MAX_DPLL_DIV, | ||
| 28 | .min_divider = 1, | ||
| 29 | -- | ||
| 30 | 1.7.2.5 | ||
| 31 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0049-OMAP4-clock-data-Remove-usb_host_fs-clkdev-with-NULL.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0049-OMAP4-clock-data-Remove-usb_host_fs-clkdev-with-NULL.patch deleted file mode 100644 index 8cb1123d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0049-OMAP4-clock-data-Remove-usb_host_fs-clkdev-with-NULL.patch +++ /dev/null | |||
| @@ -1,48 +0,0 @@ | |||
| 1 | From 776007fbd8db1764179c9cf9f93d3b5ef2fef782 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:45 -0600 | ||
| 4 | Subject: [PATCH 049/149] OMAP4: clock data: Remove usb_host_fs clkdev with NULL dev | ||
| 5 | |||
| 6 | usb_host_fs_fck does have a clkdev mapping with "usbhs-omap.0" | ||
| 7 | and "fs_fck" alias used by the driver. | ||
| 8 | The entry with NULL dev is thus not needed anymore. | ||
| 9 | |||
| 10 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 11 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 12 | Cc: Felipe Balbi <balbi@ti.com> | ||
| 13 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/clock44xx_data.c | 3 --- | ||
| 16 | 1 files changed, 0 insertions(+), 3 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 19 | index f28a9c9..0fa1cb8 100644 | ||
| 20 | --- a/arch/arm/mach-omap2/clock44xx_data.c | ||
| 21 | +++ b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 22 | @@ -3205,7 +3205,6 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 23 | CLK(NULL, "uart2_fck", &uart2_fck, CK_443X), | ||
| 24 | CLK(NULL, "uart3_fck", &uart3_fck, CK_443X), | ||
| 25 | CLK(NULL, "uart4_fck", &uart4_fck, CK_443X), | ||
| 26 | - CLK(NULL, "usb_host_fs_fck", &usb_host_fs_fck, CK_443X), | ||
| 27 | CLK("usbhs-omap.0", "fs_fck", &usb_host_fs_fck, CK_443X), | ||
| 28 | CLK(NULL, "utmi_p1_gfclk", &utmi_p1_gfclk, CK_443X), | ||
| 29 | CLK(NULL, "usb_host_hs_utmi_p1_clk", &usb_host_hs_utmi_p1_clk, CK_443X), | ||
| 30 | @@ -3217,7 +3216,6 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 31 | CLK(NULL, "usb_host_hs_hsic60m_p2_clk", &usb_host_hs_hsic60m_p2_clk, CK_443X), | ||
| 32 | CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), | ||
| 33 | CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), | ||
| 34 | - CLK(NULL, "usb_host_hs_fck", &usb_host_hs_fck, CK_443X), | ||
| 35 | CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), | ||
| 36 | CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), | ||
| 37 | CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), | ||
| 38 | @@ -3227,7 +3225,6 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 39 | CLK(NULL, "usb_tll_hs_usb_ch2_clk", &usb_tll_hs_usb_ch2_clk, CK_443X), | ||
| 40 | CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), | ||
| 41 | CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), | ||
| 42 | - CLK(NULL, "usb_tll_hs_ick", &usb_tll_hs_ick, CK_443X), | ||
| 43 | CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), | ||
| 44 | CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), | ||
| 45 | CLK(NULL, "usim_ck", &usim_ck, CK_443X), | ||
| 46 | -- | ||
| 47 | 1.7.2.5 | ||
| 48 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0050-OMAP4-clock-data-Re-order-some-clock-nodes-and-struc.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0050-OMAP4-clock-data-Re-order-some-clock-nodes-and-struc.patch deleted file mode 100644 index 24a888ca..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0050-OMAP4-clock-data-Re-order-some-clock-nodes-and-struc.patch +++ /dev/null | |||
| @@ -1,229 +0,0 @@ | |||
| 1 | From e19d3b7293245b4aad98b5ace320caad14e27c11 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:45 -0600 | ||
| 4 | Subject: [PATCH 050/149] OMAP4: clock data: Re-order some clock nodes and structure fields | ||
| 5 | |||
| 6 | A couple of fieds were edited manually and thus do not stick | ||
| 7 | to the template used by the generator and by other structures. | ||
| 8 | |||
| 9 | Move them to the correct location. | ||
| 10 | |||
| 11 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 12 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 13 | [paul@pwsan.com: dropped the UNIPRO changes since those will be removed | ||
| 14 | in a later patch] | ||
| 15 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 16 | --- | ||
| 17 | arch/arm/mach-omap2/clock44xx_data.c | 66 +++++++++++++++++---------------- | ||
| 18 | 1 files changed, 34 insertions(+), 32 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 21 | index 0fa1cb8..4b57d55 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/clock44xx_data.c | ||
| 23 | +++ b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 24 | @@ -53,9 +53,9 @@ static struct clk extalt_clkin_ck = { | ||
| 25 | static struct clk pad_clks_ck = { | ||
| 26 | .name = "pad_clks_ck", | ||
| 27 | .rate = 12000000, | ||
| 28 | - .ops = &clkops_omap2_dflt, | ||
| 29 | - .enable_reg = OMAP4430_CM_CLKSEL_ABE, | ||
| 30 | - .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT, | ||
| 31 | + .ops = &clkops_omap2_dflt, | ||
| 32 | + .enable_reg = OMAP4430_CM_CLKSEL_ABE, | ||
| 33 | + .enable_bit = OMAP4430_PAD_CLKS_GATE_SHIFT, | ||
| 34 | }; | ||
| 35 | |||
| 36 | static struct clk pad_slimbus_core_clks_ck = { | ||
| 37 | @@ -73,9 +73,9 @@ static struct clk secure_32k_clk_src_ck = { | ||
| 38 | static struct clk slimbus_clk = { | ||
| 39 | .name = "slimbus_clk", | ||
| 40 | .rate = 12000000, | ||
| 41 | - .ops = &clkops_omap2_dflt, | ||
| 42 | - .enable_reg = OMAP4430_CM_CLKSEL_ABE, | ||
| 43 | - .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT, | ||
| 44 | + .ops = &clkops_omap2_dflt, | ||
| 45 | + .enable_reg = OMAP4430_CM_CLKSEL_ABE, | ||
| 46 | + .enable_bit = OMAP4430_SLIMBUS_CLK_GATE_SHIFT, | ||
| 47 | }; | ||
| 48 | |||
| 49 | static struct clk sys_32k_ck = { | ||
| 50 | @@ -278,10 +278,10 @@ static struct clk dpll_abe_ck = { | ||
| 51 | static struct clk dpll_abe_x2_ck = { | ||
| 52 | .name = "dpll_abe_x2_ck", | ||
| 53 | .parent = &dpll_abe_ck, | ||
| 54 | + .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE, | ||
| 55 | .flags = CLOCK_CLKOUTX2, | ||
| 56 | .ops = &clkops_omap4_dpllmx_ops, | ||
| 57 | .recalc = &omap3_clkoutx2_recalc, | ||
| 58 | - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_ABE, | ||
| 59 | }; | ||
| 60 | |||
| 61 | static const struct clksel_rate div31_1to31_rates[] = { | ||
| 62 | @@ -622,11 +622,11 @@ static struct clk dpll_core_m3x2_ck = { | ||
| 63 | .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, | ||
| 64 | .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, | ||
| 65 | .ops = &clkops_omap2_dflt, | ||
| 66 | - .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, | ||
| 67 | - .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, | ||
| 68 | .recalc = &omap2_clksel_recalc, | ||
| 69 | .round_rate = &omap2_clksel_round_rate, | ||
| 70 | .set_rate = &omap2_clksel_set_rate, | ||
| 71 | + .enable_reg = OMAP4430_CM_DIV_M3_DPLL_CORE, | ||
| 72 | + .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, | ||
| 73 | }; | ||
| 74 | |||
| 75 | static struct clk dpll_core_m7x2_ck = { | ||
| 76 | @@ -850,10 +850,10 @@ static struct clk dpll_per_m2_ck = { | ||
| 77 | static struct clk dpll_per_x2_ck = { | ||
| 78 | .name = "dpll_per_x2_ck", | ||
| 79 | .parent = &dpll_per_ck, | ||
| 80 | + .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER, | ||
| 81 | .flags = CLOCK_CLKOUTX2, | ||
| 82 | .ops = &clkops_omap4_dpllmx_ops, | ||
| 83 | .recalc = &omap3_clkoutx2_recalc, | ||
| 84 | - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_PER, | ||
| 85 | }; | ||
| 86 | |||
| 87 | static const struct clksel dpll_per_m2x2_div[] = { | ||
| 88 | @@ -880,11 +880,11 @@ static struct clk dpll_per_m3x2_ck = { | ||
| 89 | .clksel_reg = OMAP4430_CM_DIV_M3_DPLL_PER, | ||
| 90 | .clksel_mask = OMAP4430_DPLL_CLKOUTHIF_DIV_MASK, | ||
| 91 | .ops = &clkops_omap2_dflt, | ||
| 92 | - .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER, | ||
| 93 | - .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, | ||
| 94 | .recalc = &omap2_clksel_recalc, | ||
| 95 | .round_rate = &omap2_clksel_round_rate, | ||
| 96 | .set_rate = &omap2_clksel_set_rate, | ||
| 97 | + .enable_reg = OMAP4430_CM_DIV_M3_DPLL_PER, | ||
| 98 | + .enable_bit = OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT, | ||
| 99 | }; | ||
| 100 | |||
| 101 | static struct clk dpll_per_m4x2_ck = { | ||
| 102 | @@ -970,8 +970,9 @@ static struct clk dpll_unipro_ck = { | ||
| 103 | static struct clk dpll_unipro_x2_ck = { | ||
| 104 | .name = "dpll_unipro_x2_ck", | ||
| 105 | .parent = &dpll_unipro_ck, | ||
| 106 | + .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, | ||
| 107 | .flags = CLOCK_CLKOUTX2, | ||
| 108 | - .ops = &clkops_null, | ||
| 109 | + .ops = &clkops_omap4_dpllmx_ops, | ||
| 110 | .recalc = &omap3_clkoutx2_recalc, | ||
| 111 | }; | ||
| 112 | |||
| 113 | @@ -1036,8 +1037,8 @@ static struct clk dpll_usb_ck = { | ||
| 114 | static struct clk dpll_usb_clkdcoldo_ck = { | ||
| 115 | .name = "dpll_usb_clkdcoldo_ck", | ||
| 116 | .parent = &dpll_usb_ck, | ||
| 117 | - .ops = &clkops_omap4_dpllmx_ops, | ||
| 118 | .clksel_reg = OMAP4430_CM_CLKDCOLDO_DPLL_USB, | ||
| 119 | + .ops = &clkops_omap4_dpllmx_ops, | ||
| 120 | .recalc = &followparent_recalc, | ||
| 121 | }; | ||
| 122 | |||
| 123 | @@ -1847,8 +1848,8 @@ static struct clk l3_instr_ick = { | ||
| 124 | .ops = &clkops_omap2_dflt, | ||
| 125 | .enable_reg = OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL, | ||
| 126 | .enable_bit = OMAP4430_MODULEMODE_HWCTRL, | ||
| 127 | - .clkdm_name = "l3_instr_clkdm", | ||
| 128 | .flags = ENABLE_ON_INIT, | ||
| 129 | + .clkdm_name = "l3_instr_clkdm", | ||
| 130 | .parent = &l3_div_ck, | ||
| 131 | .recalc = &followparent_recalc, | ||
| 132 | }; | ||
| 133 | @@ -1858,8 +1859,8 @@ static struct clk l3_main_3_ick = { | ||
| 134 | .ops = &clkops_omap2_dflt, | ||
| 135 | .enable_reg = OMAP4430_CM_L3INSTR_L3_3_CLKCTRL, | ||
| 136 | .enable_bit = OMAP4430_MODULEMODE_HWCTRL, | ||
| 137 | - .clkdm_name = "l3_instr_clkdm", | ||
| 138 | .flags = ENABLE_ON_INIT, | ||
| 139 | + .clkdm_name = "l3_instr_clkdm", | ||
| 140 | .parent = &l3_div_ck, | ||
| 141 | .recalc = &followparent_recalc, | ||
| 142 | }; | ||
| 143 | @@ -2163,8 +2164,8 @@ static struct clk ocp_wp_noc_ick = { | ||
| 144 | .ops = &clkops_omap2_dflt, | ||
| 145 | .enable_reg = OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL, | ||
| 146 | .enable_bit = OMAP4430_MODULEMODE_HWCTRL, | ||
| 147 | - .clkdm_name = "l3_instr_clkdm", | ||
| 148 | .flags = ENABLE_ON_INIT, | ||
| 149 | + .clkdm_name = "l3_instr_clkdm", | ||
| 150 | .parent = &l3_div_ck, | ||
| 151 | .recalc = &followparent_recalc, | ||
| 152 | }; | ||
| 153 | @@ -2896,6 +2897,7 @@ static struct clk auxclk2_ck = { | ||
| 154 | .enable_reg = OMAP4_SCRM_AUXCLK2, | ||
| 155 | .enable_bit = OMAP4_ENABLE_SHIFT, | ||
| 156 | }; | ||
| 157 | + | ||
| 158 | static struct clk auxclk3_ck = { | ||
| 159 | .name = "auxclk3_ck", | ||
| 160 | .parent = &sys_clkin_ck, | ||
| 161 | @@ -3217,7 +3219,6 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 162 | CLK(NULL, "usb_host_hs_hsic480m_p2_clk", &usb_host_hs_hsic480m_p2_clk, CK_443X), | ||
| 163 | CLK(NULL, "usb_host_hs_func48mclk", &usb_host_hs_func48mclk, CK_443X), | ||
| 164 | CLK("usbhs-omap.0", "hs_fck", &usb_host_hs_fck, CK_443X), | ||
| 165 | - CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), | ||
| 166 | CLK(NULL, "otg_60m_gfclk", &otg_60m_gfclk, CK_443X), | ||
| 167 | CLK(NULL, "usb_otg_hs_xclk", &usb_otg_hs_xclk, CK_443X), | ||
| 168 | CLK("musb-omap2430", "ick", &usb_otg_hs_ick, CK_443X), | ||
| 169 | @@ -3226,15 +3227,25 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 170 | CLK(NULL, "usb_tll_hs_usb_ch0_clk", &usb_tll_hs_usb_ch0_clk, CK_443X), | ||
| 171 | CLK(NULL, "usb_tll_hs_usb_ch1_clk", &usb_tll_hs_usb_ch1_clk, CK_443X), | ||
| 172 | CLK("usbhs-omap.0", "usbtll_ick", &usb_tll_hs_ick, CK_443X), | ||
| 173 | - CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), | ||
| 174 | CLK(NULL, "usim_ck", &usim_ck, CK_443X), | ||
| 175 | CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), | ||
| 176 | CLK(NULL, "usim_fck", &usim_fck, CK_443X), | ||
| 177 | CLK("omap_wdt", "fck", &wd_timer2_fck, CK_443X), | ||
| 178 | - CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X), | ||
| 179 | CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X), | ||
| 180 | CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X), | ||
| 181 | CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X), | ||
| 182 | + CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X), | ||
| 183 | + CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), | ||
| 184 | + CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), | ||
| 185 | + CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), | ||
| 186 | + CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), | ||
| 187 | + CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), | ||
| 188 | + CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X), | ||
| 189 | + CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X), | ||
| 190 | + CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X), | ||
| 191 | + CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X), | ||
| 192 | + CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X), | ||
| 193 | + CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), | ||
| 194 | CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X), | ||
| 195 | CLK(NULL, "gpt1_ick", &dummy_ck, CK_443X), | ||
| 196 | CLK(NULL, "gpt2_ick", &dummy_ck, CK_443X), | ||
| 197 | @@ -3251,6 +3262,7 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 198 | CLK("omap_i2c.2", "ick", &dummy_ck, CK_443X), | ||
| 199 | CLK("omap_i2c.3", "ick", &dummy_ck, CK_443X), | ||
| 200 | CLK("omap_i2c.4", "ick", &dummy_ck, CK_443X), | ||
| 201 | + CLK(NULL, "mailboxes_ick", &dummy_ck, CK_443X), | ||
| 202 | CLK("omap_hsmmc.0", "ick", &dummy_ck, CK_443X), | ||
| 203 | CLK("omap_hsmmc.1", "ick", &dummy_ck, CK_443X), | ||
| 204 | CLK("omap_hsmmc.2", "ick", &dummy_ck, CK_443X), | ||
| 205 | @@ -3268,19 +3280,9 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 206 | CLK(NULL, "uart2_ick", &dummy_ck, CK_443X), | ||
| 207 | CLK(NULL, "uart3_ick", &dummy_ck, CK_443X), | ||
| 208 | CLK(NULL, "uart4_ick", &dummy_ck, CK_443X), | ||
| 209 | + CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X), | ||
| 210 | + CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X), | ||
| 211 | CLK("omap_wdt", "ick", &dummy_ck, CK_443X), | ||
| 212 | - CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X), | ||
| 213 | - CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), | ||
| 214 | - CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), | ||
| 215 | - CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), | ||
| 216 | - CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), | ||
| 217 | - CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), | ||
| 218 | - CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X), | ||
| 219 | - CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X), | ||
| 220 | - CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X), | ||
| 221 | - CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X), | ||
| 222 | - CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X), | ||
| 223 | - CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), | ||
| 224 | }; | ||
| 225 | |||
| 226 | int __init omap4xxx_clk_init(void) | ||
| 227 | -- | ||
| 228 | 1.7.2.5 | ||
| 229 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0051-OMAP4-clock-data-Fix-max-mult-and-div-for-USB-DPLL.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0051-OMAP4-clock-data-Fix-max-mult-and-div-for-USB-DPLL.patch deleted file mode 100644 index c04c1925..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0051-OMAP4-clock-data-Fix-max-mult-and-div-for-USB-DPLL.patch +++ /dev/null | |||
| @@ -1,143 +0,0 @@ | |||
| 1 | From 6fdbb61306456ada90c0b0e3ee2c8245077b7b02 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:46 -0600 | ||
| 4 | Subject: [PATCH 051/149] OMAP4: clock data: Fix max mult and div for USB DPLL | ||
| 5 | |||
| 6 | The DPLL USB can generate higher speed (x2) than the regular ones. | ||
| 7 | The max multiplication value is then twice the previous value. | ||
| 8 | |||
| 9 | Fix both max_mult and max_div with that correct values. | ||
| 10 | |||
| 11 | Change the max_div variable type to u16 to allow storing up to 256. | ||
| 12 | |||
| 13 | Replace as well the define with the value to avoid | ||
| 14 | unneeded indirection and provide a better readability. | ||
| 15 | |||
| 16 | Remove the defines that become useless. | ||
| 17 | |||
| 18 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 19 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 20 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 21 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 22 | --- | ||
| 23 | arch/arm/mach-omap2/clock44xx.h | 7 ------- | ||
| 24 | arch/arm/mach-omap2/clock44xx_data.c | 29 ++++++++++++++--------------- | ||
| 25 | arch/arm/plat-omap/include/plat/clock.h | 2 +- | ||
| 26 | 3 files changed, 15 insertions(+), 23 deletions(-) | ||
| 27 | |||
| 28 | diff --git a/arch/arm/mach-omap2/clock44xx.h b/arch/arm/mach-omap2/clock44xx.h | ||
| 29 | index 6be1095..7ceb870 100644 | ||
| 30 | --- a/arch/arm/mach-omap2/clock44xx.h | ||
| 31 | +++ b/arch/arm/mach-omap2/clock44xx.h | ||
| 32 | @@ -8,13 +8,6 @@ | ||
| 33 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H | ||
| 34 | #define __ARCH_ARM_MACH_OMAP2_CLOCK44XX_H | ||
| 35 | |||
| 36 | -/* | ||
| 37 | - * XXX Missing values for the OMAP4 DPLL_USB | ||
| 38 | - * XXX Missing min_multiplier values for all OMAP4 DPLLs | ||
| 39 | - */ | ||
| 40 | -#define OMAP4430_MAX_DPLL_MULT 2047 | ||
| 41 | -#define OMAP4430_MAX_DPLL_DIV 128 | ||
| 42 | - | ||
| 43 | int omap4xxx_clk_init(void); | ||
| 44 | |||
| 45 | #endif | ||
| 46 | diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 47 | index 4b57d55..8307c9e 100644 | ||
| 48 | --- a/arch/arm/mach-omap2/clock44xx_data.c | ||
| 49 | +++ b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 50 | @@ -258,8 +258,8 @@ static struct dpll_data dpll_abe_dd = { | ||
| 51 | .enable_mask = OMAP4430_DPLL_EN_MASK, | ||
| 52 | .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, | ||
| 53 | .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, | ||
| 54 | - .max_multiplier = OMAP4430_MAX_DPLL_MULT, | ||
| 55 | - .max_divider = OMAP4430_MAX_DPLL_DIV, | ||
| 56 | + .max_multiplier = 2047, | ||
| 57 | + .max_divider = 128, | ||
| 58 | .min_divider = 1, | ||
| 59 | }; | ||
| 60 | |||
| 61 | @@ -434,8 +434,8 @@ static struct dpll_data dpll_core_dd = { | ||
| 62 | .enable_mask = OMAP4430_DPLL_EN_MASK, | ||
| 63 | .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, | ||
| 64 | .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, | ||
| 65 | - .max_multiplier = OMAP4430_MAX_DPLL_MULT, | ||
| 66 | - .max_divider = OMAP4430_MAX_DPLL_DIV, | ||
| 67 | + .max_multiplier = 2047, | ||
| 68 | + .max_divider = 128, | ||
| 69 | .min_divider = 1, | ||
| 70 | }; | ||
| 71 | |||
| 72 | @@ -672,8 +672,8 @@ static struct dpll_data dpll_iva_dd = { | ||
| 73 | .enable_mask = OMAP4430_DPLL_EN_MASK, | ||
| 74 | .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, | ||
| 75 | .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, | ||
| 76 | - .max_multiplier = OMAP4430_MAX_DPLL_MULT, | ||
| 77 | - .max_divider = OMAP4430_MAX_DPLL_DIV, | ||
| 78 | + .max_multiplier = 2047, | ||
| 79 | + .max_divider = 128, | ||
| 80 | .min_divider = 1, | ||
| 81 | }; | ||
| 82 | |||
| 83 | @@ -740,8 +740,8 @@ static struct dpll_data dpll_mpu_dd = { | ||
| 84 | .enable_mask = OMAP4430_DPLL_EN_MASK, | ||
| 85 | .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, | ||
| 86 | .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, | ||
| 87 | - .max_multiplier = OMAP4430_MAX_DPLL_MULT, | ||
| 88 | - .max_divider = OMAP4430_MAX_DPLL_DIV, | ||
| 89 | + .max_multiplier = 2047, | ||
| 90 | + .max_divider = 128, | ||
| 91 | .min_divider = 1, | ||
| 92 | }; | ||
| 93 | |||
| 94 | @@ -813,8 +813,8 @@ static struct dpll_data dpll_per_dd = { | ||
| 95 | .enable_mask = OMAP4430_DPLL_EN_MASK, | ||
| 96 | .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, | ||
| 97 | .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, | ||
| 98 | - .max_multiplier = OMAP4430_MAX_DPLL_MULT, | ||
| 99 | - .max_divider = OMAP4430_MAX_DPLL_DIV, | ||
| 100 | + .max_multiplier = 2047, | ||
| 101 | + .max_divider = 128, | ||
| 102 | .min_divider = 1, | ||
| 103 | }; | ||
| 104 | |||
| 105 | @@ -949,9 +949,8 @@ static struct dpll_data dpll_unipro_dd = { | ||
| 106 | .enable_mask = OMAP4430_DPLL_EN_MASK, | ||
| 107 | .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, | ||
| 108 | .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, | ||
| 109 | - .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, | ||
| 110 | - .max_multiplier = OMAP4430_MAX_DPLL_MULT, | ||
| 111 | - .max_divider = OMAP4430_MAX_DPLL_DIV, | ||
| 112 | + .max_multiplier = 2047, | ||
| 113 | + .max_divider = 128, | ||
| 114 | .min_divider = 1, | ||
| 115 | }; | ||
| 116 | |||
| 117 | @@ -1017,8 +1016,8 @@ static struct dpll_data dpll_usb_dd = { | ||
| 118 | .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, | ||
| 119 | .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, | ||
| 120 | .sddiv_mask = OMAP4430_DPLL_SD_DIV_MASK, | ||
| 121 | - .max_multiplier = OMAP4430_MAX_DPLL_MULT, | ||
| 122 | - .max_divider = OMAP4430_MAX_DPLL_DIV, | ||
| 123 | + .max_multiplier = 4095, | ||
| 124 | + .max_divider = 256, | ||
| 125 | .min_divider = 1, | ||
| 126 | }; | ||
| 127 | |||
| 128 | diff --git a/arch/arm/plat-omap/include/plat/clock.h b/arch/arm/plat-omap/include/plat/clock.h | ||
| 129 | index 006e599..f57e064 100644 | ||
| 130 | --- a/arch/arm/plat-omap/include/plat/clock.h | ||
| 131 | +++ b/arch/arm/plat-omap/include/plat/clock.h | ||
| 132 | @@ -152,7 +152,7 @@ struct dpll_data { | ||
| 133 | u16 max_multiplier; | ||
| 134 | u8 last_rounded_n; | ||
| 135 | u8 min_divider; | ||
| 136 | - u8 max_divider; | ||
| 137 | + u16 max_divider; | ||
| 138 | u8 modes; | ||
| 139 | #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4) | ||
| 140 | void __iomem *autoidle_reg; | ||
| 141 | -- | ||
| 142 | 1.7.2.5 | ||
| 143 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0052-OMAP4-prcm-Fix-errors-in-few-defines-name.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0052-OMAP4-prcm-Fix-errors-in-few-defines-name.patch deleted file mode 100644 index e3709923..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0052-OMAP4-prcm-Fix-errors-in-few-defines-name.patch +++ /dev/null | |||
| @@ -1,256 +0,0 @@ | |||
| 1 | From e96136d547a0de958c051e0ec6a0873f27a94537 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:15:04 -0600 | ||
| 4 | Subject: [PATCH 052/149] OMAP4: prcm: Fix errors in few defines name | ||
| 5 | |||
| 6 | A couple of macros were wrongly changed during the _MOD to _INST | ||
| 7 | rename done in the following commit: | ||
| 8 | |||
| 9 | OMAP4: PRCM: rename _MOD macros to _INST | ||
| 10 | cdb54c4457d68994da7c2e16907adfbfc130060d | ||
| 11 | |||
| 12 | Fix them to their original name. | ||
| 13 | |||
| 14 | Some CM and PRM instances were not well aligned. Align them. | ||
| 15 | |||
| 16 | Remove one blank line in cm2_44xx.h to align the output with | ||
| 17 | the other (cm1_44xx.h, prm44xx.h) files. | ||
| 18 | |||
| 19 | Update header copyright date. | ||
| 20 | |||
| 21 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 22 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 23 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 24 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 25 | --- | ||
| 26 | arch/arm/mach-omap2/cm1_44xx.h | 28 ++++++++++++++-------------- | ||
| 27 | arch/arm/mach-omap2/cm2_44xx.h | 23 +++++++++++------------ | ||
| 28 | arch/arm/mach-omap2/prm44xx.h | 22 +++++++++++----------- | ||
| 29 | 3 files changed, 36 insertions(+), 37 deletions(-) | ||
| 30 | |||
| 31 | diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h | ||
| 32 | index e2d7a56..fc649f5 100644 | ||
| 33 | --- a/arch/arm/mach-omap2/cm1_44xx.h | ||
| 34 | +++ b/arch/arm/mach-omap2/cm1_44xx.h | ||
| 35 | @@ -1,7 +1,7 @@ | ||
| 36 | /* | ||
| 37 | * OMAP44xx CM1 instance offset macros | ||
| 38 | * | ||
| 39 | - * Copyright (C) 2009-2010 Texas Instruments, Inc. | ||
| 40 | + * Copyright (C) 2009-2011 Texas Instruments, Inc. | ||
| 41 | * Copyright (C) 2009-2010 Nokia Corporation | ||
| 42 | * | ||
| 43 | * Paul Walmsley (paul@pwsan.com) | ||
| 44 | @@ -41,9 +41,9 @@ | ||
| 45 | #define OMAP4430_CM1_INSTR_INST 0x0f00 | ||
| 46 | |||
| 47 | /* CM1 clockdomain register offsets (from instance start) */ | ||
| 48 | -#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000 | ||
| 49 | -#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000 | ||
| 50 | -#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000 | ||
| 51 | +#define OMAP4430_CM1_MPU_MPU_CDOFFS 0x0000 | ||
| 52 | +#define OMAP4430_CM1_TESLA_TESLA_CDOFFS 0x0000 | ||
| 53 | +#define OMAP4430_CM1_ABE_ABE_CDOFFS 0x0000 | ||
| 54 | |||
| 55 | /* CM1 */ | ||
| 56 | |||
| 57 | @@ -82,8 +82,8 @@ | ||
| 58 | #define OMAP4430_CM_DIV_M7_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0044) | ||
| 59 | #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_OFFSET 0x0048 | ||
| 60 | #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0048) | ||
| 61 | -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_OFFSET 0x004c | ||
| 62 | -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c) | ||
| 63 | +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_CORE_OFFSET 0x004c | ||
| 64 | +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x004c) | ||
| 65 | #define OMAP4_CM_EMU_OVERRIDE_DPLL_CORE_OFFSET 0x0050 | ||
| 66 | #define OMAP4430_CM_EMU_OVERRIDE_DPLL_CORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0050) | ||
| 67 | #define OMAP4_CM_CLKMODE_DPLL_MPU_OFFSET 0x0060 | ||
| 68 | @@ -98,8 +98,8 @@ | ||
| 69 | #define OMAP4430_CM_DIV_M2_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0070) | ||
| 70 | #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_MPU_OFFSET 0x0088 | ||
| 71 | #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0088) | ||
| 72 | -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_MPU_OFFSET 0x008c | ||
| 73 | -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c) | ||
| 74 | +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_MPU_OFFSET 0x008c | ||
| 75 | +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x008c) | ||
| 76 | #define OMAP4_CM_BYPCLK_DPLL_MPU_OFFSET 0x009c | ||
| 77 | #define OMAP4430_CM_BYPCLK_DPLL_MPU OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x009c) | ||
| 78 | #define OMAP4_CM_CLKMODE_DPLL_IVA_OFFSET 0x00a0 | ||
| 79 | @@ -116,8 +116,8 @@ | ||
| 80 | #define OMAP4430_CM_DIV_M5_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00bc) | ||
| 81 | #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_IVA_OFFSET 0x00c8 | ||
| 82 | #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00c8) | ||
| 83 | -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_IVA_OFFSET 0x00cc | ||
| 84 | -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc) | ||
| 85 | +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_IVA_OFFSET 0x00cc | ||
| 86 | +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00cc) | ||
| 87 | #define OMAP4_CM_BYPCLK_DPLL_IVA_OFFSET 0x00dc | ||
| 88 | #define OMAP4430_CM_BYPCLK_DPLL_IVA OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00dc) | ||
| 89 | #define OMAP4_CM_CLKMODE_DPLL_ABE_OFFSET 0x00e0 | ||
| 90 | @@ -134,8 +134,8 @@ | ||
| 91 | #define OMAP4430_CM_DIV_M3_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x00f4) | ||
| 92 | #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_ABE_OFFSET 0x0108 | ||
| 93 | #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0108) | ||
| 94 | -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_ABE_OFFSET 0x010c | ||
| 95 | -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c) | ||
| 96 | +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_ABE_OFFSET 0x010c | ||
| 97 | +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_ABE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x010c) | ||
| 98 | #define OMAP4_CM_CLKMODE_DPLL_DDRPHY_OFFSET 0x0120 | ||
| 99 | #define OMAP4430_CM_CLKMODE_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0120) | ||
| 100 | #define OMAP4_CM_IDLEST_DPLL_DDRPHY_OFFSET 0x0124 | ||
| 101 | @@ -154,8 +154,8 @@ | ||
| 102 | #define OMAP4430_CM_DIV_M6_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0140) | ||
| 103 | #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_DDRPHY_OFFSET 0x0148 | ||
| 104 | #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0148) | ||
| 105 | -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_DDRPHY_OFFSET 0x014c | ||
| 106 | -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c) | ||
| 107 | +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_DDRPHY_OFFSET 0x014c | ||
| 108 | +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_DDRPHY OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x014c) | ||
| 109 | #define OMAP4_CM_SHADOW_FREQ_CONFIG1_OFFSET 0x0160 | ||
| 110 | #define OMAP4430_CM_SHADOW_FREQ_CONFIG1 OMAP44XX_CM1_REGADDR(OMAP4430_CM1_CKGEN_INST, 0x0160) | ||
| 111 | #define OMAP4_CM_SHADOW_FREQ_CONFIG2_OFFSET 0x0164 | ||
| 112 | diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h | ||
| 113 | index aa47450..8036a16 100644 | ||
| 114 | --- a/arch/arm/mach-omap2/cm2_44xx.h | ||
| 115 | +++ b/arch/arm/mach-omap2/cm2_44xx.h | ||
| 116 | @@ -1,7 +1,7 @@ | ||
| 117 | /* | ||
| 118 | * OMAP44xx CM2 instance offset macros | ||
| 119 | * | ||
| 120 | - * Copyright (C) 2009-2010 Texas Instruments, Inc. | ||
| 121 | + * Copyright (C) 2009-2011 Texas Instruments, Inc. | ||
| 122 | * Copyright (C) 2009-2010 Nokia Corporation | ||
| 123 | * | ||
| 124 | * Paul Walmsley (paul@pwsan.com) | ||
| 125 | @@ -40,9 +40,9 @@ | ||
| 126 | #define OMAP4430_CM2_CAM_INST 0x1000 | ||
| 127 | #define OMAP4430_CM2_DSS_INST 0x1100 | ||
| 128 | #define OMAP4430_CM2_GFX_INST 0x1200 | ||
| 129 | -#define OMAP4430_CM2_L3INIT_INST 0x1300 | ||
| 130 | +#define OMAP4430_CM2_L3INIT_INST 0x1300 | ||
| 131 | #define OMAP4430_CM2_L4PER_INST 0x1400 | ||
| 132 | -#define OMAP4430_CM2_CEFUSE_INST 0x1600 | ||
| 133 | +#define OMAP4430_CM2_CEFUSE_INST 0x1600 | ||
| 134 | #define OMAP4430_CM2_RESTORE_INST 0x1e00 | ||
| 135 | #define OMAP4430_CM2_INSTR_INST 0x1f00 | ||
| 136 | |||
| 137 | @@ -65,7 +65,6 @@ | ||
| 138 | #define OMAP4430_CM2_L4PER_L4SEC_CDOFFS 0x0180 | ||
| 139 | #define OMAP4430_CM2_CEFUSE_CEFUSE_CDOFFS 0x0000 | ||
| 140 | |||
| 141 | - | ||
| 142 | /* CM2 */ | ||
| 143 | |||
| 144 | /* CM2.OCP_SOCKET_CM2 register offsets */ | ||
| 145 | @@ -121,8 +120,8 @@ | ||
| 146 | #define OMAP4430_CM_DIV_M7_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0064) | ||
| 147 | #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_PER_OFFSET 0x0068 | ||
| 148 | #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0068) | ||
| 149 | -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_PER_OFFSET 0x006c | ||
| 150 | -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) | ||
| 151 | +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_PER_OFFSET 0x006c | ||
| 152 | +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_PER OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x006c) | ||
| 153 | #define OMAP4_CM_CLKMODE_DPLL_USB_OFFSET 0x0080 | ||
| 154 | #define OMAP4430_CM_CLKMODE_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0080) | ||
| 155 | #define OMAP4_CM_IDLEST_DPLL_USB_OFFSET 0x0084 | ||
| 156 | @@ -135,8 +134,8 @@ | ||
| 157 | #define OMAP4430_CM_DIV_M2_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x0090) | ||
| 158 | #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_USB_OFFSET 0x00a8 | ||
| 159 | #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00a8) | ||
| 160 | -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_USB_OFFSET 0x00ac | ||
| 161 | -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) | ||
| 162 | +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_USB_OFFSET 0x00ac | ||
| 163 | +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ac) | ||
| 164 | #define OMAP4_CM_CLKDCOLDO_DPLL_USB_OFFSET 0x00b4 | ||
| 165 | #define OMAP4430_CM_CLKDCOLDO_DPLL_USB OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00b4) | ||
| 166 | #define OMAP4_CM_CLKMODE_DPLL_UNIPRO_OFFSET 0x00c0 | ||
| 167 | @@ -151,8 +150,8 @@ | ||
| 168 | #define OMAP4430_CM_DIV_M2_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00d0) | ||
| 169 | #define OMAP4_CM_SSC_DELTAMSTEP_DPLL_UNIPRO_OFFSET 0x00e8 | ||
| 170 | #define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00e8) | ||
| 171 | -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec | ||
| 172 | -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec) | ||
| 173 | +#define OMAP4_CM_SSC_MODFREQDIV_DPLL_UNIPRO_OFFSET 0x00ec | ||
| 174 | +#define OMAP4430_CM_SSC_MODFREQDIV_DPLL_UNIPRO OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CKGEN_INST, 0x00ec) | ||
| 175 | |||
| 176 | /* CM2.ALWAYS_ON_CM2 register offsets */ | ||
| 177 | #define OMAP4_CM_ALWON_CLKSTCTRL_OFFSET 0x0000 | ||
| 178 | @@ -227,8 +226,8 @@ | ||
| 179 | #define OMAP4430_CM_D2D_DYNAMICDEP OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0508) | ||
| 180 | #define OMAP4_CM_D2D_SAD2D_CLKCTRL_OFFSET 0x0520 | ||
| 181 | #define OMAP4430_CM_D2D_SAD2D_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0520) | ||
| 182 | -#define OMAP4_CM_D2D_INSTEM_ICR_CLKCTRL_OFFSET 0x0528 | ||
| 183 | -#define OMAP4430_CM_D2D_INSTEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) | ||
| 184 | +#define OMAP4_CM_D2D_MODEM_ICR_CLKCTRL_OFFSET 0x0528 | ||
| 185 | +#define OMAP4430_CM_D2D_MODEM_ICR_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0528) | ||
| 186 | #define OMAP4_CM_D2D_SAD2D_FW_CLKCTRL_OFFSET 0x0530 | ||
| 187 | #define OMAP4430_CM_D2D_SAD2D_FW_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CORE_INST, 0x0530) | ||
| 188 | #define OMAP4_CM_L4CFG_CLKSTCTRL_OFFSET 0x0600 | ||
| 189 | diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h | ||
| 190 | index 67a0d3f..2aec8c8 100644 | ||
| 191 | --- a/arch/arm/mach-omap2/prm44xx.h | ||
| 192 | +++ b/arch/arm/mach-omap2/prm44xx.h | ||
| 193 | @@ -31,7 +31,7 @@ | ||
| 194 | #define OMAP4430_PRM_BASE 0x4a306000 | ||
| 195 | |||
| 196 | #define OMAP44XX_PRM_REGADDR(inst, reg) \ | ||
| 197 | - OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) | ||
| 198 | + OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE + (inst) + (reg)) | ||
| 199 | |||
| 200 | |||
| 201 | /* PRM instances */ | ||
| 202 | @@ -46,14 +46,14 @@ | ||
| 203 | #define OMAP4430_PRM_CAM_INST 0x1000 | ||
| 204 | #define OMAP4430_PRM_DSS_INST 0x1100 | ||
| 205 | #define OMAP4430_PRM_GFX_INST 0x1200 | ||
| 206 | -#define OMAP4430_PRM_L3INIT_INST 0x1300 | ||
| 207 | +#define OMAP4430_PRM_L3INIT_INST 0x1300 | ||
| 208 | #define OMAP4430_PRM_L4PER_INST 0x1400 | ||
| 209 | -#define OMAP4430_PRM_CEFUSE_INST 0x1600 | ||
| 210 | +#define OMAP4430_PRM_CEFUSE_INST 0x1600 | ||
| 211 | #define OMAP4430_PRM_WKUP_INST 0x1700 | ||
| 212 | #define OMAP4430_PRM_WKUP_CM_INST 0x1800 | ||
| 213 | #define OMAP4430_PRM_EMU_INST 0x1900 | ||
| 214 | -#define OMAP4430_PRM_EMU_CM_INST 0x1a00 | ||
| 215 | -#define OMAP4430_PRM_DEVICE_INST 0x1b00 | ||
| 216 | +#define OMAP4430_PRM_EMU_CM_INST 0x1a00 | ||
| 217 | +#define OMAP4430_PRM_DEVICE_INST 0x1b00 | ||
| 218 | #define OMAP4430_PRM_INSTR_INST 0x1f00 | ||
| 219 | |||
| 220 | /* PRM clockdomain register offsets (from instance start) */ | ||
| 221 | @@ -247,8 +247,8 @@ | ||
| 222 | #define OMAP4430_RM_MEMIF_DLL_H_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0464) | ||
| 223 | #define OMAP4_RM_D2D_SAD2D_CONTEXT_OFFSET 0x0524 | ||
| 224 | #define OMAP4430_RM_D2D_SAD2D_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0524) | ||
| 225 | -#define OMAP4_RM_D2D_INSTEM_ICR_CONTEXT_OFFSET 0x052c | ||
| 226 | -#define OMAP4430_RM_D2D_INSTEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) | ||
| 227 | +#define OMAP4_RM_D2D_MODEM_ICR_CONTEXT_OFFSET 0x052c | ||
| 228 | +#define OMAP4430_RM_D2D_MODEM_ICR_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x052c) | ||
| 229 | #define OMAP4_RM_D2D_SAD2D_FW_CONTEXT_OFFSET 0x0534 | ||
| 230 | #define OMAP4430_RM_D2D_SAD2D_FW_CONTEXT OMAP44XX_PRM_REGADDR(OMAP4430_PRM_CORE_INST, 0x0534) | ||
| 231 | #define OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET 0x0624 | ||
| 232 | @@ -713,8 +713,8 @@ | ||
| 233 | #define OMAP4430_PRM_VC_VAL_BYPASS OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a0) | ||
| 234 | #define OMAP4_PRM_VC_CFG_CHANNEL_OFFSET 0x00a4 | ||
| 235 | #define OMAP4430_PRM_VC_CFG_CHANNEL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a4) | ||
| 236 | -#define OMAP4_PRM_VC_CFG_I2C_INSTE_OFFSET 0x00a8 | ||
| 237 | -#define OMAP4430_PRM_VC_CFG_I2C_INSTE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) | ||
| 238 | +#define OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET 0x00a8 | ||
| 239 | +#define OMAP4430_PRM_VC_CFG_I2C_MODE OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00a8) | ||
| 240 | #define OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET 0x00ac | ||
| 241 | #define OMAP4430_PRM_VC_CFG_I2C_CLK OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ac) | ||
| 242 | #define OMAP4_PRM_SRAM_COUNT_OFFSET 0x00b0 | ||
| 243 | @@ -751,8 +751,8 @@ | ||
| 244 | #define OMAP4430_PRM_PHASE2A_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00ec) | ||
| 245 | #define OMAP4_PRM_PHASE2B_CNDP_OFFSET 0x00f0 | ||
| 246 | #define OMAP4430_PRM_PHASE2B_CNDP OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f0) | ||
| 247 | -#define OMAP4_PRM_INSTEM_IF_CTRL_OFFSET 0x00f4 | ||
| 248 | -#define OMAP4430_PRM_INSTEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) | ||
| 249 | +#define OMAP4_PRM_MODEM_IF_CTRL_OFFSET 0x00f4 | ||
| 250 | +#define OMAP4430_PRM_MODEM_IF_CTRL OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f4) | ||
| 251 | #define OMAP4_PRM_VC_ERRST_OFFSET 0x00f8 | ||
| 252 | #define OMAP4430_PRM_VC_ERRST OMAP44XX_PRM_REGADDR(OMAP4430_PRM_DEVICE_INST, 0x00f8) | ||
| 253 | |||
| 254 | -- | ||
| 255 | 1.7.2.5 | ||
| 256 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0053-OMAP4-prm-Remove-wrong-clockdomain-offsets.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0053-OMAP4-prm-Remove-wrong-clockdomain-offsets.patch deleted file mode 100644 index ea6138e6..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0053-OMAP4-prm-Remove-wrong-clockdomain-offsets.patch +++ /dev/null | |||
| @@ -1,50 +0,0 @@ | |||
| 1 | From 6066c8802de9f6a1006a8e31aa833615060a2a5b Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:15:04 -0600 | ||
| 4 | Subject: [PATCH 053/149] OMAP4: prm: Remove wrong clockdomain offsets | ||
| 5 | |||
| 6 | The following commit introduced new macros to define an offset | ||
| 7 | per clock domain in an instance. | ||
| 8 | |||
| 9 | commit e4156ee52fe617c2c2d80b5db993ff4bf07d7c3c | ||
| 10 | |||
| 11 | OMAP4: CM instances: add clockdomain register offsets | ||
| 12 | |||
| 13 | The PRM contains only two clock controls management entities: | ||
| 14 | EMU and WKUP. | ||
| 15 | Remove the other ones. | ||
| 16 | |||
| 17 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 18 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 19 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 20 | --- | ||
| 21 | arch/arm/mach-omap2/prm44xx.h | 12 ------------ | ||
| 22 | 1 files changed, 0 insertions(+), 12 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h | ||
| 25 | index 2aec8c8..6e53120 100644 | ||
| 26 | --- a/arch/arm/mach-omap2/prm44xx.h | ||
| 27 | +++ b/arch/arm/mach-omap2/prm44xx.h | ||
| 28 | @@ -57,19 +57,7 @@ | ||
| 29 | #define OMAP4430_PRM_INSTR_INST 0x1f00 | ||
| 30 | |||
| 31 | /* PRM clockdomain register offsets (from instance start) */ | ||
| 32 | -#define OMAP4430_PRM_MPU_MPU_CDOFFS 0x0000 | ||
| 33 | -#define OMAP4430_PRM_TESLA_TESLA_CDOFFS 0x0000 | ||
| 34 | -#define OMAP4430_PRM_ABE_ABE_CDOFFS 0x0000 | ||
| 35 | -#define OMAP4430_PRM_CORE_CORE_CDOFFS 0x0000 | ||
| 36 | -#define OMAP4430_PRM_IVAHD_IVAHD_CDOFFS 0x0000 | ||
| 37 | -#define OMAP4430_PRM_CAM_CAM_CDOFFS 0x0000 | ||
| 38 | -#define OMAP4430_PRM_DSS_DSS_CDOFFS 0x0000 | ||
| 39 | -#define OMAP4430_PRM_GFX_GFX_CDOFFS 0x0000 | ||
| 40 | -#define OMAP4430_PRM_L3INIT_L3INIT_CDOFFS 0x0000 | ||
| 41 | -#define OMAP4430_PRM_L4PER_L4PER_CDOFFS 0x0000 | ||
| 42 | -#define OMAP4430_PRM_CEFUSE_CEFUSE_CDOFFS 0x0000 | ||
| 43 | #define OMAP4430_PRM_WKUP_CM_WKUP_CDOFFS 0x0000 | ||
| 44 | -#define OMAP4430_PRM_EMU_EMU_CDOFFS 0x0000 | ||
| 45 | #define OMAP4430_PRM_EMU_CM_EMU_CDOFFS 0x0000 | ||
| 46 | |||
| 47 | /* OMAP4 specific register offsets */ | ||
| 48 | -- | ||
| 49 | 1.7.2.5 | ||
| 50 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0054-OMAP4-powerdomain-data-Fix-indentation.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0054-OMAP4-powerdomain-data-Fix-indentation.patch deleted file mode 100644 index 93f10b15..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0054-OMAP4-powerdomain-data-Fix-indentation.patch +++ /dev/null | |||
| @@ -1,109 +0,0 @@ | |||
| 1 | From 7845ad0aca7c2976dc4021ed0c080f6605aacf09 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:15:05 -0600 | ||
| 4 | Subject: [PATCH 054/149] OMAP4: powerdomain data: Fix indentation | ||
| 5 | MIME-Version: 1.0 | ||
| 6 | Content-Type: text/plain; charset=UTF-8 | ||
| 7 | Content-Transfer-Encoding: 8bit | ||
| 8 | |||
| 9 | Indent flags to be aligned with other fields. | ||
| 10 | |||
| 11 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 12 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 13 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 14 | Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 15 | [paul@pwsan.com: split this patch from an earlier patch by Benoît; | ||
| 16 | edited commit message] | ||
| 17 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 18 | --- | ||
| 19 | arch/arm/mach-omap2/powerdomains44xx_data.c | 18 +++++++++--------- | ||
| 20 | 1 files changed, 9 insertions(+), 9 deletions(-) | ||
| 21 | |||
| 22 | diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c | ||
| 23 | index c4222c7..3a7e678 100644 | ||
| 24 | --- a/arch/arm/mach-omap2/powerdomains44xx_data.c | ||
| 25 | +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c | ||
| 26 | @@ -53,7 +53,7 @@ static struct powerdomain core_44xx_pwrdm = { | ||
| 27 | [3] = PWRSTS_ON, /* ducati_l2ram */ | ||
| 28 | [4] = PWRSTS_ON, /* ducati_unicache */ | ||
| 29 | }, | ||
| 30 | - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 31 | + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 32 | }; | ||
| 33 | |||
| 34 | /* gfx_44xx_pwrdm: 3D accelerator power domain */ | ||
| 35 | @@ -70,7 +70,7 @@ static struct powerdomain gfx_44xx_pwrdm = { | ||
| 36 | .pwrsts_mem_on = { | ||
| 37 | [0] = PWRSTS_ON, /* gfx_mem */ | ||
| 38 | }, | ||
| 39 | - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 40 | + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 41 | }; | ||
| 42 | |||
| 43 | /* abe_44xx_pwrdm: Audio back end power domain */ | ||
| 44 | @@ -90,7 +90,7 @@ static struct powerdomain abe_44xx_pwrdm = { | ||
| 45 | [0] = PWRSTS_ON, /* aessmem */ | ||
| 46 | [1] = PWRSTS_ON, /* periphmem */ | ||
| 47 | }, | ||
| 48 | - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 49 | + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 50 | }; | ||
| 51 | |||
| 52 | /* dss_44xx_pwrdm: Display subsystem power domain */ | ||
| 53 | @@ -108,7 +108,7 @@ static struct powerdomain dss_44xx_pwrdm = { | ||
| 54 | .pwrsts_mem_on = { | ||
| 55 | [0] = PWRSTS_ON, /* dss_mem */ | ||
| 56 | }, | ||
| 57 | - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 58 | + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 59 | }; | ||
| 60 | |||
| 61 | /* tesla_44xx_pwrdm: Tesla processor power domain */ | ||
| 62 | @@ -130,7 +130,7 @@ static struct powerdomain tesla_44xx_pwrdm = { | ||
| 63 | [1] = PWRSTS_ON, /* tesla_l1 */ | ||
| 64 | [2] = PWRSTS_ON, /* tesla_l2 */ | ||
| 65 | }, | ||
| 66 | - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 67 | + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 68 | }; | ||
| 69 | |||
| 70 | /* wkup_44xx_pwrdm: Wake-up power domain */ | ||
| 71 | @@ -241,7 +241,7 @@ static struct powerdomain ivahd_44xx_pwrdm = { | ||
| 72 | [2] = PWRSTS_ON, /* tcm1_mem */ | ||
| 73 | [3] = PWRSTS_ON, /* tcm2_mem */ | ||
| 74 | }, | ||
| 75 | - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 76 | + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 77 | }; | ||
| 78 | |||
| 79 | /* cam_44xx_pwrdm: Camera subsystem power domain */ | ||
| 80 | @@ -258,7 +258,7 @@ static struct powerdomain cam_44xx_pwrdm = { | ||
| 81 | .pwrsts_mem_on = { | ||
| 82 | [0] = PWRSTS_ON, /* cam_mem */ | ||
| 83 | }, | ||
| 84 | - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 85 | + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 86 | }; | ||
| 87 | |||
| 88 | /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ | ||
| 89 | @@ -276,7 +276,7 @@ static struct powerdomain l3init_44xx_pwrdm = { | ||
| 90 | .pwrsts_mem_on = { | ||
| 91 | [0] = PWRSTS_ON, /* l3init_bank1 */ | ||
| 92 | }, | ||
| 93 | - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 94 | + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 95 | }; | ||
| 96 | |||
| 97 | /* l4per_44xx_pwrdm: Target peripherals power domain */ | ||
| 98 | @@ -296,7 +296,7 @@ static struct powerdomain l4per_44xx_pwrdm = { | ||
| 99 | [0] = PWRSTS_ON, /* nonretained_bank */ | ||
| 100 | [1] = PWRSTS_ON, /* retained_bank */ | ||
| 101 | }, | ||
| 102 | - .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 103 | + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 104 | }; | ||
| 105 | |||
| 106 | /* | ||
| 107 | -- | ||
| 108 | 1.7.2.5 | ||
| 109 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0055-OMAP4-cm-Remove-RESTORE-macros-to-avoid-access-from-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0055-OMAP4-cm-Remove-RESTORE-macros-to-avoid-access-from-.patch deleted file mode 100644 index a30bfc36..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0055-OMAP4-cm-Remove-RESTORE-macros-to-avoid-access-from-.patch +++ /dev/null | |||
| @@ -1,1523 +0,0 @@ | |||
| 1 | From 8471ffc0eead8b884b6a00462fc57a2018fd9289 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:15:05 -0600 | ||
| 4 | Subject: [PATCH 055/149] OMAP4: cm: Remove RESTORE macros to avoid access from SW | ||
| 5 | |||
| 6 | The restore part of the CM is an alias of some regular registers | ||
| 7 | used only during the SAR restore to facilate the dma to write | ||
| 8 | a contiguous set of registers. | ||
| 9 | The registers should never be used by the SW, only the original | ||
| 10 | register have to be used. | ||
| 11 | |||
| 12 | Remove them from cmX_44xx.h files to avoid anybody to use them by | ||
| 13 | mistake. | ||
| 14 | |||
| 15 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 16 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 17 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 18 | Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 19 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 20 | --- | ||
| 21 | arch/arm/mach-omap2/cm-regbits-44xx.h | 623 ++++++++++++++------------------- | ||
| 22 | arch/arm/mach-omap2/cm1_44xx.h | 36 -- | ||
| 23 | arch/arm/mach-omap2/cm2_44xx.h | 50 --- | ||
| 24 | 3 files changed, 254 insertions(+), 455 deletions(-) | ||
| 25 | |||
| 26 | diff --git a/arch/arm/mach-omap2/cm-regbits-44xx.h b/arch/arm/mach-omap2/cm-regbits-44xx.h | ||
| 27 | index 9d47a05..0e77945 100644 | ||
| 28 | --- a/arch/arm/mach-omap2/cm-regbits-44xx.h | ||
| 29 | +++ b/arch/arm/mach-omap2/cm-regbits-44xx.h | ||
| 30 | @@ -22,22 +22,18 @@ | ||
| 31 | #ifndef __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H | ||
| 32 | #define __ARCH_ARM_MACH_OMAP2_CM_REGBITS_44XX_H | ||
| 33 | |||
| 34 | -/* | ||
| 35 | - * Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, | ||
| 36 | - * CM_TESLA_DYNAMICDEP | ||
| 37 | - */ | ||
| 38 | +/* Used by CM_L3_1_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ | ||
| 39 | #define OMAP4430_ABE_DYNDEP_SHIFT 3 | ||
| 40 | #define OMAP4430_ABE_DYNDEP_MASK (1 << 3) | ||
| 41 | |||
| 42 | /* | ||
| 43 | - * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, | ||
| 44 | - * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, | ||
| 45 | - * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP | ||
| 46 | + * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, | ||
| 47 | + * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP | ||
| 48 | */ | ||
| 49 | #define OMAP4430_ABE_STATDEP_SHIFT 3 | ||
| 50 | #define OMAP4430_ABE_STATDEP_MASK (1 << 3) | ||
| 51 | |||
| 52 | -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ | ||
| 53 | +/* Used by CM_L4CFG_DYNAMICDEP */ | ||
| 54 | #define OMAP4430_ALWONCORE_DYNDEP_SHIFT 16 | ||
| 55 | #define OMAP4430_ALWONCORE_DYNDEP_MASK (1 << 16) | ||
| 56 | |||
| 57 | @@ -47,14 +43,13 @@ | ||
| 58 | |||
| 59 | /* | ||
| 60 | * Used by CM_AUTOIDLE_DPLL_ABE, CM_AUTOIDLE_DPLL_CORE, | ||
| 61 | - * CM_AUTOIDLE_DPLL_CORE_RESTORE, CM_AUTOIDLE_DPLL_DDRPHY, | ||
| 62 | - * CM_AUTOIDLE_DPLL_IVA, CM_AUTOIDLE_DPLL_MPU, CM_AUTOIDLE_DPLL_PER, | ||
| 63 | - * CM_AUTOIDLE_DPLL_UNIPRO, CM_AUTOIDLE_DPLL_USB | ||
| 64 | + * CM_AUTOIDLE_DPLL_DDRPHY, CM_AUTOIDLE_DPLL_IVA, CM_AUTOIDLE_DPLL_MPU, | ||
| 65 | + * CM_AUTOIDLE_DPLL_PER, CM_AUTOIDLE_DPLL_UNIPRO, CM_AUTOIDLE_DPLL_USB | ||
| 66 | */ | ||
| 67 | #define OMAP4430_AUTO_DPLL_MODE_SHIFT 0 | ||
| 68 | #define OMAP4430_AUTO_DPLL_MODE_MASK (0x7 << 0) | ||
| 69 | |||
| 70 | -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ | ||
| 71 | +/* Used by CM_L4CFG_DYNAMICDEP */ | ||
| 72 | #define OMAP4430_CEFUSE_DYNDEP_SHIFT 17 | ||
| 73 | #define OMAP4430_CEFUSE_DYNDEP_MASK (1 << 17) | ||
| 74 | |||
| 75 | @@ -82,15 +77,15 @@ | ||
| 76 | #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_SHIFT 8 | ||
| 77 | #define OMAP4430_CLKACTIVITY_ABE_X2_CLK_MASK (1 << 8) | ||
| 78 | |||
| 79 | -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ | ||
| 80 | +/* Used by CM_MEMIF_CLKSTCTRL */ | ||
| 81 | #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_SHIFT 11 | ||
| 82 | #define OMAP4430_CLKACTIVITY_ASYNC_DLL_CLK_MASK (1 << 11) | ||
| 83 | |||
| 84 | -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ | ||
| 85 | +/* Used by CM_MEMIF_CLKSTCTRL */ | ||
| 86 | #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_SHIFT 12 | ||
| 87 | #define OMAP4430_CLKACTIVITY_ASYNC_PHY1_CLK_MASK (1 << 12) | ||
| 88 | |||
| 89 | -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ | ||
| 90 | +/* Used by CM_MEMIF_CLKSTCTRL */ | ||
| 91 | #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_SHIFT 13 | ||
| 92 | #define OMAP4430_CLKACTIVITY_ASYNC_PHY2_CLK_MASK (1 << 13) | ||
| 93 | |||
| 94 | @@ -110,31 +105,31 @@ | ||
| 95 | #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_SHIFT 9 | ||
| 96 | #define OMAP4430_CLKACTIVITY_CUST_EFUSE_SYS_CLK_MASK (1 << 9) | ||
| 97 | |||
| 98 | -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ | ||
| 99 | +/* Used by CM_MEMIF_CLKSTCTRL */ | ||
| 100 | #define OMAP4430_CLKACTIVITY_DLL_CLK_SHIFT 9 | ||
| 101 | #define OMAP4430_CLKACTIVITY_DLL_CLK_MASK (1 << 9) | ||
| 102 | |||
| 103 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 104 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 105 | #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_SHIFT 9 | ||
| 106 | #define OMAP4430_CLKACTIVITY_DMT10_GFCLK_MASK (1 << 9) | ||
| 107 | |||
| 108 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 109 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 110 | #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_SHIFT 10 | ||
| 111 | #define OMAP4430_CLKACTIVITY_DMT11_GFCLK_MASK (1 << 10) | ||
| 112 | |||
| 113 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 114 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 115 | #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_SHIFT 11 | ||
| 116 | #define OMAP4430_CLKACTIVITY_DMT2_GFCLK_MASK (1 << 11) | ||
| 117 | |||
| 118 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 119 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 120 | #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_SHIFT 12 | ||
| 121 | #define OMAP4430_CLKACTIVITY_DMT3_GFCLK_MASK (1 << 12) | ||
| 122 | |||
| 123 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 124 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 125 | #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_SHIFT 13 | ||
| 126 | #define OMAP4430_CLKACTIVITY_DMT4_GFCLK_MASK (1 << 13) | ||
| 127 | |||
| 128 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 129 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 130 | #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_SHIFT 14 | ||
| 131 | #define OMAP4430_CLKACTIVITY_DMT9_GFCLK_MASK (1 << 14) | ||
| 132 | |||
| 133 | @@ -158,7 +153,7 @@ | ||
| 134 | #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_SHIFT 10 | ||
| 135 | #define OMAP4430_CLKACTIVITY_FDIF_GFCLK_MASK (1 << 10) | ||
| 136 | |||
| 137 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 138 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 139 | #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_SHIFT 15 | ||
| 140 | #define OMAP4430_CLKACTIVITY_FUNC_12M_GFCLK_MASK (1 << 15) | ||
| 141 | |||
| 142 | @@ -170,55 +165,55 @@ | ||
| 143 | #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_SHIFT 11 | ||
| 144 | #define OMAP4430_CLKACTIVITY_HDMI_PHY_48MHZ_GFCLK_MASK (1 << 11) | ||
| 145 | |||
| 146 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 147 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 148 | #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_SHIFT 20 | ||
| 149 | #define OMAP4430_CLKACTIVITY_HSIC_P1_480M_GFCLK_MASK (1 << 20) | ||
| 150 | |||
| 151 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 152 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 153 | #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_SHIFT 26 | ||
| 154 | #define OMAP4430_CLKACTIVITY_HSIC_P1_GFCLK_MASK (1 << 26) | ||
| 155 | |||
| 156 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 157 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 158 | #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_SHIFT 21 | ||
| 159 | #define OMAP4430_CLKACTIVITY_HSIC_P2_480M_GFCLK_MASK (1 << 21) | ||
| 160 | |||
| 161 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 162 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 163 | #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_SHIFT 27 | ||
| 164 | #define OMAP4430_CLKACTIVITY_HSIC_P2_GFCLK_MASK (1 << 27) | ||
| 165 | |||
| 166 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 167 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 168 | #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_SHIFT 13 | ||
| 169 | #define OMAP4430_CLKACTIVITY_INIT_48MC_GFCLK_MASK (1 << 13) | ||
| 170 | |||
| 171 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 172 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 173 | #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_SHIFT 12 | ||
| 174 | #define OMAP4430_CLKACTIVITY_INIT_48M_GFCLK_MASK (1 << 12) | ||
| 175 | |||
| 176 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 177 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 178 | #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_SHIFT 28 | ||
| 179 | #define OMAP4430_CLKACTIVITY_INIT_60M_P1_GFCLK_MASK (1 << 28) | ||
| 180 | |||
| 181 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 182 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 183 | #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_SHIFT 29 | ||
| 184 | #define OMAP4430_CLKACTIVITY_INIT_60M_P2_GFCLK_MASK (1 << 29) | ||
| 185 | |||
| 186 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 187 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 188 | #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_SHIFT 11 | ||
| 189 | #define OMAP4430_CLKACTIVITY_INIT_96M_GFCLK_MASK (1 << 11) | ||
| 190 | |||
| 191 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 192 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 193 | #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_SHIFT 16 | ||
| 194 | #define OMAP4430_CLKACTIVITY_INIT_HSI_GFCLK_MASK (1 << 16) | ||
| 195 | |||
| 196 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 197 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 198 | #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_SHIFT 17 | ||
| 199 | #define OMAP4430_CLKACTIVITY_INIT_HSMMC1_GFCLK_MASK (1 << 17) | ||
| 200 | |||
| 201 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 202 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 203 | #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_SHIFT 18 | ||
| 204 | #define OMAP4430_CLKACTIVITY_INIT_HSMMC2_GFCLK_MASK (1 << 18) | ||
| 205 | |||
| 206 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 207 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 208 | #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_SHIFT 19 | ||
| 209 | #define OMAP4430_CLKACTIVITY_INIT_HSMMC6_GFCLK_MASK (1 << 19) | ||
| 210 | |||
| 211 | @@ -234,11 +229,11 @@ | ||
| 212 | #define OMAP4430_CLKACTIVITY_L3X2_D2D_GICLK_SHIFT 10 | ||
| 213 | #define OMAP4430_CLKACTIVITY_L3X2_D2D_GICLK_MASK (1 << 10) | ||
| 214 | |||
| 215 | -/* Used by CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE */ | ||
| 216 | +/* Used by CM_L3_1_CLKSTCTRL */ | ||
| 217 | #define OMAP4430_CLKACTIVITY_L3_1_GICLK_SHIFT 8 | ||
| 218 | #define OMAP4430_CLKACTIVITY_L3_1_GICLK_MASK (1 << 8) | ||
| 219 | |||
| 220 | -/* Used by CM_L3_2_CLKSTCTRL, CM_L3_2_CLKSTCTRL_RESTORE */ | ||
| 221 | +/* Used by CM_L3_2_CLKSTCTRL */ | ||
| 222 | #define OMAP4430_CLKACTIVITY_L3_2_GICLK_SHIFT 8 | ||
| 223 | #define OMAP4430_CLKACTIVITY_L3_2_GICLK_MASK (1 << 8) | ||
| 224 | |||
| 225 | @@ -254,7 +249,7 @@ | ||
| 226 | #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_SHIFT 8 | ||
| 227 | #define OMAP4430_CLKACTIVITY_L3_DSS_GICLK_MASK (1 << 8) | ||
| 228 | |||
| 229 | -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ | ||
| 230 | +/* Used by CM_MEMIF_CLKSTCTRL */ | ||
| 231 | #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_SHIFT 8 | ||
| 232 | #define OMAP4430_CLKACTIVITY_L3_EMIF_GICLK_MASK (1 << 8) | ||
| 233 | |||
| 234 | @@ -262,7 +257,7 @@ | ||
| 235 | #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_SHIFT 8 | ||
| 236 | #define OMAP4430_CLKACTIVITY_L3_GFX_GICLK_MASK (1 << 8) | ||
| 237 | |||
| 238 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 239 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 240 | #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_SHIFT 8 | ||
| 241 | #define OMAP4430_CLKACTIVITY_L3_INIT_GICLK_MASK (1 << 8) | ||
| 242 | |||
| 243 | @@ -282,7 +277,7 @@ | ||
| 244 | #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_SHIFT 8 | ||
| 245 | #define OMAP4430_CLKACTIVITY_L4_CEFUSE_GICLK_MASK (1 << 8) | ||
| 246 | |||
| 247 | -/* Used by CM_L4CFG_CLKSTCTRL, CM_L4CFG_CLKSTCTRL_RESTORE */ | ||
| 248 | +/* Used by CM_L4CFG_CLKSTCTRL */ | ||
| 249 | #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_SHIFT 8 | ||
| 250 | #define OMAP4430_CLKACTIVITY_L4_CFG_GICLK_MASK (1 << 8) | ||
| 251 | |||
| 252 | @@ -290,11 +285,11 @@ | ||
| 253 | #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_SHIFT 9 | ||
| 254 | #define OMAP4430_CLKACTIVITY_L4_D2D_GICLK_MASK (1 << 9) | ||
| 255 | |||
| 256 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 257 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 258 | #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_SHIFT 9 | ||
| 259 | #define OMAP4430_CLKACTIVITY_L4_INIT_GICLK_MASK (1 << 9) | ||
| 260 | |||
| 261 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 262 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 263 | #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_SHIFT 8 | ||
| 264 | #define OMAP4430_CLKACTIVITY_L4_PER_GICLK_MASK (1 << 8) | ||
| 265 | |||
| 266 | @@ -306,7 +301,7 @@ | ||
| 267 | #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_SHIFT 12 | ||
| 268 | #define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_MASK (1 << 12) | ||
| 269 | |||
| 270 | -/* Used by CM_MPU_CLKSTCTRL, CM_MPU_CLKSTCTRL_RESTORE */ | ||
| 271 | +/* Used by CM_MPU_CLKSTCTRL */ | ||
| 272 | #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_SHIFT 8 | ||
| 273 | #define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_MASK (1 << 8) | ||
| 274 | |||
| 275 | @@ -314,43 +309,43 @@ | ||
| 276 | #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_SHIFT 9 | ||
| 277 | #define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_MASK (1 << 9) | ||
| 278 | |||
| 279 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 280 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 281 | #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_SHIFT 16 | ||
| 282 | #define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_MASK (1 << 16) | ||
| 283 | |||
| 284 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 285 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 286 | #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_SHIFT 17 | ||
| 287 | #define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_MASK (1 << 17) | ||
| 288 | |||
| 289 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 290 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 291 | #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_SHIFT 18 | ||
| 292 | #define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_MASK (1 << 18) | ||
| 293 | |||
| 294 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 295 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 296 | #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_SHIFT 19 | ||
| 297 | #define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_MASK (1 << 19) | ||
| 298 | |||
| 299 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 300 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 301 | #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_SHIFT 25 | ||
| 302 | #define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_MASK (1 << 25) | ||
| 303 | |||
| 304 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 305 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 306 | #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_SHIFT 20 | ||
| 307 | #define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_MASK (1 << 20) | ||
| 308 | |||
| 309 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 310 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 311 | #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_SHIFT 21 | ||
| 312 | #define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_MASK (1 << 21) | ||
| 313 | |||
| 314 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 315 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 316 | #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_SHIFT 22 | ||
| 317 | #define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_MASK (1 << 22) | ||
| 318 | |||
| 319 | -/* Used by CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE */ | ||
| 320 | +/* Used by CM_L4PER_CLKSTCTRL */ | ||
| 321 | #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_SHIFT 24 | ||
| 322 | #define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_MASK (1 << 24) | ||
| 323 | |||
| 324 | -/* Used by CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE */ | ||
| 325 | +/* Used by CM_MEMIF_CLKSTCTRL */ | ||
| 326 | #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_SHIFT 10 | ||
| 327 | #define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_MASK (1 << 10) | ||
| 328 | |||
| 329 | @@ -378,27 +373,27 @@ | ||
| 330 | #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_SHIFT 8 | ||
| 331 | #define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_MASK (1 << 8) | ||
| 332 | |||
| 333 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 334 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 335 | #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_SHIFT 22 | ||
| 336 | #define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_MASK (1 << 22) | ||
| 337 | |||
| 338 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 339 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 340 | #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_SHIFT 23 | ||
| 341 | #define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_MASK (1 << 23) | ||
| 342 | |||
| 343 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 344 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 345 | #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_SHIFT 24 | ||
| 346 | #define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_MASK (1 << 24) | ||
| 347 | |||
| 348 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 349 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 350 | #define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_SHIFT 10 | ||
| 351 | #define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_MASK (1 << 10) | ||
| 352 | |||
| 353 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 354 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 355 | #define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_SHIFT 14 | ||
| 356 | #define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_MASK (1 << 14) | ||
| 357 | |||
| 358 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 359 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 360 | #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_SHIFT 15 | ||
| 361 | #define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_MASK (1 << 15) | ||
| 362 | |||
| 363 | @@ -406,11 +401,11 @@ | ||
| 364 | #define OMAP4430_CLKACTIVITY_USIM_GFCLK_SHIFT 10 | ||
| 365 | #define OMAP4430_CLKACTIVITY_USIM_GFCLK_MASK (1 << 10) | ||
| 366 | |||
| 367 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 368 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 369 | #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_SHIFT 30 | ||
| 370 | #define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_MASK (1 << 30) | ||
| 371 | |||
| 372 | -/* Used by CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE */ | ||
| 373 | +/* Used by CM_L3INIT_CLKSTCTRL */ | ||
| 374 | #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_SHIFT 25 | ||
| 375 | #define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_MASK (1 << 25) | ||
| 376 | |||
| 377 | @@ -432,7 +427,7 @@ | ||
| 378 | |||
| 379 | /* | ||
| 380 | * Renamed from CLKSEL Used by CM_ABE_DSS_SYS_CLKSEL, CM_ABE_PLL_REF_CLKSEL, | ||
| 381 | - * CM_L4_WKUP_CLKSEL, CM_CLKSEL_DUCATI_ISS_ROOT, CM_CLKSEL_USB_60MHZ | ||
| 382 | + * CM_CLKSEL_DUCATI_ISS_ROOT, CM_CLKSEL_USB_60MHZ, CM_L4_WKUP_CLKSEL | ||
| 383 | */ | ||
| 384 | #define OMAP4430_CLKSEL_0_0_SHIFT 0 | ||
| 385 | #define OMAP4430_CLKSEL_0_0_MASK (1 << 0) | ||
| 386 | @@ -453,14 +448,11 @@ | ||
| 387 | #define OMAP4430_CLKSEL_AESS_FCLK_SHIFT 24 | ||
| 388 | #define OMAP4430_CLKSEL_AESS_FCLK_MASK (1 << 24) | ||
| 389 | |||
| 390 | -/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ | ||
| 391 | +/* Used by CM_CLKSEL_CORE */ | ||
| 392 | #define OMAP4430_CLKSEL_CORE_SHIFT 0 | ||
| 393 | #define OMAP4430_CLKSEL_CORE_MASK (1 << 0) | ||
| 394 | |||
| 395 | -/* | ||
| 396 | - * Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2_RESTORE, | ||
| 397 | - * CM_SHADOW_FREQ_CONFIG2 | ||
| 398 | - */ | ||
| 399 | +/* Renamed from CLKSEL_CORE Used by CM_SHADOW_FREQ_CONFIG2 */ | ||
| 400 | #define OMAP4430_CLKSEL_CORE_1_1_SHIFT 1 | ||
| 401 | #define OMAP4430_CLKSEL_CORE_1_1_MASK (1 << 1) | ||
| 402 | |||
| 403 | @@ -484,18 +476,15 @@ | ||
| 404 | #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_SHIFT 26 | ||
| 405 | #define OMAP4430_CLKSEL_INTERNAL_SOURCE_CM1_ABE_DMIC_MASK (0x3 << 26) | ||
| 406 | |||
| 407 | -/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ | ||
| 408 | +/* Used by CM_CLKSEL_CORE */ | ||
| 409 | #define OMAP4430_CLKSEL_L3_SHIFT 4 | ||
| 410 | #define OMAP4430_CLKSEL_L3_MASK (1 << 4) | ||
| 411 | |||
| 412 | -/* | ||
| 413 | - * Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2_RESTORE, | ||
| 414 | - * CM_SHADOW_FREQ_CONFIG2 | ||
| 415 | - */ | ||
| 416 | +/* Renamed from CLKSEL_L3 Used by CM_SHADOW_FREQ_CONFIG2 */ | ||
| 417 | #define OMAP4430_CLKSEL_L3_SHADOW_SHIFT 2 | ||
| 418 | #define OMAP4430_CLKSEL_L3_SHADOW_MASK (1 << 2) | ||
| 419 | |||
| 420 | -/* Used by CM_CLKSEL_CORE, CM_CLKSEL_CORE_RESTORE */ | ||
| 421 | +/* Used by CM_CLKSEL_CORE */ | ||
| 422 | #define OMAP4430_CLKSEL_L4_SHIFT 8 | ||
| 423 | #define OMAP4430_CLKSEL_L4_MASK (1 << 8) | ||
| 424 | |||
| 425 | @@ -526,11 +515,11 @@ | ||
| 426 | #define OMAP4430_CLKSEL_SOURCE_24_24_SHIFT 24 | ||
| 427 | #define OMAP4430_CLKSEL_SOURCE_24_24_MASK (1 << 24) | ||
| 428 | |||
| 429 | -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | ||
| 430 | +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ | ||
| 431 | #define OMAP4430_CLKSEL_UTMI_P1_SHIFT 24 | ||
| 432 | #define OMAP4430_CLKSEL_UTMI_P1_MASK (1 << 24) | ||
| 433 | |||
| 434 | -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | ||
| 435 | +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ | ||
| 436 | #define OMAP4430_CLKSEL_UTMI_P2_SHIFT 25 | ||
| 437 | #define OMAP4430_CLKSEL_UTMI_P2_MASK (1 << 25) | ||
| 438 | |||
| 439 | @@ -538,13 +527,10 @@ | ||
| 440 | * Used by CM1_ABE_CLKSTCTRL, CM_ALWON_CLKSTCTRL, CM_CAM_CLKSTCTRL, | ||
| 441 | * CM_CEFUSE_CLKSTCTRL, CM_D2D_CLKSTCTRL, CM_DSS_CLKSTCTRL, | ||
| 442 | * CM_DUCATI_CLKSTCTRL, CM_EMU_CLKSTCTRL, CM_GFX_CLKSTCTRL, CM_IVAHD_CLKSTCTRL, | ||
| 443 | - * CM_L3INIT_CLKSTCTRL, CM_L3INIT_CLKSTCTRL_RESTORE, CM_L3INSTR_CLKSTCTRL, | ||
| 444 | - * CM_L3_1_CLKSTCTRL, CM_L3_1_CLKSTCTRL_RESTORE, CM_L3_2_CLKSTCTRL, | ||
| 445 | - * CM_L3_2_CLKSTCTRL_RESTORE, CM_L4CFG_CLKSTCTRL, CM_L4CFG_CLKSTCTRL_RESTORE, | ||
| 446 | - * CM_L4PER_CLKSTCTRL, CM_L4PER_CLKSTCTRL_RESTORE, CM_L4SEC_CLKSTCTRL, | ||
| 447 | - * CM_MEMIF_CLKSTCTRL, CM_MEMIF_CLKSTCTRL_RESTORE, CM_MPU_CLKSTCTRL, | ||
| 448 | - * CM_MPU_CLKSTCTRL_RESTORE, CM_SDMA_CLKSTCTRL, CM_TESLA_CLKSTCTRL, | ||
| 449 | - * CM_WKUP_CLKSTCTRL | ||
| 450 | + * CM_L3INIT_CLKSTCTRL, CM_L3INSTR_CLKSTCTRL, CM_L3_1_CLKSTCTRL, | ||
| 451 | + * CM_L3_2_CLKSTCTRL, CM_L4CFG_CLKSTCTRL, CM_L4PER_CLKSTCTRL, | ||
| 452 | + * CM_L4SEC_CLKSTCTRL, CM_MEMIF_CLKSTCTRL, CM_MPU_CLKSTCTRL, CM_SDMA_CLKSTCTRL, | ||
| 453 | + * CM_TESLA_CLKSTCTRL, CM_WKUP_CLKSTCTRL | ||
| 454 | */ | ||
| 455 | #define OMAP4430_CLKTRCTRL_SHIFT 0 | ||
| 456 | #define OMAP4430_CLKTRCTRL_MASK (0x3 << 0) | ||
| 457 | @@ -561,10 +547,7 @@ | ||
| 458 | #define OMAP4430_CUSTOM_SHIFT 6 | ||
| 459 | #define OMAP4430_CUSTOM_MASK (0x3 << 6) | ||
| 460 | |||
| 461 | -/* | ||
| 462 | - * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, | ||
| 463 | - * CM_L4CFG_DYNAMICDEP_RESTORE | ||
| 464 | - */ | ||
| 465 | +/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */ | ||
| 466 | #define OMAP4430_D2D_DYNDEP_SHIFT 18 | ||
| 467 | #define OMAP4430_D2D_DYNDEP_MASK (1 << 18) | ||
| 468 | |||
| 469 | @@ -574,31 +557,29 @@ | ||
| 470 | |||
| 471 | /* | ||
| 472 | * Used by CM_SSC_DELTAMSTEP_DPLL_ABE, CM_SSC_DELTAMSTEP_DPLL_CORE, | ||
| 473 | - * CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE, CM_SSC_DELTAMSTEP_DPLL_DDRPHY, | ||
| 474 | - * CM_SSC_DELTAMSTEP_DPLL_IVA, CM_SSC_DELTAMSTEP_DPLL_MPU, | ||
| 475 | - * CM_SSC_DELTAMSTEP_DPLL_PER, CM_SSC_DELTAMSTEP_DPLL_UNIPRO, | ||
| 476 | - * CM_SSC_DELTAMSTEP_DPLL_USB | ||
| 477 | + * CM_SSC_DELTAMSTEP_DPLL_DDRPHY, CM_SSC_DELTAMSTEP_DPLL_IVA, | ||
| 478 | + * CM_SSC_DELTAMSTEP_DPLL_MPU, CM_SSC_DELTAMSTEP_DPLL_PER, | ||
| 479 | + * CM_SSC_DELTAMSTEP_DPLL_UNIPRO, CM_SSC_DELTAMSTEP_DPLL_USB | ||
| 480 | */ | ||
| 481 | #define OMAP4430_DELTAMSTEP_SHIFT 0 | ||
| 482 | #define OMAP4430_DELTAMSTEP_MASK (0xfffff << 0) | ||
| 483 | |||
| 484 | -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ | ||
| 485 | -#define OMAP4430_DLL_OVERRIDE_SHIFT 2 | ||
| 486 | -#define OMAP4430_DLL_OVERRIDE_MASK (1 << 2) | ||
| 487 | +/* Used by CM_DLL_CTRL */ | ||
| 488 | +#define OMAP4430_DLL_OVERRIDE_SHIFT 0 | ||
| 489 | +#define OMAP4430_DLL_OVERRIDE_MASK (1 << 0) | ||
| 490 | |||
| 491 | -/* Renamed from DLL_OVERRIDE Used by CM_DLL_CTRL */ | ||
| 492 | -#define OMAP4430_DLL_OVERRIDE_0_0_SHIFT 0 | ||
| 493 | -#define OMAP4430_DLL_OVERRIDE_0_0_MASK (1 << 0) | ||
| 494 | +/* Renamed from DLL_OVERRIDE Used by CM_SHADOW_FREQ_CONFIG1 */ | ||
| 495 | +#define OMAP4430_DLL_OVERRIDE_2_2_SHIFT 2 | ||
| 496 | +#define OMAP4430_DLL_OVERRIDE_2_2_MASK (1 << 2) | ||
| 497 | |||
| 498 | -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ | ||
| 499 | +/* Used by CM_SHADOW_FREQ_CONFIG1 */ | ||
| 500 | #define OMAP4430_DLL_RESET_SHIFT 3 | ||
| 501 | #define OMAP4430_DLL_RESET_MASK (1 << 3) | ||
| 502 | |||
| 503 | /* | ||
| 504 | - * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, | ||
| 505 | - * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, | ||
| 506 | - * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO, | ||
| 507 | - * CM_CLKSEL_DPLL_USB | ||
| 508 | + * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY, | ||
| 509 | + * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, | ||
| 510 | + * CM_CLKSEL_DPLL_UNIPRO, CM_CLKSEL_DPLL_USB | ||
| 511 | */ | ||
| 512 | #define OMAP4430_DPLL_BYP_CLKSEL_SHIFT 23 | ||
| 513 | #define OMAP4430_DPLL_BYP_CLKSEL_MASK (1 << 23) | ||
| 514 | @@ -607,28 +588,19 @@ | ||
| 515 | #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_SHIFT 8 | ||
| 516 | #define OMAP4430_DPLL_CLKDCOLDO_GATE_CTRL_MASK (1 << 8) | ||
| 517 | |||
| 518 | -/* Used by CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_CORE_RESTORE */ | ||
| 519 | +/* Used by CM_CLKSEL_DPLL_CORE */ | ||
| 520 | #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_SHIFT 20 | ||
| 521 | #define OMAP4430_DPLL_CLKOUTHIF_CLKSEL_MASK (1 << 20) | ||
| 522 | |||
| 523 | -/* | ||
| 524 | - * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, | ||
| 525 | - * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER | ||
| 526 | - */ | ||
| 527 | +/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ | ||
| 528 | #define OMAP4430_DPLL_CLKOUTHIF_DIV_SHIFT 0 | ||
| 529 | #define OMAP4430_DPLL_CLKOUTHIF_DIV_MASK (0x1f << 0) | ||
| 530 | |||
| 531 | -/* | ||
| 532 | - * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, | ||
| 533 | - * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER | ||
| 534 | - */ | ||
| 535 | +/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ | ||
| 536 | #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_SHIFT 5 | ||
| 537 | #define OMAP4430_DPLL_CLKOUTHIF_DIVCHACK_MASK (1 << 5) | ||
| 538 | |||
| 539 | -/* | ||
| 540 | - * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, | ||
| 541 | - * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER | ||
| 542 | - */ | ||
| 543 | +/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ | ||
| 544 | #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_SHIFT 8 | ||
| 545 | #define OMAP4430_DPLL_CLKOUTHIF_GATE_CTRL_MASK (1 << 8) | ||
| 546 | |||
| 547 | @@ -637,9 +609,8 @@ | ||
| 548 | #define OMAP4430_DPLL_CLKOUTX2_GATE_CTRL_MASK (1 << 10) | ||
| 549 | |||
| 550 | /* | ||
| 551 | - * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, | ||
| 552 | - * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, | ||
| 553 | - * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO | ||
| 554 | + * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, | ||
| 555 | + * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO | ||
| 556 | */ | ||
| 557 | #define OMAP4430_DPLL_CLKOUT_DIV_SHIFT 0 | ||
| 558 | #define OMAP4430_DPLL_CLKOUT_DIV_MASK (0x1f << 0) | ||
| 559 | @@ -649,9 +620,8 @@ | ||
| 560 | #define OMAP4430_DPLL_CLKOUT_DIV_0_6_MASK (0x7f << 0) | ||
| 561 | |||
| 562 | /* | ||
| 563 | - * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, | ||
| 564 | - * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, | ||
| 565 | - * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO | ||
| 566 | + * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, | ||
| 567 | + * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_UNIPRO | ||
| 568 | */ | ||
| 569 | #define OMAP4430_DPLL_CLKOUT_DIVCHACK_SHIFT 5 | ||
| 570 | #define OMAP4430_DPLL_CLKOUT_DIVCHACK_MASK (1 << 5) | ||
| 571 | @@ -661,29 +631,28 @@ | ||
| 572 | #define OMAP4430_DPLL_CLKOUT_DIVCHACK_M2_USB_MASK (1 << 7) | ||
| 573 | |||
| 574 | /* | ||
| 575 | - * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, | ||
| 576 | - * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, | ||
| 577 | - * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB | ||
| 578 | + * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, | ||
| 579 | + * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB | ||
| 580 | */ | ||
| 581 | #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_SHIFT 8 | ||
| 582 | #define OMAP4430_DPLL_CLKOUT_GATE_CTRL_MASK (1 << 8) | ||
| 583 | |||
| 584 | -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ | ||
| 585 | +/* Used by CM_SHADOW_FREQ_CONFIG1 */ | ||
| 586 | #define OMAP4430_DPLL_CORE_DPLL_EN_SHIFT 8 | ||
| 587 | #define OMAP4430_DPLL_CORE_DPLL_EN_MASK (0x7 << 8) | ||
| 588 | |||
| 589 | -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ | ||
| 590 | +/* Used by CM_SHADOW_FREQ_CONFIG1 */ | ||
| 591 | #define OMAP4430_DPLL_CORE_M2_DIV_SHIFT 11 | ||
| 592 | #define OMAP4430_DPLL_CORE_M2_DIV_MASK (0x1f << 11) | ||
| 593 | |||
| 594 | -/* Used by CM_SHADOW_FREQ_CONFIG2, CM_SHADOW_FREQ_CONFIG2_RESTORE */ | ||
| 595 | +/* Used by CM_SHADOW_FREQ_CONFIG2 */ | ||
| 596 | #define OMAP4430_DPLL_CORE_M5_DIV_SHIFT 3 | ||
| 597 | #define OMAP4430_DPLL_CORE_M5_DIV_MASK (0x1f << 3) | ||
| 598 | |||
| 599 | /* | ||
| 600 | - * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, | ||
| 601 | - * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, | ||
| 602 | - * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO | ||
| 603 | + * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY, | ||
| 604 | + * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, | ||
| 605 | + * CM_CLKSEL_DPLL_UNIPRO | ||
| 606 | */ | ||
| 607 | #define OMAP4430_DPLL_DIV_SHIFT 0 | ||
| 608 | #define OMAP4430_DPLL_DIV_MASK (0x7f << 0) | ||
| 609 | @@ -693,9 +662,8 @@ | ||
| 610 | #define OMAP4430_DPLL_DIV_0_7_MASK (0xff << 0) | ||
| 611 | |||
| 612 | /* | ||
| 613 | - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | ||
| 614 | - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, | ||
| 615 | - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER | ||
| 616 | + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, | ||
| 617 | + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER | ||
| 618 | */ | ||
| 619 | #define OMAP4430_DPLL_DRIFTGUARD_EN_SHIFT 8 | ||
| 620 | #define OMAP4430_DPLL_DRIFTGUARD_EN_MASK (1 << 8) | ||
| 621 | @@ -705,26 +673,25 @@ | ||
| 622 | #define OMAP4430_DPLL_DRIFTGUARD_EN_3_3_MASK (1 << 3) | ||
| 623 | |||
| 624 | /* | ||
| 625 | - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | ||
| 626 | - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, | ||
| 627 | - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, | ||
| 628 | - * CM_CLKMODE_DPLL_USB | ||
| 629 | + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, | ||
| 630 | + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, | ||
| 631 | + * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB | ||
| 632 | */ | ||
| 633 | #define OMAP4430_DPLL_EN_SHIFT 0 | ||
| 634 | #define OMAP4430_DPLL_EN_MASK (0x7 << 0) | ||
| 635 | |||
| 636 | /* | ||
| 637 | - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | ||
| 638 | - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, | ||
| 639 | - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO | ||
| 640 | + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, | ||
| 641 | + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, | ||
| 642 | + * CM_CLKMODE_DPLL_UNIPRO | ||
| 643 | */ | ||
| 644 | #define OMAP4430_DPLL_LPMODE_EN_SHIFT 10 | ||
| 645 | #define OMAP4430_DPLL_LPMODE_EN_MASK (1 << 10) | ||
| 646 | |||
| 647 | /* | ||
| 648 | - * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, | ||
| 649 | - * CM_CLKSEL_DPLL_CORE_RESTORE, CM_CLKSEL_DPLL_DDRPHY, CM_CLKSEL_DPLL_IVA, | ||
| 650 | - * CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, CM_CLKSEL_DPLL_UNIPRO | ||
| 651 | + * Used by CM_CLKSEL_DPLL_ABE, CM_CLKSEL_DPLL_CORE, CM_CLKSEL_DPLL_DDRPHY, | ||
| 652 | + * CM_CLKSEL_DPLL_IVA, CM_CLKSEL_DPLL_MPU, CM_CLKSEL_DPLL_PER, | ||
| 653 | + * CM_CLKSEL_DPLL_UNIPRO | ||
| 654 | */ | ||
| 655 | #define OMAP4430_DPLL_MULT_SHIFT 8 | ||
| 656 | #define OMAP4430_DPLL_MULT_MASK (0x7ff << 8) | ||
| 657 | @@ -734,9 +701,9 @@ | ||
| 658 | #define OMAP4430_DPLL_MULT_USB_MASK (0xfff << 8) | ||
| 659 | |||
| 660 | /* | ||
| 661 | - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | ||
| 662 | - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, | ||
| 663 | - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO | ||
| 664 | + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, | ||
| 665 | + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, | ||
| 666 | + * CM_CLKMODE_DPLL_UNIPRO | ||
| 667 | */ | ||
| 668 | #define OMAP4430_DPLL_REGM4XEN_SHIFT 11 | ||
| 669 | #define OMAP4430_DPLL_REGM4XEN_MASK (1 << 11) | ||
| 670 | @@ -746,55 +713,46 @@ | ||
| 671 | #define OMAP4430_DPLL_SD_DIV_MASK (0xff << 24) | ||
| 672 | |||
| 673 | /* | ||
| 674 | - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | ||
| 675 | - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, | ||
| 676 | - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, | ||
| 677 | - * CM_CLKMODE_DPLL_USB | ||
| 678 | + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, | ||
| 679 | + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, | ||
| 680 | + * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB | ||
| 681 | */ | ||
| 682 | #define OMAP4430_DPLL_SSC_ACK_SHIFT 13 | ||
| 683 | #define OMAP4430_DPLL_SSC_ACK_MASK (1 << 13) | ||
| 684 | |||
| 685 | /* | ||
| 686 | - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | ||
| 687 | - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, | ||
| 688 | - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, | ||
| 689 | - * CM_CLKMODE_DPLL_USB | ||
| 690 | + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, | ||
| 691 | + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, | ||
| 692 | + * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB | ||
| 693 | */ | ||
| 694 | #define OMAP4430_DPLL_SSC_DOWNSPREAD_SHIFT 14 | ||
| 695 | #define OMAP4430_DPLL_SSC_DOWNSPREAD_MASK (1 << 14) | ||
| 696 | |||
| 697 | /* | ||
| 698 | - * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, | ||
| 699 | - * CM_CLKMODE_DPLL_CORE_RESTORE, CM_CLKMODE_DPLL_DDRPHY, CM_CLKMODE_DPLL_IVA, | ||
| 700 | - * CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, CM_CLKMODE_DPLL_UNIPRO, | ||
| 701 | - * CM_CLKMODE_DPLL_USB | ||
| 702 | + * Used by CM_CLKMODE_DPLL_ABE, CM_CLKMODE_DPLL_CORE, CM_CLKMODE_DPLL_DDRPHY, | ||
| 703 | + * CM_CLKMODE_DPLL_IVA, CM_CLKMODE_DPLL_MPU, CM_CLKMODE_DPLL_PER, | ||
| 704 | + * CM_CLKMODE_DPLL_UNIPRO, CM_CLKMODE_DPLL_USB | ||
| 705 | */ | ||
| 706 | #define OMAP4430_DPLL_SSC_EN_SHIFT 12 | ||
| 707 | #define OMAP4430_DPLL_SSC_EN_MASK (1 << 12) | ||
| 708 | |||
| 709 | -/* | ||
| 710 | - * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, | ||
| 711 | - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, CM_L4PER_DYNAMICDEP_RESTORE | ||
| 712 | - */ | ||
| 713 | +/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ | ||
| 714 | #define OMAP4430_DSS_DYNDEP_SHIFT 8 | ||
| 715 | #define OMAP4430_DSS_DYNDEP_MASK (1 << 8) | ||
| 716 | |||
| 717 | -/* | ||
| 718 | - * Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, | ||
| 719 | - * CM_SDMA_STATICDEP_RESTORE | ||
| 720 | - */ | ||
| 721 | +/* Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP */ | ||
| 722 | #define OMAP4430_DSS_STATDEP_SHIFT 8 | ||
| 723 | #define OMAP4430_DSS_STATDEP_MASK (1 << 8) | ||
| 724 | |||
| 725 | -/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ | ||
| 726 | +/* Used by CM_L3_2_DYNAMICDEP */ | ||
| 727 | #define OMAP4430_DUCATI_DYNDEP_SHIFT 0 | ||
| 728 | #define OMAP4430_DUCATI_DYNDEP_MASK (1 << 0) | ||
| 729 | |||
| 730 | -/* Used by CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE */ | ||
| 731 | +/* Used by CM_MPU_STATICDEP, CM_SDMA_STATICDEP */ | ||
| 732 | #define OMAP4430_DUCATI_STATDEP_SHIFT 0 | ||
| 733 | #define OMAP4430_DUCATI_STATDEP_MASK (1 << 0) | ||
| 734 | |||
| 735 | -/* Used by CM_SHADOW_FREQ_CONFIG1, CM_SHADOW_FREQ_CONFIG1_RESTORE */ | ||
| 736 | +/* Used by CM_SHADOW_FREQ_CONFIG1 */ | ||
| 737 | #define OMAP4430_FREQ_UPDATE_SHIFT 0 | ||
| 738 | #define OMAP4430_FREQ_UPDATE_MASK (1 << 0) | ||
| 739 | |||
| 740 | @@ -802,7 +760,7 @@ | ||
| 741 | #define OMAP4430_FUNC_SHIFT 16 | ||
| 742 | #define OMAP4430_FUNC_MASK (0xfff << 16) | ||
| 743 | |||
| 744 | -/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ | ||
| 745 | +/* Used by CM_L3_2_DYNAMICDEP */ | ||
| 746 | #define OMAP4430_GFX_DYNDEP_SHIFT 10 | ||
| 747 | #define OMAP4430_GFX_DYNDEP_MASK (1 << 10) | ||
| 748 | |||
| 749 | @@ -810,119 +768,95 @@ | ||
| 750 | #define OMAP4430_GFX_STATDEP_SHIFT 10 | ||
| 751 | #define OMAP4430_GFX_STATDEP_MASK (1 << 10) | ||
| 752 | |||
| 753 | -/* Used by CM_SHADOW_FREQ_CONFIG2, CM_SHADOW_FREQ_CONFIG2_RESTORE */ | ||
| 754 | +/* Used by CM_SHADOW_FREQ_CONFIG2 */ | ||
| 755 | #define OMAP4430_GPMC_FREQ_UPDATE_SHIFT 0 | ||
| 756 | #define OMAP4430_GPMC_FREQ_UPDATE_MASK (1 << 0) | ||
| 757 | |||
| 758 | /* | ||
| 759 | - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, | ||
| 760 | - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER | ||
| 761 | + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, | ||
| 762 | + * CM_DIV_M4_DPLL_PER | ||
| 763 | */ | ||
| 764 | #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_SHIFT 0 | ||
| 765 | #define OMAP4430_HSDIVIDER_CLKOUT1_DIV_MASK (0x1f << 0) | ||
| 766 | |||
| 767 | /* | ||
| 768 | - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, | ||
| 769 | - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER | ||
| 770 | + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, | ||
| 771 | + * CM_DIV_M4_DPLL_PER | ||
| 772 | */ | ||
| 773 | #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_SHIFT 5 | ||
| 774 | #define OMAP4430_HSDIVIDER_CLKOUT1_DIVCHACK_MASK (1 << 5) | ||
| 775 | |||
| 776 | /* | ||
| 777 | - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, | ||
| 778 | - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER | ||
| 779 | + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, | ||
| 780 | + * CM_DIV_M4_DPLL_PER | ||
| 781 | */ | ||
| 782 | #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_SHIFT 8 | ||
| 783 | #define OMAP4430_HSDIVIDER_CLKOUT1_GATE_CTRL_MASK (1 << 8) | ||
| 784 | |||
| 785 | /* | ||
| 786 | - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, | ||
| 787 | - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER | ||
| 788 | + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, | ||
| 789 | + * CM_DIV_M4_DPLL_PER | ||
| 790 | */ | ||
| 791 | #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_SHIFT 12 | ||
| 792 | #define OMAP4430_HSDIVIDER_CLKOUT1_PWDN_MASK (1 << 12) | ||
| 793 | |||
| 794 | /* | ||
| 795 | - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, | ||
| 796 | - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER | ||
| 797 | + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, | ||
| 798 | + * CM_DIV_M5_DPLL_PER | ||
| 799 | */ | ||
| 800 | #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_SHIFT 0 | ||
| 801 | #define OMAP4430_HSDIVIDER_CLKOUT2_DIV_MASK (0x1f << 0) | ||
| 802 | |||
| 803 | /* | ||
| 804 | - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, | ||
| 805 | - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER | ||
| 806 | + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, | ||
| 807 | + * CM_DIV_M5_DPLL_PER | ||
| 808 | */ | ||
| 809 | #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_SHIFT 5 | ||
| 810 | #define OMAP4430_HSDIVIDER_CLKOUT2_DIVCHACK_MASK (1 << 5) | ||
| 811 | |||
| 812 | /* | ||
| 813 | - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, | ||
| 814 | - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER | ||
| 815 | + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, | ||
| 816 | + * CM_DIV_M5_DPLL_PER | ||
| 817 | */ | ||
| 818 | #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_SHIFT 8 | ||
| 819 | #define OMAP4430_HSDIVIDER_CLKOUT2_GATE_CTRL_MASK (1 << 8) | ||
| 820 | |||
| 821 | /* | ||
| 822 | - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, | ||
| 823 | - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER | ||
| 824 | + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, | ||
| 825 | + * CM_DIV_M5_DPLL_PER | ||
| 826 | */ | ||
| 827 | #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_SHIFT 12 | ||
| 828 | #define OMAP4430_HSDIVIDER_CLKOUT2_PWDN_MASK (1 << 12) | ||
| 829 | |||
| 830 | -/* | ||
| 831 | - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, | ||
| 832 | - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER | ||
| 833 | - */ | ||
| 834 | +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ | ||
| 835 | #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_SHIFT 0 | ||
| 836 | #define OMAP4430_HSDIVIDER_CLKOUT3_DIV_MASK (0x1f << 0) | ||
| 837 | |||
| 838 | -/* | ||
| 839 | - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, | ||
| 840 | - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER | ||
| 841 | - */ | ||
| 842 | +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ | ||
| 843 | #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_SHIFT 5 | ||
| 844 | #define OMAP4430_HSDIVIDER_CLKOUT3_DIVCHACK_MASK (1 << 5) | ||
| 845 | |||
| 846 | -/* | ||
| 847 | - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, | ||
| 848 | - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER | ||
| 849 | - */ | ||
| 850 | +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ | ||
| 851 | #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_SHIFT 8 | ||
| 852 | #define OMAP4430_HSDIVIDER_CLKOUT3_GATE_CTRL_MASK (1 << 8) | ||
| 853 | |||
| 854 | -/* | ||
| 855 | - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, | ||
| 856 | - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER | ||
| 857 | - */ | ||
| 858 | +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ | ||
| 859 | #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_SHIFT 12 | ||
| 860 | #define OMAP4430_HSDIVIDER_CLKOUT3_PWDN_MASK (1 << 12) | ||
| 861 | |||
| 862 | -/* | ||
| 863 | - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, | ||
| 864 | - * CM_DIV_M7_DPLL_PER | ||
| 865 | - */ | ||
| 866 | +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ | ||
| 867 | #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_SHIFT 0 | ||
| 868 | #define OMAP4430_HSDIVIDER_CLKOUT4_DIV_MASK (0x1f << 0) | ||
| 869 | |||
| 870 | -/* | ||
| 871 | - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, | ||
| 872 | - * CM_DIV_M7_DPLL_PER | ||
| 873 | - */ | ||
| 874 | +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ | ||
| 875 | #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_SHIFT 5 | ||
| 876 | #define OMAP4430_HSDIVIDER_CLKOUT4_DIVCHACK_MASK (1 << 5) | ||
| 877 | |||
| 878 | -/* | ||
| 879 | - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, | ||
| 880 | - * CM_DIV_M7_DPLL_PER | ||
| 881 | - */ | ||
| 882 | +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ | ||
| 883 | #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_SHIFT 8 | ||
| 884 | #define OMAP4430_HSDIVIDER_CLKOUT4_GATE_CTRL_MASK (1 << 8) | ||
| 885 | |||
| 886 | -/* | ||
| 887 | - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, | ||
| 888 | - * CM_DIV_M7_DPLL_PER | ||
| 889 | - */ | ||
| 890 | +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ | ||
| 891 | #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_SHIFT 12 | ||
| 892 | #define OMAP4430_HSDIVIDER_CLKOUT4_PWDN_MASK (1 << 12) | ||
| 893 | |||
| 894 | @@ -934,8 +868,7 @@ | ||
| 895 | * CM1_ABE_TIMER8_CLKCTRL, CM1_ABE_WDT3_CLKCTRL, CM_ALWON_MDMINTC_CLKCTRL, | ||
| 896 | * CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, CM_ALWON_SR_MPU_CLKCTRL, | ||
| 897 | * CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL, | ||
| 898 | - * CM_CM1_PROFILING_CLKCTRL, CM_CM1_PROFILING_CLKCTRL_RESTORE, | ||
| 899 | - * CM_CM2_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL_RESTORE, | ||
| 900 | + * CM_CM1_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL, | ||
| 901 | * CM_D2D_MODEM_ICR_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, CM_D2D_SAD2D_FW_CLKCTRL, | ||
| 902 | * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL, | ||
| 903 | * CM_EMU_DEBUGSS_CLKCTRL, CM_GFX_GFX_CLKCTRL, CM_IVAHD_IVAHD_CLKCTRL, | ||
| 904 | @@ -944,30 +877,24 @@ | ||
| 905 | * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, | ||
| 906 | * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, | ||
| 907 | * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL, | ||
| 908 | - * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_HOST_FS_CLKCTRL, | ||
| 909 | - * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL, | ||
| 910 | - * CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, CM_L3INIT_XHPI_CLKCTRL, | ||
| 911 | - * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL_RESTORE, | ||
| 912 | - * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE, | ||
| 913 | - * CM_L3INSTR_OCP_WP1_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE, | ||
| 914 | + * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, | ||
| 915 | + * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL, | ||
| 916 | + * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL, | ||
| 917 | * CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, CM_L3_2_L3_2_CLKCTRL, | ||
| 918 | * CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, CM_L4CFG_L4_CFG_CLKCTRL, | ||
| 919 | * CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, CM_L4PER_ADC_CLKCTRL, | ||
| 920 | * CM_L4PER_DMTIMER10_CLKCTRL, CM_L4PER_DMTIMER11_CLKCTRL, | ||
| 921 | * CM_L4PER_DMTIMER2_CLKCTRL, CM_L4PER_DMTIMER3_CLKCTRL, | ||
| 922 | * CM_L4PER_DMTIMER4_CLKCTRL, CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_ELM_CLKCTRL, | ||
| 923 | - * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, | ||
| 924 | - * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, | ||
| 925 | - * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, | ||
| 926 | - * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, | ||
| 927 | - * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, | ||
| 928 | - * CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, | ||
| 929 | - * CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, | ||
| 930 | - * CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, | ||
| 931 | - * CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, | ||
| 932 | - * CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, | ||
| 933 | - * CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, | ||
| 934 | - * CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, | ||
| 935 | + * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL, | ||
| 936 | + * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_HDQ1W_CLKCTRL, | ||
| 937 | + * CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, CM_L4PER_I2C1_CLKCTRL, | ||
| 938 | + * CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, CM_L4PER_I2C4_CLKCTRL, | ||
| 939 | + * CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL, | ||
| 940 | + * CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, CM_L4PER_MCSPI1_CLKCTRL, | ||
| 941 | + * CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, CM_L4PER_MCSPI4_CLKCTRL, | ||
| 942 | + * CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, CM_L4PER_MMCSD4_CLKCTRL, | ||
| 943 | + * CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, | ||
| 944 | * CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, CM_L4PER_UART2_CLKCTRL, | ||
| 945 | * CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, CM_L4SEC_AES1_CLKCTRL, | ||
| 946 | * CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_L4SEC_DES3DES_CLKCTRL, | ||
| 947 | @@ -983,166 +910,148 @@ | ||
| 948 | #define OMAP4430_IDLEST_SHIFT 16 | ||
| 949 | #define OMAP4430_IDLEST_MASK (0x3 << 16) | ||
| 950 | |||
| 951 | -/* | ||
| 952 | - * Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP, | ||
| 953 | - * CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE | ||
| 954 | - */ | ||
| 955 | +/* Used by CM_DUCATI_DYNAMICDEP, CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP */ | ||
| 956 | #define OMAP4430_ISS_DYNDEP_SHIFT 9 | ||
| 957 | #define OMAP4430_ISS_DYNDEP_MASK (1 << 9) | ||
| 958 | |||
| 959 | /* | ||
| 960 | * Used by CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, | ||
| 961 | - * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP | ||
| 962 | + * CM_TESLA_STATICDEP | ||
| 963 | */ | ||
| 964 | #define OMAP4430_ISS_STATDEP_SHIFT 9 | ||
| 965 | #define OMAP4430_ISS_STATDEP_MASK (1 << 9) | ||
| 966 | |||
| 967 | -/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_TESLA_DYNAMICDEP */ | ||
| 968 | +/* Used by CM_L3_2_DYNAMICDEP, CM_TESLA_DYNAMICDEP */ | ||
| 969 | #define OMAP4430_IVAHD_DYNDEP_SHIFT 2 | ||
| 970 | #define OMAP4430_IVAHD_DYNDEP_MASK (1 << 2) | ||
| 971 | |||
| 972 | /* | ||
| 973 | - * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, | ||
| 974 | - * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, | ||
| 975 | - * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, | ||
| 976 | - * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP | ||
| 977 | + * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, | ||
| 978 | + * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_L3INIT_STATICDEP, | ||
| 979 | + * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP | ||
| 980 | */ | ||
| 981 | #define OMAP4430_IVAHD_STATDEP_SHIFT 2 | ||
| 982 | #define OMAP4430_IVAHD_STATDEP_MASK (1 << 2) | ||
| 983 | |||
| 984 | -/* | ||
| 985 | - * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, | ||
| 986 | - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, CM_L4PER_DYNAMICDEP_RESTORE | ||
| 987 | - */ | ||
| 988 | +/* Used by CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ | ||
| 989 | #define OMAP4430_L3INIT_DYNDEP_SHIFT 7 | ||
| 990 | #define OMAP4430_L3INIT_DYNDEP_MASK (1 << 7) | ||
| 991 | |||
| 992 | /* | ||
| 993 | - * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, | ||
| 994 | - * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, | ||
| 995 | - * CM_TESLA_STATICDEP | ||
| 996 | + * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_MPU_STATICDEP, | ||
| 997 | + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP | ||
| 998 | */ | ||
| 999 | #define OMAP4430_L3INIT_STATDEP_SHIFT 7 | ||
| 1000 | #define OMAP4430_L3INIT_STATDEP_MASK (1 << 7) | ||
| 1001 | |||
| 1002 | /* | ||
| 1003 | * Used by CM_DSS_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, CM_L3_2_DYNAMICDEP, | ||
| 1004 | - * CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, | ||
| 1005 | - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP | ||
| 1006 | + * CM_L4CFG_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP | ||
| 1007 | */ | ||
| 1008 | #define OMAP4430_L3_1_DYNDEP_SHIFT 5 | ||
| 1009 | #define OMAP4430_L3_1_DYNDEP_MASK (1 << 5) | ||
| 1010 | |||
| 1011 | /* | ||
| 1012 | - * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, | ||
| 1013 | - * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, | ||
| 1014 | + * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, | ||
| 1015 | + * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, | ||
| 1016 | * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, | ||
| 1017 | - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP | ||
| 1018 | + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP | ||
| 1019 | */ | ||
| 1020 | #define OMAP4430_L3_1_STATDEP_SHIFT 5 | ||
| 1021 | #define OMAP4430_L3_1_STATDEP_MASK (1 << 5) | ||
| 1022 | |||
| 1023 | /* | ||
| 1024 | - * Used by CM_CAM_DYNAMICDEP, CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, | ||
| 1025 | - * CM_DUCATI_DYNAMICDEP, CM_EMU_DYNAMICDEP, CM_GFX_DYNAMICDEP, | ||
| 1026 | - * CM_IVAHD_DYNAMICDEP, CM_L3INIT_DYNAMICDEP, CM_L3_1_DYNAMICDEP, | ||
| 1027 | - * CM_L3_1_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, | ||
| 1028 | - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4SEC_DYNAMICDEP, CM_SDMA_DYNAMICDEP | ||
| 1029 | + * Used by CM_CAM_DYNAMICDEP, CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP, | ||
| 1030 | + * CM_EMU_DYNAMICDEP, CM_GFX_DYNAMICDEP, CM_IVAHD_DYNAMICDEP, | ||
| 1031 | + * CM_L3INIT_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, | ||
| 1032 | + * CM_L4SEC_DYNAMICDEP, CM_SDMA_DYNAMICDEP | ||
| 1033 | */ | ||
| 1034 | #define OMAP4430_L3_2_DYNDEP_SHIFT 6 | ||
| 1035 | #define OMAP4430_L3_2_DYNDEP_MASK (1 << 6) | ||
| 1036 | |||
| 1037 | /* | ||
| 1038 | - * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, | ||
| 1039 | - * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, | ||
| 1040 | + * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, | ||
| 1041 | + * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, | ||
| 1042 | * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, | ||
| 1043 | - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP | ||
| 1044 | + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP | ||
| 1045 | */ | ||
| 1046 | #define OMAP4430_L3_2_STATDEP_SHIFT 6 | ||
| 1047 | #define OMAP4430_L3_2_STATDEP_MASK (1 << 6) | ||
| 1048 | |||
| 1049 | -/* Used by CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE */ | ||
| 1050 | +/* Used by CM_L3_1_DYNAMICDEP */ | ||
| 1051 | #define OMAP4430_L4CFG_DYNDEP_SHIFT 12 | ||
| 1052 | #define OMAP4430_L4CFG_DYNDEP_MASK (1 << 12) | ||
| 1053 | |||
| 1054 | /* | ||
| 1055 | - * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, | ||
| 1056 | - * CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, | ||
| 1057 | - * CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP | ||
| 1058 | + * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, | ||
| 1059 | + * CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP | ||
| 1060 | */ | ||
| 1061 | #define OMAP4430_L4CFG_STATDEP_SHIFT 12 | ||
| 1062 | #define OMAP4430_L4CFG_STATDEP_MASK (1 << 12) | ||
| 1063 | |||
| 1064 | -/* Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE */ | ||
| 1065 | +/* Used by CM_L3_2_DYNAMICDEP */ | ||
| 1066 | #define OMAP4430_L4PER_DYNDEP_SHIFT 13 | ||
| 1067 | #define OMAP4430_L4PER_DYNDEP_MASK (1 << 13) | ||
| 1068 | |||
| 1069 | /* | ||
| 1070 | - * Used by CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, CM_DUCATI_STATICDEP, | ||
| 1071 | - * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, | ||
| 1072 | - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP | ||
| 1073 | + * Used by CM_D2D_STATICDEP, CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, | ||
| 1074 | + * CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, CM_SDMA_STATICDEP, CM_TESLA_STATICDEP | ||
| 1075 | */ | ||
| 1076 | #define OMAP4430_L4PER_STATDEP_SHIFT 13 | ||
| 1077 | #define OMAP4430_L4PER_STATDEP_MASK (1 << 13) | ||
| 1078 | |||
| 1079 | -/* | ||
| 1080 | - * Used by CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, | ||
| 1081 | - * CM_L4PER_DYNAMICDEP_RESTORE | ||
| 1082 | - */ | ||
| 1083 | +/* Used by CM_L3_2_DYNAMICDEP, CM_L4PER_DYNAMICDEP */ | ||
| 1084 | #define OMAP4430_L4SEC_DYNDEP_SHIFT 14 | ||
| 1085 | #define OMAP4430_L4SEC_DYNDEP_MASK (1 << 14) | ||
| 1086 | |||
| 1087 | /* | ||
| 1088 | * Used by CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, | ||
| 1089 | - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE | ||
| 1090 | + * CM_SDMA_STATICDEP | ||
| 1091 | */ | ||
| 1092 | #define OMAP4430_L4SEC_STATDEP_SHIFT 14 | ||
| 1093 | #define OMAP4430_L4SEC_STATDEP_MASK (1 << 14) | ||
| 1094 | |||
| 1095 | -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ | ||
| 1096 | +/* Used by CM_L4CFG_DYNAMICDEP */ | ||
| 1097 | #define OMAP4430_L4WKUP_DYNDEP_SHIFT 15 | ||
| 1098 | #define OMAP4430_L4WKUP_DYNDEP_MASK (1 << 15) | ||
| 1099 | |||
| 1100 | /* | ||
| 1101 | * Used by CM_DUCATI_STATICDEP, CM_L3INIT_STATICDEP, CM_MPU_STATICDEP, | ||
| 1102 | - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP | ||
| 1103 | + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP | ||
| 1104 | */ | ||
| 1105 | #define OMAP4430_L4WKUP_STATDEP_SHIFT 15 | ||
| 1106 | #define OMAP4430_L4WKUP_STATDEP_MASK (1 << 15) | ||
| 1107 | |||
| 1108 | /* | ||
| 1109 | - * Used by CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, CM_L3_1_DYNAMICDEP, | ||
| 1110 | - * CM_L3_1_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, | ||
| 1111 | - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP | ||
| 1112 | + * Used by CM_D2D_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, | ||
| 1113 | + * CM_MPU_DYNAMICDEP | ||
| 1114 | */ | ||
| 1115 | #define OMAP4430_MEMIF_DYNDEP_SHIFT 4 | ||
| 1116 | #define OMAP4430_MEMIF_DYNDEP_MASK (1 << 4) | ||
| 1117 | |||
| 1118 | /* | ||
| 1119 | - * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_D2D_STATICDEP_RESTORE, | ||
| 1120 | - * CM_DSS_STATICDEP, CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, | ||
| 1121 | + * Used by CM_CAM_STATICDEP, CM_D2D_STATICDEP, CM_DSS_STATICDEP, | ||
| 1122 | + * CM_DUCATI_STATICDEP, CM_GFX_STATICDEP, CM_IVAHD_STATICDEP, | ||
| 1123 | * CM_L3INIT_STATICDEP, CM_L4SEC_STATICDEP, CM_MPU_STATICDEP, | ||
| 1124 | - * CM_SDMA_STATICDEP, CM_SDMA_STATICDEP_RESTORE, CM_TESLA_STATICDEP | ||
| 1125 | + * CM_SDMA_STATICDEP, CM_TESLA_STATICDEP | ||
| 1126 | */ | ||
| 1127 | #define OMAP4430_MEMIF_STATDEP_SHIFT 4 | ||
| 1128 | #define OMAP4430_MEMIF_STATDEP_MASK (1 << 4) | ||
| 1129 | |||
| 1130 | /* | ||
| 1131 | * Used by CM_SSC_MODFREQDIV_DPLL_ABE, CM_SSC_MODFREQDIV_DPLL_CORE, | ||
| 1132 | - * CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, CM_SSC_MODFREQDIV_DPLL_DDRPHY, | ||
| 1133 | - * CM_SSC_MODFREQDIV_DPLL_IVA, CM_SSC_MODFREQDIV_DPLL_MPU, | ||
| 1134 | - * CM_SSC_MODFREQDIV_DPLL_PER, CM_SSC_MODFREQDIV_DPLL_UNIPRO, | ||
| 1135 | - * CM_SSC_MODFREQDIV_DPLL_USB | ||
| 1136 | + * CM_SSC_MODFREQDIV_DPLL_DDRPHY, CM_SSC_MODFREQDIV_DPLL_IVA, | ||
| 1137 | + * CM_SSC_MODFREQDIV_DPLL_MPU, CM_SSC_MODFREQDIV_DPLL_PER, | ||
| 1138 | + * CM_SSC_MODFREQDIV_DPLL_UNIPRO, CM_SSC_MODFREQDIV_DPLL_USB | ||
| 1139 | */ | ||
| 1140 | #define OMAP4430_MODFREQDIV_EXPONENT_SHIFT 8 | ||
| 1141 | #define OMAP4430_MODFREQDIV_EXPONENT_MASK (0x7 << 8) | ||
| 1142 | |||
| 1143 | /* | ||
| 1144 | * Used by CM_SSC_MODFREQDIV_DPLL_ABE, CM_SSC_MODFREQDIV_DPLL_CORE, | ||
| 1145 | - * CM_SSC_MODFREQDIV_DPLL_CORE_RESTORE, CM_SSC_MODFREQDIV_DPLL_DDRPHY, | ||
| 1146 | - * CM_SSC_MODFREQDIV_DPLL_IVA, CM_SSC_MODFREQDIV_DPLL_MPU, | ||
| 1147 | - * CM_SSC_MODFREQDIV_DPLL_PER, CM_SSC_MODFREQDIV_DPLL_UNIPRO, | ||
| 1148 | - * CM_SSC_MODFREQDIV_DPLL_USB | ||
| 1149 | + * CM_SSC_MODFREQDIV_DPLL_DDRPHY, CM_SSC_MODFREQDIV_DPLL_IVA, | ||
| 1150 | + * CM_SSC_MODFREQDIV_DPLL_MPU, CM_SSC_MODFREQDIV_DPLL_PER, | ||
| 1151 | + * CM_SSC_MODFREQDIV_DPLL_UNIPRO, CM_SSC_MODFREQDIV_DPLL_USB | ||
| 1152 | */ | ||
| 1153 | #define OMAP4430_MODFREQDIV_MANTISSA_SHIFT 0 | ||
| 1154 | #define OMAP4430_MODFREQDIV_MANTISSA_MASK (0x7f << 0) | ||
| 1155 | @@ -1155,8 +1064,7 @@ | ||
| 1156 | * CM1_ABE_TIMER8_CLKCTRL, CM1_ABE_WDT3_CLKCTRL, CM_ALWON_MDMINTC_CLKCTRL, | ||
| 1157 | * CM_ALWON_SR_CORE_CLKCTRL, CM_ALWON_SR_IVA_CLKCTRL, CM_ALWON_SR_MPU_CLKCTRL, | ||
| 1158 | * CM_CAM_FDIF_CLKCTRL, CM_CAM_ISS_CLKCTRL, CM_CEFUSE_CEFUSE_CLKCTRL, | ||
| 1159 | - * CM_CM1_PROFILING_CLKCTRL, CM_CM1_PROFILING_CLKCTRL_RESTORE, | ||
| 1160 | - * CM_CM2_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL_RESTORE, | ||
| 1161 | + * CM_CM1_PROFILING_CLKCTRL, CM_CM2_PROFILING_CLKCTRL, | ||
| 1162 | * CM_D2D_MODEM_ICR_CLKCTRL, CM_D2D_SAD2D_CLKCTRL, CM_D2D_SAD2D_FW_CLKCTRL, | ||
| 1163 | * CM_DSS_DEISS_CLKCTRL, CM_DSS_DSS_CLKCTRL, CM_DUCATI_DUCATI_CLKCTRL, | ||
| 1164 | * CM_EMU_DEBUGSS_CLKCTRL, CM_GFX_GFX_CLKCTRL, CM_IVAHD_IVAHD_CLKCTRL, | ||
| 1165 | @@ -1165,30 +1073,24 @@ | ||
| 1166 | * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, | ||
| 1167 | * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, | ||
| 1168 | * CM_L3INIT_USBPHYOCP2SCP_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL, | ||
| 1169 | - * CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, CM_L3INIT_USB_HOST_FS_CLKCTRL, | ||
| 1170 | - * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL, | ||
| 1171 | - * CM_L3INIT_USB_TLL_CLKCTRL_RESTORE, CM_L3INIT_XHPI_CLKCTRL, | ||
| 1172 | - * CM_L3INSTR_L3_3_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL_RESTORE, | ||
| 1173 | - * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE, | ||
| 1174 | - * CM_L3INSTR_OCP_WP1_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE, | ||
| 1175 | + * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, | ||
| 1176 | + * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, CM_L3INSTR_L3_3_CLKCTRL, | ||
| 1177 | + * CM_L3INSTR_L3_INSTR_CLKCTRL, CM_L3INSTR_OCP_WP1_CLKCTRL, | ||
| 1178 | * CM_L3_1_L3_1_CLKCTRL, CM_L3_2_GPMC_CLKCTRL, CM_L3_2_L3_2_CLKCTRL, | ||
| 1179 | * CM_L3_2_OCMC_RAM_CLKCTRL, CM_L4CFG_HW_SEM_CLKCTRL, CM_L4CFG_L4_CFG_CLKCTRL, | ||
| 1180 | * CM_L4CFG_MAILBOX_CLKCTRL, CM_L4CFG_SAR_ROM_CLKCTRL, CM_L4PER_ADC_CLKCTRL, | ||
| 1181 | * CM_L4PER_DMTIMER10_CLKCTRL, CM_L4PER_DMTIMER11_CLKCTRL, | ||
| 1182 | * CM_L4PER_DMTIMER2_CLKCTRL, CM_L4PER_DMTIMER3_CLKCTRL, | ||
| 1183 | * CM_L4PER_DMTIMER4_CLKCTRL, CM_L4PER_DMTIMER9_CLKCTRL, CM_L4PER_ELM_CLKCTRL, | ||
| 1184 | - * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, | ||
| 1185 | - * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, | ||
| 1186 | - * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, | ||
| 1187 | - * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, | ||
| 1188 | - * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, | ||
| 1189 | - * CM_L4PER_HDQ1W_CLKCTRL, CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, | ||
| 1190 | - * CM_L4PER_I2C1_CLKCTRL, CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, | ||
| 1191 | - * CM_L4PER_I2C4_CLKCTRL, CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, | ||
| 1192 | - * CM_L4PER_MCASP2_CLKCTRL, CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, | ||
| 1193 | - * CM_L4PER_MCSPI1_CLKCTRL, CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, | ||
| 1194 | - * CM_L4PER_MCSPI4_CLKCTRL, CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, | ||
| 1195 | - * CM_L4PER_MMCSD4_CLKCTRL, CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, | ||
| 1196 | + * CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL, | ||
| 1197 | + * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_HDQ1W_CLKCTRL, | ||
| 1198 | + * CM_L4PER_HECC1_CLKCTRL, CM_L4PER_HECC2_CLKCTRL, CM_L4PER_I2C1_CLKCTRL, | ||
| 1199 | + * CM_L4PER_I2C2_CLKCTRL, CM_L4PER_I2C3_CLKCTRL, CM_L4PER_I2C4_CLKCTRL, | ||
| 1200 | + * CM_L4PER_I2C5_CLKCTRL, CM_L4PER_L4PER_CLKCTRL, CM_L4PER_MCASP2_CLKCTRL, | ||
| 1201 | + * CM_L4PER_MCASP3_CLKCTRL, CM_L4PER_MCBSP4_CLKCTRL, CM_L4PER_MCSPI1_CLKCTRL, | ||
| 1202 | + * CM_L4PER_MCSPI2_CLKCTRL, CM_L4PER_MCSPI3_CLKCTRL, CM_L4PER_MCSPI4_CLKCTRL, | ||
| 1203 | + * CM_L4PER_MGATE_CLKCTRL, CM_L4PER_MMCSD3_CLKCTRL, CM_L4PER_MMCSD4_CLKCTRL, | ||
| 1204 | + * CM_L4PER_MMCSD5_CLKCTRL, CM_L4PER_MSPROHG_CLKCTRL, | ||
| 1205 | * CM_L4PER_SLIMBUS2_CLKCTRL, CM_L4PER_UART1_CLKCTRL, CM_L4PER_UART2_CLKCTRL, | ||
| 1206 | * CM_L4PER_UART3_CLKCTRL, CM_L4PER_UART4_CLKCTRL, CM_L4SEC_AES1_CLKCTRL, | ||
| 1207 | * CM_L4SEC_AES2_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_L4SEC_DES3DES_CLKCTRL, | ||
| 1208 | @@ -1221,11 +1123,9 @@ | ||
| 1209 | #define OMAP4430_OPTFCLKEN_CTRLCLK_MASK (1 << 8) | ||
| 1210 | |||
| 1211 | /* | ||
| 1212 | - * Used by CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO2_CLKCTRL_RESTORE, | ||
| 1213 | - * CM_L4PER_GPIO3_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL_RESTORE, | ||
| 1214 | - * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO4_CLKCTRL_RESTORE, | ||
| 1215 | - * CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL_RESTORE, | ||
| 1216 | - * CM_L4PER_GPIO6_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL_RESTORE, CM_WKUP_GPIO1_CLKCTRL | ||
| 1217 | + * Used by CM_L4PER_GPIO2_CLKCTRL, CM_L4PER_GPIO3_CLKCTRL, | ||
| 1218 | + * CM_L4PER_GPIO4_CLKCTRL, CM_L4PER_GPIO5_CLKCTRL, CM_L4PER_GPIO6_CLKCTRL, | ||
| 1219 | + * CM_WKUP_GPIO1_CLKCTRL | ||
| 1220 | */ | ||
| 1221 | #define OMAP4430_OPTFCLKEN_DBCLK_SHIFT 8 | ||
| 1222 | #define OMAP4430_OPTFCLKEN_DBCLK_MASK (1 << 8) | ||
| 1223 | @@ -1254,23 +1154,23 @@ | ||
| 1224 | #define OMAP4430_OPTFCLKEN_FCLK2_SHIFT 10 | ||
| 1225 | #define OMAP4430_OPTFCLKEN_FCLK2_MASK (1 << 10) | ||
| 1226 | |||
| 1227 | -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | ||
| 1228 | +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ | ||
| 1229 | #define OMAP4430_OPTFCLKEN_FUNC48MCLK_SHIFT 15 | ||
| 1230 | #define OMAP4430_OPTFCLKEN_FUNC48MCLK_MASK (1 << 15) | ||
| 1231 | |||
| 1232 | -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | ||
| 1233 | +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ | ||
| 1234 | #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_SHIFT 13 | ||
| 1235 | #define OMAP4430_OPTFCLKEN_HSIC480M_P1_CLK_MASK (1 << 13) | ||
| 1236 | |||
| 1237 | -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | ||
| 1238 | +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ | ||
| 1239 | #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_SHIFT 14 | ||
| 1240 | #define OMAP4430_OPTFCLKEN_HSIC480M_P2_CLK_MASK (1 << 14) | ||
| 1241 | |||
| 1242 | -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | ||
| 1243 | +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ | ||
| 1244 | #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_SHIFT 11 | ||
| 1245 | #define OMAP4430_OPTFCLKEN_HSIC60M_P1_CLK_MASK (1 << 11) | ||
| 1246 | |||
| 1247 | -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | ||
| 1248 | +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ | ||
| 1249 | #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_SHIFT 12 | ||
| 1250 | #define OMAP4430_OPTFCLKEN_HSIC60M_P2_CLK_MASK (1 << 12) | ||
| 1251 | |||
| 1252 | @@ -1306,27 +1206,27 @@ | ||
| 1253 | #define OMAP4430_OPTFCLKEN_TXPHYCLK_SHIFT 8 | ||
| 1254 | #define OMAP4430_OPTFCLKEN_TXPHYCLK_MASK (1 << 8) | ||
| 1255 | |||
| 1256 | -/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ | ||
| 1257 | +/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ | ||
| 1258 | #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_SHIFT 8 | ||
| 1259 | #define OMAP4430_OPTFCLKEN_USB_CH0_CLK_MASK (1 << 8) | ||
| 1260 | |||
| 1261 | -/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ | ||
| 1262 | +/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ | ||
| 1263 | #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_SHIFT 9 | ||
| 1264 | #define OMAP4430_OPTFCLKEN_USB_CH1_CLK_MASK (1 << 9) | ||
| 1265 | |||
| 1266 | -/* Used by CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE */ | ||
| 1267 | +/* Used by CM_L3INIT_USB_TLL_CLKCTRL */ | ||
| 1268 | #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_SHIFT 10 | ||
| 1269 | #define OMAP4430_OPTFCLKEN_USB_CH2_CLK_MASK (1 << 10) | ||
| 1270 | |||
| 1271 | -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | ||
| 1272 | +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ | ||
| 1273 | #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_SHIFT 8 | ||
| 1274 | #define OMAP4430_OPTFCLKEN_UTMI_P1_CLK_MASK (1 << 8) | ||
| 1275 | |||
| 1276 | -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | ||
| 1277 | +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ | ||
| 1278 | #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_SHIFT 9 | ||
| 1279 | #define OMAP4430_OPTFCLKEN_UTMI_P2_CLK_MASK (1 << 9) | ||
| 1280 | |||
| 1281 | -/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE */ | ||
| 1282 | +/* Used by CM_L3INIT_USB_HOST_CLKCTRL */ | ||
| 1283 | #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_SHIFT 10 | ||
| 1284 | #define OMAP4430_OPTFCLKEN_UTMI_P3_CLK_MASK (1 << 10) | ||
| 1285 | |||
| 1286 | @@ -1374,7 +1274,7 @@ | ||
| 1287 | #define OMAP4430_PMD_TRACE_MUX_CTRL_SHIFT 22 | ||
| 1288 | #define OMAP4430_PMD_TRACE_MUX_CTRL_MASK (0x3 << 22) | ||
| 1289 | |||
| 1290 | -/* Used by CM_DYN_DEP_PRESCAL, CM_DYN_DEP_PRESCAL_RESTORE */ | ||
| 1291 | +/* Used by CM_DYN_DEP_PRESCAL */ | ||
| 1292 | #define OMAP4430_PRESCAL_SHIFT 0 | ||
| 1293 | #define OMAP4430_PRESCAL_MASK (0x3f << 0) | ||
| 1294 | |||
| 1295 | @@ -1382,10 +1282,7 @@ | ||
| 1296 | #define OMAP4430_R_RTL_SHIFT 11 | ||
| 1297 | #define OMAP4430_R_RTL_MASK (0x1f << 11) | ||
| 1298 | |||
| 1299 | -/* | ||
| 1300 | - * Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, | ||
| 1301 | - * CM_L3INIT_USB_TLL_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL_RESTORE | ||
| 1302 | - */ | ||
| 1303 | +/* Used by CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_TLL_CLKCTRL */ | ||
| 1304 | #define OMAP4430_SAR_MODE_SHIFT 4 | ||
| 1305 | #define OMAP4430_SAR_MODE_MASK (1 << 4) | ||
| 1306 | |||
| 1307 | @@ -1397,7 +1294,7 @@ | ||
| 1308 | #define OMAP4430_SCHEME_SHIFT 30 | ||
| 1309 | #define OMAP4430_SCHEME_MASK (0x3 << 30) | ||
| 1310 | |||
| 1311 | -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ | ||
| 1312 | +/* Used by CM_L4CFG_DYNAMICDEP */ | ||
| 1313 | #define OMAP4430_SDMA_DYNDEP_SHIFT 11 | ||
| 1314 | #define OMAP4430_SDMA_DYNDEP_MASK (1 << 11) | ||
| 1315 | |||
| 1316 | @@ -1417,10 +1314,10 @@ | ||
| 1317 | * CM_L3INIT_HSI_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL, CM_L3INIT_MMC2_CLKCTRL, | ||
| 1318 | * CM_L3INIT_MMC6_CLKCTRL, CM_L3INIT_P1500_CLKCTRL, CM_L3INIT_PCIESS_CLKCTRL, | ||
| 1319 | * CM_L3INIT_SATA_CLKCTRL, CM_L3INIT_TPPSS_CLKCTRL, CM_L3INIT_UNIPRO1_CLKCTRL, | ||
| 1320 | - * CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_CLKCTRL_RESTORE, | ||
| 1321 | - * CM_L3INIT_USB_HOST_FS_CLKCTRL, CM_L3INIT_USB_OTG_CLKCTRL, | ||
| 1322 | - * CM_L3INIT_XHPI_CLKCTRL, CM_L4SEC_CRYPTODMA_CLKCTRL, CM_MPU_MPU_CLKCTRL, | ||
| 1323 | - * CM_SDMA_SDMA_CLKCTRL, CM_TESLA_TESLA_CLKCTRL | ||
| 1324 | + * CM_L3INIT_USB_HOST_CLKCTRL, CM_L3INIT_USB_HOST_FS_CLKCTRL, | ||
| 1325 | + * CM_L3INIT_USB_OTG_CLKCTRL, CM_L3INIT_XHPI_CLKCTRL, | ||
| 1326 | + * CM_L4SEC_CRYPTODMA_CLKCTRL, CM_MPU_MPU_CLKCTRL, CM_SDMA_SDMA_CLKCTRL, | ||
| 1327 | + * CM_TESLA_TESLA_CLKCTRL | ||
| 1328 | */ | ||
| 1329 | #define OMAP4430_STBYST_SHIFT 18 | ||
| 1330 | #define OMAP4430_STBYST_MASK (1 << 18) | ||
| 1331 | @@ -1438,17 +1335,13 @@ | ||
| 1332 | #define OMAP4430_ST_DPLL_CLKDCOLDO_MASK (1 << 9) | ||
| 1333 | |||
| 1334 | /* | ||
| 1335 | - * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, | ||
| 1336 | - * CM_DIV_M2_DPLL_CORE_RESTORE, CM_DIV_M2_DPLL_DDRPHY, CM_DIV_M2_DPLL_MPU, | ||
| 1337 | - * CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB | ||
| 1338 | + * Used by CM_DIV_M2_DPLL_ABE, CM_DIV_M2_DPLL_CORE, CM_DIV_M2_DPLL_DDRPHY, | ||
| 1339 | + * CM_DIV_M2_DPLL_MPU, CM_DIV_M2_DPLL_PER, CM_DIV_M2_DPLL_USB | ||
| 1340 | */ | ||
| 1341 | #define OMAP4430_ST_DPLL_CLKOUT_SHIFT 9 | ||
| 1342 | #define OMAP4430_ST_DPLL_CLKOUT_MASK (1 << 9) | ||
| 1343 | |||
| 1344 | -/* | ||
| 1345 | - * Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, | ||
| 1346 | - * CM_DIV_M3_DPLL_CORE_RESTORE, CM_DIV_M3_DPLL_PER | ||
| 1347 | - */ | ||
| 1348 | +/* Used by CM_DIV_M3_DPLL_ABE, CM_DIV_M3_DPLL_CORE, CM_DIV_M3_DPLL_PER */ | ||
| 1349 | #define OMAP4430_ST_DPLL_CLKOUTHIF_SHIFT 9 | ||
| 1350 | #define OMAP4430_ST_DPLL_CLKOUTHIF_MASK (1 << 9) | ||
| 1351 | |||
| 1352 | @@ -1457,30 +1350,24 @@ | ||
| 1353 | #define OMAP4430_ST_DPLL_CLKOUTX2_MASK (1 << 11) | ||
| 1354 | |||
| 1355 | /* | ||
| 1356 | - * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_CORE_RESTORE, | ||
| 1357 | - * CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, CM_DIV_M4_DPLL_PER | ||
| 1358 | + * Used by CM_DIV_M4_DPLL_CORE, CM_DIV_M4_DPLL_DDRPHY, CM_DIV_M4_DPLL_IVA, | ||
| 1359 | + * CM_DIV_M4_DPLL_PER | ||
| 1360 | */ | ||
| 1361 | #define OMAP4430_ST_HSDIVIDER_CLKOUT1_SHIFT 9 | ||
| 1362 | #define OMAP4430_ST_HSDIVIDER_CLKOUT1_MASK (1 << 9) | ||
| 1363 | |||
| 1364 | /* | ||
| 1365 | - * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_CORE_RESTORE, | ||
| 1366 | - * CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, CM_DIV_M5_DPLL_PER | ||
| 1367 | + * Used by CM_DIV_M5_DPLL_CORE, CM_DIV_M5_DPLL_DDRPHY, CM_DIV_M5_DPLL_IVA, | ||
| 1368 | + * CM_DIV_M5_DPLL_PER | ||
| 1369 | */ | ||
| 1370 | #define OMAP4430_ST_HSDIVIDER_CLKOUT2_SHIFT 9 | ||
| 1371 | #define OMAP4430_ST_HSDIVIDER_CLKOUT2_MASK (1 << 9) | ||
| 1372 | |||
| 1373 | -/* | ||
| 1374 | - * Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_CORE_RESTORE, | ||
| 1375 | - * CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER | ||
| 1376 | - */ | ||
| 1377 | +/* Used by CM_DIV_M6_DPLL_CORE, CM_DIV_M6_DPLL_DDRPHY, CM_DIV_M6_DPLL_PER */ | ||
| 1378 | #define OMAP4430_ST_HSDIVIDER_CLKOUT3_SHIFT 9 | ||
| 1379 | #define OMAP4430_ST_HSDIVIDER_CLKOUT3_MASK (1 << 9) | ||
| 1380 | |||
| 1381 | -/* | ||
| 1382 | - * Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_CORE_RESTORE, | ||
| 1383 | - * CM_DIV_M7_DPLL_PER | ||
| 1384 | - */ | ||
| 1385 | +/* Used by CM_DIV_M7_DPLL_CORE, CM_DIV_M7_DPLL_PER */ | ||
| 1386 | #define OMAP4430_ST_HSDIVIDER_CLKOUT4_SHIFT 9 | ||
| 1387 | #define OMAP4430_ST_HSDIVIDER_CLKOUT4_MASK (1 << 9) | ||
| 1388 | |||
| 1389 | @@ -1496,7 +1383,7 @@ | ||
| 1390 | #define OMAP4430_SYS_CLKSEL_SHIFT 0 | ||
| 1391 | #define OMAP4430_SYS_CLKSEL_MASK (0x7 << 0) | ||
| 1392 | |||
| 1393 | -/* Used by CM_L4CFG_DYNAMICDEP, CM_L4CFG_DYNAMICDEP_RESTORE */ | ||
| 1394 | +/* Used by CM_L4CFG_DYNAMICDEP */ | ||
| 1395 | #define OMAP4430_TESLA_DYNDEP_SHIFT 1 | ||
| 1396 | #define OMAP4430_TESLA_DYNDEP_MASK (1 << 1) | ||
| 1397 | |||
| 1398 | @@ -1505,11 +1392,9 @@ | ||
| 1399 | #define OMAP4430_TESLA_STATDEP_MASK (1 << 1) | ||
| 1400 | |||
| 1401 | /* | ||
| 1402 | - * Used by CM_D2D_DYNAMICDEP, CM_D2D_DYNAMICDEP_RESTORE, CM_DUCATI_DYNAMICDEP, | ||
| 1403 | - * CM_EMU_DYNAMICDEP, CM_L3_1_DYNAMICDEP, CM_L3_1_DYNAMICDEP_RESTORE, | ||
| 1404 | - * CM_L3_2_DYNAMICDEP, CM_L3_2_DYNAMICDEP_RESTORE, CM_L4CFG_DYNAMICDEP, | ||
| 1405 | - * CM_L4CFG_DYNAMICDEP_RESTORE, CM_L4PER_DYNAMICDEP, | ||
| 1406 | - * CM_L4PER_DYNAMICDEP_RESTORE, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP | ||
| 1407 | + * Used by CM_D2D_DYNAMICDEP, CM_DUCATI_DYNAMICDEP, CM_EMU_DYNAMICDEP, | ||
| 1408 | + * CM_L3_1_DYNAMICDEP, CM_L3_2_DYNAMICDEP, CM_L4CFG_DYNAMICDEP, | ||
| 1409 | + * CM_L4PER_DYNAMICDEP, CM_MPU_DYNAMICDEP, CM_TESLA_DYNAMICDEP | ||
| 1410 | */ | ||
| 1411 | #define OMAP4430_WINDOWSIZE_SHIFT 24 | ||
| 1412 | #define OMAP4430_WINDOWSIZE_MASK (0xf << 24) | ||
| 1413 | diff --git a/arch/arm/mach-omap2/cm1_44xx.h b/arch/arm/mach-omap2/cm1_44xx.h | ||
| 1414 | index fc649f5..1bc00dc 100644 | ||
| 1415 | --- a/arch/arm/mach-omap2/cm1_44xx.h | ||
| 1416 | +++ b/arch/arm/mach-omap2/cm1_44xx.h | ||
| 1417 | @@ -217,42 +217,6 @@ | ||
| 1418 | #define OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET 0x0088 | ||
| 1419 | #define OMAP4430_CM1_ABE_WDT3_CLKCTRL OMAP44XX_CM1_REGADDR(OMAP4430_CM1_ABE_INST, 0x0088) | ||
| 1420 | |||
| 1421 | -/* CM1.RESTORE_CM1 register offsets */ | ||
| 1422 | -#define OMAP4_CM_CLKSEL_CORE_RESTORE_OFFSET 0x0000 | ||
| 1423 | -#define OMAP4430_CM_CLKSEL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0000) | ||
| 1424 | -#define OMAP4_CM_DIV_M2_DPLL_CORE_RESTORE_OFFSET 0x0004 | ||
| 1425 | -#define OMAP4430_CM_DIV_M2_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0004) | ||
| 1426 | -#define OMAP4_CM_DIV_M3_DPLL_CORE_RESTORE_OFFSET 0x0008 | ||
| 1427 | -#define OMAP4430_CM_DIV_M3_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0008) | ||
| 1428 | -#define OMAP4_CM_DIV_M4_DPLL_CORE_RESTORE_OFFSET 0x000c | ||
| 1429 | -#define OMAP4430_CM_DIV_M4_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x000c) | ||
| 1430 | -#define OMAP4_CM_DIV_M5_DPLL_CORE_RESTORE_OFFSET 0x0010 | ||
| 1431 | -#define OMAP4430_CM_DIV_M5_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0010) | ||
| 1432 | -#define OMAP4_CM_DIV_M6_DPLL_CORE_RESTORE_OFFSET 0x0014 | ||
| 1433 | -#define OMAP4430_CM_DIV_M6_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0014) | ||
| 1434 | -#define OMAP4_CM_DIV_M7_DPLL_CORE_RESTORE_OFFSET 0x0018 | ||
| 1435 | -#define OMAP4430_CM_DIV_M7_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0018) | ||
| 1436 | -#define OMAP4_CM_CLKSEL_DPLL_CORE_RESTORE_OFFSET 0x001c | ||
| 1437 | -#define OMAP4430_CM_CLKSEL_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x001c) | ||
| 1438 | -#define OMAP4_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE_OFFSET 0x0020 | ||
| 1439 | -#define OMAP4430_CM_SSC_DELTAMSTEP_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0020) | ||
| 1440 | -#define OMAP4_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE_OFFSET 0x0024 | ||
| 1441 | -#define OMAP4430_CM_SSC_INSTFREQDIV_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0024) | ||
| 1442 | -#define OMAP4_CM_CLKMODE_DPLL_CORE_RESTORE_OFFSET 0x0028 | ||
| 1443 | -#define OMAP4430_CM_CLKMODE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0028) | ||
| 1444 | -#define OMAP4_CM_SHADOW_FREQ_CONFIG2_RESTORE_OFFSET 0x002c | ||
| 1445 | -#define OMAP4430_CM_SHADOW_FREQ_CONFIG2_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x002c) | ||
| 1446 | -#define OMAP4_CM_SHADOW_FREQ_CONFIG1_RESTORE_OFFSET 0x0030 | ||
| 1447 | -#define OMAP4430_CM_SHADOW_FREQ_CONFIG1_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0030) | ||
| 1448 | -#define OMAP4_CM_AUTOIDLE_DPLL_CORE_RESTORE_OFFSET 0x0034 | ||
| 1449 | -#define OMAP4430_CM_AUTOIDLE_DPLL_CORE_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0034) | ||
| 1450 | -#define OMAP4_CM_MPU_CLKSTCTRL_RESTORE_OFFSET 0x0038 | ||
| 1451 | -#define OMAP4430_CM_MPU_CLKSTCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0038) | ||
| 1452 | -#define OMAP4_CM_CM1_PROFILING_CLKCTRL_RESTORE_OFFSET 0x003c | ||
| 1453 | -#define OMAP4430_CM_CM1_PROFILING_CLKCTRL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x003c) | ||
| 1454 | -#define OMAP4_CM_DYN_DEP_PRESCAL_RESTORE_OFFSET 0x0040 | ||
| 1455 | -#define OMAP4430_CM_DYN_DEP_PRESCAL_RESTORE OMAP44XX_CM1_REGADDR(OMAP4430_CM1_RESTORE_INST, 0x0040) | ||
| 1456 | - | ||
| 1457 | /* Function prototypes */ | ||
| 1458 | extern u32 omap4_cm1_read_inst_reg(s16 inst, u16 idx); | ||
| 1459 | extern void omap4_cm1_write_inst_reg(u32 val, s16 inst, u16 idx); | ||
| 1460 | diff --git a/arch/arm/mach-omap2/cm2_44xx.h b/arch/arm/mach-omap2/cm2_44xx.h | ||
| 1461 | index 8036a16..b9de72d 100644 | ||
| 1462 | --- a/arch/arm/mach-omap2/cm2_44xx.h | ||
| 1463 | +++ b/arch/arm/mach-omap2/cm2_44xx.h | ||
| 1464 | @@ -449,56 +449,6 @@ | ||
| 1465 | #define OMAP4_CM_CEFUSE_CEFUSE_CLKCTRL_OFFSET 0x0020 | ||
| 1466 | #define OMAP4430_CM_CEFUSE_CEFUSE_CLKCTRL OMAP44XX_CM2_REGADDR(OMAP4430_CM2_CEFUSE_INST, 0x0020) | ||
| 1467 | |||
| 1468 | -/* CM2.RESTORE_CM2 register offsets */ | ||
| 1469 | -#define OMAP4_CM_L3_1_CLKSTCTRL_RESTORE_OFFSET 0x0000 | ||
| 1470 | -#define OMAP4430_CM_L3_1_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0000) | ||
| 1471 | -#define OMAP4_CM_L3_2_CLKSTCTRL_RESTORE_OFFSET 0x0004 | ||
| 1472 | -#define OMAP4430_CM_L3_2_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0004) | ||
| 1473 | -#define OMAP4_CM_L4CFG_CLKSTCTRL_RESTORE_OFFSET 0x0008 | ||
| 1474 | -#define OMAP4430_CM_L4CFG_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0008) | ||
| 1475 | -#define OMAP4_CM_MEMIF_CLKSTCTRL_RESTORE_OFFSET 0x000c | ||
| 1476 | -#define OMAP4430_CM_MEMIF_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x000c) | ||
| 1477 | -#define OMAP4_CM_L4PER_CLKSTCTRL_RESTORE_OFFSET 0x0010 | ||
| 1478 | -#define OMAP4430_CM_L4PER_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0010) | ||
| 1479 | -#define OMAP4_CM_L3INIT_CLKSTCTRL_RESTORE_OFFSET 0x0014 | ||
| 1480 | -#define OMAP4430_CM_L3INIT_CLKSTCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0014) | ||
| 1481 | -#define OMAP4_CM_L3INSTR_L3_3_CLKCTRL_RESTORE_OFFSET 0x0018 | ||
| 1482 | -#define OMAP4430_CM_L3INSTR_L3_3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0018) | ||
| 1483 | -#define OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE_OFFSET 0x001c | ||
| 1484 | -#define OMAP4430_CM_L3INSTR_L3_INSTR_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x001c) | ||
| 1485 | -#define OMAP4_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE_OFFSET 0x0020 | ||
| 1486 | -#define OMAP4430_CM_L3INSTR_OCP_WP1_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0020) | ||
| 1487 | -#define OMAP4_CM_CM2_PROFILING_CLKCTRL_RESTORE_OFFSET 0x0024 | ||
| 1488 | -#define OMAP4430_CM_CM2_PROFILING_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0024) | ||
| 1489 | -#define OMAP4_CM_D2D_STATICDEP_RESTORE_OFFSET 0x0028 | ||
| 1490 | -#define OMAP4430_CM_D2D_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0028) | ||
| 1491 | -#define OMAP4_CM_L3_1_DYNAMICDEP_RESTORE_OFFSET 0x002c | ||
| 1492 | -#define OMAP4430_CM_L3_1_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x002c) | ||
| 1493 | -#define OMAP4_CM_L3_2_DYNAMICDEP_RESTORE_OFFSET 0x0030 | ||
| 1494 | -#define OMAP4430_CM_L3_2_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0030) | ||
| 1495 | -#define OMAP4_CM_D2D_DYNAMICDEP_RESTORE_OFFSET 0x0034 | ||
| 1496 | -#define OMAP4430_CM_D2D_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0034) | ||
| 1497 | -#define OMAP4_CM_L4CFG_DYNAMICDEP_RESTORE_OFFSET 0x0038 | ||
| 1498 | -#define OMAP4430_CM_L4CFG_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0038) | ||
| 1499 | -#define OMAP4_CM_L4PER_DYNAMICDEP_RESTORE_OFFSET 0x003c | ||
| 1500 | -#define OMAP4430_CM_L4PER_DYNAMICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x003c) | ||
| 1501 | -#define OMAP4_CM_L4PER_GPIO2_CLKCTRL_RESTORE_OFFSET 0x0040 | ||
| 1502 | -#define OMAP4430_CM_L4PER_GPIO2_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0040) | ||
| 1503 | -#define OMAP4_CM_L4PER_GPIO3_CLKCTRL_RESTORE_OFFSET 0x0044 | ||
| 1504 | -#define OMAP4430_CM_L4PER_GPIO3_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0044) | ||
| 1505 | -#define OMAP4_CM_L4PER_GPIO4_CLKCTRL_RESTORE_OFFSET 0x0048 | ||
| 1506 | -#define OMAP4430_CM_L4PER_GPIO4_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0048) | ||
| 1507 | -#define OMAP4_CM_L4PER_GPIO5_CLKCTRL_RESTORE_OFFSET 0x004c | ||
| 1508 | -#define OMAP4430_CM_L4PER_GPIO5_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x004c) | ||
| 1509 | -#define OMAP4_CM_L4PER_GPIO6_CLKCTRL_RESTORE_OFFSET 0x0050 | ||
| 1510 | -#define OMAP4430_CM_L4PER_GPIO6_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0050) | ||
| 1511 | -#define OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE_OFFSET 0x0054 | ||
| 1512 | -#define OMAP4430_CM_L3INIT_USB_HOST_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0054) | ||
| 1513 | -#define OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE_OFFSET 0x0058 | ||
| 1514 | -#define OMAP4430_CM_L3INIT_USB_TLL_CLKCTRL_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x0058) | ||
| 1515 | -#define OMAP4_CM_SDMA_STATICDEP_RESTORE_OFFSET 0x005c | ||
| 1516 | -#define OMAP4430_CM_SDMA_STATICDEP_RESTORE OMAP44XX_CM2_REGADDR(OMAP4430_CM2_RESTORE_INST, 0x005c) | ||
| 1517 | - | ||
| 1518 | /* Function prototypes */ | ||
| 1519 | extern u32 omap4_cm2_read_inst_reg(s16 inst, u16 idx); | ||
| 1520 | extern void omap4_cm2_write_inst_reg(u32 val, s16 inst, u16 idx); | ||
| 1521 | -- | ||
| 1522 | 1.7.2.5 | ||
| 1523 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0056-OMAP4-prcm_mpu-Fix-indent-in-few-macros.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0056-OMAP4-prcm_mpu-Fix-indent-in-few-macros.patch deleted file mode 100644 index 6d9cb33a..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0056-OMAP4-prcm_mpu-Fix-indent-in-few-macros.patch +++ /dev/null | |||
| @@ -1,111 +0,0 @@ | |||
| 1 | From e6adacab9f633eddd83c90205bbf5a21c85c9444 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:15:06 -0600 | ||
| 4 | Subject: [PATCH 056/149] OMAP4: prcm_mpu: Fix indent in few macros | ||
| 5 | |||
| 6 | Some maros were not well aligned. Re-align them. | ||
| 7 | |||
| 8 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 9 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 10 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 11 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/prcm_mpu44xx.h | 69 +++++++++++++++++------------------ | ||
| 14 | 1 files changed, 34 insertions(+), 35 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/arch/arm/mach-omap2/prcm_mpu44xx.h b/arch/arm/mach-omap2/prcm_mpu44xx.h | ||
| 17 | index d22d1b4..8a6e250 100644 | ||
| 18 | --- a/arch/arm/mach-omap2/prcm_mpu44xx.h | ||
| 19 | +++ b/arch/arm/mach-omap2/prcm_mpu44xx.h | ||
| 20 | @@ -31,7 +31,6 @@ | ||
| 21 | OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE + (inst) + (reg)) | ||
| 22 | |||
| 23 | /* PRCM_MPU instances */ | ||
| 24 | - | ||
| 25 | #define OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST 0x0000 | ||
| 26 | #define OMAP4430_PRCM_MPU_DEVICE_PRM_INST 0x0200 | ||
| 27 | #define OMAP4430_PRCM_MPU_CPU0_INST 0x0400 | ||
| 28 | @@ -52,46 +51,46 @@ | ||
| 29 | */ | ||
| 30 | |||
| 31 | /* PRCM_MPU.OCP_SOCKET_PRCM register offsets */ | ||
| 32 | -#define OMAP4_REVISION_PRCM_OFFSET 0x0000 | ||
| 33 | -#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000) | ||
| 34 | +#define OMAP4_REVISION_PRCM_OFFSET 0x0000 | ||
| 35 | +#define OMAP4430_REVISION_PRCM OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_OCP_SOCKET_PRCM_INST, 0x0000) | ||
| 36 | |||
| 37 | /* PRCM_MPU.DEVICE_PRM register offsets */ | ||
| 38 | -#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 | ||
| 39 | -#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000) | ||
| 40 | -#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004 | ||
| 41 | -#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004) | ||
| 42 | +#define OMAP4_PRCM_MPU_PRM_RSTST_OFFSET 0x0000 | ||
| 43 | +#define OMAP4430_PRCM_MPU_PRM_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0000) | ||
| 44 | +#define OMAP4_PRCM_MPU_PRM_PSCON_COUNT_OFFSET 0x0004 | ||
| 45 | +#define OMAP4430_PRCM_MPU_PRM_PSCON_COUNT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_DEVICE_PRM_INST, 0x0004) | ||
| 46 | |||
| 47 | /* PRCM_MPU.CPU0 register offsets */ | ||
| 48 | -#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 | ||
| 49 | -#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000) | ||
| 50 | -#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004 | ||
| 51 | -#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004) | ||
| 52 | -#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008 | ||
| 53 | -#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008) | ||
| 54 | -#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c | ||
| 55 | -#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c) | ||
| 56 | -#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010 | ||
| 57 | -#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010) | ||
| 58 | -#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014 | ||
| 59 | -#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014) | ||
| 60 | -#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018 | ||
| 61 | -#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018) | ||
| 62 | +#define OMAP4_PM_CPU0_PWRSTCTRL_OFFSET 0x0000 | ||
| 63 | +#define OMAP4430_PM_CPU0_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0000) | ||
| 64 | +#define OMAP4_PM_CPU0_PWRSTST_OFFSET 0x0004 | ||
| 65 | +#define OMAP4430_PM_CPU0_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0004) | ||
| 66 | +#define OMAP4_RM_CPU0_CPU0_CONTEXT_OFFSET 0x0008 | ||
| 67 | +#define OMAP4430_RM_CPU0_CPU0_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0008) | ||
| 68 | +#define OMAP4_RM_CPU0_CPU0_RSTCTRL_OFFSET 0x000c | ||
| 69 | +#define OMAP4430_RM_CPU0_CPU0_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x000c) | ||
| 70 | +#define OMAP4_RM_CPU0_CPU0_RSTST_OFFSET 0x0010 | ||
| 71 | +#define OMAP4430_RM_CPU0_CPU0_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0010) | ||
| 72 | +#define OMAP4_CM_CPU0_CPU0_CLKCTRL_OFFSET 0x0014 | ||
| 73 | +#define OMAP4430_CM_CPU0_CPU0_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0014) | ||
| 74 | +#define OMAP4_CM_CPU0_CLKSTCTRL_OFFSET 0x0018 | ||
| 75 | +#define OMAP4430_CM_CPU0_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU0_INST, 0x0018) | ||
| 76 | |||
| 77 | /* PRCM_MPU.CPU1 register offsets */ | ||
| 78 | -#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 | ||
| 79 | -#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000) | ||
| 80 | -#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004 | ||
| 81 | -#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004) | ||
| 82 | -#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008 | ||
| 83 | -#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008) | ||
| 84 | -#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c | ||
| 85 | -#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c) | ||
| 86 | -#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010 | ||
| 87 | -#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010) | ||
| 88 | -#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014 | ||
| 89 | -#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014) | ||
| 90 | -#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018 | ||
| 91 | -#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018) | ||
| 92 | +#define OMAP4_PM_CPU1_PWRSTCTRL_OFFSET 0x0000 | ||
| 93 | +#define OMAP4430_PM_CPU1_PWRSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0000) | ||
| 94 | +#define OMAP4_PM_CPU1_PWRSTST_OFFSET 0x0004 | ||
| 95 | +#define OMAP4430_PM_CPU1_PWRSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0004) | ||
| 96 | +#define OMAP4_RM_CPU1_CPU1_CONTEXT_OFFSET 0x0008 | ||
| 97 | +#define OMAP4430_RM_CPU1_CPU1_CONTEXT OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0008) | ||
| 98 | +#define OMAP4_RM_CPU1_CPU1_RSTCTRL_OFFSET 0x000c | ||
| 99 | +#define OMAP4430_RM_CPU1_CPU1_RSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x000c) | ||
| 100 | +#define OMAP4_RM_CPU1_CPU1_RSTST_OFFSET 0x0010 | ||
| 101 | +#define OMAP4430_RM_CPU1_CPU1_RSTST OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0010) | ||
| 102 | +#define OMAP4_CM_CPU1_CPU1_CLKCTRL_OFFSET 0x0014 | ||
| 103 | +#define OMAP4430_CM_CPU1_CPU1_CLKCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0014) | ||
| 104 | +#define OMAP4_CM_CPU1_CLKSTCTRL_OFFSET 0x0018 | ||
| 105 | +#define OMAP4430_CM_CPU1_CLKSTCTRL OMAP44XX_PRCM_MPU_REGADDR(OMAP4430_PRCM_MPU_CPU1_INST, 0x0018) | ||
| 106 | |||
| 107 | /* Function prototypes */ | ||
| 108 | # ifndef __ASSEMBLER__ | ||
| 109 | -- | ||
| 110 | 1.7.2.5 | ||
| 111 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0057-OMAP4-clockdomain-data-Fix-data-order-and-wrong-name.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0057-OMAP4-clockdomain-data-Fix-data-order-and-wrong-name.patch deleted file mode 100644 index c222d7c6..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0057-OMAP4-clockdomain-data-Fix-data-order-and-wrong-name.patch +++ /dev/null | |||
| @@ -1,294 +0,0 @@ | |||
| 1 | From bbf7af412d82e488052f801f294687aaf1bf260e Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:15:06 -0600 | ||
| 4 | Subject: [PATCH 057/149] OMAP4: clockdomain data: Fix data order and wrong name | ||
| 5 | |||
| 6 | MPUSS was renamed MPU and L3_D2D D2D. | ||
| 7 | The rename will slightly change the order of the structure | ||
| 8 | and thus generate some structures moves. | ||
| 9 | |||
| 10 | Add a comment and remove a comma. | ||
| 11 | |||
| 12 | Update Copyright for TI and Nokia and add back Paul | ||
| 13 | in the author list. | ||
| 14 | |||
| 15 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 16 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 17 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 18 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 19 | --- | ||
| 20 | arch/arm/mach-omap2/clockdomains44xx_data.c | 124 ++++++++++++++------------- | ||
| 21 | 1 files changed, 63 insertions(+), 61 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c | ||
| 24 | index a607ec1..66090f2 100644 | ||
| 25 | --- a/arch/arm/mach-omap2/clockdomains44xx_data.c | ||
| 26 | +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c | ||
| 27 | @@ -1,11 +1,12 @@ | ||
| 28 | /* | ||
| 29 | * OMAP4 Clock domains framework | ||
| 30 | * | ||
| 31 | - * Copyright (C) 2009 Texas Instruments, Inc. | ||
| 32 | - * Copyright (C) 2009 Nokia Corporation | ||
| 33 | + * Copyright (C) 2009-2011 Texas Instruments, Inc. | ||
| 34 | + * Copyright (C) 2009-2011 Nokia Corporation | ||
| 35 | * | ||
| 36 | * Abhijit Pagare (abhijitpagare@ti.com) | ||
| 37 | * Benoit Cousson (b-cousson@ti.com) | ||
| 38 | + * Paul Walmsley (paul@pwsan.com) | ||
| 39 | * | ||
| 40 | * This file is automatically generated from the OMAP hardware databases. | ||
| 41 | * We respectfully ask that any modifications to this file be coordinated | ||
| 42 | @@ -32,7 +33,7 @@ | ||
| 43 | |||
| 44 | /* Static Dependencies for OMAP4 Clock Domains */ | ||
| 45 | |||
| 46 | -static struct clkdm_dep ducati_wkup_sleep_deps[] = { | ||
| 47 | +static struct clkdm_dep d2d_wkup_sleep_deps[] = { | ||
| 48 | { | ||
| 49 | .clkdm_name = "abe_clkdm", | ||
| 50 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 51 | @@ -50,103 +51,103 @@ static struct clkdm_dep ducati_wkup_sleep_deps[] = { | ||
| 52 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 53 | }, | ||
| 54 | { | ||
| 55 | - .clkdm_name = "l3_dss_clkdm", | ||
| 56 | + .clkdm_name = "l3_emif_clkdm", | ||
| 57 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 58 | }, | ||
| 59 | { | ||
| 60 | - .clkdm_name = "l3_emif_clkdm", | ||
| 61 | + .clkdm_name = "l3_init_clkdm", | ||
| 62 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 63 | }, | ||
| 64 | { | ||
| 65 | - .clkdm_name = "l3_gfx_clkdm", | ||
| 66 | + .clkdm_name = "l4_cfg_clkdm", | ||
| 67 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 68 | }, | ||
| 69 | { | ||
| 70 | - .clkdm_name = "l3_init_clkdm", | ||
| 71 | + .clkdm_name = "l4_per_clkdm", | ||
| 72 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 73 | }, | ||
| 74 | + { NULL }, | ||
| 75 | +}; | ||
| 76 | + | ||
| 77 | +static struct clkdm_dep ducati_wkup_sleep_deps[] = { | ||
| 78 | { | ||
| 79 | - .clkdm_name = "l4_cfg_clkdm", | ||
| 80 | + .clkdm_name = "abe_clkdm", | ||
| 81 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 82 | }, | ||
| 83 | { | ||
| 84 | - .clkdm_name = "l4_per_clkdm", | ||
| 85 | + .clkdm_name = "ivahd_clkdm", | ||
| 86 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 87 | }, | ||
| 88 | { | ||
| 89 | - .clkdm_name = "l4_secure_clkdm", | ||
| 90 | + .clkdm_name = "l3_1_clkdm", | ||
| 91 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 92 | }, | ||
| 93 | { | ||
| 94 | - .clkdm_name = "l4_wkup_clkdm", | ||
| 95 | + .clkdm_name = "l3_2_clkdm", | ||
| 96 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 97 | }, | ||
| 98 | { | ||
| 99 | - .clkdm_name = "tesla_clkdm", | ||
| 100 | + .clkdm_name = "l3_dss_clkdm", | ||
| 101 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 102 | }, | ||
| 103 | - { NULL }, | ||
| 104 | -}; | ||
| 105 | - | ||
| 106 | -static struct clkdm_dep iss_wkup_sleep_deps[] = { | ||
| 107 | { | ||
| 108 | - .clkdm_name = "ivahd_clkdm", | ||
| 109 | + .clkdm_name = "l3_emif_clkdm", | ||
| 110 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 111 | }, | ||
| 112 | { | ||
| 113 | - .clkdm_name = "l3_1_clkdm", | ||
| 114 | + .clkdm_name = "l3_gfx_clkdm", | ||
| 115 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 116 | }, | ||
| 117 | { | ||
| 118 | - .clkdm_name = "l3_emif_clkdm", | ||
| 119 | + .clkdm_name = "l3_init_clkdm", | ||
| 120 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 121 | }, | ||
| 122 | - { NULL }, | ||
| 123 | -}; | ||
| 124 | - | ||
| 125 | -static struct clkdm_dep ivahd_wkup_sleep_deps[] = { | ||
| 126 | { | ||
| 127 | - .clkdm_name = "l3_1_clkdm", | ||
| 128 | + .clkdm_name = "l4_cfg_clkdm", | ||
| 129 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 130 | }, | ||
| 131 | { | ||
| 132 | - .clkdm_name = "l3_emif_clkdm", | ||
| 133 | + .clkdm_name = "l4_per_clkdm", | ||
| 134 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 135 | }, | ||
| 136 | - { NULL }, | ||
| 137 | -}; | ||
| 138 | - | ||
| 139 | -static struct clkdm_dep l3_d2d_wkup_sleep_deps[] = { | ||
| 140 | { | ||
| 141 | - .clkdm_name = "abe_clkdm", | ||
| 142 | + .clkdm_name = "l4_secure_clkdm", | ||
| 143 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 144 | }, | ||
| 145 | { | ||
| 146 | - .clkdm_name = "ivahd_clkdm", | ||
| 147 | + .clkdm_name = "l4_wkup_clkdm", | ||
| 148 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 149 | }, | ||
| 150 | { | ||
| 151 | - .clkdm_name = "l3_1_clkdm", | ||
| 152 | + .clkdm_name = "tesla_clkdm", | ||
| 153 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 154 | }, | ||
| 155 | + { NULL }, | ||
| 156 | +}; | ||
| 157 | + | ||
| 158 | +static struct clkdm_dep iss_wkup_sleep_deps[] = { | ||
| 159 | { | ||
| 160 | - .clkdm_name = "l3_2_clkdm", | ||
| 161 | + .clkdm_name = "ivahd_clkdm", | ||
| 162 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 163 | }, | ||
| 164 | { | ||
| 165 | - .clkdm_name = "l3_emif_clkdm", | ||
| 166 | + .clkdm_name = "l3_1_clkdm", | ||
| 167 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 168 | }, | ||
| 169 | { | ||
| 170 | - .clkdm_name = "l3_init_clkdm", | ||
| 171 | + .clkdm_name = "l3_emif_clkdm", | ||
| 172 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 173 | }, | ||
| 174 | + { NULL }, | ||
| 175 | +}; | ||
| 176 | + | ||
| 177 | +static struct clkdm_dep ivahd_wkup_sleep_deps[] = { | ||
| 178 | { | ||
| 179 | - .clkdm_name = "l4_cfg_clkdm", | ||
| 180 | + .clkdm_name = "l3_1_clkdm", | ||
| 181 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 182 | }, | ||
| 183 | { | ||
| 184 | - .clkdm_name = "l4_per_clkdm", | ||
| 185 | + .clkdm_name = "l3_emif_clkdm", | ||
| 186 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 187 | }, | ||
| 188 | { NULL }, | ||
| 189 | @@ -280,7 +281,7 @@ static struct clkdm_dep l4_secure_wkup_sleep_deps[] = { | ||
| 190 | { NULL }, | ||
| 191 | }; | ||
| 192 | |||
| 193 | -static struct clkdm_dep mpuss_wkup_sleep_deps[] = { | ||
| 194 | +static struct clkdm_dep mpu_wkup_sleep_deps[] = { | ||
| 195 | { | ||
| 196 | .clkdm_name = "abe_clkdm", | ||
| 197 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430) | ||
| 198 | @@ -497,14 +498,14 @@ static struct clockdomain l3_init_44xx_clkdm = { | ||
| 199 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 200 | }; | ||
| 201 | |||
| 202 | -static struct clockdomain mpuss_44xx_clkdm = { | ||
| 203 | - .name = "mpuss_clkdm", | ||
| 204 | - .pwrdm = { .name = "mpu_pwrdm" }, | ||
| 205 | - .prcm_partition = OMAP4430_CM1_PARTITION, | ||
| 206 | - .cm_inst = OMAP4430_CM1_MPU_INST, | ||
| 207 | - .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, | ||
| 208 | - .wkdep_srcs = mpuss_wkup_sleep_deps, | ||
| 209 | - .sleepdep_srcs = mpuss_wkup_sleep_deps, | ||
| 210 | +static struct clockdomain d2d_44xx_clkdm = { | ||
| 211 | + .name = "d2d_clkdm", | ||
| 212 | + .pwrdm = { .name = "core_pwrdm" }, | ||
| 213 | + .prcm_partition = OMAP4430_CM2_PARTITION, | ||
| 214 | + .cm_inst = OMAP4430_CM2_CORE_INST, | ||
| 215 | + .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS, | ||
| 216 | + .wkdep_srcs = d2d_wkup_sleep_deps, | ||
| 217 | + .sleepdep_srcs = d2d_wkup_sleep_deps, | ||
| 218 | .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, | ||
| 219 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 220 | }; | ||
| 221 | @@ -563,6 +564,18 @@ static struct clockdomain ducati_44xx_clkdm = { | ||
| 222 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 223 | }; | ||
| 224 | |||
| 225 | +static struct clockdomain mpu_44xx_clkdm = { | ||
| 226 | + .name = "mpu_clkdm", | ||
| 227 | + .pwrdm = { .name = "mpu_pwrdm" }, | ||
| 228 | + .prcm_partition = OMAP4430_CM1_PARTITION, | ||
| 229 | + .cm_inst = OMAP4430_CM1_MPU_INST, | ||
| 230 | + .clkdm_offs = OMAP4430_CM1_MPU_MPU_CDOFFS, | ||
| 231 | + .wkdep_srcs = mpu_wkup_sleep_deps, | ||
| 232 | + .sleepdep_srcs = mpu_wkup_sleep_deps, | ||
| 233 | + .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, | ||
| 234 | + .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 235 | +}; | ||
| 236 | + | ||
| 237 | static struct clockdomain l3_2_44xx_clkdm = { | ||
| 238 | .name = "l3_2_clkdm", | ||
| 239 | .pwrdm = { .name = "core_pwrdm" }, | ||
| 240 | @@ -585,18 +598,6 @@ static struct clockdomain l3_1_44xx_clkdm = { | ||
| 241 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 242 | }; | ||
| 243 | |||
| 244 | -static struct clockdomain l3_d2d_44xx_clkdm = { | ||
| 245 | - .name = "l3_d2d_clkdm", | ||
| 246 | - .pwrdm = { .name = "core_pwrdm" }, | ||
| 247 | - .prcm_partition = OMAP4430_CM2_PARTITION, | ||
| 248 | - .cm_inst = OMAP4430_CM2_CORE_INST, | ||
| 249 | - .clkdm_offs = OMAP4430_CM2_CORE_D2D_CDOFFS, | ||
| 250 | - .wkdep_srcs = l3_d2d_wkup_sleep_deps, | ||
| 251 | - .sleepdep_srcs = l3_d2d_wkup_sleep_deps, | ||
| 252 | - .flags = CLKDM_CAN_FORCE_WAKEUP | CLKDM_CAN_HWSUP, | ||
| 253 | - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 254 | -}; | ||
| 255 | - | ||
| 256 | static struct clockdomain iss_44xx_clkdm = { | ||
| 257 | .name = "iss_clkdm", | ||
| 258 | .pwrdm = { .name = "cam_pwrdm" }, | ||
| 259 | @@ -655,6 +656,7 @@ static struct clockdomain l3_dma_44xx_clkdm = { | ||
| 260 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 261 | }; | ||
| 262 | |||
| 263 | +/* As clockdomains are added or removed above, this list must also be changed */ | ||
| 264 | static struct clockdomain *clockdomains_omap44xx[] __initdata = { | ||
| 265 | &l4_cefuse_44xx_clkdm, | ||
| 266 | &l4_cfg_44xx_clkdm, | ||
| 267 | @@ -666,21 +668,21 @@ static struct clockdomain *clockdomains_omap44xx[] __initdata = { | ||
| 268 | &abe_44xx_clkdm, | ||
| 269 | &l3_instr_44xx_clkdm, | ||
| 270 | &l3_init_44xx_clkdm, | ||
| 271 | - &mpuss_44xx_clkdm, | ||
| 272 | + &d2d_44xx_clkdm, | ||
| 273 | &mpu0_44xx_clkdm, | ||
| 274 | &mpu1_44xx_clkdm, | ||
| 275 | &l3_emif_44xx_clkdm, | ||
| 276 | &l4_ao_44xx_clkdm, | ||
| 277 | &ducati_44xx_clkdm, | ||
| 278 | + &mpu_44xx_clkdm, | ||
| 279 | &l3_2_44xx_clkdm, | ||
| 280 | &l3_1_44xx_clkdm, | ||
| 281 | - &l3_d2d_44xx_clkdm, | ||
| 282 | &iss_44xx_clkdm, | ||
| 283 | &l3_dss_44xx_clkdm, | ||
| 284 | &l4_wkup_44xx_clkdm, | ||
| 285 | &emu_sys_44xx_clkdm, | ||
| 286 | &l3_dma_44xx_clkdm, | ||
| 287 | - NULL, | ||
| 288 | + NULL | ||
| 289 | }; | ||
| 290 | |||
| 291 | void __init omap44xx_clockdomains_init(void) | ||
| 292 | -- | ||
| 293 | 1.7.2.5 | ||
| 294 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0058-OMAP-omap_device-replace-_find_by_pdev-with-to_omap_.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0058-OMAP-omap_device-replace-_find_by_pdev-with-to_omap_.patch deleted file mode 100644 index 2ed265d4..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0058-OMAP-omap_device-replace-_find_by_pdev-with-to_omap_.patch +++ /dev/null | |||
| @@ -1,84 +0,0 @@ | |||
| 1 | From b7fd7c4814b75005d2bf89d27e2160e863cdd5c3 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:15:20 -0600 | ||
| 4 | Subject: [PATCH 058/149] OMAP: omap_device: replace _find_by_pdev() with to_omap_device() | ||
| 5 | |||
| 6 | The omap_device layer currently has two ways of getting an omap_device | ||
| 7 | pointer from a platform_device pointer. | ||
| 8 | |||
| 9 | Replace current usage of _find_by_pdev() with to_omap_device() since | ||
| 10 | to_omap_device() is more familiar to the existing to_platform_device() | ||
| 11 | used when getting a platform_device pointer from a struct device pointer. | ||
| 12 | |||
| 13 | Cc: Felipe Balbi <balbi@ti.com> | ||
| 14 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 15 | Reviewed-by: Felipe Balbi <balbi@ti.com> | ||
| 16 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 17 | --- | ||
| 18 | arch/arm/plat-omap/omap_device.c | 15 +++++---------- | ||
| 19 | 1 files changed, 5 insertions(+), 10 deletions(-) | ||
| 20 | |||
| 21 | diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c | ||
| 22 | index 49fc0df..c8b9cd1 100644 | ||
| 23 | --- a/arch/arm/plat-omap/omap_device.c | ||
| 24 | +++ b/arch/arm/plat-omap/omap_device.c | ||
| 25 | @@ -236,11 +236,6 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) | ||
| 26 | return 0; | ||
| 27 | } | ||
| 28 | |||
| 29 | -static inline struct omap_device *_find_by_pdev(struct platform_device *pdev) | ||
| 30 | -{ | ||
| 31 | - return container_of(pdev, struct omap_device, pdev); | ||
| 32 | -} | ||
| 33 | - | ||
| 34 | /** | ||
| 35 | * _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks | ||
| 36 | * @od: struct omap_device *od | ||
| 37 | @@ -316,7 +311,7 @@ u32 omap_device_get_context_loss_count(struct platform_device *pdev) | ||
| 38 | struct omap_device *od; | ||
| 39 | u32 ret = 0; | ||
| 40 | |||
| 41 | - od = _find_by_pdev(pdev); | ||
| 42 | + od = to_omap_device(pdev); | ||
| 43 | |||
| 44 | if (od->hwmods_cnt) | ||
| 45 | ret = omap_hwmod_get_context_loss_count(od->hwmods[0]); | ||
| 46 | @@ -611,7 +606,7 @@ int omap_device_enable(struct platform_device *pdev) | ||
| 47 | int ret; | ||
| 48 | struct omap_device *od; | ||
| 49 | |||
| 50 | - od = _find_by_pdev(pdev); | ||
| 51 | + od = to_omap_device(pdev); | ||
| 52 | |||
| 53 | if (od->_state == OMAP_DEVICE_STATE_ENABLED) { | ||
| 54 | WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n", | ||
| 55 | @@ -650,7 +645,7 @@ int omap_device_idle(struct platform_device *pdev) | ||
| 56 | int ret; | ||
| 57 | struct omap_device *od; | ||
| 58 | |||
| 59 | - od = _find_by_pdev(pdev); | ||
| 60 | + od = to_omap_device(pdev); | ||
| 61 | |||
| 62 | if (od->_state != OMAP_DEVICE_STATE_ENABLED) { | ||
| 63 | WARN(1, "omap_device: %s.%d: %s() called from invalid state %d\n", | ||
| 64 | @@ -681,7 +676,7 @@ int omap_device_shutdown(struct platform_device *pdev) | ||
| 65 | int ret, i; | ||
| 66 | struct omap_device *od; | ||
| 67 | |||
| 68 | - od = _find_by_pdev(pdev); | ||
| 69 | + od = to_omap_device(pdev); | ||
| 70 | |||
| 71 | if (od->_state != OMAP_DEVICE_STATE_ENABLED && | ||
| 72 | od->_state != OMAP_DEVICE_STATE_IDLE) { | ||
| 73 | @@ -722,7 +717,7 @@ int omap_device_align_pm_lat(struct platform_device *pdev, | ||
| 74 | int ret = -EINVAL; | ||
| 75 | struct omap_device *od; | ||
| 76 | |||
| 77 | - od = _find_by_pdev(pdev); | ||
| 78 | + od = to_omap_device(pdev); | ||
| 79 | |||
| 80 | if (new_wakeup_lat_limit == od->dev_wakeup_lat) | ||
| 81 | return 0; | ||
| 82 | -- | ||
| 83 | 1.7.2.5 | ||
| 84 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0059-OMAP-PM-remove-OMAP_PM_NONE-config-option.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0059-OMAP-PM-remove-OMAP_PM_NONE-config-option.patch deleted file mode 100644 index d9c78e3f..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0059-OMAP-PM-remove-OMAP_PM_NONE-config-option.patch +++ /dev/null | |||
| @@ -1,63 +0,0 @@ | |||
| 1 | From 32f213e65477010bd1ac349b4bbe438958044e9f Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Jean Pihet <jean.pihet@newoldbits.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:15:41 -0600 | ||
| 4 | Subject: [PATCH 059/149] OMAP PM: remove OMAP_PM_NONE config option | ||
| 5 | |||
| 6 | The current code base is not linking with the OMAP_PM_NONE | ||
| 7 | option set. | ||
| 8 | Since the option OMAP_PM_NOOP provides a no-op/debug layer, | ||
| 9 | OMAP_PM_NONE can be removed. | ||
| 10 | OMAP_PM_NOOP is enabled by default by Kconfig. | ||
| 11 | |||
| 12 | Signed-off-by: Jean Pihet <j-pihet@ti.com> | ||
| 13 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 14 | --- | ||
| 15 | arch/arm/plat-omap/Kconfig | 3 --- | ||
| 16 | arch/arm/plat-omap/include/plat/omap-pm.h | 8 -------- | ||
| 17 | 2 files changed, 0 insertions(+), 11 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/plat-omap/Kconfig b/arch/arm/plat-omap/Kconfig | ||
| 20 | index 49a4c75..6e6735f 100644 | ||
| 21 | --- a/arch/arm/plat-omap/Kconfig | ||
| 22 | +++ b/arch/arm/plat-omap/Kconfig | ||
| 23 | @@ -211,9 +211,6 @@ choice | ||
| 24 | depends on ARCH_OMAP | ||
| 25 | default OMAP_PM_NOOP | ||
| 26 | |||
| 27 | -config OMAP_PM_NONE | ||
| 28 | - bool "No PM layer" | ||
| 29 | - | ||
| 30 | config OMAP_PM_NOOP | ||
| 31 | bool "No-op/debug PM layer" | ||
| 32 | |||
| 33 | diff --git a/arch/arm/plat-omap/include/plat/omap-pm.h b/arch/arm/plat-omap/include/plat/omap-pm.h | ||
| 34 | index c0a7520..0840df8 100644 | ||
| 35 | --- a/arch/arm/plat-omap/include/plat/omap-pm.h | ||
| 36 | +++ b/arch/arm/plat-omap/include/plat/omap-pm.h | ||
| 37 | @@ -40,11 +40,7 @@ | ||
| 38 | * framework starts. The "_if_" is to avoid name collisions with the | ||
| 39 | * PM idle-loop code. | ||
| 40 | */ | ||
| 41 | -#ifdef CONFIG_OMAP_PM_NONE | ||
| 42 | -#define omap_pm_if_early_init() 0 | ||
| 43 | -#else | ||
| 44 | int __init omap_pm_if_early_init(void); | ||
| 45 | -#endif | ||
| 46 | |||
| 47 | /** | ||
| 48 | * omap_pm_if_init - OMAP PM init code called after clock fw init | ||
| 49 | @@ -52,11 +48,7 @@ int __init omap_pm_if_early_init(void); | ||
| 50 | * The main initialization code. OPP tables are passed in here. The | ||
| 51 | * "_if_" is to avoid name collisions with the PM idle-loop code. | ||
| 52 | */ | ||
| 53 | -#ifdef CONFIG_OMAP_PM_NONE | ||
| 54 | -#define omap_pm_if_init() 0 | ||
| 55 | -#else | ||
| 56 | int __init omap_pm_if_init(void); | ||
| 57 | -#endif | ||
| 58 | |||
| 59 | /** | ||
| 60 | * omap_pm_if_exit - OMAP PM exit code | ||
| 61 | -- | ||
| 62 | 1.7.2.5 | ||
| 63 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0060-OMAP4-clock-data-Remove-McASP2-McASP3-and-MMC6-clock.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0060-OMAP4-clock-data-Remove-McASP2-McASP3-and-MMC6-clock.patch deleted file mode 100644 index a7e85f8d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0060-OMAP4-clock-data-Remove-McASP2-McASP3-and-MMC6-clock.patch +++ /dev/null | |||
| @@ -1,178 +0,0 @@ | |||
| 1 | From e2c80dceb999bf93d079d0a5a040951aad3d2359 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Jon Hunter <jon-hunter@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:47 -0600 | ||
| 4 | Subject: [PATCH 060/149] OMAP4: clock data: Remove McASP2, McASP3 and MMC6 clocks | ||
| 5 | |||
| 6 | McASP2, 3 and MMC6 modules are not present in the OMAP4 family. | ||
| 7 | Remove the fclk and the clksel related to these nodes. | ||
| 8 | Rename the references that were potentially re-used in order nodes. | ||
| 9 | |||
| 10 | Remove related macros in prcm header files. | ||
| 11 | |||
| 12 | Update TI copyright date. | ||
| 13 | |||
| 14 | Signed-off-by: Jon Hunter <jon-hunter@ti.com> | ||
| 15 | [b-cousson@ti.com: Update the patch according to autogen output] | ||
| 16 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 17 | [paul@pwsan.com: split PRCM data changes into a separate patch] | ||
| 18 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 19 | --- | ||
| 20 | arch/arm/mach-omap2/clock44xx_data.c | 86 ++++++++++++--------------------- | ||
| 21 | 1 files changed, 31 insertions(+), 55 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 24 | index 8307c9e..96bc668 100644 | ||
| 25 | --- a/arch/arm/mach-omap2/clock44xx_data.c | ||
| 26 | +++ b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 27 | @@ -1170,19 +1170,6 @@ static struct clk func_96m_fclk = { | ||
| 28 | .set_rate = &omap2_clksel_set_rate, | ||
| 29 | }; | ||
| 30 | |||
| 31 | -static const struct clksel hsmmc6_fclk_sel[] = { | ||
| 32 | - { .parent = &func_64m_fclk, .rates = div_1_0_rates }, | ||
| 33 | - { .parent = &func_96m_fclk, .rates = div_1_1_rates }, | ||
| 34 | - { .parent = NULL }, | ||
| 35 | -}; | ||
| 36 | - | ||
| 37 | -static struct clk hsmmc6_fclk = { | ||
| 38 | - .name = "hsmmc6_fclk", | ||
| 39 | - .parent = &func_64m_fclk, | ||
| 40 | - .ops = &clkops_null, | ||
| 41 | - .recalc = &followparent_recalc, | ||
| 42 | -}; | ||
| 43 | - | ||
| 44 | static const struct clksel_rate div2_1to8_rates[] = { | ||
| 45 | { .div = 1, .val = 0, .flags = RATE_IN_4430 }, | ||
| 46 | { .div = 8, .val = 1, .flags = RATE_IN_4430 }, | ||
| 47 | @@ -1265,6 +1252,21 @@ static struct clk l4_wkup_clk_mux_ck = { | ||
| 48 | .recalc = &omap2_clksel_recalc, | ||
| 49 | }; | ||
| 50 | |||
| 51 | +static struct clk ocp_abe_iclk = { | ||
| 52 | + .name = "ocp_abe_iclk", | ||
| 53 | + .parent = &aess_fclk, | ||
| 54 | + .ops = &clkops_null, | ||
| 55 | + .recalc = &followparent_recalc, | ||
| 56 | +}; | ||
| 57 | + | ||
| 58 | +static struct clk per_abe_24m_fclk = { | ||
| 59 | + .name = "per_abe_24m_fclk", | ||
| 60 | + .parent = &dpll_abe_m2_ck, | ||
| 61 | + .ops = &clkops_null, | ||
| 62 | + .fixed_div = 4, | ||
| 63 | + .recalc = &omap_fixed_divisor_recalc, | ||
| 64 | +}; | ||
| 65 | + | ||
| 66 | static const struct clksel per_abe_nc_fclk_div[] = { | ||
| 67 | { .parent = &dpll_abe_m2_ck, .rates = div2_1to2_rates }, | ||
| 68 | { .parent = NULL }, | ||
| 69 | @@ -1282,41 +1284,6 @@ static struct clk per_abe_nc_fclk = { | ||
| 70 | .set_rate = &omap2_clksel_set_rate, | ||
| 71 | }; | ||
| 72 | |||
| 73 | -static const struct clksel mcasp2_fclk_sel[] = { | ||
| 74 | - { .parent = &func_96m_fclk, .rates = div_1_0_rates }, | ||
| 75 | - { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates }, | ||
| 76 | - { .parent = NULL }, | ||
| 77 | -}; | ||
| 78 | - | ||
| 79 | -static struct clk mcasp2_fclk = { | ||
| 80 | - .name = "mcasp2_fclk", | ||
| 81 | - .parent = &func_96m_fclk, | ||
| 82 | - .ops = &clkops_null, | ||
| 83 | - .recalc = &followparent_recalc, | ||
| 84 | -}; | ||
| 85 | - | ||
| 86 | -static struct clk mcasp3_fclk = { | ||
| 87 | - .name = "mcasp3_fclk", | ||
| 88 | - .parent = &func_96m_fclk, | ||
| 89 | - .ops = &clkops_null, | ||
| 90 | - .recalc = &followparent_recalc, | ||
| 91 | -}; | ||
| 92 | - | ||
| 93 | -static struct clk ocp_abe_iclk = { | ||
| 94 | - .name = "ocp_abe_iclk", | ||
| 95 | - .parent = &aess_fclk, | ||
| 96 | - .ops = &clkops_null, | ||
| 97 | - .recalc = &followparent_recalc, | ||
| 98 | -}; | ||
| 99 | - | ||
| 100 | -static struct clk per_abe_24m_fclk = { | ||
| 101 | - .name = "per_abe_24m_fclk", | ||
| 102 | - .parent = &dpll_abe_m2_ck, | ||
| 103 | - .ops = &clkops_null, | ||
| 104 | - .fixed_div = 4, | ||
| 105 | - .recalc = &omap_fixed_divisor_recalc, | ||
| 106 | -}; | ||
| 107 | - | ||
| 108 | static const struct clksel pmd_stm_clock_mux_sel[] = { | ||
| 109 | { .parent = &sys_clkin_ck, .rates = div_1_0_rates }, | ||
| 110 | { .parent = &dpll_core_m6x2_ck, .rates = div_1_1_rates }, | ||
| 111 | @@ -1996,10 +1963,16 @@ static struct clk mcbsp3_fck = { | ||
| 112 | .clkdm_name = "abe_clkdm", | ||
| 113 | }; | ||
| 114 | |||
| 115 | +static const struct clksel mcbsp4_sync_mux_sel[] = { | ||
| 116 | + { .parent = &func_96m_fclk, .rates = div_1_0_rates }, | ||
| 117 | + { .parent = &per_abe_nc_fclk, .rates = div_1_1_rates }, | ||
| 118 | + { .parent = NULL }, | ||
| 119 | +}; | ||
| 120 | + | ||
| 121 | static struct clk mcbsp4_sync_mux_ck = { | ||
| 122 | .name = "mcbsp4_sync_mux_ck", | ||
| 123 | .parent = &func_96m_fclk, | ||
| 124 | - .clksel = mcasp2_fclk_sel, | ||
| 125 | + .clksel = mcbsp4_sync_mux_sel, | ||
| 126 | .init = &omap2_init_clksel_parent, | ||
| 127 | .clksel_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, | ||
| 128 | .clksel_mask = OMAP4430_CLKSEL_INTERNAL_SOURCE_MASK, | ||
| 129 | @@ -2078,11 +2051,17 @@ static struct clk mcspi4_fck = { | ||
| 130 | .recalc = &followparent_recalc, | ||
| 131 | }; | ||
| 132 | |||
| 133 | +static const struct clksel hsmmc1_fclk_sel[] = { | ||
| 134 | + { .parent = &func_64m_fclk, .rates = div_1_0_rates }, | ||
| 135 | + { .parent = &func_96m_fclk, .rates = div_1_1_rates }, | ||
| 136 | + { .parent = NULL }, | ||
| 137 | +}; | ||
| 138 | + | ||
| 139 | /* Merged hsmmc1_fclk into mmc1 */ | ||
| 140 | static struct clk mmc1_fck = { | ||
| 141 | .name = "mmc1_fck", | ||
| 142 | .parent = &func_64m_fclk, | ||
| 143 | - .clksel = hsmmc6_fclk_sel, | ||
| 144 | + .clksel = hsmmc1_fclk_sel, | ||
| 145 | .init = &omap2_init_clksel_parent, | ||
| 146 | .clksel_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, | ||
| 147 | .clksel_mask = OMAP4430_CLKSEL_MASK, | ||
| 148 | @@ -2097,7 +2076,7 @@ static struct clk mmc1_fck = { | ||
| 149 | static struct clk mmc2_fck = { | ||
| 150 | .name = "mmc2_fck", | ||
| 151 | .parent = &func_64m_fclk, | ||
| 152 | - .clksel = hsmmc6_fclk_sel, | ||
| 153 | + .clksel = hsmmc1_fclk_sel, | ||
| 154 | .init = &omap2_init_clksel_parent, | ||
| 155 | .clksel_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, | ||
| 156 | .clksel_mask = OMAP4430_CLKSEL_MASK, | ||
| 157 | @@ -3094,17 +3073,14 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 158 | CLK(NULL, "func_48mc_fclk", &func_48mc_fclk, CK_443X), | ||
| 159 | CLK(NULL, "func_64m_fclk", &func_64m_fclk, CK_443X), | ||
| 160 | CLK(NULL, "func_96m_fclk", &func_96m_fclk, CK_443X), | ||
| 161 | - CLK(NULL, "hsmmc6_fclk", &hsmmc6_fclk, CK_443X), | ||
| 162 | CLK(NULL, "init_60m_fclk", &init_60m_fclk, CK_443X), | ||
| 163 | CLK(NULL, "l3_div_ck", &l3_div_ck, CK_443X), | ||
| 164 | CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X), | ||
| 165 | CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X), | ||
| 166 | CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X), | ||
| 167 | - CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X), | ||
| 168 | - CLK(NULL, "mcasp2_fclk", &mcasp2_fclk, CK_443X), | ||
| 169 | - CLK(NULL, "mcasp3_fclk", &mcasp3_fclk, CK_443X), | ||
| 170 | CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X), | ||
| 171 | CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X), | ||
| 172 | + CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X), | ||
| 173 | CLK(NULL, "pmd_stm_clock_mux_ck", &pmd_stm_clock_mux_ck, CK_443X), | ||
| 174 | CLK(NULL, "pmd_trace_clk_mux_ck", &pmd_trace_clk_mux_ck, CK_443X), | ||
| 175 | CLK(NULL, "syc_clk_div_ck", &syc_clk_div_ck, CK_443X), | ||
| 176 | -- | ||
| 177 | 1.7.2.5 | ||
| 178 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch deleted file mode 100644 index fb4d44fe..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch +++ /dev/null | |||
| @@ -1,99 +0,0 @@ | |||
| 1 | From 73203093397f6939cea566cbedc2affc51d4b597 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Jon Hunter <jon-hunter@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 19:14:47 -0600 | ||
| 4 | Subject: [PATCH 061/149] OMAP4: clock data: Remove UNIPRO clock nodes | ||
| 5 | |||
| 6 | UNIPRO was removed from OMAP4 devices from ES2.0 onwards. | ||
| 7 | Since this IP was anyway non-functional and not supported, | ||
| 8 | it is best to remove it completely. | ||
| 9 | |||
| 10 | Signed-off-by: Jon Hunter <jon-hunter@ti.com> | ||
| 11 | [b-cousson@ti.com: Update the changelog] | ||
| 12 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 13 | [paul@pwsan.com: split PRCM header file changes into a separate patch] | ||
| 14 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 15 | --- | ||
| 16 | arch/arm/mach-omap2/clock44xx_data.c | 60 ---------------------------------- | ||
| 17 | 1 files changed, 0 insertions(+), 60 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 20 | index 96bc668..044df38 100644 | ||
| 21 | --- a/arch/arm/mach-omap2/clock44xx_data.c | ||
| 22 | +++ b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 23 | @@ -935,63 +935,6 @@ static struct clk dpll_per_m7x2_ck = { | ||
| 24 | .set_rate = &omap2_clksel_set_rate, | ||
| 25 | }; | ||
| 26 | |||
| 27 | -/* DPLL_UNIPRO */ | ||
| 28 | -static struct dpll_data dpll_unipro_dd = { | ||
| 29 | - .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_UNIPRO, | ||
| 30 | - .clk_bypass = &sys_clkin_ck, | ||
| 31 | - .clk_ref = &sys_clkin_ck, | ||
| 32 | - .control_reg = OMAP4430_CM_CLKMODE_DPLL_UNIPRO, | ||
| 33 | - .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), | ||
| 34 | - .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO, | ||
| 35 | - .idlest_reg = OMAP4430_CM_IDLEST_DPLL_UNIPRO, | ||
| 36 | - .mult_mask = OMAP4430_DPLL_MULT_MASK, | ||
| 37 | - .div1_mask = OMAP4430_DPLL_DIV_MASK, | ||
| 38 | - .enable_mask = OMAP4430_DPLL_EN_MASK, | ||
| 39 | - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, | ||
| 40 | - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, | ||
| 41 | - .max_multiplier = 2047, | ||
| 42 | - .max_divider = 128, | ||
| 43 | - .min_divider = 1, | ||
| 44 | -}; | ||
| 45 | - | ||
| 46 | - | ||
| 47 | -static struct clk dpll_unipro_ck = { | ||
| 48 | - .name = "dpll_unipro_ck", | ||
| 49 | - .parent = &sys_clkin_ck, | ||
| 50 | - .dpll_data = &dpll_unipro_dd, | ||
| 51 | - .init = &omap2_init_dpll_parent, | ||
| 52 | - .ops = &clkops_omap3_noncore_dpll_ops, | ||
| 53 | - .recalc = &omap3_dpll_recalc, | ||
| 54 | - .round_rate = &omap2_dpll_round_rate, | ||
| 55 | - .set_rate = &omap3_noncore_dpll_set_rate, | ||
| 56 | -}; | ||
| 57 | - | ||
| 58 | -static struct clk dpll_unipro_x2_ck = { | ||
| 59 | - .name = "dpll_unipro_x2_ck", | ||
| 60 | - .parent = &dpll_unipro_ck, | ||
| 61 | - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, | ||
| 62 | - .flags = CLOCK_CLKOUTX2, | ||
| 63 | - .ops = &clkops_omap4_dpllmx_ops, | ||
| 64 | - .recalc = &omap3_clkoutx2_recalc, | ||
| 65 | -}; | ||
| 66 | - | ||
| 67 | -static const struct clksel dpll_unipro_m2x2_div[] = { | ||
| 68 | - { .parent = &dpll_unipro_x2_ck, .rates = div31_1to31_rates }, | ||
| 69 | - { .parent = NULL }, | ||
| 70 | -}; | ||
| 71 | - | ||
| 72 | -static struct clk dpll_unipro_m2x2_ck = { | ||
| 73 | - .name = "dpll_unipro_m2x2_ck", | ||
| 74 | - .parent = &dpll_unipro_x2_ck, | ||
| 75 | - .clksel = dpll_unipro_m2x2_div, | ||
| 76 | - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, | ||
| 77 | - .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK, | ||
| 78 | - .ops = &clkops_omap4_dpllmx_ops, | ||
| 79 | - .recalc = &omap2_clksel_recalc, | ||
| 80 | - .round_rate = &omap2_clksel_round_rate, | ||
| 81 | - .set_rate = &omap2_clksel_set_rate, | ||
| 82 | -}; | ||
| 83 | - | ||
| 84 | static struct clk usb_hs_clk_div_ck = { | ||
| 85 | .name = "usb_hs_clk_div_ck", | ||
| 86 | .parent = &dpll_abe_m3x2_ck, | ||
| 87 | @@ -3058,9 +3001,6 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 88 | CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, CK_443X), | ||
| 89 | CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, CK_443X), | ||
| 90 | CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, CK_443X), | ||
| 91 | - CLK(NULL, "dpll_unipro_ck", &dpll_unipro_ck, CK_443X), | ||
| 92 | - CLK(NULL, "dpll_unipro_x2_ck", &dpll_unipro_x2_ck, CK_443X), | ||
| 93 | - CLK(NULL, "dpll_unipro_m2x2_ck", &dpll_unipro_m2x2_ck, CK_443X), | ||
| 94 | CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, CK_443X), | ||
| 95 | CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, CK_443X), | ||
| 96 | CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck, CK_443X), | ||
| 97 | -- | ||
| 98 | 1.7.2.5 | ||
| 99 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0062-OMAP4-hwmod-data-Modify-DSS-opt-clocks.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0062-OMAP4-hwmod-data-Modify-DSS-opt-clocks.patch deleted file mode 100644 index 69c3b2ac..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0062-OMAP4-hwmod-data-Modify-DSS-opt-clocks.patch +++ /dev/null | |||
| @@ -1,153 +0,0 @@ | |||
| 1 | From 52d08db173e39f2af6923dc803593d62fa05e43b Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Tomi Valkeinen <tomi.valkeinen@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 20:39:44 -0600 | ||
| 4 | Subject: [PATCH 062/149] OMAP4: hwmod data: Modify DSS opt clocks | ||
| 5 | |||
| 6 | Add missing DSS optional clocks to HWMOD data for OMAP4xxx. | ||
| 7 | |||
| 8 | Add HWMOD_CONTROL_OPT_CLKS_IN_RESET flag for dispc to fix dispc reset. | ||
| 9 | |||
| 10 | Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> | ||
| 11 | [b-cousson@ti.com: Remove a comment and update the subject] | ||
| 12 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 13 | Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> | ||
| 14 | [paul@pwsan.com: removed DSS "fck" role and some clkdev aliases at Tomi's | ||
| 15 | request] | ||
| 16 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 17 | --- | ||
| 18 | arch/arm/mach-omap2/clock44xx_data.c | 8 +++--- | ||
| 19 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 33 ++++++++++++++++++++++++++++ | ||
| 20 | 2 files changed, 37 insertions(+), 4 deletions(-) | ||
| 21 | |||
| 22 | diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 23 | index 044df38..7a0b112 100644 | ||
| 24 | --- a/arch/arm/mach-omap2/clock44xx_data.c | ||
| 25 | +++ b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 26 | @@ -3032,10 +3032,10 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 27 | CLK(NULL, "dmic_sync_mux_ck", &dmic_sync_mux_ck, CK_443X), | ||
| 28 | CLK(NULL, "dmic_fck", &dmic_fck, CK_443X), | ||
| 29 | CLK(NULL, "dsp_fck", &dsp_fck, CK_443X), | ||
| 30 | - CLK("omapdss_dss", "sys_clk", &dss_sys_clk, CK_443X), | ||
| 31 | - CLK("omapdss_dss", "tv_clk", &dss_tv_clk, CK_443X), | ||
| 32 | - CLK("omapdss_dss", "video_clk", &dss_48mhz_clk, CK_443X), | ||
| 33 | - CLK("omapdss_dss", "fck", &dss_dss_clk, CK_443X), | ||
| 34 | + CLK(NULL, "dss_sys_clk", &dss_sys_clk, CK_443X), | ||
| 35 | + CLK(NULL, "dss_tv_clk", &dss_tv_clk, CK_443X), | ||
| 36 | + CLK(NULL, "dss_48mhz_clk", &dss_48mhz_clk, CK_443X), | ||
| 37 | + CLK(NULL, "dss_dss_clk", &dss_dss_clk, CK_443X), | ||
| 38 | CLK("omapdss_dss", "ick", &dss_fck, CK_443X), | ||
| 39 | CLK(NULL, "efuse_ctrl_cust_fck", &efuse_ctrl_cust_fck, CK_443X), | ||
| 40 | CLK(NULL, "emif1_fck", &emif1_fck, CK_443X), | ||
| 41 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 42 | index e011437..a7fbe5c 100644 | ||
| 43 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 44 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 45 | @@ -1267,9 +1267,16 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dispc_slaves[] = { | ||
| 46 | &omap44xx_l4_per__dss_dispc, | ||
| 47 | }; | ||
| 48 | |||
| 49 | +static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = { | ||
| 50 | + { .role = "sys_clk", .clk = "dss_sys_clk" }, | ||
| 51 | + { .role = "tv_clk", .clk = "dss_tv_clk" }, | ||
| 52 | + { .role = "hdmi_clk", .clk = "dss_48mhz_clk" }, | ||
| 53 | +}; | ||
| 54 | + | ||
| 55 | static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | ||
| 56 | .name = "dss_dispc", | ||
| 57 | .class = &omap44xx_dispc_hwmod_class, | ||
| 58 | + .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 59 | .mpu_irqs = omap44xx_dss_dispc_irqs, | ||
| 60 | .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, | ||
| 61 | .main_clk = "dss_fck", | ||
| 62 | @@ -1278,6 +1285,8 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | ||
| 63 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 64 | }, | ||
| 65 | }, | ||
| 66 | + .opt_clks = dss_dispc_opt_clks, | ||
| 67 | + .opt_clks_cnt = ARRAY_SIZE(dss_dispc_opt_clks), | ||
| 68 | .slaves = omap44xx_dss_dispc_slaves, | ||
| 69 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dispc_slaves), | ||
| 70 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 71 | @@ -1358,6 +1367,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi1_slaves[] = { | ||
| 72 | &omap44xx_l4_per__dss_dsi1, | ||
| 73 | }; | ||
| 74 | |||
| 75 | +static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { | ||
| 76 | + { .role = "sys_clk", .clk = "dss_sys_clk" }, | ||
| 77 | +}; | ||
| 78 | + | ||
| 79 | static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | ||
| 80 | .name = "dss_dsi1", | ||
| 81 | .class = &omap44xx_dsi_hwmod_class, | ||
| 82 | @@ -1369,6 +1382,8 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | ||
| 83 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 84 | }, | ||
| 85 | }, | ||
| 86 | + .opt_clks = dss_dsi1_opt_clks, | ||
| 87 | + .opt_clks_cnt = ARRAY_SIZE(dss_dsi1_opt_clks), | ||
| 88 | .slaves = omap44xx_dss_dsi1_slaves, | ||
| 89 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi1_slaves), | ||
| 90 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 91 | @@ -1428,6 +1443,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_dsi2_slaves[] = { | ||
| 92 | &omap44xx_l4_per__dss_dsi2, | ||
| 93 | }; | ||
| 94 | |||
| 95 | +static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = { | ||
| 96 | + { .role = "sys_clk", .clk = "dss_sys_clk" }, | ||
| 97 | +}; | ||
| 98 | + | ||
| 99 | static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { | ||
| 100 | .name = "dss_dsi2", | ||
| 101 | .class = &omap44xx_dsi_hwmod_class, | ||
| 102 | @@ -1439,6 +1458,8 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { | ||
| 103 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 104 | }, | ||
| 105 | }, | ||
| 106 | + .opt_clks = dss_dsi2_opt_clks, | ||
| 107 | + .opt_clks_cnt = ARRAY_SIZE(dss_dsi2_opt_clks), | ||
| 108 | .slaves = omap44xx_dss_dsi2_slaves, | ||
| 109 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_dsi2_slaves), | ||
| 110 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 111 | @@ -1518,6 +1539,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_hdmi_slaves[] = { | ||
| 112 | &omap44xx_l4_per__dss_hdmi, | ||
| 113 | }; | ||
| 114 | |||
| 115 | +static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { | ||
| 116 | + { .role = "sys_clk", .clk = "dss_sys_clk" }, | ||
| 117 | +}; | ||
| 118 | + | ||
| 119 | static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | ||
| 120 | .name = "dss_hdmi", | ||
| 121 | .class = &omap44xx_hdmi_hwmod_class, | ||
| 122 | @@ -1529,6 +1554,8 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | ||
| 123 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 124 | }, | ||
| 125 | }, | ||
| 126 | + .opt_clks = dss_hdmi_opt_clks, | ||
| 127 | + .opt_clks_cnt = ARRAY_SIZE(dss_hdmi_opt_clks), | ||
| 128 | .slaves = omap44xx_dss_hdmi_slaves, | ||
| 129 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_hdmi_slaves), | ||
| 130 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 131 | @@ -1603,6 +1630,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_rfbi_slaves[] = { | ||
| 132 | &omap44xx_l4_per__dss_rfbi, | ||
| 133 | }; | ||
| 134 | |||
| 135 | +static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { | ||
| 136 | + { .role = "ick", .clk = "dss_fck" }, | ||
| 137 | +}; | ||
| 138 | + | ||
| 139 | static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { | ||
| 140 | .name = "dss_rfbi", | ||
| 141 | .class = &omap44xx_rfbi_hwmod_class, | ||
| 142 | @@ -1613,6 +1644,8 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { | ||
| 143 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 144 | }, | ||
| 145 | }, | ||
| 146 | + .opt_clks = dss_rfbi_opt_clks, | ||
| 147 | + .opt_clks_cnt = ARRAY_SIZE(dss_rfbi_opt_clks), | ||
| 148 | .slaves = omap44xx_dss_rfbi_slaves, | ||
| 149 | .slaves_cnt = ARRAY_SIZE(omap44xx_dss_rfbi_slaves), | ||
| 150 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 151 | -- | ||
| 152 | 1.7.2.5 | ||
| 153 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0063-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0063-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch deleted file mode 100644 index b8ea798d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0063-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch +++ /dev/null | |||
| @@ -1,39 +0,0 @@ | |||
| 1 | From 1588fef412d710916847c3f383489af1559aa4b0 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Rajendra Nayak <rnayak@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 20:42:11 -0600 | ||
| 4 | Subject: [PATCH 063/149] OMAP2+: PM: Initialise sleep_switch to a non-valid value | ||
| 5 | |||
| 6 | sleep_switch which is initialised to 0 in omap_set_pwrdm_state | ||
| 7 | happens to be a valid sleep_switch type (FORCEWAKEUP_SWITCH) | ||
| 8 | which are defined as: | ||
| 9 | |||
| 10 | #define FORCEWAKEUP_SWITCH 0 | ||
| 11 | #define LOWPOWERSTATE_SWITCH 1 | ||
| 12 | |||
| 13 | This causes the function to wrongly program some clock domains | ||
| 14 | even when the Powerdomain is in ON state. | ||
| 15 | |||
| 16 | Signed-off-by: Rajendra Nayak <rnayak@ti.com> | ||
| 17 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 18 | Acked-by: Kevin Hilman <khilman@ti.com> | ||
| 19 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 20 | --- | ||
| 21 | arch/arm/mach-omap2/pm.c | 2 +- | ||
| 22 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c | ||
| 25 | index 49486f5..d48813f 100644 | ||
| 26 | --- a/arch/arm/mach-omap2/pm.c | ||
| 27 | +++ b/arch/arm/mach-omap2/pm.c | ||
| 28 | @@ -106,7 +106,7 @@ static void omap2_init_processor_devices(void) | ||
| 29 | int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | ||
| 30 | { | ||
| 31 | u32 cur_state; | ||
| 32 | - int sleep_switch = 0; | ||
| 33 | + int sleep_switch = -1; | ||
| 34 | int ret = 0; | ||
| 35 | |||
| 36 | if (pwrdm == NULL || IS_ERR(pwrdm)) | ||
| 37 | -- | ||
| 38 | 1.7.2.5 | ||
| 39 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0064-OMAP4-powerdomain-data-Fix-core-mem-states-and-missi.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0064-OMAP4-powerdomain-data-Fix-core-mem-states-and-missi.patch deleted file mode 100644 index 2222a2b7..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0064-OMAP4-powerdomain-data-Fix-core-mem-states-and-missi.patch +++ /dev/null | |||
| @@ -1,68 +0,0 @@ | |||
| 1 | From 2e67179b61fd7b58ecbafd72fe07943620863ae7 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 20:42:11 -0600 | ||
| 4 | Subject: [PATCH 064/149] OMAP4: powerdomain data: Fix core mem states and missing cefuse flag | ||
| 5 | |||
| 6 | Since ES2.0, the core ocmram does not support a different state | ||
| 7 | than the main power domain anymore during both ON and RET power | ||
| 8 | domain state. | ||
| 9 | Since PM is not supported at all in ES1.0, update the common | ||
| 10 | structure. | ||
| 11 | |||
| 12 | LOWPOWERSTATECHANGE is supported by the cefuse power domain but | ||
| 13 | the flag was missing. | ||
| 14 | Add the PWRDM_HAS_LOWPOWERSTATECHANGE in flags field. | ||
| 15 | |||
| 16 | Update the TI copyright date to 2011. | ||
| 17 | |||
| 18 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 19 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 20 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 21 | Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 22 | [paul@pwsan.com: moved the indentation changes to a different patch set] | ||
| 23 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 24 | --- | ||
| 25 | arch/arm/mach-omap2/powerdomains44xx_data.c | 7 ++++--- | ||
| 26 | 1 files changed, 4 insertions(+), 3 deletions(-) | ||
| 27 | |||
| 28 | diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c | ||
| 29 | index 3a7e678..8f46e7d 100644 | ||
| 30 | --- a/arch/arm/mach-omap2/powerdomains44xx_data.c | ||
| 31 | +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c | ||
| 32 | @@ -1,7 +1,7 @@ | ||
| 33 | /* | ||
| 34 | * OMAP4 Power domains framework | ||
| 35 | * | ||
| 36 | - * Copyright (C) 2009-2010 Texas Instruments, Inc. | ||
| 37 | + * Copyright (C) 2009-2011 Texas Instruments, Inc. | ||
| 38 | * Copyright (C) 2009-2011 Nokia Corporation | ||
| 39 | * | ||
| 40 | * Abhijit Pagare (abhijitpagare@ti.com) | ||
| 41 | @@ -41,14 +41,14 @@ static struct powerdomain core_44xx_pwrdm = { | ||
| 42 | .banks = 5, | ||
| 43 | .pwrsts_mem_ret = { | ||
| 44 | [0] = PWRSTS_OFF, /* core_nret_bank */ | ||
| 45 | - [1] = PWRSTS_OFF_RET, /* core_ocmram */ | ||
| 46 | + [1] = PWRSTS_RET, /* core_ocmram */ | ||
| 47 | [2] = PWRSTS_RET, /* core_other_bank */ | ||
| 48 | [3] = PWRSTS_OFF_RET, /* ducati_l2ram */ | ||
| 49 | [4] = PWRSTS_OFF_RET, /* ducati_unicache */ | ||
| 50 | }, | ||
| 51 | .pwrsts_mem_on = { | ||
| 52 | [0] = PWRSTS_ON, /* core_nret_bank */ | ||
| 53 | - [1] = PWRSTS_OFF_RET, /* core_ocmram */ | ||
| 54 | + [1] = PWRSTS_ON, /* core_ocmram */ | ||
| 55 | [2] = PWRSTS_ON, /* core_other_bank */ | ||
| 56 | [3] = PWRSTS_ON, /* ducati_l2ram */ | ||
| 57 | [4] = PWRSTS_ON, /* ducati_unicache */ | ||
| 58 | @@ -318,6 +318,7 @@ static struct powerdomain cefuse_44xx_pwrdm = { | ||
| 59 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 60 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 61 | .pwrsts = PWRSTS_OFF_ON, | ||
| 62 | + .flags = PWRDM_HAS_LOWPOWERSTATECHANGE, | ||
| 63 | }; | ||
| 64 | |||
| 65 | /* | ||
| 66 | -- | ||
| 67 | 1.7.2.5 | ||
| 68 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0065-OMAP4-clock-data-Keep-GPMC-clocks-always-enabled-and.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0065-OMAP4-clock-data-Keep-GPMC-clocks-always-enabled-and.patch deleted file mode 100644 index 8eee0663..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0065-OMAP4-clock-data-Keep-GPMC-clocks-always-enabled-and.patch +++ /dev/null | |||
| @@ -1,45 +0,0 @@ | |||
| 1 | From f54325009439b13e234374856057227edc00373c Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 20:42:59 -0600 | ||
| 4 | Subject: [PATCH 065/149] OMAP4: clock data: Keep GPMC clocks always enabled and hardware managed | ||
| 5 | |||
| 6 | On OMAP4, CPU accesses on unmapped addresses are redirected to GPMC by | ||
| 7 | L3 interconnect. Because of CPU speculative nature, such accesses are | ||
| 8 | possible which can lead to indirect access to GPMC and if it's clock is | ||
| 9 | not running, it can result in hang/abort on the platform. | ||
| 10 | |||
| 11 | Above makes access to GPMC unpredictable during the execution, so it's | ||
| 12 | module mode needs to be kept under hardware control instead of software | ||
| 13 | control. | ||
| 14 | Since the auto gating is supported for GPMC, there isn't any power impact | ||
| 15 | because of this change. | ||
| 16 | |||
| 17 | The issue was un-covered with security middleware running along with HLOS. | ||
| 18 | In this case GPMC had a valid MMU descriptor on secure side where as HLOS | ||
| 19 | didn't map the GMPC because it isn't being used. | ||
| 20 | |||
| 21 | Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 22 | [b-cousson@ti.com: Update subject and fix typos in the changelog] | ||
| 23 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 24 | Cc: Kevin Hilman <khilman@ti.com> | ||
| 25 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 26 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 27 | --- | ||
| 28 | arch/arm/mach-omap2/clock44xx_data.c | 1 + | ||
| 29 | 1 files changed, 1 insertions(+), 0 deletions(-) | ||
| 30 | |||
| 31 | diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 32 | index 7a0b112..2578820 100644 | ||
| 33 | --- a/arch/arm/mach-omap2/clock44xx_data.c | ||
| 34 | +++ b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 35 | @@ -1605,6 +1605,7 @@ static struct clk gpmc_ick = { | ||
| 36 | .ops = &clkops_omap2_dflt, | ||
| 37 | .enable_reg = OMAP4430_CM_L3_2_GPMC_CLKCTRL, | ||
| 38 | .enable_bit = OMAP4430_MODULEMODE_HWCTRL, | ||
| 39 | + .flags = ENABLE_ON_INIT, | ||
| 40 | .clkdm_name = "l3_2_clkdm", | ||
| 41 | .parent = &l3_div_ck, | ||
| 42 | .recalc = &followparent_recalc, | ||
| 43 | -- | ||
| 44 | 1.7.2.5 | ||
| 45 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0066-OMAP4-powerdomain-data-Remove-unsupported-MPU-powerd.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0066-OMAP4-powerdomain-data-Remove-unsupported-MPU-powerd.patch deleted file mode 100644 index 7c7671f7..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0066-OMAP4-powerdomain-data-Remove-unsupported-MPU-powerd.patch +++ /dev/null | |||
| @@ -1,44 +0,0 @@ | |||
| 1 | From ef733ded20f0466c32d61872f19903653f31f977 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 20:42:59 -0600 | ||
| 4 | Subject: [PATCH 066/149] OMAP4: powerdomain data: Remove unsupported MPU powerdomain state | ||
| 5 | |||
| 6 | On OMAP4430 devices, because of boot ROM code bug, MPU OFF state can't | ||
| 7 | be attempted independently. When coming out of MPU OFF state, ROM code | ||
| 8 | disables the clocks of IVAHD, TESLA which is not desirable. Hence the | ||
| 9 | MPU OFF state is not usable on OMAP4430 devices. | ||
| 10 | |||
| 11 | OMAP4460 onwards, MPU OFF state will be descoped completely because | ||
| 12 | the DDR firewall falls in MPU power domain. When the MPU hit OFF state, | ||
| 13 | DDR won't be accessible for other initiators. The deepest state supported | ||
| 14 | is open switch retention (OSWR) just like CORE and PER PD on OMAP4430. | ||
| 15 | |||
| 16 | So in summary MPU power domain OFF state is not supported on OMAP4 | ||
| 17 | and onwards designs. Thanks to new PRCM design, device off mode can | ||
| 18 | still be achieved with power domains hitting OSWR state. | ||
| 19 | |||
| 20 | Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 21 | Signed-off-by: Rajendra Nayak <rnayak@ti.com> | ||
| 22 | [b-cousson@ti.com: Fix changelog typos] | ||
| 23 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 24 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 25 | --- | ||
| 26 | arch/arm/mach-omap2/powerdomains44xx_data.c | 2 +- | ||
| 27 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 28 | |||
| 29 | diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c | ||
| 30 | index 8f46e7d..247e794 100644 | ||
| 31 | --- a/arch/arm/mach-omap2/powerdomains44xx_data.c | ||
| 32 | +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c | ||
| 33 | @@ -205,7 +205,7 @@ static struct powerdomain mpu_44xx_pwrdm = { | ||
| 34 | .prcm_offs = OMAP4430_PRM_MPU_INST, | ||
| 35 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 36 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 37 | - .pwrsts = PWRSTS_OFF_RET_ON, | ||
| 38 | + .pwrsts = PWRSTS_RET_ON, | ||
| 39 | .pwrsts_logic_ret = PWRSTS_OFF_RET, | ||
| 40 | .banks = 3, | ||
| 41 | .pwrsts_mem_ret = { | ||
| 42 | -- | ||
| 43 | 1.7.2.5 | ||
| 44 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0067-OMAP4-hwmod-data-Change-DSS-main_clk-scheme.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0067-OMAP4-hwmod-data-Change-DSS-main_clk-scheme.patch deleted file mode 100644 index 50baf2af..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0067-OMAP4-hwmod-data-Change-DSS-main_clk-scheme.patch +++ /dev/null | |||
| @@ -1,163 +0,0 @@ | |||
| 1 | From 497db49799f6c84f5073c6b78e58094ba0b0d52e Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Tomi Valkeinen <tomi.valkeinen@ti.com> | ||
| 3 | Date: Sat, 9 Jul 2011 20:39:45 -0600 | ||
| 4 | Subject: [PATCH 067/149] OMAP4: hwmod data: Change DSS main_clk scheme | ||
| 5 | |||
| 6 | Currently using pm_runtime with DSS requires the DSS driver to enable | ||
| 7 | the DSS functional clock before calling pm_runtime_get(). That makes it | ||
| 8 | impossible to use pm_runtime in DSS as it is meant to be used, with | ||
| 9 | pm_runtime callbacks. | ||
| 10 | |||
| 11 | This patch changes the hwmod database for OMAP4 so that enabling the | ||
| 12 | hwmod via pm_runtime will also enable the DSS functional clock, allowing | ||
| 13 | us to use pm_runtime properly in DSS driver. | ||
| 14 | |||
| 15 | The DSS HWMOD side is not really correct, not before nor after this | ||
| 16 | patch, and getting DSS to retention will probably not work currently. | ||
| 17 | However, it is not supported in the mainline kernel anyway, so this | ||
| 18 | won't break anything. | ||
| 19 | |||
| 20 | So this patch allows us to write the pm_runtime adaptation for the DSS | ||
| 21 | driver the way it should be done, and the HWMOD/PM side can be fixed | ||
| 22 | later. | ||
| 23 | |||
| 24 | Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> | ||
| 25 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 26 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 27 | --- | ||
| 28 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 28 ++++++++++++++-------------- | ||
| 29 | 1 files changed, 14 insertions(+), 14 deletions(-) | ||
| 30 | |||
| 31 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 32 | index a7fbe5c..b25ab83 100644 | ||
| 33 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 34 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 35 | @@ -1136,7 +1136,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dma_addrs[] = { | ||
| 36 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss = { | ||
| 37 | .master = &omap44xx_l3_main_2_hwmod, | ||
| 38 | .slave = &omap44xx_dss_hwmod, | ||
| 39 | - .clk = "l3_div_ck", | ||
| 40 | + .clk = "dss_fck", | ||
| 41 | .addr = omap44xx_dss_dma_addrs, | ||
| 42 | .user = OCP_USER_SDMA, | ||
| 43 | }; | ||
| 44 | @@ -1175,7 +1175,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { | ||
| 45 | static struct omap_hwmod omap44xx_dss_hwmod = { | ||
| 46 | .name = "dss_core", | ||
| 47 | .class = &omap44xx_dss_hwmod_class, | ||
| 48 | - .main_clk = "dss_fck", | ||
| 49 | + .main_clk = "dss_dss_clk", | ||
| 50 | .prcm = { | ||
| 51 | .omap4 = { | ||
| 52 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 53 | @@ -1238,7 +1238,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dispc_dma_addrs[] = { | ||
| 54 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dispc = { | ||
| 55 | .master = &omap44xx_l3_main_2_hwmod, | ||
| 56 | .slave = &omap44xx_dss_dispc_hwmod, | ||
| 57 | - .clk = "l3_div_ck", | ||
| 58 | + .clk = "dss_fck", | ||
| 59 | .addr = omap44xx_dss_dispc_dma_addrs, | ||
| 60 | .user = OCP_USER_SDMA, | ||
| 61 | }; | ||
| 62 | @@ -1279,7 +1279,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | ||
| 63 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 64 | .mpu_irqs = omap44xx_dss_dispc_irqs, | ||
| 65 | .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, | ||
| 66 | - .main_clk = "dss_fck", | ||
| 67 | + .main_clk = "dss_dss_clk", | ||
| 68 | .prcm = { | ||
| 69 | .omap4 = { | ||
| 70 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 71 | @@ -1338,7 +1338,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi1_dma_addrs[] = { | ||
| 72 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi1 = { | ||
| 73 | .master = &omap44xx_l3_main_2_hwmod, | ||
| 74 | .slave = &omap44xx_dss_dsi1_hwmod, | ||
| 75 | - .clk = "l3_div_ck", | ||
| 76 | + .clk = "dss_fck", | ||
| 77 | .addr = omap44xx_dss_dsi1_dma_addrs, | ||
| 78 | .user = OCP_USER_SDMA, | ||
| 79 | }; | ||
| 80 | @@ -1376,7 +1376,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | ||
| 81 | .class = &omap44xx_dsi_hwmod_class, | ||
| 82 | .mpu_irqs = omap44xx_dss_dsi1_irqs, | ||
| 83 | .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, | ||
| 84 | - .main_clk = "dss_fck", | ||
| 85 | + .main_clk = "dss_dss_clk", | ||
| 86 | .prcm = { | ||
| 87 | .omap4 = { | ||
| 88 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 89 | @@ -1414,7 +1414,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_dsi2_dma_addrs[] = { | ||
| 90 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_dsi2 = { | ||
| 91 | .master = &omap44xx_l3_main_2_hwmod, | ||
| 92 | .slave = &omap44xx_dss_dsi2_hwmod, | ||
| 93 | - .clk = "l3_div_ck", | ||
| 94 | + .clk = "dss_fck", | ||
| 95 | .addr = omap44xx_dss_dsi2_dma_addrs, | ||
| 96 | .user = OCP_USER_SDMA, | ||
| 97 | }; | ||
| 98 | @@ -1452,7 +1452,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { | ||
| 99 | .class = &omap44xx_dsi_hwmod_class, | ||
| 100 | .mpu_irqs = omap44xx_dss_dsi2_irqs, | ||
| 101 | .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, | ||
| 102 | - .main_clk = "dss_fck", | ||
| 103 | + .main_clk = "dss_dss_clk", | ||
| 104 | .prcm = { | ||
| 105 | .omap4 = { | ||
| 106 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 107 | @@ -1510,7 +1510,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_hdmi_dma_addrs[] = { | ||
| 108 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_hdmi = { | ||
| 109 | .master = &omap44xx_l3_main_2_hwmod, | ||
| 110 | .slave = &omap44xx_dss_hdmi_hwmod, | ||
| 111 | - .clk = "l3_div_ck", | ||
| 112 | + .clk = "dss_fck", | ||
| 113 | .addr = omap44xx_dss_hdmi_dma_addrs, | ||
| 114 | .user = OCP_USER_SDMA, | ||
| 115 | }; | ||
| 116 | @@ -1548,7 +1548,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | ||
| 117 | .class = &omap44xx_hdmi_hwmod_class, | ||
| 118 | .mpu_irqs = omap44xx_dss_hdmi_irqs, | ||
| 119 | .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, | ||
| 120 | - .main_clk = "dss_fck", | ||
| 121 | + .main_clk = "dss_dss_clk", | ||
| 122 | .prcm = { | ||
| 123 | .omap4 = { | ||
| 124 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 125 | @@ -1601,7 +1601,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_rfbi_dma_addrs[] = { | ||
| 126 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_rfbi = { | ||
| 127 | .master = &omap44xx_l3_main_2_hwmod, | ||
| 128 | .slave = &omap44xx_dss_rfbi_hwmod, | ||
| 129 | - .clk = "l3_div_ck", | ||
| 130 | + .clk = "dss_fck", | ||
| 131 | .addr = omap44xx_dss_rfbi_dma_addrs, | ||
| 132 | .user = OCP_USER_SDMA, | ||
| 133 | }; | ||
| 134 | @@ -1638,7 +1638,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { | ||
| 135 | .name = "dss_rfbi", | ||
| 136 | .class = &omap44xx_rfbi_hwmod_class, | ||
| 137 | .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, | ||
| 138 | - .main_clk = "dss_fck", | ||
| 139 | + .main_clk = "dss_dss_clk", | ||
| 140 | .prcm = { | ||
| 141 | .omap4 = { | ||
| 142 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 143 | @@ -1675,7 +1675,7 @@ static struct omap_hwmod_addr_space omap44xx_dss_venc_dma_addrs[] = { | ||
| 144 | static struct omap_hwmod_ocp_if omap44xx_l3_main_2__dss_venc = { | ||
| 145 | .master = &omap44xx_l3_main_2_hwmod, | ||
| 146 | .slave = &omap44xx_dss_venc_hwmod, | ||
| 147 | - .clk = "l3_div_ck", | ||
| 148 | + .clk = "dss_fck", | ||
| 149 | .addr = omap44xx_dss_venc_dma_addrs, | ||
| 150 | .user = OCP_USER_SDMA, | ||
| 151 | }; | ||
| 152 | @@ -1707,7 +1707,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = { | ||
| 153 | static struct omap_hwmod omap44xx_dss_venc_hwmod = { | ||
| 154 | .name = "dss_venc", | ||
| 155 | .class = &omap44xx_venc_hwmod_class, | ||
| 156 | - .main_clk = "dss_fck", | ||
| 157 | + .main_clk = "dss_dss_clk", | ||
| 158 | .prcm = { | ||
| 159 | .omap4 = { | ||
| 160 | .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 161 | -- | ||
| 162 | 1.7.2.5 | ||
| 163 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0068-I2C-OMAP2-Set-hwmod-flags-to-only-allow-16-bit-acces.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0068-I2C-OMAP2-Set-hwmod-flags-to-only-allow-16-bit-acces.patch deleted file mode 100644 index 6a0dea50..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0068-I2C-OMAP2-Set-hwmod-flags-to-only-allow-16-bit-acces.patch +++ /dev/null | |||
| @@ -1,133 +0,0 @@ | |||
| 1 | From 3bc9e748aeea5c152564186ad65ae7f7848420d3 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Andy Green <andy@warmcat.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:27:14 -0600 | ||
| 4 | Subject: [PATCH 068/149] I2C: OMAP2+: Set hwmod flags to only allow 16-bit accesses to i2c | ||
| 5 | |||
| 6 | Peter Maydell noticed when running under QEMU he was getting | ||
| 7 | errors reporting 32-bit access to I2C peripheral unit registers | ||
| 8 | that are documented to be 8 or 16-bit only[1][2] | ||
| 9 | |||
| 10 | The I2C driver is blameless as it wraps its accesses in a | ||
| 11 | function using __raw_writew and __raw_readw, it turned out it | ||
| 12 | is the hwmod stuff. | ||
| 13 | |||
| 14 | However the hwmod code already has a flag to force a | ||
| 15 | perhipheral unit to only be accessed using 16-bit operations. | ||
| 16 | |||
| 17 | This patch applies the 16-bit only flag to the 2430, | ||
| 18 | OMAP3xxx and OMAP44xx hwmod structs. 2420 was already | ||
| 19 | correctly marked up as 16-bit. | ||
| 20 | |||
| 21 | The 2430 change will need testing by TI as arranged | ||
| 22 | in the comments to the previous patch version. | ||
| 23 | |||
| 24 | When the 16-bit flag is or-ed with other flags, it is placed | ||
| 25 | first as requested in comments. | ||
| 26 | |||
| 27 | [1] OMAP4430 Technical reference manual section 23.1.6.2 | ||
| 28 | [2] OMAP3530 Techincal reference manual section 18.6 | ||
| 29 | |||
| 30 | Cc: patches@linaro.org | ||
| 31 | Cc: Ben Dooks <ben-linux@fluff.org> | ||
| 32 | Reported-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 33 | Signed-off-by: Andy Green <andy.green@linaro.org> | ||
| 34 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 35 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 36 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 37 | --- | ||
| 38 | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 2 ++ | ||
| 39 | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 3 +++ | ||
| 40 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 8 ++++---- | ||
| 41 | 3 files changed, 9 insertions(+), 4 deletions(-) | ||
| 42 | |||
| 43 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 44 | index 2a52f02..19ddf08 100644 | ||
| 45 | --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 46 | +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 47 | @@ -1092,6 +1092,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c1_slaves[] = { | ||
| 48 | |||
| 49 | static struct omap_hwmod omap2430_i2c1_hwmod = { | ||
| 50 | .name = "i2c1", | ||
| 51 | + .flags = HWMOD_16BIT_REG, | ||
| 52 | .mpu_irqs = omap2_i2c1_mpu_irqs, | ||
| 53 | .sdma_reqs = omap2_i2c1_sdma_reqs, | ||
| 54 | .main_clk = "i2chs1_fck", | ||
| 55 | @@ -1127,6 +1128,7 @@ static struct omap_hwmod_ocp_if *omap2430_i2c2_slaves[] = { | ||
| 56 | |||
| 57 | static struct omap_hwmod omap2430_i2c2_hwmod = { | ||
| 58 | .name = "i2c2", | ||
| 59 | + .flags = HWMOD_16BIT_REG, | ||
| 60 | .mpu_irqs = omap2_i2c2_mpu_irqs, | ||
| 61 | .sdma_reqs = omap2_i2c2_sdma_reqs, | ||
| 62 | .main_clk = "i2chs2_fck", | ||
| 63 | diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 64 | index 1a52716..542a11b 100644 | ||
| 65 | --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 66 | +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 67 | @@ -1615,6 +1615,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { | ||
| 68 | |||
| 69 | static struct omap_hwmod omap3xxx_i2c1_hwmod = { | ||
| 70 | .name = "i2c1", | ||
| 71 | + .flags = HWMOD_16BIT_REG, | ||
| 72 | .mpu_irqs = omap2_i2c1_mpu_irqs, | ||
| 73 | .sdma_reqs = omap2_i2c1_sdma_reqs, | ||
| 74 | .main_clk = "i2c1_fck", | ||
| 75 | @@ -1646,6 +1647,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { | ||
| 76 | |||
| 77 | static struct omap_hwmod omap3xxx_i2c2_hwmod = { | ||
| 78 | .name = "i2c2", | ||
| 79 | + .flags = HWMOD_16BIT_REG, | ||
| 80 | .mpu_irqs = omap2_i2c2_mpu_irqs, | ||
| 81 | .sdma_reqs = omap2_i2c2_sdma_reqs, | ||
| 82 | .main_clk = "i2c2_fck", | ||
| 83 | @@ -1688,6 +1690,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = { | ||
| 84 | |||
| 85 | static struct omap_hwmod omap3xxx_i2c3_hwmod = { | ||
| 86 | .name = "i2c3", | ||
| 87 | + .flags = HWMOD_16BIT_REG, | ||
| 88 | .mpu_irqs = i2c3_mpu_irqs, | ||
| 89 | .sdma_reqs = i2c3_sdma_reqs, | ||
| 90 | .main_clk = "i2c3_fck", | ||
| 91 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 92 | index b25ab83..2ebccb8 100644 | ||
| 93 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 94 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 95 | @@ -2201,7 +2201,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { | ||
| 96 | static struct omap_hwmod omap44xx_i2c1_hwmod = { | ||
| 97 | .name = "i2c1", | ||
| 98 | .class = &omap44xx_i2c_hwmod_class, | ||
| 99 | - .flags = HWMOD_INIT_NO_RESET, | ||
| 100 | + .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, | ||
| 101 | .mpu_irqs = omap44xx_i2c1_irqs, | ||
| 102 | .sdma_reqs = omap44xx_i2c1_sdma_reqs, | ||
| 103 | .main_clk = "i2c1_fck", | ||
| 104 | @@ -2254,7 +2254,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { | ||
| 105 | static struct omap_hwmod omap44xx_i2c2_hwmod = { | ||
| 106 | .name = "i2c2", | ||
| 107 | .class = &omap44xx_i2c_hwmod_class, | ||
| 108 | - .flags = HWMOD_INIT_NO_RESET, | ||
| 109 | + .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, | ||
| 110 | .mpu_irqs = omap44xx_i2c2_irqs, | ||
| 111 | .sdma_reqs = omap44xx_i2c2_sdma_reqs, | ||
| 112 | .main_clk = "i2c2_fck", | ||
| 113 | @@ -2307,7 +2307,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { | ||
| 114 | static struct omap_hwmod omap44xx_i2c3_hwmod = { | ||
| 115 | .name = "i2c3", | ||
| 116 | .class = &omap44xx_i2c_hwmod_class, | ||
| 117 | - .flags = HWMOD_INIT_NO_RESET, | ||
| 118 | + .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, | ||
| 119 | .mpu_irqs = omap44xx_i2c3_irqs, | ||
| 120 | .sdma_reqs = omap44xx_i2c3_sdma_reqs, | ||
| 121 | .main_clk = "i2c3_fck", | ||
| 122 | @@ -2360,7 +2360,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { | ||
| 123 | static struct omap_hwmod omap44xx_i2c4_hwmod = { | ||
| 124 | .name = "i2c4", | ||
| 125 | .class = &omap44xx_i2c_hwmod_class, | ||
| 126 | - .flags = HWMOD_INIT_NO_RESET, | ||
| 127 | + .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, | ||
| 128 | .mpu_irqs = omap44xx_i2c4_irqs, | ||
| 129 | .sdma_reqs = omap44xx_i2c4_sdma_reqs, | ||
| 130 | .main_clk = "i2c4_fck", | ||
| 131 | -- | ||
| 132 | 1.7.2.5 | ||
| 133 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0069-I2C-OMAP2-increase-omap_i2c_dev_attr-flags-from-u8-t.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0069-I2C-OMAP2-increase-omap_i2c_dev_attr-flags-from-u8-t.patch deleted file mode 100644 index cb36f97b..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0069-I2C-OMAP2-increase-omap_i2c_dev_attr-flags-from-u8-t.patch +++ /dev/null | |||
| @@ -1,46 +0,0 @@ | |||
| 1 | From c32768648dfe7f6bbe90ee0b18d1edb60fc141fe Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Andy Green <andy@warmcat.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:27:14 -0600 | ||
| 4 | Subject: [PATCH 069/149] I2C: OMAP2+: increase omap_i2c_dev_attr flags from u8 to u32 | ||
| 5 | |||
| 6 | As part of removing cpu_...() from the OMAP I2C driver, we need to | ||
| 7 | convert the CPU tests into functionality flags that are set by | ||
| 8 | hwmod class in the same way the IP revision is. | ||
| 9 | |||
| 10 | More flags are needed than will fit in the existing u8 flags | ||
| 11 | member of omap_i2c_dev_attr. | ||
| 12 | |||
| 13 | These flags can refer to options inside the IP block but they are | ||
| 14 | most needed for information about cpu implementation specific | ||
| 15 | options that are not part of the IP block itself. For example, | ||
| 16 | how the CPU data bus is wired to the IP block databus differs | ||
| 17 | between OMAP cpus and affects how you must shift the address in | ||
| 18 | the IP block, but is not a feature of the IP block itself. | ||
| 19 | |||
| 20 | Cc: patches@linaro.org | ||
| 21 | Cc: Ben Dooks <ben-linux@fluff.org> | ||
| 22 | Reported-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 23 | Signed-off-by: Andy Green <andy.green@linaro.org> | ||
| 24 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 25 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 26 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 27 | --- | ||
| 28 | arch/arm/plat-omap/include/plat/i2c.h | 2 +- | ||
| 29 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 30 | |||
| 31 | diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h | ||
| 32 | index 878d632..4c108f5 100644 | ||
| 33 | --- a/arch/arm/plat-omap/include/plat/i2c.h | ||
| 34 | +++ b/arch/arm/plat-omap/include/plat/i2c.h | ||
| 35 | @@ -46,7 +46,7 @@ static inline int omap_register_i2c_bus(int bus_id, u32 clkrate, | ||
| 36 | */ | ||
| 37 | struct omap_i2c_dev_attr { | ||
| 38 | u8 fifo_depth; | ||
| 39 | - u8 flags; | ||
| 40 | + u32 flags; | ||
| 41 | }; | ||
| 42 | |||
| 43 | void __init omap1_i2c_mux_pins(int bus_id); | ||
| 44 | -- | ||
| 45 | 1.7.2.5 | ||
| 46 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0070-I2C-OMAP2-Introduce-I2C-IP-versioning-constants.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0070-I2C-OMAP2-Introduce-I2C-IP-versioning-constants.patch deleted file mode 100644 index 9c4b51c9..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0070-I2C-OMAP2-Introduce-I2C-IP-versioning-constants.patch +++ /dev/null | |||
| @@ -1,61 +0,0 @@ | |||
| 1 | From 109f56f616221cb632ce98b5da05420f2099eff1 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Andy Green <andy@warmcat.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:27:14 -0600 | ||
| 4 | Subject: [PATCH 070/149] I2C: OMAP2+: Introduce I2C IP versioning constants | ||
| 5 | |||
| 6 | These represent the two kinds of (incompatible) OMAP I2C | ||
| 7 | peripheral unit in use so far. | ||
| 8 | |||
| 9 | The constants are in linux/i2c-omap.h so the omap i2c driver can have | ||
| 10 | them too. | ||
| 11 | |||
| 12 | Cc: patches@linaro.org | ||
| 13 | Cc: Ben Dooks <ben-linux@fluff.org> | ||
| 14 | Reported-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 15 | Signed-off-by: Andy Green <andy.green@linaro.org> | ||
| 16 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 17 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 18 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 19 | --- | ||
| 20 | arch/arm/plat-omap/include/plat/i2c.h | 1 + | ||
| 21 | include/linux/i2c-omap.h | 12 ++++++++++++ | ||
| 22 | 2 files changed, 13 insertions(+), 0 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h | ||
| 25 | index 4c108f5..fd75dad 100644 | ||
| 26 | --- a/arch/arm/plat-omap/include/plat/i2c.h | ||
| 27 | +++ b/arch/arm/plat-omap/include/plat/i2c.h | ||
| 28 | @@ -22,6 +22,7 @@ | ||
| 29 | #define __ASM__ARCH_OMAP_I2C_H | ||
| 30 | |||
| 31 | #include <linux/i2c.h> | ||
| 32 | +#include <linux/i2c-omap.h> | ||
| 33 | |||
| 34 | #if defined(CONFIG_I2C_OMAP) || defined(CONFIG_I2C_OMAP_MODULE) | ||
| 35 | extern int omap_register_i2c_bus(int bus_id, u32 clkrate, | ||
| 36 | diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h | ||
| 37 | index 7472449..701886d 100644 | ||
| 38 | --- a/include/linux/i2c-omap.h | ||
| 39 | +++ b/include/linux/i2c-omap.h | ||
| 40 | @@ -3,6 +3,18 @@ | ||
| 41 | |||
| 42 | #include <linux/platform_device.h> | ||
| 43 | |||
| 44 | +/* | ||
| 45 | + * Version 2 of the I2C peripheral unit has a different register | ||
| 46 | + * layout and extra registers. The ID register in the V2 peripheral | ||
| 47 | + * unit on the OMAP4430 reports the same ID as the V1 peripheral | ||
| 48 | + * unit on the OMAP3530, so we must inform the driver which IP | ||
| 49 | + * version we know it is running on from platform / cpu-specific | ||
| 50 | + * code using these constants in the hwmod class definition. | ||
| 51 | + */ | ||
| 52 | + | ||
| 53 | +#define OMAP_I2C_IP_VERSION_1 1 | ||
| 54 | +#define OMAP_I2C_IP_VERSION_2 2 | ||
| 55 | + | ||
| 56 | struct omap_i2c_bus_platform_data { | ||
| 57 | u32 clkrate; | ||
| 58 | void (*set_mpu_wkup_lat)(struct device *dev, long set); | ||
| 59 | -- | ||
| 60 | 1.7.2.5 | ||
| 61 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0071-I2C-OMAP1-OMAP2-create-omap-I2C-functionality-flags-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0071-I2C-OMAP1-OMAP2-create-omap-I2C-functionality-flags-.patch deleted file mode 100644 index c2116546..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0071-I2C-OMAP1-OMAP2-create-omap-I2C-functionality-flags-.patch +++ /dev/null | |||
| @@ -1,51 +0,0 @@ | |||
| 1 | From 46e0d0dce7d030781e2c67cce0438384ee8dd707 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Andy Green <andy@warmcat.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:27:15 -0600 | ||
| 4 | Subject: [PATCH 071/149] I2C: OMAP1/OMAP2+: create omap I2C functionality flags for each cpu_... test | ||
| 5 | |||
| 6 | These represent the 8 kinds of implementation functionality | ||
| 7 | that up until now were inferred by the 16 remaining cpu_...() | ||
| 8 | tests in the omap i2c driver. | ||
| 9 | |||
| 10 | Changed to use BIT() as suggested by Balaji T Krishnamoorthy. | ||
| 11 | |||
| 12 | Cc: patches@linaro.org | ||
| 13 | Cc: Ben Dooks <ben-linux@fluff.org> | ||
| 14 | Reported-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 15 | Signed-off-by: Andy Green <andy.green@linaro.org> | ||
| 16 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 17 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 18 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 19 | --- | ||
| 20 | include/linux/i2c-omap.h | 15 +++++++++++++++ | ||
| 21 | 1 files changed, 15 insertions(+), 0 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/include/linux/i2c-omap.h b/include/linux/i2c-omap.h | ||
| 24 | index 701886d..0aa0cbd 100644 | ||
| 25 | --- a/include/linux/i2c-omap.h | ||
| 26 | +++ b/include/linux/i2c-omap.h | ||
| 27 | @@ -15,6 +15,21 @@ | ||
| 28 | #define OMAP_I2C_IP_VERSION_1 1 | ||
| 29 | #define OMAP_I2C_IP_VERSION_2 2 | ||
| 30 | |||
| 31 | +/* struct omap_i2c_bus_platform_data .flags meanings */ | ||
| 32 | + | ||
| 33 | +#define OMAP_I2C_FLAG_NO_FIFO BIT(0) | ||
| 34 | +#define OMAP_I2C_FLAG_SIMPLE_CLOCK BIT(1) | ||
| 35 | +#define OMAP_I2C_FLAG_16BIT_DATA_REG BIT(2) | ||
| 36 | +#define OMAP_I2C_FLAG_RESET_REGS_POSTIDLE BIT(3) | ||
| 37 | +#define OMAP_I2C_FLAG_APPLY_ERRATA_I207 BIT(4) | ||
| 38 | +#define OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK BIT(5) | ||
| 39 | +#define OMAP_I2C_FLAG_FORCE_19200_INT_CLK BIT(6) | ||
| 40 | +/* how the CPU address bus must be translated for I2C unit access */ | ||
| 41 | +#define OMAP_I2C_FLAG_BUS_SHIFT_NONE 0 | ||
| 42 | +#define OMAP_I2C_FLAG_BUS_SHIFT_1 BIT(7) | ||
| 43 | +#define OMAP_I2C_FLAG_BUS_SHIFT_2 BIT(8) | ||
| 44 | +#define OMAP_I2C_FLAG_BUS_SHIFT__SHIFT 7 | ||
| 45 | + | ||
| 46 | struct omap_i2c_bus_platform_data { | ||
| 47 | u32 clkrate; | ||
| 48 | void (*set_mpu_wkup_lat)(struct device *dev, long set); | ||
| 49 | -- | ||
| 50 | 1.7.2.5 | ||
| 51 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0072-I2C-OMAP2-Tag-all-OMAP2-hwmod-defintions-with-I2C-IP.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0072-I2C-OMAP2-Tag-all-OMAP2-hwmod-defintions-with-I2C-IP.patch deleted file mode 100644 index 1f19e720..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0072-I2C-OMAP2-Tag-all-OMAP2-hwmod-defintions-with-I2C-IP.patch +++ /dev/null | |||
| @@ -1,77 +0,0 @@ | |||
| 1 | From 19d2caadfe6d0faad12b209bc1d096e1297fea68 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Andy Green <andy@warmcat.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:27:15 -0600 | ||
| 4 | Subject: [PATCH 072/149] I2C: OMAP2+: Tag all OMAP2+ hwmod defintions with I2C IP revision | ||
| 5 | |||
| 6 | Since we cannot trust (or even reliably find) the OMAP I2C | ||
| 7 | peripheral unit's own revision register, we must inform the | ||
| 8 | OMAP i2c driver of which IP version it is running on. We | ||
| 9 | do this by tagging the omap_hwmod_class for i2c on all the | ||
| 10 | OMAP2+ platform / cpu specific hwmod init and passing it up | ||
| 11 | to the driver (next patches). | ||
| 12 | |||
| 13 | Cc: patches@linaro.org | ||
| 14 | Cc: Ben Dooks <ben-linux@fluff.org> | ||
| 15 | Reported-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 16 | Signed-off-by: Andy Green <andy.green@linaro.org> | ||
| 17 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 18 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 19 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 20 | --- | ||
| 21 | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 1 + | ||
| 22 | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 1 + | ||
| 23 | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 1 + | ||
| 24 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 1 + | ||
| 25 | 4 files changed, 4 insertions(+), 0 deletions(-) | ||
| 26 | |||
| 27 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 28 | index f3901ab..95f547c 100644 | ||
| 29 | --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 30 | +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 31 | @@ -1029,6 +1029,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { | ||
| 32 | static struct omap_hwmod_class i2c_class = { | ||
| 33 | .name = "i2c", | ||
| 34 | .sysc = &i2c_sysc, | ||
| 35 | + .rev = OMAP_I2C_IP_VERSION_1, | ||
| 36 | }; | ||
| 37 | |||
| 38 | static struct omap_i2c_dev_attr i2c_dev_attr; | ||
| 39 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 40 | index 19ddf08..d7ed51b 100644 | ||
| 41 | --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 42 | +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 43 | @@ -1078,6 +1078,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { | ||
| 44 | static struct omap_hwmod_class i2c_class = { | ||
| 45 | .name = "i2c", | ||
| 46 | .sysc = &i2c_sysc, | ||
| 47 | + .rev = OMAP_I2C_IP_VERSION_1, | ||
| 48 | }; | ||
| 49 | |||
| 50 | static struct omap_i2c_dev_attr i2c_dev_attr = { | ||
| 51 | diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 52 | index 542a11b..58ec1e2 100644 | ||
| 53 | --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 54 | +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 55 | @@ -1308,6 +1308,7 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { | ||
| 56 | static struct omap_hwmod_class i2c_class = { | ||
| 57 | .name = "i2c", | ||
| 58 | .sysc = &i2c_sysc, | ||
| 59 | + .rev = OMAP_I2C_IP_VERSION_1, | ||
| 60 | }; | ||
| 61 | |||
| 62 | static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { | ||
| 63 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 64 | index 2ebccb8..1bed3b8 100644 | ||
| 65 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 66 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 67 | @@ -2160,6 +2160,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = { | ||
| 68 | static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { | ||
| 69 | .name = "i2c", | ||
| 70 | .sysc = &omap44xx_i2c_sysc, | ||
| 71 | + .rev = OMAP_I2C_IP_VERSION_2, | ||
| 72 | }; | ||
| 73 | |||
| 74 | /* i2c1 */ | ||
| 75 | -- | ||
| 76 | 1.7.2.5 | ||
| 77 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0073-I2C-OMAP2-add-correct-functionality-flags-to-all-oma.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0073-I2C-OMAP2-add-correct-functionality-flags-to-all-oma.patch deleted file mode 100644 index aad082cb..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0073-I2C-OMAP2-add-correct-functionality-flags-to-all-oma.patch +++ /dev/null | |||
| @@ -1,146 +0,0 @@ | |||
| 1 | From 61ee913ca983d9ff9bc3d98564417d9054db3e45 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Andy Green <andy@warmcat.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:27:16 -0600 | ||
| 4 | Subject: [PATCH 073/149] I2C: OMAP2+: add correct functionality flags to all omap2plus i2c dev_attr | ||
| 5 | |||
| 6 | This adds the new functionality flags for omap i2c unit to all OMAP2 | ||
| 7 | hwmod definitions | ||
| 8 | |||
| 9 | Cc: patches@linaro.org | ||
| 10 | Cc: Ben Dooks <ben-linux@fluff.org> | ||
| 11 | Reported-by: Peter Maydell <peter.maydell@linaro.org> | ||
| 12 | Signed-off-by: Andy Green <andy.green@linaro.org> | ||
| 13 | Signed-off-by: Tony Lindgren <tony@atomide.com> | ||
| 14 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 15 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 16 | --- | ||
| 17 | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 7 ++++++- | ||
| 18 | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 3 +++ | ||
| 19 | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 9 +++++++++ | ||
| 20 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 9 +++++++++ | ||
| 21 | 4 files changed, 27 insertions(+), 1 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 24 | index 95f547c..7af2514 100644 | ||
| 25 | --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 26 | +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 27 | @@ -1032,7 +1032,12 @@ static struct omap_hwmod_class i2c_class = { | ||
| 28 | .rev = OMAP_I2C_IP_VERSION_1, | ||
| 29 | }; | ||
| 30 | |||
| 31 | -static struct omap_i2c_dev_attr i2c_dev_attr; | ||
| 32 | +static struct omap_i2c_dev_attr i2c_dev_attr = { | ||
| 33 | + .flags = OMAP_I2C_FLAG_NO_FIFO | | ||
| 34 | + OMAP_I2C_FLAG_SIMPLE_CLOCK | | ||
| 35 | + OMAP_I2C_FLAG_16BIT_DATA_REG | | ||
| 36 | + OMAP_I2C_FLAG_BUS_SHIFT_2, | ||
| 37 | +}; | ||
| 38 | |||
| 39 | /* I2C1 */ | ||
| 40 | |||
| 41 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 42 | index d7ed51b..405688a 100644 | ||
| 43 | --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 44 | +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 45 | @@ -1083,6 +1083,9 @@ static struct omap_hwmod_class i2c_class = { | ||
| 46 | |||
| 47 | static struct omap_i2c_dev_attr i2c_dev_attr = { | ||
| 48 | .fifo_depth = 8, /* bytes */ | ||
| 49 | + .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | | ||
| 50 | + OMAP_I2C_FLAG_BUS_SHIFT_2 | | ||
| 51 | + OMAP_I2C_FLAG_FORCE_19200_INT_CLK, | ||
| 52 | }; | ||
| 53 | |||
| 54 | /* I2C1 */ | ||
| 55 | diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 56 | index 58ec1e2..c704ac8 100644 | ||
| 57 | --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 58 | +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 59 | @@ -1608,6 +1608,9 @@ static struct omap_hwmod omap3xxx_dss_venc_hwmod = { | ||
| 60 | |||
| 61 | static struct omap_i2c_dev_attr i2c1_dev_attr = { | ||
| 62 | .fifo_depth = 8, /* bytes */ | ||
| 63 | + .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | | ||
| 64 | + OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | | ||
| 65 | + OMAP_I2C_FLAG_BUS_SHIFT_2, | ||
| 66 | }; | ||
| 67 | |||
| 68 | static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = { | ||
| 69 | @@ -1640,6 +1643,9 @@ static struct omap_hwmod omap3xxx_i2c1_hwmod = { | ||
| 70 | |||
| 71 | static struct omap_i2c_dev_attr i2c2_dev_attr = { | ||
| 72 | .fifo_depth = 8, /* bytes */ | ||
| 73 | + .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | | ||
| 74 | + OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | | ||
| 75 | + OMAP_I2C_FLAG_BUS_SHIFT_2, | ||
| 76 | }; | ||
| 77 | |||
| 78 | static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = { | ||
| 79 | @@ -1672,6 +1678,9 @@ static struct omap_hwmod omap3xxx_i2c2_hwmod = { | ||
| 80 | |||
| 81 | static struct omap_i2c_dev_attr i2c3_dev_attr = { | ||
| 82 | .fifo_depth = 64, /* bytes */ | ||
| 83 | + .flags = OMAP_I2C_FLAG_APPLY_ERRATA_I207 | | ||
| 84 | + OMAP_I2C_FLAG_RESET_REGS_POSTIDLE | | ||
| 85 | + OMAP_I2C_FLAG_BUS_SHIFT_2, | ||
| 86 | }; | ||
| 87 | |||
| 88 | static struct omap_hwmod_irq_info i2c3_mpu_irqs[] = { | ||
| 89 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 90 | index 1bed3b8..55331df 100644 | ||
| 91 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 92 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 93 | @@ -27,6 +27,7 @@ | ||
| 94 | #include <plat/mcspi.h> | ||
| 95 | #include <plat/mcbsp.h> | ||
| 96 | #include <plat/mmc.h> | ||
| 97 | +#include <plat/i2c.h> | ||
| 98 | |||
| 99 | #include "omap_hwmod_common_data.h" | ||
| 100 | |||
| 101 | @@ -2163,6 +2164,10 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { | ||
| 102 | .rev = OMAP_I2C_IP_VERSION_2, | ||
| 103 | }; | ||
| 104 | |||
| 105 | +static struct omap_i2c_dev_attr i2c_dev_attr = { | ||
| 106 | + .flags = OMAP_I2C_FLAG_BUS_SHIFT_NONE, | ||
| 107 | +}; | ||
| 108 | + | ||
| 109 | /* i2c1 */ | ||
| 110 | static struct omap_hwmod omap44xx_i2c1_hwmod; | ||
| 111 | static struct omap_hwmod_irq_info omap44xx_i2c1_irqs[] = { | ||
| 112 | @@ -2213,6 +2218,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { | ||
| 113 | }, | ||
| 114 | .slaves = omap44xx_i2c1_slaves, | ||
| 115 | .slaves_cnt = ARRAY_SIZE(omap44xx_i2c1_slaves), | ||
| 116 | + .dev_attr = &i2c_dev_attr, | ||
| 117 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 118 | }; | ||
| 119 | |||
| 120 | @@ -2266,6 +2272,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { | ||
| 121 | }, | ||
| 122 | .slaves = omap44xx_i2c2_slaves, | ||
| 123 | .slaves_cnt = ARRAY_SIZE(omap44xx_i2c2_slaves), | ||
| 124 | + .dev_attr = &i2c_dev_attr, | ||
| 125 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 126 | }; | ||
| 127 | |||
| 128 | @@ -2319,6 +2326,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { | ||
| 129 | }, | ||
| 130 | .slaves = omap44xx_i2c3_slaves, | ||
| 131 | .slaves_cnt = ARRAY_SIZE(omap44xx_i2c3_slaves), | ||
| 132 | + .dev_attr = &i2c_dev_attr, | ||
| 133 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 134 | }; | ||
| 135 | |||
| 136 | @@ -2372,6 +2380,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { | ||
| 137 | }, | ||
| 138 | .slaves = omap44xx_i2c4_slaves, | ||
| 139 | .slaves_cnt = ARRAY_SIZE(omap44xx_i2c4_slaves), | ||
| 140 | + .dev_attr = &i2c_dev_attr, | ||
| 141 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 142 | }; | ||
| 143 | |||
| 144 | -- | ||
| 145 | 1.7.2.5 | ||
| 146 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0074-OMAP-hwmod-fix-the-i2c-reset-timeout-during-bootup.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0074-OMAP-hwmod-fix-the-i2c-reset-timeout-during-bootup.patch deleted file mode 100644 index 4d164512..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0074-OMAP-hwmod-fix-the-i2c-reset-timeout-during-bootup.patch +++ /dev/null | |||
| @@ -1,286 +0,0 @@ | |||
| 1 | From 6cc398a1452cef66c2c10eaadb3efe18f4ab8874 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Avinash.H.M <avinashhm@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:27:16 -0600 | ||
| 4 | Subject: [PATCH 074/149] OMAP: hwmod: fix the i2c-reset timeout during bootup | ||
| 5 | |||
| 6 | The sequence of _ocp_softreset doesn't work for i2c. The i2c module has a | ||
| 7 | special sequence to reset the module. The sequence is | ||
| 8 | - Disable the I2C. | ||
| 9 | - Write to SOFTRESET bit. | ||
| 10 | - Enable the I2C. | ||
| 11 | - Poll on the RESETDONE bit. | ||
| 12 | The sequence is implemented as a function and the i2c_class is updated with | ||
| 13 | the correct 'reset' pointer. omap_hwmod_softreset function is implemented | ||
| 14 | which triggers the softreset by writing into sysconfig register. On following | ||
| 15 | this sequence, i2c module resets properly and timeouts are not seen. | ||
| 16 | |||
| 17 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 18 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 19 | Cc: Benoit Cousson <b-cousson@ti.com> | ||
| 20 | Cc: Kevin Hilman <khilman@ti.com> | ||
| 21 | Signed-off-by: Avinash.H.M <avinashhm@ti.com> | ||
| 22 | [paul@pwsan.com: combined this patch with a patch to remove | ||
| 23 | HWMOD_INIT_NO_RESET from the 44xx hwmod flags; change register | ||
| 24 | offset conditional code to use the IP block revision; minor code | ||
| 25 | cleanup] | ||
| 26 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 27 | --- | ||
| 28 | arch/arm/mach-omap2/i2c.c | 68 ++++++++++++++++++++++++++ | ||
| 29 | arch/arm/mach-omap2/omap_hwmod.c | 27 ++++++++++ | ||
| 30 | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 1 + | ||
| 31 | arch/arm/mach-omap2/omap_hwmod_2430_data.c | 1 + | ||
| 32 | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 7 ++- | ||
| 33 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 10 ++-- | ||
| 34 | arch/arm/plat-omap/include/plat/i2c.h | 3 + | ||
| 35 | arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + | ||
| 36 | 8 files changed, 111 insertions(+), 7 deletions(-) | ||
| 37 | |||
| 38 | diff --git a/arch/arm/mach-omap2/i2c.c b/arch/arm/mach-omap2/i2c.c | ||
| 39 | index 79c478c..ace9994 100644 | ||
| 40 | --- a/arch/arm/mach-omap2/i2c.c | ||
| 41 | +++ b/arch/arm/mach-omap2/i2c.c | ||
| 42 | @@ -21,9 +21,19 @@ | ||
| 43 | |||
| 44 | #include <plat/cpu.h> | ||
| 45 | #include <plat/i2c.h> | ||
| 46 | +#include <plat/common.h> | ||
| 47 | +#include <plat/omap_hwmod.h> | ||
| 48 | |||
| 49 | #include "mux.h" | ||
| 50 | |||
| 51 | +/* In register I2C_CON, Bit 15 is the I2C enable bit */ | ||
| 52 | +#define I2C_EN BIT(15) | ||
| 53 | +#define OMAP2_I2C_CON_OFFSET 0x24 | ||
| 54 | +#define OMAP4_I2C_CON_OFFSET 0xA4 | ||
| 55 | + | ||
| 56 | +/* Maximum microseconds to wait for OMAP module to softreset */ | ||
| 57 | +#define MAX_MODULE_SOFTRESET_WAIT 10000 | ||
| 58 | + | ||
| 59 | void __init omap2_i2c_mux_pins(int bus_id) | ||
| 60 | { | ||
| 61 | char mux_name[sizeof("i2c2_scl.i2c2_scl")]; | ||
| 62 | @@ -37,3 +47,61 @@ void __init omap2_i2c_mux_pins(int bus_id) | ||
| 63 | sprintf(mux_name, "i2c%i_sda.i2c%i_sda", bus_id, bus_id); | ||
| 64 | omap_mux_init_signal(mux_name, OMAP_PIN_INPUT); | ||
| 65 | } | ||
| 66 | + | ||
| 67 | +/** | ||
| 68 | + * omap_i2c_reset - reset the omap i2c module. | ||
| 69 | + * @oh: struct omap_hwmod * | ||
| 70 | + * | ||
| 71 | + * The i2c moudle in omap2, omap3 had a special sequence to reset. The | ||
| 72 | + * sequence is: | ||
| 73 | + * - Disable the I2C. | ||
| 74 | + * - Write to SOFTRESET bit. | ||
| 75 | + * - Enable the I2C. | ||
| 76 | + * - Poll on the RESETDONE bit. | ||
| 77 | + * The sequence is implemented in below function. This is called for 2420, | ||
| 78 | + * 2430 and omap3. | ||
| 79 | + */ | ||
| 80 | +int omap_i2c_reset(struct omap_hwmod *oh) | ||
| 81 | +{ | ||
| 82 | + u32 v; | ||
| 83 | + u16 i2c_con; | ||
| 84 | + int c = 0; | ||
| 85 | + | ||
| 86 | + if (oh->class->rev == OMAP_I2C_IP_VERSION_2) { | ||
| 87 | + i2c_con = OMAP4_I2C_CON_OFFSET; | ||
| 88 | + } else if (oh->class->rev == OMAP_I2C_IP_VERSION_1) { | ||
| 89 | + i2c_con = OMAP2_I2C_CON_OFFSET; | ||
| 90 | + } else { | ||
| 91 | + WARN(1, "Cannot reset I2C block %s: unsupported revision\n", | ||
| 92 | + oh->name); | ||
| 93 | + return -EINVAL; | ||
| 94 | + } | ||
| 95 | + | ||
| 96 | + /* Disable I2C */ | ||
| 97 | + v = omap_hwmod_read(oh, i2c_con); | ||
| 98 | + v &= ~I2C_EN; | ||
| 99 | + omap_hwmod_write(v, oh, i2c_con); | ||
| 100 | + | ||
| 101 | + /* Write to the SOFTRESET bit */ | ||
| 102 | + omap_hwmod_softreset(oh); | ||
| 103 | + | ||
| 104 | + /* Enable I2C */ | ||
| 105 | + v = omap_hwmod_read(oh, i2c_con); | ||
| 106 | + v |= I2C_EN; | ||
| 107 | + omap_hwmod_write(v, oh, i2c_con); | ||
| 108 | + | ||
| 109 | + /* Poll on RESETDONE bit */ | ||
| 110 | + omap_test_timeout((omap_hwmod_read(oh, | ||
| 111 | + oh->class->sysc->syss_offs) | ||
| 112 | + & SYSS_RESETDONE_MASK), | ||
| 113 | + MAX_MODULE_SOFTRESET_WAIT, c); | ||
| 114 | + | ||
| 115 | + if (c == MAX_MODULE_SOFTRESET_WAIT) | ||
| 116 | + pr_warning("%s: %s: softreset failed (waited %d usec)\n", | ||
| 117 | + __func__, oh->name, MAX_MODULE_SOFTRESET_WAIT); | ||
| 118 | + else | ||
| 119 | + pr_debug("%s: %s: softreset in %d usec\n", __func__, | ||
| 120 | + oh->name, c); | ||
| 121 | + | ||
| 122 | + return 0; | ||
| 123 | +} | ||
| 124 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 125 | index 7d242c9..02b6016 100644 | ||
| 126 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 127 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 128 | @@ -1656,6 +1656,33 @@ void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) | ||
| 129 | } | ||
| 130 | |||
| 131 | /** | ||
| 132 | + * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit | ||
| 133 | + * @oh: struct omap_hwmod * | ||
| 134 | + * | ||
| 135 | + * This is a public function exposed to drivers. Some drivers may need to do | ||
| 136 | + * some settings before and after resetting the device. Those drivers after | ||
| 137 | + * doing the necessary settings could use this function to start a reset by | ||
| 138 | + * setting the SYSCONFIG.SOFTRESET bit. | ||
| 139 | + */ | ||
| 140 | +int omap_hwmod_softreset(struct omap_hwmod *oh) | ||
| 141 | +{ | ||
| 142 | + u32 v; | ||
| 143 | + int ret; | ||
| 144 | + | ||
| 145 | + if (!oh || !(oh->_sysc_cache)) | ||
| 146 | + return -EINVAL; | ||
| 147 | + | ||
| 148 | + v = oh->_sysc_cache; | ||
| 149 | + ret = _set_softreset(oh, &v); | ||
| 150 | + if (ret) | ||
| 151 | + goto error; | ||
| 152 | + _write_sysconfig(v, oh); | ||
| 153 | + | ||
| 154 | +error: | ||
| 155 | + return ret; | ||
| 156 | +} | ||
| 157 | + | ||
| 158 | +/** | ||
| 159 | * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode | ||
| 160 | * @oh: struct omap_hwmod * | ||
| 161 | * @idlemode: SIDLEMODE field bits (shifted to bit 0) | ||
| 162 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 163 | index 7af2514..a015c69 100644 | ||
| 164 | --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 165 | +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c | ||
| 166 | @@ -1030,6 +1030,7 @@ static struct omap_hwmod_class i2c_class = { | ||
| 167 | .name = "i2c", | ||
| 168 | .sysc = &i2c_sysc, | ||
| 169 | .rev = OMAP_I2C_IP_VERSION_1, | ||
| 170 | + .reset = &omap_i2c_reset, | ||
| 171 | }; | ||
| 172 | |||
| 173 | static struct omap_i2c_dev_attr i2c_dev_attr = { | ||
| 174 | diff --git a/arch/arm/mach-omap2/omap_hwmod_2430_data.c b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 175 | index 405688a..16743c7 100644 | ||
| 176 | --- a/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 177 | +++ b/arch/arm/mach-omap2/omap_hwmod_2430_data.c | ||
| 178 | @@ -1079,6 +1079,7 @@ static struct omap_hwmod_class i2c_class = { | ||
| 179 | .name = "i2c", | ||
| 180 | .sysc = &i2c_sysc, | ||
| 181 | .rev = OMAP_I2C_IP_VERSION_1, | ||
| 182 | + .reset = &omap_i2c_reset, | ||
| 183 | }; | ||
| 184 | |||
| 185 | static struct omap_i2c_dev_attr i2c_dev_attr = { | ||
| 186 | diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 187 | index c704ac8..25bf43b 100644 | ||
| 188 | --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 189 | +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 190 | @@ -1306,9 +1306,10 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = { | ||
| 191 | }; | ||
| 192 | |||
| 193 | static struct omap_hwmod_class i2c_class = { | ||
| 194 | - .name = "i2c", | ||
| 195 | - .sysc = &i2c_sysc, | ||
| 196 | - .rev = OMAP_I2C_IP_VERSION_1, | ||
| 197 | + .name = "i2c", | ||
| 198 | + .sysc = &i2c_sysc, | ||
| 199 | + .rev = OMAP_I2C_IP_VERSION_1, | ||
| 200 | + .reset = &omap_i2c_reset, | ||
| 201 | }; | ||
| 202 | |||
| 203 | static struct omap_hwmod_dma_info omap3xxx_dss_sdma_chs[] = { | ||
| 204 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 205 | index 55331df..5d5df49 100644 | ||
| 206 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 207 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 208 | @@ -22,6 +22,7 @@ | ||
| 209 | |||
| 210 | #include <plat/omap_hwmod.h> | ||
| 211 | #include <plat/cpu.h> | ||
| 212 | +#include <plat/i2c.h> | ||
| 213 | #include <plat/gpio.h> | ||
| 214 | #include <plat/dma.h> | ||
| 215 | #include <plat/mcspi.h> | ||
| 216 | @@ -2162,6 +2163,7 @@ static struct omap_hwmod_class omap44xx_i2c_hwmod_class = { | ||
| 217 | .name = "i2c", | ||
| 218 | .sysc = &omap44xx_i2c_sysc, | ||
| 219 | .rev = OMAP_I2C_IP_VERSION_2, | ||
| 220 | + .reset = &omap_i2c_reset, | ||
| 221 | }; | ||
| 222 | |||
| 223 | static struct omap_i2c_dev_attr i2c_dev_attr = { | ||
| 224 | @@ -2207,7 +2209,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { | ||
| 225 | static struct omap_hwmod omap44xx_i2c1_hwmod = { | ||
| 226 | .name = "i2c1", | ||
| 227 | .class = &omap44xx_i2c_hwmod_class, | ||
| 228 | - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, | ||
| 229 | + .flags = HWMOD_16BIT_REG, | ||
| 230 | .mpu_irqs = omap44xx_i2c1_irqs, | ||
| 231 | .sdma_reqs = omap44xx_i2c1_sdma_reqs, | ||
| 232 | .main_clk = "i2c1_fck", | ||
| 233 | @@ -2261,7 +2263,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { | ||
| 234 | static struct omap_hwmod omap44xx_i2c2_hwmod = { | ||
| 235 | .name = "i2c2", | ||
| 236 | .class = &omap44xx_i2c_hwmod_class, | ||
| 237 | - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, | ||
| 238 | + .flags = HWMOD_16BIT_REG, | ||
| 239 | .mpu_irqs = omap44xx_i2c2_irqs, | ||
| 240 | .sdma_reqs = omap44xx_i2c2_sdma_reqs, | ||
| 241 | .main_clk = "i2c2_fck", | ||
| 242 | @@ -2315,7 +2317,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { | ||
| 243 | static struct omap_hwmod omap44xx_i2c3_hwmod = { | ||
| 244 | .name = "i2c3", | ||
| 245 | .class = &omap44xx_i2c_hwmod_class, | ||
| 246 | - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, | ||
| 247 | + .flags = HWMOD_16BIT_REG, | ||
| 248 | .mpu_irqs = omap44xx_i2c3_irqs, | ||
| 249 | .sdma_reqs = omap44xx_i2c3_sdma_reqs, | ||
| 250 | .main_clk = "i2c3_fck", | ||
| 251 | @@ -2369,7 +2371,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { | ||
| 252 | static struct omap_hwmod omap44xx_i2c4_hwmod = { | ||
| 253 | .name = "i2c4", | ||
| 254 | .class = &omap44xx_i2c_hwmod_class, | ||
| 255 | - .flags = HWMOD_16BIT_REG | HWMOD_INIT_NO_RESET, | ||
| 256 | + .flags = HWMOD_16BIT_REG, | ||
| 257 | .mpu_irqs = omap44xx_i2c4_irqs, | ||
| 258 | .sdma_reqs = omap44xx_i2c4_sdma_reqs, | ||
| 259 | .main_clk = "i2c4_fck", | ||
| 260 | diff --git a/arch/arm/plat-omap/include/plat/i2c.h b/arch/arm/plat-omap/include/plat/i2c.h | ||
| 261 | index fd75dad..7c22b9e 100644 | ||
| 262 | --- a/arch/arm/plat-omap/include/plat/i2c.h | ||
| 263 | +++ b/arch/arm/plat-omap/include/plat/i2c.h | ||
| 264 | @@ -53,4 +53,7 @@ struct omap_i2c_dev_attr { | ||
| 265 | void __init omap1_i2c_mux_pins(int bus_id); | ||
| 266 | void __init omap2_i2c_mux_pins(int bus_id); | ||
| 267 | |||
| 268 | +struct omap_hwmod; | ||
| 269 | +int omap_i2c_reset(struct omap_hwmod *oh); | ||
| 270 | + | ||
| 271 | #endif /* __ASM__ARCH_OMAP_I2C_H */ | ||
| 272 | diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 273 | index ce06ac6..fafdfe3 100644 | ||
| 274 | --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 275 | +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 276 | @@ -566,6 +566,7 @@ void omap_hwmod_ocp_barrier(struct omap_hwmod *oh); | ||
| 277 | |||
| 278 | void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs); | ||
| 279 | u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs); | ||
| 280 | +int omap_hwmod_softreset(struct omap_hwmod *oh); | ||
| 281 | |||
| 282 | int omap_hwmod_count_resources(struct omap_hwmod *oh); | ||
| 283 | int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res); | ||
| 284 | -- | ||
| 285 | 1.7.2.5 | ||
| 286 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0075-OMAP-omap_device-Create-clkdev-entry-for-hwmod-main_.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0075-OMAP-omap_device-Create-clkdev-entry-for-hwmod-main_.patch deleted file mode 100644 index 43a50a05..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0075-OMAP-omap_device-Create-clkdev-entry-for-hwmod-main_.patch +++ /dev/null | |||
| @@ -1,437 +0,0 @@ | |||
| 1 | From e56d203975458c6e21c5e63711e2c34b36dc9678 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:54:12 -0600 | ||
| 4 | Subject: [PATCH 075/149] OMAP: omap_device: Create clkdev entry for hwmod main_clk | ||
| 5 | |||
| 6 | Extend the existing function to create clkdev for every optional | ||
| 7 | clocks to add a well one "fck" alias for the main_clk of the | ||
| 8 | omap_hwmod. | ||
| 9 | It will allow to remove these static clkdev entries from the | ||
| 10 | clockXXX_data.c file. | ||
| 11 | |||
| 12 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 13 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 14 | Cc: Kevin Hilman <khilman@ti.com> | ||
| 15 | Cc: Todd Poynor <toddpoynor@google.com> | ||
| 16 | [paul@pwsan.com: remove all of the "fck" role clkdev aliases from the | ||
| 17 | clock data files; fixed error message] | ||
| 18 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 19 | --- | ||
| 20 | arch/arm/mach-omap2/clock2420_data.c | 22 ++++---- | ||
| 21 | arch/arm/mach-omap2/clock2430_data.c | 32 ++++++------ | ||
| 22 | arch/arm/mach-omap2/clock3xxx_data.c | 44 +++++++++--------- | ||
| 23 | arch/arm/mach-omap2/clock44xx_data.c | 38 ++++++++-------- | ||
| 24 | arch/arm/plat-omap/omap_device.c | 85 ++++++++++++++++++++-------------- | ||
| 25 | 5 files changed, 118 insertions(+), 103 deletions(-) | ||
| 26 | |||
| 27 | diff --git a/arch/arm/mach-omap2/clock2420_data.c b/arch/arm/mach-omap2/clock2420_data.c | ||
| 28 | index 2926d02..debc040 100644 | ||
| 29 | --- a/arch/arm/mach-omap2/clock2420_data.c | ||
| 30 | +++ b/arch/arm/mach-omap2/clock2420_data.c | ||
| 31 | @@ -1805,9 +1805,9 @@ static struct omap_clk omap2420_clks[] = { | ||
| 32 | CLK(NULL, "gfx_ick", &gfx_ick, CK_242X), | ||
| 33 | /* DSS domain clocks */ | ||
| 34 | CLK("omapdss_dss", "ick", &dss_ick, CK_242X), | ||
| 35 | - CLK("omapdss_dss", "fck", &dss1_fck, CK_242X), | ||
| 36 | - CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_242X), | ||
| 37 | - CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_242X), | ||
| 38 | + CLK(NULL, "dss1_fck", &dss1_fck, CK_242X), | ||
| 39 | + CLK(NULL, "dss2_fck", &dss2_fck, CK_242X), | ||
| 40 | + CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_242X), | ||
| 41 | /* L3 domain clocks */ | ||
| 42 | CLK(NULL, "core_l3_ck", &core_l3_ck, CK_242X), | ||
| 43 | CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_242X), | ||
| 44 | @@ -1844,13 +1844,13 @@ static struct omap_clk omap2420_clks[] = { | ||
| 45 | CLK(NULL, "gpt12_ick", &gpt12_ick, CK_242X), | ||
| 46 | CLK(NULL, "gpt12_fck", &gpt12_fck, CK_242X), | ||
| 47 | CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_242X), | ||
| 48 | - CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_242X), | ||
| 49 | + CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_242X), | ||
| 50 | CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_242X), | ||
| 51 | - CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_242X), | ||
| 52 | + CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_242X), | ||
| 53 | CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_242X), | ||
| 54 | - CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_242X), | ||
| 55 | + CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_242X), | ||
| 56 | CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_242X), | ||
| 57 | - CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_242X), | ||
| 58 | + CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_242X), | ||
| 59 | CLK(NULL, "uart1_ick", &uart1_ick, CK_242X), | ||
| 60 | CLK(NULL, "uart1_fck", &uart1_fck, CK_242X), | ||
| 61 | CLK(NULL, "uart2_ick", &uart2_ick, CK_242X), | ||
| 62 | @@ -1860,7 +1860,7 @@ static struct omap_clk omap2420_clks[] = { | ||
| 63 | CLK(NULL, "gpios_ick", &gpios_ick, CK_242X), | ||
| 64 | CLK(NULL, "gpios_fck", &gpios_fck, CK_242X), | ||
| 65 | CLK("omap_wdt", "ick", &mpu_wdt_ick, CK_242X), | ||
| 66 | - CLK("omap_wdt", "fck", &mpu_wdt_fck, CK_242X), | ||
| 67 | + CLK(NULL, "mpu_wdt_fck", &mpu_wdt_fck, CK_242X), | ||
| 68 | CLK(NULL, "sync_32k_ick", &sync_32k_ick, CK_242X), | ||
| 69 | CLK(NULL, "wdt1_ick", &wdt1_ick, CK_242X), | ||
| 70 | CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_242X), | ||
| 71 | @@ -1880,11 +1880,11 @@ static struct omap_clk omap2420_clks[] = { | ||
| 72 | CLK(NULL, "eac_ick", &eac_ick, CK_242X), | ||
| 73 | CLK(NULL, "eac_fck", &eac_fck, CK_242X), | ||
| 74 | CLK("omap_hdq.0", "ick", &hdq_ick, CK_242X), | ||
| 75 | - CLK("omap_hdq.1", "fck", &hdq_fck, CK_242X), | ||
| 76 | + CLK("omap_hdq.0", "fck", &hdq_fck, CK_242X), | ||
| 77 | CLK("omap_i2c.1", "ick", &i2c1_ick, CK_242X), | ||
| 78 | - CLK("omap_i2c.1", "fck", &i2c1_fck, CK_242X), | ||
| 79 | + CLK(NULL, "i2c1_fck", &i2c1_fck, CK_242X), | ||
| 80 | CLK("omap_i2c.2", "ick", &i2c2_ick, CK_242X), | ||
| 81 | - CLK("omap_i2c.2", "fck", &i2c2_fck, CK_242X), | ||
| 82 | + CLK(NULL, "i2c2_fck", &i2c2_fck, CK_242X), | ||
| 83 | CLK(NULL, "gpmc_fck", &gpmc_fck, CK_242X), | ||
| 84 | CLK(NULL, "sdma_fck", &sdma_fck, CK_242X), | ||
| 85 | CLK(NULL, "sdma_ick", &sdma_ick, CK_242X), | ||
| 86 | diff --git a/arch/arm/mach-omap2/clock2430_data.c b/arch/arm/mach-omap2/clock2430_data.c | ||
| 87 | index 0c79d39..96a942e 100644 | ||
| 88 | --- a/arch/arm/mach-omap2/clock2430_data.c | ||
| 89 | +++ b/arch/arm/mach-omap2/clock2430_data.c | ||
| 90 | @@ -1895,9 +1895,9 @@ static struct omap_clk omap2430_clks[] = { | ||
| 91 | CLK(NULL, "mdm_osc_ck", &mdm_osc_ck, CK_243X), | ||
| 92 | /* DSS domain clocks */ | ||
| 93 | CLK("omapdss_dss", "ick", &dss_ick, CK_243X), | ||
| 94 | - CLK("omapdss_dss", "fck", &dss1_fck, CK_243X), | ||
| 95 | - CLK("omapdss_dss", "sys_clk", &dss2_fck, CK_243X), | ||
| 96 | - CLK("omapdss_dss", "tv_clk", &dss_54m_fck, CK_243X), | ||
| 97 | + CLK(NULL, "dss1_fck", &dss1_fck, CK_243X), | ||
| 98 | + CLK(NULL, "dss2_fck", &dss2_fck, CK_243X), | ||
| 99 | + CLK(NULL, "dss_54m_fck", &dss_54m_fck, CK_243X), | ||
| 100 | /* L3 domain clocks */ | ||
| 101 | CLK(NULL, "core_l3_ck", &core_l3_ck, CK_243X), | ||
| 102 | CLK(NULL, "ssi_fck", &ssi_ssr_sst_fck, CK_243X), | ||
| 103 | @@ -1934,21 +1934,21 @@ static struct omap_clk omap2430_clks[] = { | ||
| 104 | CLK(NULL, "gpt12_ick", &gpt12_ick, CK_243X), | ||
| 105 | CLK(NULL, "gpt12_fck", &gpt12_fck, CK_243X), | ||
| 106 | CLK("omap-mcbsp.1", "ick", &mcbsp1_ick, CK_243X), | ||
| 107 | - CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_243X), | ||
| 108 | + CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_243X), | ||
| 109 | CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_243X), | ||
| 110 | - CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_243X), | ||
| 111 | + CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_243X), | ||
| 112 | CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_243X), | ||
| 113 | - CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_243X), | ||
| 114 | + CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_243X), | ||
| 115 | CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_243X), | ||
| 116 | - CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_243X), | ||
| 117 | + CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_243X), | ||
| 118 | CLK("omap-mcbsp.5", "ick", &mcbsp5_ick, CK_243X), | ||
| 119 | - CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_243X), | ||
| 120 | + CLK(NULL, "mcbsp5_fck", &mcbsp5_fck, CK_243X), | ||
| 121 | CLK("omap2_mcspi.1", "ick", &mcspi1_ick, CK_243X), | ||
| 122 | - CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_243X), | ||
| 123 | + CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_243X), | ||
| 124 | CLK("omap2_mcspi.2", "ick", &mcspi2_ick, CK_243X), | ||
| 125 | - CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_243X), | ||
| 126 | + CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_243X), | ||
| 127 | CLK("omap2_mcspi.3", "ick", &mcspi3_ick, CK_243X), | ||
| 128 | - CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_243X), | ||
| 129 | + CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_243X), | ||
| 130 | CLK(NULL, "uart1_ick", &uart1_ick, CK_243X), | ||
| 131 | CLK(NULL, "uart1_fck", &uart1_fck, CK_243X), | ||
| 132 | CLK(NULL, "uart2_ick", &uart2_ick, CK_243X), | ||
| 133 | @@ -1958,7 +1958,7 @@ static struct omap_clk omap2430_clks[] = { | ||
| 134 | CLK(NULL, "gpios_ick", &gpios_ick, CK_243X), | ||
| 135 | CLK(NULL, "gpios_fck", &gpios_fck, CK_243X), | ||
| 136 | CLK("omap_wdt", "ick", &mpu_wdt_ick, CK_243X), | ||
| 137 | - CLK("omap_wdt", "fck", &mpu_wdt_fck, CK_243X), | ||
| 138 | + CLK(NULL, "mpu_wdt_fck", &mpu_wdt_fck, CK_243X), | ||
| 139 | CLK(NULL, "sync_32k_ick", &sync_32k_ick, CK_243X), | ||
| 140 | CLK(NULL, "wdt1_ick", &wdt1_ick, CK_243X), | ||
| 141 | CLK(NULL, "omapctrl_ick", &omapctrl_ick, CK_243X), | ||
| 142 | @@ -1975,9 +1975,9 @@ static struct omap_clk omap2430_clks[] = { | ||
| 143 | CLK("omap_hdq.0", "ick", &hdq_ick, CK_243X), | ||
| 144 | CLK("omap_hdq.1", "fck", &hdq_fck, CK_243X), | ||
| 145 | CLK("omap_i2c.1", "ick", &i2c1_ick, CK_243X), | ||
| 146 | - CLK("omap_i2c.1", "fck", &i2chs1_fck, CK_243X), | ||
| 147 | + CLK(NULL, "i2chs1_fck", &i2chs1_fck, CK_243X), | ||
| 148 | CLK("omap_i2c.2", "ick", &i2c2_ick, CK_243X), | ||
| 149 | - CLK("omap_i2c.2", "fck", &i2chs2_fck, CK_243X), | ||
| 150 | + CLK(NULL, "i2chs2_fck", &i2chs2_fck, CK_243X), | ||
| 151 | CLK(NULL, "gpmc_fck", &gpmc_fck, CK_243X), | ||
| 152 | CLK(NULL, "sdma_fck", &sdma_fck, CK_243X), | ||
| 153 | CLK(NULL, "sdma_ick", &sdma_ick, CK_243X), | ||
| 154 | @@ -1990,9 +1990,9 @@ static struct omap_clk omap2430_clks[] = { | ||
| 155 | CLK(NULL, "usb_fck", &usb_fck, CK_243X), | ||
| 156 | CLK("musb-omap2430", "ick", &usbhs_ick, CK_243X), | ||
| 157 | CLK("omap_hsmmc.0", "ick", &mmchs1_ick, CK_243X), | ||
| 158 | - CLK("omap_hsmmc.0", "fck", &mmchs1_fck, CK_243X), | ||
| 159 | + CLK(NULL, "mmchs1_fck", &mmchs1_fck, CK_243X), | ||
| 160 | CLK("omap_hsmmc.1", "ick", &mmchs2_ick, CK_243X), | ||
| 161 | - CLK("omap_hsmmc.1", "fck", &mmchs2_fck, CK_243X), | ||
| 162 | + CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_243X), | ||
| 163 | CLK(NULL, "gpio5_ick", &gpio5_ick, CK_243X), | ||
| 164 | CLK(NULL, "gpio5_fck", &gpio5_fck, CK_243X), | ||
| 165 | CLK(NULL, "mdm_intc_ick", &mdm_intc_ick, CK_243X), | ||
| 166 | diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c | ||
| 167 | index 75b119b..ffd55b1 100644 | ||
| 168 | --- a/arch/arm/mach-omap2/clock3xxx_data.c | ||
| 169 | +++ b/arch/arm/mach-omap2/clock3xxx_data.c | ||
| 170 | @@ -3289,25 +3289,25 @@ static struct omap_clk omap3xxx_clks[] = { | ||
| 171 | CLK("omap-mcbsp.1", "prcm_fck", &core_96m_fck, CK_3XXX), | ||
| 172 | CLK("omap-mcbsp.5", "prcm_fck", &core_96m_fck, CK_3XXX), | ||
| 173 | CLK(NULL, "core_96m_fck", &core_96m_fck, CK_3XXX), | ||
| 174 | - CLK("omap_hsmmc.2", "fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | ||
| 175 | - CLK("omap_hsmmc.1", "fck", &mmchs2_fck, CK_3XXX), | ||
| 176 | + CLK(NULL, "mmchs3_fck", &mmchs3_fck, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | ||
| 177 | + CLK(NULL, "mmchs2_fck", &mmchs2_fck, CK_3XXX), | ||
| 178 | CLK(NULL, "mspro_fck", &mspro_fck, CK_34XX | CK_36XX), | ||
| 179 | - CLK("omap_hsmmc.0", "fck", &mmchs1_fck, CK_3XXX), | ||
| 180 | - CLK("omap_i2c.3", "fck", &i2c3_fck, CK_3XXX), | ||
| 181 | - CLK("omap_i2c.2", "fck", &i2c2_fck, CK_3XXX), | ||
| 182 | - CLK("omap_i2c.1", "fck", &i2c1_fck, CK_3XXX), | ||
| 183 | - CLK("omap-mcbsp.5", "fck", &mcbsp5_fck, CK_3XXX), | ||
| 184 | - CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_3XXX), | ||
| 185 | + CLK(NULL, "mmchs1_fck", &mmchs1_fck, CK_3XXX), | ||
| 186 | + CLK(NULL, "i2c3_fck", &i2c3_fck, CK_3XXX), | ||
| 187 | + CLK(NULL, "i2c2_fck", &i2c2_fck, CK_3XXX), | ||
| 188 | + CLK(NULL, "i2c1_fck", &i2c1_fck, CK_3XXX), | ||
| 189 | + CLK(NULL, "mcbsp5_fck", &mcbsp5_fck, CK_3XXX), | ||
| 190 | + CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_3XXX), | ||
| 191 | CLK(NULL, "core_48m_fck", &core_48m_fck, CK_3XXX), | ||
| 192 | - CLK("omap2_mcspi.4", "fck", &mcspi4_fck, CK_3XXX), | ||
| 193 | - CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_3XXX), | ||
| 194 | - CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_3XXX), | ||
| 195 | - CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_3XXX), | ||
| 196 | + CLK(NULL, "mcspi4_fck", &mcspi4_fck, CK_3XXX), | ||
| 197 | + CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_3XXX), | ||
| 198 | + CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_3XXX), | ||
| 199 | + CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_3XXX), | ||
| 200 | CLK(NULL, "uart2_fck", &uart2_fck, CK_3XXX), | ||
| 201 | CLK(NULL, "uart1_fck", &uart1_fck, CK_3XXX), | ||
| 202 | CLK(NULL, "fshostusb_fck", &fshostusb_fck, CK_3430ES1), | ||
| 203 | CLK(NULL, "core_12m_fck", &core_12m_fck, CK_3XXX), | ||
| 204 | - CLK("omap_hdq.0", "fck", &hdq_fck, CK_3XXX), | ||
| 205 | + CLK("omap_hdq.0", "fck", &hdq_fck, CK_3XXX), | ||
| 206 | CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es1, CK_3430ES1), | ||
| 207 | CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es2, CK_3430ES2PLUS | CK_36XX), | ||
| 208 | CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es1, CK_3430ES1), | ||
| 209 | @@ -3356,11 +3356,11 @@ static struct omap_clk omap3xxx_clks[] = { | ||
| 210 | CLK("omap_rng", "ick", &rng_ick, CK_34XX | CK_36XX), | ||
| 211 | CLK(NULL, "sha11_ick", &sha11_ick, CK_34XX | CK_36XX), | ||
| 212 | CLK(NULL, "des1_ick", &des1_ick, CK_34XX | CK_36XX), | ||
| 213 | - CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es1, CK_3430ES1), | ||
| 214 | - CLK("omapdss_dss", "fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | ||
| 215 | - CLK("omapdss_dss", "tv_clk", &dss_tv_fck, CK_3XXX), | ||
| 216 | - CLK("omapdss_dss", "video_clk", &dss_96m_fck, CK_3XXX), | ||
| 217 | - CLK("omapdss_dss", "sys_clk", &dss2_alwon_fck, CK_3XXX), | ||
| 218 | + CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck_3430es1, CK_3430ES1), | ||
| 219 | + CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | ||
| 220 | + CLK(NULL, "dss_tv_fck", &dss_tv_fck, CK_3XXX), | ||
| 221 | + CLK(NULL, "dss_96m_fck", &dss_96m_fck, CK_3XXX), | ||
| 222 | + CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck, CK_3XXX), | ||
| 223 | CLK("omapdss_dss", "ick", &dss_ick_3430es1, CK_3430ES1), | ||
| 224 | CLK("omapdss_dss", "ick", &dss_ick_3430es2, CK_3430ES2PLUS | CK_AM35XX | CK_36XX), | ||
| 225 | CLK(NULL, "cam_mclk", &cam_mclk, CK_34XX | CK_36XX), | ||
| 226 | @@ -3385,7 +3385,7 @@ static struct omap_clk omap3xxx_clks[] = { | ||
| 227 | CLK(NULL, "gpt1_fck", &gpt1_fck, CK_3XXX), | ||
| 228 | CLK(NULL, "wkup_32k_fck", &wkup_32k_fck, CK_3XXX), | ||
| 229 | CLK(NULL, "gpio1_dbck", &gpio1_dbck, CK_3XXX), | ||
| 230 | - CLK("omap_wdt", "fck", &wdt2_fck, CK_3XXX), | ||
| 231 | + CLK(NULL, "wdt2_fck", &wdt2_fck, CK_3XXX), | ||
| 232 | CLK(NULL, "wkup_l4_ick", &wkup_l4_ick, CK_34XX | CK_36XX), | ||
| 233 | CLK(NULL, "usim_ick", &usim_ick, CK_3430ES2PLUS | CK_36XX), | ||
| 234 | CLK("omap_wdt", "ick", &wdt2_ick, CK_3XXX), | ||
| 235 | @@ -3436,9 +3436,9 @@ static struct omap_clk omap3xxx_clks[] = { | ||
| 236 | CLK("omap-mcbsp.2", "ick", &mcbsp2_ick, CK_3XXX), | ||
| 237 | CLK("omap-mcbsp.3", "ick", &mcbsp3_ick, CK_3XXX), | ||
| 238 | CLK("omap-mcbsp.4", "ick", &mcbsp4_ick, CK_3XXX), | ||
| 239 | - CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_3XXX), | ||
| 240 | - CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_3XXX), | ||
| 241 | - CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_3XXX), | ||
| 242 | + CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_3XXX), | ||
| 243 | + CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_3XXX), | ||
| 244 | + CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_3XXX), | ||
| 245 | CLK("etb", "emu_src_ck", &emu_src_ck, CK_3XXX), | ||
| 246 | CLK(NULL, "pclk_fck", &pclk_fck, CK_3XXX), | ||
| 247 | CLK(NULL, "pclkx2_fck", &pclkx2_fck, CK_3XXX), | ||
| 248 | diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 249 | index 2578820..763507f 100644 | ||
| 250 | --- a/arch/arm/mach-omap2/clock44xx_data.c | ||
| 251 | +++ b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 252 | @@ -3057,12 +3057,12 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 253 | CLK(NULL, "gpio6_ick", &gpio6_ick, CK_443X), | ||
| 254 | CLK(NULL, "gpmc_ick", &gpmc_ick, CK_443X), | ||
| 255 | CLK(NULL, "gpu_fck", &gpu_fck, CK_443X), | ||
| 256 | - CLK("omap2_hdq.0", "fck", &hdq1w_fck, CK_443X), | ||
| 257 | + CLK(NULL, "hdq1w_fck", &hdq1w_fck, CK_443X), | ||
| 258 | CLK(NULL, "hsi_fck", &hsi_fck, CK_443X), | ||
| 259 | - CLK("omap_i2c.1", "fck", &i2c1_fck, CK_443X), | ||
| 260 | - CLK("omap_i2c.2", "fck", &i2c2_fck, CK_443X), | ||
| 261 | - CLK("omap_i2c.3", "fck", &i2c3_fck, CK_443X), | ||
| 262 | - CLK("omap_i2c.4", "fck", &i2c4_fck, CK_443X), | ||
| 263 | + CLK(NULL, "i2c1_fck", &i2c1_fck, CK_443X), | ||
| 264 | + CLK(NULL, "i2c2_fck", &i2c2_fck, CK_443X), | ||
| 265 | + CLK(NULL, "i2c3_fck", &i2c3_fck, CK_443X), | ||
| 266 | + CLK(NULL, "i2c4_fck", &i2c4_fck, CK_443X), | ||
| 267 | CLK(NULL, "ipu_fck", &ipu_fck, CK_443X), | ||
| 268 | CLK(NULL, "iss_ctrlclk", &iss_ctrlclk, CK_443X), | ||
| 269 | CLK(NULL, "iss_fck", &iss_fck, CK_443X), | ||
| 270 | @@ -3073,23 +3073,23 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 271 | CLK(NULL, "mcasp_sync_mux_ck", &mcasp_sync_mux_ck, CK_443X), | ||
| 272 | CLK(NULL, "mcasp_fck", &mcasp_fck, CK_443X), | ||
| 273 | CLK(NULL, "mcbsp1_sync_mux_ck", &mcbsp1_sync_mux_ck, CK_443X), | ||
| 274 | - CLK("omap-mcbsp.1", "fck", &mcbsp1_fck, CK_443X), | ||
| 275 | + CLK(NULL, "mcbsp1_fck", &mcbsp1_fck, CK_443X), | ||
| 276 | CLK(NULL, "mcbsp2_sync_mux_ck", &mcbsp2_sync_mux_ck, CK_443X), | ||
| 277 | - CLK("omap-mcbsp.2", "fck", &mcbsp2_fck, CK_443X), | ||
| 278 | + CLK(NULL, "mcbsp2_fck", &mcbsp2_fck, CK_443X), | ||
| 279 | CLK(NULL, "mcbsp3_sync_mux_ck", &mcbsp3_sync_mux_ck, CK_443X), | ||
| 280 | - CLK("omap-mcbsp.3", "fck", &mcbsp3_fck, CK_443X), | ||
| 281 | + CLK(NULL, "mcbsp3_fck", &mcbsp3_fck, CK_443X), | ||
| 282 | CLK(NULL, "mcbsp4_sync_mux_ck", &mcbsp4_sync_mux_ck, CK_443X), | ||
| 283 | - CLK("omap-mcbsp.4", "fck", &mcbsp4_fck, CK_443X), | ||
| 284 | + CLK(NULL, "mcbsp4_fck", &mcbsp4_fck, CK_443X), | ||
| 285 | CLK(NULL, "mcpdm_fck", &mcpdm_fck, CK_443X), | ||
| 286 | - CLK("omap2_mcspi.1", "fck", &mcspi1_fck, CK_443X), | ||
| 287 | - CLK("omap2_mcspi.2", "fck", &mcspi2_fck, CK_443X), | ||
| 288 | - CLK("omap2_mcspi.3", "fck", &mcspi3_fck, CK_443X), | ||
| 289 | - CLK("omap2_mcspi.4", "fck", &mcspi4_fck, CK_443X), | ||
| 290 | - CLK("omap_hsmmc.0", "fck", &mmc1_fck, CK_443X), | ||
| 291 | - CLK("omap_hsmmc.1", "fck", &mmc2_fck, CK_443X), | ||
| 292 | - CLK("omap_hsmmc.2", "fck", &mmc3_fck, CK_443X), | ||
| 293 | - CLK("omap_hsmmc.3", "fck", &mmc4_fck, CK_443X), | ||
| 294 | - CLK("omap_hsmmc.4", "fck", &mmc5_fck, CK_443X), | ||
| 295 | + CLK(NULL, "mcspi1_fck", &mcspi1_fck, CK_443X), | ||
| 296 | + CLK(NULL, "mcspi2_fck", &mcspi2_fck, CK_443X), | ||
| 297 | + CLK(NULL, "mcspi3_fck", &mcspi3_fck, CK_443X), | ||
| 298 | + CLK(NULL, "mcspi4_fck", &mcspi4_fck, CK_443X), | ||
| 299 | + CLK(NULL, "mmc1_fck", &mmc1_fck, CK_443X), | ||
| 300 | + CLK(NULL, "mmc2_fck", &mmc2_fck, CK_443X), | ||
| 301 | + CLK(NULL, "mmc3_fck", &mmc3_fck, CK_443X), | ||
| 302 | + CLK(NULL, "mmc4_fck", &mmc4_fck, CK_443X), | ||
| 303 | + CLK(NULL, "mmc5_fck", &mmc5_fck, CK_443X), | ||
| 304 | CLK(NULL, "ocp2scp_usb_phy_phy_48m", &ocp2scp_usb_phy_phy_48m, CK_443X), | ||
| 305 | CLK(NULL, "ocp2scp_usb_phy_ick", &ocp2scp_usb_phy_ick, CK_443X), | ||
| 306 | CLK(NULL, "ocp_wp_noc_ick", &ocp_wp_noc_ick, CK_443X), | ||
| 307 | @@ -3146,7 +3146,7 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 308 | CLK(NULL, "usim_ck", &usim_ck, CK_443X), | ||
| 309 | CLK(NULL, "usim_fclk", &usim_fclk, CK_443X), | ||
| 310 | CLK(NULL, "usim_fck", &usim_fck, CK_443X), | ||
| 311 | - CLK("omap_wdt", "fck", &wd_timer2_fck, CK_443X), | ||
| 312 | + CLK(NULL, "wd_timer2_fck", &wd_timer2_fck, CK_443X), | ||
| 313 | CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X), | ||
| 314 | CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X), | ||
| 315 | CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X), | ||
| 316 | diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c | ||
| 317 | index c8b9cd1..be45147 100644 | ||
| 318 | --- a/arch/arm/plat-omap/omap_device.c | ||
| 319 | +++ b/arch/arm/plat-omap/omap_device.c | ||
| 320 | @@ -236,56 +236,71 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) | ||
| 321 | return 0; | ||
| 322 | } | ||
| 323 | |||
| 324 | +static void _add_clkdev(struct omap_device *od, const char *clk_alias, | ||
| 325 | + const char *clk_name) | ||
| 326 | +{ | ||
| 327 | + struct clk *r; | ||
| 328 | + struct clk_lookup *l; | ||
| 329 | + | ||
| 330 | + if (!clk_alias || !clk_name) | ||
| 331 | + return; | ||
| 332 | + | ||
| 333 | + pr_debug("omap_device: %s: Creating %s -> %s\n", | ||
| 334 | + dev_name(&od->pdev.dev), clk_alias, clk_name); | ||
| 335 | + | ||
| 336 | + r = clk_get_sys(dev_name(&od->pdev.dev), clk_alias); | ||
| 337 | + if (!IS_ERR(r)) { | ||
| 338 | + pr_warning("omap_device: %s: alias %s already exists\n", | ||
| 339 | + dev_name(&od->pdev.dev), clk_alias); | ||
| 340 | + clk_put(r); | ||
| 341 | + return; | ||
| 342 | + } | ||
| 343 | + | ||
| 344 | + r = omap_clk_get_by_name(clk_name); | ||
| 345 | + if (IS_ERR(r)) { | ||
| 346 | + pr_err("omap_device: %s: omap_clk_get_by_name for %s failed\n", | ||
| 347 | + dev_name(&od->pdev.dev), clk_name); | ||
| 348 | + return; | ||
| 349 | + } | ||
| 350 | + | ||
| 351 | + l = clkdev_alloc(r, clk_alias, dev_name(&od->pdev.dev)); | ||
| 352 | + if (!l) { | ||
| 353 | + pr_err("omap_device: %s: clkdev_alloc for %s failed\n", | ||
| 354 | + dev_name(&od->pdev.dev), clk_alias); | ||
| 355 | + return; | ||
| 356 | + } | ||
| 357 | + | ||
| 358 | + clkdev_add(l); | ||
| 359 | +} | ||
| 360 | + | ||
| 361 | /** | ||
| 362 | - * _add_optional_clock_clkdev - Add clkdev entry for hwmod optional clocks | ||
| 363 | + * _add_hwmod_clocks_clkdev - Add clkdev entry for hwmod optional clocks | ||
| 364 | + * and main clock | ||
| 365 | * @od: struct omap_device *od | ||
| 366 | + * @oh: struct omap_hwmod *oh | ||
| 367 | * | ||
| 368 | - * For every optional clock present per hwmod per omap_device, this function | ||
| 369 | - * adds an entry in the clkdev table of the form <dev-id=dev_name, con-id=role> | ||
| 370 | - * if it does not exist already. | ||
| 371 | + * For the main clock and every optional clock present per hwmod per | ||
| 372 | + * omap_device, this function adds an entry in the clkdev table of the | ||
| 373 | + * form <dev-id=dev_name, con-id=role> if it does not exist already. | ||
| 374 | * | ||
| 375 | * The function is called from inside omap_device_build_ss(), after | ||
| 376 | * omap_device_register. | ||
| 377 | * | ||
| 378 | * This allows drivers to get a pointer to its optional clocks based on its role | ||
| 379 | * by calling clk_get(<dev*>, <role>). | ||
| 380 | + * In the case of the main clock, a "fck" alias is used. | ||
| 381 | * | ||
| 382 | * No return value. | ||
| 383 | */ | ||
| 384 | -static void _add_optional_clock_clkdev(struct omap_device *od, | ||
| 385 | - struct omap_hwmod *oh) | ||
| 386 | +static void _add_hwmod_clocks_clkdev(struct omap_device *od, | ||
| 387 | + struct omap_hwmod *oh) | ||
| 388 | { | ||
| 389 | int i; | ||
| 390 | |||
| 391 | - for (i = 0; i < oh->opt_clks_cnt; i++) { | ||
| 392 | - struct omap_hwmod_opt_clk *oc; | ||
| 393 | - struct clk *r; | ||
| 394 | - struct clk_lookup *l; | ||
| 395 | - | ||
| 396 | - oc = &oh->opt_clks[i]; | ||
| 397 | - | ||
| 398 | - if (!oc->_clk) | ||
| 399 | - continue; | ||
| 400 | - | ||
| 401 | - r = clk_get_sys(dev_name(&od->pdev.dev), oc->role); | ||
| 402 | - if (!IS_ERR(r)) | ||
| 403 | - continue; /* clkdev entry exists */ | ||
| 404 | + _add_clkdev(od, "fck", oh->main_clk); | ||
| 405 | |||
| 406 | - r = omap_clk_get_by_name((char *)oc->clk); | ||
| 407 | - if (IS_ERR(r)) { | ||
| 408 | - pr_err("omap_device: %s: omap_clk_get_by_name for %s failed\n", | ||
| 409 | - dev_name(&od->pdev.dev), oc->clk); | ||
| 410 | - continue; | ||
| 411 | - } | ||
| 412 | - | ||
| 413 | - l = clkdev_alloc(r, oc->role, dev_name(&od->pdev.dev)); | ||
| 414 | - if (!l) { | ||
| 415 | - pr_err("omap_device: %s: clkdev_alloc for %s failed\n", | ||
| 416 | - dev_name(&od->pdev.dev), oc->role); | ||
| 417 | - return; | ||
| 418 | - } | ||
| 419 | - clkdev_add(l); | ||
| 420 | - } | ||
| 421 | + for (i = 0; i < oh->opt_clks_cnt; i++) | ||
| 422 | + _add_clkdev(od, oh->opt_clks[i].role, oh->opt_clks[i].clk); | ||
| 423 | } | ||
| 424 | |||
| 425 | |||
| 426 | @@ -492,7 +507,7 @@ struct omap_device *omap_device_build_ss(const char *pdev_name, int pdev_id, | ||
| 427 | |||
| 428 | for (i = 0; i < oh_cnt; i++) { | ||
| 429 | hwmods[i]->od = od; | ||
| 430 | - _add_optional_clock_clkdev(od, hwmods[i]); | ||
| 431 | + _add_hwmod_clocks_clkdev(od, hwmods[i]); | ||
| 432 | } | ||
| 433 | |||
| 434 | if (ret) | ||
| 435 | -- | ||
| 436 | 1.7.2.5 | ||
| 437 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0076-OMAP4-clock-data-Add-missing-divider-selection-for-a.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0076-OMAP4-clock-data-Add-missing-divider-selection-for-a.patch deleted file mode 100644 index 066cc556..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0076-OMAP4-clock-data-Add-missing-divider-selection-for-a.patch +++ /dev/null | |||
| @@ -1,292 +0,0 @@ | |||
| 1 | From 3e03bae4fc1f9b6e413af3c3e65766913049ffa0 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Rajendra Nayak <rnayak@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:14 -0600 | ||
| 4 | Subject: [PATCH 076/149] OMAP4: clock data: Add missing divider selection for auxclks | ||
| 5 | |||
| 6 | On OMAP4 the auxclk nodes (part of SCRM) support both | ||
| 7 | divider as well as parent selection. | ||
| 8 | Supporting this requires splitting the existing nodes | ||
| 9 | (which support only parent selection) into two nodes, | ||
| 10 | one for parent and another for divider selection. | ||
| 11 | The nodes for parent selection are named auxclk*_src_ck | ||
| 12 | and the ones for divider selection as auxclk*_ck. | ||
| 13 | |||
| 14 | Signed-off-by: Rajendra Nayak <rnayak@ti.com> | ||
| 15 | [b-cousson@ti.com: Rebase on top of clock cleanup | ||
| 16 | and autogen alignement] | ||
| 17 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 18 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 19 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 20 | --- | ||
| 21 | arch/arm/mach-omap2/clock44xx_data.c | 176 +++++++++++++++++++++++++++++----- | ||
| 22 | 1 files changed, 152 insertions(+), 24 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 25 | index 763507f..07bf0de 100644 | ||
| 26 | --- a/arch/arm/mach-omap2/clock44xx_data.c | ||
| 27 | +++ b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 28 | @@ -2774,19 +2774,39 @@ static struct clk trace_clk_div_ck = { | ||
| 29 | |||
| 30 | /* SCRM aux clk nodes */ | ||
| 31 | |||
| 32 | -static const struct clksel auxclk_sel[] = { | ||
| 33 | +static const struct clksel auxclk_src_sel[] = { | ||
| 34 | { .parent = &sys_clkin_ck, .rates = div_1_0_rates }, | ||
| 35 | { .parent = &dpll_core_m3x2_ck, .rates = div_1_1_rates }, | ||
| 36 | { .parent = &dpll_per_m3x2_ck, .rates = div_1_2_rates }, | ||
| 37 | { .parent = NULL }, | ||
| 38 | }; | ||
| 39 | |||
| 40 | -static struct clk auxclk0_ck = { | ||
| 41 | - .name = "auxclk0_ck", | ||
| 42 | +static const struct clksel_rate div16_1to16_rates[] = { | ||
| 43 | + { .div = 1, .val = 0, .flags = RATE_IN_4430 }, | ||
| 44 | + { .div = 2, .val = 1, .flags = RATE_IN_4430 }, | ||
| 45 | + { .div = 3, .val = 2, .flags = RATE_IN_4430 }, | ||
| 46 | + { .div = 4, .val = 3, .flags = RATE_IN_4430 }, | ||
| 47 | + { .div = 5, .val = 4, .flags = RATE_IN_4430 }, | ||
| 48 | + { .div = 6, .val = 5, .flags = RATE_IN_4430 }, | ||
| 49 | + { .div = 7, .val = 6, .flags = RATE_IN_4430 }, | ||
| 50 | + { .div = 8, .val = 7, .flags = RATE_IN_4430 }, | ||
| 51 | + { .div = 9, .val = 8, .flags = RATE_IN_4430 }, | ||
| 52 | + { .div = 10, .val = 9, .flags = RATE_IN_4430 }, | ||
| 53 | + { .div = 11, .val = 10, .flags = RATE_IN_4430 }, | ||
| 54 | + { .div = 12, .val = 11, .flags = RATE_IN_4430 }, | ||
| 55 | + { .div = 13, .val = 12, .flags = RATE_IN_4430 }, | ||
| 56 | + { .div = 14, .val = 13, .flags = RATE_IN_4430 }, | ||
| 57 | + { .div = 15, .val = 14, .flags = RATE_IN_4430 }, | ||
| 58 | + { .div = 16, .val = 15, .flags = RATE_IN_4430 }, | ||
| 59 | + { .div = 0 }, | ||
| 60 | +}; | ||
| 61 | + | ||
| 62 | +static struct clk auxclk0_src_ck = { | ||
| 63 | + .name = "auxclk0_src_ck", | ||
| 64 | .parent = &sys_clkin_ck, | ||
| 65 | .init = &omap2_init_clksel_parent, | ||
| 66 | .ops = &clkops_omap2_dflt, | ||
| 67 | - .clksel = auxclk_sel, | ||
| 68 | + .clksel = auxclk_src_sel, | ||
| 69 | .clksel_reg = OMAP4_SCRM_AUXCLK0, | ||
| 70 | .clksel_mask = OMAP4_SRCSELECT_MASK, | ||
| 71 | .recalc = &omap2_clksel_recalc, | ||
| 72 | @@ -2794,12 +2814,29 @@ static struct clk auxclk0_ck = { | ||
| 73 | .enable_bit = OMAP4_ENABLE_SHIFT, | ||
| 74 | }; | ||
| 75 | |||
| 76 | -static struct clk auxclk1_ck = { | ||
| 77 | - .name = "auxclk1_ck", | ||
| 78 | +static const struct clksel auxclk0_sel[] = { | ||
| 79 | + { .parent = &auxclk0_src_ck, .rates = div16_1to16_rates }, | ||
| 80 | + { .parent = NULL }, | ||
| 81 | +}; | ||
| 82 | + | ||
| 83 | +static struct clk auxclk0_ck = { | ||
| 84 | + .name = "auxclk0_ck", | ||
| 85 | + .parent = &auxclk0_src_ck, | ||
| 86 | + .clksel = auxclk0_sel, | ||
| 87 | + .clksel_reg = OMAP4_SCRM_AUXCLK0, | ||
| 88 | + .clksel_mask = OMAP4_CLKDIV_MASK, | ||
| 89 | + .ops = &clkops_null, | ||
| 90 | + .recalc = &omap2_clksel_recalc, | ||
| 91 | + .round_rate = &omap2_clksel_round_rate, | ||
| 92 | + .set_rate = &omap2_clksel_set_rate, | ||
| 93 | +}; | ||
| 94 | + | ||
| 95 | +static struct clk auxclk1_src_ck = { | ||
| 96 | + .name = "auxclk1_src_ck", | ||
| 97 | .parent = &sys_clkin_ck, | ||
| 98 | .init = &omap2_init_clksel_parent, | ||
| 99 | .ops = &clkops_omap2_dflt, | ||
| 100 | - .clksel = auxclk_sel, | ||
| 101 | + .clksel = auxclk_src_sel, | ||
| 102 | .clksel_reg = OMAP4_SCRM_AUXCLK1, | ||
| 103 | .clksel_mask = OMAP4_SRCSELECT_MASK, | ||
| 104 | .recalc = &omap2_clksel_recalc, | ||
| 105 | @@ -2807,12 +2844,29 @@ static struct clk auxclk1_ck = { | ||
| 106 | .enable_bit = OMAP4_ENABLE_SHIFT, | ||
| 107 | }; | ||
| 108 | |||
| 109 | -static struct clk auxclk2_ck = { | ||
| 110 | - .name = "auxclk2_ck", | ||
| 111 | +static const struct clksel auxclk1_sel[] = { | ||
| 112 | + { .parent = &auxclk1_src_ck, .rates = div16_1to16_rates }, | ||
| 113 | + { .parent = NULL }, | ||
| 114 | +}; | ||
| 115 | + | ||
| 116 | +static struct clk auxclk1_ck = { | ||
| 117 | + .name = "auxclk1_ck", | ||
| 118 | + .parent = &auxclk1_src_ck, | ||
| 119 | + .clksel = auxclk1_sel, | ||
| 120 | + .clksel_reg = OMAP4_SCRM_AUXCLK1, | ||
| 121 | + .clksel_mask = OMAP4_CLKDIV_MASK, | ||
| 122 | + .ops = &clkops_null, | ||
| 123 | + .recalc = &omap2_clksel_recalc, | ||
| 124 | + .round_rate = &omap2_clksel_round_rate, | ||
| 125 | + .set_rate = &omap2_clksel_set_rate, | ||
| 126 | +}; | ||
| 127 | + | ||
| 128 | +static struct clk auxclk2_src_ck = { | ||
| 129 | + .name = "auxclk2_src_ck", | ||
| 130 | .parent = &sys_clkin_ck, | ||
| 131 | .init = &omap2_init_clksel_parent, | ||
| 132 | .ops = &clkops_omap2_dflt, | ||
| 133 | - .clksel = auxclk_sel, | ||
| 134 | + .clksel = auxclk_src_sel, | ||
| 135 | .clksel_reg = OMAP4_SCRM_AUXCLK2, | ||
| 136 | .clksel_mask = OMAP4_SRCSELECT_MASK, | ||
| 137 | .recalc = &omap2_clksel_recalc, | ||
| 138 | @@ -2820,12 +2874,29 @@ static struct clk auxclk2_ck = { | ||
| 139 | .enable_bit = OMAP4_ENABLE_SHIFT, | ||
| 140 | }; | ||
| 141 | |||
| 142 | -static struct clk auxclk3_ck = { | ||
| 143 | - .name = "auxclk3_ck", | ||
| 144 | +static const struct clksel auxclk2_sel[] = { | ||
| 145 | + { .parent = &auxclk2_src_ck, .rates = div16_1to16_rates }, | ||
| 146 | + { .parent = NULL }, | ||
| 147 | +}; | ||
| 148 | + | ||
| 149 | +static struct clk auxclk2_ck = { | ||
| 150 | + .name = "auxclk2_ck", | ||
| 151 | + .parent = &auxclk2_src_ck, | ||
| 152 | + .clksel = auxclk2_sel, | ||
| 153 | + .clksel_reg = OMAP4_SCRM_AUXCLK2, | ||
| 154 | + .clksel_mask = OMAP4_CLKDIV_MASK, | ||
| 155 | + .ops = &clkops_null, | ||
| 156 | + .recalc = &omap2_clksel_recalc, | ||
| 157 | + .round_rate = &omap2_clksel_round_rate, | ||
| 158 | + .set_rate = &omap2_clksel_set_rate, | ||
| 159 | +}; | ||
| 160 | + | ||
| 161 | +static struct clk auxclk3_src_ck = { | ||
| 162 | + .name = "auxclk3_src_ck", | ||
| 163 | .parent = &sys_clkin_ck, | ||
| 164 | .init = &omap2_init_clksel_parent, | ||
| 165 | .ops = &clkops_omap2_dflt, | ||
| 166 | - .clksel = auxclk_sel, | ||
| 167 | + .clksel = auxclk_src_sel, | ||
| 168 | .clksel_reg = OMAP4_SCRM_AUXCLK3, | ||
| 169 | .clksel_mask = OMAP4_SRCSELECT_MASK, | ||
| 170 | .recalc = &omap2_clksel_recalc, | ||
| 171 | @@ -2833,12 +2904,29 @@ static struct clk auxclk3_ck = { | ||
| 172 | .enable_bit = OMAP4_ENABLE_SHIFT, | ||
| 173 | }; | ||
| 174 | |||
| 175 | -static struct clk auxclk4_ck = { | ||
| 176 | - .name = "auxclk4_ck", | ||
| 177 | +static const struct clksel auxclk3_sel[] = { | ||
| 178 | + { .parent = &auxclk3_src_ck, .rates = div16_1to16_rates }, | ||
| 179 | + { .parent = NULL }, | ||
| 180 | +}; | ||
| 181 | + | ||
| 182 | +static struct clk auxclk3_ck = { | ||
| 183 | + .name = "auxclk3_ck", | ||
| 184 | + .parent = &auxclk3_src_ck, | ||
| 185 | + .clksel = auxclk3_sel, | ||
| 186 | + .clksel_reg = OMAP4_SCRM_AUXCLK3, | ||
| 187 | + .clksel_mask = OMAP4_CLKDIV_MASK, | ||
| 188 | + .ops = &clkops_null, | ||
| 189 | + .recalc = &omap2_clksel_recalc, | ||
| 190 | + .round_rate = &omap2_clksel_round_rate, | ||
| 191 | + .set_rate = &omap2_clksel_set_rate, | ||
| 192 | +}; | ||
| 193 | + | ||
| 194 | +static struct clk auxclk4_src_ck = { | ||
| 195 | + .name = "auxclk4_src_ck", | ||
| 196 | .parent = &sys_clkin_ck, | ||
| 197 | .init = &omap2_init_clksel_parent, | ||
| 198 | .ops = &clkops_omap2_dflt, | ||
| 199 | - .clksel = auxclk_sel, | ||
| 200 | + .clksel = auxclk_src_sel, | ||
| 201 | .clksel_reg = OMAP4_SCRM_AUXCLK4, | ||
| 202 | .clksel_mask = OMAP4_SRCSELECT_MASK, | ||
| 203 | .recalc = &omap2_clksel_recalc, | ||
| 204 | @@ -2846,12 +2934,29 @@ static struct clk auxclk4_ck = { | ||
| 205 | .enable_bit = OMAP4_ENABLE_SHIFT, | ||
| 206 | }; | ||
| 207 | |||
| 208 | -static struct clk auxclk5_ck = { | ||
| 209 | - .name = "auxclk5_ck", | ||
| 210 | +static const struct clksel auxclk4_sel[] = { | ||
| 211 | + { .parent = &auxclk4_src_ck, .rates = div16_1to16_rates }, | ||
| 212 | + { .parent = NULL }, | ||
| 213 | +}; | ||
| 214 | + | ||
| 215 | +static struct clk auxclk4_ck = { | ||
| 216 | + .name = "auxclk4_ck", | ||
| 217 | + .parent = &auxclk4_src_ck, | ||
| 218 | + .clksel = auxclk4_sel, | ||
| 219 | + .clksel_reg = OMAP4_SCRM_AUXCLK4, | ||
| 220 | + .clksel_mask = OMAP4_CLKDIV_MASK, | ||
| 221 | + .ops = &clkops_null, | ||
| 222 | + .recalc = &omap2_clksel_recalc, | ||
| 223 | + .round_rate = &omap2_clksel_round_rate, | ||
| 224 | + .set_rate = &omap2_clksel_set_rate, | ||
| 225 | +}; | ||
| 226 | + | ||
| 227 | +static struct clk auxclk5_src_ck = { | ||
| 228 | + .name = "auxclk5_src_ck", | ||
| 229 | .parent = &sys_clkin_ck, | ||
| 230 | .init = &omap2_init_clksel_parent, | ||
| 231 | .ops = &clkops_omap2_dflt, | ||
| 232 | - .clksel = auxclk_sel, | ||
| 233 | + .clksel = auxclk_src_sel, | ||
| 234 | .clksel_reg = OMAP4_SCRM_AUXCLK5, | ||
| 235 | .clksel_mask = OMAP4_SRCSELECT_MASK, | ||
| 236 | .recalc = &omap2_clksel_recalc, | ||
| 237 | @@ -2859,6 +2964,23 @@ static struct clk auxclk5_ck = { | ||
| 238 | .enable_bit = OMAP4_ENABLE_SHIFT, | ||
| 239 | }; | ||
| 240 | |||
| 241 | +static const struct clksel auxclk5_sel[] = { | ||
| 242 | + { .parent = &auxclk5_src_ck, .rates = div16_1to16_rates }, | ||
| 243 | + { .parent = NULL }, | ||
| 244 | +}; | ||
| 245 | + | ||
| 246 | +static struct clk auxclk5_ck = { | ||
| 247 | + .name = "auxclk5_ck", | ||
| 248 | + .parent = &auxclk5_src_ck, | ||
| 249 | + .clksel = auxclk5_sel, | ||
| 250 | + .clksel_reg = OMAP4_SCRM_AUXCLK5, | ||
| 251 | + .clksel_mask = OMAP4_CLKDIV_MASK, | ||
| 252 | + .ops = &clkops_null, | ||
| 253 | + .recalc = &omap2_clksel_recalc, | ||
| 254 | + .round_rate = &omap2_clksel_round_rate, | ||
| 255 | + .set_rate = &omap2_clksel_set_rate, | ||
| 256 | +}; | ||
| 257 | + | ||
| 258 | static const struct clksel auxclkreq_sel[] = { | ||
| 259 | { .parent = &auxclk0_ck, .rates = div_1_0_rates }, | ||
| 260 | { .parent = &auxclk1_ck, .rates = div_1_1_rates }, | ||
| 261 | @@ -3150,17 +3272,23 @@ static struct omap_clk omap44xx_clks[] = { | ||
| 262 | CLK(NULL, "wd_timer3_fck", &wd_timer3_fck, CK_443X), | ||
| 263 | CLK(NULL, "stm_clk_div_ck", &stm_clk_div_ck, CK_443X), | ||
| 264 | CLK(NULL, "trace_clk_div_ck", &trace_clk_div_ck, CK_443X), | ||
| 265 | + CLK(NULL, "auxclk0_src_ck", &auxclk0_src_ck, CK_443X), | ||
| 266 | CLK(NULL, "auxclk0_ck", &auxclk0_ck, CK_443X), | ||
| 267 | - CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), | ||
| 268 | - CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), | ||
| 269 | - CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), | ||
| 270 | - CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), | ||
| 271 | - CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), | ||
| 272 | CLK(NULL, "auxclkreq0_ck", &auxclkreq0_ck, CK_443X), | ||
| 273 | + CLK(NULL, "auxclk1_src_ck", &auxclk1_src_ck, CK_443X), | ||
| 274 | + CLK(NULL, "auxclk1_ck", &auxclk1_ck, CK_443X), | ||
| 275 | CLK(NULL, "auxclkreq1_ck", &auxclkreq1_ck, CK_443X), | ||
| 276 | + CLK(NULL, "auxclk2_src_ck", &auxclk2_src_ck, CK_443X), | ||
| 277 | + CLK(NULL, "auxclk2_ck", &auxclk2_ck, CK_443X), | ||
| 278 | CLK(NULL, "auxclkreq2_ck", &auxclkreq2_ck, CK_443X), | ||
| 279 | + CLK(NULL, "auxclk3_src_ck", &auxclk3_src_ck, CK_443X), | ||
| 280 | + CLK(NULL, "auxclk3_ck", &auxclk3_ck, CK_443X), | ||
| 281 | CLK(NULL, "auxclkreq3_ck", &auxclkreq3_ck, CK_443X), | ||
| 282 | + CLK(NULL, "auxclk4_src_ck", &auxclk4_src_ck, CK_443X), | ||
| 283 | + CLK(NULL, "auxclk4_ck", &auxclk4_ck, CK_443X), | ||
| 284 | CLK(NULL, "auxclkreq4_ck", &auxclkreq4_ck, CK_443X), | ||
| 285 | + CLK(NULL, "auxclk5_src_ck", &auxclk5_src_ck, CK_443X), | ||
| 286 | + CLK(NULL, "auxclk5_ck", &auxclk5_ck, CK_443X), | ||
| 287 | CLK(NULL, "auxclkreq5_ck", &auxclkreq5_ck, CK_443X), | ||
| 288 | CLK(NULL, "gpmc_ck", &dummy_ck, CK_443X), | ||
| 289 | CLK(NULL, "gpt1_ick", &dummy_ck, CK_443X), | ||
| 290 | -- | ||
| 291 | 1.7.2.5 | ||
| 292 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0077-OMAP4-hwmod-data-Add-clock-domain-attribute.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0077-OMAP4-hwmod-data-Add-clock-domain-attribute.patch deleted file mode 100644 index f13d8390..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0077-OMAP4-hwmod-data-Add-clock-domain-attribute.patch +++ /dev/null | |||
| @@ -1,724 +0,0 @@ | |||
| 1 | From 67101af593a16acf5d5d924f2746cc221d0360d1 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:29 -0600 | ||
| 4 | Subject: [PATCH 077/149] OMAP4: hwmod data: Add clock domain attribute | ||
| 5 | |||
| 6 | In OMAP PRCM terminology, the clock domain is defined as a group of IPs | ||
| 7 | that share some clocks and most of the time an interface clock. | ||
| 8 | Every IP does belong to a clockdomain. | ||
| 9 | For the moment the clock domain attribute is affected to a clock node. | ||
| 10 | The issue with that approach, is that a clock might or not belong to a | ||
| 11 | clock domain. Moreover during module transition, it is up to a module | ||
| 12 | to handle properly the clock domain state and not to a clock node. | ||
| 13 | |||
| 14 | Create a clkdm_name attribute to provide this information per hwmod. | ||
| 15 | |||
| 16 | Populate this attribute for every OMAP4 hwmod entries. | ||
| 17 | |||
| 18 | Future cleanup series with remove that information from the OMAP4 clock | ||
| 19 | when it is relevant. | ||
| 20 | |||
| 21 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 22 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 23 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 24 | [paul@pwsan.com: fix the mpuss_clkdm name] | ||
| 25 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 26 | --- | ||
| 27 | arch/arm/mach-omap2/clockdomains44xx_data.c | 2 +- | ||
| 28 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 85 +++++++++++++++++++++++++- | ||
| 29 | arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + | ||
| 30 | 3 files changed, 85 insertions(+), 3 deletions(-) | ||
| 31 | |||
| 32 | diff --git a/arch/arm/mach-omap2/clockdomains44xx_data.c b/arch/arm/mach-omap2/clockdomains44xx_data.c | ||
| 33 | index 66090f2..dccc651 100644 | ||
| 34 | --- a/arch/arm/mach-omap2/clockdomains44xx_data.c | ||
| 35 | +++ b/arch/arm/mach-omap2/clockdomains44xx_data.c | ||
| 36 | @@ -565,7 +565,7 @@ static struct clockdomain ducati_44xx_clkdm = { | ||
| 37 | }; | ||
| 38 | |||
| 39 | static struct clockdomain mpu_44xx_clkdm = { | ||
| 40 | - .name = "mpu_clkdm", | ||
| 41 | + .name = "mpuss_clkdm", | ||
| 42 | .pwrdm = { .name = "mpu_pwrdm" }, | ||
| 43 | .prcm_partition = OMAP4430_CM1_PARTITION, | ||
| 44 | .cm_inst = OMAP4430_CM1_MPU_INST, | ||
| 45 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 46 | index 5d5df49..becae45 100644 | ||
| 47 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 48 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 49 | @@ -123,9 +123,10 @@ static struct omap_hwmod_ocp_if *omap44xx_dmm_slaves[] = { | ||
| 50 | static struct omap_hwmod omap44xx_dmm_hwmod = { | ||
| 51 | .name = "dmm", | ||
| 52 | .class = &omap44xx_dmm_hwmod_class, | ||
| 53 | - .mpu_irqs = omap44xx_dmm_irqs, | ||
| 54 | + .clkdm_name = "l3_emif_clkdm", | ||
| 55 | .slaves = omap44xx_dmm_slaves, | ||
| 56 | .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), | ||
| 57 | + .mpu_irqs = omap44xx_dmm_irqs, | ||
| 58 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 59 | }; | ||
| 60 | |||
| 61 | @@ -173,6 +174,7 @@ static struct omap_hwmod_ocp_if *omap44xx_emif_fw_slaves[] = { | ||
| 62 | static struct omap_hwmod omap44xx_emif_fw_hwmod = { | ||
| 63 | .name = "emif_fw", | ||
| 64 | .class = &omap44xx_emif_fw_hwmod_class, | ||
| 65 | + .clkdm_name = "l3_emif_clkdm", | ||
| 66 | .slaves = omap44xx_emif_fw_slaves, | ||
| 67 | .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), | ||
| 68 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 69 | @@ -212,6 +214,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_instr_slaves[] = { | ||
| 70 | static struct omap_hwmod omap44xx_l3_instr_hwmod = { | ||
| 71 | .name = "l3_instr", | ||
| 72 | .class = &omap44xx_l3_hwmod_class, | ||
| 73 | + .clkdm_name = "l3_instr_clkdm", | ||
| 74 | .slaves = omap44xx_l3_instr_slaves, | ||
| 75 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), | ||
| 76 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 77 | @@ -304,6 +307,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_1_slaves[] = { | ||
| 78 | static struct omap_hwmod omap44xx_l3_main_1_hwmod = { | ||
| 79 | .name = "l3_main_1", | ||
| 80 | .class = &omap44xx_l3_hwmod_class, | ||
| 81 | + .clkdm_name = "l3_1_clkdm", | ||
| 82 | .mpu_irqs = omap44xx_l3_main_1_irqs, | ||
| 83 | .slaves = omap44xx_l3_main_1_slaves, | ||
| 84 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), | ||
| 85 | @@ -400,6 +404,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_2_slaves[] = { | ||
| 86 | static struct omap_hwmod omap44xx_l3_main_2_hwmod = { | ||
| 87 | .name = "l3_main_2", | ||
| 88 | .class = &omap44xx_l3_hwmod_class, | ||
| 89 | + .clkdm_name = "l3_2_clkdm", | ||
| 90 | .slaves = omap44xx_l3_main_2_slaves, | ||
| 91 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), | ||
| 92 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 93 | @@ -450,6 +455,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l3_main_3_slaves[] = { | ||
| 94 | static struct omap_hwmod omap44xx_l3_main_3_hwmod = { | ||
| 95 | .name = "l3_main_3", | ||
| 96 | .class = &omap44xx_l3_hwmod_class, | ||
| 97 | + .clkdm_name = "l3_instr_clkdm", | ||
| 98 | .slaves = omap44xx_l3_main_3_slaves, | ||
| 99 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), | ||
| 100 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 101 | @@ -507,6 +513,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_abe_slaves[] = { | ||
| 102 | static struct omap_hwmod omap44xx_l4_abe_hwmod = { | ||
| 103 | .name = "l4_abe", | ||
| 104 | .class = &omap44xx_l4_hwmod_class, | ||
| 105 | + .clkdm_name = "abe_clkdm", | ||
| 106 | .slaves = omap44xx_l4_abe_slaves, | ||
| 107 | .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), | ||
| 108 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 109 | @@ -529,6 +536,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_cfg_slaves[] = { | ||
| 110 | static struct omap_hwmod omap44xx_l4_cfg_hwmod = { | ||
| 111 | .name = "l4_cfg", | ||
| 112 | .class = &omap44xx_l4_hwmod_class, | ||
| 113 | + .clkdm_name = "l4_cfg_clkdm", | ||
| 114 | .slaves = omap44xx_l4_cfg_slaves, | ||
| 115 | .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), | ||
| 116 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 117 | @@ -551,6 +559,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_per_slaves[] = { | ||
| 118 | static struct omap_hwmod omap44xx_l4_per_hwmod = { | ||
| 119 | .name = "l4_per", | ||
| 120 | .class = &omap44xx_l4_hwmod_class, | ||
| 121 | + .clkdm_name = "l4_per_clkdm", | ||
| 122 | .slaves = omap44xx_l4_per_slaves, | ||
| 123 | .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), | ||
| 124 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 125 | @@ -573,6 +582,7 @@ static struct omap_hwmod_ocp_if *omap44xx_l4_wkup_slaves[] = { | ||
| 126 | static struct omap_hwmod omap44xx_l4_wkup_hwmod = { | ||
| 127 | .name = "l4_wkup", | ||
| 128 | .class = &omap44xx_l4_hwmod_class, | ||
| 129 | + .clkdm_name = "l4_wkup_clkdm", | ||
| 130 | .slaves = omap44xx_l4_wkup_slaves, | ||
| 131 | .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), | ||
| 132 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 133 | @@ -603,6 +613,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_private_slaves[] = { | ||
| 134 | static struct omap_hwmod omap44xx_mpu_private_hwmod = { | ||
| 135 | .name = "mpu_private", | ||
| 136 | .class = &omap44xx_mpu_bus_hwmod_class, | ||
| 137 | + .clkdm_name = "mpuss_clkdm", | ||
| 138 | .slaves = omap44xx_mpu_private_slaves, | ||
| 139 | .slaves_cnt = ARRAY_SIZE(omap44xx_mpu_private_slaves), | ||
| 140 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 141 | @@ -741,6 +752,7 @@ static struct omap_hwmod_ocp_if *omap44xx_aess_slaves[] = { | ||
| 142 | static struct omap_hwmod omap44xx_aess_hwmod = { | ||
| 143 | .name = "aess", | ||
| 144 | .class = &omap44xx_aess_hwmod_class, | ||
| 145 | + .clkdm_name = "abe_clkdm", | ||
| 146 | .mpu_irqs = omap44xx_aess_irqs, | ||
| 147 | .sdma_reqs = omap44xx_aess_sdma_reqs, | ||
| 148 | .main_clk = "aess_fck", | ||
| 149 | @@ -773,6 +785,7 @@ static struct omap_hwmod_opt_clk bandgap_opt_clks[] = { | ||
| 150 | static struct omap_hwmod omap44xx_bandgap_hwmod = { | ||
| 151 | .name = "bandgap", | ||
| 152 | .class = &omap44xx_bandgap_hwmod_class, | ||
| 153 | + .clkdm_name = "l4_wkup_clkdm", | ||
| 154 | .prcm = { | ||
| 155 | .omap4 = { | ||
| 156 | .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, | ||
| 157 | @@ -830,6 +843,7 @@ static struct omap_hwmod_ocp_if *omap44xx_counter_32k_slaves[] = { | ||
| 158 | static struct omap_hwmod omap44xx_counter_32k_hwmod = { | ||
| 159 | .name = "counter_32k", | ||
| 160 | .class = &omap44xx_counter_hwmod_class, | ||
| 161 | + .clkdm_name = "l4_wkup_clkdm", | ||
| 162 | .flags = HWMOD_SWSUP_SIDLE, | ||
| 163 | .main_clk = "sys_32k_ck", | ||
| 164 | .prcm = { | ||
| 165 | @@ -913,6 +927,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dma_system_slaves[] = { | ||
| 166 | static struct omap_hwmod omap44xx_dma_system_hwmod = { | ||
| 167 | .name = "dma_system", | ||
| 168 | .class = &omap44xx_dma_hwmod_class, | ||
| 169 | + .clkdm_name = "l3_dma_clkdm", | ||
| 170 | .mpu_irqs = omap44xx_dma_system_irqs, | ||
| 171 | .main_clk = "l3_div_ck", | ||
| 172 | .prcm = { | ||
| 173 | @@ -1005,6 +1020,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dmic_slaves[] = { | ||
| 174 | static struct omap_hwmod omap44xx_dmic_hwmod = { | ||
| 175 | .name = "dmic", | ||
| 176 | .class = &omap44xx_dmic_hwmod_class, | ||
| 177 | + .clkdm_name = "abe_clkdm", | ||
| 178 | .mpu_irqs = omap44xx_dmic_irqs, | ||
| 179 | .sdma_reqs = omap44xx_dmic_sdma_reqs, | ||
| 180 | .main_clk = "dmic_fck", | ||
| 181 | @@ -1072,6 +1088,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dsp_slaves[] = { | ||
| 182 | static struct omap_hwmod omap44xx_dsp_c0_hwmod = { | ||
| 183 | .name = "dsp_c0", | ||
| 184 | .class = &omap44xx_dsp_hwmod_class, | ||
| 185 | + .clkdm_name = "tesla_clkdm", | ||
| 186 | .flags = HWMOD_INIT_NO_RESET, | ||
| 187 | .rst_lines = omap44xx_dsp_c0_resets, | ||
| 188 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets), | ||
| 189 | @@ -1086,6 +1103,7 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = { | ||
| 190 | static struct omap_hwmod omap44xx_dsp_hwmod = { | ||
| 191 | .name = "dsp", | ||
| 192 | .class = &omap44xx_dsp_hwmod_class, | ||
| 193 | + .clkdm_name = "tesla_clkdm", | ||
| 194 | .mpu_irqs = omap44xx_dsp_irqs, | ||
| 195 | .rst_lines = omap44xx_dsp_resets, | ||
| 196 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_resets), | ||
| 197 | @@ -1177,6 +1195,7 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { | ||
| 198 | static struct omap_hwmod omap44xx_dss_hwmod = { | ||
| 199 | .name = "dss_core", | ||
| 200 | .class = &omap44xx_dss_hwmod_class, | ||
| 201 | + .clkdm_name = "l3_dss_clkdm", | ||
| 202 | .main_clk = "dss_dss_clk", | ||
| 203 | .prcm = { | ||
| 204 | .omap4 = { | ||
| 205 | @@ -1278,7 +1297,7 @@ static struct omap_hwmod_opt_clk dss_dispc_opt_clks[] = { | ||
| 206 | static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | ||
| 207 | .name = "dss_dispc", | ||
| 208 | .class = &omap44xx_dispc_hwmod_class, | ||
| 209 | - .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 210 | + .clkdm_name = "l3_dss_clkdm", | ||
| 211 | .mpu_irqs = omap44xx_dss_dispc_irqs, | ||
| 212 | .sdma_reqs = omap44xx_dss_dispc_sdma_reqs, | ||
| 213 | .main_clk = "dss_dss_clk", | ||
| 214 | @@ -1376,6 +1395,7 @@ static struct omap_hwmod_opt_clk dss_dsi1_opt_clks[] = { | ||
| 215 | static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | ||
| 216 | .name = "dss_dsi1", | ||
| 217 | .class = &omap44xx_dsi_hwmod_class, | ||
| 218 | + .clkdm_name = "l3_dss_clkdm", | ||
| 219 | .mpu_irqs = omap44xx_dss_dsi1_irqs, | ||
| 220 | .sdma_reqs = omap44xx_dss_dsi1_sdma_reqs, | ||
| 221 | .main_clk = "dss_dss_clk", | ||
| 222 | @@ -1452,6 +1472,7 @@ static struct omap_hwmod_opt_clk dss_dsi2_opt_clks[] = { | ||
| 223 | static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { | ||
| 224 | .name = "dss_dsi2", | ||
| 225 | .class = &omap44xx_dsi_hwmod_class, | ||
| 226 | + .clkdm_name = "l3_dss_clkdm", | ||
| 227 | .mpu_irqs = omap44xx_dss_dsi2_irqs, | ||
| 228 | .sdma_reqs = omap44xx_dss_dsi2_sdma_reqs, | ||
| 229 | .main_clk = "dss_dss_clk", | ||
| 230 | @@ -1548,6 +1569,7 @@ static struct omap_hwmod_opt_clk dss_hdmi_opt_clks[] = { | ||
| 231 | static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | ||
| 232 | .name = "dss_hdmi", | ||
| 233 | .class = &omap44xx_hdmi_hwmod_class, | ||
| 234 | + .clkdm_name = "l3_dss_clkdm", | ||
| 235 | .mpu_irqs = omap44xx_dss_hdmi_irqs, | ||
| 236 | .sdma_reqs = omap44xx_dss_hdmi_sdma_reqs, | ||
| 237 | .main_clk = "dss_dss_clk", | ||
| 238 | @@ -1639,6 +1661,7 @@ static struct omap_hwmod_opt_clk dss_rfbi_opt_clks[] = { | ||
| 239 | static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { | ||
| 240 | .name = "dss_rfbi", | ||
| 241 | .class = &omap44xx_rfbi_hwmod_class, | ||
| 242 | + .clkdm_name = "l3_dss_clkdm", | ||
| 243 | .sdma_reqs = omap44xx_dss_rfbi_sdma_reqs, | ||
| 244 | .main_clk = "dss_dss_clk", | ||
| 245 | .prcm = { | ||
| 246 | @@ -1709,6 +1732,7 @@ static struct omap_hwmod_ocp_if *omap44xx_dss_venc_slaves[] = { | ||
| 247 | static struct omap_hwmod omap44xx_dss_venc_hwmod = { | ||
| 248 | .name = "dss_venc", | ||
| 249 | .class = &omap44xx_venc_hwmod_class, | ||
| 250 | + .clkdm_name = "l3_dss_clkdm", | ||
| 251 | .main_clk = "dss_dss_clk", | ||
| 252 | .prcm = { | ||
| 253 | .omap4 = { | ||
| 254 | @@ -1786,6 +1810,7 @@ static struct omap_hwmod_opt_clk gpio1_opt_clks[] = { | ||
| 255 | static struct omap_hwmod omap44xx_gpio1_hwmod = { | ||
| 256 | .name = "gpio1", | ||
| 257 | .class = &omap44xx_gpio_hwmod_class, | ||
| 258 | + .clkdm_name = "l4_wkup_clkdm", | ||
| 259 | .mpu_irqs = omap44xx_gpio1_irqs, | ||
| 260 | .main_clk = "gpio1_ick", | ||
| 261 | .prcm = { | ||
| 262 | @@ -1838,6 +1863,7 @@ static struct omap_hwmod_opt_clk gpio2_opt_clks[] = { | ||
| 263 | static struct omap_hwmod omap44xx_gpio2_hwmod = { | ||
| 264 | .name = "gpio2", | ||
| 265 | .class = &omap44xx_gpio_hwmod_class, | ||
| 266 | + .clkdm_name = "l4_per_clkdm", | ||
| 267 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 268 | .mpu_irqs = omap44xx_gpio2_irqs, | ||
| 269 | .main_clk = "gpio2_ick", | ||
| 270 | @@ -1891,6 +1917,7 @@ static struct omap_hwmod_opt_clk gpio3_opt_clks[] = { | ||
| 271 | static struct omap_hwmod omap44xx_gpio3_hwmod = { | ||
| 272 | .name = "gpio3", | ||
| 273 | .class = &omap44xx_gpio_hwmod_class, | ||
| 274 | + .clkdm_name = "l4_per_clkdm", | ||
| 275 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 276 | .mpu_irqs = omap44xx_gpio3_irqs, | ||
| 277 | .main_clk = "gpio3_ick", | ||
| 278 | @@ -1944,6 +1971,7 @@ static struct omap_hwmod_opt_clk gpio4_opt_clks[] = { | ||
| 279 | static struct omap_hwmod omap44xx_gpio4_hwmod = { | ||
| 280 | .name = "gpio4", | ||
| 281 | .class = &omap44xx_gpio_hwmod_class, | ||
| 282 | + .clkdm_name = "l4_per_clkdm", | ||
| 283 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 284 | .mpu_irqs = omap44xx_gpio4_irqs, | ||
| 285 | .main_clk = "gpio4_ick", | ||
| 286 | @@ -1997,6 +2025,7 @@ static struct omap_hwmod_opt_clk gpio5_opt_clks[] = { | ||
| 287 | static struct omap_hwmod omap44xx_gpio5_hwmod = { | ||
| 288 | .name = "gpio5", | ||
| 289 | .class = &omap44xx_gpio_hwmod_class, | ||
| 290 | + .clkdm_name = "l4_per_clkdm", | ||
| 291 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 292 | .mpu_irqs = omap44xx_gpio5_irqs, | ||
| 293 | .main_clk = "gpio5_ick", | ||
| 294 | @@ -2050,6 +2079,7 @@ static struct omap_hwmod_opt_clk gpio6_opt_clks[] = { | ||
| 295 | static struct omap_hwmod omap44xx_gpio6_hwmod = { | ||
| 296 | .name = "gpio6", | ||
| 297 | .class = &omap44xx_gpio_hwmod_class, | ||
| 298 | + .clkdm_name = "l4_per_clkdm", | ||
| 299 | .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, | ||
| 300 | .mpu_irqs = omap44xx_gpio6_irqs, | ||
| 301 | .main_clk = "gpio6_ick", | ||
| 302 | @@ -2129,6 +2159,7 @@ static struct omap_hwmod_ocp_if *omap44xx_hsi_slaves[] = { | ||
| 303 | static struct omap_hwmod omap44xx_hsi_hwmod = { | ||
| 304 | .name = "hsi", | ||
| 305 | .class = &omap44xx_hsi_hwmod_class, | ||
| 306 | + .clkdm_name = "l3_init_clkdm", | ||
| 307 | .mpu_irqs = omap44xx_hsi_irqs, | ||
| 308 | .main_clk = "hsi_fck", | ||
| 309 | .prcm = { | ||
| 310 | @@ -2209,6 +2240,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c1_slaves[] = { | ||
| 311 | static struct omap_hwmod omap44xx_i2c1_hwmod = { | ||
| 312 | .name = "i2c1", | ||
| 313 | .class = &omap44xx_i2c_hwmod_class, | ||
| 314 | + .clkdm_name = "l4_per_clkdm", | ||
| 315 | .flags = HWMOD_16BIT_REG, | ||
| 316 | .mpu_irqs = omap44xx_i2c1_irqs, | ||
| 317 | .sdma_reqs = omap44xx_i2c1_sdma_reqs, | ||
| 318 | @@ -2263,6 +2295,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c2_slaves[] = { | ||
| 319 | static struct omap_hwmod omap44xx_i2c2_hwmod = { | ||
| 320 | .name = "i2c2", | ||
| 321 | .class = &omap44xx_i2c_hwmod_class, | ||
| 322 | + .clkdm_name = "l4_per_clkdm", | ||
| 323 | .flags = HWMOD_16BIT_REG, | ||
| 324 | .mpu_irqs = omap44xx_i2c2_irqs, | ||
| 325 | .sdma_reqs = omap44xx_i2c2_sdma_reqs, | ||
| 326 | @@ -2317,6 +2350,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c3_slaves[] = { | ||
| 327 | static struct omap_hwmod omap44xx_i2c3_hwmod = { | ||
| 328 | .name = "i2c3", | ||
| 329 | .class = &omap44xx_i2c_hwmod_class, | ||
| 330 | + .clkdm_name = "l4_per_clkdm", | ||
| 331 | .flags = HWMOD_16BIT_REG, | ||
| 332 | .mpu_irqs = omap44xx_i2c3_irqs, | ||
| 333 | .sdma_reqs = omap44xx_i2c3_sdma_reqs, | ||
| 334 | @@ -2371,6 +2405,7 @@ static struct omap_hwmod_ocp_if *omap44xx_i2c4_slaves[] = { | ||
| 335 | static struct omap_hwmod omap44xx_i2c4_hwmod = { | ||
| 336 | .name = "i2c4", | ||
| 337 | .class = &omap44xx_i2c_hwmod_class, | ||
| 338 | + .clkdm_name = "l4_per_clkdm", | ||
| 339 | .flags = HWMOD_16BIT_REG, | ||
| 340 | .mpu_irqs = omap44xx_i2c4_irqs, | ||
| 341 | .sdma_reqs = omap44xx_i2c4_sdma_reqs, | ||
| 342 | @@ -2435,6 +2470,7 @@ static struct omap_hwmod_ocp_if *omap44xx_ipu_slaves[] = { | ||
| 343 | static struct omap_hwmod omap44xx_ipu_c0_hwmod = { | ||
| 344 | .name = "ipu_c0", | ||
| 345 | .class = &omap44xx_ipu_hwmod_class, | ||
| 346 | + .clkdm_name = "ducati_clkdm", | ||
| 347 | .flags = HWMOD_INIT_NO_RESET, | ||
| 348 | .rst_lines = omap44xx_ipu_c0_resets, | ||
| 349 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), | ||
| 350 | @@ -2450,6 +2486,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = { | ||
| 351 | static struct omap_hwmod omap44xx_ipu_c1_hwmod = { | ||
| 352 | .name = "ipu_c1", | ||
| 353 | .class = &omap44xx_ipu_hwmod_class, | ||
| 354 | + .clkdm_name = "ducati_clkdm", | ||
| 355 | .flags = HWMOD_INIT_NO_RESET, | ||
| 356 | .rst_lines = omap44xx_ipu_c1_resets, | ||
| 357 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), | ||
| 358 | @@ -2464,6 +2501,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = { | ||
| 359 | static struct omap_hwmod omap44xx_ipu_hwmod = { | ||
| 360 | .name = "ipu", | ||
| 361 | .class = &omap44xx_ipu_hwmod_class, | ||
| 362 | + .clkdm_name = "ducati_clkdm", | ||
| 363 | .mpu_irqs = omap44xx_ipu_irqs, | ||
| 364 | .rst_lines = omap44xx_ipu_resets, | ||
| 365 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_resets), | ||
| 366 | @@ -2551,6 +2589,7 @@ static struct omap_hwmod_opt_clk iss_opt_clks[] = { | ||
| 367 | static struct omap_hwmod omap44xx_iss_hwmod = { | ||
| 368 | .name = "iss", | ||
| 369 | .class = &omap44xx_iss_hwmod_class, | ||
| 370 | + .clkdm_name = "iss_clkdm", | ||
| 371 | .mpu_irqs = omap44xx_iss_irqs, | ||
| 372 | .sdma_reqs = omap44xx_iss_sdma_reqs, | ||
| 373 | .main_clk = "iss_fck", | ||
| 374 | @@ -2631,6 +2670,7 @@ static struct omap_hwmod_ocp_if *omap44xx_iva_slaves[] = { | ||
| 375 | static struct omap_hwmod omap44xx_iva_seq0_hwmod = { | ||
| 376 | .name = "iva_seq0", | ||
| 377 | .class = &omap44xx_iva_hwmod_class, | ||
| 378 | + .clkdm_name = "ivahd_clkdm", | ||
| 379 | .flags = HWMOD_INIT_NO_RESET, | ||
| 380 | .rst_lines = omap44xx_iva_seq0_resets, | ||
| 381 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets), | ||
| 382 | @@ -2646,6 +2686,7 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = { | ||
| 383 | static struct omap_hwmod omap44xx_iva_seq1_hwmod = { | ||
| 384 | .name = "iva_seq1", | ||
| 385 | .class = &omap44xx_iva_hwmod_class, | ||
| 386 | + .clkdm_name = "ivahd_clkdm", | ||
| 387 | .flags = HWMOD_INIT_NO_RESET, | ||
| 388 | .rst_lines = omap44xx_iva_seq1_resets, | ||
| 389 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets), | ||
| 390 | @@ -2660,6 +2701,7 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = { | ||
| 391 | static struct omap_hwmod omap44xx_iva_hwmod = { | ||
| 392 | .name = "iva", | ||
| 393 | .class = &omap44xx_iva_hwmod_class, | ||
| 394 | + .clkdm_name = "ivahd_clkdm", | ||
| 395 | .mpu_irqs = omap44xx_iva_irqs, | ||
| 396 | .rst_lines = omap44xx_iva_resets, | ||
| 397 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_resets), | ||
| 398 | @@ -2732,6 +2774,7 @@ static struct omap_hwmod_ocp_if *omap44xx_kbd_slaves[] = { | ||
| 399 | static struct omap_hwmod omap44xx_kbd_hwmod = { | ||
| 400 | .name = "kbd", | ||
| 401 | .class = &omap44xx_kbd_hwmod_class, | ||
| 402 | + .clkdm_name = "l4_wkup_clkdm", | ||
| 403 | .mpu_irqs = omap44xx_kbd_irqs, | ||
| 404 | .main_clk = "kbd_fck", | ||
| 405 | .prcm = { | ||
| 406 | @@ -2797,6 +2840,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mailbox_slaves[] = { | ||
| 407 | static struct omap_hwmod omap44xx_mailbox_hwmod = { | ||
| 408 | .name = "mailbox", | ||
| 409 | .class = &omap44xx_mailbox_hwmod_class, | ||
| 410 | + .clkdm_name = "l4_cfg_clkdm", | ||
| 411 | .mpu_irqs = omap44xx_mailbox_irqs, | ||
| 412 | .prcm = { | ||
| 413 | .omap4 = { | ||
| 414 | @@ -2887,6 +2931,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp1_slaves[] = { | ||
| 415 | static struct omap_hwmod omap44xx_mcbsp1_hwmod = { | ||
| 416 | .name = "mcbsp1", | ||
| 417 | .class = &omap44xx_mcbsp_hwmod_class, | ||
| 418 | + .clkdm_name = "abe_clkdm", | ||
| 419 | .mpu_irqs = omap44xx_mcbsp1_irqs, | ||
| 420 | .sdma_reqs = omap44xx_mcbsp1_sdma_reqs, | ||
| 421 | .main_clk = "mcbsp1_fck", | ||
| 422 | @@ -2960,6 +3005,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp2_slaves[] = { | ||
| 423 | static struct omap_hwmod omap44xx_mcbsp2_hwmod = { | ||
| 424 | .name = "mcbsp2", | ||
| 425 | .class = &omap44xx_mcbsp_hwmod_class, | ||
| 426 | + .clkdm_name = "abe_clkdm", | ||
| 427 | .mpu_irqs = omap44xx_mcbsp2_irqs, | ||
| 428 | .sdma_reqs = omap44xx_mcbsp2_sdma_reqs, | ||
| 429 | .main_clk = "mcbsp2_fck", | ||
| 430 | @@ -3033,6 +3079,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp3_slaves[] = { | ||
| 431 | static struct omap_hwmod omap44xx_mcbsp3_hwmod = { | ||
| 432 | .name = "mcbsp3", | ||
| 433 | .class = &omap44xx_mcbsp_hwmod_class, | ||
| 434 | + .clkdm_name = "abe_clkdm", | ||
| 435 | .mpu_irqs = omap44xx_mcbsp3_irqs, | ||
| 436 | .sdma_reqs = omap44xx_mcbsp3_sdma_reqs, | ||
| 437 | .main_clk = "mcbsp3_fck", | ||
| 438 | @@ -3085,6 +3132,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcbsp4_slaves[] = { | ||
| 439 | static struct omap_hwmod omap44xx_mcbsp4_hwmod = { | ||
| 440 | .name = "mcbsp4", | ||
| 441 | .class = &omap44xx_mcbsp_hwmod_class, | ||
| 442 | + .clkdm_name = "l4_per_clkdm", | ||
| 443 | .mpu_irqs = omap44xx_mcbsp4_irqs, | ||
| 444 | .sdma_reqs = omap44xx_mcbsp4_sdma_reqs, | ||
| 445 | .main_clk = "mcbsp4_fck", | ||
| 446 | @@ -3177,6 +3225,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mcpdm_slaves[] = { | ||
| 447 | static struct omap_hwmod omap44xx_mcpdm_hwmod = { | ||
| 448 | .name = "mcpdm", | ||
| 449 | .class = &omap44xx_mcpdm_hwmod_class, | ||
| 450 | + .clkdm_name = "abe_clkdm", | ||
| 451 | .mpu_irqs = omap44xx_mcpdm_irqs, | ||
| 452 | .sdma_reqs = omap44xx_mcpdm_sdma_reqs, | ||
| 453 | .main_clk = "mcpdm_fck", | ||
| 454 | @@ -3262,6 +3311,7 @@ static struct omap2_mcspi_dev_attr mcspi1_dev_attr = { | ||
| 455 | static struct omap_hwmod omap44xx_mcspi1_hwmod = { | ||
| 456 | .name = "mcspi1", | ||
| 457 | .class = &omap44xx_mcspi_hwmod_class, | ||
| 458 | + .clkdm_name = "l4_per_clkdm", | ||
| 459 | .mpu_irqs = omap44xx_mcspi1_irqs, | ||
| 460 | .sdma_reqs = omap44xx_mcspi1_sdma_reqs, | ||
| 461 | .main_clk = "mcspi1_fck", | ||
| 462 | @@ -3322,6 +3372,7 @@ static struct omap2_mcspi_dev_attr mcspi2_dev_attr = { | ||
| 463 | static struct omap_hwmod omap44xx_mcspi2_hwmod = { | ||
| 464 | .name = "mcspi2", | ||
| 465 | .class = &omap44xx_mcspi_hwmod_class, | ||
| 466 | + .clkdm_name = "l4_per_clkdm", | ||
| 467 | .mpu_irqs = omap44xx_mcspi2_irqs, | ||
| 468 | .sdma_reqs = omap44xx_mcspi2_sdma_reqs, | ||
| 469 | .main_clk = "mcspi2_fck", | ||
| 470 | @@ -3382,6 +3433,7 @@ static struct omap2_mcspi_dev_attr mcspi3_dev_attr = { | ||
| 471 | static struct omap_hwmod omap44xx_mcspi3_hwmod = { | ||
| 472 | .name = "mcspi3", | ||
| 473 | .class = &omap44xx_mcspi_hwmod_class, | ||
| 474 | + .clkdm_name = "l4_per_clkdm", | ||
| 475 | .mpu_irqs = omap44xx_mcspi3_irqs, | ||
| 476 | .sdma_reqs = omap44xx_mcspi3_sdma_reqs, | ||
| 477 | .main_clk = "mcspi3_fck", | ||
| 478 | @@ -3440,6 +3492,7 @@ static struct omap2_mcspi_dev_attr mcspi4_dev_attr = { | ||
| 479 | static struct omap_hwmod omap44xx_mcspi4_hwmod = { | ||
| 480 | .name = "mcspi4", | ||
| 481 | .class = &omap44xx_mcspi_hwmod_class, | ||
| 482 | + .clkdm_name = "l4_per_clkdm", | ||
| 483 | .mpu_irqs = omap44xx_mcspi4_irqs, | ||
| 484 | .sdma_reqs = omap44xx_mcspi4_sdma_reqs, | ||
| 485 | .main_clk = "mcspi4_fck", | ||
| 486 | @@ -3524,6 +3577,7 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = { | ||
| 487 | static struct omap_hwmod omap44xx_mmc1_hwmod = { | ||
| 488 | .name = "mmc1", | ||
| 489 | .class = &omap44xx_mmc_hwmod_class, | ||
| 490 | + .clkdm_name = "l3_init_clkdm", | ||
| 491 | .mpu_irqs = omap44xx_mmc1_irqs, | ||
| 492 | .sdma_reqs = omap44xx_mmc1_sdma_reqs, | ||
| 493 | .main_clk = "mmc1_fck", | ||
| 494 | @@ -3583,6 +3637,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc2_slaves[] = { | ||
| 495 | static struct omap_hwmod omap44xx_mmc2_hwmod = { | ||
| 496 | .name = "mmc2", | ||
| 497 | .class = &omap44xx_mmc_hwmod_class, | ||
| 498 | + .clkdm_name = "l3_init_clkdm", | ||
| 499 | .mpu_irqs = omap44xx_mmc2_irqs, | ||
| 500 | .sdma_reqs = omap44xx_mmc2_sdma_reqs, | ||
| 501 | .main_clk = "mmc2_fck", | ||
| 502 | @@ -3637,6 +3692,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc3_slaves[] = { | ||
| 503 | static struct omap_hwmod omap44xx_mmc3_hwmod = { | ||
| 504 | .name = "mmc3", | ||
| 505 | .class = &omap44xx_mmc_hwmod_class, | ||
| 506 | + .clkdm_name = "l4_per_clkdm", | ||
| 507 | .mpu_irqs = omap44xx_mmc3_irqs, | ||
| 508 | .sdma_reqs = omap44xx_mmc3_sdma_reqs, | ||
| 509 | .main_clk = "mmc3_fck", | ||
| 510 | @@ -3689,6 +3745,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc4_slaves[] = { | ||
| 511 | static struct omap_hwmod omap44xx_mmc4_hwmod = { | ||
| 512 | .name = "mmc4", | ||
| 513 | .class = &omap44xx_mmc_hwmod_class, | ||
| 514 | + .clkdm_name = "l4_per_clkdm", | ||
| 515 | .mpu_irqs = omap44xx_mmc4_irqs, | ||
| 516 | |||
| 517 | .sdma_reqs = omap44xx_mmc4_sdma_reqs, | ||
| 518 | @@ -3742,6 +3799,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mmc5_slaves[] = { | ||
| 519 | static struct omap_hwmod omap44xx_mmc5_hwmod = { | ||
| 520 | .name = "mmc5", | ||
| 521 | .class = &omap44xx_mmc_hwmod_class, | ||
| 522 | + .clkdm_name = "l4_per_clkdm", | ||
| 523 | .mpu_irqs = omap44xx_mmc5_irqs, | ||
| 524 | .sdma_reqs = omap44xx_mmc5_sdma_reqs, | ||
| 525 | .main_clk = "mmc5_fck", | ||
| 526 | @@ -3782,6 +3840,7 @@ static struct omap_hwmod_ocp_if *omap44xx_mpu_masters[] = { | ||
| 527 | static struct omap_hwmod omap44xx_mpu_hwmod = { | ||
| 528 | .name = "mpu", | ||
| 529 | .class = &omap44xx_mpu_hwmod_class, | ||
| 530 | + .clkdm_name = "mpuss_clkdm", | ||
| 531 | .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, | ||
| 532 | .mpu_irqs = omap44xx_mpu_irqs, | ||
| 533 | .main_clk = "dpll_mpu_m2_ck", | ||
| 534 | @@ -3854,6 +3913,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_core_slaves[] = { | ||
| 535 | static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { | ||
| 536 | .name = "smartreflex_core", | ||
| 537 | .class = &omap44xx_smartreflex_hwmod_class, | ||
| 538 | + .clkdm_name = "l4_ao_clkdm", | ||
| 539 | .mpu_irqs = omap44xx_smartreflex_core_irqs, | ||
| 540 | |||
| 541 | .main_clk = "smartreflex_core_fck", | ||
| 542 | @@ -3901,6 +3961,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_iva_slaves[] = { | ||
| 543 | static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { | ||
| 544 | .name = "smartreflex_iva", | ||
| 545 | .class = &omap44xx_smartreflex_hwmod_class, | ||
| 546 | + .clkdm_name = "l4_ao_clkdm", | ||
| 547 | .mpu_irqs = omap44xx_smartreflex_iva_irqs, | ||
| 548 | .main_clk = "smartreflex_iva_fck", | ||
| 549 | .vdd_name = "iva", | ||
| 550 | @@ -3947,6 +4008,7 @@ static struct omap_hwmod_ocp_if *omap44xx_smartreflex_mpu_slaves[] = { | ||
| 551 | static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { | ||
| 552 | .name = "smartreflex_mpu", | ||
| 553 | .class = &omap44xx_smartreflex_hwmod_class, | ||
| 554 | + .clkdm_name = "l4_ao_clkdm", | ||
| 555 | .mpu_irqs = omap44xx_smartreflex_mpu_irqs, | ||
| 556 | .main_clk = "smartreflex_mpu_fck", | ||
| 557 | .vdd_name = "mpu", | ||
| 558 | @@ -4011,6 +4073,7 @@ static struct omap_hwmod_ocp_if *omap44xx_spinlock_slaves[] = { | ||
| 559 | static struct omap_hwmod omap44xx_spinlock_hwmod = { | ||
| 560 | .name = "spinlock", | ||
| 561 | .class = &omap44xx_spinlock_hwmod_class, | ||
| 562 | + .clkdm_name = "l4_cfg_clkdm", | ||
| 563 | .prcm = { | ||
| 564 | .omap4 = { | ||
| 565 | .clkctrl_reg = OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, | ||
| 566 | @@ -4092,6 +4155,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer1_slaves[] = { | ||
| 567 | static struct omap_hwmod omap44xx_timer1_hwmod = { | ||
| 568 | .name = "timer1", | ||
| 569 | .class = &omap44xx_timer_1ms_hwmod_class, | ||
| 570 | + .clkdm_name = "l4_wkup_clkdm", | ||
| 571 | .mpu_irqs = omap44xx_timer1_irqs, | ||
| 572 | .main_clk = "timer1_fck", | ||
| 573 | .prcm = { | ||
| 574 | @@ -4137,6 +4201,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer2_slaves[] = { | ||
| 575 | static struct omap_hwmod omap44xx_timer2_hwmod = { | ||
| 576 | .name = "timer2", | ||
| 577 | .class = &omap44xx_timer_1ms_hwmod_class, | ||
| 578 | + .clkdm_name = "l4_per_clkdm", | ||
| 579 | .mpu_irqs = omap44xx_timer2_irqs, | ||
| 580 | .main_clk = "timer2_fck", | ||
| 581 | .prcm = { | ||
| 582 | @@ -4182,6 +4247,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer3_slaves[] = { | ||
| 583 | static struct omap_hwmod omap44xx_timer3_hwmod = { | ||
| 584 | .name = "timer3", | ||
| 585 | .class = &omap44xx_timer_hwmod_class, | ||
| 586 | + .clkdm_name = "l4_per_clkdm", | ||
| 587 | .mpu_irqs = omap44xx_timer3_irqs, | ||
| 588 | .main_clk = "timer3_fck", | ||
| 589 | .prcm = { | ||
| 590 | @@ -4227,6 +4293,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer4_slaves[] = { | ||
| 591 | static struct omap_hwmod omap44xx_timer4_hwmod = { | ||
| 592 | .name = "timer4", | ||
| 593 | .class = &omap44xx_timer_hwmod_class, | ||
| 594 | + .clkdm_name = "l4_per_clkdm", | ||
| 595 | .mpu_irqs = omap44xx_timer4_irqs, | ||
| 596 | .main_clk = "timer4_fck", | ||
| 597 | .prcm = { | ||
| 598 | @@ -4291,6 +4358,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer5_slaves[] = { | ||
| 599 | static struct omap_hwmod omap44xx_timer5_hwmod = { | ||
| 600 | .name = "timer5", | ||
| 601 | .class = &omap44xx_timer_hwmod_class, | ||
| 602 | + .clkdm_name = "abe_clkdm", | ||
| 603 | .mpu_irqs = omap44xx_timer5_irqs, | ||
| 604 | .main_clk = "timer5_fck", | ||
| 605 | .prcm = { | ||
| 606 | @@ -4355,6 +4423,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer6_slaves[] = { | ||
| 607 | static struct omap_hwmod omap44xx_timer6_hwmod = { | ||
| 608 | .name = "timer6", | ||
| 609 | .class = &omap44xx_timer_hwmod_class, | ||
| 610 | + .clkdm_name = "abe_clkdm", | ||
| 611 | .mpu_irqs = omap44xx_timer6_irqs, | ||
| 612 | |||
| 613 | .main_clk = "timer6_fck", | ||
| 614 | @@ -4420,6 +4489,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer7_slaves[] = { | ||
| 615 | static struct omap_hwmod omap44xx_timer7_hwmod = { | ||
| 616 | .name = "timer7", | ||
| 617 | .class = &omap44xx_timer_hwmod_class, | ||
| 618 | + .clkdm_name = "abe_clkdm", | ||
| 619 | .mpu_irqs = omap44xx_timer7_irqs, | ||
| 620 | .main_clk = "timer7_fck", | ||
| 621 | .prcm = { | ||
| 622 | @@ -4484,6 +4554,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer8_slaves[] = { | ||
| 623 | static struct omap_hwmod omap44xx_timer8_hwmod = { | ||
| 624 | .name = "timer8", | ||
| 625 | .class = &omap44xx_timer_hwmod_class, | ||
| 626 | + .clkdm_name = "abe_clkdm", | ||
| 627 | .mpu_irqs = omap44xx_timer8_irqs, | ||
| 628 | .main_clk = "timer8_fck", | ||
| 629 | .prcm = { | ||
| 630 | @@ -4529,6 +4600,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer9_slaves[] = { | ||
| 631 | static struct omap_hwmod omap44xx_timer9_hwmod = { | ||
| 632 | .name = "timer9", | ||
| 633 | .class = &omap44xx_timer_hwmod_class, | ||
| 634 | + .clkdm_name = "l4_per_clkdm", | ||
| 635 | .mpu_irqs = omap44xx_timer9_irqs, | ||
| 636 | .main_clk = "timer9_fck", | ||
| 637 | .prcm = { | ||
| 638 | @@ -4574,6 +4646,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer10_slaves[] = { | ||
| 639 | static struct omap_hwmod omap44xx_timer10_hwmod = { | ||
| 640 | .name = "timer10", | ||
| 641 | .class = &omap44xx_timer_1ms_hwmod_class, | ||
| 642 | + .clkdm_name = "l4_per_clkdm", | ||
| 643 | .mpu_irqs = omap44xx_timer10_irqs, | ||
| 644 | .main_clk = "timer10_fck", | ||
| 645 | .prcm = { | ||
| 646 | @@ -4619,6 +4692,7 @@ static struct omap_hwmod_ocp_if *omap44xx_timer11_slaves[] = { | ||
| 647 | static struct omap_hwmod omap44xx_timer11_hwmod = { | ||
| 648 | .name = "timer11", | ||
| 649 | .class = &omap44xx_timer_hwmod_class, | ||
| 650 | + .clkdm_name = "l4_per_clkdm", | ||
| 651 | .mpu_irqs = omap44xx_timer11_irqs, | ||
| 652 | .main_clk = "timer11_fck", | ||
| 653 | .prcm = { | ||
| 654 | @@ -4692,6 +4766,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart1_slaves[] = { | ||
| 655 | static struct omap_hwmod omap44xx_uart1_hwmod = { | ||
| 656 | .name = "uart1", | ||
| 657 | .class = &omap44xx_uart_hwmod_class, | ||
| 658 | + .clkdm_name = "l4_per_clkdm", | ||
| 659 | .mpu_irqs = omap44xx_uart1_irqs, | ||
| 660 | .sdma_reqs = omap44xx_uart1_sdma_reqs, | ||
| 661 | .main_clk = "uart1_fck", | ||
| 662 | @@ -4744,6 +4819,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart2_slaves[] = { | ||
| 663 | static struct omap_hwmod omap44xx_uart2_hwmod = { | ||
| 664 | .name = "uart2", | ||
| 665 | .class = &omap44xx_uart_hwmod_class, | ||
| 666 | + .clkdm_name = "l4_per_clkdm", | ||
| 667 | .mpu_irqs = omap44xx_uart2_irqs, | ||
| 668 | .sdma_reqs = omap44xx_uart2_sdma_reqs, | ||
| 669 | .main_clk = "uart2_fck", | ||
| 670 | @@ -4796,6 +4872,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart3_slaves[] = { | ||
| 671 | static struct omap_hwmod omap44xx_uart3_hwmod = { | ||
| 672 | .name = "uart3", | ||
| 673 | .class = &omap44xx_uart_hwmod_class, | ||
| 674 | + .clkdm_name = "l4_per_clkdm", | ||
| 675 | .flags = HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET, | ||
| 676 | .mpu_irqs = omap44xx_uart3_irqs, | ||
| 677 | .sdma_reqs = omap44xx_uart3_sdma_reqs, | ||
| 678 | @@ -4849,6 +4926,7 @@ static struct omap_hwmod_ocp_if *omap44xx_uart4_slaves[] = { | ||
| 679 | static struct omap_hwmod omap44xx_uart4_hwmod = { | ||
| 680 | .name = "uart4", | ||
| 681 | .class = &omap44xx_uart_hwmod_class, | ||
| 682 | + .clkdm_name = "l4_per_clkdm", | ||
| 683 | .mpu_irqs = omap44xx_uart4_irqs, | ||
| 684 | .sdma_reqs = omap44xx_uart4_sdma_reqs, | ||
| 685 | .main_clk = "uart4_fck", | ||
| 686 | @@ -4927,6 +5005,7 @@ static struct omap_hwmod_opt_clk usb_otg_hs_opt_clks[] = { | ||
| 687 | static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { | ||
| 688 | .name = "usb_otg_hs", | ||
| 689 | .class = &omap44xx_usb_otg_hs_hwmod_class, | ||
| 690 | + .clkdm_name = "l3_init_clkdm", | ||
| 691 | .flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY, | ||
| 692 | .mpu_irqs = omap44xx_usb_otg_hs_irqs, | ||
| 693 | .main_clk = "usb_otg_hs_ick", | ||
| 694 | @@ -5000,6 +5079,7 @@ static struct omap_hwmod_ocp_if *omap44xx_wd_timer2_slaves[] = { | ||
| 695 | static struct omap_hwmod omap44xx_wd_timer2_hwmod = { | ||
| 696 | .name = "wd_timer2", | ||
| 697 | .class = &omap44xx_wd_timer_hwmod_class, | ||
| 698 | + .clkdm_name = "l4_wkup_clkdm", | ||
| 699 | .mpu_irqs = omap44xx_wd_timer2_irqs, | ||
| 700 | .main_clk = "wd_timer2_fck", | ||
| 701 | .prcm = { | ||
| 702 | @@ -5064,6 +5144,7 @@ static struct omap_hwmod_ocp_if *omap44xx_wd_timer3_slaves[] = { | ||
| 703 | static struct omap_hwmod omap44xx_wd_timer3_hwmod = { | ||
| 704 | .name = "wd_timer3", | ||
| 705 | .class = &omap44xx_wd_timer_hwmod_class, | ||
| 706 | + .clkdm_name = "abe_clkdm", | ||
| 707 | .mpu_irqs = omap44xx_wd_timer3_irqs, | ||
| 708 | .main_clk = "wd_timer3_fck", | ||
| 709 | .prcm = { | ||
| 710 | diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 711 | index fafdfe3..21d3922 100644 | ||
| 712 | --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 713 | +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 714 | @@ -515,6 +515,7 @@ struct omap_hwmod { | ||
| 715 | const char *main_clk; | ||
| 716 | struct clk *_clk; | ||
| 717 | struct omap_hwmod_opt_clk *opt_clks; | ||
| 718 | + char *clkdm_name; | ||
| 719 | char *vdd_name; | ||
| 720 | struct voltagedomain *voltdm; | ||
| 721 | struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ | ||
| 722 | -- | ||
| 723 | 1.7.2.5 | ||
| 724 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0078-OMAP2-hwmod-Init-clkdm-field-at-boot-time.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0078-OMAP2-hwmod-Init-clkdm-field-at-boot-time.patch deleted file mode 100644 index db4e932f..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0078-OMAP2-hwmod-Init-clkdm-field-at-boot-time.patch +++ /dev/null | |||
| @@ -1,86 +0,0 @@ | |||
| 1 | From 57d2323014444c5d7f8c8d7e2da0a9737c3d8c28 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:30 -0600 | ||
| 4 | Subject: [PATCH 078/149] OMAP2+: hwmod: Init clkdm field at boot time | ||
| 5 | |||
| 6 | At boot time, lookup the clkdm_name to get the clkdm | ||
| 7 | structure pointer for further usage. | ||
| 8 | |||
| 9 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 10 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 11 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 12 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/omap_hwmod.c | 34 +++++++++++++++++++++++++- | ||
| 15 | arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + | ||
| 16 | 2 files changed, 34 insertions(+), 1 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 19 | index 02b6016..1f6f47f 100644 | ||
| 20 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 21 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 22 | @@ -990,9 +990,40 @@ static struct omap_hwmod *_lookup(const char *name) | ||
| 23 | |||
| 24 | return oh; | ||
| 25 | } | ||
| 26 | +/** | ||
| 27 | + * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod | ||
| 28 | + * @oh: struct omap_hwmod * | ||
| 29 | + * | ||
| 30 | + * Convert a clockdomain name stored in a struct omap_hwmod into a | ||
| 31 | + * clockdomain pointer, and save it into the struct omap_hwmod. | ||
| 32 | + * return -EINVAL if clkdm_name does not exist or if the lookup failed. | ||
| 33 | + */ | ||
| 34 | +static int _init_clkdm(struct omap_hwmod *oh) | ||
| 35 | +{ | ||
| 36 | + if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
| 37 | + return 0; | ||
| 38 | + | ||
| 39 | + if (!oh->clkdm_name) { | ||
| 40 | + pr_warning("omap_hwmod: %s: no clkdm_name\n", oh->name); | ||
| 41 | + return -EINVAL; | ||
| 42 | + } | ||
| 43 | + | ||
| 44 | + oh->clkdm = clkdm_lookup(oh->clkdm_name); | ||
| 45 | + if (!oh->clkdm) { | ||
| 46 | + pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n", | ||
| 47 | + oh->name, oh->clkdm_name); | ||
| 48 | + return -EINVAL; | ||
| 49 | + } | ||
| 50 | + | ||
| 51 | + pr_debug("omap_hwmod: %s: associated to clkdm %s\n", | ||
| 52 | + oh->name, oh->clkdm_name); | ||
| 53 | + | ||
| 54 | + return 0; | ||
| 55 | +} | ||
| 56 | |||
| 57 | /** | ||
| 58 | - * _init_clocks - clk_get() all clocks associated with this hwmod | ||
| 59 | + * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as | ||
| 60 | + * well the clockdomain. | ||
| 61 | * @oh: struct omap_hwmod * | ||
| 62 | * @data: not used; pass NULL | ||
| 63 | * | ||
| 64 | @@ -1012,6 +1043,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) | ||
| 65 | ret |= _init_main_clk(oh); | ||
| 66 | ret |= _init_interface_clks(oh); | ||
| 67 | ret |= _init_opt_clks(oh); | ||
| 68 | + ret |= _init_clkdm(oh); | ||
| 69 | |||
| 70 | if (!ret) | ||
| 71 | oh->_state = _HWMOD_STATE_CLKS_INITED; | ||
| 72 | diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 73 | index 21d3922..3306bdf 100644 | ||
| 74 | --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 75 | +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 76 | @@ -516,6 +516,7 @@ struct omap_hwmod { | ||
| 77 | struct clk *_clk; | ||
| 78 | struct omap_hwmod_opt_clk *opt_clks; | ||
| 79 | char *clkdm_name; | ||
| 80 | + struct clockdomain *clkdm; | ||
| 81 | char *vdd_name; | ||
| 82 | struct voltagedomain *voltdm; | ||
| 83 | struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ | ||
| 84 | -- | ||
| 85 | 1.7.2.5 | ||
| 86 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0079-OMAP4-hwmod-Replace-CLKCTRL-absolute-address-with-of.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0079-OMAP4-hwmod-Replace-CLKCTRL-absolute-address-with-of.patch deleted file mode 100644 index ba3120f9..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0079-OMAP4-hwmod-Replace-CLKCTRL-absolute-address-with-of.patch +++ /dev/null | |||
| @@ -1,976 +0,0 @@ | |||
| 1 | From d112244b9ada88d33ac8e856587a4645c8f11e80 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:30 -0600 | ||
| 4 | Subject: [PATCH 079/149] OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros | ||
| 5 | |||
| 6 | The CLKCTRL register was accessed using an absolute address. | ||
| 7 | The usage of hardcoded macros to calculate virtual address from physical | ||
| 8 | one should be avoided as much as possible. | ||
| 9 | The usage of a offset will allow future improvement like migration from | ||
| 10 | the current architecture code toward a module driver. | ||
| 11 | |||
| 12 | Update cm_xxx accessor, move definition to the proper header file and | ||
| 13 | update copyrights. | ||
| 14 | |||
| 15 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 16 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 17 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 18 | Cc: Todd Poynor <toddpoynor@google.com> | ||
| 19 | [paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; removed empty | ||
| 20 | fn prototype section from cm44xx.h; incorporated comments from Todd; | ||
| 21 | documented some functions] | ||
| 22 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 23 | --- | ||
| 24 | arch/arm/mach-omap2/cm44xx.h | 8 +- | ||
| 25 | arch/arm/mach-omap2/cminst44xx.c | 87 ++++++++++--- | ||
| 26 | arch/arm/mach-omap2/cminst44xx.h | 4 +- | ||
| 27 | arch/arm/mach-omap2/omap_hwmod.c | 12 ++- | ||
| 28 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 182 ++++++++++++++++--------- | ||
| 29 | arch/arm/plat-omap/include/plat/omap_hwmod.h | 2 +- | ||
| 30 | 6 files changed, 198 insertions(+), 97 deletions(-) | ||
| 31 | |||
| 32 | diff --git a/arch/arm/mach-omap2/cm44xx.h b/arch/arm/mach-omap2/cm44xx.h | ||
| 33 | index 0b87ec8..3380bee 100644 | ||
| 34 | --- a/arch/arm/mach-omap2/cm44xx.h | ||
| 35 | +++ b/arch/arm/mach-omap2/cm44xx.h | ||
| 36 | @@ -1,7 +1,7 @@ | ||
| 37 | /* | ||
| 38 | * OMAP4 Clock Management (CM) definitions | ||
| 39 | * | ||
| 40 | - * Copyright (C) 2007-2009 Texas Instruments, Inc. | ||
| 41 | + * Copyright (C) 2007-2011 Texas Instruments, Inc. | ||
| 42 | * Copyright (C) 2007-2009 Nokia Corporation | ||
| 43 | * | ||
| 44 | * Written by Paul Walmsley | ||
| 45 | @@ -23,10 +23,4 @@ | ||
| 46 | #define OMAP4_CM_CLKSTCTRL 0x0000 | ||
| 47 | #define OMAP4_CM_STATICDEP 0x0004 | ||
| 48 | |||
| 49 | -/* Function prototypes */ | ||
| 50 | -# ifndef __ASSEMBLER__ | ||
| 51 | - | ||
| 52 | -extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg); | ||
| 53 | - | ||
| 54 | -# endif | ||
| 55 | #endif | ||
| 56 | diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c | ||
| 57 | index a482bfa..9033dd4 100644 | ||
| 58 | --- a/arch/arm/mach-omap2/cminst44xx.c | ||
| 59 | +++ b/arch/arm/mach-omap2/cminst44xx.c | ||
| 60 | @@ -2,6 +2,7 @@ | ||
| 61 | * OMAP4 CM instance functions | ||
| 62 | * | ||
| 63 | * Copyright (C) 2009 Nokia Corporation | ||
| 64 | + * Copyright (C) 2011 Texas Instruments, Inc. | ||
| 65 | * Paul Walmsley | ||
| 66 | * | ||
| 67 | * This program is free software; you can redistribute it and/or modify | ||
| 68 | @@ -32,6 +33,22 @@ | ||
| 69 | #include "prm44xx.h" | ||
| 70 | #include "prcm_mpu44xx.h" | ||
| 71 | |||
| 72 | +/* | ||
| 73 | + * CLKCTRL_IDLEST_*: possible values for the CM_*_CLKCTRL.IDLEST bitfield: | ||
| 74 | + * | ||
| 75 | + * 0x0 func: Module is fully functional, including OCP | ||
| 76 | + * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep | ||
| 77 | + * abortion | ||
| 78 | + * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if | ||
| 79 | + * using separate functional clock | ||
| 80 | + * 0x3 disabled: Module is disabled and cannot be accessed | ||
| 81 | + * | ||
| 82 | + */ | ||
| 83 | +#define CLKCTRL_IDLEST_FUNCTIONAL 0x0 | ||
| 84 | +#define CLKCTRL_IDLEST_INTRANSITION 0x1 | ||
| 85 | +#define CLKCTRL_IDLEST_INTERFACE_IDLE 0x2 | ||
| 86 | +#define CLKCTRL_IDLEST_DISABLED 0x3 | ||
| 87 | + | ||
| 88 | static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { | ||
| 89 | [OMAP4430_INVALID_PRCM_PARTITION] = 0, | ||
| 90 | [OMAP4430_PRM_PARTITION] = OMAP4430_PRM_BASE, | ||
| 91 | @@ -41,6 +58,48 @@ static u32 _cm_bases[OMAP4_MAX_PRCM_PARTITIONS] = { | ||
| 92 | [OMAP4430_PRCM_MPU_PARTITION] = OMAP4430_PRCM_MPU_BASE, | ||
| 93 | }; | ||
| 94 | |||
| 95 | +/* Private functions */ | ||
| 96 | + | ||
| 97 | +/** | ||
| 98 | + * _clkctrl_idlest - read a CM_*_CLKCTRL register; mask & shift IDLEST bitfield | ||
| 99 | + * @part: PRCM partition ID that the CM_CLKCTRL register exists in | ||
| 100 | + * @inst: CM instance register offset (*_INST macro) | ||
| 101 | + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) | ||
| 102 | + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) | ||
| 103 | + * | ||
| 104 | + * Return the IDLEST bitfield of a CM_*_CLKCTRL register, shifted down to | ||
| 105 | + * bit 0. | ||
| 106 | + */ | ||
| 107 | +static u32 _clkctrl_idlest(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) | ||
| 108 | +{ | ||
| 109 | + u32 v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); | ||
| 110 | + v &= OMAP4430_IDLEST_MASK; | ||
| 111 | + v >>= OMAP4430_IDLEST_SHIFT; | ||
| 112 | + return v; | ||
| 113 | +} | ||
| 114 | + | ||
| 115 | +/** | ||
| 116 | + * _is_module_ready - can module registers be accessed without causing an abort? | ||
| 117 | + * @part: PRCM partition ID that the CM_CLKCTRL register exists in | ||
| 118 | + * @inst: CM instance register offset (*_INST macro) | ||
| 119 | + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) | ||
| 120 | + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) | ||
| 121 | + * | ||
| 122 | + * Returns true if the module's CM_*_CLKCTRL.IDLEST bitfield is either | ||
| 123 | + * *FUNCTIONAL or *INTERFACE_IDLE; false otherwise. | ||
| 124 | + */ | ||
| 125 | +static bool _is_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) | ||
| 126 | +{ | ||
| 127 | + u32 v; | ||
| 128 | + | ||
| 129 | + v = _clkctrl_idlest(part, inst, cdoffs, clkctrl_offs); | ||
| 130 | + | ||
| 131 | + return (v == CLKCTRL_IDLEST_FUNCTIONAL || | ||
| 132 | + v == CLKCTRL_IDLEST_INTERFACE_IDLE) ? true : false; | ||
| 133 | +} | ||
| 134 | + | ||
| 135 | +/* Public functions */ | ||
| 136 | + | ||
| 137 | /* Read a register in a CM instance */ | ||
| 138 | u32 omap4_cminst_read_inst_reg(u8 part, s16 inst, u16 idx) | ||
| 139 | { | ||
| 140 | @@ -200,35 +259,27 @@ void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs) | ||
| 141 | */ | ||
| 142 | |||
| 143 | /** | ||
| 144 | - * omap4_cm_wait_module_ready - wait for a module to be in 'func' state | ||
| 145 | - * @clkctrl_reg: CLKCTRL module address | ||
| 146 | + * omap4_cminst_wait_module_ready - wait for a module to be in 'func' state | ||
| 147 | + * @part: PRCM partition ID that the CM_CLKCTRL register exists in | ||
| 148 | + * @inst: CM instance register offset (*_INST macro) | ||
| 149 | + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) | ||
| 150 | + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) | ||
| 151 | * | ||
| 152 | * Wait for the module IDLEST to be functional. If the idle state is in any | ||
| 153 | * the non functional state (trans, idle or disabled), module and thus the | ||
| 154 | * sysconfig cannot be accessed and will probably lead to an "imprecise | ||
| 155 | * external abort" | ||
| 156 | - * | ||
| 157 | - * Module idle state: | ||
| 158 | - * 0x0 func: Module is fully functional, including OCP | ||
| 159 | - * 0x1 trans: Module is performing transition: wakeup, or sleep, or sleep | ||
| 160 | - * abortion | ||
| 161 | - * 0x2 idle: Module is in Idle mode (only OCP part). It is functional if | ||
| 162 | - * using separate functional clock | ||
| 163 | - * 0x3 disabled: Module is disabled and cannot be accessed | ||
| 164 | - * | ||
| 165 | */ | ||
| 166 | -int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg) | ||
| 167 | +int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, | ||
| 168 | + u16 clkctrl_offs) | ||
| 169 | { | ||
| 170 | int i = 0; | ||
| 171 | |||
| 172 | - if (!clkctrl_reg) | ||
| 173 | + if (!clkctrl_offs) | ||
| 174 | return 0; | ||
| 175 | |||
| 176 | - omap_test_timeout(( | ||
| 177 | - ((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) == 0) || | ||
| 178 | - (((__raw_readl(clkctrl_reg) & OMAP4430_IDLEST_MASK) >> | ||
| 179 | - OMAP4430_IDLEST_SHIFT) == 0x2)), | ||
| 180 | - MAX_MODULE_READY_TIME, i); | ||
| 181 | + omap_test_timeout(_is_module_ready(part, inst, cdoffs, clkctrl_offs), | ||
| 182 | + MAX_MODULE_READY_TIME, i); | ||
| 183 | |||
| 184 | return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; | ||
| 185 | } | ||
| 186 | diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h | ||
| 187 | index 2b32c18..8eba2ae 100644 | ||
| 188 | --- a/arch/arm/mach-omap2/cminst44xx.h | ||
| 189 | +++ b/arch/arm/mach-omap2/cminst44xx.h | ||
| 190 | @@ -17,6 +17,8 @@ extern void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs); | ||
| 191 | extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); | ||
| 192 | extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); | ||
| 193 | |||
| 194 | +extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); | ||
| 195 | + | ||
| 196 | /* | ||
| 197 | * In an ideal world, we would not export these low-level functions, | ||
| 198 | * but this will probably take some time to fix properly | ||
| 199 | @@ -32,6 +34,4 @@ extern u32 omap4_cminst_clear_inst_reg_bits(u32 bits, u8 part, s16 inst, | ||
| 200 | extern u32 omap4_cminst_read_inst_reg_bits(u8 part, u16 inst, s16 idx, | ||
| 201 | u32 mask); | ||
| 202 | |||
| 203 | -extern int omap4_cm_wait_module_ready(void __iomem *clkctrl_reg); | ||
| 204 | - | ||
| 205 | #endif | ||
| 206 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 207 | index 1f6f47f..00241ea 100644 | ||
| 208 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 209 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 210 | @@ -146,7 +146,7 @@ | ||
| 211 | #include <plat/prcm.h> | ||
| 212 | |||
| 213 | #include "cm2xxx_3xxx.h" | ||
| 214 | -#include "cm44xx.h" | ||
| 215 | +#include "cminst44xx.h" | ||
| 216 | #include "prm2xxx_3xxx.h" | ||
| 217 | #include "prm44xx.h" | ||
| 218 | #include "mux.h" | ||
| 219 | @@ -1060,7 +1060,7 @@ static int _init_clocks(struct omap_hwmod *oh, void *data) | ||
| 220 | * Wait for a module @oh to leave slave idle. Returns 0 if the module | ||
| 221 | * does not have an IDLEST bit or if the module successfully leaves | ||
| 222 | * slave idle; otherwise, pass along the return value of the | ||
| 223 | - * appropriate *_cm_wait_module_ready() function. | ||
| 224 | + * appropriate *_cm*_wait_module_ready() function. | ||
| 225 | */ | ||
| 226 | static int _wait_target_ready(struct omap_hwmod *oh) | ||
| 227 | { | ||
| 228 | @@ -1087,7 +1087,13 @@ static int _wait_target_ready(struct omap_hwmod *oh) | ||
| 229 | oh->prcm.omap2.idlest_reg_id, | ||
| 230 | oh->prcm.omap2.idlest_idle_bit); | ||
| 231 | } else if (cpu_is_omap44xx()) { | ||
| 232 | - ret = omap4_cm_wait_module_ready(oh->prcm.omap4.clkctrl_reg); | ||
| 233 | + if (!oh->clkdm) | ||
| 234 | + return -EINVAL; | ||
| 235 | + | ||
| 236 | + ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition, | ||
| 237 | + oh->clkdm->cm_inst, | ||
| 238 | + oh->clkdm->clkdm_offs, | ||
| 239 | + oh->prcm.omap4.clkctrl_offs); | ||
| 240 | } else { | ||
| 241 | BUG(); | ||
| 242 | }; | ||
| 243 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 244 | index becae45..00d7130 100644 | ||
| 245 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 246 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 247 | @@ -124,6 +124,11 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { | ||
| 248 | .name = "dmm", | ||
| 249 | .class = &omap44xx_dmm_hwmod_class, | ||
| 250 | .clkdm_name = "l3_emif_clkdm", | ||
| 251 | + .prcm = { | ||
| 252 | + .omap4 = { | ||
| 253 | + .clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET, | ||
| 254 | + }, | ||
| 255 | + }, | ||
| 256 | .slaves = omap44xx_dmm_slaves, | ||
| 257 | .slaves_cnt = ARRAY_SIZE(omap44xx_dmm_slaves), | ||
| 258 | .mpu_irqs = omap44xx_dmm_irqs, | ||
| 259 | @@ -175,6 +180,11 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = { | ||
| 260 | .name = "emif_fw", | ||
| 261 | .class = &omap44xx_emif_fw_hwmod_class, | ||
| 262 | .clkdm_name = "l3_emif_clkdm", | ||
| 263 | + .prcm = { | ||
| 264 | + .omap4 = { | ||
| 265 | + .clkctrl_offs = OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET, | ||
| 266 | + }, | ||
| 267 | + }, | ||
| 268 | .slaves = omap44xx_emif_fw_slaves, | ||
| 269 | .slaves_cnt = ARRAY_SIZE(omap44xx_emif_fw_slaves), | ||
| 270 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 271 | @@ -215,6 +225,11 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { | ||
| 272 | .name = "l3_instr", | ||
| 273 | .class = &omap44xx_l3_hwmod_class, | ||
| 274 | .clkdm_name = "l3_instr_clkdm", | ||
| 275 | + .prcm = { | ||
| 276 | + .omap4 = { | ||
| 277 | + .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, | ||
| 278 | + }, | ||
| 279 | + }, | ||
| 280 | .slaves = omap44xx_l3_instr_slaves, | ||
| 281 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_instr_slaves), | ||
| 282 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 283 | @@ -309,6 +324,11 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { | ||
| 284 | .class = &omap44xx_l3_hwmod_class, | ||
| 285 | .clkdm_name = "l3_1_clkdm", | ||
| 286 | .mpu_irqs = omap44xx_l3_main_1_irqs, | ||
| 287 | + .prcm = { | ||
| 288 | + .omap4 = { | ||
| 289 | + .clkctrl_offs = OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET, | ||
| 290 | + }, | ||
| 291 | + }, | ||
| 292 | .slaves = omap44xx_l3_main_1_slaves, | ||
| 293 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_1_slaves), | ||
| 294 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 295 | @@ -405,6 +425,11 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { | ||
| 296 | .name = "l3_main_2", | ||
| 297 | .class = &omap44xx_l3_hwmod_class, | ||
| 298 | .clkdm_name = "l3_2_clkdm", | ||
| 299 | + .prcm = { | ||
| 300 | + .omap4 = { | ||
| 301 | + .clkctrl_offs = OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET, | ||
| 302 | + }, | ||
| 303 | + }, | ||
| 304 | .slaves = omap44xx_l3_main_2_slaves, | ||
| 305 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_2_slaves), | ||
| 306 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 307 | @@ -456,6 +481,11 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = { | ||
| 308 | .name = "l3_main_3", | ||
| 309 | .class = &omap44xx_l3_hwmod_class, | ||
| 310 | .clkdm_name = "l3_instr_clkdm", | ||
| 311 | + .prcm = { | ||
| 312 | + .omap4 = { | ||
| 313 | + .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, | ||
| 314 | + }, | ||
| 315 | + }, | ||
| 316 | .slaves = omap44xx_l3_main_3_slaves, | ||
| 317 | .slaves_cnt = ARRAY_SIZE(omap44xx_l3_main_3_slaves), | ||
| 318 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 319 | @@ -514,6 +544,11 @@ static struct omap_hwmod omap44xx_l4_abe_hwmod = { | ||
| 320 | .name = "l4_abe", | ||
| 321 | .class = &omap44xx_l4_hwmod_class, | ||
| 322 | .clkdm_name = "abe_clkdm", | ||
| 323 | + .prcm = { | ||
| 324 | + .omap4 = { | ||
| 325 | + .clkctrl_offs = OMAP4_CM1_ABE_L4ABE_CLKCTRL_OFFSET, | ||
| 326 | + }, | ||
| 327 | + }, | ||
| 328 | .slaves = omap44xx_l4_abe_slaves, | ||
| 329 | .slaves_cnt = ARRAY_SIZE(omap44xx_l4_abe_slaves), | ||
| 330 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 331 | @@ -537,6 +572,11 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { | ||
| 332 | .name = "l4_cfg", | ||
| 333 | .class = &omap44xx_l4_hwmod_class, | ||
| 334 | .clkdm_name = "l4_cfg_clkdm", | ||
| 335 | + .prcm = { | ||
| 336 | + .omap4 = { | ||
| 337 | + .clkctrl_offs = OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET, | ||
| 338 | + }, | ||
| 339 | + }, | ||
| 340 | .slaves = omap44xx_l4_cfg_slaves, | ||
| 341 | .slaves_cnt = ARRAY_SIZE(omap44xx_l4_cfg_slaves), | ||
| 342 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 343 | @@ -560,6 +600,11 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { | ||
| 344 | .name = "l4_per", | ||
| 345 | .class = &omap44xx_l4_hwmod_class, | ||
| 346 | .clkdm_name = "l4_per_clkdm", | ||
| 347 | + .prcm = { | ||
| 348 | + .omap4 = { | ||
| 349 | + .clkctrl_offs = OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET, | ||
| 350 | + }, | ||
| 351 | + }, | ||
| 352 | .slaves = omap44xx_l4_per_slaves, | ||
| 353 | .slaves_cnt = ARRAY_SIZE(omap44xx_l4_per_slaves), | ||
| 354 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 355 | @@ -583,6 +628,11 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = { | ||
| 356 | .name = "l4_wkup", | ||
| 357 | .class = &omap44xx_l4_hwmod_class, | ||
| 358 | .clkdm_name = "l4_wkup_clkdm", | ||
| 359 | + .prcm = { | ||
| 360 | + .omap4 = { | ||
| 361 | + .clkctrl_offs = OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET, | ||
| 362 | + }, | ||
| 363 | + }, | ||
| 364 | .slaves = omap44xx_l4_wkup_slaves, | ||
| 365 | .slaves_cnt = ARRAY_SIZE(omap44xx_l4_wkup_slaves), | ||
| 366 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 367 | @@ -758,7 +808,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { | ||
| 368 | .main_clk = "aess_fck", | ||
| 369 | .prcm = { | ||
| 370 | .omap4 = { | ||
| 371 | - .clkctrl_reg = OMAP4430_CM1_ABE_AESS_CLKCTRL, | ||
| 372 | + .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, | ||
| 373 | }, | ||
| 374 | }, | ||
| 375 | .slaves = omap44xx_aess_slaves, | ||
| 376 | @@ -788,7 +838,7 @@ static struct omap_hwmod omap44xx_bandgap_hwmod = { | ||
| 377 | .clkdm_name = "l4_wkup_clkdm", | ||
| 378 | .prcm = { | ||
| 379 | .omap4 = { | ||
| 380 | - .clkctrl_reg = OMAP4430_CM_WKUP_BANDGAP_CLKCTRL, | ||
| 381 | + .clkctrl_offs = OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET, | ||
| 382 | }, | ||
| 383 | }, | ||
| 384 | .opt_clks = bandgap_opt_clks, | ||
| 385 | @@ -848,7 +898,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { | ||
| 386 | .main_clk = "sys_32k_ck", | ||
| 387 | .prcm = { | ||
| 388 | .omap4 = { | ||
| 389 | - .clkctrl_reg = OMAP4430_CM_WKUP_SYNCTIMER_CLKCTRL, | ||
| 390 | + .clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, | ||
| 391 | }, | ||
| 392 | }, | ||
| 393 | .slaves = omap44xx_counter_32k_slaves, | ||
| 394 | @@ -932,7 +982,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { | ||
| 395 | .main_clk = "l3_div_ck", | ||
| 396 | .prcm = { | ||
| 397 | .omap4 = { | ||
| 398 | - .clkctrl_reg = OMAP4430_CM_SDMA_SDMA_CLKCTRL, | ||
| 399 | + .clkctrl_offs = OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET, | ||
| 400 | }, | ||
| 401 | }, | ||
| 402 | .dev_attr = &dma_dev_attr, | ||
| 403 | @@ -1026,7 +1076,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { | ||
| 404 | .main_clk = "dmic_fck", | ||
| 405 | .prcm = { | ||
| 406 | .omap4 = { | ||
| 407 | - .clkctrl_reg = OMAP4430_CM1_ABE_DMIC_CLKCTRL, | ||
| 408 | + .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, | ||
| 409 | }, | ||
| 410 | }, | ||
| 411 | .slaves = omap44xx_dmic_slaves, | ||
| 412 | @@ -1110,7 +1160,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { | ||
| 413 | .main_clk = "dsp_fck", | ||
| 414 | .prcm = { | ||
| 415 | .omap4 = { | ||
| 416 | - .clkctrl_reg = OMAP4430_CM_TESLA_TESLA_CLKCTRL, | ||
| 417 | + .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, | ||
| 418 | .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, | ||
| 419 | }, | ||
| 420 | }, | ||
| 421 | @@ -1199,7 +1249,7 @@ static struct omap_hwmod omap44xx_dss_hwmod = { | ||
| 422 | .main_clk = "dss_dss_clk", | ||
| 423 | .prcm = { | ||
| 424 | .omap4 = { | ||
| 425 | - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 426 | + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 427 | }, | ||
| 428 | }, | ||
| 429 | .opt_clks = dss_opt_clks, | ||
| 430 | @@ -1303,7 +1353,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | ||
| 431 | .main_clk = "dss_dss_clk", | ||
| 432 | .prcm = { | ||
| 433 | .omap4 = { | ||
| 434 | - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 435 | + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 436 | }, | ||
| 437 | }, | ||
| 438 | .opt_clks = dss_dispc_opt_clks, | ||
| 439 | @@ -1401,7 +1451,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | ||
| 440 | .main_clk = "dss_dss_clk", | ||
| 441 | .prcm = { | ||
| 442 | .omap4 = { | ||
| 443 | - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 444 | + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 445 | }, | ||
| 446 | }, | ||
| 447 | .opt_clks = dss_dsi1_opt_clks, | ||
| 448 | @@ -1478,7 +1528,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { | ||
| 449 | .main_clk = "dss_dss_clk", | ||
| 450 | .prcm = { | ||
| 451 | .omap4 = { | ||
| 452 | - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 453 | + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 454 | }, | ||
| 455 | }, | ||
| 456 | .opt_clks = dss_dsi2_opt_clks, | ||
| 457 | @@ -1575,7 +1625,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | ||
| 458 | .main_clk = "dss_dss_clk", | ||
| 459 | .prcm = { | ||
| 460 | .omap4 = { | ||
| 461 | - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 462 | + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 463 | }, | ||
| 464 | }, | ||
| 465 | .opt_clks = dss_hdmi_opt_clks, | ||
| 466 | @@ -1666,7 +1716,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { | ||
| 467 | .main_clk = "dss_dss_clk", | ||
| 468 | .prcm = { | ||
| 469 | .omap4 = { | ||
| 470 | - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 471 | + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 472 | }, | ||
| 473 | }, | ||
| 474 | .opt_clks = dss_rfbi_opt_clks, | ||
| 475 | @@ -1736,7 +1786,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { | ||
| 476 | .main_clk = "dss_dss_clk", | ||
| 477 | .prcm = { | ||
| 478 | .omap4 = { | ||
| 479 | - .clkctrl_reg = OMAP4430_CM_DSS_DSS_CLKCTRL, | ||
| 480 | + .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 481 | }, | ||
| 482 | }, | ||
| 483 | .slaves = omap44xx_dss_venc_slaves, | ||
| 484 | @@ -1815,7 +1865,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { | ||
| 485 | .main_clk = "gpio1_ick", | ||
| 486 | .prcm = { | ||
| 487 | .omap4 = { | ||
| 488 | - .clkctrl_reg = OMAP4430_CM_WKUP_GPIO1_CLKCTRL, | ||
| 489 | + .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, | ||
| 490 | }, | ||
| 491 | }, | ||
| 492 | .opt_clks = gpio1_opt_clks, | ||
| 493 | @@ -1869,7 +1919,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { | ||
| 494 | .main_clk = "gpio2_ick", | ||
| 495 | .prcm = { | ||
| 496 | .omap4 = { | ||
| 497 | - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO2_CLKCTRL, | ||
| 498 | + .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, | ||
| 499 | }, | ||
| 500 | }, | ||
| 501 | .opt_clks = gpio2_opt_clks, | ||
| 502 | @@ -1923,7 +1973,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { | ||
| 503 | .main_clk = "gpio3_ick", | ||
| 504 | .prcm = { | ||
| 505 | .omap4 = { | ||
| 506 | - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO3_CLKCTRL, | ||
| 507 | + .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, | ||
| 508 | }, | ||
| 509 | }, | ||
| 510 | .opt_clks = gpio3_opt_clks, | ||
| 511 | @@ -1977,7 +2027,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { | ||
| 512 | .main_clk = "gpio4_ick", | ||
| 513 | .prcm = { | ||
| 514 | .omap4 = { | ||
| 515 | - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO4_CLKCTRL, | ||
| 516 | + .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, | ||
| 517 | }, | ||
| 518 | }, | ||
| 519 | .opt_clks = gpio4_opt_clks, | ||
| 520 | @@ -2031,7 +2081,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { | ||
| 521 | .main_clk = "gpio5_ick", | ||
| 522 | .prcm = { | ||
| 523 | .omap4 = { | ||
| 524 | - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO5_CLKCTRL, | ||
| 525 | + .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, | ||
| 526 | }, | ||
| 527 | }, | ||
| 528 | .opt_clks = gpio5_opt_clks, | ||
| 529 | @@ -2085,7 +2135,7 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { | ||
| 530 | .main_clk = "gpio6_ick", | ||
| 531 | .prcm = { | ||
| 532 | .omap4 = { | ||
| 533 | - .clkctrl_reg = OMAP4430_CM_L4PER_GPIO6_CLKCTRL, | ||
| 534 | + .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, | ||
| 535 | }, | ||
| 536 | }, | ||
| 537 | .opt_clks = gpio6_opt_clks, | ||
| 538 | @@ -2164,7 +2214,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { | ||
| 539 | .main_clk = "hsi_fck", | ||
| 540 | .prcm = { | ||
| 541 | .omap4 = { | ||
| 542 | - .clkctrl_reg = OMAP4430_CM_L3INIT_HSI_CLKCTRL, | ||
| 543 | + .clkctrl_offs = OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, | ||
| 544 | }, | ||
| 545 | }, | ||
| 546 | .slaves = omap44xx_hsi_slaves, | ||
| 547 | @@ -2247,7 +2297,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { | ||
| 548 | .main_clk = "i2c1_fck", | ||
| 549 | .prcm = { | ||
| 550 | .omap4 = { | ||
| 551 | - .clkctrl_reg = OMAP4430_CM_L4PER_I2C1_CLKCTRL, | ||
| 552 | + .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, | ||
| 553 | }, | ||
| 554 | }, | ||
| 555 | .slaves = omap44xx_i2c1_slaves, | ||
| 556 | @@ -2302,7 +2352,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { | ||
| 557 | .main_clk = "i2c2_fck", | ||
| 558 | .prcm = { | ||
| 559 | .omap4 = { | ||
| 560 | - .clkctrl_reg = OMAP4430_CM_L4PER_I2C2_CLKCTRL, | ||
| 561 | + .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, | ||
| 562 | }, | ||
| 563 | }, | ||
| 564 | .slaves = omap44xx_i2c2_slaves, | ||
| 565 | @@ -2357,7 +2407,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { | ||
| 566 | .main_clk = "i2c3_fck", | ||
| 567 | .prcm = { | ||
| 568 | .omap4 = { | ||
| 569 | - .clkctrl_reg = OMAP4430_CM_L4PER_I2C3_CLKCTRL, | ||
| 570 | + .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, | ||
| 571 | }, | ||
| 572 | }, | ||
| 573 | .slaves = omap44xx_i2c3_slaves, | ||
| 574 | @@ -2412,7 +2462,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { | ||
| 575 | .main_clk = "i2c4_fck", | ||
| 576 | .prcm = { | ||
| 577 | .omap4 = { | ||
| 578 | - .clkctrl_reg = OMAP4430_CM_L4PER_I2C4_CLKCTRL, | ||
| 579 | + .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, | ||
| 580 | }, | ||
| 581 | }, | ||
| 582 | .slaves = omap44xx_i2c4_slaves, | ||
| 583 | @@ -2508,7 +2558,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { | ||
| 584 | .main_clk = "ipu_fck", | ||
| 585 | .prcm = { | ||
| 586 | .omap4 = { | ||
| 587 | - .clkctrl_reg = OMAP4430_CM_DUCATI_DUCATI_CLKCTRL, | ||
| 588 | + .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, | ||
| 589 | .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, | ||
| 590 | }, | ||
| 591 | }, | ||
| 592 | @@ -2595,7 +2645,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { | ||
| 593 | .main_clk = "iss_fck", | ||
| 594 | .prcm = { | ||
| 595 | .omap4 = { | ||
| 596 | - .clkctrl_reg = OMAP4430_CM_CAM_ISS_CLKCTRL, | ||
| 597 | + .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, | ||
| 598 | }, | ||
| 599 | }, | ||
| 600 | .opt_clks = iss_opt_clks, | ||
| 601 | @@ -2708,7 +2758,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { | ||
| 602 | .main_clk = "iva_fck", | ||
| 603 | .prcm = { | ||
| 604 | .omap4 = { | ||
| 605 | - .clkctrl_reg = OMAP4430_CM_IVAHD_IVAHD_CLKCTRL, | ||
| 606 | + .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, | ||
| 607 | .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, | ||
| 608 | }, | ||
| 609 | }, | ||
| 610 | @@ -2779,7 +2829,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { | ||
| 611 | .main_clk = "kbd_fck", | ||
| 612 | .prcm = { | ||
| 613 | .omap4 = { | ||
| 614 | - .clkctrl_reg = OMAP4430_CM_WKUP_KEYBOARD_CLKCTRL, | ||
| 615 | + .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, | ||
| 616 | }, | ||
| 617 | }, | ||
| 618 | .slaves = omap44xx_kbd_slaves, | ||
| 619 | @@ -2844,7 +2894,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { | ||
| 620 | .mpu_irqs = omap44xx_mailbox_irqs, | ||
| 621 | .prcm = { | ||
| 622 | .omap4 = { | ||
| 623 | - .clkctrl_reg = OMAP4430_CM_L4CFG_MAILBOX_CLKCTRL, | ||
| 624 | + .clkctrl_offs = OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET, | ||
| 625 | }, | ||
| 626 | }, | ||
| 627 | .slaves = omap44xx_mailbox_slaves, | ||
| 628 | @@ -2937,7 +2987,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { | ||
| 629 | .main_clk = "mcbsp1_fck", | ||
| 630 | .prcm = { | ||
| 631 | .omap4 = { | ||
| 632 | - .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP1_CLKCTRL, | ||
| 633 | + .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, | ||
| 634 | }, | ||
| 635 | }, | ||
| 636 | .slaves = omap44xx_mcbsp1_slaves, | ||
| 637 | @@ -3011,7 +3061,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { | ||
| 638 | .main_clk = "mcbsp2_fck", | ||
| 639 | .prcm = { | ||
| 640 | .omap4 = { | ||
| 641 | - .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP2_CLKCTRL, | ||
| 642 | + .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, | ||
| 643 | }, | ||
| 644 | }, | ||
| 645 | .slaves = omap44xx_mcbsp2_slaves, | ||
| 646 | @@ -3085,7 +3135,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { | ||
| 647 | .main_clk = "mcbsp3_fck", | ||
| 648 | .prcm = { | ||
| 649 | .omap4 = { | ||
| 650 | - .clkctrl_reg = OMAP4430_CM1_ABE_MCBSP3_CLKCTRL, | ||
| 651 | + .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, | ||
| 652 | }, | ||
| 653 | }, | ||
| 654 | .slaves = omap44xx_mcbsp3_slaves, | ||
| 655 | @@ -3138,7 +3188,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { | ||
| 656 | .main_clk = "mcbsp4_fck", | ||
| 657 | .prcm = { | ||
| 658 | .omap4 = { | ||
| 659 | - .clkctrl_reg = OMAP4430_CM_L4PER_MCBSP4_CLKCTRL, | ||
| 660 | + .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, | ||
| 661 | }, | ||
| 662 | }, | ||
| 663 | .slaves = omap44xx_mcbsp4_slaves, | ||
| 664 | @@ -3231,7 +3281,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { | ||
| 665 | .main_clk = "mcpdm_fck", | ||
| 666 | .prcm = { | ||
| 667 | .omap4 = { | ||
| 668 | - .clkctrl_reg = OMAP4430_CM1_ABE_PDM_CLKCTRL, | ||
| 669 | + .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, | ||
| 670 | }, | ||
| 671 | }, | ||
| 672 | .slaves = omap44xx_mcpdm_slaves, | ||
| 673 | @@ -3317,7 +3367,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { | ||
| 674 | .main_clk = "mcspi1_fck", | ||
| 675 | .prcm = { | ||
| 676 | .omap4 = { | ||
| 677 | - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI1_CLKCTRL, | ||
| 678 | + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, | ||
| 679 | }, | ||
| 680 | }, | ||
| 681 | .dev_attr = &mcspi1_dev_attr, | ||
| 682 | @@ -3378,7 +3428,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { | ||
| 683 | .main_clk = "mcspi2_fck", | ||
| 684 | .prcm = { | ||
| 685 | .omap4 = { | ||
| 686 | - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI2_CLKCTRL, | ||
| 687 | + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, | ||
| 688 | }, | ||
| 689 | }, | ||
| 690 | .dev_attr = &mcspi2_dev_attr, | ||
| 691 | @@ -3439,7 +3489,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { | ||
| 692 | .main_clk = "mcspi3_fck", | ||
| 693 | .prcm = { | ||
| 694 | .omap4 = { | ||
| 695 | - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI3_CLKCTRL, | ||
| 696 | + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, | ||
| 697 | }, | ||
| 698 | }, | ||
| 699 | .dev_attr = &mcspi3_dev_attr, | ||
| 700 | @@ -3498,7 +3548,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { | ||
| 701 | .main_clk = "mcspi4_fck", | ||
| 702 | .prcm = { | ||
| 703 | .omap4 = { | ||
| 704 | - .clkctrl_reg = OMAP4430_CM_L4PER_MCSPI4_CLKCTRL, | ||
| 705 | + .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, | ||
| 706 | }, | ||
| 707 | }, | ||
| 708 | .dev_attr = &mcspi4_dev_attr, | ||
| 709 | @@ -3583,7 +3633,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { | ||
| 710 | .main_clk = "mmc1_fck", | ||
| 711 | .prcm = { | ||
| 712 | .omap4 = { | ||
| 713 | - .clkctrl_reg = OMAP4430_CM_L3INIT_MMC1_CLKCTRL, | ||
| 714 | + .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, | ||
| 715 | }, | ||
| 716 | }, | ||
| 717 | .dev_attr = &mmc1_dev_attr, | ||
| 718 | @@ -3643,7 +3693,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { | ||
| 719 | .main_clk = "mmc2_fck", | ||
| 720 | .prcm = { | ||
| 721 | .omap4 = { | ||
| 722 | - .clkctrl_reg = OMAP4430_CM_L3INIT_MMC2_CLKCTRL, | ||
| 723 | + .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, | ||
| 724 | }, | ||
| 725 | }, | ||
| 726 | .slaves = omap44xx_mmc2_slaves, | ||
| 727 | @@ -3698,7 +3748,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { | ||
| 728 | .main_clk = "mmc3_fck", | ||
| 729 | .prcm = { | ||
| 730 | .omap4 = { | ||
| 731 | - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD3_CLKCTRL, | ||
| 732 | + .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, | ||
| 733 | }, | ||
| 734 | }, | ||
| 735 | .slaves = omap44xx_mmc3_slaves, | ||
| 736 | @@ -3752,7 +3802,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { | ||
| 737 | .main_clk = "mmc4_fck", | ||
| 738 | .prcm = { | ||
| 739 | .omap4 = { | ||
| 740 | - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD4_CLKCTRL, | ||
| 741 | + .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, | ||
| 742 | }, | ||
| 743 | }, | ||
| 744 | .slaves = omap44xx_mmc4_slaves, | ||
| 745 | @@ -3805,7 +3855,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { | ||
| 746 | .main_clk = "mmc5_fck", | ||
| 747 | .prcm = { | ||
| 748 | .omap4 = { | ||
| 749 | - .clkctrl_reg = OMAP4430_CM_L4PER_MMCSD5_CLKCTRL, | ||
| 750 | + .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, | ||
| 751 | }, | ||
| 752 | }, | ||
| 753 | .slaves = omap44xx_mmc5_slaves, | ||
| 754 | @@ -3846,7 +3896,7 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { | ||
| 755 | .main_clk = "dpll_mpu_m2_ck", | ||
| 756 | .prcm = { | ||
| 757 | .omap4 = { | ||
| 758 | - .clkctrl_reg = OMAP4430_CM_MPU_MPU_CLKCTRL, | ||
| 759 | + .clkctrl_offs = OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET, | ||
| 760 | }, | ||
| 761 | }, | ||
| 762 | .masters = omap44xx_mpu_masters, | ||
| 763 | @@ -3920,7 +3970,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { | ||
| 764 | .vdd_name = "core", | ||
| 765 | .prcm = { | ||
| 766 | .omap4 = { | ||
| 767 | - .clkctrl_reg = OMAP4430_CM_ALWON_SR_CORE_CLKCTRL, | ||
| 768 | + .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, | ||
| 769 | }, | ||
| 770 | }, | ||
| 771 | .slaves = omap44xx_smartreflex_core_slaves, | ||
| 772 | @@ -3967,7 +4017,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { | ||
| 773 | .vdd_name = "iva", | ||
| 774 | .prcm = { | ||
| 775 | .omap4 = { | ||
| 776 | - .clkctrl_reg = OMAP4430_CM_ALWON_SR_IVA_CLKCTRL, | ||
| 777 | + .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, | ||
| 778 | }, | ||
| 779 | }, | ||
| 780 | .slaves = omap44xx_smartreflex_iva_slaves, | ||
| 781 | @@ -4014,7 +4064,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { | ||
| 782 | .vdd_name = "mpu", | ||
| 783 | .prcm = { | ||
| 784 | .omap4 = { | ||
| 785 | - .clkctrl_reg = OMAP4430_CM_ALWON_SR_MPU_CLKCTRL, | ||
| 786 | + .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, | ||
| 787 | }, | ||
| 788 | }, | ||
| 789 | .slaves = omap44xx_smartreflex_mpu_slaves, | ||
| 790 | @@ -4076,7 +4126,7 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = { | ||
| 791 | .clkdm_name = "l4_cfg_clkdm", | ||
| 792 | .prcm = { | ||
| 793 | .omap4 = { | ||
| 794 | - .clkctrl_reg = OMAP4430_CM_L4CFG_HW_SEM_CLKCTRL, | ||
| 795 | + .clkctrl_offs = OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET, | ||
| 796 | }, | ||
| 797 | }, | ||
| 798 | .slaves = omap44xx_spinlock_slaves, | ||
| 799 | @@ -4160,7 +4210,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { | ||
| 800 | .main_clk = "timer1_fck", | ||
| 801 | .prcm = { | ||
| 802 | .omap4 = { | ||
| 803 | - .clkctrl_reg = OMAP4430_CM_WKUP_TIMER1_CLKCTRL, | ||
| 804 | + .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, | ||
| 805 | }, | ||
| 806 | }, | ||
| 807 | .slaves = omap44xx_timer1_slaves, | ||
| 808 | @@ -4206,7 +4256,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { | ||
| 809 | .main_clk = "timer2_fck", | ||
| 810 | .prcm = { | ||
| 811 | .omap4 = { | ||
| 812 | - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER2_CLKCTRL, | ||
| 813 | + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, | ||
| 814 | }, | ||
| 815 | }, | ||
| 816 | .slaves = omap44xx_timer2_slaves, | ||
| 817 | @@ -4252,7 +4302,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { | ||
| 818 | .main_clk = "timer3_fck", | ||
| 819 | .prcm = { | ||
| 820 | .omap4 = { | ||
| 821 | - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER3_CLKCTRL, | ||
| 822 | + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, | ||
| 823 | }, | ||
| 824 | }, | ||
| 825 | .slaves = omap44xx_timer3_slaves, | ||
| 826 | @@ -4298,7 +4348,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { | ||
| 827 | .main_clk = "timer4_fck", | ||
| 828 | .prcm = { | ||
| 829 | .omap4 = { | ||
| 830 | - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER4_CLKCTRL, | ||
| 831 | + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, | ||
| 832 | }, | ||
| 833 | }, | ||
| 834 | .slaves = omap44xx_timer4_slaves, | ||
| 835 | @@ -4363,7 +4413,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { | ||
| 836 | .main_clk = "timer5_fck", | ||
| 837 | .prcm = { | ||
| 838 | .omap4 = { | ||
| 839 | - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER5_CLKCTRL, | ||
| 840 | + .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, | ||
| 841 | }, | ||
| 842 | }, | ||
| 843 | .slaves = omap44xx_timer5_slaves, | ||
| 844 | @@ -4429,7 +4479,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { | ||
| 845 | .main_clk = "timer6_fck", | ||
| 846 | .prcm = { | ||
| 847 | .omap4 = { | ||
| 848 | - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER6_CLKCTRL, | ||
| 849 | + .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, | ||
| 850 | }, | ||
| 851 | }, | ||
| 852 | .slaves = omap44xx_timer6_slaves, | ||
| 853 | @@ -4494,7 +4544,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { | ||
| 854 | .main_clk = "timer7_fck", | ||
| 855 | .prcm = { | ||
| 856 | .omap4 = { | ||
| 857 | - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER7_CLKCTRL, | ||
| 858 | + .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, | ||
| 859 | }, | ||
| 860 | }, | ||
| 861 | .slaves = omap44xx_timer7_slaves, | ||
| 862 | @@ -4559,7 +4609,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { | ||
| 863 | .main_clk = "timer8_fck", | ||
| 864 | .prcm = { | ||
| 865 | .omap4 = { | ||
| 866 | - .clkctrl_reg = OMAP4430_CM1_ABE_TIMER8_CLKCTRL, | ||
| 867 | + .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, | ||
| 868 | }, | ||
| 869 | }, | ||
| 870 | .slaves = omap44xx_timer8_slaves, | ||
| 871 | @@ -4605,7 +4655,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { | ||
| 872 | .main_clk = "timer9_fck", | ||
| 873 | .prcm = { | ||
| 874 | .omap4 = { | ||
| 875 | - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER9_CLKCTRL, | ||
| 876 | + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, | ||
| 877 | }, | ||
| 878 | }, | ||
| 879 | .slaves = omap44xx_timer9_slaves, | ||
| 880 | @@ -4651,7 +4701,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { | ||
| 881 | .main_clk = "timer10_fck", | ||
| 882 | .prcm = { | ||
| 883 | .omap4 = { | ||
| 884 | - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER10_CLKCTRL, | ||
| 885 | + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, | ||
| 886 | }, | ||
| 887 | }, | ||
| 888 | .slaves = omap44xx_timer10_slaves, | ||
| 889 | @@ -4697,7 +4747,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { | ||
| 890 | .main_clk = "timer11_fck", | ||
| 891 | .prcm = { | ||
| 892 | .omap4 = { | ||
| 893 | - .clkctrl_reg = OMAP4430_CM_L4PER_DMTIMER11_CLKCTRL, | ||
| 894 | + .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, | ||
| 895 | }, | ||
| 896 | }, | ||
| 897 | .slaves = omap44xx_timer11_slaves, | ||
| 898 | @@ -4772,7 +4822,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { | ||
| 899 | .main_clk = "uart1_fck", | ||
| 900 | .prcm = { | ||
| 901 | .omap4 = { | ||
| 902 | - .clkctrl_reg = OMAP4430_CM_L4PER_UART1_CLKCTRL, | ||
| 903 | + .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, | ||
| 904 | }, | ||
| 905 | }, | ||
| 906 | .slaves = omap44xx_uart1_slaves, | ||
| 907 | @@ -4825,7 +4875,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { | ||
| 908 | .main_clk = "uart2_fck", | ||
| 909 | .prcm = { | ||
| 910 | .omap4 = { | ||
| 911 | - .clkctrl_reg = OMAP4430_CM_L4PER_UART2_CLKCTRL, | ||
| 912 | + .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, | ||
| 913 | }, | ||
| 914 | }, | ||
| 915 | .slaves = omap44xx_uart2_slaves, | ||
| 916 | @@ -4879,7 +4929,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { | ||
| 917 | .main_clk = "uart3_fck", | ||
| 918 | .prcm = { | ||
| 919 | .omap4 = { | ||
| 920 | - .clkctrl_reg = OMAP4430_CM_L4PER_UART3_CLKCTRL, | ||
| 921 | + .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, | ||
| 922 | }, | ||
| 923 | }, | ||
| 924 | .slaves = omap44xx_uart3_slaves, | ||
| 925 | @@ -4932,7 +4982,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { | ||
| 926 | .main_clk = "uart4_fck", | ||
| 927 | .prcm = { | ||
| 928 | .omap4 = { | ||
| 929 | - .clkctrl_reg = OMAP4430_CM_L4PER_UART4_CLKCTRL, | ||
| 930 | + .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, | ||
| 931 | }, | ||
| 932 | }, | ||
| 933 | .slaves = omap44xx_uart4_slaves, | ||
| 934 | @@ -5011,7 +5061,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { | ||
| 935 | .main_clk = "usb_otg_hs_ick", | ||
| 936 | .prcm = { | ||
| 937 | .omap4 = { | ||
| 938 | - .clkctrl_reg = OMAP4430_CM_L3INIT_USB_OTG_CLKCTRL, | ||
| 939 | + .clkctrl_offs = OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, | ||
| 940 | }, | ||
| 941 | }, | ||
| 942 | .opt_clks = usb_otg_hs_opt_clks, | ||
| 943 | @@ -5084,7 +5134,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { | ||
| 944 | .main_clk = "wd_timer2_fck", | ||
| 945 | .prcm = { | ||
| 946 | .omap4 = { | ||
| 947 | - .clkctrl_reg = OMAP4430_CM_WKUP_WDT2_CLKCTRL, | ||
| 948 | + .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, | ||
| 949 | }, | ||
| 950 | }, | ||
| 951 | .slaves = omap44xx_wd_timer2_slaves, | ||
| 952 | @@ -5149,7 +5199,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { | ||
| 953 | .main_clk = "wd_timer3_fck", | ||
| 954 | .prcm = { | ||
| 955 | .omap4 = { | ||
| 956 | - .clkctrl_reg = OMAP4430_CM1_ABE_WDT3_CLKCTRL, | ||
| 957 | + .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, | ||
| 958 | }, | ||
| 959 | }, | ||
| 960 | .slaves = omap44xx_wd_timer3_slaves, | ||
| 961 | diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 962 | index 3306bdf..fc54355 100644 | ||
| 963 | --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 964 | +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 965 | @@ -360,7 +360,7 @@ struct omap_hwmod_omap2_prcm { | ||
| 966 | * @submodule_wkdep_bit: bit shift of the WKDEP range | ||
| 967 | */ | ||
| 968 | struct omap_hwmod_omap4_prcm { | ||
| 969 | - void __iomem *clkctrl_reg; | ||
| 970 | + u16 clkctrl_offs; | ||
| 971 | void __iomem *rstctrl_reg; | ||
| 972 | u8 submodule_wkdep_bit; | ||
| 973 | }; | ||
| 974 | -- | ||
| 975 | 1.7.2.5 | ||
| 976 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0080-OMAP-hwmod-Wait-the-idle-status-to-be-disabled.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0080-OMAP-hwmod-Wait-the-idle-status-to-be-disabled.patch deleted file mode 100644 index c3668a64..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0080-OMAP-hwmod-Wait-the-idle-status-to-be-disabled.patch +++ /dev/null | |||
| @@ -1,153 +0,0 @@ | |||
| 1 | From e800b4bd2d100fea86fbfa46a20a374c691e2fcd Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:30 -0600 | ||
| 4 | Subject: [PATCH 080/149] OMAP: hwmod: Wait the idle status to be disabled | ||
| 5 | |||
| 6 | It is mandatory to wait for a module to be in disabled state before | ||
| 7 | potentially disabling source clock or re-asserting a reset. | ||
| 8 | |||
| 9 | omap_hwmod_idle and omap_hwmod_shutdown does not wait for | ||
| 10 | the module to be fully idle. | ||
| 11 | |||
| 12 | Add a cm_xxx accessor to wait the clkctrl idle status to be disabled. | ||
| 13 | Fix hwmod_[idle|shutdown] to use this API. | ||
| 14 | |||
| 15 | Based on Rajendra's initial patch. | ||
| 16 | |||
| 17 | Please note that most interconnects hwmod will return one timeout because | ||
| 18 | it is impossible for them to be in idle since the processor is accessing | ||
| 19 | the registers though the interconnect. | ||
| 20 | |||
| 21 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 22 | Signed-off-by: Rajendra Nayak <rnayak@ti.com> | ||
| 23 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 24 | Cc: Todd Poynor <toddpoynor@google.com> | ||
| 25 | [paul@pwsan.com: move cpu_is_*() tests to the top of _wait_target_disable(); | ||
| 26 | incorporate some feedback from Todd] | ||
| 27 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 28 | --- | ||
| 29 | arch/arm/mach-omap2/cminst44xx.c | 25 +++++++++++++++++++++++ | ||
| 30 | arch/arm/mach-omap2/cminst44xx.h | 1 + | ||
| 31 | arch/arm/mach-omap2/omap_hwmod.c | 40 ++++++++++++++++++++++++++++++++++++++ | ||
| 32 | 3 files changed, 66 insertions(+), 0 deletions(-) | ||
| 33 | |||
| 34 | diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c | ||
| 35 | index 9033dd4..0fe3f14 100644 | ||
| 36 | --- a/arch/arm/mach-omap2/cminst44xx.c | ||
| 37 | +++ b/arch/arm/mach-omap2/cminst44xx.c | ||
| 38 | @@ -284,3 +284,28 @@ int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, | ||
| 39 | return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; | ||
| 40 | } | ||
| 41 | |||
| 42 | +/** | ||
| 43 | + * omap4_cminst_wait_module_idle - wait for a module to be in 'disabled' | ||
| 44 | + * state | ||
| 45 | + * @part: PRCM partition ID that the CM_CLKCTRL register exists in | ||
| 46 | + * @inst: CM instance register offset (*_INST macro) | ||
| 47 | + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) | ||
| 48 | + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) | ||
| 49 | + * | ||
| 50 | + * Wait for the module IDLEST to be disabled. Some PRCM transition, | ||
| 51 | + * like reset assertion or parent clock de-activation must wait the | ||
| 52 | + * module to be fully disabled. | ||
| 53 | + */ | ||
| 54 | +int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs) | ||
| 55 | +{ | ||
| 56 | + int i = 0; | ||
| 57 | + | ||
| 58 | + if (!clkctrl_offs) | ||
| 59 | + return 0; | ||
| 60 | + | ||
| 61 | + omap_test_timeout((_clkctrl_idlest(part, inst, cdoffs, clkctrl_offs) == | ||
| 62 | + CLKCTRL_IDLEST_DISABLED), | ||
| 63 | + MAX_MODULE_READY_TIME, i); | ||
| 64 | + | ||
| 65 | + return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; | ||
| 66 | +} | ||
| 67 | diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h | ||
| 68 | index 8eba2ae..a985400 100644 | ||
| 69 | --- a/arch/arm/mach-omap2/cminst44xx.h | ||
| 70 | +++ b/arch/arm/mach-omap2/cminst44xx.h | ||
| 71 | @@ -18,6 +18,7 @@ extern void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs); | ||
| 72 | extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); | ||
| 73 | |||
| 74 | extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); | ||
| 75 | +extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); | ||
| 76 | |||
| 77 | /* | ||
| 78 | * In an ideal world, we would not export these low-level functions, | ||
| 79 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 80 | index 00241ea..d21f49b 100644 | ||
| 81 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 82 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 83 | @@ -1102,6 +1102,36 @@ static int _wait_target_ready(struct omap_hwmod *oh) | ||
| 84 | } | ||
| 85 | |||
| 86 | /** | ||
| 87 | + * _wait_target_disable - wait for a module to be disabled | ||
| 88 | + * @oh: struct omap_hwmod * | ||
| 89 | + * | ||
| 90 | + * Wait for a module @oh to enter slave idle. Returns 0 if the module | ||
| 91 | + * does not have an IDLEST bit or if the module successfully enters | ||
| 92 | + * slave idle; otherwise, pass along the return value of the | ||
| 93 | + * appropriate *_cm*_wait_module_idle() function. | ||
| 94 | + */ | ||
| 95 | +static int _wait_target_disable(struct omap_hwmod *oh) | ||
| 96 | +{ | ||
| 97 | + /* TODO: For now just handle OMAP4+ */ | ||
| 98 | + if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
| 99 | + return 0; | ||
| 100 | + | ||
| 101 | + if (!oh) | ||
| 102 | + return -EINVAL; | ||
| 103 | + | ||
| 104 | + if (oh->_int_flags & _HWMOD_NO_MPU_PORT) | ||
| 105 | + return 0; | ||
| 106 | + | ||
| 107 | + if (oh->flags & HWMOD_NO_IDLEST) | ||
| 108 | + return 0; | ||
| 109 | + | ||
| 110 | + return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition, | ||
| 111 | + oh->clkdm->cm_inst, | ||
| 112 | + oh->clkdm->clkdm_offs, | ||
| 113 | + oh->prcm.omap4.clkctrl_offs); | ||
| 114 | +} | ||
| 115 | + | ||
| 116 | +/** | ||
| 117 | * _lookup_hardreset - fill register bit info for this hwmod/reset line | ||
| 118 | * @oh: struct omap_hwmod * | ||
| 119 | * @name: name of the reset line in the context of this hwmod | ||
| 120 | @@ -1410,6 +1440,8 @@ static int _enable(struct omap_hwmod *oh) | ||
| 121 | */ | ||
| 122 | static int _idle(struct omap_hwmod *oh) | ||
| 123 | { | ||
| 124 | + int ret; | ||
| 125 | + | ||
| 126 | pr_debug("omap_hwmod: %s: idling\n", oh->name); | ||
| 127 | |||
| 128 | if (oh->_state != _HWMOD_STATE_ENABLED) { | ||
| 129 | @@ -1422,6 +1454,10 @@ static int _idle(struct omap_hwmod *oh) | ||
| 130 | _idle_sysc(oh); | ||
| 131 | _del_initiator_dep(oh, mpu_oh); | ||
| 132 | _disable_clocks(oh); | ||
| 133 | + ret = _wait_target_disable(oh); | ||
| 134 | + if (ret) | ||
| 135 | + pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", | ||
| 136 | + oh->name); | ||
| 137 | |||
| 138 | /* Mux pins for device idle if populated */ | ||
| 139 | if (oh->mux && oh->mux->pads_dynamic) | ||
| 140 | @@ -1514,6 +1550,10 @@ static int _shutdown(struct omap_hwmod *oh) | ||
| 141 | _del_initiator_dep(oh, mpu_oh); | ||
| 142 | /* XXX what about the other system initiators here? dma, dsp */ | ||
| 143 | _disable_clocks(oh); | ||
| 144 | + ret = _wait_target_disable(oh); | ||
| 145 | + if (ret) | ||
| 146 | + pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", | ||
| 147 | + oh->name); | ||
| 148 | } | ||
| 149 | /* XXX Should this code also force-disable the optional clocks? */ | ||
| 150 | |||
| 151 | -- | ||
| 152 | 1.7.2.5 | ||
| 153 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0081-OMAP4-hwmod-Replace-RSTCTRL-absolute-address-with-of.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0081-OMAP4-hwmod-Replace-RSTCTRL-absolute-address-with-of.patch deleted file mode 100644 index d3548991..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0081-OMAP4-hwmod-Replace-RSTCTRL-absolute-address-with-of.patch +++ /dev/null | |||
| @@ -1,459 +0,0 @@ | |||
| 1 | From ab34edbd04746da7916e720ae1f07a981ab5a298 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:31 -0600 | ||
| 4 | Subject: [PATCH 081/149] OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros | ||
| 5 | |||
| 6 | The RSTCTRL register was accessed using an absolute address. | ||
| 7 | The usage of hardcoded macros to calculate virtual address from physical | ||
| 8 | one should be avoided as much as possible. | ||
| 9 | The usage of an offset will allow future improvement like migration from | ||
| 10 | the current architecture code toward a module driver. | ||
| 11 | |||
| 12 | Update prm_xxx accessors, move definition to the proper header file and | ||
| 13 | update copyrights. | ||
| 14 | Change the s16 register offset parameter to u16. | ||
| 15 | |||
| 16 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 17 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 18 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 19 | [paul@pwsan.com: use '_prminst_' in function names that are part of the | ||
| 20 | prminst44xx.c file] | ||
| 21 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 22 | --- | ||
| 23 | arch/arm/mach-omap2/omap_hwmod.c | 19 ++++-- | ||
| 24 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 16 ++-- | ||
| 25 | arch/arm/mach-omap2/prm44xx.c | 93 +------------------------- | ||
| 26 | arch/arm/mach-omap2/prm44xx.h | 4 - | ||
| 27 | arch/arm/mach-omap2/prminst44xx.c | 93 +++++++++++++++++++++++++- | ||
| 28 | arch/arm/mach-omap2/prminst44xx.h | 10 +++- | ||
| 29 | arch/arm/plat-omap/include/plat/omap_hwmod.h | 3 +- | ||
| 30 | 7 files changed, 125 insertions(+), 113 deletions(-) | ||
| 31 | |||
| 32 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 33 | index d21f49b..a0f7d31 100644 | ||
| 34 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 35 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 36 | @@ -149,6 +149,7 @@ | ||
| 37 | #include "cminst44xx.h" | ||
| 38 | #include "prm2xxx_3xxx.h" | ||
| 39 | #include "prm44xx.h" | ||
| 40 | +#include "prminst44xx.h" | ||
| 41 | #include "mux.h" | ||
| 42 | |||
| 43 | /* Maximum microseconds to wait for OMAP module to softreset */ | ||
| 44 | @@ -1187,8 +1188,10 @@ static int _assert_hardreset(struct omap_hwmod *oh, const char *name) | ||
| 45 | return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs, | ||
| 46 | ohri.rst_shift); | ||
| 47 | else if (cpu_is_omap44xx()) | ||
| 48 | - return omap4_prm_assert_hardreset(oh->prcm.omap4.rstctrl_reg, | ||
| 49 | - ohri.rst_shift); | ||
| 50 | + return omap4_prminst_assert_hardreset(ohri.rst_shift, | ||
| 51 | + oh->clkdm->pwrdm.ptr->prcm_partition, | ||
| 52 | + oh->clkdm->pwrdm.ptr->prcm_offs, | ||
| 53 | + oh->prcm.omap4.rstctrl_offs); | ||
| 54 | else | ||
| 55 | return -EINVAL; | ||
| 56 | } | ||
| 57 | @@ -1223,8 +1226,10 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name) | ||
| 58 | if (ohri.st_shift) | ||
| 59 | pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n", | ||
| 60 | oh->name, name); | ||
| 61 | - ret = omap4_prm_deassert_hardreset(oh->prcm.omap4.rstctrl_reg, | ||
| 62 | - ohri.rst_shift); | ||
| 63 | + ret = omap4_prminst_deassert_hardreset(ohri.rst_shift, | ||
| 64 | + oh->clkdm->pwrdm.ptr->prcm_partition, | ||
| 65 | + oh->clkdm->pwrdm.ptr->prcm_offs, | ||
| 66 | + oh->prcm.omap4.rstctrl_offs); | ||
| 67 | } else { | ||
| 68 | return -EINVAL; | ||
| 69 | } | ||
| 70 | @@ -1259,8 +1264,10 @@ static int _read_hardreset(struct omap_hwmod *oh, const char *name) | ||
| 71 | return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs, | ||
| 72 | ohri.st_shift); | ||
| 73 | } else if (cpu_is_omap44xx()) { | ||
| 74 | - return omap4_prm_is_hardreset_asserted(oh->prcm.omap4.rstctrl_reg, | ||
| 75 | - ohri.rst_shift); | ||
| 76 | + return omap4_prminst_is_hardreset_asserted(ohri.rst_shift, | ||
| 77 | + oh->clkdm->pwrdm.ptr->prcm_partition, | ||
| 78 | + oh->clkdm->pwrdm.ptr->prcm_offs, | ||
| 79 | + oh->prcm.omap4.rstctrl_offs); | ||
| 80 | } else { | ||
| 81 | return -EINVAL; | ||
| 82 | } | ||
| 83 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 84 | index 00d7130..6a190f5 100644 | ||
| 85 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 86 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 87 | @@ -1144,7 +1144,7 @@ static struct omap_hwmod omap44xx_dsp_c0_hwmod = { | ||
| 88 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_dsp_c0_resets), | ||
| 89 | .prcm = { | ||
| 90 | .omap4 = { | ||
| 91 | - .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, | ||
| 92 | + .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, | ||
| 93 | }, | ||
| 94 | }, | ||
| 95 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 96 | @@ -1161,7 +1161,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { | ||
| 97 | .prcm = { | ||
| 98 | .omap4 = { | ||
| 99 | .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, | ||
| 100 | - .rstctrl_reg = OMAP4430_RM_TESLA_RSTCTRL, | ||
| 101 | + .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, | ||
| 102 | }, | ||
| 103 | }, | ||
| 104 | .slaves = omap44xx_dsp_slaves, | ||
| 105 | @@ -2526,7 +2526,7 @@ static struct omap_hwmod omap44xx_ipu_c0_hwmod = { | ||
| 106 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c0_resets), | ||
| 107 | .prcm = { | ||
| 108 | .omap4 = { | ||
| 109 | - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, | ||
| 110 | + .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, | ||
| 111 | }, | ||
| 112 | }, | ||
| 113 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 114 | @@ -2542,7 +2542,7 @@ static struct omap_hwmod omap44xx_ipu_c1_hwmod = { | ||
| 115 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_ipu_c1_resets), | ||
| 116 | .prcm = { | ||
| 117 | .omap4 = { | ||
| 118 | - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, | ||
| 119 | + .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, | ||
| 120 | }, | ||
| 121 | }, | ||
| 122 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 123 | @@ -2559,7 +2559,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { | ||
| 124 | .prcm = { | ||
| 125 | .omap4 = { | ||
| 126 | .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, | ||
| 127 | - .rstctrl_reg = OMAP4430_RM_DUCATI_RSTCTRL, | ||
| 128 | + .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, | ||
| 129 | }, | ||
| 130 | }, | ||
| 131 | .slaves = omap44xx_ipu_slaves, | ||
| 132 | @@ -2726,7 +2726,7 @@ static struct omap_hwmod omap44xx_iva_seq0_hwmod = { | ||
| 133 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq0_resets), | ||
| 134 | .prcm = { | ||
| 135 | .omap4 = { | ||
| 136 | - .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, | ||
| 137 | + .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, | ||
| 138 | }, | ||
| 139 | }, | ||
| 140 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 141 | @@ -2742,7 +2742,7 @@ static struct omap_hwmod omap44xx_iva_seq1_hwmod = { | ||
| 142 | .rst_lines_cnt = ARRAY_SIZE(omap44xx_iva_seq1_resets), | ||
| 143 | .prcm = { | ||
| 144 | .omap4 = { | ||
| 145 | - .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, | ||
| 146 | + .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, | ||
| 147 | }, | ||
| 148 | }, | ||
| 149 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 150 | @@ -2759,7 +2759,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { | ||
| 151 | .prcm = { | ||
| 152 | .omap4 = { | ||
| 153 | .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, | ||
| 154 | - .rstctrl_reg = OMAP4430_RM_IVAHD_RSTCTRL, | ||
| 155 | + .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, | ||
| 156 | }, | ||
| 157 | }, | ||
| 158 | .slaves = omap44xx_iva_slaves, | ||
| 159 | diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c | ||
| 160 | index a2a04bf..faec860 100644 | ||
| 161 | --- a/arch/arm/mach-omap2/prm44xx.c | ||
| 162 | +++ b/arch/arm/mach-omap2/prm44xx.c | ||
| 163 | @@ -1,7 +1,7 @@ | ||
| 164 | /* | ||
| 165 | * OMAP4 PRM module functions | ||
| 166 | * | ||
| 167 | - * Copyright (C) 2010 Texas Instruments, Inc. | ||
| 168 | + * Copyright (C) 2011 Texas Instruments, Inc. | ||
| 169 | * Copyright (C) 2010 Nokia Corporation | ||
| 170 | * Benoît Cousson | ||
| 171 | * Paul Walmsley | ||
| 172 | @@ -24,12 +24,6 @@ | ||
| 173 | #include "prm44xx.h" | ||
| 174 | #include "prm-regbits-44xx.h" | ||
| 175 | |||
| 176 | -/* | ||
| 177 | - * Address offset (in bytes) between the reset control and the reset | ||
| 178 | - * status registers: 4 bytes on OMAP4 | ||
| 179 | - */ | ||
| 180 | -#define OMAP4_RST_CTRL_ST_OFFSET 4 | ||
| 181 | - | ||
| 182 | /* PRM low-level functions */ | ||
| 183 | |||
| 184 | /* Read a register in a CM/PRM instance in the PRM module */ | ||
| 185 | @@ -94,91 +88,6 @@ u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) | ||
| 186 | return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); | ||
| 187 | } | ||
| 188 | |||
| 189 | -/** | ||
| 190 | - * omap4_prm_is_hardreset_asserted - read the HW reset line state of | ||
| 191 | - * submodules contained in the hwmod module | ||
| 192 | - * @rstctrl_reg: RM_RSTCTRL register address for this module | ||
| 193 | - * @shift: register bit shift corresponding to the reset line to check | ||
| 194 | - * | ||
| 195 | - * Returns 1 if the (sub)module hardreset line is currently asserted, | ||
| 196 | - * 0 if the (sub)module hardreset line is not currently asserted, or | ||
| 197 | - * -EINVAL upon parameter error. | ||
| 198 | - */ | ||
| 199 | -int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift) | ||
| 200 | -{ | ||
| 201 | - if (!cpu_is_omap44xx() || !rstctrl_reg) | ||
| 202 | - return -EINVAL; | ||
| 203 | - | ||
| 204 | - return omap4_prm_read_bits_shift(rstctrl_reg, (1 << shift)); | ||
| 205 | -} | ||
| 206 | - | ||
| 207 | -/** | ||
| 208 | - * omap4_prm_assert_hardreset - assert the HW reset line of a submodule | ||
| 209 | - * @rstctrl_reg: RM_RSTCTRL register address for this module | ||
| 210 | - * @shift: register bit shift corresponding to the reset line to assert | ||
| 211 | - * | ||
| 212 | - * Some IPs like dsp, ipu or iva contain processors that require an HW | ||
| 213 | - * reset line to be asserted / deasserted in order to fully enable the | ||
| 214 | - * IP. These modules may have multiple hard-reset lines that reset | ||
| 215 | - * different 'submodules' inside the IP block. This function will | ||
| 216 | - * place the submodule into reset. Returns 0 upon success or -EINVAL | ||
| 217 | - * upon an argument error. | ||
| 218 | - */ | ||
| 219 | -int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift) | ||
| 220 | -{ | ||
| 221 | - u32 mask; | ||
| 222 | - | ||
| 223 | - if (!cpu_is_omap44xx() || !rstctrl_reg) | ||
| 224 | - return -EINVAL; | ||
| 225 | - | ||
| 226 | - mask = 1 << shift; | ||
| 227 | - omap4_prm_rmw_reg_bits(mask, mask, rstctrl_reg); | ||
| 228 | - | ||
| 229 | - return 0; | ||
| 230 | -} | ||
| 231 | - | ||
| 232 | -/** | ||
| 233 | - * omap4_prm_deassert_hardreset - deassert a submodule hardreset line and wait | ||
| 234 | - * @rstctrl_reg: RM_RSTCTRL register address for this module | ||
| 235 | - * @shift: register bit shift corresponding to the reset line to deassert | ||
| 236 | - * | ||
| 237 | - * Some IPs like dsp, ipu or iva contain processors that require an HW | ||
| 238 | - * reset line to be asserted / deasserted in order to fully enable the | ||
| 239 | - * IP. These modules may have multiple hard-reset lines that reset | ||
| 240 | - * different 'submodules' inside the IP block. This function will | ||
| 241 | - * take the submodule out of reset and wait until the PRCM indicates | ||
| 242 | - * that the reset has completed before returning. Returns 0 upon success or | ||
| 243 | - * -EINVAL upon an argument error, -EEXIST if the submodule was already out | ||
| 244 | - * of reset, or -EBUSY if the submodule did not exit reset promptly. | ||
| 245 | - */ | ||
| 246 | -int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift) | ||
| 247 | -{ | ||
| 248 | - u32 mask; | ||
| 249 | - void __iomem *rstst_reg; | ||
| 250 | - int c; | ||
| 251 | - | ||
| 252 | - if (!cpu_is_omap44xx() || !rstctrl_reg) | ||
| 253 | - return -EINVAL; | ||
| 254 | - | ||
| 255 | - rstst_reg = rstctrl_reg + OMAP4_RST_CTRL_ST_OFFSET; | ||
| 256 | - | ||
| 257 | - mask = 1 << shift; | ||
| 258 | - | ||
| 259 | - /* Check the current status to avoid de-asserting the line twice */ | ||
| 260 | - if (omap4_prm_read_bits_shift(rstctrl_reg, mask) == 0) | ||
| 261 | - return -EEXIST; | ||
| 262 | - | ||
| 263 | - /* Clear the reset status by writing 1 to the status bit */ | ||
| 264 | - omap4_prm_rmw_reg_bits(0xffffffff, mask, rstst_reg); | ||
| 265 | - /* de-assert the reset control line */ | ||
| 266 | - omap4_prm_rmw_reg_bits(mask, 0, rstctrl_reg); | ||
| 267 | - /* wait the status to be set */ | ||
| 268 | - omap_test_timeout(omap4_prm_read_bits_shift(rstst_reg, mask), | ||
| 269 | - MAX_MODULE_HARDRESET_WAIT, c); | ||
| 270 | - | ||
| 271 | - return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; | ||
| 272 | -} | ||
| 273 | - | ||
| 274 | void omap4_prm_global_warm_sw_reset(void) | ||
| 275 | { | ||
| 276 | u32 v; | ||
| 277 | diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h | ||
| 278 | index 6e53120..3732e02 100644 | ||
| 279 | --- a/arch/arm/mach-omap2/prm44xx.h | ||
| 280 | +++ b/arch/arm/mach-omap2/prm44xx.h | ||
| 281 | @@ -755,10 +755,6 @@ extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx); | ||
| 282 | extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); | ||
| 283 | extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); | ||
| 284 | |||
| 285 | -extern int omap4_prm_is_hardreset_asserted(void __iomem *rstctrl_reg, u8 shift); | ||
| 286 | -extern int omap4_prm_assert_hardreset(void __iomem *rstctrl_reg, u8 shift); | ||
| 287 | -extern int omap4_prm_deassert_hardreset(void __iomem *rstctrl_reg, u8 shift); | ||
| 288 | - | ||
| 289 | extern void omap4_prm_global_warm_sw_reset(void); | ||
| 290 | |||
| 291 | # endif | ||
| 292 | diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c | ||
| 293 | index a303242..35e02aa 100644 | ||
| 294 | --- a/arch/arm/mach-omap2/prminst44xx.c | ||
| 295 | +++ b/arch/arm/mach-omap2/prminst44xx.c | ||
| 296 | @@ -2,6 +2,7 @@ | ||
| 297 | * OMAP4 PRM instance functions | ||
| 298 | * | ||
| 299 | * Copyright (C) 2009 Nokia Corporation | ||
| 300 | + * Copyright (C) 2011 Texas Instruments, Inc. | ||
| 301 | * Paul Walmsley | ||
| 302 | * | ||
| 303 | * This program is free software; you can redistribute it and/or modify | ||
| 304 | @@ -53,7 +54,7 @@ void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx) | ||
| 305 | |||
| 306 | /* Read-modify-write a register in PRM. Caller must lock */ | ||
| 307 | u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, | ||
| 308 | - s16 idx) | ||
| 309 | + u16 idx) | ||
| 310 | { | ||
| 311 | u32 v; | ||
| 312 | |||
| 313 | @@ -64,3 +65,93 @@ u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, s16 inst, | ||
| 314 | |||
| 315 | return v; | ||
| 316 | } | ||
| 317 | + | ||
| 318 | +/* | ||
| 319 | + * Address offset (in bytes) between the reset control and the reset | ||
| 320 | + * status registers: 4 bytes on OMAP4 | ||
| 321 | + */ | ||
| 322 | +#define OMAP4_RST_CTRL_ST_OFFSET 4 | ||
| 323 | + | ||
| 324 | +/** | ||
| 325 | + * omap4_prminst_is_hardreset_asserted - read the HW reset line state of | ||
| 326 | + * submodules contained in the hwmod module | ||
| 327 | + * @rstctrl_reg: RM_RSTCTRL register address for this module | ||
| 328 | + * @shift: register bit shift corresponding to the reset line to check | ||
| 329 | + * | ||
| 330 | + * Returns 1 if the (sub)module hardreset line is currently asserted, | ||
| 331 | + * 0 if the (sub)module hardreset line is not currently asserted, or | ||
| 332 | + * -EINVAL upon parameter error. | ||
| 333 | + */ | ||
| 334 | +int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, | ||
| 335 | + u16 rstctrl_offs) | ||
| 336 | +{ | ||
| 337 | + u32 v; | ||
| 338 | + | ||
| 339 | + v = omap4_prminst_read_inst_reg(part, inst, rstctrl_offs); | ||
| 340 | + v &= 1 << shift; | ||
| 341 | + v >>= shift; | ||
| 342 | + | ||
| 343 | + return v; | ||
| 344 | +} | ||
| 345 | + | ||
| 346 | +/** | ||
| 347 | + * omap4_prminst_assert_hardreset - assert the HW reset line of a submodule | ||
| 348 | + * @rstctrl_reg: RM_RSTCTRL register address for this module | ||
| 349 | + * @shift: register bit shift corresponding to the reset line to assert | ||
| 350 | + * | ||
| 351 | + * Some IPs like dsp, ipu or iva contain processors that require an HW | ||
| 352 | + * reset line to be asserted / deasserted in order to fully enable the | ||
| 353 | + * IP. These modules may have multiple hard-reset lines that reset | ||
| 354 | + * different 'submodules' inside the IP block. This function will | ||
| 355 | + * place the submodule into reset. Returns 0 upon success or -EINVAL | ||
| 356 | + * upon an argument error. | ||
| 357 | + */ | ||
| 358 | +int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, | ||
| 359 | + u16 rstctrl_offs) | ||
| 360 | +{ | ||
| 361 | + u32 mask = 1 << shift; | ||
| 362 | + | ||
| 363 | + omap4_prminst_rmw_inst_reg_bits(mask, mask, part, inst, rstctrl_offs); | ||
| 364 | + | ||
| 365 | + return 0; | ||
| 366 | +} | ||
| 367 | + | ||
| 368 | +/** | ||
| 369 | + * omap4_prminst_deassert_hardreset - deassert a submodule hardreset line and | ||
| 370 | + * wait | ||
| 371 | + * @rstctrl_reg: RM_RSTCTRL register address for this module | ||
| 372 | + * @shift: register bit shift corresponding to the reset line to deassert | ||
| 373 | + * | ||
| 374 | + * Some IPs like dsp, ipu or iva contain processors that require an HW | ||
| 375 | + * reset line to be asserted / deasserted in order to fully enable the | ||
| 376 | + * IP. These modules may have multiple hard-reset lines that reset | ||
| 377 | + * different 'submodules' inside the IP block. This function will | ||
| 378 | + * take the submodule out of reset and wait until the PRCM indicates | ||
| 379 | + * that the reset has completed before returning. Returns 0 upon success or | ||
| 380 | + * -EINVAL upon an argument error, -EEXIST if the submodule was already out | ||
| 381 | + * of reset, or -EBUSY if the submodule did not exit reset promptly. | ||
| 382 | + */ | ||
| 383 | +int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, | ||
| 384 | + u16 rstctrl_offs) | ||
| 385 | +{ | ||
| 386 | + int c; | ||
| 387 | + u32 mask = 1 << shift; | ||
| 388 | + u16 rstst_offs = rstctrl_offs + OMAP4_RST_CTRL_ST_OFFSET; | ||
| 389 | + | ||
| 390 | + /* Check the current status to avoid de-asserting the line twice */ | ||
| 391 | + if (omap4_prminst_is_hardreset_asserted(shift, part, inst, | ||
| 392 | + rstctrl_offs) == 0) | ||
| 393 | + return -EEXIST; | ||
| 394 | + | ||
| 395 | + /* Clear the reset status by writing 1 to the status bit */ | ||
| 396 | + omap4_prminst_rmw_inst_reg_bits(0xffffffff, mask, part, inst, | ||
| 397 | + rstst_offs); | ||
| 398 | + /* de-assert the reset control line */ | ||
| 399 | + omap4_prminst_rmw_inst_reg_bits(mask, 0, part, inst, rstctrl_offs); | ||
| 400 | + /* wait the status to be set */ | ||
| 401 | + omap_test_timeout(omap4_prminst_is_hardreset_asserted(shift, part, inst, | ||
| 402 | + rstst_offs), | ||
| 403 | + MAX_MODULE_HARDRESET_WAIT, c); | ||
| 404 | + | ||
| 405 | + return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; | ||
| 406 | +} | ||
| 407 | diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h | ||
| 408 | index 02dd66d..c14ae29 100644 | ||
| 409 | --- a/arch/arm/mach-omap2/prminst44xx.h | ||
| 410 | +++ b/arch/arm/mach-omap2/prminst44xx.h | ||
| 411 | @@ -2,6 +2,7 @@ | ||
| 412 | * OMAP4 Power/Reset Management (PRM) function prototypes | ||
| 413 | * | ||
| 414 | * Copyright (C) 2010 Nokia Corporation | ||
| 415 | + * Copyright (C) 2011 Texas Instruments, Inc. | ||
| 416 | * Paul Walmsley | ||
| 417 | * | ||
| 418 | * This program is free software; you can redistribute it and/or modify | ||
| 419 | @@ -18,8 +19,15 @@ | ||
| 420 | extern u32 omap4_prminst_read_inst_reg(u8 part, s16 inst, u16 idx); | ||
| 421 | extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx); | ||
| 422 | extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, | ||
| 423 | - s16 inst, s16 idx); | ||
| 424 | + s16 inst, u16 idx); | ||
| 425 | |||
| 426 | extern void omap4_prm_global_warm_sw_reset(void); | ||
| 427 | |||
| 428 | +extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, | ||
| 429 | + u16 rstctrl_offs); | ||
| 430 | +extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, | ||
| 431 | + u16 rstctrl_offs); | ||
| 432 | +extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, | ||
| 433 | + u16 rstctrl_offs); | ||
| 434 | + | ||
| 435 | #endif | ||
| 436 | diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 437 | index fc54355..9ef4424 100644 | ||
| 438 | --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 439 | +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 440 | @@ -2,6 +2,7 @@ | ||
| 441 | * omap_hwmod macros, structures | ||
| 442 | * | ||
| 443 | * Copyright (C) 2009-2011 Nokia Corporation | ||
| 444 | + * Copyright (C) 2011 Texas Instruments, Inc. | ||
| 445 | * Paul Walmsley | ||
| 446 | * | ||
| 447 | * Created in collaboration with (alphabetical order): Benoît Cousson, | ||
| 448 | @@ -361,7 +362,7 @@ struct omap_hwmod_omap2_prcm { | ||
| 449 | */ | ||
| 450 | struct omap_hwmod_omap4_prcm { | ||
| 451 | u16 clkctrl_offs; | ||
| 452 | - void __iomem *rstctrl_reg; | ||
| 453 | + u16 rstctrl_offs; | ||
| 454 | u8 submodule_wkdep_bit; | ||
| 455 | }; | ||
| 456 | |||
| 457 | -- | ||
| 458 | 1.7.2.5 | ||
| 459 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0082-OMAP4-prm-Replace-warm-reset-API-with-the-offset-bas.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0082-OMAP4-prm-Replace-warm-reset-API-with-the-offset-bas.patch deleted file mode 100644 index 74c84145..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0082-OMAP4-prm-Replace-warm-reset-API-with-the-offset-bas.patch +++ /dev/null | |||
| @@ -1,125 +0,0 @@ | |||
| 1 | From 21fe73d93ffbba01a14a70664d4f79cb680d12c0 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:31 -0600 | ||
| 4 | Subject: [PATCH 082/149] OMAP4: prm: Replace warm reset API with the offset based version | ||
| 5 | |||
| 6 | The warm reset function was still using the obsolete API. | ||
| 7 | Replace it by the new one and move the file to the proper c file. | ||
| 8 | |||
| 9 | Change the function names to stick to the file convention as | ||
| 10 | suggested by Paul Walmsley <paul@pwsan.com>: | ||
| 11 | prm_xxx -> prminst_xxx | ||
| 12 | |||
| 13 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 14 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 15 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 16 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 17 | --- | ||
| 18 | arch/arm/mach-omap2/prcm.c | 2 +- | ||
| 19 | arch/arm/mach-omap2/prm44xx.c | 15 --------------- | ||
| 20 | arch/arm/mach-omap2/prm44xx.h | 2 -- | ||
| 21 | arch/arm/mach-omap2/prminst44xx.c | 19 +++++++++++++++++++ | ||
| 22 | arch/arm/mach-omap2/prminst44xx.h | 8 ++++---- | ||
| 23 | 5 files changed, 24 insertions(+), 22 deletions(-) | ||
| 24 | |||
| 25 | diff --git a/arch/arm/mach-omap2/prcm.c b/arch/arm/mach-omap2/prcm.c | ||
| 26 | index 6be1438..2e40a5c 100644 | ||
| 27 | --- a/arch/arm/mach-omap2/prcm.c | ||
| 28 | +++ b/arch/arm/mach-omap2/prcm.c | ||
| 29 | @@ -70,7 +70,7 @@ static void omap_prcm_arch_reset(char mode, const char *cmd) | ||
| 30 | prcm_offs = OMAP3430_GR_MOD; | ||
| 31 | omap3_ctrl_write_boot_mode((cmd ? (u8)*cmd : 0)); | ||
| 32 | } else if (cpu_is_omap44xx()) { | ||
| 33 | - omap4_prm_global_warm_sw_reset(); /* never returns */ | ||
| 34 | + omap4_prminst_global_warm_sw_reset(); /* never returns */ | ||
| 35 | } else { | ||
| 36 | WARN_ON(1); | ||
| 37 | } | ||
| 38 | diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c | ||
| 39 | index faec860..f815329 100644 | ||
| 40 | --- a/arch/arm/mach-omap2/prm44xx.c | ||
| 41 | +++ b/arch/arm/mach-omap2/prm44xx.c | ||
| 42 | @@ -87,18 +87,3 @@ u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) | ||
| 43 | { | ||
| 44 | return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); | ||
| 45 | } | ||
| 46 | - | ||
| 47 | -void omap4_prm_global_warm_sw_reset(void) | ||
| 48 | -{ | ||
| 49 | - u32 v; | ||
| 50 | - | ||
| 51 | - v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, | ||
| 52 | - OMAP4_RM_RSTCTRL); | ||
| 53 | - v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; | ||
| 54 | - omap4_prm_write_inst_reg(v, OMAP4430_PRM_DEVICE_INST, | ||
| 55 | - OMAP4_RM_RSTCTRL); | ||
| 56 | - | ||
| 57 | - /* OCP barrier */ | ||
| 58 | - v = omap4_prm_read_inst_reg(OMAP4430_PRM_DEVICE_INST, | ||
| 59 | - OMAP4_RM_RSTCTRL); | ||
| 60 | -} | ||
| 61 | diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h | ||
| 62 | index 3732e02..725a6a8 100644 | ||
| 63 | --- a/arch/arm/mach-omap2/prm44xx.h | ||
| 64 | +++ b/arch/arm/mach-omap2/prm44xx.h | ||
| 65 | @@ -755,8 +755,6 @@ extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx); | ||
| 66 | extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); | ||
| 67 | extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); | ||
| 68 | |||
| 69 | -extern void omap4_prm_global_warm_sw_reset(void); | ||
| 70 | - | ||
| 71 | # endif | ||
| 72 | |||
| 73 | #endif | ||
| 74 | diff --git a/arch/arm/mach-omap2/prminst44xx.c b/arch/arm/mach-omap2/prminst44xx.c | ||
| 75 | index 35e02aa..3a7bab1 100644 | ||
| 76 | --- a/arch/arm/mach-omap2/prminst44xx.c | ||
| 77 | +++ b/arch/arm/mach-omap2/prminst44xx.c | ||
| 78 | @@ -155,3 +155,22 @@ int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, | ||
| 79 | |||
| 80 | return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; | ||
| 81 | } | ||
| 82 | + | ||
| 83 | + | ||
| 84 | +void omap4_prminst_global_warm_sw_reset(void) | ||
| 85 | +{ | ||
| 86 | + u32 v; | ||
| 87 | + | ||
| 88 | + v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, | ||
| 89 | + OMAP4430_PRM_DEVICE_INST, | ||
| 90 | + OMAP4_PRM_RSTCTRL_OFFSET); | ||
| 91 | + v |= OMAP4430_RST_GLOBAL_WARM_SW_MASK; | ||
| 92 | + omap4_prminst_write_inst_reg(v, OMAP4430_PRM_PARTITION, | ||
| 93 | + OMAP4430_PRM_DEVICE_INST, | ||
| 94 | + OMAP4_PRM_RSTCTRL_OFFSET); | ||
| 95 | + | ||
| 96 | + /* OCP barrier */ | ||
| 97 | + v = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, | ||
| 98 | + OMAP4430_PRM_DEVICE_INST, | ||
| 99 | + OMAP4_PRM_RSTCTRL_OFFSET); | ||
| 100 | +} | ||
| 101 | diff --git a/arch/arm/mach-omap2/prminst44xx.h b/arch/arm/mach-omap2/prminst44xx.h | ||
| 102 | index c14ae29..46f2efb 100644 | ||
| 103 | --- a/arch/arm/mach-omap2/prminst44xx.h | ||
| 104 | +++ b/arch/arm/mach-omap2/prminst44xx.h | ||
| 105 | @@ -21,13 +21,13 @@ extern void omap4_prminst_write_inst_reg(u32 val, u8 part, s16 inst, u16 idx); | ||
| 106 | extern u32 omap4_prminst_rmw_inst_reg_bits(u32 mask, u32 bits, u8 part, | ||
| 107 | s16 inst, u16 idx); | ||
| 108 | |||
| 109 | -extern void omap4_prm_global_warm_sw_reset(void); | ||
| 110 | +extern void omap4_prminst_global_warm_sw_reset(void); | ||
| 111 | |||
| 112 | extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, | ||
| 113 | - u16 rstctrl_offs); | ||
| 114 | + u16 rstctrl_offs); | ||
| 115 | extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, | ||
| 116 | - u16 rstctrl_offs); | ||
| 117 | + u16 rstctrl_offs); | ||
| 118 | extern int omap4_prminst_deassert_hardreset(u8 shift, u8 part, s16 inst, | ||
| 119 | - u16 rstctrl_offs); | ||
| 120 | + u16 rstctrl_offs); | ||
| 121 | |||
| 122 | #endif | ||
| 123 | -- | ||
| 124 | 1.7.2.5 | ||
| 125 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0083-OMAP4-prm-Remove-deprecated-functions.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0083-OMAP4-prm-Remove-deprecated-functions.patch deleted file mode 100644 index 403764f8..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0083-OMAP4-prm-Remove-deprecated-functions.patch +++ /dev/null | |||
| @@ -1,81 +0,0 @@ | |||
| 1 | From fd94741b5ca1552a0c6e8c000f9f7530853862ea Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:31 -0600 | ||
| 4 | Subject: [PATCH 083/149] OMAP4: prm: Remove deprecated functions | ||
| 5 | |||
| 6 | The new prminst_xxx accessors based on partition and offset | ||
| 7 | is now used, so removed all the previous prcm_xxx accessors. | ||
| 8 | |||
| 9 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 10 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 11 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 12 | [paul@pwsan.com: remove fn prototypes also] | ||
| 13 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/prm44xx.c | 37 ------------------------------------- | ||
| 16 | arch/arm/mach-omap2/prm44xx.h | 4 ---- | ||
| 17 | 2 files changed, 0 insertions(+), 41 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c | ||
| 20 | index f815329..0016555 100644 | ||
| 21 | --- a/arch/arm/mach-omap2/prm44xx.c | ||
| 22 | +++ b/arch/arm/mach-omap2/prm44xx.c | ||
| 23 | @@ -50,40 +50,3 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) | ||
| 24 | |||
| 25 | return v; | ||
| 26 | } | ||
| 27 | - | ||
| 28 | -/* Read a PRM register, AND it, and shift the result down to bit 0 */ | ||
| 29 | -/* XXX deprecated */ | ||
| 30 | -u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask) | ||
| 31 | -{ | ||
| 32 | - u32 v; | ||
| 33 | - | ||
| 34 | - v = __raw_readl(reg); | ||
| 35 | - v &= mask; | ||
| 36 | - v >>= __ffs(mask); | ||
| 37 | - | ||
| 38 | - return v; | ||
| 39 | -} | ||
| 40 | - | ||
| 41 | -/* Read-modify-write a register in a PRM module. Caller must lock */ | ||
| 42 | -/* XXX deprecated */ | ||
| 43 | -u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg) | ||
| 44 | -{ | ||
| 45 | - u32 v; | ||
| 46 | - | ||
| 47 | - v = __raw_readl(reg); | ||
| 48 | - v &= ~mask; | ||
| 49 | - v |= bits; | ||
| 50 | - __raw_writel(v, reg); | ||
| 51 | - | ||
| 52 | - return v; | ||
| 53 | -} | ||
| 54 | - | ||
| 55 | -u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 reg) | ||
| 56 | -{ | ||
| 57 | - return omap4_prm_rmw_inst_reg_bits(bits, bits, inst, reg); | ||
| 58 | -} | ||
| 59 | - | ||
| 60 | -u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 reg) | ||
| 61 | -{ | ||
| 62 | - return omap4_prm_rmw_inst_reg_bits(bits, 0x0, inst, reg); | ||
| 63 | -} | ||
| 64 | diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h | ||
| 65 | index 725a6a8..7dfa379 100644 | ||
| 66 | --- a/arch/arm/mach-omap2/prm44xx.h | ||
| 67 | +++ b/arch/arm/mach-omap2/prm44xx.h | ||
| 68 | @@ -750,10 +750,6 @@ | ||
| 69 | extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx); | ||
| 70 | extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); | ||
| 71 | extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); | ||
| 72 | -extern u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg); | ||
| 73 | -extern u32 omap4_prm_set_inst_reg_bits(u32 bits, s16 inst, s16 idx); | ||
| 74 | -extern u32 omap4_prm_clear_inst_reg_bits(u32 bits, s16 inst, s16 idx); | ||
| 75 | -extern u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); | ||
| 76 | |||
| 77 | # endif | ||
| 78 | |||
| 79 | -- | ||
| 80 | 1.7.2.5 | ||
| 81 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0084-OMAP4-hwmod-data-Add-PRM-context-register-offset.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0084-OMAP4-hwmod-data-Add-PRM-context-register-offset.patch deleted file mode 100644 index f4e1889b..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0084-OMAP4-hwmod-data-Add-PRM-context-register-offset.patch +++ /dev/null | |||
| @@ -1,630 +0,0 @@ | |||
| 1 | From 77eafa703d62b15f2e1021beb2f5437b6b2764ed Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:32 -0600 | ||
| 4 | Subject: [PATCH 084/149] OMAP4: hwmod data: Add PRM context register offset | ||
| 5 | |||
| 6 | Add a 'context_offs' entry in the prcm.omap4 structure to all | ||
| 7 | IPs when applicable. | ||
| 8 | The offset will be used to retrieve the per module context lost | ||
| 9 | information now available on OMAP4. | ||
| 10 | |||
| 11 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 12 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 13 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 14 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 15 | --- | ||
| 16 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 74 ++++++++++++++++++++++++++ | ||
| 17 | arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 + | ||
| 18 | 2 files changed, 75 insertions(+), 0 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 21 | index 6a190f5..d68ef2c 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 23 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 24 | @@ -127,6 +127,7 @@ static struct omap_hwmod omap44xx_dmm_hwmod = { | ||
| 25 | .prcm = { | ||
| 26 | .omap4 = { | ||
| 27 | .clkctrl_offs = OMAP4_CM_MEMIF_DMM_CLKCTRL_OFFSET, | ||
| 28 | + .context_offs = OMAP4_RM_MEMIF_DMM_CONTEXT_OFFSET, | ||
| 29 | }, | ||
| 30 | }, | ||
| 31 | .slaves = omap44xx_dmm_slaves, | ||
| 32 | @@ -183,6 +184,7 @@ static struct omap_hwmod omap44xx_emif_fw_hwmod = { | ||
| 33 | .prcm = { | ||
| 34 | .omap4 = { | ||
| 35 | .clkctrl_offs = OMAP4_CM_MEMIF_EMIF_FW_CLKCTRL_OFFSET, | ||
| 36 | + .context_offs = OMAP4_RM_MEMIF_EMIF_FW_CONTEXT_OFFSET, | ||
| 37 | }, | ||
| 38 | }, | ||
| 39 | .slaves = omap44xx_emif_fw_slaves, | ||
| 40 | @@ -228,6 +230,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { | ||
| 41 | .prcm = { | ||
| 42 | .omap4 = { | ||
| 43 | .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, | ||
| 44 | + .context_offs = OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET, | ||
| 45 | }, | ||
| 46 | }, | ||
| 47 | .slaves = omap44xx_l3_instr_slaves, | ||
| 48 | @@ -327,6 +330,7 @@ static struct omap_hwmod omap44xx_l3_main_1_hwmod = { | ||
| 49 | .prcm = { | ||
| 50 | .omap4 = { | ||
| 51 | .clkctrl_offs = OMAP4_CM_L3_1_L3_1_CLKCTRL_OFFSET, | ||
| 52 | + .context_offs = OMAP4_RM_L3_1_L3_1_CONTEXT_OFFSET, | ||
| 53 | }, | ||
| 54 | }, | ||
| 55 | .slaves = omap44xx_l3_main_1_slaves, | ||
| 56 | @@ -428,6 +432,7 @@ static struct omap_hwmod omap44xx_l3_main_2_hwmod = { | ||
| 57 | .prcm = { | ||
| 58 | .omap4 = { | ||
| 59 | .clkctrl_offs = OMAP4_CM_L3_2_L3_2_CLKCTRL_OFFSET, | ||
| 60 | + .context_offs = OMAP4_RM_L3_2_L3_2_CONTEXT_OFFSET, | ||
| 61 | }, | ||
| 62 | }, | ||
| 63 | .slaves = omap44xx_l3_main_2_slaves, | ||
| 64 | @@ -484,6 +489,7 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = { | ||
| 65 | .prcm = { | ||
| 66 | .omap4 = { | ||
| 67 | .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, | ||
| 68 | + .context_offs = OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET, | ||
| 69 | }, | ||
| 70 | }, | ||
| 71 | .slaves = omap44xx_l3_main_3_slaves, | ||
| 72 | @@ -575,6 +581,7 @@ static struct omap_hwmod omap44xx_l4_cfg_hwmod = { | ||
| 73 | .prcm = { | ||
| 74 | .omap4 = { | ||
| 75 | .clkctrl_offs = OMAP4_CM_L4CFG_L4_CFG_CLKCTRL_OFFSET, | ||
| 76 | + .context_offs = OMAP4_RM_L4CFG_L4_CFG_CONTEXT_OFFSET, | ||
| 77 | }, | ||
| 78 | }, | ||
| 79 | .slaves = omap44xx_l4_cfg_slaves, | ||
| 80 | @@ -603,6 +610,7 @@ static struct omap_hwmod omap44xx_l4_per_hwmod = { | ||
| 81 | .prcm = { | ||
| 82 | .omap4 = { | ||
| 83 | .clkctrl_offs = OMAP4_CM_L4PER_L4PER_CLKCTRL_OFFSET, | ||
| 84 | + .context_offs = OMAP4_RM_L4PER_L4_PER_CONTEXT_OFFSET, | ||
| 85 | }, | ||
| 86 | }, | ||
| 87 | .slaves = omap44xx_l4_per_slaves, | ||
| 88 | @@ -631,6 +639,7 @@ static struct omap_hwmod omap44xx_l4_wkup_hwmod = { | ||
| 89 | .prcm = { | ||
| 90 | .omap4 = { | ||
| 91 | .clkctrl_offs = OMAP4_CM_WKUP_L4WKUP_CLKCTRL_OFFSET, | ||
| 92 | + .context_offs = OMAP4_RM_WKUP_L4WKUP_CONTEXT_OFFSET, | ||
| 93 | }, | ||
| 94 | }, | ||
| 95 | .slaves = omap44xx_l4_wkup_slaves, | ||
| 96 | @@ -809,6 +818,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { | ||
| 97 | .prcm = { | ||
| 98 | .omap4 = { | ||
| 99 | .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, | ||
| 100 | + .context_offs = OMAP4_RM_ABE_AESS_CONTEXT_OFFSET, | ||
| 101 | }, | ||
| 102 | }, | ||
| 103 | .slaves = omap44xx_aess_slaves, | ||
| 104 | @@ -899,6 +909,7 @@ static struct omap_hwmod omap44xx_counter_32k_hwmod = { | ||
| 105 | .prcm = { | ||
| 106 | .omap4 = { | ||
| 107 | .clkctrl_offs = OMAP4_CM_WKUP_SYNCTIMER_CLKCTRL_OFFSET, | ||
| 108 | + .context_offs = OMAP4_RM_WKUP_SYNCTIMER_CONTEXT_OFFSET, | ||
| 109 | }, | ||
| 110 | }, | ||
| 111 | .slaves = omap44xx_counter_32k_slaves, | ||
| 112 | @@ -983,6 +994,7 @@ static struct omap_hwmod omap44xx_dma_system_hwmod = { | ||
| 113 | .prcm = { | ||
| 114 | .omap4 = { | ||
| 115 | .clkctrl_offs = OMAP4_CM_SDMA_SDMA_CLKCTRL_OFFSET, | ||
| 116 | + .context_offs = OMAP4_RM_SDMA_SDMA_CONTEXT_OFFSET, | ||
| 117 | }, | ||
| 118 | }, | ||
| 119 | .dev_attr = &dma_dev_attr, | ||
| 120 | @@ -1077,6 +1089,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { | ||
| 121 | .prcm = { | ||
| 122 | .omap4 = { | ||
| 123 | .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, | ||
| 124 | + .context_offs = OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET, | ||
| 125 | }, | ||
| 126 | }, | ||
| 127 | .slaves = omap44xx_dmic_slaves, | ||
| 128 | @@ -1162,6 +1175,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { | ||
| 129 | .omap4 = { | ||
| 130 | .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, | ||
| 131 | .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, | ||
| 132 | + .context_offs = OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET, | ||
| 133 | }, | ||
| 134 | }, | ||
| 135 | .slaves = omap44xx_dsp_slaves, | ||
| 136 | @@ -1250,6 +1264,7 @@ static struct omap_hwmod omap44xx_dss_hwmod = { | ||
| 137 | .prcm = { | ||
| 138 | .omap4 = { | ||
| 139 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 140 | + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, | ||
| 141 | }, | ||
| 142 | }, | ||
| 143 | .opt_clks = dss_opt_clks, | ||
| 144 | @@ -1354,6 +1369,7 @@ static struct omap_hwmod omap44xx_dss_dispc_hwmod = { | ||
| 145 | .prcm = { | ||
| 146 | .omap4 = { | ||
| 147 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 148 | + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, | ||
| 149 | }, | ||
| 150 | }, | ||
| 151 | .opt_clks = dss_dispc_opt_clks, | ||
| 152 | @@ -1452,6 +1468,7 @@ static struct omap_hwmod omap44xx_dss_dsi1_hwmod = { | ||
| 153 | .prcm = { | ||
| 154 | .omap4 = { | ||
| 155 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 156 | + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, | ||
| 157 | }, | ||
| 158 | }, | ||
| 159 | .opt_clks = dss_dsi1_opt_clks, | ||
| 160 | @@ -1529,6 +1546,7 @@ static struct omap_hwmod omap44xx_dss_dsi2_hwmod = { | ||
| 161 | .prcm = { | ||
| 162 | .omap4 = { | ||
| 163 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 164 | + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, | ||
| 165 | }, | ||
| 166 | }, | ||
| 167 | .opt_clks = dss_dsi2_opt_clks, | ||
| 168 | @@ -1626,6 +1644,7 @@ static struct omap_hwmod omap44xx_dss_hdmi_hwmod = { | ||
| 169 | .prcm = { | ||
| 170 | .omap4 = { | ||
| 171 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 172 | + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, | ||
| 173 | }, | ||
| 174 | }, | ||
| 175 | .opt_clks = dss_hdmi_opt_clks, | ||
| 176 | @@ -1717,6 +1736,7 @@ static struct omap_hwmod omap44xx_dss_rfbi_hwmod = { | ||
| 177 | .prcm = { | ||
| 178 | .omap4 = { | ||
| 179 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 180 | + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, | ||
| 181 | }, | ||
| 182 | }, | ||
| 183 | .opt_clks = dss_rfbi_opt_clks, | ||
| 184 | @@ -1787,6 +1807,7 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { | ||
| 185 | .prcm = { | ||
| 186 | .omap4 = { | ||
| 187 | .clkctrl_offs = OMAP4_CM_DSS_DSS_CLKCTRL_OFFSET, | ||
| 188 | + .context_offs = OMAP4_RM_DSS_DSS_CONTEXT_OFFSET, | ||
| 189 | }, | ||
| 190 | }, | ||
| 191 | .slaves = omap44xx_dss_venc_slaves, | ||
| 192 | @@ -1866,6 +1887,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { | ||
| 193 | .prcm = { | ||
| 194 | .omap4 = { | ||
| 195 | .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, | ||
| 196 | + .context_offs = OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET, | ||
| 197 | }, | ||
| 198 | }, | ||
| 199 | .opt_clks = gpio1_opt_clks, | ||
| 200 | @@ -1920,6 +1942,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { | ||
| 201 | .prcm = { | ||
| 202 | .omap4 = { | ||
| 203 | .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, | ||
| 204 | + .context_offs = OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET, | ||
| 205 | }, | ||
| 206 | }, | ||
| 207 | .opt_clks = gpio2_opt_clks, | ||
| 208 | @@ -1974,6 +1997,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { | ||
| 209 | .prcm = { | ||
| 210 | .omap4 = { | ||
| 211 | .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, | ||
| 212 | + .context_offs = OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET, | ||
| 213 | }, | ||
| 214 | }, | ||
| 215 | .opt_clks = gpio3_opt_clks, | ||
| 216 | @@ -2028,6 +2052,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { | ||
| 217 | .prcm = { | ||
| 218 | .omap4 = { | ||
| 219 | .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, | ||
| 220 | + .context_offs = OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET, | ||
| 221 | }, | ||
| 222 | }, | ||
| 223 | .opt_clks = gpio4_opt_clks, | ||
| 224 | @@ -2082,6 +2107,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { | ||
| 225 | .prcm = { | ||
| 226 | .omap4 = { | ||
| 227 | .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, | ||
| 228 | + .context_offs = OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET, | ||
| 229 | }, | ||
| 230 | }, | ||
| 231 | .opt_clks = gpio5_opt_clks, | ||
| 232 | @@ -2136,6 +2162,7 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { | ||
| 233 | .prcm = { | ||
| 234 | .omap4 = { | ||
| 235 | .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, | ||
| 236 | + .context_offs = OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET, | ||
| 237 | }, | ||
| 238 | }, | ||
| 239 | .opt_clks = gpio6_opt_clks, | ||
| 240 | @@ -2215,6 +2242,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { | ||
| 241 | .prcm = { | ||
| 242 | .omap4 = { | ||
| 243 | .clkctrl_offs = OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, | ||
| 244 | + .context_offs = OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET, | ||
| 245 | }, | ||
| 246 | }, | ||
| 247 | .slaves = omap44xx_hsi_slaves, | ||
| 248 | @@ -2298,6 +2326,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { | ||
| 249 | .prcm = { | ||
| 250 | .omap4 = { | ||
| 251 | .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, | ||
| 252 | + .context_offs = OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET, | ||
| 253 | }, | ||
| 254 | }, | ||
| 255 | .slaves = omap44xx_i2c1_slaves, | ||
| 256 | @@ -2353,6 +2382,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { | ||
| 257 | .prcm = { | ||
| 258 | .omap4 = { | ||
| 259 | .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, | ||
| 260 | + .context_offs = OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET, | ||
| 261 | }, | ||
| 262 | }, | ||
| 263 | .slaves = omap44xx_i2c2_slaves, | ||
| 264 | @@ -2408,6 +2438,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { | ||
| 265 | .prcm = { | ||
| 266 | .omap4 = { | ||
| 267 | .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, | ||
| 268 | + .context_offs = OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET, | ||
| 269 | }, | ||
| 270 | }, | ||
| 271 | .slaves = omap44xx_i2c3_slaves, | ||
| 272 | @@ -2463,6 +2494,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { | ||
| 273 | .prcm = { | ||
| 274 | .omap4 = { | ||
| 275 | .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, | ||
| 276 | + .context_offs = OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET, | ||
| 277 | }, | ||
| 278 | }, | ||
| 279 | .slaves = omap44xx_i2c4_slaves, | ||
| 280 | @@ -2560,6 +2592,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { | ||
| 281 | .omap4 = { | ||
| 282 | .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, | ||
| 283 | .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, | ||
| 284 | + .context_offs = OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET, | ||
| 285 | }, | ||
| 286 | }, | ||
| 287 | .slaves = omap44xx_ipu_slaves, | ||
| 288 | @@ -2646,6 +2679,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { | ||
| 289 | .prcm = { | ||
| 290 | .omap4 = { | ||
| 291 | .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, | ||
| 292 | + .context_offs = OMAP4_RM_CAM_ISS_CONTEXT_OFFSET, | ||
| 293 | }, | ||
| 294 | }, | ||
| 295 | .opt_clks = iss_opt_clks, | ||
| 296 | @@ -2760,6 +2794,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { | ||
| 297 | .omap4 = { | ||
| 298 | .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, | ||
| 299 | .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, | ||
| 300 | + .context_offs = OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET, | ||
| 301 | }, | ||
| 302 | }, | ||
| 303 | .slaves = omap44xx_iva_slaves, | ||
| 304 | @@ -2830,6 +2865,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { | ||
| 305 | .prcm = { | ||
| 306 | .omap4 = { | ||
| 307 | .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, | ||
| 308 | + .context_offs = OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET, | ||
| 309 | }, | ||
| 310 | }, | ||
| 311 | .slaves = omap44xx_kbd_slaves, | ||
| 312 | @@ -2895,6 +2931,7 @@ static struct omap_hwmod omap44xx_mailbox_hwmod = { | ||
| 313 | .prcm = { | ||
| 314 | .omap4 = { | ||
| 315 | .clkctrl_offs = OMAP4_CM_L4CFG_MAILBOX_CLKCTRL_OFFSET, | ||
| 316 | + .context_offs = OMAP4_RM_L4CFG_MAILBOX_CONTEXT_OFFSET, | ||
| 317 | }, | ||
| 318 | }, | ||
| 319 | .slaves = omap44xx_mailbox_slaves, | ||
| 320 | @@ -2988,6 +3025,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { | ||
| 321 | .prcm = { | ||
| 322 | .omap4 = { | ||
| 323 | .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, | ||
| 324 | + .context_offs = OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET, | ||
| 325 | }, | ||
| 326 | }, | ||
| 327 | .slaves = omap44xx_mcbsp1_slaves, | ||
| 328 | @@ -3062,6 +3100,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { | ||
| 329 | .prcm = { | ||
| 330 | .omap4 = { | ||
| 331 | .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, | ||
| 332 | + .context_offs = OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET, | ||
| 333 | }, | ||
| 334 | }, | ||
| 335 | .slaves = omap44xx_mcbsp2_slaves, | ||
| 336 | @@ -3136,6 +3175,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { | ||
| 337 | .prcm = { | ||
| 338 | .omap4 = { | ||
| 339 | .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, | ||
| 340 | + .context_offs = OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET, | ||
| 341 | }, | ||
| 342 | }, | ||
| 343 | .slaves = omap44xx_mcbsp3_slaves, | ||
| 344 | @@ -3189,6 +3229,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { | ||
| 345 | .prcm = { | ||
| 346 | .omap4 = { | ||
| 347 | .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, | ||
| 348 | + .context_offs = OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET, | ||
| 349 | }, | ||
| 350 | }, | ||
| 351 | .slaves = omap44xx_mcbsp4_slaves, | ||
| 352 | @@ -3282,6 +3323,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { | ||
| 353 | .prcm = { | ||
| 354 | .omap4 = { | ||
| 355 | .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, | ||
| 356 | + .context_offs = OMAP4_RM_ABE_PDM_CONTEXT_OFFSET, | ||
| 357 | }, | ||
| 358 | }, | ||
| 359 | .slaves = omap44xx_mcpdm_slaves, | ||
| 360 | @@ -3368,6 +3410,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { | ||
| 361 | .prcm = { | ||
| 362 | .omap4 = { | ||
| 363 | .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, | ||
| 364 | + .context_offs = OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET, | ||
| 365 | }, | ||
| 366 | }, | ||
| 367 | .dev_attr = &mcspi1_dev_attr, | ||
| 368 | @@ -3429,6 +3472,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { | ||
| 369 | .prcm = { | ||
| 370 | .omap4 = { | ||
| 371 | .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, | ||
| 372 | + .context_offs = OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET, | ||
| 373 | }, | ||
| 374 | }, | ||
| 375 | .dev_attr = &mcspi2_dev_attr, | ||
| 376 | @@ -3490,6 +3534,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { | ||
| 377 | .prcm = { | ||
| 378 | .omap4 = { | ||
| 379 | .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, | ||
| 380 | + .context_offs = OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET, | ||
| 381 | }, | ||
| 382 | }, | ||
| 383 | .dev_attr = &mcspi3_dev_attr, | ||
| 384 | @@ -3549,6 +3594,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { | ||
| 385 | .prcm = { | ||
| 386 | .omap4 = { | ||
| 387 | .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, | ||
| 388 | + .context_offs = OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET, | ||
| 389 | }, | ||
| 390 | }, | ||
| 391 | .dev_attr = &mcspi4_dev_attr, | ||
| 392 | @@ -3634,6 +3680,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { | ||
| 393 | .prcm = { | ||
| 394 | .omap4 = { | ||
| 395 | .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, | ||
| 396 | + .context_offs = OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET, | ||
| 397 | }, | ||
| 398 | }, | ||
| 399 | .dev_attr = &mmc1_dev_attr, | ||
| 400 | @@ -3694,6 +3741,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { | ||
| 401 | .prcm = { | ||
| 402 | .omap4 = { | ||
| 403 | .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, | ||
| 404 | + .context_offs = OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET, | ||
| 405 | }, | ||
| 406 | }, | ||
| 407 | .slaves = omap44xx_mmc2_slaves, | ||
| 408 | @@ -3749,6 +3797,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { | ||
| 409 | .prcm = { | ||
| 410 | .omap4 = { | ||
| 411 | .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, | ||
| 412 | + .context_offs = OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET, | ||
| 413 | }, | ||
| 414 | }, | ||
| 415 | .slaves = omap44xx_mmc3_slaves, | ||
| 416 | @@ -3803,6 +3852,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { | ||
| 417 | .prcm = { | ||
| 418 | .omap4 = { | ||
| 419 | .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, | ||
| 420 | + .context_offs = OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET, | ||
| 421 | }, | ||
| 422 | }, | ||
| 423 | .slaves = omap44xx_mmc4_slaves, | ||
| 424 | @@ -3856,6 +3906,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { | ||
| 425 | .prcm = { | ||
| 426 | .omap4 = { | ||
| 427 | .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, | ||
| 428 | + .context_offs = OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET, | ||
| 429 | }, | ||
| 430 | }, | ||
| 431 | .slaves = omap44xx_mmc5_slaves, | ||
| 432 | @@ -3897,6 +3948,7 @@ static struct omap_hwmod omap44xx_mpu_hwmod = { | ||
| 433 | .prcm = { | ||
| 434 | .omap4 = { | ||
| 435 | .clkctrl_offs = OMAP4_CM_MPU_MPU_CLKCTRL_OFFSET, | ||
| 436 | + .context_offs = OMAP4_RM_MPU_MPU_CONTEXT_OFFSET, | ||
| 437 | }, | ||
| 438 | }, | ||
| 439 | .masters = omap44xx_mpu_masters, | ||
| 440 | @@ -3971,6 +4023,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { | ||
| 441 | .prcm = { | ||
| 442 | .omap4 = { | ||
| 443 | .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, | ||
| 444 | + .context_offs = OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET, | ||
| 445 | }, | ||
| 446 | }, | ||
| 447 | .slaves = omap44xx_smartreflex_core_slaves, | ||
| 448 | @@ -4018,6 +4071,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { | ||
| 449 | .prcm = { | ||
| 450 | .omap4 = { | ||
| 451 | .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, | ||
| 452 | + .context_offs = OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET, | ||
| 453 | }, | ||
| 454 | }, | ||
| 455 | .slaves = omap44xx_smartreflex_iva_slaves, | ||
| 456 | @@ -4065,6 +4119,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { | ||
| 457 | .prcm = { | ||
| 458 | .omap4 = { | ||
| 459 | .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, | ||
| 460 | + .context_offs = OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET, | ||
| 461 | }, | ||
| 462 | }, | ||
| 463 | .slaves = omap44xx_smartreflex_mpu_slaves, | ||
| 464 | @@ -4127,6 +4182,7 @@ static struct omap_hwmod omap44xx_spinlock_hwmod = { | ||
| 465 | .prcm = { | ||
| 466 | .omap4 = { | ||
| 467 | .clkctrl_offs = OMAP4_CM_L4CFG_HW_SEM_CLKCTRL_OFFSET, | ||
| 468 | + .context_offs = OMAP4_RM_L4CFG_HW_SEM_CONTEXT_OFFSET, | ||
| 469 | }, | ||
| 470 | }, | ||
| 471 | .slaves = omap44xx_spinlock_slaves, | ||
| 472 | @@ -4211,6 +4267,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { | ||
| 473 | .prcm = { | ||
| 474 | .omap4 = { | ||
| 475 | .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, | ||
| 476 | + .context_offs = OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET, | ||
| 477 | }, | ||
| 478 | }, | ||
| 479 | .slaves = omap44xx_timer1_slaves, | ||
| 480 | @@ -4257,6 +4314,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { | ||
| 481 | .prcm = { | ||
| 482 | .omap4 = { | ||
| 483 | .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, | ||
| 484 | + .context_offs = OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET, | ||
| 485 | }, | ||
| 486 | }, | ||
| 487 | .slaves = omap44xx_timer2_slaves, | ||
| 488 | @@ -4303,6 +4361,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { | ||
| 489 | .prcm = { | ||
| 490 | .omap4 = { | ||
| 491 | .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, | ||
| 492 | + .context_offs = OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET, | ||
| 493 | }, | ||
| 494 | }, | ||
| 495 | .slaves = omap44xx_timer3_slaves, | ||
| 496 | @@ -4349,6 +4408,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { | ||
| 497 | .prcm = { | ||
| 498 | .omap4 = { | ||
| 499 | .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, | ||
| 500 | + .context_offs = OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET, | ||
| 501 | }, | ||
| 502 | }, | ||
| 503 | .slaves = omap44xx_timer4_slaves, | ||
| 504 | @@ -4414,6 +4474,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { | ||
| 505 | .prcm = { | ||
| 506 | .omap4 = { | ||
| 507 | .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, | ||
| 508 | + .context_offs = OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET, | ||
| 509 | }, | ||
| 510 | }, | ||
| 511 | .slaves = omap44xx_timer5_slaves, | ||
| 512 | @@ -4480,6 +4541,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { | ||
| 513 | .prcm = { | ||
| 514 | .omap4 = { | ||
| 515 | .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, | ||
| 516 | + .context_offs = OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET, | ||
| 517 | }, | ||
| 518 | }, | ||
| 519 | .slaves = omap44xx_timer6_slaves, | ||
| 520 | @@ -4545,6 +4607,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { | ||
| 521 | .prcm = { | ||
| 522 | .omap4 = { | ||
| 523 | .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, | ||
| 524 | + .context_offs = OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET, | ||
| 525 | }, | ||
| 526 | }, | ||
| 527 | .slaves = omap44xx_timer7_slaves, | ||
| 528 | @@ -4610,6 +4673,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { | ||
| 529 | .prcm = { | ||
| 530 | .omap4 = { | ||
| 531 | .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, | ||
| 532 | + .context_offs = OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET, | ||
| 533 | }, | ||
| 534 | }, | ||
| 535 | .slaves = omap44xx_timer8_slaves, | ||
| 536 | @@ -4656,6 +4720,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { | ||
| 537 | .prcm = { | ||
| 538 | .omap4 = { | ||
| 539 | .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, | ||
| 540 | + .context_offs = OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET, | ||
| 541 | }, | ||
| 542 | }, | ||
| 543 | .slaves = omap44xx_timer9_slaves, | ||
| 544 | @@ -4702,6 +4767,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { | ||
| 545 | .prcm = { | ||
| 546 | .omap4 = { | ||
| 547 | .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, | ||
| 548 | + .context_offs = OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET, | ||
| 549 | }, | ||
| 550 | }, | ||
| 551 | .slaves = omap44xx_timer10_slaves, | ||
| 552 | @@ -4748,6 +4814,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { | ||
| 553 | .prcm = { | ||
| 554 | .omap4 = { | ||
| 555 | .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, | ||
| 556 | + .context_offs = OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET, | ||
| 557 | }, | ||
| 558 | }, | ||
| 559 | .slaves = omap44xx_timer11_slaves, | ||
| 560 | @@ -4823,6 +4890,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { | ||
| 561 | .prcm = { | ||
| 562 | .omap4 = { | ||
| 563 | .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, | ||
| 564 | + .context_offs = OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET, | ||
| 565 | }, | ||
| 566 | }, | ||
| 567 | .slaves = omap44xx_uart1_slaves, | ||
| 568 | @@ -4876,6 +4944,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { | ||
| 569 | .prcm = { | ||
| 570 | .omap4 = { | ||
| 571 | .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, | ||
| 572 | + .context_offs = OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET, | ||
| 573 | }, | ||
| 574 | }, | ||
| 575 | .slaves = omap44xx_uart2_slaves, | ||
| 576 | @@ -4930,6 +4999,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { | ||
| 577 | .prcm = { | ||
| 578 | .omap4 = { | ||
| 579 | .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, | ||
| 580 | + .context_offs = OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET, | ||
| 581 | }, | ||
| 582 | }, | ||
| 583 | .slaves = omap44xx_uart3_slaves, | ||
| 584 | @@ -4983,6 +5053,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { | ||
| 585 | .prcm = { | ||
| 586 | .omap4 = { | ||
| 587 | .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, | ||
| 588 | + .context_offs = OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET, | ||
| 589 | }, | ||
| 590 | }, | ||
| 591 | .slaves = omap44xx_uart4_slaves, | ||
| 592 | @@ -5062,6 +5133,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { | ||
| 593 | .prcm = { | ||
| 594 | .omap4 = { | ||
| 595 | .clkctrl_offs = OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, | ||
| 596 | + .context_offs = OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET, | ||
| 597 | }, | ||
| 598 | }, | ||
| 599 | .opt_clks = usb_otg_hs_opt_clks, | ||
| 600 | @@ -5135,6 +5207,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { | ||
| 601 | .prcm = { | ||
| 602 | .omap4 = { | ||
| 603 | .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, | ||
| 604 | + .context_offs = OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET, | ||
| 605 | }, | ||
| 606 | }, | ||
| 607 | .slaves = omap44xx_wd_timer2_slaves, | ||
| 608 | @@ -5200,6 +5273,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { | ||
| 609 | .prcm = { | ||
| 610 | .omap4 = { | ||
| 611 | .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, | ||
| 612 | + .context_offs = OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET, | ||
| 613 | }, | ||
| 614 | }, | ||
| 615 | .slaves = omap44xx_wd_timer3_slaves, | ||
| 616 | diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 617 | index 9ef4424..16439fa 100644 | ||
| 618 | --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 619 | +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 620 | @@ -363,6 +363,7 @@ struct omap_hwmod_omap2_prcm { | ||
| 621 | struct omap_hwmod_omap4_prcm { | ||
| 622 | u16 clkctrl_offs; | ||
| 623 | u16 rstctrl_offs; | ||
| 624 | + u16 context_offs; | ||
| 625 | u8 submodule_wkdep_bit; | ||
| 626 | }; | ||
| 627 | |||
| 628 | -- | ||
| 629 | 1.7.2.5 | ||
| 630 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0085-OMAP4-hwmod-data-Add-modulemode-entry-in-omap_hwmod-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0085-OMAP4-hwmod-data-Add-modulemode-entry-in-omap_hwmod-.patch deleted file mode 100644 index c7523594..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0085-OMAP4-hwmod-data-Add-modulemode-entry-in-omap_hwmod-.patch +++ /dev/null | |||
| @@ -1,503 +0,0 @@ | |||
| 1 | From be3f7a2833bf720dcb60b40675a790024995ac27 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:32 -0600 | ||
| 4 | Subject: [PATCH 085/149] OMAP4: hwmod data: Add modulemode entry in omap_hwmod structure | ||
| 5 | |||
| 6 | Add a new field to provide the mode supported by the module. | ||
| 7 | The mode will control the way mandatory clocks are managed by the PRCM. | ||
| 8 | |||
| 9 | 0 : Module is temporarily disabled by SW. OCP access to module are stalled. | ||
| 10 | Can be used to change timing parameter of GPMC module. | ||
| 11 | 1 : Module is managed automatically by HW according to clock domain | ||
| 12 | transition. A clock domain sleep transition put module into idle. | ||
| 13 | A wakeup domain transition put it back into function. | ||
| 14 | If CLKTRCTRL=3, any OCP access to module is always granted. | ||
| 15 | Module clocks may be gated according to the clock domain state. | ||
| 16 | 2 : Module is explicitly enabled. Interface clock (if not used for | ||
| 17 | functions) may be gated according to the clock domain state. | ||
| 18 | Functional clocks are guarantied to stay present. As long as | ||
| 19 | in this configuration, power domain sleep transition cannot happen. | ||
| 20 | |||
| 21 | Some modules will have a modulemode initialized at 1 (HWCTRL) by default. | ||
| 22 | This is the case for interconnect and simple module like GPIO, WDT, MAILBOX. | ||
| 23 | |||
| 24 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 25 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 26 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 27 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 28 | --- | ||
| 29 | arch/arm/mach-omap2/omap_hwmod_44xx_data.c | 55 ++++++++++++++++++++++++++ | ||
| 30 | arch/arm/plat-omap/include/plat/omap_hwmod.h | 6 +++ | ||
| 31 | 2 files changed, 61 insertions(+), 0 deletions(-) | ||
| 32 | |||
| 33 | diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 34 | index d68ef2c..6201422 100644 | ||
| 35 | --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 36 | +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | ||
| 37 | @@ -231,6 +231,7 @@ static struct omap_hwmod omap44xx_l3_instr_hwmod = { | ||
| 38 | .omap4 = { | ||
| 39 | .clkctrl_offs = OMAP4_CM_L3INSTR_L3_INSTR_CLKCTRL_OFFSET, | ||
| 40 | .context_offs = OMAP4_RM_L3INSTR_L3_INSTR_CONTEXT_OFFSET, | ||
| 41 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 42 | }, | ||
| 43 | }, | ||
| 44 | .slaves = omap44xx_l3_instr_slaves, | ||
| 45 | @@ -490,6 +491,7 @@ static struct omap_hwmod omap44xx_l3_main_3_hwmod = { | ||
| 46 | .omap4 = { | ||
| 47 | .clkctrl_offs = OMAP4_CM_L3INSTR_L3_3_CLKCTRL_OFFSET, | ||
| 48 | .context_offs = OMAP4_RM_L3INSTR_L3_3_CONTEXT_OFFSET, | ||
| 49 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 50 | }, | ||
| 51 | }, | ||
| 52 | .slaves = omap44xx_l3_main_3_slaves, | ||
| 53 | @@ -819,6 +821,7 @@ static struct omap_hwmod omap44xx_aess_hwmod = { | ||
| 54 | .omap4 = { | ||
| 55 | .clkctrl_offs = OMAP4_CM1_ABE_AESS_CLKCTRL_OFFSET, | ||
| 56 | .context_offs = OMAP4_RM_ABE_AESS_CONTEXT_OFFSET, | ||
| 57 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 58 | }, | ||
| 59 | }, | ||
| 60 | .slaves = omap44xx_aess_slaves, | ||
| 61 | @@ -1090,6 +1093,7 @@ static struct omap_hwmod omap44xx_dmic_hwmod = { | ||
| 62 | .omap4 = { | ||
| 63 | .clkctrl_offs = OMAP4_CM1_ABE_DMIC_CLKCTRL_OFFSET, | ||
| 64 | .context_offs = OMAP4_RM_ABE_DMIC_CONTEXT_OFFSET, | ||
| 65 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 66 | }, | ||
| 67 | }, | ||
| 68 | .slaves = omap44xx_dmic_slaves, | ||
| 69 | @@ -1176,6 +1180,7 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { | ||
| 70 | .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, | ||
| 71 | .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, | ||
| 72 | .context_offs = OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET, | ||
| 73 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 74 | }, | ||
| 75 | }, | ||
| 76 | .slaves = omap44xx_dsp_slaves, | ||
| 77 | @@ -1888,6 +1893,7 @@ static struct omap_hwmod omap44xx_gpio1_hwmod = { | ||
| 78 | .omap4 = { | ||
| 79 | .clkctrl_offs = OMAP4_CM_WKUP_GPIO1_CLKCTRL_OFFSET, | ||
| 80 | .context_offs = OMAP4_RM_WKUP_GPIO1_CONTEXT_OFFSET, | ||
| 81 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 82 | }, | ||
| 83 | }, | ||
| 84 | .opt_clks = gpio1_opt_clks, | ||
| 85 | @@ -1943,6 +1949,7 @@ static struct omap_hwmod omap44xx_gpio2_hwmod = { | ||
| 86 | .omap4 = { | ||
| 87 | .clkctrl_offs = OMAP4_CM_L4PER_GPIO2_CLKCTRL_OFFSET, | ||
| 88 | .context_offs = OMAP4_RM_L4PER_GPIO2_CONTEXT_OFFSET, | ||
| 89 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 90 | }, | ||
| 91 | }, | ||
| 92 | .opt_clks = gpio2_opt_clks, | ||
| 93 | @@ -1998,6 +2005,7 @@ static struct omap_hwmod omap44xx_gpio3_hwmod = { | ||
| 94 | .omap4 = { | ||
| 95 | .clkctrl_offs = OMAP4_CM_L4PER_GPIO3_CLKCTRL_OFFSET, | ||
| 96 | .context_offs = OMAP4_RM_L4PER_GPIO3_CONTEXT_OFFSET, | ||
| 97 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 98 | }, | ||
| 99 | }, | ||
| 100 | .opt_clks = gpio3_opt_clks, | ||
| 101 | @@ -2053,6 +2061,7 @@ static struct omap_hwmod omap44xx_gpio4_hwmod = { | ||
| 102 | .omap4 = { | ||
| 103 | .clkctrl_offs = OMAP4_CM_L4PER_GPIO4_CLKCTRL_OFFSET, | ||
| 104 | .context_offs = OMAP4_RM_L4PER_GPIO4_CONTEXT_OFFSET, | ||
| 105 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 106 | }, | ||
| 107 | }, | ||
| 108 | .opt_clks = gpio4_opt_clks, | ||
| 109 | @@ -2108,6 +2117,7 @@ static struct omap_hwmod omap44xx_gpio5_hwmod = { | ||
| 110 | .omap4 = { | ||
| 111 | .clkctrl_offs = OMAP4_CM_L4PER_GPIO5_CLKCTRL_OFFSET, | ||
| 112 | .context_offs = OMAP4_RM_L4PER_GPIO5_CONTEXT_OFFSET, | ||
| 113 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 114 | }, | ||
| 115 | }, | ||
| 116 | .opt_clks = gpio5_opt_clks, | ||
| 117 | @@ -2163,6 +2173,7 @@ static struct omap_hwmod omap44xx_gpio6_hwmod = { | ||
| 118 | .omap4 = { | ||
| 119 | .clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET, | ||
| 120 | .context_offs = OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET, | ||
| 121 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 122 | }, | ||
| 123 | }, | ||
| 124 | .opt_clks = gpio6_opt_clks, | ||
| 125 | @@ -2243,6 +2254,7 @@ static struct omap_hwmod omap44xx_hsi_hwmod = { | ||
| 126 | .omap4 = { | ||
| 127 | .clkctrl_offs = OMAP4_CM_L3INIT_HSI_CLKCTRL_OFFSET, | ||
| 128 | .context_offs = OMAP4_RM_L3INIT_HSI_CONTEXT_OFFSET, | ||
| 129 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 130 | }, | ||
| 131 | }, | ||
| 132 | .slaves = omap44xx_hsi_slaves, | ||
| 133 | @@ -2327,6 +2339,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = { | ||
| 134 | .omap4 = { | ||
| 135 | .clkctrl_offs = OMAP4_CM_L4PER_I2C1_CLKCTRL_OFFSET, | ||
| 136 | .context_offs = OMAP4_RM_L4PER_I2C1_CONTEXT_OFFSET, | ||
| 137 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 138 | }, | ||
| 139 | }, | ||
| 140 | .slaves = omap44xx_i2c1_slaves, | ||
| 141 | @@ -2383,6 +2396,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = { | ||
| 142 | .omap4 = { | ||
| 143 | .clkctrl_offs = OMAP4_CM_L4PER_I2C2_CLKCTRL_OFFSET, | ||
| 144 | .context_offs = OMAP4_RM_L4PER_I2C2_CONTEXT_OFFSET, | ||
| 145 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 146 | }, | ||
| 147 | }, | ||
| 148 | .slaves = omap44xx_i2c2_slaves, | ||
| 149 | @@ -2439,6 +2453,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = { | ||
| 150 | .omap4 = { | ||
| 151 | .clkctrl_offs = OMAP4_CM_L4PER_I2C3_CLKCTRL_OFFSET, | ||
| 152 | .context_offs = OMAP4_RM_L4PER_I2C3_CONTEXT_OFFSET, | ||
| 153 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 154 | }, | ||
| 155 | }, | ||
| 156 | .slaves = omap44xx_i2c3_slaves, | ||
| 157 | @@ -2495,6 +2510,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = { | ||
| 158 | .omap4 = { | ||
| 159 | .clkctrl_offs = OMAP4_CM_L4PER_I2C4_CLKCTRL_OFFSET, | ||
| 160 | .context_offs = OMAP4_RM_L4PER_I2C4_CONTEXT_OFFSET, | ||
| 161 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 162 | }, | ||
| 163 | }, | ||
| 164 | .slaves = omap44xx_i2c4_slaves, | ||
| 165 | @@ -2593,6 +2609,7 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { | ||
| 166 | .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, | ||
| 167 | .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, | ||
| 168 | .context_offs = OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET, | ||
| 169 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 170 | }, | ||
| 171 | }, | ||
| 172 | .slaves = omap44xx_ipu_slaves, | ||
| 173 | @@ -2680,6 +2697,7 @@ static struct omap_hwmod omap44xx_iss_hwmod = { | ||
| 174 | .omap4 = { | ||
| 175 | .clkctrl_offs = OMAP4_CM_CAM_ISS_CLKCTRL_OFFSET, | ||
| 176 | .context_offs = OMAP4_RM_CAM_ISS_CONTEXT_OFFSET, | ||
| 177 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 178 | }, | ||
| 179 | }, | ||
| 180 | .opt_clks = iss_opt_clks, | ||
| 181 | @@ -2795,6 +2813,7 @@ static struct omap_hwmod omap44xx_iva_hwmod = { | ||
| 182 | .clkctrl_offs = OMAP4_CM_IVAHD_IVAHD_CLKCTRL_OFFSET, | ||
| 183 | .rstctrl_offs = OMAP4_RM_IVAHD_RSTCTRL_OFFSET, | ||
| 184 | .context_offs = OMAP4_RM_IVAHD_IVAHD_CONTEXT_OFFSET, | ||
| 185 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 186 | }, | ||
| 187 | }, | ||
| 188 | .slaves = omap44xx_iva_slaves, | ||
| 189 | @@ -2866,6 +2885,7 @@ static struct omap_hwmod omap44xx_kbd_hwmod = { | ||
| 190 | .omap4 = { | ||
| 191 | .clkctrl_offs = OMAP4_CM_WKUP_KEYBOARD_CLKCTRL_OFFSET, | ||
| 192 | .context_offs = OMAP4_RM_WKUP_KEYBOARD_CONTEXT_OFFSET, | ||
| 193 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 194 | }, | ||
| 195 | }, | ||
| 196 | .slaves = omap44xx_kbd_slaves, | ||
| 197 | @@ -3026,6 +3046,7 @@ static struct omap_hwmod omap44xx_mcbsp1_hwmod = { | ||
| 198 | .omap4 = { | ||
| 199 | .clkctrl_offs = OMAP4_CM1_ABE_MCBSP1_CLKCTRL_OFFSET, | ||
| 200 | .context_offs = OMAP4_RM_ABE_MCBSP1_CONTEXT_OFFSET, | ||
| 201 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 202 | }, | ||
| 203 | }, | ||
| 204 | .slaves = omap44xx_mcbsp1_slaves, | ||
| 205 | @@ -3101,6 +3122,7 @@ static struct omap_hwmod omap44xx_mcbsp2_hwmod = { | ||
| 206 | .omap4 = { | ||
| 207 | .clkctrl_offs = OMAP4_CM1_ABE_MCBSP2_CLKCTRL_OFFSET, | ||
| 208 | .context_offs = OMAP4_RM_ABE_MCBSP2_CONTEXT_OFFSET, | ||
| 209 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 210 | }, | ||
| 211 | }, | ||
| 212 | .slaves = omap44xx_mcbsp2_slaves, | ||
| 213 | @@ -3176,6 +3198,7 @@ static struct omap_hwmod omap44xx_mcbsp3_hwmod = { | ||
| 214 | .omap4 = { | ||
| 215 | .clkctrl_offs = OMAP4_CM1_ABE_MCBSP3_CLKCTRL_OFFSET, | ||
| 216 | .context_offs = OMAP4_RM_ABE_MCBSP3_CONTEXT_OFFSET, | ||
| 217 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 218 | }, | ||
| 219 | }, | ||
| 220 | .slaves = omap44xx_mcbsp3_slaves, | ||
| 221 | @@ -3230,6 +3253,7 @@ static struct omap_hwmod omap44xx_mcbsp4_hwmod = { | ||
| 222 | .omap4 = { | ||
| 223 | .clkctrl_offs = OMAP4_CM_L4PER_MCBSP4_CLKCTRL_OFFSET, | ||
| 224 | .context_offs = OMAP4_RM_L4PER_MCBSP4_CONTEXT_OFFSET, | ||
| 225 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 226 | }, | ||
| 227 | }, | ||
| 228 | .slaves = omap44xx_mcbsp4_slaves, | ||
| 229 | @@ -3324,6 +3348,7 @@ static struct omap_hwmod omap44xx_mcpdm_hwmod = { | ||
| 230 | .omap4 = { | ||
| 231 | .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET, | ||
| 232 | .context_offs = OMAP4_RM_ABE_PDM_CONTEXT_OFFSET, | ||
| 233 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 234 | }, | ||
| 235 | }, | ||
| 236 | .slaves = omap44xx_mcpdm_slaves, | ||
| 237 | @@ -3411,6 +3436,7 @@ static struct omap_hwmod omap44xx_mcspi1_hwmod = { | ||
| 238 | .omap4 = { | ||
| 239 | .clkctrl_offs = OMAP4_CM_L4PER_MCSPI1_CLKCTRL_OFFSET, | ||
| 240 | .context_offs = OMAP4_RM_L4PER_MCSPI1_CONTEXT_OFFSET, | ||
| 241 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 242 | }, | ||
| 243 | }, | ||
| 244 | .dev_attr = &mcspi1_dev_attr, | ||
| 245 | @@ -3473,6 +3499,7 @@ static struct omap_hwmod omap44xx_mcspi2_hwmod = { | ||
| 246 | .omap4 = { | ||
| 247 | .clkctrl_offs = OMAP4_CM_L4PER_MCSPI2_CLKCTRL_OFFSET, | ||
| 248 | .context_offs = OMAP4_RM_L4PER_MCSPI2_CONTEXT_OFFSET, | ||
| 249 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 250 | }, | ||
| 251 | }, | ||
| 252 | .dev_attr = &mcspi2_dev_attr, | ||
| 253 | @@ -3535,6 +3562,7 @@ static struct omap_hwmod omap44xx_mcspi3_hwmod = { | ||
| 254 | .omap4 = { | ||
| 255 | .clkctrl_offs = OMAP4_CM_L4PER_MCSPI3_CLKCTRL_OFFSET, | ||
| 256 | .context_offs = OMAP4_RM_L4PER_MCSPI3_CONTEXT_OFFSET, | ||
| 257 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 258 | }, | ||
| 259 | }, | ||
| 260 | .dev_attr = &mcspi3_dev_attr, | ||
| 261 | @@ -3595,6 +3623,7 @@ static struct omap_hwmod omap44xx_mcspi4_hwmod = { | ||
| 262 | .omap4 = { | ||
| 263 | .clkctrl_offs = OMAP4_CM_L4PER_MCSPI4_CLKCTRL_OFFSET, | ||
| 264 | .context_offs = OMAP4_RM_L4PER_MCSPI4_CONTEXT_OFFSET, | ||
| 265 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 266 | }, | ||
| 267 | }, | ||
| 268 | .dev_attr = &mcspi4_dev_attr, | ||
| 269 | @@ -3681,6 +3710,7 @@ static struct omap_hwmod omap44xx_mmc1_hwmod = { | ||
| 270 | .omap4 = { | ||
| 271 | .clkctrl_offs = OMAP4_CM_L3INIT_MMC1_CLKCTRL_OFFSET, | ||
| 272 | .context_offs = OMAP4_RM_L3INIT_MMC1_CONTEXT_OFFSET, | ||
| 273 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 274 | }, | ||
| 275 | }, | ||
| 276 | .dev_attr = &mmc1_dev_attr, | ||
| 277 | @@ -3742,6 +3772,7 @@ static struct omap_hwmod omap44xx_mmc2_hwmod = { | ||
| 278 | .omap4 = { | ||
| 279 | .clkctrl_offs = OMAP4_CM_L3INIT_MMC2_CLKCTRL_OFFSET, | ||
| 280 | .context_offs = OMAP4_RM_L3INIT_MMC2_CONTEXT_OFFSET, | ||
| 281 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 282 | }, | ||
| 283 | }, | ||
| 284 | .slaves = omap44xx_mmc2_slaves, | ||
| 285 | @@ -3798,6 +3829,7 @@ static struct omap_hwmod omap44xx_mmc3_hwmod = { | ||
| 286 | .omap4 = { | ||
| 287 | .clkctrl_offs = OMAP4_CM_L4PER_MMCSD3_CLKCTRL_OFFSET, | ||
| 288 | .context_offs = OMAP4_RM_L4PER_MMCSD3_CONTEXT_OFFSET, | ||
| 289 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 290 | }, | ||
| 291 | }, | ||
| 292 | .slaves = omap44xx_mmc3_slaves, | ||
| 293 | @@ -3853,6 +3885,7 @@ static struct omap_hwmod omap44xx_mmc4_hwmod = { | ||
| 294 | .omap4 = { | ||
| 295 | .clkctrl_offs = OMAP4_CM_L4PER_MMCSD4_CLKCTRL_OFFSET, | ||
| 296 | .context_offs = OMAP4_RM_L4PER_MMCSD4_CONTEXT_OFFSET, | ||
| 297 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 298 | }, | ||
| 299 | }, | ||
| 300 | .slaves = omap44xx_mmc4_slaves, | ||
| 301 | @@ -3907,6 +3940,7 @@ static struct omap_hwmod omap44xx_mmc5_hwmod = { | ||
| 302 | .omap4 = { | ||
| 303 | .clkctrl_offs = OMAP4_CM_L4PER_MMCSD5_CLKCTRL_OFFSET, | ||
| 304 | .context_offs = OMAP4_RM_L4PER_MMCSD5_CONTEXT_OFFSET, | ||
| 305 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 306 | }, | ||
| 307 | }, | ||
| 308 | .slaves = omap44xx_mmc5_slaves, | ||
| 309 | @@ -4024,6 +4058,7 @@ static struct omap_hwmod omap44xx_smartreflex_core_hwmod = { | ||
| 310 | .omap4 = { | ||
| 311 | .clkctrl_offs = OMAP4_CM_ALWON_SR_CORE_CLKCTRL_OFFSET, | ||
| 312 | .context_offs = OMAP4_RM_ALWON_SR_CORE_CONTEXT_OFFSET, | ||
| 313 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 314 | }, | ||
| 315 | }, | ||
| 316 | .slaves = omap44xx_smartreflex_core_slaves, | ||
| 317 | @@ -4072,6 +4107,7 @@ static struct omap_hwmod omap44xx_smartreflex_iva_hwmod = { | ||
| 318 | .omap4 = { | ||
| 319 | .clkctrl_offs = OMAP4_CM_ALWON_SR_IVA_CLKCTRL_OFFSET, | ||
| 320 | .context_offs = OMAP4_RM_ALWON_SR_IVA_CONTEXT_OFFSET, | ||
| 321 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 322 | }, | ||
| 323 | }, | ||
| 324 | .slaves = omap44xx_smartreflex_iva_slaves, | ||
| 325 | @@ -4120,6 +4156,7 @@ static struct omap_hwmod omap44xx_smartreflex_mpu_hwmod = { | ||
| 326 | .omap4 = { | ||
| 327 | .clkctrl_offs = OMAP4_CM_ALWON_SR_MPU_CLKCTRL_OFFSET, | ||
| 328 | .context_offs = OMAP4_RM_ALWON_SR_MPU_CONTEXT_OFFSET, | ||
| 329 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 330 | }, | ||
| 331 | }, | ||
| 332 | .slaves = omap44xx_smartreflex_mpu_slaves, | ||
| 333 | @@ -4268,6 +4305,7 @@ static struct omap_hwmod omap44xx_timer1_hwmod = { | ||
| 334 | .omap4 = { | ||
| 335 | .clkctrl_offs = OMAP4_CM_WKUP_TIMER1_CLKCTRL_OFFSET, | ||
| 336 | .context_offs = OMAP4_RM_WKUP_TIMER1_CONTEXT_OFFSET, | ||
| 337 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 338 | }, | ||
| 339 | }, | ||
| 340 | .slaves = omap44xx_timer1_slaves, | ||
| 341 | @@ -4315,6 +4353,7 @@ static struct omap_hwmod omap44xx_timer2_hwmod = { | ||
| 342 | .omap4 = { | ||
| 343 | .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER2_CLKCTRL_OFFSET, | ||
| 344 | .context_offs = OMAP4_RM_L4PER_DMTIMER2_CONTEXT_OFFSET, | ||
| 345 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 346 | }, | ||
| 347 | }, | ||
| 348 | .slaves = omap44xx_timer2_slaves, | ||
| 349 | @@ -4362,6 +4401,7 @@ static struct omap_hwmod omap44xx_timer3_hwmod = { | ||
| 350 | .omap4 = { | ||
| 351 | .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER3_CLKCTRL_OFFSET, | ||
| 352 | .context_offs = OMAP4_RM_L4PER_DMTIMER3_CONTEXT_OFFSET, | ||
| 353 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 354 | }, | ||
| 355 | }, | ||
| 356 | .slaves = omap44xx_timer3_slaves, | ||
| 357 | @@ -4409,6 +4449,7 @@ static struct omap_hwmod omap44xx_timer4_hwmod = { | ||
| 358 | .omap4 = { | ||
| 359 | .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER4_CLKCTRL_OFFSET, | ||
| 360 | .context_offs = OMAP4_RM_L4PER_DMTIMER4_CONTEXT_OFFSET, | ||
| 361 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 362 | }, | ||
| 363 | }, | ||
| 364 | .slaves = omap44xx_timer4_slaves, | ||
| 365 | @@ -4475,6 +4516,7 @@ static struct omap_hwmod omap44xx_timer5_hwmod = { | ||
| 366 | .omap4 = { | ||
| 367 | .clkctrl_offs = OMAP4_CM1_ABE_TIMER5_CLKCTRL_OFFSET, | ||
| 368 | .context_offs = OMAP4_RM_ABE_TIMER5_CONTEXT_OFFSET, | ||
| 369 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 370 | }, | ||
| 371 | }, | ||
| 372 | .slaves = omap44xx_timer5_slaves, | ||
| 373 | @@ -4542,6 +4584,7 @@ static struct omap_hwmod omap44xx_timer6_hwmod = { | ||
| 374 | .omap4 = { | ||
| 375 | .clkctrl_offs = OMAP4_CM1_ABE_TIMER6_CLKCTRL_OFFSET, | ||
| 376 | .context_offs = OMAP4_RM_ABE_TIMER6_CONTEXT_OFFSET, | ||
| 377 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 378 | }, | ||
| 379 | }, | ||
| 380 | .slaves = omap44xx_timer6_slaves, | ||
| 381 | @@ -4608,6 +4651,7 @@ static struct omap_hwmod omap44xx_timer7_hwmod = { | ||
| 382 | .omap4 = { | ||
| 383 | .clkctrl_offs = OMAP4_CM1_ABE_TIMER7_CLKCTRL_OFFSET, | ||
| 384 | .context_offs = OMAP4_RM_ABE_TIMER7_CONTEXT_OFFSET, | ||
| 385 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 386 | }, | ||
| 387 | }, | ||
| 388 | .slaves = omap44xx_timer7_slaves, | ||
| 389 | @@ -4674,6 +4718,7 @@ static struct omap_hwmod omap44xx_timer8_hwmod = { | ||
| 390 | .omap4 = { | ||
| 391 | .clkctrl_offs = OMAP4_CM1_ABE_TIMER8_CLKCTRL_OFFSET, | ||
| 392 | .context_offs = OMAP4_RM_ABE_TIMER8_CONTEXT_OFFSET, | ||
| 393 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 394 | }, | ||
| 395 | }, | ||
| 396 | .slaves = omap44xx_timer8_slaves, | ||
| 397 | @@ -4721,6 +4766,7 @@ static struct omap_hwmod omap44xx_timer9_hwmod = { | ||
| 398 | .omap4 = { | ||
| 399 | .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER9_CLKCTRL_OFFSET, | ||
| 400 | .context_offs = OMAP4_RM_L4PER_DMTIMER9_CONTEXT_OFFSET, | ||
| 401 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 402 | }, | ||
| 403 | }, | ||
| 404 | .slaves = omap44xx_timer9_slaves, | ||
| 405 | @@ -4768,6 +4814,7 @@ static struct omap_hwmod omap44xx_timer10_hwmod = { | ||
| 406 | .omap4 = { | ||
| 407 | .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER10_CLKCTRL_OFFSET, | ||
| 408 | .context_offs = OMAP4_RM_L4PER_DMTIMER10_CONTEXT_OFFSET, | ||
| 409 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 410 | }, | ||
| 411 | }, | ||
| 412 | .slaves = omap44xx_timer10_slaves, | ||
| 413 | @@ -4815,6 +4862,7 @@ static struct omap_hwmod omap44xx_timer11_hwmod = { | ||
| 414 | .omap4 = { | ||
| 415 | .clkctrl_offs = OMAP4_CM_L4PER_DMTIMER11_CLKCTRL_OFFSET, | ||
| 416 | .context_offs = OMAP4_RM_L4PER_DMTIMER11_CONTEXT_OFFSET, | ||
| 417 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 418 | }, | ||
| 419 | }, | ||
| 420 | .slaves = omap44xx_timer11_slaves, | ||
| 421 | @@ -4891,6 +4939,7 @@ static struct omap_hwmod omap44xx_uart1_hwmod = { | ||
| 422 | .omap4 = { | ||
| 423 | .clkctrl_offs = OMAP4_CM_L4PER_UART1_CLKCTRL_OFFSET, | ||
| 424 | .context_offs = OMAP4_RM_L4PER_UART1_CONTEXT_OFFSET, | ||
| 425 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 426 | }, | ||
| 427 | }, | ||
| 428 | .slaves = omap44xx_uart1_slaves, | ||
| 429 | @@ -4945,6 +4994,7 @@ static struct omap_hwmod omap44xx_uart2_hwmod = { | ||
| 430 | .omap4 = { | ||
| 431 | .clkctrl_offs = OMAP4_CM_L4PER_UART2_CLKCTRL_OFFSET, | ||
| 432 | .context_offs = OMAP4_RM_L4PER_UART2_CONTEXT_OFFSET, | ||
| 433 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 434 | }, | ||
| 435 | }, | ||
| 436 | .slaves = omap44xx_uart2_slaves, | ||
| 437 | @@ -5000,6 +5050,7 @@ static struct omap_hwmod omap44xx_uart3_hwmod = { | ||
| 438 | .omap4 = { | ||
| 439 | .clkctrl_offs = OMAP4_CM_L4PER_UART3_CLKCTRL_OFFSET, | ||
| 440 | .context_offs = OMAP4_RM_L4PER_UART3_CONTEXT_OFFSET, | ||
| 441 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 442 | }, | ||
| 443 | }, | ||
| 444 | .slaves = omap44xx_uart3_slaves, | ||
| 445 | @@ -5054,6 +5105,7 @@ static struct omap_hwmod omap44xx_uart4_hwmod = { | ||
| 446 | .omap4 = { | ||
| 447 | .clkctrl_offs = OMAP4_CM_L4PER_UART4_CLKCTRL_OFFSET, | ||
| 448 | .context_offs = OMAP4_RM_L4PER_UART4_CONTEXT_OFFSET, | ||
| 449 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 450 | }, | ||
| 451 | }, | ||
| 452 | .slaves = omap44xx_uart4_slaves, | ||
| 453 | @@ -5134,6 +5186,7 @@ static struct omap_hwmod omap44xx_usb_otg_hs_hwmod = { | ||
| 454 | .omap4 = { | ||
| 455 | .clkctrl_offs = OMAP4_CM_L3INIT_USB_OTG_CLKCTRL_OFFSET, | ||
| 456 | .context_offs = OMAP4_RM_L3INIT_USB_OTG_CONTEXT_OFFSET, | ||
| 457 | + .modulemode = MODULEMODE_HWCTRL, | ||
| 458 | }, | ||
| 459 | }, | ||
| 460 | .opt_clks = usb_otg_hs_opt_clks, | ||
| 461 | @@ -5208,6 +5261,7 @@ static struct omap_hwmod omap44xx_wd_timer2_hwmod = { | ||
| 462 | .omap4 = { | ||
| 463 | .clkctrl_offs = OMAP4_CM_WKUP_WDT2_CLKCTRL_OFFSET, | ||
| 464 | .context_offs = OMAP4_RM_WKUP_WDT2_CONTEXT_OFFSET, | ||
| 465 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 466 | }, | ||
| 467 | }, | ||
| 468 | .slaves = omap44xx_wd_timer2_slaves, | ||
| 469 | @@ -5274,6 +5328,7 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = { | ||
| 470 | .omap4 = { | ||
| 471 | .clkctrl_offs = OMAP4_CM1_ABE_WDT3_CLKCTRL_OFFSET, | ||
| 472 | .context_offs = OMAP4_RM_ABE_WDT3_CONTEXT_OFFSET, | ||
| 473 | + .modulemode = MODULEMODE_SWCTRL, | ||
| 474 | }, | ||
| 475 | }, | ||
| 476 | .slaves = omap44xx_wd_timer3_slaves, | ||
| 477 | diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 478 | index 16439fa..0e329ca 100644 | ||
| 479 | --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 480 | +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 481 | @@ -80,6 +80,11 @@ extern struct omap_hwmod_sysc_fields omap_hwmod_sysc_type2; | ||
| 482 | #define HWMOD_IDLEMODE_SMART (1 << 2) | ||
| 483 | #define HWMOD_IDLEMODE_SMART_WKUP (1 << 3) | ||
| 484 | |||
| 485 | +/* modulemode control type (SW or HW) */ | ||
| 486 | +#define MODULEMODE_HWCTRL 1 | ||
| 487 | +#define MODULEMODE_SWCTRL 2 | ||
| 488 | + | ||
| 489 | + | ||
| 490 | /** | ||
| 491 | * struct omap_hwmod_mux_info - hwmod specific mux configuration | ||
| 492 | * @pads: array of omap_device_pad entries | ||
| 493 | @@ -365,6 +370,7 @@ struct omap_hwmod_omap4_prcm { | ||
| 494 | u16 rstctrl_offs; | ||
| 495 | u16 context_offs; | ||
| 496 | u8 submodule_wkdep_bit; | ||
| 497 | + u8 modulemode; | ||
| 498 | }; | ||
| 499 | |||
| 500 | |||
| 501 | -- | ||
| 502 | 1.7.2.5 | ||
| 503 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0086-OMAP4-cm-Add-two-new-APIs-for-modulemode-control.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0086-OMAP4-cm-Add-two-new-APIs-for-modulemode-control.patch deleted file mode 100644 index 86e81653..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0086-OMAP4-cm-Add-two-new-APIs-for-modulemode-control.patch +++ /dev/null | |||
| @@ -1,88 +0,0 @@ | |||
| 1 | From 3ef45618e396f3d9abb12fb4ef1c4462ccca6fd3 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:32 -0600 | ||
| 4 | Subject: [PATCH 086/149] OMAP4: cm: Add two new APIs for modulemode control | ||
| 5 | |||
| 6 | In OMAP4, a new programming model based on module control instead | ||
| 7 | of clock control was introduced. | ||
| 8 | Expose two APIs to allow the upper layer (omap_hwmod) to control | ||
| 9 | the module mode independently of the parent clocks management. | ||
| 10 | |||
| 11 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 12 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 13 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 14 | [paul@pwsan.com: renamed 'omap4_cm_' fns to 'omap4_cminst_'; cleaned up | ||
| 15 | kerneldoc] | ||
| 16 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 17 | --- | ||
| 18 | arch/arm/mach-omap2/cminst44xx.c | 40 ++++++++++++++++++++++++++++++++++++++ | ||
| 19 | arch/arm/mach-omap2/cminst44xx.h | 5 ++++ | ||
| 20 | 2 files changed, 45 insertions(+), 0 deletions(-) | ||
| 21 | |||
| 22 | diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c | ||
| 23 | index 0fe3f14..eb2a472 100644 | ||
| 24 | --- a/arch/arm/mach-omap2/cminst44xx.c | ||
| 25 | +++ b/arch/arm/mach-omap2/cminst44xx.c | ||
| 26 | @@ -309,3 +309,43 @@ int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_off | ||
| 27 | |||
| 28 | return (i < MAX_MODULE_READY_TIME) ? 0 : -EBUSY; | ||
| 29 | } | ||
| 30 | + | ||
| 31 | +/** | ||
| 32 | + * omap4_cminst_module_enable - Enable the modulemode inside CLKCTRL | ||
| 33 | + * @mode: Module mode (SW or HW) | ||
| 34 | + * @part: PRCM partition ID that the CM_CLKCTRL register exists in | ||
| 35 | + * @inst: CM instance register offset (*_INST macro) | ||
| 36 | + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) | ||
| 37 | + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) | ||
| 38 | + * | ||
| 39 | + * No return value. | ||
| 40 | + */ | ||
| 41 | +void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, | ||
| 42 | + u16 clkctrl_offs) | ||
| 43 | +{ | ||
| 44 | + u32 v; | ||
| 45 | + | ||
| 46 | + v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); | ||
| 47 | + v &= ~OMAP4430_MODULEMODE_MASK; | ||
| 48 | + v |= mode << OMAP4430_MODULEMODE_SHIFT; | ||
| 49 | + omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); | ||
| 50 | +} | ||
| 51 | + | ||
| 52 | +/** | ||
| 53 | + * omap4_cminst_module_disable - Disable the module inside CLKCTRL | ||
| 54 | + * @part: PRCM partition ID that the CM_CLKCTRL register exists in | ||
| 55 | + * @inst: CM instance register offset (*_INST macro) | ||
| 56 | + * @cdoffs: Clockdomain register offset (*_CDOFFS macro) | ||
| 57 | + * @clkctrl_offs: Module clock control register offset (*_CLKCTRL macro) | ||
| 58 | + * | ||
| 59 | + * No return value. | ||
| 60 | + */ | ||
| 61 | +void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, | ||
| 62 | + u16 clkctrl_offs) | ||
| 63 | +{ | ||
| 64 | + u32 v; | ||
| 65 | + | ||
| 66 | + v = omap4_cminst_read_inst_reg(part, inst, clkctrl_offs); | ||
| 67 | + v &= ~OMAP4430_MODULEMODE_MASK; | ||
| 68 | + omap4_cminst_write_inst_reg(v, part, inst, clkctrl_offs); | ||
| 69 | +} | ||
| 70 | diff --git a/arch/arm/mach-omap2/cminst44xx.h b/arch/arm/mach-omap2/cminst44xx.h | ||
| 71 | index a985400..f2ea645 100644 | ||
| 72 | --- a/arch/arm/mach-omap2/cminst44xx.h | ||
| 73 | +++ b/arch/arm/mach-omap2/cminst44xx.h | ||
| 74 | @@ -20,6 +20,11 @@ extern void omap4_cminst_clkdm_force_wakeup(u8 part, s16 inst, u16 cdoffs); | ||
| 75 | extern int omap4_cminst_wait_module_ready(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); | ||
| 76 | extern int omap4_cminst_wait_module_idle(u8 part, u16 inst, s16 cdoffs, u16 clkctrl_offs); | ||
| 77 | |||
| 78 | +extern void omap4_cminst_module_enable(u8 mode, u8 part, u16 inst, s16 cdoffs, | ||
| 79 | + u16 clkctrl_offs); | ||
| 80 | +extern void omap4_cminst_module_disable(u8 part, u16 inst, s16 cdoffs, | ||
| 81 | + u16 clkctrl_offs); | ||
| 82 | + | ||
| 83 | /* | ||
| 84 | * In an ideal world, we would not export these low-level functions, | ||
| 85 | * but this will probably take some time to fix properly | ||
| 86 | -- | ||
| 87 | 1.7.2.5 | ||
| 88 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0087-OMAP4-hwmod-Introduce-the-module-control-in-hwmod-co.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0087-OMAP4-hwmod-Introduce-the-module-control-in-hwmod-co.patch deleted file mode 100644 index 30b978e9..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0087-OMAP4-hwmod-Introduce-the-module-control-in-hwmod-co.patch +++ /dev/null | |||
| @@ -1,129 +0,0 @@ | |||
| 1 | From a6647b2c4e9c1786df8dcb59595c3029f5a9f493 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:33 -0600 | ||
| 4 | Subject: [PATCH 087/149] OMAP4: hwmod: Introduce the module control in hwmod control | ||
| 5 | |||
| 6 | Take advantage of the explicit modulemode control to fix | ||
| 7 | the way parents clocks are managed. | ||
| 8 | A module must be disabled before any parents are disabled. | ||
| 9 | That programming model was not possible with the previous | ||
| 10 | implementation that was considering a modulemode as a leaf | ||
| 11 | clock node managed by the clock fmwk. | ||
| 12 | This was leading to bad crash upon disable when the parent | ||
| 13 | clock was gated before the module completed its transition | ||
| 14 | to idle. | ||
| 15 | |||
| 16 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 17 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 18 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 19 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 20 | --- | ||
| 21 | arch/arm/mach-omap2/omap_hwmod.c | 63 ++++++++++++++++++++++++++++++++++++- | ||
| 22 | 1 files changed, 61 insertions(+), 2 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 25 | index a0f7d31..4424fee 100644 | ||
| 26 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 27 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 28 | @@ -680,6 +680,56 @@ static void _disable_optional_clocks(struct omap_hwmod *oh) | ||
| 29 | } | ||
| 30 | |||
| 31 | /** | ||
| 32 | + * _enable_module - enable CLKCTRL modulemode on OMAP4 | ||
| 33 | + * @oh: struct omap_hwmod * | ||
| 34 | + * | ||
| 35 | + * Enables the PRCM module mode related to the hwmod @oh. | ||
| 36 | + * No return value. | ||
| 37 | + */ | ||
| 38 | +static void _enable_module(struct omap_hwmod *oh) | ||
| 39 | +{ | ||
| 40 | + /* The module mode does not exist prior OMAP4 */ | ||
| 41 | + if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
| 42 | + return; | ||
| 43 | + | ||
| 44 | + if (!oh->clkdm || !oh->prcm.omap4.modulemode) | ||
| 45 | + return; | ||
| 46 | + | ||
| 47 | + pr_debug("omap_hwmod: %s: _enable_module: %d\n", | ||
| 48 | + oh->name, oh->prcm.omap4.modulemode); | ||
| 49 | + | ||
| 50 | + omap4_cminst_module_enable(oh->prcm.omap4.modulemode, | ||
| 51 | + oh->clkdm->prcm_partition, | ||
| 52 | + oh->clkdm->cm_inst, | ||
| 53 | + oh->clkdm->clkdm_offs, | ||
| 54 | + oh->prcm.omap4.clkctrl_offs); | ||
| 55 | +} | ||
| 56 | + | ||
| 57 | +/** | ||
| 58 | + * _disable_module - enable CLKCTRL modulemode on OMAP4 | ||
| 59 | + * @oh: struct omap_hwmod * | ||
| 60 | + * | ||
| 61 | + * Disable the PRCM module mode related to the hwmod @oh. | ||
| 62 | + * No return value. | ||
| 63 | + */ | ||
| 64 | +static void _disable_module(struct omap_hwmod *oh) | ||
| 65 | +{ | ||
| 66 | + /* The module mode does not exist prior OMAP4 */ | ||
| 67 | + if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
| 68 | + return; | ||
| 69 | + | ||
| 70 | + if (!oh->clkdm || !oh->prcm.omap4.modulemode) | ||
| 71 | + return; | ||
| 72 | + | ||
| 73 | + pr_debug("omap_hwmod: %s: _disable_module\n", oh->name); | ||
| 74 | + | ||
| 75 | + omap4_cminst_module_disable(oh->clkdm->prcm_partition, | ||
| 76 | + oh->clkdm->cm_inst, | ||
| 77 | + oh->clkdm->clkdm_offs, | ||
| 78 | + oh->prcm.omap4.clkctrl_offs); | ||
| 79 | +} | ||
| 80 | + | ||
| 81 | +/** | ||
| 82 | * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh | ||
| 83 | * @oh: struct omap_hwmod *oh | ||
| 84 | * | ||
| 85 | @@ -1424,6 +1474,7 @@ static int _enable(struct omap_hwmod *oh) | ||
| 86 | |||
| 87 | return r; | ||
| 88 | } | ||
| 89 | + _enable_module(oh); | ||
| 90 | |||
| 91 | oh->_state = _HWMOD_STATE_ENABLED; | ||
| 92 | |||
| 93 | @@ -1460,11 +1511,18 @@ static int _idle(struct omap_hwmod *oh) | ||
| 94 | if (oh->class->sysc) | ||
| 95 | _idle_sysc(oh); | ||
| 96 | _del_initiator_dep(oh, mpu_oh); | ||
| 97 | - _disable_clocks(oh); | ||
| 98 | + _disable_module(oh); | ||
| 99 | ret = _wait_target_disable(oh); | ||
| 100 | if (ret) | ||
| 101 | pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", | ||
| 102 | oh->name); | ||
| 103 | + /* | ||
| 104 | + * The module must be in idle mode before disabling any parents | ||
| 105 | + * clocks. Otherwise, the parent clock might be disabled before | ||
| 106 | + * the module transition is done, and thus will prevent the | ||
| 107 | + * transition to complete properly. | ||
| 108 | + */ | ||
| 109 | + _disable_clocks(oh); | ||
| 110 | |||
| 111 | /* Mux pins for device idle if populated */ | ||
| 112 | if (oh->mux && oh->mux->pads_dynamic) | ||
| 113 | @@ -1556,11 +1614,12 @@ static int _shutdown(struct omap_hwmod *oh) | ||
| 114 | if (oh->_state == _HWMOD_STATE_ENABLED) { | ||
| 115 | _del_initiator_dep(oh, mpu_oh); | ||
| 116 | /* XXX what about the other system initiators here? dma, dsp */ | ||
| 117 | - _disable_clocks(oh); | ||
| 118 | + _disable_module(oh); | ||
| 119 | ret = _wait_target_disable(oh); | ||
| 120 | if (ret) | ||
| 121 | pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", | ||
| 122 | oh->name); | ||
| 123 | + _disable_clocks(oh); | ||
| 124 | } | ||
| 125 | /* XXX Should this code also force-disable the optional clocks? */ | ||
| 126 | |||
| 127 | -- | ||
| 128 | 1.7.2.5 | ||
| 129 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0088-OMAP-clockdomain-Remove-redundant-call-to-pwrdm_wait.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0088-OMAP-clockdomain-Remove-redundant-call-to-pwrdm_wait.patch deleted file mode 100644 index 99586511..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0088-OMAP-clockdomain-Remove-redundant-call-to-pwrdm_wait.patch +++ /dev/null | |||
| @@ -1,30 +0,0 @@ | |||
| 1 | From 376dd007bae9fdcad06c5231c05ab2ca92639579 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Vaibhav Bedia <vaibhav.bedia@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:53 -0600 | ||
| 4 | Subject: [PATCH 088/149] OMAP: clockdomain: Remove redundant call to pwrdm_wait_transition() | ||
| 5 | |||
| 6 | The call to pwrdm_wait_transition() in clkdm_clk_enable() | ||
| 7 | is redundant since the function pwrdm_clkdm_state_switch() | ||
| 8 | which is called next also does the same thing. | ||
| 9 | |||
| 10 | Signed-off-by: Vaibhav Bedia <vaibhav.bedia@ti.com> | ||
| 11 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/clockdomain.c | 1 - | ||
| 14 | 1 files changed, 0 insertions(+), 1 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c | ||
| 17 | index 6cb6c03..4fbbbfc 100644 | ||
| 18 | --- a/arch/arm/mach-omap2/clockdomain.c | ||
| 19 | +++ b/arch/arm/mach-omap2/clockdomain.c | ||
| 20 | @@ -834,7 +834,6 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | ||
| 21 | clk->name); | ||
| 22 | |||
| 23 | arch_clkdm->clkdm_clk_enable(clkdm); | ||
| 24 | - pwrdm_wait_transition(clkdm->pwrdm.ptr); | ||
| 25 | pwrdm_clkdm_state_switch(clkdm); | ||
| 26 | |||
| 27 | return 0; | ||
| 28 | -- | ||
| 29 | 1.7.2.5 | ||
| 30 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0089-OMAP2-clockdomain-Add-2-APIs-to-control-clockdomain-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0089-OMAP2-clockdomain-Add-2-APIs-to-control-clockdomain-.patch deleted file mode 100644 index 3d478516..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0089-OMAP2-clockdomain-Add-2-APIs-to-control-clockdomain-.patch +++ /dev/null | |||
| @@ -1,231 +0,0 @@ | |||
| 1 | From 4cf6b3a535c5e63c4808733c170a68990e45afa2 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:54 -0600 | ||
| 4 | Subject: [PATCH 089/149] OMAP2+: clockdomain: Add 2 APIs to control clockdomain from hwmod framework | ||
| 5 | |||
| 6 | Duplicate the existing API for clockdomain enable from clock to enable | ||
| 7 | a clock domain from hwmod framework. | ||
| 8 | This will be needed when the hwmod framework will move from the current | ||
| 9 | clock centric approach to the module based approach. | ||
| 10 | |||
| 11 | These APIs are returning 0 for the moment for OMAP2 and OMAP3 until | ||
| 12 | their hwmods are updated with the clksm attribute. | ||
| 13 | |||
| 14 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 15 | Cc: Kevin Hilman <khilman@ti.com> | ||
| 16 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 17 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 18 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 19 | --- | ||
| 20 | arch/arm/mach-omap2/clockdomain.c | 142 +++++++++++++++++++++++++++--------- | ||
| 21 | arch/arm/mach-omap2/clockdomain.h | 3 + | ||
| 22 | 2 files changed, 109 insertions(+), 36 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c | ||
| 25 | index 4fbbbfc..5a57de5 100644 | ||
| 26 | --- a/arch/arm/mach-omap2/clockdomain.c | ||
| 27 | +++ b/arch/arm/mach-omap2/clockdomain.c | ||
| 28 | @@ -796,7 +796,50 @@ void clkdm_deny_idle(struct clockdomain *clkdm) | ||
| 29 | } | ||
| 30 | |||
| 31 | |||
| 32 | -/* Clockdomain-to-clock framework interface code */ | ||
| 33 | +/* Clockdomain-to-clock/hwmod framework interface code */ | ||
| 34 | + | ||
| 35 | +static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) | ||
| 36 | +{ | ||
| 37 | + if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable) | ||
| 38 | + return -EINVAL; | ||
| 39 | + | ||
| 40 | + /* | ||
| 41 | + * For arch's with no autodeps, clkcm_clk_enable | ||
| 42 | + * should be called for every clock instance or hwmod that is | ||
| 43 | + * enabled, so the clkdm can be force woken up. | ||
| 44 | + */ | ||
| 45 | + if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) | ||
| 46 | + return 0; | ||
| 47 | + | ||
| 48 | + arch_clkdm->clkdm_clk_enable(clkdm); | ||
| 49 | + pwrdm_wait_transition(clkdm->pwrdm.ptr); | ||
| 50 | + pwrdm_clkdm_state_switch(clkdm); | ||
| 51 | + | ||
| 52 | + pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name); | ||
| 53 | + | ||
| 54 | + return 0; | ||
| 55 | +} | ||
| 56 | + | ||
| 57 | +static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) | ||
| 58 | +{ | ||
| 59 | + if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) | ||
| 60 | + return -EINVAL; | ||
| 61 | + | ||
| 62 | + if (atomic_read(&clkdm->usecount) == 0) { | ||
| 63 | + WARN_ON(1); /* underflow */ | ||
| 64 | + return -ERANGE; | ||
| 65 | + } | ||
| 66 | + | ||
| 67 | + if (atomic_dec_return(&clkdm->usecount) > 0) | ||
| 68 | + return 0; | ||
| 69 | + | ||
| 70 | + arch_clkdm->clkdm_clk_disable(clkdm); | ||
| 71 | + pwrdm_clkdm_state_switch(clkdm); | ||
| 72 | + | ||
| 73 | + pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name); | ||
| 74 | + | ||
| 75 | + return 0; | ||
| 76 | +} | ||
| 77 | |||
| 78 | /** | ||
| 79 | * clkdm_clk_enable - add an enabled downstream clock to this clkdm | ||
| 80 | @@ -819,24 +862,10 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | ||
| 81 | * downstream clocks for debugging purposes? | ||
| 82 | */ | ||
| 83 | |||
| 84 | - if (!clkdm || !clk) | ||
| 85 | + if (!clk) | ||
| 86 | return -EINVAL; | ||
| 87 | |||
| 88 | - if (!arch_clkdm || !arch_clkdm->clkdm_clk_enable) | ||
| 89 | - return -EINVAL; | ||
| 90 | - | ||
| 91 | - if (atomic_inc_return(&clkdm->usecount) > 1) | ||
| 92 | - return 0; | ||
| 93 | - | ||
| 94 | - /* Clockdomain now has one enabled downstream clock */ | ||
| 95 | - | ||
| 96 | - pr_debug("clockdomain: clkdm %s: clk %s now enabled\n", clkdm->name, | ||
| 97 | - clk->name); | ||
| 98 | - | ||
| 99 | - arch_clkdm->clkdm_clk_enable(clkdm); | ||
| 100 | - pwrdm_clkdm_state_switch(clkdm); | ||
| 101 | - | ||
| 102 | - return 0; | ||
| 103 | + return _clkdm_clk_hwmod_enable(clkdm); | ||
| 104 | } | ||
| 105 | |||
| 106 | /** | ||
| 107 | @@ -849,9 +878,8 @@ int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk) | ||
| 108 | * clockdomain usecount goes to 0, put the clockdomain to sleep | ||
| 109 | * (software-supervised mode) or remove the clkdm autodependencies | ||
| 110 | * (hardware-supervised mode). Returns -EINVAL if passed null | ||
| 111 | - * pointers; -ERANGE if the @clkdm usecount underflows and debugging | ||
| 112 | - * is enabled; or returns 0 upon success or if the clockdomain is in | ||
| 113 | - * hwsup idle mode. | ||
| 114 | + * pointers; -ERANGE if the @clkdm usecount underflows; or returns 0 | ||
| 115 | + * upon success or if the clockdomain is in hwsup idle mode. | ||
| 116 | */ | ||
| 117 | int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) | ||
| 118 | { | ||
| 119 | @@ -860,30 +888,72 @@ int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk) | ||
| 120 | * downstream clocks for debugging purposes? | ||
| 121 | */ | ||
| 122 | |||
| 123 | - if (!clkdm || !clk) | ||
| 124 | + if (!clk) | ||
| 125 | return -EINVAL; | ||
| 126 | |||
| 127 | - if (!arch_clkdm || !arch_clkdm->clkdm_clk_disable) | ||
| 128 | + return _clkdm_clk_hwmod_disable(clkdm); | ||
| 129 | +} | ||
| 130 | + | ||
| 131 | +/** | ||
| 132 | + * clkdm_hwmod_enable - add an enabled downstream hwmod to this clkdm | ||
| 133 | + * @clkdm: struct clockdomain * | ||
| 134 | + * @oh: struct omap_hwmod * of the enabled downstream hwmod | ||
| 135 | + * | ||
| 136 | + * Increment the usecount of the clockdomain @clkdm and ensure that it | ||
| 137 | + * is awake before @oh is enabled. Intended to be called by | ||
| 138 | + * module_enable() code. | ||
| 139 | + * If the clockdomain is in software-supervised idle mode, force the | ||
| 140 | + * clockdomain to wake. If the clockdomain is in hardware-supervised idle | ||
| 141 | + * mode, add clkdm-pwrdm autodependencies, to ensure that devices in the | ||
| 142 | + * clockdomain can be read from/written to by on-chip processors. | ||
| 143 | + * Returns -EINVAL if passed null pointers; | ||
| 144 | + * returns 0 upon success or if the clockdomain is in hwsup idle mode. | ||
| 145 | + */ | ||
| 146 | +int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh) | ||
| 147 | +{ | ||
| 148 | + /* The clkdm attribute does not exist yet prior OMAP4 */ | ||
| 149 | + if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
| 150 | + return 0; | ||
| 151 | + | ||
| 152 | + /* | ||
| 153 | + * XXX Rewrite this code to maintain a list of enabled | ||
| 154 | + * downstream hwmods for debugging purposes? | ||
| 155 | + */ | ||
| 156 | + | ||
| 157 | + if (!oh) | ||
| 158 | return -EINVAL; | ||
| 159 | |||
| 160 | -#ifdef DEBUG | ||
| 161 | - if (atomic_read(&clkdm->usecount) == 0) { | ||
| 162 | - WARN_ON(1); /* underflow */ | ||
| 163 | - return -ERANGE; | ||
| 164 | - } | ||
| 165 | -#endif | ||
| 166 | + return _clkdm_clk_hwmod_enable(clkdm); | ||
| 167 | +} | ||
| 168 | |||
| 169 | - if (atomic_dec_return(&clkdm->usecount) > 0) | ||
| 170 | +/** | ||
| 171 | + * clkdm_hwmod_disable - remove an enabled downstream hwmod from this clkdm | ||
| 172 | + * @clkdm: struct clockdomain * | ||
| 173 | + * @oh: struct omap_hwmod * of the disabled downstream hwmod | ||
| 174 | + * | ||
| 175 | + * Decrement the usecount of this clockdomain @clkdm when @oh is | ||
| 176 | + * disabled. Intended to be called by module_disable() code. | ||
| 177 | + * If the clockdomain usecount goes to 0, put the clockdomain to sleep | ||
| 178 | + * (software-supervised mode) or remove the clkdm autodependencies | ||
| 179 | + * (hardware-supervised mode). | ||
| 180 | + * Returns -EINVAL if passed null pointers; -ERANGE if the @clkdm usecount | ||
| 181 | + * underflows; or returns 0 upon success or if the clockdomain is in hwsup | ||
| 182 | + * idle mode. | ||
| 183 | + */ | ||
| 184 | +int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh) | ||
| 185 | +{ | ||
| 186 | + /* The clkdm attribute does not exist yet prior OMAP4 */ | ||
| 187 | + if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
| 188 | return 0; | ||
| 189 | |||
| 190 | - /* All downstream clocks of this clockdomain are now disabled */ | ||
| 191 | - | ||
| 192 | - pr_debug("clockdomain: clkdm %s: clk %s now disabled\n", clkdm->name, | ||
| 193 | - clk->name); | ||
| 194 | + /* | ||
| 195 | + * XXX Rewrite this code to maintain a list of enabled | ||
| 196 | + * downstream hwmods for debugging purposes? | ||
| 197 | + */ | ||
| 198 | |||
| 199 | - arch_clkdm->clkdm_clk_disable(clkdm); | ||
| 200 | - pwrdm_clkdm_state_switch(clkdm); | ||
| 201 | + if (!oh) | ||
| 202 | + return -EINVAL; | ||
| 203 | |||
| 204 | - return 0; | ||
| 205 | + return _clkdm_clk_hwmod_disable(clkdm); | ||
| 206 | } | ||
| 207 | |||
| 208 | diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h | ||
| 209 | index 5823584..8e0da64 100644 | ||
| 210 | --- a/arch/arm/mach-omap2/clockdomain.h | ||
| 211 | +++ b/arch/arm/mach-omap2/clockdomain.h | ||
| 212 | @@ -20,6 +20,7 @@ | ||
| 213 | |||
| 214 | #include "powerdomain.h" | ||
| 215 | #include <plat/clock.h> | ||
| 216 | +#include <plat/omap_hwmod.h> | ||
| 217 | #include <plat/cpu.h> | ||
| 218 | |||
| 219 | /* | ||
| 220 | @@ -183,6 +184,8 @@ int clkdm_sleep(struct clockdomain *clkdm); | ||
| 221 | |||
| 222 | int clkdm_clk_enable(struct clockdomain *clkdm, struct clk *clk); | ||
| 223 | int clkdm_clk_disable(struct clockdomain *clkdm, struct clk *clk); | ||
| 224 | +int clkdm_hwmod_enable(struct clockdomain *clkdm, struct omap_hwmod *oh); | ||
| 225 | +int clkdm_hwmod_disable(struct clockdomain *clkdm, struct omap_hwmod *oh); | ||
| 226 | |||
| 227 | extern void __init omap2xxx_clockdomains_init(void); | ||
| 228 | extern void __init omap3xxx_clockdomains_init(void); | ||
| 229 | -- | ||
| 230 | 1.7.2.5 | ||
| 231 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0090-OMAP2-clockdomain-add-clkdm_in_hwsup.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0090-OMAP2-clockdomain-add-clkdm_in_hwsup.patch deleted file mode 100644 index edbaf6dc..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0090-OMAP2-clockdomain-add-clkdm_in_hwsup.patch +++ /dev/null | |||
| @@ -1,141 +0,0 @@ | |||
| 1 | From b1090dd5eb9e242f8426169718fd7241c025c1a2 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Paul Walmsley <paul@pwsan.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:54 -0600 | ||
| 4 | Subject: [PATCH 090/149] OMAP2+: clockdomain: add clkdm_in_hwsup() | ||
| 5 | MIME-Version: 1.0 | ||
| 6 | Content-Type: text/plain; charset=UTF-8 | ||
| 7 | Content-Transfer-Encoding: 8bit | ||
| 8 | |||
| 9 | Add a new function, clkdm_in_hwsup(), that returns true if a clockdomain | ||
| 10 | is configured for hardware-supervised idle. It does not actually read the | ||
| 11 | hardware; rather, it checks an internal flag in the struct clockdomain, which | ||
| 12 | is changed when the clockdomain is switched in and out of hardware-supervised | ||
| 13 | idle. This should be safe, since all changes to the idle mode should | ||
| 14 | pass through the clockdomain code. | ||
| 15 | |||
| 16 | Based on a set of patches by Rajendra Nayak <rnayak@ti.com> which do | ||
| 17 | the same thing by checking the hardware bits. This approach should be | ||
| 18 | faster and more compact. | ||
| 19 | |||
| 20 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 21 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 22 | Cc: Todd Poynor <toddpoynor@google.com> | ||
| 23 | Cc: Benoît Cousson <b-cousson@ti.com> | ||
| 24 | --- | ||
| 25 | arch/arm/mach-omap2/clockdomain.c | 30 ++++++++++++++++++++++++++++-- | ||
| 26 | arch/arm/mach-omap2/clockdomain.h | 6 ++++++ | ||
| 27 | 2 files changed, 34 insertions(+), 2 deletions(-) | ||
| 28 | |||
| 29 | diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c | ||
| 30 | index 5a57de5..239b558 100644 | ||
| 31 | --- a/arch/arm/mach-omap2/clockdomain.c | ||
| 32 | +++ b/arch/arm/mach-omap2/clockdomain.c | ||
| 33 | @@ -1,8 +1,8 @@ | ||
| 34 | /* | ||
| 35 | * OMAP2/3/4 clockdomain framework functions | ||
| 36 | * | ||
| 37 | - * Copyright (C) 2008-2010 Texas Instruments, Inc. | ||
| 38 | - * Copyright (C) 2008-2010 Nokia Corporation | ||
| 39 | + * Copyright (C) 2008-2011 Texas Instruments, Inc. | ||
| 40 | + * Copyright (C) 2008-2011 Nokia Corporation | ||
| 41 | * | ||
| 42 | * Written by Paul Walmsley and Jouni Högander | ||
| 43 | * Added OMAP4 specific support by Abhijit Pagare <abhijitpagare@ti.com> | ||
| 44 | @@ -704,6 +704,8 @@ int clkdm_sleep(struct clockdomain *clkdm) | ||
| 45 | |||
| 46 | pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); | ||
| 47 | |||
| 48 | + clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; | ||
| 49 | + | ||
| 50 | return arch_clkdm->clkdm_sleep(clkdm); | ||
| 51 | } | ||
| 52 | |||
| 53 | @@ -732,6 +734,8 @@ int clkdm_wakeup(struct clockdomain *clkdm) | ||
| 54 | |||
| 55 | pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); | ||
| 56 | |||
| 57 | + clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; | ||
| 58 | + | ||
| 59 | return arch_clkdm->clkdm_wakeup(clkdm); | ||
| 60 | } | ||
| 61 | |||
| 62 | @@ -762,6 +766,8 @@ void clkdm_allow_idle(struct clockdomain *clkdm) | ||
| 63 | pr_debug("clockdomain: enabling automatic idle transitions for %s\n", | ||
| 64 | clkdm->name); | ||
| 65 | |||
| 66 | + clkdm->_flags |= _CLKDM_FLAG_HWSUP_ENABLED; | ||
| 67 | + | ||
| 68 | arch_clkdm->clkdm_allow_idle(clkdm); | ||
| 69 | pwrdm_clkdm_state_switch(clkdm); | ||
| 70 | } | ||
| 71 | @@ -792,9 +798,29 @@ void clkdm_deny_idle(struct clockdomain *clkdm) | ||
| 72 | pr_debug("clockdomain: disabling automatic idle transitions for %s\n", | ||
| 73 | clkdm->name); | ||
| 74 | |||
| 75 | + clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; | ||
| 76 | + | ||
| 77 | arch_clkdm->clkdm_deny_idle(clkdm); | ||
| 78 | } | ||
| 79 | |||
| 80 | +/** | ||
| 81 | + * clkdm_in_hwsup - is clockdomain @clkdm have hardware-supervised idle enabled? | ||
| 82 | + * @clkdm: struct clockdomain * | ||
| 83 | + * | ||
| 84 | + * Returns true if clockdomain @clkdm currently has | ||
| 85 | + * hardware-supervised idle enabled, or false if it does not or if | ||
| 86 | + * @clkdm is NULL. It is only valid to call this function after | ||
| 87 | + * clkdm_init() has been called. This function does not actually read | ||
| 88 | + * bits from the hardware; it instead tests an in-memory flag that is | ||
| 89 | + * changed whenever the clockdomain code changes the auto-idle mode. | ||
| 90 | + */ | ||
| 91 | +bool clkdm_in_hwsup(struct clockdomain *clkdm) | ||
| 92 | +{ | ||
| 93 | + if (!clkdm) | ||
| 94 | + return false; | ||
| 95 | + | ||
| 96 | + return (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false; | ||
| 97 | +} | ||
| 98 | |||
| 99 | /* Clockdomain-to-clock/hwmod framework interface code */ | ||
| 100 | |||
| 101 | diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h | ||
| 102 | index 8e0da64..8782a5c 100644 | ||
| 103 | --- a/arch/arm/mach-omap2/clockdomain.h | ||
| 104 | +++ b/arch/arm/mach-omap2/clockdomain.h | ||
| 105 | @@ -83,6 +83,9 @@ struct clkdm_dep { | ||
| 106 | const struct omap_chip_id omap_chip; | ||
| 107 | }; | ||
| 108 | |||
| 109 | +/* Possible flags for struct clockdomain._flags */ | ||
| 110 | +#define _CLKDM_FLAG_HWSUP_ENABLED BIT(0) | ||
| 111 | + | ||
| 112 | /** | ||
| 113 | * struct clockdomain - OMAP clockdomain | ||
| 114 | * @name: clockdomain name | ||
| 115 | @@ -90,6 +93,7 @@ struct clkdm_dep { | ||
| 116 | * @clktrctrl_reg: CLKSTCTRL reg for the given clock domain | ||
| 117 | * @clktrctrl_mask: CLKTRCTRL/AUTOSTATE field mask in CM_CLKSTCTRL reg | ||
| 118 | * @flags: Clockdomain capability flags | ||
| 119 | + * @_flags: Flags for use only by internal clockdomain code | ||
| 120 | * @dep_bit: Bit shift of this clockdomain's PM_WKDEP/CM_SLEEPDEP bit | ||
| 121 | * @prcm_partition: (OMAP4 only) PRCM partition ID for this clkdm's registers | ||
| 122 | * @cm_inst: (OMAP4 only) CM instance register offset | ||
| 123 | @@ -114,6 +118,7 @@ struct clockdomain { | ||
| 124 | } pwrdm; | ||
| 125 | const u16 clktrctrl_mask; | ||
| 126 | const u8 flags; | ||
| 127 | + u8 _flags; | ||
| 128 | const u8 dep_bit; | ||
| 129 | const u8 prcm_partition; | ||
| 130 | const s16 cm_inst; | ||
| 131 | @@ -178,6 +183,7 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm); | ||
| 132 | |||
| 133 | void clkdm_allow_idle(struct clockdomain *clkdm); | ||
| 134 | void clkdm_deny_idle(struct clockdomain *clkdm); | ||
| 135 | +bool clkdm_in_hwsup(struct clockdomain *clkdm); | ||
| 136 | |||
| 137 | int clkdm_wakeup(struct clockdomain *clkdm); | ||
| 138 | int clkdm_sleep(struct clockdomain *clkdm); | ||
| 139 | -- | ||
| 140 | 1.7.2.5 | ||
| 141 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0091-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0091-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch deleted file mode 100644 index 91d4e67f..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0091-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch +++ /dev/null | |||
| @@ -1,53 +0,0 @@ | |||
| 1 | From bc09c0fe93e874df8fcfd68f31302330646cbf24 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Rajendra Nayak <rnayak@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:54 -0600 | ||
| 4 | Subject: [PATCH 091/149] OMAP2+: PM: idle clkdms only if already in idle | ||
| 5 | |||
| 6 | The omap_set_pwrdm_state function forces clockdomains | ||
| 7 | to idle, without checking the existing idle state | ||
| 8 | programmed, instead based solely on the HW capability | ||
| 9 | of the clockdomain to support idle. | ||
| 10 | This is wrong and the clockdomains should be idled | ||
| 11 | post a state_switch *only* if idle transitions on the | ||
| 12 | clockdomain were already enabled. | ||
| 13 | |||
| 14 | Signed-off-by: Rajendra Nayak <rnayak@ti.com> | ||
| 15 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 16 | Acked-by: Kevin Hilman <khilman@ti.com> | ||
| 17 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 18 | --- | ||
| 19 | arch/arm/mach-omap2/pm.c | 4 +++- | ||
| 20 | 1 files changed, 3 insertions(+), 1 deletions(-) | ||
| 21 | |||
| 22 | diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c | ||
| 23 | index d48813f..3feb359 100644 | ||
| 24 | --- a/arch/arm/mach-omap2/pm.c | ||
| 25 | +++ b/arch/arm/mach-omap2/pm.c | ||
| 26 | @@ -108,6 +108,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | ||
| 27 | u32 cur_state; | ||
| 28 | int sleep_switch = -1; | ||
| 29 | int ret = 0; | ||
| 30 | + int hwsup = 0; | ||
| 31 | |||
| 32 | if (pwrdm == NULL || IS_ERR(pwrdm)) | ||
| 33 | return -EINVAL; | ||
| 34 | @@ -127,6 +128,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | ||
| 35 | (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) { | ||
| 36 | sleep_switch = LOWPOWERSTATE_SWITCH; | ||
| 37 | } else { | ||
| 38 | + hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]); | ||
| 39 | clkdm_wakeup(pwrdm->pwrdm_clkdms[0]); | ||
| 40 | pwrdm_wait_transition(pwrdm); | ||
| 41 | sleep_switch = FORCEWAKEUP_SWITCH; | ||
| 42 | @@ -142,7 +144,7 @@ int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 state) | ||
| 43 | |||
| 44 | switch (sleep_switch) { | ||
| 45 | case FORCEWAKEUP_SWITCH: | ||
| 46 | - if (pwrdm->pwrdm_clkdms[0]->flags & CLKDM_CAN_ENABLE_AUTO) | ||
| 47 | + if (hwsup) | ||
| 48 | clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]); | ||
| 49 | else | ||
| 50 | clkdm_sleep(pwrdm->pwrdm_clkdms[0]); | ||
| 51 | -- | ||
| 52 | 1.7.2.5 | ||
| 53 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0092-OMAP2-clockdomain-Add-per-clkdm-lock-to-prevent-conc.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0092-OMAP2-clockdomain-Add-per-clkdm-lock-to-prevent-conc.patch deleted file mode 100644 index d5c7deb7..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0092-OMAP2-clockdomain-Add-per-clkdm-lock-to-prevent-conc.patch +++ /dev/null | |||
| @@ -1,264 +0,0 @@ | |||
| 1 | From 9dbc6c631f27b1e6ed6b058b8d3e57b2398b2d3b Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Rajendra Nayak <rnayak@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:56:55 -0600 | ||
| 4 | Subject: [PATCH 092/149] OMAP2+: clockdomain: Add per clkdm lock to prevent concurrent state programming | ||
| 5 | |||
| 6 | Since the clkdm state programming is now done from within the hwmod | ||
| 7 | framework (which uses a per-hwmod lock) instead of the being done | ||
| 8 | from the clock framework (which used a global lock), there is now a | ||
| 9 | need to have per-clkdm locking to prevent races between different | ||
| 10 | hwmods/modules belonging to the same clock domain concurrently | ||
| 11 | programming the clkdm state. | ||
| 12 | |||
| 13 | Signed-off-by: Rajendra Nayak <rnayak@ti.com> | ||
| 14 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 15 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 16 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 17 | --- | ||
| 18 | arch/arm/mach-omap2/clockdomain.c | 47 +++++++++++++++++++++++---- | ||
| 19 | arch/arm/mach-omap2/clockdomain.h | 2 + | ||
| 20 | arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | 6 ++- | ||
| 21 | arch/arm/mach-omap2/clockdomain44xx.c | 13 ++----- | ||
| 22 | 4 files changed, 50 insertions(+), 18 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c | ||
| 25 | index 239b558..ab7db08 100644 | ||
| 26 | --- a/arch/arm/mach-omap2/clockdomain.c | ||
| 27 | +++ b/arch/arm/mach-omap2/clockdomain.c | ||
| 28 | @@ -92,6 +92,8 @@ static int _clkdm_register(struct clockdomain *clkdm) | ||
| 29 | |||
| 30 | pwrdm_add_clkdm(pwrdm, clkdm); | ||
| 31 | |||
| 32 | + spin_lock_init(&clkdm->lock); | ||
| 33 | + | ||
| 34 | pr_debug("clockdomain: registered %s\n", clkdm->name); | ||
| 35 | |||
| 36 | return 0; | ||
| 37 | @@ -690,6 +692,9 @@ int clkdm_clear_all_sleepdeps(struct clockdomain *clkdm) | ||
| 38 | */ | ||
| 39 | int clkdm_sleep(struct clockdomain *clkdm) | ||
| 40 | { | ||
| 41 | + int ret; | ||
| 42 | + unsigned long flags; | ||
| 43 | + | ||
| 44 | if (!clkdm) | ||
| 45 | return -EINVAL; | ||
| 46 | |||
| 47 | @@ -704,9 +709,11 @@ int clkdm_sleep(struct clockdomain *clkdm) | ||
| 48 | |||
| 49 | pr_debug("clockdomain: forcing sleep on %s\n", clkdm->name); | ||
| 50 | |||
| 51 | + spin_lock_irqsave(&clkdm->lock, flags); | ||
| 52 | clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; | ||
| 53 | - | ||
| 54 | - return arch_clkdm->clkdm_sleep(clkdm); | ||
| 55 | + ret = arch_clkdm->clkdm_sleep(clkdm); | ||
| 56 | + spin_unlock_irqrestore(&clkdm->lock, flags); | ||
| 57 | + return ret; | ||
| 58 | } | ||
| 59 | |||
| 60 | /** | ||
| 61 | @@ -720,6 +727,9 @@ int clkdm_sleep(struct clockdomain *clkdm) | ||
| 62 | */ | ||
| 63 | int clkdm_wakeup(struct clockdomain *clkdm) | ||
| 64 | { | ||
| 65 | + int ret; | ||
| 66 | + unsigned long flags; | ||
| 67 | + | ||
| 68 | if (!clkdm) | ||
| 69 | return -EINVAL; | ||
| 70 | |||
| 71 | @@ -734,9 +744,11 @@ int clkdm_wakeup(struct clockdomain *clkdm) | ||
| 72 | |||
| 73 | pr_debug("clockdomain: forcing wakeup on %s\n", clkdm->name); | ||
| 74 | |||
| 75 | + spin_lock_irqsave(&clkdm->lock, flags); | ||
| 76 | clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; | ||
| 77 | - | ||
| 78 | - return arch_clkdm->clkdm_wakeup(clkdm); | ||
| 79 | + ret = arch_clkdm->clkdm_wakeup(clkdm); | ||
| 80 | + spin_unlock_irqrestore(&clkdm->lock, flags); | ||
| 81 | + return ret; | ||
| 82 | } | ||
| 83 | |||
| 84 | /** | ||
| 85 | @@ -751,6 +763,8 @@ int clkdm_wakeup(struct clockdomain *clkdm) | ||
| 86 | */ | ||
| 87 | void clkdm_allow_idle(struct clockdomain *clkdm) | ||
| 88 | { | ||
| 89 | + unsigned long flags; | ||
| 90 | + | ||
| 91 | if (!clkdm) | ||
| 92 | return; | ||
| 93 | |||
| 94 | @@ -766,10 +780,11 @@ void clkdm_allow_idle(struct clockdomain *clkdm) | ||
| 95 | pr_debug("clockdomain: enabling automatic idle transitions for %s\n", | ||
| 96 | clkdm->name); | ||
| 97 | |||
| 98 | + spin_lock_irqsave(&clkdm->lock, flags); | ||
| 99 | clkdm->_flags |= _CLKDM_FLAG_HWSUP_ENABLED; | ||
| 100 | - | ||
| 101 | arch_clkdm->clkdm_allow_idle(clkdm); | ||
| 102 | pwrdm_clkdm_state_switch(clkdm); | ||
| 103 | + spin_unlock_irqrestore(&clkdm->lock, flags); | ||
| 104 | } | ||
| 105 | |||
| 106 | /** | ||
| 107 | @@ -783,6 +798,8 @@ void clkdm_allow_idle(struct clockdomain *clkdm) | ||
| 108 | */ | ||
| 109 | void clkdm_deny_idle(struct clockdomain *clkdm) | ||
| 110 | { | ||
| 111 | + unsigned long flags; | ||
| 112 | + | ||
| 113 | if (!clkdm) | ||
| 114 | return; | ||
| 115 | |||
| 116 | @@ -798,9 +815,10 @@ void clkdm_deny_idle(struct clockdomain *clkdm) | ||
| 117 | pr_debug("clockdomain: disabling automatic idle transitions for %s\n", | ||
| 118 | clkdm->name); | ||
| 119 | |||
| 120 | + spin_lock_irqsave(&clkdm->lock, flags); | ||
| 121 | clkdm->_flags &= ~_CLKDM_FLAG_HWSUP_ENABLED; | ||
| 122 | - | ||
| 123 | arch_clkdm->clkdm_deny_idle(clkdm); | ||
| 124 | + spin_unlock_irqrestore(&clkdm->lock, flags); | ||
| 125 | } | ||
| 126 | |||
| 127 | /** | ||
| 128 | @@ -816,16 +834,25 @@ void clkdm_deny_idle(struct clockdomain *clkdm) | ||
| 129 | */ | ||
| 130 | bool clkdm_in_hwsup(struct clockdomain *clkdm) | ||
| 131 | { | ||
| 132 | + bool ret; | ||
| 133 | + unsigned long flags; | ||
| 134 | + | ||
| 135 | if (!clkdm) | ||
| 136 | return false; | ||
| 137 | |||
| 138 | - return (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false; | ||
| 139 | + spin_lock_irqsave(&clkdm->lock, flags); | ||
| 140 | + ret = (clkdm->_flags & _CLKDM_FLAG_HWSUP_ENABLED) ? true : false; | ||
| 141 | + spin_unlock_irqrestore(&clkdm->lock, flags); | ||
| 142 | + | ||
| 143 | + return ret; | ||
| 144 | } | ||
| 145 | |||
| 146 | /* Clockdomain-to-clock/hwmod framework interface code */ | ||
| 147 | |||
| 148 | static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) | ||
| 149 | { | ||
| 150 | + unsigned long flags; | ||
| 151 | + | ||
| 152 | if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_enable) | ||
| 153 | return -EINVAL; | ||
| 154 | |||
| 155 | @@ -837,9 +864,11 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) | ||
| 156 | if ((atomic_inc_return(&clkdm->usecount) > 1) && autodeps) | ||
| 157 | return 0; | ||
| 158 | |||
| 159 | + spin_lock_irqsave(&clkdm->lock, flags); | ||
| 160 | arch_clkdm->clkdm_clk_enable(clkdm); | ||
| 161 | pwrdm_wait_transition(clkdm->pwrdm.ptr); | ||
| 162 | pwrdm_clkdm_state_switch(clkdm); | ||
| 163 | + spin_unlock_irqrestore(&clkdm->lock, flags); | ||
| 164 | |||
| 165 | pr_debug("clockdomain: clkdm %s: enabled\n", clkdm->name); | ||
| 166 | |||
| 167 | @@ -848,6 +877,8 @@ static int _clkdm_clk_hwmod_enable(struct clockdomain *clkdm) | ||
| 168 | |||
| 169 | static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) | ||
| 170 | { | ||
| 171 | + unsigned long flags; | ||
| 172 | + | ||
| 173 | if (!clkdm || !arch_clkdm || !arch_clkdm->clkdm_clk_disable) | ||
| 174 | return -EINVAL; | ||
| 175 | |||
| 176 | @@ -859,8 +890,10 @@ static int _clkdm_clk_hwmod_disable(struct clockdomain *clkdm) | ||
| 177 | if (atomic_dec_return(&clkdm->usecount) > 0) | ||
| 178 | return 0; | ||
| 179 | |||
| 180 | + spin_lock_irqsave(&clkdm->lock, flags); | ||
| 181 | arch_clkdm->clkdm_clk_disable(clkdm); | ||
| 182 | pwrdm_clkdm_state_switch(clkdm); | ||
| 183 | + spin_unlock_irqrestore(&clkdm->lock, flags); | ||
| 184 | |||
| 185 | pr_debug("clockdomain: clkdm %s: disabled\n", clkdm->name); | ||
| 186 | |||
| 187 | diff --git a/arch/arm/mach-omap2/clockdomain.h b/arch/arm/mach-omap2/clockdomain.h | ||
| 188 | index 8782a5c..1e50c88 100644 | ||
| 189 | --- a/arch/arm/mach-omap2/clockdomain.h | ||
| 190 | +++ b/arch/arm/mach-omap2/clockdomain.h | ||
| 191 | @@ -17,6 +17,7 @@ | ||
| 192 | #define __ARCH_ARM_MACH_OMAP2_CLOCKDOMAIN_H | ||
| 193 | |||
| 194 | #include <linux/init.h> | ||
| 195 | +#include <linux/spinlock.h> | ||
| 196 | |||
| 197 | #include "powerdomain.h" | ||
| 198 | #include <plat/clock.h> | ||
| 199 | @@ -128,6 +129,7 @@ struct clockdomain { | ||
| 200 | const struct omap_chip_id omap_chip; | ||
| 201 | atomic_t usecount; | ||
| 202 | struct list_head node; | ||
| 203 | + spinlock_t lock; | ||
| 204 | }; | ||
| 205 | |||
| 206 | /** | ||
| 207 | diff --git a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | ||
| 208 | index 48d0db7..f740edb 100644 | ||
| 209 | --- a/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | ||
| 210 | +++ b/arch/arm/mach-omap2/clockdomain2xxx_3xxx.c | ||
| 211 | @@ -183,7 +183,8 @@ static int omap2_clkdm_clk_enable(struct clockdomain *clkdm) | ||
| 212 | _clkdm_add_autodeps(clkdm); | ||
| 213 | _enable_hwsup(clkdm); | ||
| 214 | } else { | ||
| 215 | - clkdm_wakeup(clkdm); | ||
| 216 | + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) | ||
| 217 | + omap2_clkdm_wakeup(clkdm); | ||
| 218 | } | ||
| 219 | |||
| 220 | return 0; | ||
| 221 | @@ -205,7 +206,8 @@ static int omap2_clkdm_clk_disable(struct clockdomain *clkdm) | ||
| 222 | _clkdm_del_autodeps(clkdm); | ||
| 223 | _enable_hwsup(clkdm); | ||
| 224 | } else { | ||
| 225 | - clkdm_sleep(clkdm); | ||
| 226 | + if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP) | ||
| 227 | + omap2_clkdm_sleep(clkdm); | ||
| 228 | } | ||
| 229 | |||
| 230 | return 0; | ||
| 231 | diff --git a/arch/arm/mach-omap2/clockdomain44xx.c b/arch/arm/mach-omap2/clockdomain44xx.c | ||
| 232 | index a1a4ecd..b43706a 100644 | ||
| 233 | --- a/arch/arm/mach-omap2/clockdomain44xx.c | ||
| 234 | +++ b/arch/arm/mach-omap2/clockdomain44xx.c | ||
| 235 | @@ -95,13 +95,8 @@ static void omap4_clkdm_deny_idle(struct clockdomain *clkdm) | ||
| 236 | |||
| 237 | static int omap4_clkdm_clk_enable(struct clockdomain *clkdm) | ||
| 238 | { | ||
| 239 | - bool hwsup = false; | ||
| 240 | - | ||
| 241 | - hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, | ||
| 242 | - clkdm->cm_inst, clkdm->clkdm_offs); | ||
| 243 | - | ||
| 244 | - if (!hwsup) | ||
| 245 | - clkdm_wakeup(clkdm); | ||
| 246 | + if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP) | ||
| 247 | + return omap4_clkdm_wakeup(clkdm); | ||
| 248 | |||
| 249 | return 0; | ||
| 250 | } | ||
| 251 | @@ -113,8 +108,8 @@ static int omap4_clkdm_clk_disable(struct clockdomain *clkdm) | ||
| 252 | hwsup = omap4_cminst_is_clkdm_in_hwsup(clkdm->prcm_partition, | ||
| 253 | clkdm->cm_inst, clkdm->clkdm_offs); | ||
| 254 | |||
| 255 | - if (!hwsup) | ||
| 256 | - clkdm_sleep(clkdm); | ||
| 257 | + if (!hwsup && (clkdm->flags & CLKDM_CAN_FORCE_SLEEP)) | ||
| 258 | + omap4_clkdm_sleep(clkdm); | ||
| 259 | |||
| 260 | return 0; | ||
| 261 | } | ||
| 262 | -- | ||
| 263 | 1.7.2.5 | ||
| 264 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0093-OMAP2-clock-allow-per-SoC-clock-init-code-to-prevent.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0093-OMAP2-clock-allow-per-SoC-clock-init-code-to-prevent.patch deleted file mode 100644 index 3870fd3b..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0093-OMAP2-clock-allow-per-SoC-clock-init-code-to-prevent.patch +++ /dev/null | |||
| @@ -1,123 +0,0 @@ | |||
| 1 | From 7d9356a5f4f67150d793d6be8592ea23b0692d81 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Paul Walmsley <paul@pwsan.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:57:06 -0600 | ||
| 4 | Subject: [PATCH 093/149] OMAP2+: clock: allow per-SoC clock init code to prevent clockdomain calls from clock code | ||
| 5 | MIME-Version: 1.0 | ||
| 6 | Content-Type: text/plain; charset=UTF-8 | ||
| 7 | Content-Transfer-Encoding: 8bit | ||
| 8 | |||
| 9 | The OMAP2/3 clock code was written to notify the clockdomain code when | ||
| 10 | the first clock in a clockdomain is enabled and when the last enabled | ||
| 11 | clock in a clockdomain is disabled. OMAP4 requires a different | ||
| 12 | approach: the hwmod code needs to signal the clockdomain code when to | ||
| 13 | force-enable and auto-idle a clockdomain during the IP block enable | ||
| 14 | process. The current conjecture is that once that hwmod sequence is | ||
| 15 | implemented, it will no longer be necessary for the clock code to call | ||
| 16 | into the clockdomain code for "optional clocks" on OMAP4. | ||
| 17 | |||
| 18 | Add a static flag to the OMAP2+ clock code, clkdm_control, that by | ||
| 19 | default preserves the OMAP2/3 behavior. Also add a function, | ||
| 20 | omap2_clk_disable_clkdm_control(), intended to be called from OMAP4 | ||
| 21 | and beyond clock initcalls, that disables the old behavior. | ||
| 22 | |||
| 23 | Part of this patch was originally based on a patch by Rajendra Nayak | ||
| 24 | <rnayak@ti.com>. | ||
| 25 | |||
| 26 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 27 | Cc: Benoît Cousson <b-cousson@ti.com> | ||
| 28 | Cc: Rajendra Nayak <rnayak@ti.com> | ||
| 29 | --- | ||
| 30 | arch/arm/mach-omap2/clock.c | 27 ++++++++++++++++++++++++--- | ||
| 31 | arch/arm/mach-omap2/clock.h | 3 +++ | ||
| 32 | 2 files changed, 27 insertions(+), 3 deletions(-) | ||
| 33 | |||
| 34 | diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c | ||
| 35 | index 180299e..fc84576 100644 | ||
| 36 | --- a/arch/arm/mach-omap2/clock.c | ||
| 37 | +++ b/arch/arm/mach-omap2/clock.c | ||
| 38 | @@ -38,6 +38,14 @@ | ||
| 39 | u8 cpu_mask; | ||
| 40 | |||
| 41 | /* | ||
| 42 | + * clkdm_control: if true, then when a clock is enabled in the | ||
| 43 | + * hardware, its clockdomain will first be enabled; and when a clock | ||
| 44 | + * is disabled in the hardware, its clockdomain will be disabled | ||
| 45 | + * afterwards. | ||
| 46 | + */ | ||
| 47 | +static bool clkdm_control = true; | ||
| 48 | + | ||
| 49 | +/* | ||
| 50 | * OMAP2+ specific clock functions | ||
| 51 | */ | ||
| 52 | |||
| 53 | @@ -100,6 +108,19 @@ void omap2_init_clk_clkdm(struct clk *clk) | ||
| 54 | } | ||
| 55 | |||
| 56 | /** | ||
| 57 | + * omap2_clk_disable_clkdm_control - disable clkdm control on clk enable/disable | ||
| 58 | + * | ||
| 59 | + * Prevent the OMAP clock code from calling into the clockdomain code | ||
| 60 | + * when a hardware clock in that clockdomain is enabled or disabled. | ||
| 61 | + * Intended to be called at init time from omap*_clk_init(). No | ||
| 62 | + * return value. | ||
| 63 | + */ | ||
| 64 | +void __init omap2_clk_disable_clkdm_control(void) | ||
| 65 | +{ | ||
| 66 | + clkdm_control = false; | ||
| 67 | +} | ||
| 68 | + | ||
| 69 | +/** | ||
| 70 | * omap2_clk_dflt_find_companion - find companion clock to @clk | ||
| 71 | * @clk: struct clk * to find the companion clock of | ||
| 72 | * @other_reg: void __iomem ** to return the companion clock CM_*CLKEN va in | ||
| 73 | @@ -268,7 +289,7 @@ void omap2_clk_disable(struct clk *clk) | ||
| 74 | clk->ops->disable(clk); | ||
| 75 | } | ||
| 76 | |||
| 77 | - if (clk->clkdm) | ||
| 78 | + if (clkdm_control && clk->clkdm) | ||
| 79 | clkdm_clk_disable(clk->clkdm, clk); | ||
| 80 | |||
| 81 | if (clk->parent) | ||
| 82 | @@ -308,7 +329,7 @@ int omap2_clk_enable(struct clk *clk) | ||
| 83 | } | ||
| 84 | } | ||
| 85 | |||
| 86 | - if (clk->clkdm) { | ||
| 87 | + if (clkdm_control && clk->clkdm) { | ||
| 88 | ret = clkdm_clk_enable(clk->clkdm, clk); | ||
| 89 | if (ret) { | ||
| 90 | WARN(1, "clock: %s: could not enable clockdomain %s: " | ||
| 91 | @@ -330,7 +351,7 @@ int omap2_clk_enable(struct clk *clk) | ||
| 92 | return 0; | ||
| 93 | |||
| 94 | oce_err3: | ||
| 95 | - if (clk->clkdm) | ||
| 96 | + if (clkdm_control && clk->clkdm) | ||
| 97 | clkdm_clk_disable(clk->clkdm, clk); | ||
| 98 | oce_err2: | ||
| 99 | if (clk->parent) | ||
| 100 | diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h | ||
| 101 | index e10ff2b..48ac568 100644 | ||
| 102 | --- a/arch/arm/mach-omap2/clock.h | ||
| 103 | +++ b/arch/arm/mach-omap2/clock.h | ||
| 104 | @@ -16,6 +16,8 @@ | ||
| 105 | #ifndef __ARCH_ARM_MACH_OMAP2_CLOCK_H | ||
| 106 | #define __ARCH_ARM_MACH_OMAP2_CLOCK_H | ||
| 107 | |||
| 108 | +#include <linux/kernel.h> | ||
| 109 | + | ||
| 110 | #include <plat/clock.h> | ||
| 111 | |||
| 112 | /* CM_CLKSEL2_PLL.CORE_CLK_SRC bits (2XXX) */ | ||
| 113 | @@ -72,6 +74,7 @@ void omap2_clk_disable_unused(struct clk *clk); | ||
| 114 | #endif | ||
| 115 | |||
| 116 | void omap2_init_clk_clkdm(struct clk *clk); | ||
| 117 | +void __init omap2_clk_disable_clkdm_control(void); | ||
| 118 | |||
| 119 | /* clkt_clksel.c public functions */ | ||
| 120 | u32 omap2_clksel_round_rate_div(struct clk *clk, unsigned long target_rate, | ||
| 121 | -- | ||
| 122 | 1.7.2.5 | ||
| 123 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0094-OMAP2-hwmod-Follow-the-recommended-PRCM-module-enabl.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0094-OMAP2-hwmod-Follow-the-recommended-PRCM-module-enabl.patch deleted file mode 100644 index 4de90a8d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0094-OMAP2-hwmod-Follow-the-recommended-PRCM-module-enabl.patch +++ /dev/null | |||
| @@ -1,173 +0,0 @@ | |||
| 1 | From 2a443d7ec48bdaa17f80fbffd82cd11d858d3655 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Rajendra Nayak <rnayak@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:57:07 -0600 | ||
| 4 | Subject: [PATCH 094/149] OMAP2+: hwmod: Follow the recommended PRCM module enable sequence | ||
| 5 | |||
| 6 | On OMAP4, the PRCM recommended sequence for enabling | ||
| 7 | a module after power-on-reset is: | ||
| 8 | -1- Force clkdm to SW_WKUP | ||
| 9 | -2- Enabling the clocks | ||
| 10 | -3- Configure desired module mode to "enable" or "auto" | ||
| 11 | -4- Wait for the desired module idle status to be FUNC | ||
| 12 | -5- Program clkdm in HW_AUTO(if supported) | ||
| 13 | |||
| 14 | This sequence applies to all older OMAPs' as well, | ||
| 15 | however since they use autodeps, it makes sure that | ||
| 16 | no clkdm is in IDLE, and hence not requiring a force | ||
| 17 | SW_WKUP when a module is being enabled. | ||
| 18 | |||
| 19 | OMAP4 does not need to support autodeps, because | ||
| 20 | of the dyanamic dependency feature, wherein | ||
| 21 | the HW takes care of waking up a clockdomain from | ||
| 22 | idle and hence the module, whenever an interconnect | ||
| 23 | access happens to the given module. | ||
| 24 | |||
| 25 | Implementing the sequence for OMAP4 requires | ||
| 26 | the clockdomain handling that is currently done in | ||
| 27 | clock framework to be done as part of hwmod framework | ||
| 28 | since the step -4- above to "Wait for the desired | ||
| 29 | module idle status to be FUNC" is done as part of | ||
| 30 | hwmod framework. | ||
| 31 | |||
| 32 | Signed-off-by: Rajendra Nayak <rnayak@ti.com> | ||
| 33 | [b-cousson@ti.com: Adapt it to the new clkdm hwmod attribute and API] | ||
| 34 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 35 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 36 | [paul@pwsan.com: dropped mach-omap2/clock.c changes; modified to only | ||
| 37 | call the clockdomain code if oh->clkdm is set; disable clock->clockdomain | ||
| 38 | interaction on OMAP4] | ||
| 39 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 40 | --- | ||
| 41 | arch/arm/mach-omap2/clock44xx_data.c | 1 + | ||
| 42 | arch/arm/mach-omap2/omap_hwmod.c | 70 ++++++++++++++++++++++++---------- | ||
| 43 | 2 files changed, 51 insertions(+), 20 deletions(-) | ||
| 44 | |||
| 45 | diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 46 | index 07bf0de..0d13def 100644 | ||
| 47 | --- a/arch/arm/mach-omap2/clock44xx_data.c | ||
| 48 | +++ b/arch/arm/mach-omap2/clock44xx_data.c | ||
| 49 | @@ -3340,6 +3340,7 @@ int __init omap4xxx_clk_init(void) | ||
| 50 | } | ||
| 51 | |||
| 52 | clk_init(&omap2_clk_functions); | ||
| 53 | + omap2_clk_disable_clkdm_control(); | ||
| 54 | |||
| 55 | for (c = omap44xx_clks; c < omap44xx_clks + ARRAY_SIZE(omap44xx_clks); | ||
| 56 | c++) | ||
| 57 | diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 58 | index 4424fee..84cc0bd 100644 | ||
| 59 | --- a/arch/arm/mach-omap2/omap_hwmod.c | ||
| 60 | +++ b/arch/arm/mach-omap2/omap_hwmod.c | ||
| 61 | @@ -1437,6 +1437,7 @@ static int _reset(struct omap_hwmod *oh) | ||
| 62 | static int _enable(struct omap_hwmod *oh) | ||
| 63 | { | ||
| 64 | int r; | ||
| 65 | + int hwsup = 0; | ||
| 66 | |||
| 67 | pr_debug("omap_hwmod: %s: enabling\n", oh->name); | ||
| 68 | |||
| 69 | @@ -1448,14 +1449,6 @@ static int _enable(struct omap_hwmod *oh) | ||
| 70 | return -EINVAL; | ||
| 71 | } | ||
| 72 | |||
| 73 | - /* Mux pins for device runtime if populated */ | ||
| 74 | - if (oh->mux && (!oh->mux->enabled || | ||
| 75 | - ((oh->_state == _HWMOD_STATE_IDLE) && | ||
| 76 | - oh->mux->pads_dynamic))) | ||
| 77 | - omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); | ||
| 78 | - | ||
| 79 | - _add_initiator_dep(oh, mpu_oh); | ||
| 80 | - _enable_clocks(oh); | ||
| 81 | |||
| 82 | /* | ||
| 83 | * If an IP contains only one HW reset line, then de-assert it in order | ||
| 84 | @@ -1466,23 +1459,56 @@ static int _enable(struct omap_hwmod *oh) | ||
| 85 | oh->_state == _HWMOD_STATE_DISABLED) && oh->rst_lines_cnt == 1) | ||
| 86 | _deassert_hardreset(oh, oh->rst_lines[0].name); | ||
| 87 | |||
| 88 | - r = _wait_target_ready(oh); | ||
| 89 | - if (r) { | ||
| 90 | - pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", | ||
| 91 | - oh->name, r); | ||
| 92 | - _disable_clocks(oh); | ||
| 93 | + /* Mux pins for device runtime if populated */ | ||
| 94 | + if (oh->mux && (!oh->mux->enabled || | ||
| 95 | + ((oh->_state == _HWMOD_STATE_IDLE) && | ||
| 96 | + oh->mux->pads_dynamic))) | ||
| 97 | + omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED); | ||
| 98 | + | ||
| 99 | + _add_initiator_dep(oh, mpu_oh); | ||
| 100 | |||
| 101 | - return r; | ||
| 102 | + if (oh->clkdm) { | ||
| 103 | + /* | ||
| 104 | + * A clockdomain must be in SW_SUP before enabling | ||
| 105 | + * completely the module. The clockdomain can be set | ||
| 106 | + * in HW_AUTO only when the module become ready. | ||
| 107 | + */ | ||
| 108 | + hwsup = clkdm_in_hwsup(oh->clkdm); | ||
| 109 | + r = clkdm_hwmod_enable(oh->clkdm, oh); | ||
| 110 | + if (r) { | ||
| 111 | + WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n", | ||
| 112 | + oh->name, oh->clkdm->name, r); | ||
| 113 | + return r; | ||
| 114 | + } | ||
| 115 | } | ||
| 116 | + | ||
| 117 | + _enable_clocks(oh); | ||
| 118 | _enable_module(oh); | ||
| 119 | |||
| 120 | - oh->_state = _HWMOD_STATE_ENABLED; | ||
| 121 | + r = _wait_target_ready(oh); | ||
| 122 | + if (!r) { | ||
| 123 | + /* | ||
| 124 | + * Set the clockdomain to HW_AUTO only if the target is ready, | ||
| 125 | + * assuming that the previous state was HW_AUTO | ||
| 126 | + */ | ||
| 127 | + if (oh->clkdm && hwsup) | ||
| 128 | + clkdm_allow_idle(oh->clkdm); | ||
| 129 | |||
| 130 | - /* Access the sysconfig only if the target is ready */ | ||
| 131 | - if (oh->class->sysc) { | ||
| 132 | - if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) | ||
| 133 | - _update_sysc_cache(oh); | ||
| 134 | - _enable_sysc(oh); | ||
| 135 | + oh->_state = _HWMOD_STATE_ENABLED; | ||
| 136 | + | ||
| 137 | + /* Access the sysconfig only if the target is ready */ | ||
| 138 | + if (oh->class->sysc) { | ||
| 139 | + if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED)) | ||
| 140 | + _update_sysc_cache(oh); | ||
| 141 | + _enable_sysc(oh); | ||
| 142 | + } | ||
| 143 | + } else { | ||
| 144 | + _disable_clocks(oh); | ||
| 145 | + pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n", | ||
| 146 | + oh->name, r); | ||
| 147 | + | ||
| 148 | + if (oh->clkdm) | ||
| 149 | + clkdm_hwmod_disable(oh->clkdm, oh); | ||
| 150 | } | ||
| 151 | |||
| 152 | return r; | ||
| 153 | @@ -1523,6 +1549,8 @@ static int _idle(struct omap_hwmod *oh) | ||
| 154 | * transition to complete properly. | ||
| 155 | */ | ||
| 156 | _disable_clocks(oh); | ||
| 157 | + if (oh->clkdm) | ||
| 158 | + clkdm_hwmod_disable(oh->clkdm, oh); | ||
| 159 | |||
| 160 | /* Mux pins for device idle if populated */ | ||
| 161 | if (oh->mux && oh->mux->pads_dynamic) | ||
| 162 | @@ -1620,6 +1648,8 @@ static int _shutdown(struct omap_hwmod *oh) | ||
| 163 | pr_warn("omap_hwmod: %s: _wait_target_disable failed\n", | ||
| 164 | oh->name); | ||
| 165 | _disable_clocks(oh); | ||
| 166 | + if (oh->clkdm) | ||
| 167 | + clkdm_hwmod_disable(oh->clkdm, oh); | ||
| 168 | } | ||
| 169 | /* XXX Should this code also force-disable the optional clocks? */ | ||
| 170 | |||
| 171 | -- | ||
| 172 | 1.7.2.5 | ||
| 173 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0095-OMAP-Add-debugfs-node-to-show-the-summary-of-all-clo.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0095-OMAP-Add-debugfs-node-to-show-the-summary-of-all-clo.patch deleted file mode 100644 index db025c71..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0095-OMAP-Add-debugfs-node-to-show-the-summary-of-all-clo.patch +++ /dev/null | |||
| @@ -1,84 +0,0 @@ | |||
| 1 | From 01eed55ec7b57fb5109e7eb70cbdebdc030135a5 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Jon Hunter <jon-hunter@ti.com> | ||
| 3 | Date: Sun, 10 Jul 2011 05:57:33 -0600 | ||
| 4 | Subject: [PATCH 095/149] OMAP: Add debugfs node to show the summary of all clocks | ||
| 5 | |||
| 6 | Add a debugfs node called "summary" to /sys/kernel/debug/clock/ | ||
| 7 | that displays a quick summary of all clocks registered in the | ||
| 8 | "clocks" structure. The format of the output from this node is: | ||
| 9 | |||
| 10 | <clock-name> <parent-name> <rate> <usecount> | ||
| 11 | |||
| 12 | This debugfs node was very helpful for taking a quick snapshot of | ||
| 13 | the linux clock tree for OMAP and ensuring clock frequencies | ||
| 14 | calculated by the kernel were indeed correct. This patch helped | ||
| 15 | uncover some bugs in the linux clock tree for OMAP4. | ||
| 16 | |||
| 17 | Signed-off-by: Jon Hunter <jon-hunter@ti.com> | ||
| 18 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
| 19 | --- | ||
| 20 | arch/arm/plat-omap/clock.c | 39 +++++++++++++++++++++++++++++++++++++++ | ||
| 21 | 1 files changed, 39 insertions(+), 0 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/arch/arm/plat-omap/clock.c b/arch/arm/plat-omap/clock.c | ||
| 24 | index c9122dd..156b27d 100644 | ||
| 25 | --- a/arch/arm/plat-omap/clock.c | ||
| 26 | +++ b/arch/arm/plat-omap/clock.c | ||
| 27 | @@ -475,8 +475,41 @@ int __init clk_init(struct clk_functions * custom_clocks) | ||
| 28 | /* | ||
| 29 | * debugfs support to trace clock tree hierarchy and attributes | ||
| 30 | */ | ||
| 31 | + | ||
| 32 | +#include <linux/debugfs.h> | ||
| 33 | +#include <linux/seq_file.h> | ||
| 34 | + | ||
| 35 | static struct dentry *clk_debugfs_root; | ||
| 36 | |||
| 37 | +static int clk_dbg_show_summary(struct seq_file *s, void *unused) | ||
| 38 | +{ | ||
| 39 | + struct clk *c; | ||
| 40 | + struct clk *pa; | ||
| 41 | + | ||
| 42 | + seq_printf(s, "%-30s %-30s %-10s %s\n", | ||
| 43 | + "clock-name", "parent-name", "rate", "use-count"); | ||
| 44 | + | ||
| 45 | + list_for_each_entry(c, &clocks, node) { | ||
| 46 | + pa = c->parent; | ||
| 47 | + seq_printf(s, "%-30s %-30s %-10lu %d\n", | ||
| 48 | + c->name, pa ? pa->name : "none", c->rate, c->usecount); | ||
| 49 | + } | ||
| 50 | + | ||
| 51 | + return 0; | ||
| 52 | +} | ||
| 53 | + | ||
| 54 | +static int clk_dbg_open(struct inode *inode, struct file *file) | ||
| 55 | +{ | ||
| 56 | + return single_open(file, clk_dbg_show_summary, inode->i_private); | ||
| 57 | +} | ||
| 58 | + | ||
| 59 | +static const struct file_operations debug_clock_fops = { | ||
| 60 | + .open = clk_dbg_open, | ||
| 61 | + .read = seq_read, | ||
| 62 | + .llseek = seq_lseek, | ||
| 63 | + .release = single_release, | ||
| 64 | +}; | ||
| 65 | + | ||
| 66 | static int clk_debugfs_register_one(struct clk *c) | ||
| 67 | { | ||
| 68 | int err; | ||
| 69 | @@ -551,6 +584,12 @@ static int __init clk_debugfs_init(void) | ||
| 70 | if (err) | ||
| 71 | goto err_out; | ||
| 72 | } | ||
| 73 | + | ||
| 74 | + d = debugfs_create_file("summary", S_IRUGO, | ||
| 75 | + d, NULL, &debug_clock_fops); | ||
| 76 | + if (!d) | ||
| 77 | + return -ENOMEM; | ||
| 78 | + | ||
| 79 | return 0; | ||
| 80 | err_out: | ||
| 81 | debugfs_remove_recursive(clk_debugfs_root); | ||
| 82 | -- | ||
| 83 | 1.7.2.5 | ||
| 84 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0096-OMAP2-hwmod-remove-unused-voltagedomain-pointer.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0096-OMAP2-hwmod-remove-unused-voltagedomain-pointer.patch deleted file mode 100644 index 38152456..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0096-OMAP2-hwmod-remove-unused-voltagedomain-pointer.patch +++ /dev/null | |||
| @@ -1,30 +0,0 @@ | |||
| 1 | From c9d2e22cc8ed08fb232d99c161f8d0be18c8569e Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 16 Mar 2011 11:02:59 -0700 | ||
| 4 | Subject: [PATCH 096/149] OMAP2+: hwmod: remove unused voltagedomain pointer | ||
| 5 | |||
| 6 | The voltage domain pointer currently in struct omap_hwmod is not used | ||
| 7 | and does not belong here. Instead, voltage domains will be associated | ||
| 8 | with powerdomains in forthcoming patches. | ||
| 9 | |||
| 10 | Acked-by: Paul Walmsley <paul@pwsan.com> | ||
| 11 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 12 | --- | ||
| 13 | arch/arm/plat-omap/include/plat/omap_hwmod.h | 1 - | ||
| 14 | 1 files changed, 0 insertions(+), 1 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/arch/arm/plat-omap/include/plat/omap_hwmod.h b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 17 | index 0e329ca..38ac4af 100644 | ||
| 18 | --- a/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 19 | +++ b/arch/arm/plat-omap/include/plat/omap_hwmod.h | ||
| 20 | @@ -526,7 +526,6 @@ struct omap_hwmod { | ||
| 21 | char *clkdm_name; | ||
| 22 | struct clockdomain *clkdm; | ||
| 23 | char *vdd_name; | ||
| 24 | - struct voltagedomain *voltdm; | ||
| 25 | struct omap_hwmod_ocp_if **masters; /* connect to *_IA */ | ||
| 26 | struct omap_hwmod_ocp_if **slaves; /* connect to *_TA */ | ||
| 27 | void *dev_attr; | ||
| 28 | -- | ||
| 29 | 1.7.2.5 | ||
| 30 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0097-OMAP2-voltage-move-PRCM-mod-offets-into-VC-VP-struct.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0097-OMAP2-voltage-move-PRCM-mod-offets-into-VC-VP-struct.patch deleted file mode 100644 index c4c56d06..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0097-OMAP2-voltage-move-PRCM-mod-offets-into-VC-VP-struct.patch +++ /dev/null | |||
| @@ -1,577 +0,0 @@ | |||
| 1 | From 9d2ed2fa5cc20d7c0233d1c5c8070c7c3f0914c8 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 16 Mar 2011 13:35:22 -0700 | ||
| 4 | Subject: [PATCH 097/149] OMAP2+: voltage: move PRCM mod offets into VC/VP structures | ||
| 5 | |||
| 6 | Eliminate need for global variables for the various PRM module offsets by | ||
| 7 | making them part of the VP/VC common structures | ||
| 8 | |||
| 9 | Eventually, these will likely be moved again, or more likely removed | ||
| 10 | when VP/VC code is isolated, but for now just getting rid of them as | ||
| 11 | global variabes so that the voltage domain initialization can be | ||
| 12 | cleaned up. | ||
| 13 | |||
| 14 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 15 | --- | ||
| 16 | arch/arm/mach-omap2/vc.h | 2 + | ||
| 17 | arch/arm/mach-omap2/vc3xxx_data.c | 1 + | ||
| 18 | arch/arm/mach-omap2/vc44xx_data.c | 1 + | ||
| 19 | arch/arm/mach-omap2/voltage.c | 109 ++++++++++++------------- | ||
| 20 | arch/arm/mach-omap2/voltage.h | 6 +- | ||
| 21 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 8 +- | ||
| 22 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 9 +- | ||
| 23 | arch/arm/mach-omap2/vp.h | 2 + | ||
| 24 | arch/arm/mach-omap2/vp3xxx_data.c | 1 + | ||
| 25 | arch/arm/mach-omap2/vp44xx_data.c | 1 + | ||
| 26 | 10 files changed, 70 insertions(+), 70 deletions(-) | ||
| 27 | |||
| 28 | diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h | ||
| 29 | index e776777..f7338af 100644 | ||
| 30 | --- a/arch/arm/mach-omap2/vc.h | ||
| 31 | +++ b/arch/arm/mach-omap2/vc.h | ||
| 32 | @@ -23,6 +23,7 @@ | ||
| 33 | * struct omap_vc_common_data - per-VC register/bitfield data | ||
| 34 | * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register | ||
| 35 | * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register | ||
| 36 | + * @prm_mod: PRM module id used for PRM register access | ||
| 37 | * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start | ||
| 38 | * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start | ||
| 39 | * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start | ||
| 40 | @@ -40,6 +41,7 @@ | ||
| 41 | struct omap_vc_common_data { | ||
| 42 | u32 cmd_on_mask; | ||
| 43 | u32 valid; | ||
| 44 | + s16 prm_mod; | ||
| 45 | u8 smps_sa_reg; | ||
| 46 | u8 smps_volra_reg; | ||
| 47 | u8 bypass_val_reg; | ||
| 48 | diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 49 | index f37dc4b..55caccb 100644 | ||
| 50 | --- a/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 51 | +++ b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 52 | @@ -30,6 +30,7 @@ | ||
| 53 | * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. | ||
| 54 | */ | ||
| 55 | static struct omap_vc_common_data omap3_vc_common = { | ||
| 56 | + .prm_mod = OMAP3430_GR_MOD, | ||
| 57 | .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, | ||
| 58 | .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, | ||
| 59 | .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, | ||
| 60 | diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 61 | index a98da8d..b62678e 100644 | ||
| 62 | --- a/arch/arm/mach-omap2/vc44xx_data.c | ||
| 63 | +++ b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 64 | @@ -31,6 +31,7 @@ | ||
| 65 | * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. | ||
| 66 | */ | ||
| 67 | static const struct omap_vc_common_data omap4_vc_common = { | ||
| 68 | + .prm_mod = OMAP4430_PRM_DEVICE_INST, | ||
| 69 | .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, | ||
| 70 | .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, | ||
| 71 | .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, | ||
| 72 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 73 | index 9ef3789..3151d75 100644 | ||
| 74 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 75 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 76 | @@ -50,10 +50,6 @@ static struct omap_vdd_info **vdd_info; | ||
| 77 | */ | ||
| 78 | static int nr_scalable_vdd; | ||
| 79 | |||
| 80 | -/* XXX document */ | ||
| 81 | -static s16 prm_mod_offs; | ||
| 82 | -static s16 prm_irqst_ocp_mod_offs; | ||
| 83 | - | ||
| 84 | static struct dentry *voltage_dir; | ||
| 85 | |||
| 86 | /* Init function pointers */ | ||
| 87 | @@ -147,7 +143,7 @@ static int vp_volt_debug_get(void *data, u64 *val) | ||
| 88 | return -EINVAL; | ||
| 89 | } | ||
| 90 | |||
| 91 | - vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); | ||
| 92 | + vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); | ||
| 93 | |||
| 94 | if (!vdd->pmic_info->vsel_to_uv) { | ||
| 95 | pr_warning("PMIC function to convert vsel to voltage" | ||
| 96 | @@ -197,19 +193,19 @@ static void vp_latch_vsel(struct omap_vdd_info *vdd) | ||
| 97 | |||
| 98 | vsel = vdd->pmic_info->uv_to_vsel(uvdc); | ||
| 99 | |||
| 100 | - vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 101 | + vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 102 | vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvoltage_mask | | ||
| 103 | vdd->vp_data->vp_common->vpconfig_initvdd); | ||
| 104 | vpconfig |= vsel << vdd->vp_data->vp_common->vpconfig_initvoltage_shift; | ||
| 105 | |||
| 106 | - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 107 | + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 108 | |||
| 109 | /* Trigger initVDD value copy to voltage processor */ | ||
| 110 | vdd->write_reg((vpconfig | vdd->vp_data->vp_common->vpconfig_initvdd), | ||
| 111 | - prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 112 | + vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 113 | |||
| 114 | /* Clear initVDD copy trigger bit */ | ||
| 115 | - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 116 | + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 117 | } | ||
| 118 | |||
| 119 | /* Generic voltage init functions */ | ||
| 120 | @@ -227,19 +223,19 @@ static void __init vp_init(struct omap_vdd_info *vdd) | ||
| 121 | (vdd->vp_rt_data.vpconfig_errorgain << | ||
| 122 | vdd->vp_data->vp_common->vpconfig_errorgain_shift) | | ||
| 123 | vdd->vp_data->vp_common->vpconfig_timeouten; | ||
| 124 | - vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 125 | + vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 126 | |||
| 127 | vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << | ||
| 128 | vdd->vp_data->vp_common->vstepmin_smpswaittimemin_shift) | | ||
| 129 | (vdd->vp_rt_data.vstepmin_stepmin << | ||
| 130 | vdd->vp_data->vp_common->vstepmin_stepmin_shift)); | ||
| 131 | - vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vstepmin); | ||
| 132 | + vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmin); | ||
| 133 | |||
| 134 | vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << | ||
| 135 | vdd->vp_data->vp_common->vstepmax_smpswaittimemax_shift) | | ||
| 136 | (vdd->vp_rt_data.vstepmax_stepmax << | ||
| 137 | vdd->vp_data->vp_common->vstepmax_stepmax_shift)); | ||
| 138 | - vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vstepmax); | ||
| 139 | + vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmax); | ||
| 140 | |||
| 141 | vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << | ||
| 142 | vdd->vp_data->vp_common->vlimitto_vddmax_shift) | | ||
| 143 | @@ -247,7 +243,7 @@ static void __init vp_init(struct omap_vdd_info *vdd) | ||
| 144 | vdd->vp_data->vp_common->vlimitto_vddmin_shift) | | ||
| 145 | (vdd->vp_rt_data.vlimitto_timeout << | ||
| 146 | vdd->vp_data->vp_common->vlimitto_timeout_shift)); | ||
| 147 | - vdd->write_reg(vp_val, prm_mod_offs, vdd->vp_data->vlimitto); | ||
| 148 | + vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vlimitto); | ||
| 149 | } | ||
| 150 | |||
| 151 | static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) | ||
| 152 | @@ -336,23 +332,23 @@ static int _pre_volt_scale(struct omap_vdd_info *vdd, | ||
| 153 | volt_data = NULL; | ||
| 154 | |||
| 155 | *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); | ||
| 156 | - *current_vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); | ||
| 157 | + *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); | ||
| 158 | |||
| 159 | /* Setting the ON voltage to the new target voltage */ | ||
| 160 | - vc_cmdval = vdd->read_reg(prm_mod_offs, vdd->vc_data->cmdval_reg); | ||
| 161 | + vc_cmdval = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); | ||
| 162 | vc_cmdval &= ~vc_common->cmd_on_mask; | ||
| 163 | vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); | ||
| 164 | - vdd->write_reg(vc_cmdval, prm_mod_offs, vdd->vc_data->cmdval_reg); | ||
| 165 | + vdd->write_reg(vc_cmdval, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); | ||
| 166 | |||
| 167 | /* Setting vp errorgain based on the voltage */ | ||
| 168 | if (volt_data) { | ||
| 169 | - vp_errgain_val = vdd->read_reg(prm_mod_offs, | ||
| 170 | + vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, | ||
| 171 | vdd->vp_data->vpconfig); | ||
| 172 | vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; | ||
| 173 | vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; | ||
| 174 | vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << | ||
| 175 | vp_common->vpconfig_errorgain_shift; | ||
| 176 | - vdd->write_reg(vp_errgain_val, prm_mod_offs, | ||
| 177 | + vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod, | ||
| 178 | vdd->vp_data->vpconfig); | ||
| 179 | } | ||
| 180 | |||
| 181 | @@ -394,11 +390,11 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, | ||
| 182 | (vdd->pmic_info->i2c_slave_addr << | ||
| 183 | vdd->vc_data->vc_common->slaveaddr_shift); | ||
| 184 | |||
| 185 | - vdd->write_reg(vc_bypass_value, prm_mod_offs, vc_bypass_val_reg); | ||
| 186 | - vdd->write_reg(vc_bypass_value | vc_valid, prm_mod_offs, | ||
| 187 | + vdd->write_reg(vc_bypass_value, vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); | ||
| 188 | + vdd->write_reg(vc_bypass_value | vc_valid, vdd->vc_data->vc_common->prm_mod, | ||
| 189 | vc_bypass_val_reg); | ||
| 190 | |||
| 191 | - vc_bypass_value = vdd->read_reg(prm_mod_offs, vc_bypass_val_reg); | ||
| 192 | + vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); | ||
| 193 | /* | ||
| 194 | * Loop till the bypass command is acknowledged from the SMPS. | ||
| 195 | * NOTE: This is legacy code. The loop count and retry count needs | ||
| 196 | @@ -417,7 +413,7 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, | ||
| 197 | loop_cnt = 0; | ||
| 198 | udelay(10); | ||
| 199 | } | ||
| 200 | - vc_bypass_value = vdd->read_reg(prm_mod_offs, | ||
| 201 | + vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, | ||
| 202 | vc_bypass_val_reg); | ||
| 203 | } | ||
| 204 | |||
| 205 | @@ -445,8 +441,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 206 | */ | ||
| 207 | while (timeout++ < VP_TRANXDONE_TIMEOUT) { | ||
| 208 | vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, | ||
| 209 | - prm_irqst_ocp_mod_offs, prm_irqst_reg); | ||
| 210 | - if (!(vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) & | ||
| 211 | + vdd->prm_irqst_mod, prm_irqst_reg); | ||
| 212 | + if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & | ||
| 213 | vdd->vp_data->prm_irqst_data->tranxdone_status)) | ||
| 214 | break; | ||
| 215 | udelay(1); | ||
| 216 | @@ -458,28 +454,28 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 217 | } | ||
| 218 | |||
| 219 | /* Configure for VP-Force Update */ | ||
| 220 | - vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 221 | + vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 222 | vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvdd | | ||
| 223 | vdd->vp_data->vp_common->vpconfig_forceupdate | | ||
| 224 | vdd->vp_data->vp_common->vpconfig_initvoltage_mask); | ||
| 225 | vpconfig |= ((target_vsel << | ||
| 226 | vdd->vp_data->vp_common->vpconfig_initvoltage_shift)); | ||
| 227 | - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 228 | + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 229 | |||
| 230 | /* Trigger initVDD value copy to voltage processor */ | ||
| 231 | vpconfig |= vdd->vp_data->vp_common->vpconfig_initvdd; | ||
| 232 | - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 233 | + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 234 | |||
| 235 | /* Force update of voltage */ | ||
| 236 | vpconfig |= vdd->vp_data->vp_common->vpconfig_forceupdate; | ||
| 237 | - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 238 | + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 239 | |||
| 240 | /* | ||
| 241 | * Wait for TransactionDone. Typical latency is <200us. | ||
| 242 | * Depends on SMPSWAITTIMEMIN/MAX and voltage change | ||
| 243 | */ | ||
| 244 | timeout = 0; | ||
| 245 | - omap_test_timeout((vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) & | ||
| 246 | + omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & | ||
| 247 | vdd->vp_data->prm_irqst_data->tranxdone_status), | ||
| 248 | VP_TRANXDONE_TIMEOUT, timeout); | ||
| 249 | if (timeout >= VP_TRANXDONE_TIMEOUT) | ||
| 250 | @@ -496,8 +492,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 251 | timeout = 0; | ||
| 252 | while (timeout++ < VP_TRANXDONE_TIMEOUT) { | ||
| 253 | vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, | ||
| 254 | - prm_irqst_ocp_mod_offs, prm_irqst_reg); | ||
| 255 | - if (!(vdd->read_reg(prm_irqst_ocp_mod_offs, prm_irqst_reg) & | ||
| 256 | + vdd->prm_irqst_mod, prm_irqst_reg); | ||
| 257 | + if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & | ||
| 258 | vdd->vp_data->prm_irqst_data->tranxdone_status)) | ||
| 259 | break; | ||
| 260 | udelay(1); | ||
| 261 | @@ -508,13 +504,13 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 262 | "to clear the TRANXDONE status\n", | ||
| 263 | __func__, vdd->voltdm.name); | ||
| 264 | |||
| 265 | - vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 266 | + vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 267 | /* Clear initVDD copy trigger bit */ | ||
| 268 | vpconfig &= ~vdd->vp_data->vp_common->vpconfig_initvdd; | ||
| 269 | - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 270 | + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 271 | /* Clear force bit */ | ||
| 272 | vpconfig &= ~vdd->vp_data->vp_common->vpconfig_forceupdate; | ||
| 273 | - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 274 | + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 275 | |||
| 276 | return 0; | ||
| 277 | } | ||
| 278 | @@ -525,10 +521,10 @@ static void __init omap3_vfsm_init(struct omap_vdd_info *vdd) | ||
| 279 | * Voltage Manager FSM parameters init | ||
| 280 | * XXX This data should be passed in from the board file | ||
| 281 | */ | ||
| 282 | - vdd->write_reg(OMAP3_CLKSETUP, prm_mod_offs, OMAP3_PRM_CLKSETUP_OFFSET); | ||
| 283 | - vdd->write_reg(OMAP3_VOLTOFFSET, prm_mod_offs, | ||
| 284 | + vdd->write_reg(OMAP3_CLKSETUP, vdd->vc_data->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); | ||
| 285 | + vdd->write_reg(OMAP3_VOLTOFFSET, vdd->vc_data->vc_common->prm_mod, | ||
| 286 | OMAP3_PRM_VOLTOFFSET_OFFSET); | ||
| 287 | - vdd->write_reg(OMAP3_VOLTSETUP2, prm_mod_offs, | ||
| 288 | + vdd->write_reg(OMAP3_VOLTSETUP2, vdd->vc_data->vc_common->prm_mod, | ||
| 289 | OMAP3_PRM_VOLTSETUP2_OFFSET); | ||
| 290 | } | ||
| 291 | |||
| 292 | @@ -550,15 +546,15 @@ static void __init omap3_vc_init(struct omap_vdd_info *vdd) | ||
| 293 | (onlp_vsel << vdd->vc_data->vc_common->cmd_onlp_shift) | | ||
| 294 | (ret_vsel << vdd->vc_data->vc_common->cmd_ret_shift) | | ||
| 295 | (off_vsel << vdd->vc_data->vc_common->cmd_off_shift)); | ||
| 296 | - vdd->write_reg(vc_val, prm_mod_offs, vdd->vc_data->cmdval_reg); | ||
| 297 | + vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); | ||
| 298 | |||
| 299 | /* | ||
| 300 | * Generic VC parameters init | ||
| 301 | * XXX This data should be abstracted out | ||
| 302 | */ | ||
| 303 | - vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, prm_mod_offs, | ||
| 304 | + vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vdd->vc_data->vc_common->prm_mod, | ||
| 305 | OMAP3_PRM_VC_CH_CONF_OFFSET); | ||
| 306 | - vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, prm_mod_offs, | ||
| 307 | + vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod, | ||
| 308 | OMAP3_PRM_VC_I2C_CFG_OFFSET); | ||
| 309 | |||
| 310 | omap3_vfsm_init(vdd); | ||
| 311 | @@ -585,11 +581,11 @@ static void __init omap4_vc_init(struct omap_vdd_info *vdd) | ||
| 312 | vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | | ||
| 313 | OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | | ||
| 314 | OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); | ||
| 315 | - vdd->write_reg(vc_val, prm_mod_offs, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); | ||
| 316 | + vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); | ||
| 317 | |||
| 318 | /* XXX These are magic numbers and do not belong! */ | ||
| 319 | vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); | ||
| 320 | - vdd->write_reg(vc_val, prm_mod_offs, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); | ||
| 321 | + vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); | ||
| 322 | |||
| 323 | is_initialized = true; | ||
| 324 | } | ||
| 325 | @@ -612,27 +608,27 @@ static void __init omap_vc_init(struct omap_vdd_info *vdd) | ||
| 326 | } | ||
| 327 | |||
| 328 | /* Set up the SMPS_SA(i2c slave address in VC */ | ||
| 329 | - vc_val = vdd->read_reg(prm_mod_offs, | ||
| 330 | + vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, | ||
| 331 | vdd->vc_data->vc_common->smps_sa_reg); | ||
| 332 | vc_val &= ~vdd->vc_data->smps_sa_mask; | ||
| 333 | vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_data->smps_sa_shift; | ||
| 334 | - vdd->write_reg(vc_val, prm_mod_offs, | ||
| 335 | + vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, | ||
| 336 | vdd->vc_data->vc_common->smps_sa_reg); | ||
| 337 | |||
| 338 | /* Setup the VOLRA(pmic reg addr) in VC */ | ||
| 339 | - vc_val = vdd->read_reg(prm_mod_offs, | ||
| 340 | + vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, | ||
| 341 | vdd->vc_data->vc_common->smps_volra_reg); | ||
| 342 | vc_val &= ~vdd->vc_data->smps_volra_mask; | ||
| 343 | vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_data->smps_volra_shift; | ||
| 344 | - vdd->write_reg(vc_val, prm_mod_offs, | ||
| 345 | + vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, | ||
| 346 | vdd->vc_data->vc_common->smps_volra_reg); | ||
| 347 | |||
| 348 | /* Configure the setup times */ | ||
| 349 | - vc_val = vdd->read_reg(prm_mod_offs, vdd->vfsm->voltsetup_reg); | ||
| 350 | + vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 351 | vc_val &= ~vdd->vfsm->voltsetup_mask; | ||
| 352 | vc_val |= vdd->pmic_info->volt_setup_time << | ||
| 353 | vdd->vfsm->voltsetup_shift; | ||
| 354 | - vdd->write_reg(vc_val, prm_mod_offs, vdd->vfsm->voltsetup_reg); | ||
| 355 | + vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 356 | |||
| 357 | if (cpu_is_omap34xx()) | ||
| 358 | omap3_vc_init(vdd); | ||
| 359 | @@ -713,7 +709,7 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) | ||
| 360 | return 0; | ||
| 361 | } | ||
| 362 | |||
| 363 | - curr_vsel = vdd->read_reg(prm_mod_offs, vdd->vp_data->voltage); | ||
| 364 | + curr_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); | ||
| 365 | |||
| 366 | if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { | ||
| 367 | pr_warning("%s: PMIC function to convert vsel to voltage" | ||
| 368 | @@ -755,9 +751,9 @@ void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 369 | vp_latch_vsel(vdd); | ||
| 370 | |||
| 371 | /* Enable VP */ | ||
| 372 | - vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 373 | + vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 374 | vpconfig |= vdd->vp_data->vp_common->vpconfig_vpenable; | ||
| 375 | - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 376 | + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 377 | vdd->vp_enabled = true; | ||
| 378 | } | ||
| 379 | |||
| 380 | @@ -794,14 +790,14 @@ void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 381 | } | ||
| 382 | |||
| 383 | /* Disable VP */ | ||
| 384 | - vpconfig = vdd->read_reg(prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 385 | + vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 386 | vpconfig &= ~vdd->vp_data->vp_common->vpconfig_vpenable; | ||
| 387 | - vdd->write_reg(vpconfig, prm_mod_offs, vdd->vp_data->vpconfig); | ||
| 388 | + vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 389 | |||
| 390 | /* | ||
| 391 | * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us | ||
| 392 | */ | ||
| 393 | - omap_test_timeout((vdd->read_reg(prm_mod_offs, vdd->vp_data->vstatus)), | ||
| 394 | + omap_test_timeout((vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstatus)), | ||
| 395 | VP_IDLE_TIMEOUT, timeout); | ||
| 396 | |||
| 397 | if (timeout >= VP_IDLE_TIMEOUT) | ||
| 398 | @@ -1094,12 +1090,9 @@ int __init omap_voltage_late_init(void) | ||
| 399 | } | ||
| 400 | |||
| 401 | /* XXX document */ | ||
| 402 | -int __init omap_voltage_early_init(s16 prm_mod, s16 prm_irqst_ocp_mod, | ||
| 403 | - struct omap_vdd_info *omap_vdd_array[], | ||
| 404 | +int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[], | ||
| 405 | u8 omap_vdd_count) | ||
| 406 | { | ||
| 407 | - prm_mod_offs = prm_mod; | ||
| 408 | - prm_irqst_ocp_mod_offs = prm_irqst_ocp_mod; | ||
| 409 | vdd_info = omap_vdd_array; | ||
| 410 | nr_scalable_vdd = omap_vdd_count; | ||
| 411 | return 0; | ||
| 412 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 413 | index e9f5408..ffdc55e 100644 | ||
| 414 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 415 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 416 | @@ -119,6 +119,7 @@ struct omap_volt_pmic_info { | ||
| 417 | * @voltdm : pointer to the voltage domain structure | ||
| 418 | * @debug_dir : debug directory for this voltage domain. | ||
| 419 | * @curr_volt : current voltage for this vdd. | ||
| 420 | + * @prm_irqst_mod : PRM module id used for PRM IRQ status register access | ||
| 421 | * @vp_enabled : flag to keep track of whether vp is enabled or not | ||
| 422 | * @volt_scale : API to scale the voltage of the vdd. | ||
| 423 | */ | ||
| 424 | @@ -133,6 +134,8 @@ struct omap_vdd_info { | ||
| 425 | struct dentry *debug_dir; | ||
| 426 | u32 curr_volt; | ||
| 427 | bool vp_enabled; | ||
| 428 | + | ||
| 429 | + s16 prm_irqst_mod; | ||
| 430 | u32 (*read_reg) (u16 mod, u8 offset); | ||
| 431 | void (*write_reg) (u32 val, u16 mod, u8 offset); | ||
| 432 | int (*volt_scale) (struct omap_vdd_info *vdd, | ||
| 433 | @@ -151,8 +154,7 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | ||
| 434 | unsigned long volt); | ||
| 435 | unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); | ||
| 436 | struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); | ||
| 437 | -int __init omap_voltage_early_init(s16 prm_mod, s16 prm_irqst_mod, | ||
| 438 | - struct omap_vdd_info *omap_vdd_array[], | ||
| 439 | +int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[], | ||
| 440 | u8 omap_vdd_count); | ||
| 441 | #ifdef CONFIG_PM | ||
| 442 | int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
| 443 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 444 | index def230f..0d30b7f 100644 | ||
| 445 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 446 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 447 | @@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { | ||
| 448 | }; | ||
| 449 | |||
| 450 | static struct omap_vdd_info omap3_vdd1_info = { | ||
| 451 | + .prm_irqst_mod = OCP_MOD, | ||
| 452 | .vp_data = &omap3_vp1_data, | ||
| 453 | .vc_data = &omap3_vc1_data, | ||
| 454 | .vfsm = &omap3_vdd1_vfsm_data, | ||
| 455 | @@ -53,6 +54,7 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { | ||
| 456 | }; | ||
| 457 | |||
| 458 | static struct omap_vdd_info omap3_vdd2_info = { | ||
| 459 | + .prm_irqst_mod = OCP_MOD, | ||
| 460 | .vp_data = &omap3_vp2_data, | ||
| 461 | .vc_data = &omap3_vc2_data, | ||
| 462 | .vfsm = &omap3_vdd2_vfsm_data, | ||
| 463 | @@ -70,9 +72,6 @@ static struct omap_vdd_info *omap3_vdd_info[] = { | ||
| 464 | /* OMAP3 specific voltage init functions */ | ||
| 465 | static int __init omap3xxx_voltage_early_init(void) | ||
| 466 | { | ||
| 467 | - s16 prm_mod = OMAP3430_GR_MOD; | ||
| 468 | - s16 prm_irqst_ocp_mod = OCP_MOD; | ||
| 469 | - | ||
| 470 | if (!cpu_is_omap34xx()) | ||
| 471 | return 0; | ||
| 472 | |||
| 473 | @@ -88,8 +87,7 @@ static int __init omap3xxx_voltage_early_init(void) | ||
| 474 | omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; | ||
| 475 | } | ||
| 476 | |||
| 477 | - return omap_voltage_early_init(prm_mod, prm_irqst_ocp_mod, | ||
| 478 | - omap3_vdd_info, | ||
| 479 | + return omap_voltage_early_init(omap3_vdd_info, | ||
| 480 | ARRAY_SIZE(omap3_vdd_info)); | ||
| 481 | }; | ||
| 482 | core_initcall(omap3xxx_voltage_early_init); | ||
| 483 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 484 | index cb64996..1c2d7d7 100644 | ||
| 485 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 486 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 487 | @@ -37,6 +37,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { | ||
| 488 | }; | ||
| 489 | |||
| 490 | static struct omap_vdd_info omap4_vdd_mpu_info = { | ||
| 491 | + .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 492 | .vp_data = &omap4_vp_mpu_data, | ||
| 493 | .vc_data = &omap4_vc_mpu_data, | ||
| 494 | .vfsm = &omap4_vdd_mpu_vfsm_data, | ||
| 495 | @@ -50,6 +51,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { | ||
| 496 | }; | ||
| 497 | |||
| 498 | static struct omap_vdd_info omap4_vdd_iva_info = { | ||
| 499 | + .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 500 | .vp_data = &omap4_vp_iva_data, | ||
| 501 | .vc_data = &omap4_vc_iva_data, | ||
| 502 | .vfsm = &omap4_vdd_iva_vfsm_data, | ||
| 503 | @@ -63,6 +65,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { | ||
| 504 | }; | ||
| 505 | |||
| 506 | static struct omap_vdd_info omap4_vdd_core_info = { | ||
| 507 | + .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 508 | .vp_data = &omap4_vp_core_data, | ||
| 509 | .vc_data = &omap4_vc_core_data, | ||
| 510 | .vfsm = &omap4_vdd_core_vfsm_data, | ||
| 511 | @@ -81,9 +84,6 @@ static struct omap_vdd_info *omap4_vdd_info[] = { | ||
| 512 | /* OMAP4 specific voltage init functions */ | ||
| 513 | static int __init omap44xx_voltage_early_init(void) | ||
| 514 | { | ||
| 515 | - s16 prm_mod = OMAP4430_PRM_DEVICE_INST; | ||
| 516 | - s16 prm_irqst_ocp_mod = OMAP4430_PRM_OCP_SOCKET_INST; | ||
| 517 | - | ||
| 518 | if (!cpu_is_omap44xx()) | ||
| 519 | return 0; | ||
| 520 | |||
| 521 | @@ -95,8 +95,7 @@ static int __init omap44xx_voltage_early_init(void) | ||
| 522 | omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; | ||
| 523 | omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; | ||
| 524 | |||
| 525 | - return omap_voltage_early_init(prm_mod, prm_irqst_ocp_mod, | ||
| 526 | - omap4_vdd_info, | ||
| 527 | + return omap_voltage_early_init(omap4_vdd_info, | ||
| 528 | ARRAY_SIZE(omap4_vdd_info)); | ||
| 529 | }; | ||
| 530 | core_initcall(omap44xx_voltage_early_init); | ||
| 531 | diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h | ||
| 532 | index 7ce134f..d277da6 100644 | ||
| 533 | --- a/arch/arm/mach-omap2/vp.h | ||
| 534 | +++ b/arch/arm/mach-omap2/vp.h | ||
| 535 | @@ -42,6 +42,7 @@ | ||
| 536 | * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg | ||
| 537 | * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg | ||
| 538 | * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg | ||
| 539 | + * @prm_mod: PRM module id used for PRM register access | ||
| 540 | * | ||
| 541 | * XXX It it not necessary to have both a mask and a shift for the same | ||
| 542 | * bitfield - remove one | ||
| 543 | @@ -54,6 +55,7 @@ struct omap_vp_common_data { | ||
| 544 | u32 vpconfig_initvdd; | ||
| 545 | u32 vpconfig_forceupdate; | ||
| 546 | u32 vpconfig_vpenable; | ||
| 547 | + s16 prm_mod; | ||
| 548 | u8 vpconfig_erroroffset_shift; | ||
| 549 | u8 vpconfig_errorgain_shift; | ||
| 550 | u8 vpconfig_initvoltage_shift; | ||
| 551 | diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 552 | index 6452170..c9b3e64 100644 | ||
| 553 | --- a/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 554 | +++ b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 555 | @@ -31,6 +31,7 @@ | ||
| 556 | * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. | ||
| 557 | */ | ||
| 558 | static const struct omap_vp_common_data omap3_vp_common = { | ||
| 559 | + .prm_mod = OMAP3430_GR_MOD, | ||
| 560 | .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, | ||
| 561 | .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, | ||
| 562 | .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, | ||
| 563 | diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 564 | index 65d1ad6..1a0842e 100644 | ||
| 565 | --- a/arch/arm/mach-omap2/vp44xx_data.c | ||
| 566 | +++ b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 567 | @@ -32,6 +32,7 @@ | ||
| 568 | * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. | ||
| 569 | */ | ||
| 570 | static const struct omap_vp_common_data omap4_vp_common = { | ||
| 571 | + .prm_mod = OMAP4430_PRM_DEVICE_INST, | ||
| 572 | .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, | ||
| 573 | .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, | ||
| 574 | .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, | ||
| 575 | -- | ||
| 576 | 1.7.2.5 | ||
| 577 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0098-OMAP2-voltage-move-prm_irqst_reg-from-VP-into-voltag.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0098-OMAP2-voltage-move-prm_irqst_reg-from-VP-into-voltag.patch deleted file mode 100644 index 2b2727c2..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0098-OMAP2-voltage-move-prm_irqst_reg-from-VP-into-voltag.patch +++ /dev/null | |||
| @@ -1,203 +0,0 @@ | |||
| 1 | From 6e8557b224128200bac5f99b41bc6213de05ad69 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 16 Mar 2011 17:20:35 -0700 | ||
| 4 | Subject: [PATCH 098/149] OMAP2+: voltage: move prm_irqst_reg from VP into voltage domain | ||
| 5 | |||
| 6 | The prm_irqst_reg is not part of the VP. Move it up into the common | ||
| 7 | voltage domain struct. | ||
| 8 | |||
| 9 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 10 | --- | ||
| 11 | arch/arm/mach-omap2/voltage.c | 15 +++++++-------- | ||
| 12 | arch/arm/mach-omap2/voltage.h | 1 + | ||
| 13 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 2 ++ | ||
| 14 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 3 +++ | ||
| 15 | arch/arm/mach-omap2/vp.h | 3 --- | ||
| 16 | arch/arm/mach-omap2/vp3xxx_data.c | 2 -- | ||
| 17 | arch/arm/mach-omap2/vp44xx_data.c | 3 --- | ||
| 18 | 7 files changed, 13 insertions(+), 16 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 21 | index 3151d75..a366a6b 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 23 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 24 | @@ -426,23 +426,21 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 25 | unsigned long target_volt) | ||
| 26 | { | ||
| 27 | u32 vpconfig; | ||
| 28 | - u8 target_vsel, current_vsel, prm_irqst_reg; | ||
| 29 | + u8 target_vsel, current_vsel; | ||
| 30 | int ret, timeout = 0; | ||
| 31 | |||
| 32 | ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); | ||
| 33 | if (ret) | ||
| 34 | return ret; | ||
| 35 | |||
| 36 | - prm_irqst_reg = vdd->vp_data->prm_irqst_data->prm_irqst_reg; | ||
| 37 | - | ||
| 38 | /* | ||
| 39 | * Clear all pending TransactionDone interrupt/status. Typical latency | ||
| 40 | * is <3us | ||
| 41 | */ | ||
| 42 | while (timeout++ < VP_TRANXDONE_TIMEOUT) { | ||
| 43 | vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, | ||
| 44 | - vdd->prm_irqst_mod, prm_irqst_reg); | ||
| 45 | - if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & | ||
| 46 | + vdd->prm_irqst_mod, vdd->prm_irqst_reg); | ||
| 47 | + if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & | ||
| 48 | vdd->vp_data->prm_irqst_data->tranxdone_status)) | ||
| 49 | break; | ||
| 50 | udelay(1); | ||
| 51 | @@ -475,7 +473,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 52 | * Depends on SMPSWAITTIMEMIN/MAX and voltage change | ||
| 53 | */ | ||
| 54 | timeout = 0; | ||
| 55 | - omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & | ||
| 56 | + omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, | ||
| 57 | + vdd->prm_irqst_reg) & | ||
| 58 | vdd->vp_data->prm_irqst_data->tranxdone_status), | ||
| 59 | VP_TRANXDONE_TIMEOUT, timeout); | ||
| 60 | if (timeout >= VP_TRANXDONE_TIMEOUT) | ||
| 61 | @@ -492,8 +491,8 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 62 | timeout = 0; | ||
| 63 | while (timeout++ < VP_TRANXDONE_TIMEOUT) { | ||
| 64 | vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, | ||
| 65 | - vdd->prm_irqst_mod, prm_irqst_reg); | ||
| 66 | - if (!(vdd->read_reg(vdd->prm_irqst_mod, prm_irqst_reg) & | ||
| 67 | + vdd->prm_irqst_mod, vdd->prm_irqst_reg); | ||
| 68 | + if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & | ||
| 69 | vdd->vp_data->prm_irqst_data->tranxdone_status)) | ||
| 70 | break; | ||
| 71 | udelay(1); | ||
| 72 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 73 | index ffdc55e..db23d49 100644 | ||
| 74 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 75 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 76 | @@ -136,6 +136,7 @@ struct omap_vdd_info { | ||
| 77 | bool vp_enabled; | ||
| 78 | |||
| 79 | s16 prm_irqst_mod; | ||
| 80 | + u8 prm_irqst_reg; | ||
| 81 | u32 (*read_reg) (u16 mod, u8 offset); | ||
| 82 | void (*write_reg) (u32 val, u16 mod, u8 offset); | ||
| 83 | int (*volt_scale) (struct omap_vdd_info *vdd, | ||
| 84 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 85 | index 0d30b7f..f831f9a 100644 | ||
| 86 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 87 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 88 | @@ -39,6 +39,7 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { | ||
| 89 | |||
| 90 | static struct omap_vdd_info omap3_vdd1_info = { | ||
| 91 | .prm_irqst_mod = OCP_MOD, | ||
| 92 | + .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 93 | .vp_data = &omap3_vp1_data, | ||
| 94 | .vc_data = &omap3_vc1_data, | ||
| 95 | .vfsm = &omap3_vdd1_vfsm_data, | ||
| 96 | @@ -55,6 +56,7 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { | ||
| 97 | |||
| 98 | static struct omap_vdd_info omap3_vdd2_info = { | ||
| 99 | .prm_irqst_mod = OCP_MOD, | ||
| 100 | + .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 101 | .vp_data = &omap3_vp2_data, | ||
| 102 | .vc_data = &omap3_vc2_data, | ||
| 103 | .vfsm = &omap3_vdd2_vfsm_data, | ||
| 104 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 105 | index 1c2d7d7..64dc265 100644 | ||
| 106 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 107 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 108 | @@ -38,6 +38,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { | ||
| 109 | |||
| 110 | static struct omap_vdd_info omap4_vdd_mpu_info = { | ||
| 111 | .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 112 | + .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, | ||
| 113 | .vp_data = &omap4_vp_mpu_data, | ||
| 114 | .vc_data = &omap4_vc_mpu_data, | ||
| 115 | .vfsm = &omap4_vdd_mpu_vfsm_data, | ||
| 116 | @@ -52,6 +53,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { | ||
| 117 | |||
| 118 | static struct omap_vdd_info omap4_vdd_iva_info = { | ||
| 119 | .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 120 | + .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 121 | .vp_data = &omap4_vp_iva_data, | ||
| 122 | .vc_data = &omap4_vc_iva_data, | ||
| 123 | .vfsm = &omap4_vdd_iva_vfsm_data, | ||
| 124 | @@ -66,6 +68,7 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { | ||
| 125 | |||
| 126 | static struct omap_vdd_info omap4_vdd_core_info = { | ||
| 127 | .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 128 | + .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 129 | .vp_data = &omap4_vp_core_data, | ||
| 130 | .vc_data = &omap4_vc_core_data, | ||
| 131 | .vfsm = &omap4_vdd_core_vfsm_data, | ||
| 132 | diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h | ||
| 133 | index d277da6..5406b08 100644 | ||
| 134 | --- a/arch/arm/mach-omap2/vp.h | ||
| 135 | +++ b/arch/arm/mach-omap2/vp.h | ||
| 136 | @@ -70,16 +70,13 @@ struct omap_vp_common_data { | ||
| 137 | |||
| 138 | /** | ||
| 139 | * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data | ||
| 140 | - * @prm_irqst_reg: reg offset for PRM_IRQSTATUS_MPU from top of PRM | ||
| 141 | * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg | ||
| 142 | * | ||
| 143 | - * XXX prm_irqst_reg does not belong here | ||
| 144 | * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a | ||
| 145 | * hardware bug | ||
| 146 | * XXX This structure is probably not needed | ||
| 147 | */ | ||
| 148 | struct omap_vp_prm_irqst_data { | ||
| 149 | - u8 prm_irqst_reg; | ||
| 150 | u32 tranxdone_status; | ||
| 151 | }; | ||
| 152 | |||
| 153 | diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 154 | index c9b3e64..a8ea045 100644 | ||
| 155 | --- a/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 156 | +++ b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 157 | @@ -51,7 +51,6 @@ static const struct omap_vp_common_data omap3_vp_common = { | ||
| 158 | }; | ||
| 159 | |||
| 160 | static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = { | ||
| 161 | - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 162 | .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, | ||
| 163 | }; | ||
| 164 | |||
| 165 | @@ -67,7 +66,6 @@ struct omap_vp_instance_data omap3_vp1_data = { | ||
| 166 | }; | ||
| 167 | |||
| 168 | static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = { | ||
| 169 | - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 170 | .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, | ||
| 171 | }; | ||
| 172 | |||
| 173 | diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 174 | index 1a0842e..0957c24 100644 | ||
| 175 | --- a/arch/arm/mach-omap2/vp44xx_data.c | ||
| 176 | +++ b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 177 | @@ -52,7 +52,6 @@ static const struct omap_vp_common_data omap4_vp_common = { | ||
| 178 | }; | ||
| 179 | |||
| 180 | static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data = { | ||
| 181 | - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, | ||
| 182 | .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, | ||
| 183 | }; | ||
| 184 | |||
| 185 | @@ -68,7 +67,6 @@ struct omap_vp_instance_data omap4_vp_mpu_data = { | ||
| 186 | }; | ||
| 187 | |||
| 188 | static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data = { | ||
| 189 | - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 190 | .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, | ||
| 191 | }; | ||
| 192 | |||
| 193 | @@ -84,7 +82,6 @@ struct omap_vp_instance_data omap4_vp_iva_data = { | ||
| 194 | }; | ||
| 195 | |||
| 196 | static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data = { | ||
| 197 | - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 198 | .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, | ||
| 199 | }; | ||
| 200 | |||
| 201 | -- | ||
| 202 | 1.7.2.5 | ||
| 203 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0099-OMAP2-voltage-start-towards-a-new-voltagedomain-laye.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0099-OMAP2-voltage-start-towards-a-new-voltagedomain-laye.patch deleted file mode 100644 index 930f9859..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0099-OMAP2-voltage-start-towards-a-new-voltagedomain-laye.patch +++ /dev/null | |||
| @@ -1,986 +0,0 @@ | |||
| 1 | From 1e7eea5a5f4557d90e5b25e4473b7cb77540b7cd Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 16 Mar 2011 14:25:45 -0700 | ||
| 4 | Subject: [PATCH 099/149] OMAP2+: voltage: start towards a new voltagedomain layer | ||
| 5 | |||
| 6 | Start cleaning up the voltage layer to have a voltage domain layer | ||
| 7 | that resembles the structure of the existing clock and power domain | ||
| 8 | layers. To that end: | ||
| 9 | |||
| 10 | - move the 'struct voltagedomain' out of 'struct omap_vdd_info' to | ||
| 11 | become the primary data structure. | ||
| 12 | |||
| 13 | - convert any functions taking a pointer to struct omap_vdd_info into | ||
| 14 | functions taking a struct voltagedomain pointer. | ||
| 15 | |||
| 16 | - convert the register & initialize of voltage domains to look like | ||
| 17 | that of powerdomains | ||
| 18 | |||
| 19 | - convert omap_voltage_domain_lookup() to voltdm_lookup(), modeled | ||
| 20 | after the current powerdomain and clockdomain lookup functions. | ||
| 21 | |||
| 22 | - omap_voltage_late_init(): only configure VDD info when | ||
| 23 | the vdd_info struct is non-NULL | ||
| 24 | |||
| 25 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 26 | --- | ||
| 27 | arch/arm/mach-omap2/io.c | 3 + | ||
| 28 | arch/arm/mach-omap2/omap_twl.c | 10 +- | ||
| 29 | arch/arm/mach-omap2/pm.c | 2 +- | ||
| 30 | arch/arm/mach-omap2/sr_device.c | 2 +- | ||
| 31 | arch/arm/mach-omap2/voltage.c | 257 ++++++++++++++----------- | ||
| 32 | arch/arm/mach-omap2/voltage.h | 27 ++-- | ||
| 33 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 34 ++-- | ||
| 34 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 44 ++-- | ||
| 35 | 8 files changed, 207 insertions(+), 172 deletions(-) | ||
| 36 | |||
| 37 | diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c | ||
| 38 | index 2ce1ce6..9f5a846 100644 | ||
| 39 | --- a/arch/arm/mach-omap2/io.c | ||
| 40 | +++ b/arch/arm/mach-omap2/io.c | ||
| 41 | @@ -38,6 +38,7 @@ | ||
| 42 | #include "io.h" | ||
| 43 | |||
| 44 | #include <plat/omap-pm.h> | ||
| 45 | +#include "voltage.h" | ||
| 46 | #include "powerdomain.h" | ||
| 47 | |||
| 48 | #include "clockdomain.h" | ||
| 49 | @@ -349,10 +350,12 @@ void __init omap2_init_common_infrastructure(void) | ||
| 50 | omap2xxx_clockdomains_init(); | ||
| 51 | omap2430_hwmod_init(); | ||
| 52 | } else if (cpu_is_omap34xx()) { | ||
| 53 | + omap3xxx_voltagedomains_init(); | ||
| 54 | omap3xxx_powerdomains_init(); | ||
| 55 | omap3xxx_clockdomains_init(); | ||
| 56 | omap3xxx_hwmod_init(); | ||
| 57 | } else if (cpu_is_omap44xx()) { | ||
| 58 | + omap44xx_voltagedomains_init(); | ||
| 59 | omap44xx_powerdomains_init(); | ||
| 60 | omap44xx_clockdomains_init(); | ||
| 61 | omap44xx_hwmod_init(); | ||
| 62 | diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c | ||
| 63 | index 07d6140..fcd2f62 100644 | ||
| 64 | --- a/arch/arm/mach-omap2/omap_twl.c | ||
| 65 | +++ b/arch/arm/mach-omap2/omap_twl.c | ||
| 66 | @@ -250,13 +250,13 @@ int __init omap4_twl_init(void) | ||
| 67 | if (!cpu_is_omap44xx()) | ||
| 68 | return -ENODEV; | ||
| 69 | |||
| 70 | - voltdm = omap_voltage_domain_lookup("mpu"); | ||
| 71 | + voltdm = voltdm_lookup("mpu"); | ||
| 72 | omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info); | ||
| 73 | |||
| 74 | - voltdm = omap_voltage_domain_lookup("iva"); | ||
| 75 | + voltdm = voltdm_lookup("iva"); | ||
| 76 | omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info); | ||
| 77 | |||
| 78 | - voltdm = omap_voltage_domain_lookup("core"); | ||
| 79 | + voltdm = voltdm_lookup("core"); | ||
| 80 | omap_voltage_register_pmic(voltdm, &omap4_core_volt_info); | ||
| 81 | |||
| 82 | return 0; | ||
| 83 | @@ -288,10 +288,10 @@ int __init omap3_twl_init(void) | ||
| 84 | if (!twl_sr_enable_autoinit) | ||
| 85 | omap3_twl_set_sr_bit(true); | ||
| 86 | |||
| 87 | - voltdm = omap_voltage_domain_lookup("mpu"); | ||
| 88 | + voltdm = voltdm_lookup("mpu"); | ||
| 89 | omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); | ||
| 90 | |||
| 91 | - voltdm = omap_voltage_domain_lookup("core"); | ||
| 92 | + voltdm = voltdm_lookup("core"); | ||
| 93 | omap_voltage_register_pmic(voltdm, &omap3_core_volt_info); | ||
| 94 | |||
| 95 | return 0; | ||
| 96 | diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c | ||
| 97 | index 3feb359..3bce29b 100644 | ||
| 98 | --- a/arch/arm/mach-omap2/pm.c | ||
| 99 | +++ b/arch/arm/mach-omap2/pm.c | ||
| 100 | @@ -183,7 +183,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, | ||
| 101 | goto exit; | ||
| 102 | } | ||
| 103 | |||
| 104 | - voltdm = omap_voltage_domain_lookup(vdd_name); | ||
| 105 | + voltdm = voltdm_lookup(vdd_name); | ||
| 106 | if (IS_ERR(voltdm)) { | ||
| 107 | printk(KERN_ERR "%s: Unable to get vdd pointer for vdd_%s\n", | ||
| 108 | __func__, vdd_name); | ||
| 109 | diff --git a/arch/arm/mach-omap2/sr_device.c b/arch/arm/mach-omap2/sr_device.c | ||
| 110 | index 10d3c5e..2782d3f 100644 | ||
| 111 | --- a/arch/arm/mach-omap2/sr_device.c | ||
| 112 | +++ b/arch/arm/mach-omap2/sr_device.c | ||
| 113 | @@ -102,7 +102,7 @@ static int sr_dev_init(struct omap_hwmod *oh, void *user) | ||
| 114 | sr_data->senn_mod = 0x1; | ||
| 115 | sr_data->senp_mod = 0x1; | ||
| 116 | |||
| 117 | - sr_data->voltdm = omap_voltage_domain_lookup(oh->vdd_name); | ||
| 118 | + sr_data->voltdm = voltdm_lookup(oh->vdd_name); | ||
| 119 | if (IS_ERR(sr_data->voltdm)) { | ||
| 120 | pr_err("%s: Unable to get voltage domain pointer for VDD %s\n", | ||
| 121 | __func__, oh->vdd_name); | ||
| 122 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 123 | index a366a6b..4f0361a 100644 | ||
| 124 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 125 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 126 | @@ -40,20 +40,13 @@ | ||
| 127 | #include "vc.h" | ||
| 128 | #include "vp.h" | ||
| 129 | |||
| 130 | -#define VOLTAGE_DIR_SIZE 16 | ||
| 131 | - | ||
| 132 | - | ||
| 133 | -static struct omap_vdd_info **vdd_info; | ||
| 134 | - | ||
| 135 | -/* | ||
| 136 | - * Number of scalable voltage domains. | ||
| 137 | - */ | ||
| 138 | -static int nr_scalable_vdd; | ||
| 139 | +static LIST_HEAD(voltdm_list); | ||
| 140 | |||
| 141 | +#define VOLTAGE_DIR_SIZE 16 | ||
| 142 | static struct dentry *voltage_dir; | ||
| 143 | |||
| 144 | /* Init function pointers */ | ||
| 145 | -static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 146 | +static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, | ||
| 147 | unsigned long target_volt); | ||
| 148 | |||
| 149 | static u32 omap3_voltage_read_reg(u16 mod, u8 offset) | ||
| 150 | @@ -77,11 +70,12 @@ static void omap4_voltage_write_reg(u32 val, u16 mod, u8 offset) | ||
| 151 | omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, mod, offset); | ||
| 152 | } | ||
| 153 | |||
| 154 | -static int __init _config_common_vdd_data(struct omap_vdd_info *vdd) | ||
| 155 | +static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 156 | { | ||
| 157 | char *sys_ck_name; | ||
| 158 | struct clk *sys_ck; | ||
| 159 | u32 sys_clk_speed, timeout_val, waittime; | ||
| 160 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 161 | |||
| 162 | /* | ||
| 163 | * XXX Clockfw should handle this, or this should be in a | ||
| 164 | @@ -101,7 +95,7 @@ static int __init _config_common_vdd_data(struct omap_vdd_info *vdd) | ||
| 165 | sys_ck = clk_get(NULL, sys_ck_name); | ||
| 166 | if (IS_ERR(sys_ck)) { | ||
| 167 | pr_warning("%s: Could not get the sys clk to calculate" | ||
| 168 | - "various vdd_%s params\n", __func__, vdd->voltdm.name); | ||
| 169 | + "various vdd_%s params\n", __func__, voltdm->name); | ||
| 170 | return -EINVAL; | ||
| 171 | } | ||
| 172 | sys_clk_speed = clk_get_rate(sys_ck); | ||
| 173 | @@ -135,7 +129,8 @@ static int __init _config_common_vdd_data(struct omap_vdd_info *vdd) | ||
| 174 | /* Voltage debugfs support */ | ||
| 175 | static int vp_volt_debug_get(void *data, u64 *val) | ||
| 176 | { | ||
| 177 | - struct omap_vdd_info *vdd = (struct omap_vdd_info *) data; | ||
| 178 | + struct voltagedomain *voltdm = (struct voltagedomain *)data; | ||
| 179 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 180 | u8 vsel; | ||
| 181 | |||
| 182 | if (!vdd) { | ||
| 183 | @@ -157,14 +152,14 @@ static int vp_volt_debug_get(void *data, u64 *val) | ||
| 184 | |||
| 185 | static int nom_volt_debug_get(void *data, u64 *val) | ||
| 186 | { | ||
| 187 | - struct omap_vdd_info *vdd = (struct omap_vdd_info *) data; | ||
| 188 | + struct voltagedomain *voltdm = (struct voltagedomain *)data; | ||
| 189 | |||
| 190 | - if (!vdd) { | ||
| 191 | + if (!voltdm) { | ||
| 192 | pr_warning("Wrong paramater passed\n"); | ||
| 193 | return -EINVAL; | ||
| 194 | } | ||
| 195 | |||
| 196 | - *val = omap_voltage_get_nom_volt(&vdd->voltdm); | ||
| 197 | + *val = omap_voltage_get_nom_volt(voltdm); | ||
| 198 | |||
| 199 | return 0; | ||
| 200 | } | ||
| 201 | @@ -172,16 +167,17 @@ static int nom_volt_debug_get(void *data, u64 *val) | ||
| 202 | DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); | ||
| 203 | DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL, | ||
| 204 | "%llu\n"); | ||
| 205 | -static void vp_latch_vsel(struct omap_vdd_info *vdd) | ||
| 206 | +static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 207 | { | ||
| 208 | u32 vpconfig; | ||
| 209 | unsigned long uvdc; | ||
| 210 | char vsel; | ||
| 211 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 212 | |||
| 213 | - uvdc = omap_voltage_get_nom_volt(&vdd->voltdm); | ||
| 214 | + uvdc = omap_voltage_get_nom_volt(voltdm); | ||
| 215 | if (!uvdc) { | ||
| 216 | pr_warning("%s: unable to find current voltage for vdd_%s\n", | ||
| 217 | - __func__, vdd->voltdm.name); | ||
| 218 | + __func__, voltdm->name); | ||
| 219 | return; | ||
| 220 | } | ||
| 221 | |||
| 222 | @@ -209,13 +205,14 @@ static void vp_latch_vsel(struct omap_vdd_info *vdd) | ||
| 223 | } | ||
| 224 | |||
| 225 | /* Generic voltage init functions */ | ||
| 226 | -static void __init vp_init(struct omap_vdd_info *vdd) | ||
| 227 | +static void __init vp_init(struct voltagedomain *voltdm) | ||
| 228 | { | ||
| 229 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 230 | u32 vp_val; | ||
| 231 | |||
| 232 | if (!vdd->read_reg || !vdd->write_reg) { | ||
| 233 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 234 | - __func__, vdd->voltdm.name); | ||
| 235 | + __func__, voltdm->name); | ||
| 236 | return; | ||
| 237 | } | ||
| 238 | |||
| 239 | @@ -246,25 +243,26 @@ static void __init vp_init(struct omap_vdd_info *vdd) | ||
| 240 | vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vlimitto); | ||
| 241 | } | ||
| 242 | |||
| 243 | -static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) | ||
| 244 | +static void __init vdd_debugfs_init(struct voltagedomain *voltdm) | ||
| 245 | { | ||
| 246 | char *name; | ||
| 247 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 248 | |||
| 249 | name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL); | ||
| 250 | if (!name) { | ||
| 251 | pr_warning("%s: Unable to allocate memory for debugfs" | ||
| 252 | " directory name for vdd_%s", | ||
| 253 | - __func__, vdd->voltdm.name); | ||
| 254 | + __func__, voltdm->name); | ||
| 255 | return; | ||
| 256 | } | ||
| 257 | strcpy(name, "vdd_"); | ||
| 258 | - strcat(name, vdd->voltdm.name); | ||
| 259 | + strcat(name, voltdm->name); | ||
| 260 | |||
| 261 | vdd->debug_dir = debugfs_create_dir(name, voltage_dir); | ||
| 262 | kfree(name); | ||
| 263 | if (IS_ERR(vdd->debug_dir)) { | ||
| 264 | pr_warning("%s: Unable to create debugfs directory for" | ||
| 265 | - " vdd_%s\n", __func__, vdd->voltdm.name); | ||
| 266 | + " vdd_%s\n", __func__, voltdm->name); | ||
| 267 | vdd->debug_dir = NULL; | ||
| 268 | return; | ||
| 269 | } | ||
| 270 | @@ -288,16 +286,17 @@ static void __init vdd_debugfs_init(struct omap_vdd_info *vdd) | ||
| 271 | (void) debugfs_create_x16("vp_timeout", S_IRUGO, vdd->debug_dir, | ||
| 272 | &(vdd->vp_rt_data.vlimitto_timeout)); | ||
| 273 | (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd->debug_dir, | ||
| 274 | - (void *) vdd, &vp_volt_debug_fops); | ||
| 275 | + (void *) voltdm, &vp_volt_debug_fops); | ||
| 276 | (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, | ||
| 277 | - vdd->debug_dir, (void *) vdd, | ||
| 278 | + vdd->debug_dir, (void *) voltdm, | ||
| 279 | &nom_volt_debug_fops); | ||
| 280 | } | ||
| 281 | |||
| 282 | /* Voltage scale and accessory APIs */ | ||
| 283 | -static int _pre_volt_scale(struct omap_vdd_info *vdd, | ||
| 284 | +static int _pre_volt_scale(struct voltagedomain *voltdm, | ||
| 285 | unsigned long target_volt, u8 *target_vsel, u8 *current_vsel) | ||
| 286 | { | ||
| 287 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 288 | struct omap_volt_data *volt_data; | ||
| 289 | const struct omap_vc_common_data *vc_common; | ||
| 290 | const struct omap_vp_common_data *vp_common; | ||
| 291 | @@ -309,25 +308,25 @@ static int _pre_volt_scale(struct omap_vdd_info *vdd, | ||
| 292 | /* Check if suffiecient pmic info is available for this vdd */ | ||
| 293 | if (!vdd->pmic_info) { | ||
| 294 | pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", | ||
| 295 | - __func__, vdd->voltdm.name); | ||
| 296 | + __func__, voltdm->name); | ||
| 297 | return -EINVAL; | ||
| 298 | } | ||
| 299 | |||
| 300 | if (!vdd->pmic_info->uv_to_vsel) { | ||
| 301 | pr_err("%s: PMIC function to convert voltage in uV to" | ||
| 302 | "vsel not registered. Hence unable to scale voltage" | ||
| 303 | - "for vdd_%s\n", __func__, vdd->voltdm.name); | ||
| 304 | + "for vdd_%s\n", __func__, voltdm->name); | ||
| 305 | return -ENODATA; | ||
| 306 | } | ||
| 307 | |||
| 308 | if (!vdd->read_reg || !vdd->write_reg) { | ||
| 309 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 310 | - __func__, vdd->voltdm.name); | ||
| 311 | + __func__, voltdm->name); | ||
| 312 | return -EINVAL; | ||
| 313 | } | ||
| 314 | |||
| 315 | /* Get volt_data corresponding to target_volt */ | ||
| 316 | - volt_data = omap_voltage_get_voltdata(&vdd->voltdm, target_volt); | ||
| 317 | + volt_data = omap_voltage_get_voltdata(voltdm, target_volt); | ||
| 318 | if (IS_ERR(volt_data)) | ||
| 319 | volt_data = NULL; | ||
| 320 | |||
| 321 | @@ -355,9 +354,10 @@ static int _pre_volt_scale(struct omap_vdd_info *vdd, | ||
| 322 | return 0; | ||
| 323 | } | ||
| 324 | |||
| 325 | -static void _post_volt_scale(struct omap_vdd_info *vdd, | ||
| 326 | +static void _post_volt_scale(struct voltagedomain *voltdm, | ||
| 327 | unsigned long target_volt, u8 target_vsel, u8 current_vsel) | ||
| 328 | { | ||
| 329 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 330 | u32 smps_steps = 0, smps_delay = 0; | ||
| 331 | |||
| 332 | smps_steps = abs(target_vsel - current_vsel); | ||
| 333 | @@ -370,15 +370,16 @@ static void _post_volt_scale(struct omap_vdd_info *vdd, | ||
| 334 | } | ||
| 335 | |||
| 336 | /* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ | ||
| 337 | -static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, | ||
| 338 | +static int vc_bypass_scale_voltage(struct voltagedomain *voltdm, | ||
| 339 | unsigned long target_volt) | ||
| 340 | { | ||
| 341 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 342 | u32 loop_cnt = 0, retries_cnt = 0; | ||
| 343 | u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; | ||
| 344 | u8 target_vsel, current_vsel; | ||
| 345 | int ret; | ||
| 346 | |||
| 347 | - ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); | ||
| 348 | + ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); | ||
| 349 | if (ret) | ||
| 350 | return ret; | ||
| 351 | |||
| 352 | @@ -417,19 +418,20 @@ static int vc_bypass_scale_voltage(struct omap_vdd_info *vdd, | ||
| 353 | vc_bypass_val_reg); | ||
| 354 | } | ||
| 355 | |||
| 356 | - _post_volt_scale(vdd, target_volt, target_vsel, current_vsel); | ||
| 357 | + _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); | ||
| 358 | return 0; | ||
| 359 | } | ||
| 360 | |||
| 361 | /* VP force update method of voltage scaling */ | ||
| 362 | -static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 363 | +static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, | ||
| 364 | unsigned long target_volt) | ||
| 365 | { | ||
| 366 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 367 | u32 vpconfig; | ||
| 368 | u8 target_vsel, current_vsel; | ||
| 369 | int ret, timeout = 0; | ||
| 370 | |||
| 371 | - ret = _pre_volt_scale(vdd, target_volt, &target_vsel, ¤t_vsel); | ||
| 372 | + ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); | ||
| 373 | if (ret) | ||
| 374 | return ret; | ||
| 375 | |||
| 376 | @@ -447,7 +449,7 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 377 | } | ||
| 378 | if (timeout >= VP_TRANXDONE_TIMEOUT) { | ||
| 379 | pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." | ||
| 380 | - "Voltage change aborted", __func__, vdd->voltdm.name); | ||
| 381 | + "Voltage change aborted", __func__, voltdm->name); | ||
| 382 | return -ETIMEDOUT; | ||
| 383 | } | ||
| 384 | |||
| 385 | @@ -480,9 +482,9 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 386 | if (timeout >= VP_TRANXDONE_TIMEOUT) | ||
| 387 | pr_err("%s: vdd_%s TRANXDONE timeout exceeded." | ||
| 388 | "TRANXDONE never got set after the voltage update\n", | ||
| 389 | - __func__, vdd->voltdm.name); | ||
| 390 | + __func__, voltdm->name); | ||
| 391 | |||
| 392 | - _post_volt_scale(vdd, target_volt, target_vsel, current_vsel); | ||
| 393 | + _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); | ||
| 394 | |||
| 395 | /* | ||
| 396 | * Disable TransactionDone interrupt , clear all status, clear | ||
| 397 | @@ -501,7 +503,7 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 398 | if (timeout >= VP_TRANXDONE_TIMEOUT) | ||
| 399 | pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying" | ||
| 400 | "to clear the TRANXDONE status\n", | ||
| 401 | - __func__, vdd->voltdm.name); | ||
| 402 | + __func__, voltdm->name); | ||
| 403 | |||
| 404 | vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 405 | /* Clear initVDD copy trigger bit */ | ||
| 406 | @@ -514,8 +516,10 @@ static int vp_forceupdate_scale_voltage(struct omap_vdd_info *vdd, | ||
| 407 | return 0; | ||
| 408 | } | ||
| 409 | |||
| 410 | -static void __init omap3_vfsm_init(struct omap_vdd_info *vdd) | ||
| 411 | +static void __init omap3_vfsm_init(struct voltagedomain *voltdm) | ||
| 412 | { | ||
| 413 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 414 | + | ||
| 415 | /* | ||
| 416 | * Voltage Manager FSM parameters init | ||
| 417 | * XXX This data should be passed in from the board file | ||
| 418 | @@ -527,8 +531,9 @@ static void __init omap3_vfsm_init(struct omap_vdd_info *vdd) | ||
| 419 | OMAP3_PRM_VOLTSETUP2_OFFSET); | ||
| 420 | } | ||
| 421 | |||
| 422 | -static void __init omap3_vc_init(struct omap_vdd_info *vdd) | ||
| 423 | +static void __init omap3_vc_init(struct voltagedomain *voltdm) | ||
| 424 | { | ||
| 425 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 426 | static bool is_initialized; | ||
| 427 | u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; | ||
| 428 | u32 vc_val; | ||
| 429 | @@ -556,15 +561,16 @@ static void __init omap3_vc_init(struct omap_vdd_info *vdd) | ||
| 430 | vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod, | ||
| 431 | OMAP3_PRM_VC_I2C_CFG_OFFSET); | ||
| 432 | |||
| 433 | - omap3_vfsm_init(vdd); | ||
| 434 | + omap3_vfsm_init(voltdm); | ||
| 435 | |||
| 436 | is_initialized = true; | ||
| 437 | } | ||
| 438 | |||
| 439 | |||
| 440 | /* OMAP4 specific voltage init functions */ | ||
| 441 | -static void __init omap4_vc_init(struct omap_vdd_info *vdd) | ||
| 442 | +static void __init omap4_vc_init(struct voltagedomain *voltdm) | ||
| 443 | { | ||
| 444 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 445 | static bool is_initialized; | ||
| 446 | u32 vc_val; | ||
| 447 | |||
| 448 | @@ -589,20 +595,21 @@ static void __init omap4_vc_init(struct omap_vdd_info *vdd) | ||
| 449 | is_initialized = true; | ||
| 450 | } | ||
| 451 | |||
| 452 | -static void __init omap_vc_init(struct omap_vdd_info *vdd) | ||
| 453 | +static void __init omap_vc_init(struct voltagedomain *voltdm) | ||
| 454 | { | ||
| 455 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 456 | u32 vc_val; | ||
| 457 | |||
| 458 | if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { | ||
| 459 | pr_err("%s: PMIC info requried to configure vc for" | ||
| 460 | "vdd_%s not populated.Hence cannot initialize vc\n", | ||
| 461 | - __func__, vdd->voltdm.name); | ||
| 462 | + __func__, voltdm->name); | ||
| 463 | return; | ||
| 464 | } | ||
| 465 | |||
| 466 | if (!vdd->read_reg || !vdd->write_reg) { | ||
| 467 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 468 | - __func__, vdd->voltdm.name); | ||
| 469 | + __func__, voltdm->name); | ||
| 470 | return; | ||
| 471 | } | ||
| 472 | |||
| 473 | @@ -630,23 +637,24 @@ static void __init omap_vc_init(struct omap_vdd_info *vdd) | ||
| 474 | vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 475 | |||
| 476 | if (cpu_is_omap34xx()) | ||
| 477 | - omap3_vc_init(vdd); | ||
| 478 | + omap3_vc_init(voltdm); | ||
| 479 | else if (cpu_is_omap44xx()) | ||
| 480 | - omap4_vc_init(vdd); | ||
| 481 | + omap4_vc_init(voltdm); | ||
| 482 | } | ||
| 483 | |||
| 484 | -static int __init omap_vdd_data_configure(struct omap_vdd_info *vdd) | ||
| 485 | +static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) | ||
| 486 | { | ||
| 487 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 488 | int ret = -EINVAL; | ||
| 489 | |||
| 490 | if (!vdd->pmic_info) { | ||
| 491 | pr_err("%s: PMIC info requried to configure vdd_%s not" | ||
| 492 | "populated.Hence cannot initialize vdd_%s\n", | ||
| 493 | - __func__, vdd->voltdm.name, vdd->voltdm.name); | ||
| 494 | + __func__, voltdm->name, voltdm->name); | ||
| 495 | goto ovdc_out; | ||
| 496 | } | ||
| 497 | |||
| 498 | - if (IS_ERR_VALUE(_config_common_vdd_data(vdd))) | ||
| 499 | + if (IS_ERR_VALUE(_config_common_vdd_data(voltdm))) | ||
| 500 | goto ovdc_out; | ||
| 501 | |||
| 502 | if (cpu_is_omap34xx()) { | ||
| 503 | @@ -680,7 +688,7 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) | ||
| 504 | return 0; | ||
| 505 | } | ||
| 506 | |||
| 507 | - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); | ||
| 508 | + vdd = voltdm->vdd; | ||
| 509 | |||
| 510 | return vdd->curr_volt; | ||
| 511 | } | ||
| 512 | @@ -701,7 +709,7 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) | ||
| 513 | return 0; | ||
| 514 | } | ||
| 515 | |||
| 516 | - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); | ||
| 517 | + vdd = voltdm->vdd; | ||
| 518 | if (!vdd->read_reg) { | ||
| 519 | pr_err("%s: No read API for reading vdd_%s regs\n", | ||
| 520 | __func__, voltdm->name); | ||
| 521 | @@ -736,7 +744,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 522 | return; | ||
| 523 | } | ||
| 524 | |||
| 525 | - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); | ||
| 526 | + vdd = voltdm->vdd; | ||
| 527 | if (!vdd->read_reg || !vdd->write_reg) { | ||
| 528 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 529 | __func__, voltdm->name); | ||
| 530 | @@ -747,7 +755,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 531 | if (vdd->vp_enabled) | ||
| 532 | return; | ||
| 533 | |||
| 534 | - vp_latch_vsel(vdd); | ||
| 535 | + vp_latch_vsel(voltdm); | ||
| 536 | |||
| 537 | /* Enable VP */ | ||
| 538 | vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 539 | @@ -774,7 +782,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 540 | return; | ||
| 541 | } | ||
| 542 | |||
| 543 | - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); | ||
| 544 | + vdd = voltdm->vdd; | ||
| 545 | if (!vdd->read_reg || !vdd->write_reg) { | ||
| 546 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 547 | __func__, voltdm->name); | ||
| 548 | @@ -827,7 +835,7 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm, | ||
| 549 | return -EINVAL; | ||
| 550 | } | ||
| 551 | |||
| 552 | - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); | ||
| 553 | + vdd = voltdm->vdd; | ||
| 554 | |||
| 555 | if (!vdd->volt_scale) { | ||
| 556 | pr_err("%s: No voltage scale API registered for vdd_%s\n", | ||
| 557 | @@ -835,7 +843,7 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm, | ||
| 558 | return -ENODATA; | ||
| 559 | } | ||
| 560 | |||
| 561 | - return vdd->volt_scale(vdd, target_volt); | ||
| 562 | + return vdd->volt_scale(voltdm, target_volt); | ||
| 563 | } | ||
| 564 | |||
| 565 | /** | ||
| 566 | @@ -888,7 +896,7 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, | ||
| 567 | return; | ||
| 568 | } | ||
| 569 | |||
| 570 | - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); | ||
| 571 | + vdd = voltdm->vdd; | ||
| 572 | |||
| 573 | *volt_data = vdd->volt_data; | ||
| 574 | } | ||
| 575 | @@ -919,7 +927,7 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | ||
| 576 | return ERR_PTR(-EINVAL); | ||
| 577 | } | ||
| 578 | |||
| 579 | - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); | ||
| 580 | + vdd = voltdm->vdd; | ||
| 581 | |||
| 582 | if (!vdd->volt_data) { | ||
| 583 | pr_warning("%s: voltage table does not exist for vdd_%s\n", | ||
| 584 | @@ -957,7 +965,7 @@ int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
| 585 | return -EINVAL; | ||
| 586 | } | ||
| 587 | |||
| 588 | - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); | ||
| 589 | + vdd = voltdm->vdd; | ||
| 590 | |||
| 591 | vdd->pmic_info = pmic_info; | ||
| 592 | |||
| 593 | @@ -984,7 +992,7 @@ struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm) | ||
| 594 | return NULL; | ||
| 595 | } | ||
| 596 | |||
| 597 | - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); | ||
| 598 | + vdd = voltdm->vdd; | ||
| 599 | |||
| 600 | return vdd->debug_dir; | ||
| 601 | } | ||
| 602 | @@ -1009,7 +1017,7 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, | ||
| 603 | return; | ||
| 604 | } | ||
| 605 | |||
| 606 | - vdd = container_of(voltdm, struct omap_vdd_info, voltdm); | ||
| 607 | + vdd = voltdm->vdd; | ||
| 608 | |||
| 609 | switch (voltscale_method) { | ||
| 610 | case VOLTSCALE_VPFORCEUPDATE: | ||
| 611 | @@ -1025,38 +1033,6 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, | ||
| 612 | } | ||
| 613 | |||
| 614 | /** | ||
| 615 | - * omap_voltage_domain_lookup() - API to get the voltage domain pointer | ||
| 616 | - * @name: Name of the voltage domain | ||
| 617 | - * | ||
| 618 | - * This API looks up in the global vdd_info struct for the | ||
| 619 | - * existence of voltage domain <name>. If it exists, the API returns | ||
| 620 | - * a pointer to the voltage domain structure corresponding to the | ||
| 621 | - * VDD<name>. Else retuns error pointer. | ||
| 622 | - */ | ||
| 623 | -struct voltagedomain *omap_voltage_domain_lookup(char *name) | ||
| 624 | -{ | ||
| 625 | - int i; | ||
| 626 | - | ||
| 627 | - if (!vdd_info) { | ||
| 628 | - pr_err("%s: Voltage driver init not yet happened.Faulting!\n", | ||
| 629 | - __func__); | ||
| 630 | - return ERR_PTR(-EINVAL); | ||
| 631 | - } | ||
| 632 | - | ||
| 633 | - if (!name) { | ||
| 634 | - pr_err("%s: No name to get the votage domain!\n", __func__); | ||
| 635 | - return ERR_PTR(-EINVAL); | ||
| 636 | - } | ||
| 637 | - | ||
| 638 | - for (i = 0; i < nr_scalable_vdd; i++) { | ||
| 639 | - if (!(strcmp(name, vdd_info[i]->voltdm.name))) | ||
| 640 | - return &vdd_info[i]->voltdm; | ||
| 641 | - } | ||
| 642 | - | ||
| 643 | - return ERR_PTR(-EINVAL); | ||
| 644 | -} | ||
| 645 | - | ||
| 646 | -/** | ||
| 647 | * omap_voltage_late_init() - Init the various voltage parameters | ||
| 648 | * | ||
| 649 | * This API is to be called in the later stages of the | ||
| 650 | @@ -1065,9 +1041,9 @@ struct voltagedomain *omap_voltage_domain_lookup(char *name) | ||
| 651 | */ | ||
| 652 | int __init omap_voltage_late_init(void) | ||
| 653 | { | ||
| 654 | - int i; | ||
| 655 | + struct voltagedomain *voltdm; | ||
| 656 | |||
| 657 | - if (!vdd_info) { | ||
| 658 | + if (list_empty(&voltdm_list)) { | ||
| 659 | pr_err("%s: Voltage driver support not added\n", | ||
| 660 | __func__); | ||
| 661 | return -EINVAL; | ||
| 662 | @@ -1077,22 +1053,81 @@ int __init omap_voltage_late_init(void) | ||
| 663 | if (IS_ERR(voltage_dir)) | ||
| 664 | pr_err("%s: Unable to create voltage debugfs main dir\n", | ||
| 665 | __func__); | ||
| 666 | - for (i = 0; i < nr_scalable_vdd; i++) { | ||
| 667 | - if (omap_vdd_data_configure(vdd_info[i])) | ||
| 668 | - continue; | ||
| 669 | - omap_vc_init(vdd_info[i]); | ||
| 670 | - vp_init(vdd_info[i]); | ||
| 671 | - vdd_debugfs_init(vdd_info[i]); | ||
| 672 | + list_for_each_entry(voltdm, &voltdm_list, node) { | ||
| 673 | + if (voltdm->vdd) { | ||
| 674 | + if (omap_vdd_data_configure(voltdm)) | ||
| 675 | + continue; | ||
| 676 | + omap_vc_init(voltdm); | ||
| 677 | + vp_init(voltdm); | ||
| 678 | + vdd_debugfs_init(voltdm); | ||
| 679 | + } | ||
| 680 | } | ||
| 681 | |||
| 682 | return 0; | ||
| 683 | } | ||
| 684 | |||
| 685 | -/* XXX document */ | ||
| 686 | -int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[], | ||
| 687 | - u8 omap_vdd_count) | ||
| 688 | +static struct voltagedomain *_voltdm_lookup(const char *name) | ||
| 689 | { | ||
| 690 | - vdd_info = omap_vdd_array; | ||
| 691 | - nr_scalable_vdd = omap_vdd_count; | ||
| 692 | + struct voltagedomain *voltdm, *temp_voltdm; | ||
| 693 | + | ||
| 694 | + voltdm = NULL; | ||
| 695 | + | ||
| 696 | + list_for_each_entry(temp_voltdm, &voltdm_list, node) { | ||
| 697 | + if (!strcmp(name, temp_voltdm->name)) { | ||
| 698 | + voltdm = temp_voltdm; | ||
| 699 | + break; | ||
| 700 | + } | ||
| 701 | + } | ||
| 702 | + | ||
| 703 | + return voltdm; | ||
| 704 | +} | ||
| 705 | + | ||
| 706 | +static int _voltdm_register(struct voltagedomain *voltdm) | ||
| 707 | +{ | ||
| 708 | + if (!voltdm || !voltdm->name) | ||
| 709 | + return -EINVAL; | ||
| 710 | + | ||
| 711 | + list_add(&voltdm->node, &voltdm_list); | ||
| 712 | + | ||
| 713 | + pr_debug("voltagedomain: registered %s\n", voltdm->name); | ||
| 714 | + | ||
| 715 | return 0; | ||
| 716 | } | ||
| 717 | + | ||
| 718 | +/** | ||
| 719 | + * voltdm_lookup - look up a voltagedomain by name, return a pointer | ||
| 720 | + * @name: name of voltagedomain | ||
| 721 | + * | ||
| 722 | + * Find a registered voltagedomain by its name @name. Returns a pointer | ||
| 723 | + * to the struct voltagedomain if found, or NULL otherwise. | ||
| 724 | + */ | ||
| 725 | +struct voltagedomain *voltdm_lookup(const char *name) | ||
| 726 | +{ | ||
| 727 | + struct voltagedomain *voltdm ; | ||
| 728 | + | ||
| 729 | + if (!name) | ||
| 730 | + return NULL; | ||
| 731 | + | ||
| 732 | + voltdm = _voltdm_lookup(name); | ||
| 733 | + | ||
| 734 | + return voltdm; | ||
| 735 | +} | ||
| 736 | + | ||
| 737 | +/** | ||
| 738 | + * voltdm_init - set up the voltagedomain layer | ||
| 739 | + * @voltdm_list: array of struct voltagedomain pointers to register | ||
| 740 | + * | ||
| 741 | + * Loop through the array of voltagedomains @voltdm_list, registering all | ||
| 742 | + * that are available on the current CPU. If voltdm_list is supplied | ||
| 743 | + * and not null, all of the referenced voltagedomains will be | ||
| 744 | + * registered. No return value. | ||
| 745 | + */ | ||
| 746 | +void voltdm_init(struct voltagedomain **voltdms) | ||
| 747 | +{ | ||
| 748 | + struct voltagedomain **v; | ||
| 749 | + | ||
| 750 | + if (voltdms) { | ||
| 751 | + for (v = voltdms; *v; v++) | ||
| 752 | + _voltdm_register(*v); | ||
| 753 | + } | ||
| 754 | +} | ||
| 755 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 756 | index db23d49..5440298 100644 | ||
| 757 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 758 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 759 | @@ -31,6 +31,8 @@ | ||
| 760 | #define OMAP3_VOLTOFFSET 0xff | ||
| 761 | #define OMAP3_VOLTSETUP2 0xff | ||
| 762 | |||
| 763 | +struct omap_vdd_info; | ||
| 764 | + | ||
| 765 | /** | ||
| 766 | * struct omap_vfsm_instance_data - per-voltage manager FSM register/bitfield | ||
| 767 | * data | ||
| 768 | @@ -50,11 +52,14 @@ struct omap_vfsm_instance_data { | ||
| 769 | |||
| 770 | /** | ||
| 771 | * struct voltagedomain - omap voltage domain global structure. | ||
| 772 | - * @name: Name of the voltage domain which can be used as a unique | ||
| 773 | - * identifier. | ||
| 774 | + * @name: Name of the voltage domain which can be used as a unique identifier. | ||
| 775 | + * @node: list_head linking all voltage domains | ||
| 776 | + * @vdd: to be removed | ||
| 777 | */ | ||
| 778 | struct voltagedomain { | ||
| 779 | char *name; | ||
| 780 | + struct list_head node; | ||
| 781 | + struct omap_vdd_info *vdd; | ||
| 782 | }; | ||
| 783 | |||
| 784 | /** | ||
| 785 | @@ -116,7 +121,6 @@ struct omap_volt_pmic_info { | ||
| 786 | * @vc_data : structure containing various various vc registers, | ||
| 787 | * shifts, masks etc. | ||
| 788 | * @vfsm : voltage manager FSM data | ||
| 789 | - * @voltdm : pointer to the voltage domain structure | ||
| 790 | * @debug_dir : debug directory for this voltage domain. | ||
| 791 | * @curr_volt : current voltage for this vdd. | ||
| 792 | * @prm_irqst_mod : PRM module id used for PRM IRQ status register access | ||
| 793 | @@ -130,7 +134,6 @@ struct omap_vdd_info { | ||
| 794 | struct omap_vp_runtime_data vp_rt_data; | ||
| 795 | struct omap_vc_instance_data *vc_data; | ||
| 796 | const struct omap_vfsm_instance_data *vfsm; | ||
| 797 | - struct voltagedomain voltdm; | ||
| 798 | struct dentry *debug_dir; | ||
| 799 | u32 curr_volt; | ||
| 800 | bool vp_enabled; | ||
| 801 | @@ -139,7 +142,7 @@ struct omap_vdd_info { | ||
| 802 | u8 prm_irqst_reg; | ||
| 803 | u32 (*read_reg) (u16 mod, u8 offset); | ||
| 804 | void (*write_reg) (u32 val, u16 mod, u8 offset); | ||
| 805 | - int (*volt_scale) (struct omap_vdd_info *vdd, | ||
| 806 | + int (*volt_scale) (struct voltagedomain *voltdm, | ||
| 807 | unsigned long target_volt); | ||
| 808 | }; | ||
| 809 | |||
| 810 | @@ -155,16 +158,11 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | ||
| 811 | unsigned long volt); | ||
| 812 | unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); | ||
| 813 | struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); | ||
| 814 | -int __init omap_voltage_early_init(struct omap_vdd_info *omap_vdd_array[], | ||
| 815 | - u8 omap_vdd_count); | ||
| 816 | #ifdef CONFIG_PM | ||
| 817 | int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
| 818 | struct omap_volt_pmic_info *pmic_info); | ||
| 819 | void omap_change_voltscale_method(struct voltagedomain *voltdm, | ||
| 820 | int voltscale_method); | ||
| 821 | -/* API to get the voltagedomain pointer */ | ||
| 822 | -struct voltagedomain *omap_voltage_domain_lookup(char *name); | ||
| 823 | - | ||
| 824 | int omap_voltage_late_init(void); | ||
| 825 | #else | ||
| 826 | static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
| 827 | @@ -178,10 +176,11 @@ static inline int omap_voltage_late_init(void) | ||
| 828 | { | ||
| 829 | return -EINVAL; | ||
| 830 | } | ||
| 831 | -static inline struct voltagedomain *omap_voltage_domain_lookup(char *name) | ||
| 832 | -{ | ||
| 833 | - return ERR_PTR(-EINVAL); | ||
| 834 | -} | ||
| 835 | #endif | ||
| 836 | |||
| 837 | +extern void omap3xxx_voltagedomains_init(void); | ||
| 838 | +extern void omap44xx_voltagedomains_init(void); | ||
| 839 | + | ||
| 840 | +struct voltagedomain *voltdm_lookup(const char *name); | ||
| 841 | +void voltdm_init(struct voltagedomain **voltdm_list); | ||
| 842 | #endif | ||
| 843 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 844 | index f831f9a..4bee412 100644 | ||
| 845 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 846 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 847 | @@ -43,9 +43,6 @@ static struct omap_vdd_info omap3_vdd1_info = { | ||
| 848 | .vp_data = &omap3_vp1_data, | ||
| 849 | .vc_data = &omap3_vc1_data, | ||
| 850 | .vfsm = &omap3_vdd1_vfsm_data, | ||
| 851 | - .voltdm = { | ||
| 852 | - .name = "mpu", | ||
| 853 | - }, | ||
| 854 | }; | ||
| 855 | |||
| 856 | static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { | ||
| 857 | @@ -60,23 +57,26 @@ static struct omap_vdd_info omap3_vdd2_info = { | ||
| 858 | .vp_data = &omap3_vp2_data, | ||
| 859 | .vc_data = &omap3_vc2_data, | ||
| 860 | .vfsm = &omap3_vdd2_vfsm_data, | ||
| 861 | - .voltdm = { | ||
| 862 | - .name = "core", | ||
| 863 | - }, | ||
| 864 | }; | ||
| 865 | |||
| 866 | -/* OMAP3 VDD structures */ | ||
| 867 | -static struct omap_vdd_info *omap3_vdd_info[] = { | ||
| 868 | - &omap3_vdd1_info, | ||
| 869 | - &omap3_vdd2_info, | ||
| 870 | +static struct voltagedomain omap3_voltdm_mpu = { | ||
| 871 | + .name = "mpu", | ||
| 872 | + .vdd = &omap3_vdd1_info, | ||
| 873 | }; | ||
| 874 | |||
| 875 | -/* OMAP3 specific voltage init functions */ | ||
| 876 | -static int __init omap3xxx_voltage_early_init(void) | ||
| 877 | -{ | ||
| 878 | - if (!cpu_is_omap34xx()) | ||
| 879 | - return 0; | ||
| 880 | +static struct voltagedomain omap3_voltdm_core = { | ||
| 881 | + .name = "core", | ||
| 882 | + .vdd = &omap3_vdd2_info, | ||
| 883 | +}; | ||
| 884 | |||
| 885 | +static struct voltagedomain *voltagedomains_omap3[] __initdata = { | ||
| 886 | + &omap3_voltdm_mpu, | ||
| 887 | + &omap3_voltdm_core, | ||
| 888 | + NULL, | ||
| 889 | +}; | ||
| 890 | + | ||
| 891 | +void __init omap3xxx_voltagedomains_init(void) | ||
| 892 | +{ | ||
| 893 | /* | ||
| 894 | * XXX Will depend on the process, validation, and binning | ||
| 895 | * for the currently-running IC | ||
| 896 | @@ -89,7 +89,5 @@ static int __init omap3xxx_voltage_early_init(void) | ||
| 897 | omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; | ||
| 898 | } | ||
| 899 | |||
| 900 | - return omap_voltage_early_init(omap3_vdd_info, | ||
| 901 | - ARRAY_SIZE(omap3_vdd_info)); | ||
| 902 | + voltdm_init(voltagedomains_omap3); | ||
| 903 | }; | ||
| 904 | -core_initcall(omap3xxx_voltage_early_init); | ||
| 905 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 906 | index 64dc265..245fdf9 100644 | ||
| 907 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 908 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 909 | @@ -42,9 +42,6 @@ static struct omap_vdd_info omap4_vdd_mpu_info = { | ||
| 910 | .vp_data = &omap4_vp_mpu_data, | ||
| 911 | .vc_data = &omap4_vc_mpu_data, | ||
| 912 | .vfsm = &omap4_vdd_mpu_vfsm_data, | ||
| 913 | - .voltdm = { | ||
| 914 | - .name = "mpu", | ||
| 915 | - }, | ||
| 916 | }; | ||
| 917 | |||
| 918 | static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { | ||
| 919 | @@ -57,9 +54,6 @@ static struct omap_vdd_info omap4_vdd_iva_info = { | ||
| 920 | .vp_data = &omap4_vp_iva_data, | ||
| 921 | .vc_data = &omap4_vc_iva_data, | ||
| 922 | .vfsm = &omap4_vdd_iva_vfsm_data, | ||
| 923 | - .voltdm = { | ||
| 924 | - .name = "iva", | ||
| 925 | - }, | ||
| 926 | }; | ||
| 927 | |||
| 928 | static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { | ||
| 929 | @@ -72,24 +66,32 @@ static struct omap_vdd_info omap4_vdd_core_info = { | ||
| 930 | .vp_data = &omap4_vp_core_data, | ||
| 931 | .vc_data = &omap4_vc_core_data, | ||
| 932 | .vfsm = &omap4_vdd_core_vfsm_data, | ||
| 933 | - .voltdm = { | ||
| 934 | - .name = "core", | ||
| 935 | - }, | ||
| 936 | }; | ||
| 937 | |||
| 938 | -/* OMAP4 VDD structures */ | ||
| 939 | -static struct omap_vdd_info *omap4_vdd_info[] = { | ||
| 940 | - &omap4_vdd_mpu_info, | ||
| 941 | - &omap4_vdd_iva_info, | ||
| 942 | - &omap4_vdd_core_info, | ||
| 943 | +static struct voltagedomain omap4_voltdm_mpu = { | ||
| 944 | + .name = "mpu", | ||
| 945 | + .vdd = &omap4_vdd_mpu_info, | ||
| 946 | }; | ||
| 947 | |||
| 948 | -/* OMAP4 specific voltage init functions */ | ||
| 949 | -static int __init omap44xx_voltage_early_init(void) | ||
| 950 | -{ | ||
| 951 | - if (!cpu_is_omap44xx()) | ||
| 952 | - return 0; | ||
| 953 | +static struct voltagedomain omap4_voltdm_iva = { | ||
| 954 | + .name = "iva", | ||
| 955 | + .vdd = &omap4_vdd_iva_info, | ||
| 956 | +}; | ||
| 957 | + | ||
| 958 | +static struct voltagedomain omap4_voltdm_core = { | ||
| 959 | + .name = "core", | ||
| 960 | + .vdd = &omap4_vdd_core_info, | ||
| 961 | +}; | ||
| 962 | |||
| 963 | +static struct voltagedomain *voltagedomains_omap4[] __initdata = { | ||
| 964 | + &omap4_voltdm_mpu, | ||
| 965 | + &omap4_voltdm_iva, | ||
| 966 | + &omap4_voltdm_core, | ||
| 967 | + NULL, | ||
| 968 | +}; | ||
| 969 | + | ||
| 970 | +void __init omap44xx_voltagedomains_init(void) | ||
| 971 | +{ | ||
| 972 | /* | ||
| 973 | * XXX Will depend on the process, validation, and binning | ||
| 974 | * for the currently-running IC | ||
| 975 | @@ -98,7 +100,5 @@ static int __init omap44xx_voltage_early_init(void) | ||
| 976 | omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; | ||
| 977 | omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; | ||
| 978 | |||
| 979 | - return omap_voltage_early_init(omap4_vdd_info, | ||
| 980 | - ARRAY_SIZE(omap4_vdd_info)); | ||
| 981 | + voltdm_init(voltagedomains_omap4); | ||
| 982 | }; | ||
| 983 | -core_initcall(omap44xx_voltage_early_init); | ||
| 984 | -- | ||
| 985 | 1.7.2.5 | ||
| 986 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0100-OMAP3-voltage-rename-mpu-voltagedomain-to-mpu_iva.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0100-OMAP3-voltage-rename-mpu-voltagedomain-to-mpu_iva.patch deleted file mode 100644 index 195235dc..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0100-OMAP3-voltage-rename-mpu-voltagedomain-to-mpu_iva.patch +++ /dev/null | |||
| @@ -1,82 +0,0 @@ | |||
| 1 | From b98b320e9e4eeb93356a80b597e578c5547cdff9 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 23 Mar 2011 11:18:08 -0700 | ||
| 4 | Subject: [PATCH 100/149] OMAP3: voltage: rename "mpu" voltagedomain to "mpu_iva" | ||
| 5 | |||
| 6 | This voltage domain (a.k.a. VDD1) contains both the MPU and the IVA, so | ||
| 7 | rename appropriately. | ||
| 8 | |||
| 9 | Also fixup any users of the "mpu" name to use "mpu_iva" | ||
| 10 | |||
| 11 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | 4 ++-- | ||
| 14 | arch/arm/mach-omap2/omap_twl.c | 2 +- | ||
| 15 | arch/arm/mach-omap2/pm.c | 2 +- | ||
| 16 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 2 +- | ||
| 17 | 4 files changed, 5 insertions(+), 5 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 20 | index 25bf43b..59fdb9f 100644 | ||
| 21 | --- a/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 22 | +++ b/arch/arm/mach-omap2/omap_hwmod_3xxx_data.c | ||
| 23 | @@ -2597,7 +2597,7 @@ static struct omap_hwmod omap34xx_sr1_hwmod = { | ||
| 24 | .name = "sr1_hwmod", | ||
| 25 | .class = &omap34xx_smartreflex_hwmod_class, | ||
| 26 | .main_clk = "sr1_fck", | ||
| 27 | - .vdd_name = "mpu", | ||
| 28 | + .vdd_name = "mpu_iva", | ||
| 29 | .prcm = { | ||
| 30 | .omap2 = { | ||
| 31 | .prcm_reg_id = 1, | ||
| 32 | @@ -2619,7 +2619,7 @@ static struct omap_hwmod omap36xx_sr1_hwmod = { | ||
| 33 | .name = "sr1_hwmod", | ||
| 34 | .class = &omap36xx_smartreflex_hwmod_class, | ||
| 35 | .main_clk = "sr1_fck", | ||
| 36 | - .vdd_name = "mpu", | ||
| 37 | + .vdd_name = "mpu_iva", | ||
| 38 | .prcm = { | ||
| 39 | .omap2 = { | ||
| 40 | .prcm_reg_id = 1, | ||
| 41 | diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c | ||
| 42 | index fcd2f62..760487b 100644 | ||
| 43 | --- a/arch/arm/mach-omap2/omap_twl.c | ||
| 44 | +++ b/arch/arm/mach-omap2/omap_twl.c | ||
| 45 | @@ -288,7 +288,7 @@ int __init omap3_twl_init(void) | ||
| 46 | if (!twl_sr_enable_autoinit) | ||
| 47 | omap3_twl_set_sr_bit(true); | ||
| 48 | |||
| 49 | - voltdm = voltdm_lookup("mpu"); | ||
| 50 | + voltdm = voltdm_lookup("mpu_iva"); | ||
| 51 | omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); | ||
| 52 | |||
| 53 | voltdm = voltdm_lookup("core"); | ||
| 54 | diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c | ||
| 55 | index 3bce29b..f81340e 100644 | ||
| 56 | --- a/arch/arm/mach-omap2/pm.c | ||
| 57 | +++ b/arch/arm/mach-omap2/pm.c | ||
| 58 | @@ -228,7 +228,7 @@ static void __init omap3_init_voltages(void) | ||
| 59 | if (!cpu_is_omap34xx()) | ||
| 60 | return; | ||
| 61 | |||
| 62 | - omap2_set_init_voltage("mpu", "dpll1_ck", mpu_dev); | ||
| 63 | + omap2_set_init_voltage("mpu_iva", "dpll1_ck", mpu_dev); | ||
| 64 | omap2_set_init_voltage("core", "l3_ick", l3_dev); | ||
| 65 | } | ||
| 66 | |||
| 67 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 68 | index 4bee412..2167ef4 100644 | ||
| 69 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 70 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 71 | @@ -60,7 +60,7 @@ static struct omap_vdd_info omap3_vdd2_info = { | ||
| 72 | }; | ||
| 73 | |||
| 74 | static struct voltagedomain omap3_voltdm_mpu = { | ||
| 75 | - .name = "mpu", | ||
| 76 | + .name = "mpu_iva", | ||
| 77 | .vdd = &omap3_vdd1_info, | ||
| 78 | }; | ||
| 79 | |||
| 80 | -- | ||
| 81 | 1.7.2.5 | ||
| 82 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0101-OMAP3-voltagedomain-data-add-wakeup-domain.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0101-OMAP3-voltagedomain-data-add-wakeup-domain.patch deleted file mode 100644 index 09c1ef43..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0101-OMAP3-voltagedomain-data-add-wakeup-domain.patch +++ /dev/null | |||
| @@ -1,37 +0,0 @@ | |||
| 1 | From 17cd354184d7ffe9fcef97a0e1beeb6e8b2a2c38 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 23 Mar 2011 13:30:33 -0700 | ||
| 4 | Subject: [PATCH 101/149] OMAP3: voltagedomain data: add wakeup domain | ||
| 5 | |||
| 6 | Add wakeup voltage domain so that the wakeup powerdomain can have an | ||
| 7 | associated powerdomain. Note that the scalable flat is not set for | ||
| 8 | the this voltagedomain, so it will not be fully initialized like | ||
| 9 | scalable voltage domains. | ||
| 10 | |||
| 11 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 5 +++++ | ||
| 14 | 1 files changed, 5 insertions(+), 0 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 17 | index 2167ef4..42d0b11 100644 | ||
| 18 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 19 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 20 | @@ -69,9 +69,14 @@ static struct voltagedomain omap3_voltdm_core = { | ||
| 21 | .vdd = &omap3_vdd2_info, | ||
| 22 | }; | ||
| 23 | |||
| 24 | +static struct voltagedomain omap3_voltdm_wkup = { | ||
| 25 | + .name = "wakeup", | ||
| 26 | +}; | ||
| 27 | + | ||
| 28 | static struct voltagedomain *voltagedomains_omap3[] __initdata = { | ||
| 29 | &omap3_voltdm_mpu, | ||
| 30 | &omap3_voltdm_core, | ||
| 31 | + &omap3_voltdm_wkup, | ||
| 32 | NULL, | ||
| 33 | }; | ||
| 34 | |||
| 35 | -- | ||
| 36 | 1.7.2.5 | ||
| 37 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0102-OMAP3-voltage-add-scalable-flag-to-voltagedomain.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0102-OMAP3-voltage-add-scalable-flag-to-voltagedomain.patch deleted file mode 100644 index c12fdb55..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0102-OMAP3-voltage-add-scalable-flag-to-voltagedomain.patch +++ /dev/null | |||
| @@ -1,93 +0,0 @@ | |||
| 1 | From b9230219fb50ac16be3f24fe872bd9537b665871 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 23 Mar 2011 17:00:21 -0700 | ||
| 4 | Subject: [PATCH 102/149] OMAP3+: voltage: add scalable flag to voltagedomain | ||
| 5 | |||
| 6 | Add a 'bool scalable' flag to the struct powerdomain and set it for | ||
| 7 | the scalable domains on OMAP3 and OMAP4. | ||
| 8 | |||
| 9 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 10 | --- | ||
| 11 | arch/arm/mach-omap2/voltage.c | 3 +++ | ||
| 12 | arch/arm/mach-omap2/voltage.h | 2 ++ | ||
| 13 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 2 ++ | ||
| 14 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 3 +++ | ||
| 15 | 4 files changed, 10 insertions(+), 0 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 18 | index 4f0361a..48a2593 100644 | ||
| 19 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 20 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 21 | @@ -1054,6 +1054,9 @@ int __init omap_voltage_late_init(void) | ||
| 22 | pr_err("%s: Unable to create voltage debugfs main dir\n", | ||
| 23 | __func__); | ||
| 24 | list_for_each_entry(voltdm, &voltdm_list, node) { | ||
| 25 | + if (!voltdm->scalable) | ||
| 26 | + continue; | ||
| 27 | + | ||
| 28 | if (voltdm->vdd) { | ||
| 29 | if (omap_vdd_data_configure(voltdm)) | ||
| 30 | continue; | ||
| 31 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 32 | index 5440298..25cfb5c 100644 | ||
| 33 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 34 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 35 | @@ -53,11 +53,13 @@ struct omap_vfsm_instance_data { | ||
| 36 | /** | ||
| 37 | * struct voltagedomain - omap voltage domain global structure. | ||
| 38 | * @name: Name of the voltage domain which can be used as a unique identifier. | ||
| 39 | + * @scalable: Whether or not this voltage domain is scalable | ||
| 40 | * @node: list_head linking all voltage domains | ||
| 41 | * @vdd: to be removed | ||
| 42 | */ | ||
| 43 | struct voltagedomain { | ||
| 44 | char *name; | ||
| 45 | + bool scalable; | ||
| 46 | struct list_head node; | ||
| 47 | struct omap_vdd_info *vdd; | ||
| 48 | }; | ||
| 49 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 50 | index 42d0b11..d7e1052 100644 | ||
| 51 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 52 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 53 | @@ -61,11 +61,13 @@ static struct omap_vdd_info omap3_vdd2_info = { | ||
| 54 | |||
| 55 | static struct voltagedomain omap3_voltdm_mpu = { | ||
| 56 | .name = "mpu_iva", | ||
| 57 | + .scalable = true, | ||
| 58 | .vdd = &omap3_vdd1_info, | ||
| 59 | }; | ||
| 60 | |||
| 61 | static struct voltagedomain omap3_voltdm_core = { | ||
| 62 | .name = "core", | ||
| 63 | + .scalable = true, | ||
| 64 | .vdd = &omap3_vdd2_info, | ||
| 65 | }; | ||
| 66 | |||
| 67 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 68 | index 245fdf9..95e1ce5 100644 | ||
| 69 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 70 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 71 | @@ -70,16 +70,19 @@ static struct omap_vdd_info omap4_vdd_core_info = { | ||
| 72 | |||
| 73 | static struct voltagedomain omap4_voltdm_mpu = { | ||
| 74 | .name = "mpu", | ||
| 75 | + .scalable = true, | ||
| 76 | .vdd = &omap4_vdd_mpu_info, | ||
| 77 | }; | ||
| 78 | |||
| 79 | static struct voltagedomain omap4_voltdm_iva = { | ||
| 80 | .name = "iva", | ||
| 81 | + .scalable = true, | ||
| 82 | .vdd = &omap4_vdd_iva_info, | ||
| 83 | }; | ||
| 84 | |||
| 85 | static struct voltagedomain omap4_voltdm_core = { | ||
| 86 | .name = "core", | ||
| 87 | + .scalable = true, | ||
| 88 | .vdd = &omap4_vdd_core_info, | ||
| 89 | }; | ||
| 90 | |||
| 91 | -- | ||
| 92 | 1.7.2.5 | ||
| 93 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0103-OMAP2-powerdomain-add-voltagedomain-to-struct-powerd.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0103-OMAP2-powerdomain-add-voltagedomain-to-struct-powerd.patch deleted file mode 100644 index 06ec89bc..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0103-OMAP2-powerdomain-add-voltagedomain-to-struct-powerd.patch +++ /dev/null | |||
| @@ -1,51 +0,0 @@ | |||
| 1 | From 4380f30498f0096856479011df85f956081ce26c Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 23 Mar 2011 07:22:23 -0700 | ||
| 4 | Subject: [PATCH 103/149] OMAP2+: powerdomain: add voltagedomain to struct powerdomain | ||
| 5 | |||
| 6 | Each powerdomain is associated with a voltage domain. Add an entry to | ||
| 7 | struct powerdomain where the enclosing voltagedomain can be | ||
| 8 | referenced. | ||
| 9 | |||
| 10 | Modeled after similar relationship between clockdomains and powerdomains. | ||
| 11 | |||
| 12 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/powerdomain.h | 7 +++++++ | ||
| 15 | 1 files changed, 7 insertions(+), 0 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h | ||
| 18 | index d23d979..9ce920d 100644 | ||
| 19 | --- a/arch/arm/mach-omap2/powerdomain.h | ||
| 20 | +++ b/arch/arm/mach-omap2/powerdomain.h | ||
| 21 | @@ -24,6 +24,8 @@ | ||
| 22 | |||
| 23 | #include <plat/cpu.h> | ||
| 24 | |||
| 25 | +#include "voltage.h" | ||
| 26 | + | ||
| 27 | /* Powerdomain basic power states */ | ||
| 28 | #define PWRDM_POWER_OFF 0x0 | ||
| 29 | #define PWRDM_POWER_RET 0x1 | ||
| 30 | @@ -78,6 +80,7 @@ struct powerdomain; | ||
| 31 | /** | ||
| 32 | * struct powerdomain - OMAP powerdomain | ||
| 33 | * @name: Powerdomain name | ||
| 34 | + * @voltdm: voltagedomain containing this powerdomain | ||
| 35 | * @omap_chip: represents the OMAP chip types containing this pwrdm | ||
| 36 | * @prcm_offs: the address offset from CM_BASE/PRM_BASE | ||
| 37 | * @prcm_partition: (OMAP4 only) the PRCM partition ID containing @prcm_offs | ||
| 38 | @@ -98,6 +101,10 @@ struct powerdomain; | ||
| 39 | */ | ||
| 40 | struct powerdomain { | ||
| 41 | const char *name; | ||
| 42 | + union { | ||
| 43 | + const char *name; | ||
| 44 | + struct voltagedomain *ptr; | ||
| 45 | + } voltdm; | ||
| 46 | const struct omap_chip_id omap_chip; | ||
| 47 | const s16 prcm_offs; | ||
| 48 | const u8 pwrsts; | ||
| 49 | -- | ||
| 50 | 1.7.2.5 | ||
| 51 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0104-OMAP2-add-voltage-domains-and-connect-to-powerdomain.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0104-OMAP2-add-voltage-domains-and-connect-to-powerdomain.patch deleted file mode 100644 index 2e7b9b84..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0104-OMAP2-add-voltage-domains-and-connect-to-powerdomain.patch +++ /dev/null | |||
| @@ -1,138 +0,0 @@ | |||
| 1 | From 090b5bcad1bf67d208685461c30b68cd1ab535c5 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 23 Mar 2011 16:09:41 -0700 | ||
| 4 | Subject: [PATCH 104/149] OMAP2: add voltage domains and connect to powerdomains | ||
| 5 | |||
| 6 | Create basic voltagedomains for OMAP2 and associate OMAP2 powerdomains | ||
| 7 | with the newly created voltage domains. | ||
| 8 | |||
| 9 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 10 | --- | ||
| 11 | arch/arm/mach-omap2/Makefile | 3 +- | ||
| 12 | arch/arm/mach-omap2/io.c | 2 + | ||
| 13 | arch/arm/mach-omap2/powerdomains2xxx_data.c | 4 +++ | ||
| 14 | arch/arm/mach-omap2/voltage.h | 1 + | ||
| 15 | arch/arm/mach-omap2/voltagedomains2xxx_data.c | 32 +++++++++++++++++++++++++ | ||
| 16 | 5 files changed, 41 insertions(+), 1 deletions(-) | ||
| 17 | create mode 100644 arch/arm/mach-omap2/voltagedomains2xxx_data.c | ||
| 18 | |||
| 19 | diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile | ||
| 20 | index f343365..1b6cecd 100644 | ||
| 21 | --- a/arch/arm/mach-omap2/Makefile | ||
| 22 | +++ b/arch/arm/mach-omap2/Makefile | ||
| 23 | @@ -91,7 +91,8 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ | ||
| 24 | # OMAP voltage domains | ||
| 25 | ifeq ($(CONFIG_PM),y) | ||
| 26 | voltagedomain-common := voltage.o | ||
| 27 | -obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) | ||
| 28 | +obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ | ||
| 29 | + voltagedomains2xxx_data.o | ||
| 30 | obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ | ||
| 31 | voltagedomains3xxx_data.o | ||
| 32 | obj-$(CONFIG_ARCH_OMAP4) += $(voltagedomain-common) \ | ||
| 33 | diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c | ||
| 34 | index 9f5a846..4c8a5de 100644 | ||
| 35 | --- a/arch/arm/mach-omap2/io.c | ||
| 36 | +++ b/arch/arm/mach-omap2/io.c | ||
| 37 | @@ -342,10 +342,12 @@ void __init omap2_init_common_infrastructure(void) | ||
| 38 | u8 postsetup_state; | ||
| 39 | |||
| 40 | if (cpu_is_omap242x()) { | ||
| 41 | + omap2xxx_voltagedomains_init(); | ||
| 42 | omap2xxx_powerdomains_init(); | ||
| 43 | omap2xxx_clockdomains_init(); | ||
| 44 | omap2420_hwmod_init(); | ||
| 45 | } else if (cpu_is_omap243x()) { | ||
| 46 | + omap2xxx_voltagedomains_init(); | ||
| 47 | omap2xxx_powerdomains_init(); | ||
| 48 | omap2xxx_clockdomains_init(); | ||
| 49 | omap2430_hwmod_init(); | ||
| 50 | diff --git a/arch/arm/mach-omap2/powerdomains2xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_data.c | ||
| 51 | index cc389fb..274f64c 100644 | ||
| 52 | --- a/arch/arm/mach-omap2/powerdomains2xxx_data.c | ||
| 53 | +++ b/arch/arm/mach-omap2/powerdomains2xxx_data.c | ||
| 54 | @@ -38,6 +38,7 @@ static struct powerdomain dsp_pwrdm = { | ||
| 55 | .pwrsts_mem_on = { | ||
| 56 | [0] = PWRSTS_ON, | ||
| 57 | }, | ||
| 58 | + .voltdm = { .name = "core" }, | ||
| 59 | }; | ||
| 60 | |||
| 61 | static struct powerdomain mpu_24xx_pwrdm = { | ||
| 62 | @@ -53,6 +54,7 @@ static struct powerdomain mpu_24xx_pwrdm = { | ||
| 63 | .pwrsts_mem_on = { | ||
| 64 | [0] = PWRSTS_ON, | ||
| 65 | }, | ||
| 66 | + .voltdm = { .name = "core" }, | ||
| 67 | }; | ||
| 68 | |||
| 69 | static struct powerdomain core_24xx_pwrdm = { | ||
| 70 | @@ -71,6 +73,7 @@ static struct powerdomain core_24xx_pwrdm = { | ||
| 71 | [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ | ||
| 72 | [2] = PWRSTS_OFF_RET_ON, /* MEM3ONSTATE */ | ||
| 73 | }, | ||
| 74 | + .voltdm = { .name = "core" }, | ||
| 75 | }; | ||
| 76 | |||
| 77 | |||
| 78 | @@ -95,6 +98,7 @@ static struct powerdomain mdm_pwrdm = { | ||
| 79 | .pwrsts_mem_on = { | ||
| 80 | [0] = PWRSTS_ON, /* MEMONSTATE */ | ||
| 81 | }, | ||
| 82 | + .voltdm = { .name = "core" }, | ||
| 83 | }; | ||
| 84 | |||
| 85 | #endif /* CONFIG_SOC_OMAP2430 */ | ||
| 86 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 87 | index 25cfb5c..cacd76e 100644 | ||
| 88 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 89 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 90 | @@ -180,6 +180,7 @@ static inline int omap_voltage_late_init(void) | ||
| 91 | } | ||
| 92 | #endif | ||
| 93 | |||
| 94 | +extern void omap2xxx_voltagedomains_init(void); | ||
| 95 | extern void omap3xxx_voltagedomains_init(void); | ||
| 96 | extern void omap44xx_voltagedomains_init(void); | ||
| 97 | |||
| 98 | diff --git a/arch/arm/mach-omap2/voltagedomains2xxx_data.c b/arch/arm/mach-omap2/voltagedomains2xxx_data.c | ||
| 99 | new file mode 100644 | ||
| 100 | index 0000000..69ff261 | ||
| 101 | --- /dev/null | ||
| 102 | +++ b/arch/arm/mach-omap2/voltagedomains2xxx_data.c | ||
| 103 | @@ -0,0 +1,32 @@ | ||
| 104 | +/* | ||
| 105 | + * OMAP3 voltage domain data | ||
| 106 | + * | ||
| 107 | + * Copyright (C) 2007, 2010 Texas Instruments, Inc. | ||
| 108 | + | ||
| 109 | + * This program is free software; you can redistribute it and/or modify | ||
| 110 | + * it under the terms of the GNU General Public License version 2 as | ||
| 111 | + * published by the Free Software Foundation. | ||
| 112 | + */ | ||
| 113 | +#include <linux/kernel.h> | ||
| 114 | +#include <linux/init.h> | ||
| 115 | + | ||
| 116 | +#include "voltage.h" | ||
| 117 | + | ||
| 118 | +static struct voltagedomain omap2_voltdm_core = { | ||
| 119 | + .name = "core", | ||
| 120 | +}; | ||
| 121 | + | ||
| 122 | +static struct voltagedomain omap2_voltdm_wkup = { | ||
| 123 | + .name = "wakeup", | ||
| 124 | +}; | ||
| 125 | + | ||
| 126 | +static struct voltagedomain *voltagedomains_omap2[] __initdata = { | ||
| 127 | + &omap2_voltdm_core, | ||
| 128 | + &omap2_voltdm_wkup, | ||
| 129 | + NULL, | ||
| 130 | +}; | ||
| 131 | + | ||
| 132 | +void __init omap2xxx_voltagedomains_init(void) | ||
| 133 | +{ | ||
| 134 | + voltdm_init(voltagedomains_omap2); | ||
| 135 | +} | ||
| 136 | -- | ||
| 137 | 1.7.2.5 | ||
| 138 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0105-OMAP3-powerdomain-data-add-voltage-domains.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0105-OMAP3-powerdomain-data-add-voltage-domains.patch deleted file mode 100644 index 7481b06b..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0105-OMAP3-powerdomain-data-add-voltage-domains.patch +++ /dev/null | |||
| @@ -1,161 +0,0 @@ | |||
| 1 | From a44878fc9328d0ee6101d328f16a1f08bd123ba0 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Fri, 18 Mar 2011 14:12:18 -0700 | ||
| 4 | Subject: [PATCH 105/149] OMAP3: powerdomain data: add voltage domains | ||
| 5 | |||
| 6 | Add voltage domain name to indicate which voltagedomain each | ||
| 7 | powerdomain is in. | ||
| 8 | |||
| 9 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 10 | --- | ||
| 11 | arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c | 2 ++ | ||
| 12 | arch/arm/mach-omap2/powerdomains3xxx_data.c | 16 ++++++++++++++++ | ||
| 13 | 2 files changed, 18 insertions(+), 0 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c | ||
| 16 | index 4210c33..2242c8e 100644 | ||
| 17 | --- a/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c | ||
| 18 | +++ b/arch/arm/mach-omap2/powerdomains2xxx_3xxx_data.c | ||
| 19 | @@ -70,6 +70,7 @@ struct powerdomain gfx_omap2_pwrdm = { | ||
| 20 | .pwrsts_mem_on = { | ||
| 21 | [0] = PWRSTS_ON, /* MEMONSTATE */ | ||
| 22 | }, | ||
| 23 | + .voltdm = { .name = "core" }, | ||
| 24 | }; | ||
| 25 | |||
| 26 | struct powerdomain wkup_omap2_pwrdm = { | ||
| 27 | @@ -77,4 +78,5 @@ struct powerdomain wkup_omap2_pwrdm = { | ||
| 28 | .prcm_offs = WKUP_MOD, | ||
| 29 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430), | ||
| 30 | .pwrsts = PWRSTS_ON, | ||
| 31 | + .voltdm = { .name = "wakeup" }, | ||
| 32 | }; | ||
| 33 | diff --git a/arch/arm/mach-omap2/powerdomains3xxx_data.c b/arch/arm/mach-omap2/powerdomains3xxx_data.c | ||
| 34 | index 469a920..1f37c0c 100644 | ||
| 35 | --- a/arch/arm/mach-omap2/powerdomains3xxx_data.c | ||
| 36 | +++ b/arch/arm/mach-omap2/powerdomains3xxx_data.c | ||
| 37 | @@ -52,6 +52,7 @@ static struct powerdomain iva2_pwrdm = { | ||
| 38 | [2] = PWRSTS_OFF_ON, | ||
| 39 | [3] = PWRSTS_ON, | ||
| 40 | }, | ||
| 41 | + .voltdm = { .name = "mpu_iva" }, | ||
| 42 | }; | ||
| 43 | |||
| 44 | static struct powerdomain mpu_3xxx_pwrdm = { | ||
| 45 | @@ -68,6 +69,7 @@ static struct powerdomain mpu_3xxx_pwrdm = { | ||
| 46 | .pwrsts_mem_on = { | ||
| 47 | [0] = PWRSTS_OFF_ON, | ||
| 48 | }, | ||
| 49 | + .voltdm = { .name = "mpu_iva" }, | ||
| 50 | }; | ||
| 51 | |||
| 52 | /* | ||
| 53 | @@ -98,6 +100,7 @@ static struct powerdomain core_3xxx_pre_es3_1_pwrdm = { | ||
| 54 | [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ | ||
| 55 | [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ | ||
| 56 | }, | ||
| 57 | + .voltdm = { .name = "core" }, | ||
| 58 | }; | ||
| 59 | |||
| 60 | static struct powerdomain core_3xxx_es3_1_pwrdm = { | ||
| 61 | @@ -121,6 +124,7 @@ static struct powerdomain core_3xxx_es3_1_pwrdm = { | ||
| 62 | [0] = PWRSTS_OFF_RET_ON, /* MEM1ONSTATE */ | ||
| 63 | [1] = PWRSTS_OFF_RET_ON, /* MEM2ONSTATE */ | ||
| 64 | }, | ||
| 65 | + .voltdm = { .name = "core" }, | ||
| 66 | }; | ||
| 67 | |||
| 68 | static struct powerdomain dss_pwrdm = { | ||
| 69 | @@ -136,6 +140,7 @@ static struct powerdomain dss_pwrdm = { | ||
| 70 | .pwrsts_mem_on = { | ||
| 71 | [0] = PWRSTS_ON, /* MEMONSTATE */ | ||
| 72 | }, | ||
| 73 | + .voltdm = { .name = "core" }, | ||
| 74 | }; | ||
| 75 | |||
| 76 | /* | ||
| 77 | @@ -157,6 +162,7 @@ static struct powerdomain sgx_pwrdm = { | ||
| 78 | .pwrsts_mem_on = { | ||
| 79 | [0] = PWRSTS_ON, /* MEMONSTATE */ | ||
| 80 | }, | ||
| 81 | + .voltdm = { .name = "core" }, | ||
| 82 | }; | ||
| 83 | |||
| 84 | static struct powerdomain cam_pwrdm = { | ||
| 85 | @@ -172,6 +178,7 @@ static struct powerdomain cam_pwrdm = { | ||
| 86 | .pwrsts_mem_on = { | ||
| 87 | [0] = PWRSTS_ON, /* MEMONSTATE */ | ||
| 88 | }, | ||
| 89 | + .voltdm = { .name = "core" }, | ||
| 90 | }; | ||
| 91 | |||
| 92 | static struct powerdomain per_pwrdm = { | ||
| 93 | @@ -187,12 +194,14 @@ static struct powerdomain per_pwrdm = { | ||
| 94 | .pwrsts_mem_on = { | ||
| 95 | [0] = PWRSTS_ON, /* MEMONSTATE */ | ||
| 96 | }, | ||
| 97 | + .voltdm = { .name = "core" }, | ||
| 98 | }; | ||
| 99 | |||
| 100 | static struct powerdomain emu_pwrdm = { | ||
| 101 | .name = "emu_pwrdm", | ||
| 102 | .prcm_offs = OMAP3430_EMU_MOD, | ||
| 103 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | ||
| 104 | + .voltdm = { .name = "core" }, | ||
| 105 | }; | ||
| 106 | |||
| 107 | static struct powerdomain neon_pwrdm = { | ||
| 108 | @@ -201,6 +210,7 @@ static struct powerdomain neon_pwrdm = { | ||
| 109 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | ||
| 110 | .pwrsts = PWRSTS_OFF_RET_ON, | ||
| 111 | .pwrsts_logic_ret = PWRSTS_RET, | ||
| 112 | + .voltdm = { .name = "mpu_iva" }, | ||
| 113 | }; | ||
| 114 | |||
| 115 | static struct powerdomain usbhost_pwrdm = { | ||
| 116 | @@ -223,36 +233,42 @@ static struct powerdomain usbhost_pwrdm = { | ||
| 117 | .pwrsts_mem_on = { | ||
| 118 | [0] = PWRSTS_ON, /* MEMONSTATE */ | ||
| 119 | }, | ||
| 120 | + .voltdm = { .name = "core" }, | ||
| 121 | }; | ||
| 122 | |||
| 123 | static struct powerdomain dpll1_pwrdm = { | ||
| 124 | .name = "dpll1_pwrdm", | ||
| 125 | .prcm_offs = MPU_MOD, | ||
| 126 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | ||
| 127 | + .voltdm = { .name = "mpu_iva" }, | ||
| 128 | }; | ||
| 129 | |||
| 130 | static struct powerdomain dpll2_pwrdm = { | ||
| 131 | .name = "dpll2_pwrdm", | ||
| 132 | .prcm_offs = OMAP3430_IVA2_MOD, | ||
| 133 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | ||
| 134 | + .voltdm = { .name = "mpu_iva" }, | ||
| 135 | }; | ||
| 136 | |||
| 137 | static struct powerdomain dpll3_pwrdm = { | ||
| 138 | .name = "dpll3_pwrdm", | ||
| 139 | .prcm_offs = PLL_MOD, | ||
| 140 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | ||
| 141 | + .voltdm = { .name = "core" }, | ||
| 142 | }; | ||
| 143 | |||
| 144 | static struct powerdomain dpll4_pwrdm = { | ||
| 145 | .name = "dpll4_pwrdm", | ||
| 146 | .prcm_offs = PLL_MOD, | ||
| 147 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430), | ||
| 148 | + .voltdm = { .name = "core" }, | ||
| 149 | }; | ||
| 150 | |||
| 151 | static struct powerdomain dpll5_pwrdm = { | ||
| 152 | .name = "dpll5_pwrdm", | ||
| 153 | .prcm_offs = PLL_MOD, | ||
| 154 | .omap_chip = OMAP_CHIP_INIT(CHIP_GE_OMAP3430ES2), | ||
| 155 | + .voltdm = { .name = "core" }, | ||
| 156 | }; | ||
| 157 | |||
| 158 | /* As powerdomains are added or removed above, this list must also be changed */ | ||
| 159 | -- | ||
| 160 | 1.7.2.5 | ||
| 161 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0106-OMAP4-powerdomain-data-add-voltage-domains.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0106-OMAP4-powerdomain-data-add-voltage-domains.patch deleted file mode 100644 index 14b904f9..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0106-OMAP4-powerdomain-data-add-voltage-domains.patch +++ /dev/null | |||
| @@ -1,177 +0,0 @@ | |||
| 1 | From a5fc50f2405625fef21c78c46e0e9427eb202f15 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Benoit Cousson <b-cousson@ti.com> | ||
| 3 | Date: Mon, 21 Mar 2011 12:11:54 +0100 | ||
| 4 | Subject: [PATCH 106/149] OMAP4: powerdomain data: add voltage domains | ||
| 5 | |||
| 6 | Add voltage domain name to indicate which voltagedomain each | ||
| 7 | powerdomain is in. | ||
| 8 | |||
| 9 | The fixed voltage domain like ldo_wakeup for emu and wkup power | ||
| 10 | domain is added too. | ||
| 11 | |||
| 12 | Update the TI copyright date to 2011. | ||
| 13 | |||
| 14 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
| 15 | Cc: Paul Walmsley <paul@pwsan.com> | ||
| 16 | [khilman@ti.com]: renamed wakeup domain: s/ldo_wakeup/wakeup/ | ||
| 17 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 18 | --- | ||
| 19 | arch/arm/mach-omap2/powerdomains44xx_data.c | 16 ++++++++++++++++ | ||
| 20 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 5 +++++ | ||
| 21 | 2 files changed, 21 insertions(+), 0 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/arch/arm/mach-omap2/powerdomains44xx_data.c b/arch/arm/mach-omap2/powerdomains44xx_data.c | ||
| 24 | index 247e794..45c7f29 100644 | ||
| 25 | --- a/arch/arm/mach-omap2/powerdomains44xx_data.c | ||
| 26 | +++ b/arch/arm/mach-omap2/powerdomains44xx_data.c | ||
| 27 | @@ -33,6 +33,7 @@ | ||
| 28 | /* core_44xx_pwrdm: CORE power domain */ | ||
| 29 | static struct powerdomain core_44xx_pwrdm = { | ||
| 30 | .name = "core_pwrdm", | ||
| 31 | + .voltdm = { .name = "core" }, | ||
| 32 | .prcm_offs = OMAP4430_PRM_CORE_INST, | ||
| 33 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 34 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 35 | @@ -59,6 +60,7 @@ static struct powerdomain core_44xx_pwrdm = { | ||
| 36 | /* gfx_44xx_pwrdm: 3D accelerator power domain */ | ||
| 37 | static struct powerdomain gfx_44xx_pwrdm = { | ||
| 38 | .name = "gfx_pwrdm", | ||
| 39 | + .voltdm = { .name = "core" }, | ||
| 40 | .prcm_offs = OMAP4430_PRM_GFX_INST, | ||
| 41 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 42 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 43 | @@ -76,6 +78,7 @@ static struct powerdomain gfx_44xx_pwrdm = { | ||
| 44 | /* abe_44xx_pwrdm: Audio back end power domain */ | ||
| 45 | static struct powerdomain abe_44xx_pwrdm = { | ||
| 46 | .name = "abe_pwrdm", | ||
| 47 | + .voltdm = { .name = "iva" }, | ||
| 48 | .prcm_offs = OMAP4430_PRM_ABE_INST, | ||
| 49 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 50 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 51 | @@ -96,6 +99,7 @@ static struct powerdomain abe_44xx_pwrdm = { | ||
| 52 | /* dss_44xx_pwrdm: Display subsystem power domain */ | ||
| 53 | static struct powerdomain dss_44xx_pwrdm = { | ||
| 54 | .name = "dss_pwrdm", | ||
| 55 | + .voltdm = { .name = "core" }, | ||
| 56 | .prcm_offs = OMAP4430_PRM_DSS_INST, | ||
| 57 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 58 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 59 | @@ -114,6 +118,7 @@ static struct powerdomain dss_44xx_pwrdm = { | ||
| 60 | /* tesla_44xx_pwrdm: Tesla processor power domain */ | ||
| 61 | static struct powerdomain tesla_44xx_pwrdm = { | ||
| 62 | .name = "tesla_pwrdm", | ||
| 63 | + .voltdm = { .name = "iva" }, | ||
| 64 | .prcm_offs = OMAP4430_PRM_TESLA_INST, | ||
| 65 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 66 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 67 | @@ -136,6 +141,7 @@ static struct powerdomain tesla_44xx_pwrdm = { | ||
| 68 | /* wkup_44xx_pwrdm: Wake-up power domain */ | ||
| 69 | static struct powerdomain wkup_44xx_pwrdm = { | ||
| 70 | .name = "wkup_pwrdm", | ||
| 71 | + .voltdm = { .name = "wakeup" }, | ||
| 72 | .prcm_offs = OMAP4430_PRM_WKUP_INST, | ||
| 73 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 74 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 75 | @@ -152,6 +158,7 @@ static struct powerdomain wkup_44xx_pwrdm = { | ||
| 76 | /* cpu0_44xx_pwrdm: MPU0 processor and Neon coprocessor power domain */ | ||
| 77 | static struct powerdomain cpu0_44xx_pwrdm = { | ||
| 78 | .name = "cpu0_pwrdm", | ||
| 79 | + .voltdm = { .name = "mpu" }, | ||
| 80 | .prcm_offs = OMAP4430_PRCM_MPU_CPU0_INST, | ||
| 81 | .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, | ||
| 82 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 83 | @@ -169,6 +176,7 @@ static struct powerdomain cpu0_44xx_pwrdm = { | ||
| 84 | /* cpu1_44xx_pwrdm: MPU1 processor and Neon coprocessor power domain */ | ||
| 85 | static struct powerdomain cpu1_44xx_pwrdm = { | ||
| 86 | .name = "cpu1_pwrdm", | ||
| 87 | + .voltdm = { .name = "mpu" }, | ||
| 88 | .prcm_offs = OMAP4430_PRCM_MPU_CPU1_INST, | ||
| 89 | .prcm_partition = OMAP4430_PRCM_MPU_PARTITION, | ||
| 90 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 91 | @@ -186,6 +194,7 @@ static struct powerdomain cpu1_44xx_pwrdm = { | ||
| 92 | /* emu_44xx_pwrdm: Emulation power domain */ | ||
| 93 | static struct powerdomain emu_44xx_pwrdm = { | ||
| 94 | .name = "emu_pwrdm", | ||
| 95 | + .voltdm = { .name = "wakeup" }, | ||
| 96 | .prcm_offs = OMAP4430_PRM_EMU_INST, | ||
| 97 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 98 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 99 | @@ -202,6 +211,7 @@ static struct powerdomain emu_44xx_pwrdm = { | ||
| 100 | /* mpu_44xx_pwrdm: Modena processor and the Neon coprocessor power domain */ | ||
| 101 | static struct powerdomain mpu_44xx_pwrdm = { | ||
| 102 | .name = "mpu_pwrdm", | ||
| 103 | + .voltdm = { .name = "mpu" }, | ||
| 104 | .prcm_offs = OMAP4430_PRM_MPU_INST, | ||
| 105 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 106 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 107 | @@ -223,6 +233,7 @@ static struct powerdomain mpu_44xx_pwrdm = { | ||
| 108 | /* ivahd_44xx_pwrdm: IVA-HD power domain */ | ||
| 109 | static struct powerdomain ivahd_44xx_pwrdm = { | ||
| 110 | .name = "ivahd_pwrdm", | ||
| 111 | + .voltdm = { .name = "iva" }, | ||
| 112 | .prcm_offs = OMAP4430_PRM_IVAHD_INST, | ||
| 113 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 114 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 115 | @@ -247,6 +258,7 @@ static struct powerdomain ivahd_44xx_pwrdm = { | ||
| 116 | /* cam_44xx_pwrdm: Camera subsystem power domain */ | ||
| 117 | static struct powerdomain cam_44xx_pwrdm = { | ||
| 118 | .name = "cam_pwrdm", | ||
| 119 | + .voltdm = { .name = "core" }, | ||
| 120 | .prcm_offs = OMAP4430_PRM_CAM_INST, | ||
| 121 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 122 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 123 | @@ -264,6 +276,7 @@ static struct powerdomain cam_44xx_pwrdm = { | ||
| 124 | /* l3init_44xx_pwrdm: L3 initators pheripherals power domain */ | ||
| 125 | static struct powerdomain l3init_44xx_pwrdm = { | ||
| 126 | .name = "l3init_pwrdm", | ||
| 127 | + .voltdm = { .name = "core" }, | ||
| 128 | .prcm_offs = OMAP4430_PRM_L3INIT_INST, | ||
| 129 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 130 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 131 | @@ -282,6 +295,7 @@ static struct powerdomain l3init_44xx_pwrdm = { | ||
| 132 | /* l4per_44xx_pwrdm: Target peripherals power domain */ | ||
| 133 | static struct powerdomain l4per_44xx_pwrdm = { | ||
| 134 | .name = "l4per_pwrdm", | ||
| 135 | + .voltdm = { .name = "core" }, | ||
| 136 | .prcm_offs = OMAP4430_PRM_L4PER_INST, | ||
| 137 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 138 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 139 | @@ -305,6 +319,7 @@ static struct powerdomain l4per_44xx_pwrdm = { | ||
| 140 | */ | ||
| 141 | static struct powerdomain always_on_core_44xx_pwrdm = { | ||
| 142 | .name = "always_on_core_pwrdm", | ||
| 143 | + .voltdm = { .name = "core" }, | ||
| 144 | .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST, | ||
| 145 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 146 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 147 | @@ -314,6 +329,7 @@ static struct powerdomain always_on_core_44xx_pwrdm = { | ||
| 148 | /* cefuse_44xx_pwrdm: Customer efuse controller power domain */ | ||
| 149 | static struct powerdomain cefuse_44xx_pwrdm = { | ||
| 150 | .name = "cefuse_pwrdm", | ||
| 151 | + .voltdm = { .name = "core" }, | ||
| 152 | .prcm_offs = OMAP4430_PRM_CEFUSE_INST, | ||
| 153 | .prcm_partition = OMAP4430_PRM_PARTITION, | ||
| 154 | .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP4430), | ||
| 155 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 156 | index 95e1ce5..9a17b5e 100644 | ||
| 157 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 158 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 159 | @@ -86,10 +86,15 @@ static struct voltagedomain omap4_voltdm_core = { | ||
| 160 | .vdd = &omap4_vdd_core_info, | ||
| 161 | }; | ||
| 162 | |||
| 163 | +static struct voltagedomain omap4_voltdm_wkup = { | ||
| 164 | + .name = "wakeup", | ||
| 165 | +}; | ||
| 166 | + | ||
| 167 | static struct voltagedomain *voltagedomains_omap4[] __initdata = { | ||
| 168 | &omap4_voltdm_mpu, | ||
| 169 | &omap4_voltdm_iva, | ||
| 170 | &omap4_voltdm_core, | ||
| 171 | + &omap4_voltdm_wkup, | ||
| 172 | NULL, | ||
| 173 | }; | ||
| 174 | |||
| 175 | -- | ||
| 176 | 1.7.2.5 | ||
| 177 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0107-OMAP2-powerdomain-add-voltage-domain-lookup-during-r.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0107-OMAP2-powerdomain-add-voltage-domain-lookup-during-r.patch deleted file mode 100644 index 39c6fc1b..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0107-OMAP2-powerdomain-add-voltage-domain-lookup-during-r.patch +++ /dev/null | |||
| @@ -1,89 +0,0 @@ | |||
| 1 | From a57d61507ab997c347ee584b86eb54391d79bf41 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 16 Mar 2011 15:52:47 -0700 | ||
| 4 | Subject: [PATCH 107/149] OMAP2+: powerdomain: add voltage domain lookup during register | ||
| 5 | |||
| 6 | When a powerdomain is registered, lookup the voltage domain by name | ||
| 7 | and keep a pointer to the containing voltagedomain in the powerdomain | ||
| 8 | structure. | ||
| 9 | |||
| 10 | Modeled after similar method between powerdomain and clockdomain layers. | ||
| 11 | |||
| 12 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/powerdomain.c | 21 +++++++++++++++++++++ | ||
| 15 | arch/arm/mach-omap2/powerdomain.h | 1 + | ||
| 16 | arch/arm/mach-omap2/voltage.h | 1 + | ||
| 17 | 3 files changed, 23 insertions(+), 0 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c | ||
| 20 | index 9af0847..1d3013d 100644 | ||
| 21 | --- a/arch/arm/mach-omap2/powerdomain.c | ||
| 22 | +++ b/arch/arm/mach-omap2/powerdomain.c | ||
| 23 | @@ -77,6 +77,7 @@ static struct powerdomain *_pwrdm_lookup(const char *name) | ||
| 24 | static int _pwrdm_register(struct powerdomain *pwrdm) | ||
| 25 | { | ||
| 26 | int i; | ||
| 27 | + struct voltagedomain *voltdm; | ||
| 28 | |||
| 29 | if (!pwrdm || !pwrdm->name) | ||
| 30 | return -EINVAL; | ||
| 31 | @@ -94,6 +95,14 @@ static int _pwrdm_register(struct powerdomain *pwrdm) | ||
| 32 | if (_pwrdm_lookup(pwrdm->name)) | ||
| 33 | return -EEXIST; | ||
| 34 | |||
| 35 | + voltdm = voltdm_lookup(pwrdm->voltdm.name); | ||
| 36 | + if (!voltdm) { | ||
| 37 | + pr_err("powerdomain: %s: voltagedomain %s does not exist\n", | ||
| 38 | + pwrdm->name, pwrdm->voltdm.name); | ||
| 39 | + return -EINVAL; | ||
| 40 | + } | ||
| 41 | + pwrdm->voltdm.ptr = voltdm; | ||
| 42 | + | ||
| 43 | list_add(&pwrdm->node, &pwrdm_list); | ||
| 44 | |||
| 45 | /* Initialize the powerdomain's state counter */ | ||
| 46 | @@ -383,6 +392,18 @@ int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, | ||
| 47 | } | ||
| 48 | |||
| 49 | /** | ||
| 50 | + * pwrdm_get_voltdm - return a ptr to the voltdm that this pwrdm resides in | ||
| 51 | + * @pwrdm: struct powerdomain * | ||
| 52 | + * | ||
| 53 | + * Return a pointer to the struct voltageomain that the specified powerdomain | ||
| 54 | + * @pwrdm exists in. | ||
| 55 | + */ | ||
| 56 | +struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm) | ||
| 57 | +{ | ||
| 58 | + return pwrdm->voltdm.ptr; | ||
| 59 | +} | ||
| 60 | + | ||
| 61 | +/** | ||
| 62 | * pwrdm_get_mem_bank_count - get number of memory banks in this powerdomain | ||
| 63 | * @pwrdm: struct powerdomain * | ||
| 64 | * | ||
| 65 | diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h | ||
| 66 | index 9ce920d..25bef48 100644 | ||
| 67 | --- a/arch/arm/mach-omap2/powerdomain.h | ||
| 68 | +++ b/arch/arm/mach-omap2/powerdomain.h | ||
| 69 | @@ -183,6 +183,7 @@ int pwrdm_del_clkdm(struct powerdomain *pwrdm, struct clockdomain *clkdm); | ||
| 70 | int pwrdm_for_each_clkdm(struct powerdomain *pwrdm, | ||
| 71 | int (*fn)(struct powerdomain *pwrdm, | ||
| 72 | struct clockdomain *clkdm)); | ||
| 73 | +struct voltagedomain *pwrdm_get_voltdm(struct powerdomain *pwrdm); | ||
| 74 | |||
| 75 | int pwrdm_get_mem_bank_count(struct powerdomain *pwrdm); | ||
| 76 | |||
| 77 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 78 | index cacd76e..966aa88 100644 | ||
| 79 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 80 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 81 | @@ -186,4 +186,5 @@ extern void omap44xx_voltagedomains_init(void); | ||
| 82 | |||
| 83 | struct voltagedomain *voltdm_lookup(const char *name); | ||
| 84 | void voltdm_init(struct voltagedomain **voltdm_list); | ||
| 85 | +int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm); | ||
| 86 | #endif | ||
| 87 | -- | ||
| 88 | 1.7.2.5 | ||
| 89 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0108-OMAP2-voltage-keep-track-of-powerdomains-in-each-vol.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0108-OMAP2-voltage-keep-track-of-powerdomains-in-each-vol.patch deleted file mode 100644 index 84ecc50b..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0108-OMAP2-voltage-keep-track-of-powerdomains-in-each-vol.patch +++ /dev/null | |||
| @@ -1,200 +0,0 @@ | |||
| 1 | From 31e518c4d9758553f36e3dcd1138ac31f68bf571 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 16 Mar 2011 16:13:15 -0700 | ||
| 4 | Subject: [PATCH 108/149] OMAP2+: voltage: keep track of powerdomains in each voltagedomain | ||
| 5 | |||
| 6 | When a powerdomain is registered and it has an associated voltage domain, | ||
| 7 | add the powerdomain to the voltagedomain using voltdm_add_pwrdm(). | ||
| 8 | |||
| 9 | Also add voltagedomain iterator helper functions to iterate over all | ||
| 10 | registered voltagedomains and all powerdomains associated with a | ||
| 11 | voltagedomain. | ||
| 12 | |||
| 13 | Modeled after a similar relationship between clockdomains and powerdomains. | ||
| 14 | |||
| 15 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 16 | --- | ||
| 17 | arch/arm/mach-omap2/powerdomain.c | 2 + | ||
| 18 | arch/arm/mach-omap2/powerdomain.h | 2 + | ||
| 19 | arch/arm/mach-omap2/voltage.c | 80 +++++++++++++++++++++++++++++++++++++ | ||
| 20 | arch/arm/mach-omap2/voltage.h | 10 +++++ | ||
| 21 | 4 files changed, 94 insertions(+), 0 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c | ||
| 24 | index 1d3013d..12135e2 100644 | ||
| 25 | --- a/arch/arm/mach-omap2/powerdomain.c | ||
| 26 | +++ b/arch/arm/mach-omap2/powerdomain.c | ||
| 27 | @@ -102,6 +102,8 @@ static int _pwrdm_register(struct powerdomain *pwrdm) | ||
| 28 | return -EINVAL; | ||
| 29 | } | ||
| 30 | pwrdm->voltdm.ptr = voltdm; | ||
| 31 | + INIT_LIST_HEAD(&pwrdm->voltdm_node); | ||
| 32 | + voltdm_add_pwrdm(voltdm, pwrdm); | ||
| 33 | |||
| 34 | list_add(&pwrdm->node, &pwrdm_list); | ||
| 35 | |||
| 36 | diff --git a/arch/arm/mach-omap2/powerdomain.h b/arch/arm/mach-omap2/powerdomain.h | ||
| 37 | index 25bef48..2c685a5 100644 | ||
| 38 | --- a/arch/arm/mach-omap2/powerdomain.h | ||
| 39 | +++ b/arch/arm/mach-omap2/powerdomain.h | ||
| 40 | @@ -92,6 +92,7 @@ struct powerdomain; | ||
| 41 | * @pwrsts_mem_on: Possible memory bank pwrstates when pwrdm in ON | ||
| 42 | * @pwrdm_clkdms: Clockdomains in this powerdomain | ||
| 43 | * @node: list_head linking all powerdomains | ||
| 44 | + * @voltdm_node: list_head linking all powerdomains in a voltagedomain | ||
| 45 | * @state: | ||
| 46 | * @state_counter: | ||
| 47 | * @timer: | ||
| 48 | @@ -116,6 +117,7 @@ struct powerdomain { | ||
| 49 | const u8 prcm_partition; | ||
| 50 | struct clockdomain *pwrdm_clkdms[PWRDM_MAX_CLKDMS]; | ||
| 51 | struct list_head node; | ||
| 52 | + struct list_head voltdm_node; | ||
| 53 | int state; | ||
| 54 | unsigned state_counter[PWRDM_MAX_PWRSTS]; | ||
| 55 | unsigned ret_logic_off_counter; | ||
| 56 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 57 | index 48a2593..1e5c122 100644 | ||
| 58 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 59 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 60 | @@ -36,6 +36,7 @@ | ||
| 61 | #include "control.h" | ||
| 62 | |||
| 63 | #include "voltage.h" | ||
| 64 | +#include "powerdomain.h" | ||
| 65 | |||
| 66 | #include "vc.h" | ||
| 67 | #include "vp.h" | ||
| 68 | @@ -1085,11 +1086,90 @@ static struct voltagedomain *_voltdm_lookup(const char *name) | ||
| 69 | return voltdm; | ||
| 70 | } | ||
| 71 | |||
| 72 | +/** | ||
| 73 | + * voltdm_add_pwrdm - add a powerdomain to a voltagedomain | ||
| 74 | + * @voltdm: struct voltagedomain * to add the powerdomain to | ||
| 75 | + * @pwrdm: struct powerdomain * to associate with a voltagedomain | ||
| 76 | + * | ||
| 77 | + * Associate the powerdomain @pwrdm with a voltagedomain @voltdm. This | ||
| 78 | + * enables the use of voltdm_for_each_pwrdm(). Returns -EINVAL if | ||
| 79 | + * presented with invalid pointers; -ENOMEM if memory could not be allocated; | ||
| 80 | + * or 0 upon success. | ||
| 81 | + */ | ||
| 82 | +int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm) | ||
| 83 | +{ | ||
| 84 | + if (!voltdm || !pwrdm) | ||
| 85 | + return -EINVAL; | ||
| 86 | + | ||
| 87 | + pr_debug("voltagedomain: associating powerdomain %s with voltagedomain " | ||
| 88 | + "%s\n", pwrdm->name, voltdm->name); | ||
| 89 | + | ||
| 90 | + list_add(&pwrdm->voltdm_node, &voltdm->pwrdm_list); | ||
| 91 | + | ||
| 92 | + return 0; | ||
| 93 | +} | ||
| 94 | + | ||
| 95 | +/** | ||
| 96 | + * voltdm_for_each_pwrdm - call function for each pwrdm in a voltdm | ||
| 97 | + * @voltdm: struct voltagedomain * to iterate over | ||
| 98 | + * @fn: callback function * | ||
| 99 | + * | ||
| 100 | + * Call the supplied function @fn for each powerdomain in the | ||
| 101 | + * voltagedomain @voltdm. Returns -EINVAL if presented with invalid | ||
| 102 | + * pointers; or passes along the last return value of the callback | ||
| 103 | + * function, which should be 0 for success or anything else to | ||
| 104 | + * indicate failure. | ||
| 105 | + */ | ||
| 106 | +int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, | ||
| 107 | + int (*fn)(struct voltagedomain *voltdm, | ||
| 108 | + struct powerdomain *pwrdm)) | ||
| 109 | +{ | ||
| 110 | + struct powerdomain *pwrdm; | ||
| 111 | + int ret = 0; | ||
| 112 | + | ||
| 113 | + if (!fn) | ||
| 114 | + return -EINVAL; | ||
| 115 | + | ||
| 116 | + list_for_each_entry(pwrdm, &voltdm->pwrdm_list, voltdm_node) | ||
| 117 | + ret = (*fn)(voltdm, pwrdm); | ||
| 118 | + | ||
| 119 | + return ret; | ||
| 120 | +} | ||
| 121 | + | ||
| 122 | +/** | ||
| 123 | + * voltdm_for_each - call function on each registered voltagedomain | ||
| 124 | + * @fn: callback function * | ||
| 125 | + * | ||
| 126 | + * Call the supplied function @fn for each registered voltagedomain. | ||
| 127 | + * The callback function @fn can return anything but 0 to bail out | ||
| 128 | + * early from the iterator. Returns the last return value of the | ||
| 129 | + * callback function, which should be 0 for success or anything else | ||
| 130 | + * to indicate failure; or -EINVAL if the function pointer is null. | ||
| 131 | + */ | ||
| 132 | +int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), | ||
| 133 | + void *user) | ||
| 134 | +{ | ||
| 135 | + struct voltagedomain *temp_voltdm; | ||
| 136 | + int ret = 0; | ||
| 137 | + | ||
| 138 | + if (!fn) | ||
| 139 | + return -EINVAL; | ||
| 140 | + | ||
| 141 | + list_for_each_entry(temp_voltdm, &voltdm_list, node) { | ||
| 142 | + ret = (*fn)(temp_voltdm, user); | ||
| 143 | + if (ret) | ||
| 144 | + break; | ||
| 145 | + } | ||
| 146 | + | ||
| 147 | + return ret; | ||
| 148 | +} | ||
| 149 | + | ||
| 150 | static int _voltdm_register(struct voltagedomain *voltdm) | ||
| 151 | { | ||
| 152 | if (!voltdm || !voltdm->name) | ||
| 153 | return -EINVAL; | ||
| 154 | |||
| 155 | + INIT_LIST_HEAD(&voltdm->pwrdm_list); | ||
| 156 | list_add(&voltdm->node, &voltdm_list); | ||
| 157 | |||
| 158 | pr_debug("voltagedomain: registered %s\n", voltdm->name); | ||
| 159 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 160 | index 966aa88..b41d9f1 100644 | ||
| 161 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 162 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 163 | @@ -19,6 +19,8 @@ | ||
| 164 | #include "vc.h" | ||
| 165 | #include "vp.h" | ||
| 166 | |||
| 167 | +struct powerdomain; | ||
| 168 | + | ||
| 169 | /* XXX document */ | ||
| 170 | #define VOLTSCALE_VPFORCEUPDATE 1 | ||
| 171 | #define VOLTSCALE_VCBYPASS 2 | ||
| 172 | @@ -55,12 +57,15 @@ struct omap_vfsm_instance_data { | ||
| 173 | * @name: Name of the voltage domain which can be used as a unique identifier. | ||
| 174 | * @scalable: Whether or not this voltage domain is scalable | ||
| 175 | * @node: list_head linking all voltage domains | ||
| 176 | + * @pwrdm_node: list_head linking all powerdomains in this voltagedomain | ||
| 177 | * @vdd: to be removed | ||
| 178 | + * @pwrdms: powerdomains in this voltagedomain | ||
| 179 | */ | ||
| 180 | struct voltagedomain { | ||
| 181 | char *name; | ||
| 182 | bool scalable; | ||
| 183 | struct list_head node; | ||
| 184 | + struct list_head pwrdm_list; | ||
| 185 | struct omap_vdd_info *vdd; | ||
| 186 | }; | ||
| 187 | |||
| 188 | @@ -187,4 +192,9 @@ extern void omap44xx_voltagedomains_init(void); | ||
| 189 | struct voltagedomain *voltdm_lookup(const char *name); | ||
| 190 | void voltdm_init(struct voltagedomain **voltdm_list); | ||
| 191 | int voltdm_add_pwrdm(struct voltagedomain *voltdm, struct powerdomain *pwrdm); | ||
| 192 | +int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), | ||
| 193 | + void *user); | ||
| 194 | +int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, | ||
| 195 | + int (*fn)(struct voltagedomain *voltdm, | ||
| 196 | + struct powerdomain *pwrdm)); | ||
| 197 | #endif | ||
| 198 | -- | ||
| 199 | 1.7.2.5 | ||
| 200 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0109-OMAP2-voltage-split-voltage-controller-VC-code-into-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0109-OMAP2-voltage-split-voltage-controller-VC-code-into-.patch deleted file mode 100644 index f14a21bf..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0109-OMAP2-voltage-split-voltage-controller-VC-code-into-.patch +++ /dev/null | |||
| @@ -1,666 +0,0 @@ | |||
| 1 | From 981e5f23fe781d26d69d8cc212674eab0353dea4 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 21 Mar 2011 14:08:55 -0700 | ||
| 4 | Subject: [PATCH 109/149] OMAP2+: voltage: split voltage controller (VC) code into dedicated layer | ||
| 5 | |||
| 6 | As part of the voltage layer cleanup, split out VC specific code into | ||
| 7 | a dedicated VC layer. This patch primarily just moves VC code from | ||
| 8 | voltage.c into vc.c, and adds prototypes to vc.h. | ||
| 9 | |||
| 10 | No functional changes. | ||
| 11 | |||
| 12 | For readability, each function was given a local 'vc' pointer: | ||
| 13 | |||
| 14 | struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 15 | |||
| 16 | and a global replace of s/vdd->vc_data/vc/ was done. | ||
| 17 | |||
| 18 | Also vc_init was renamed to vc_init_channel to reflect that this is | ||
| 19 | per-VC channel initializtion. | ||
| 20 | |||
| 21 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 22 | --- | ||
| 23 | arch/arm/mach-omap2/Makefile | 2 +- | ||
| 24 | arch/arm/mach-omap2/vc.c | 276 +++++++++++++++++++++++++++++++++++++++++ | ||
| 25 | arch/arm/mach-omap2/vc.h | 12 ++ | ||
| 26 | arch/arm/mach-omap2/voltage.c | 264 +-------------------------------------- | ||
| 27 | 4 files changed, 293 insertions(+), 261 deletions(-) | ||
| 28 | create mode 100644 arch/arm/mach-omap2/vc.c | ||
| 29 | |||
| 30 | diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile | ||
| 31 | index 1b6cecd..ecbf361 100644 | ||
| 32 | --- a/arch/arm/mach-omap2/Makefile | ||
| 33 | +++ b/arch/arm/mach-omap2/Makefile | ||
| 34 | @@ -90,7 +90,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ | ||
| 35 | |||
| 36 | # OMAP voltage domains | ||
| 37 | ifeq ($(CONFIG_PM),y) | ||
| 38 | -voltagedomain-common := voltage.o | ||
| 39 | +voltagedomain-common := voltage.o vc.o | ||
| 40 | obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ | ||
| 41 | voltagedomains2xxx_data.o | ||
| 42 | obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ | ||
| 43 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 44 | new file mode 100644 | ||
| 45 | index 0000000..98f5a4b | ||
| 46 | --- /dev/null | ||
| 47 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 48 | @@ -0,0 +1,276 @@ | ||
| 49 | +#include <linux/kernel.h> | ||
| 50 | +#include <linux/delay.h> | ||
| 51 | +#include <linux/init.h> | ||
| 52 | + | ||
| 53 | +#include <plat/cpu.h> | ||
| 54 | + | ||
| 55 | +#include "voltage.h" | ||
| 56 | +#include "vc.h" | ||
| 57 | +#include "prm-regbits-34xx.h" | ||
| 58 | +#include "prm-regbits-44xx.h" | ||
| 59 | +#include "prm44xx.h" | ||
| 60 | + | ||
| 61 | +/* Voltage scale and accessory APIs */ | ||
| 62 | +int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 63 | + unsigned long target_volt, | ||
| 64 | + u8 *target_vsel, u8 *current_vsel) | ||
| 65 | +{ | ||
| 66 | + struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 67 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 68 | + struct omap_volt_data *volt_data; | ||
| 69 | + const struct omap_vc_common_data *vc_common; | ||
| 70 | + const struct omap_vp_common_data *vp_common; | ||
| 71 | + u32 vc_cmdval, vp_errgain_val; | ||
| 72 | + | ||
| 73 | + vc_common = vc->vc_common; | ||
| 74 | + vp_common = vdd->vp_data->vp_common; | ||
| 75 | + | ||
| 76 | + /* Check if sufficient pmic info is available for this vdd */ | ||
| 77 | + if (!vdd->pmic_info) { | ||
| 78 | + pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", | ||
| 79 | + __func__, voltdm->name); | ||
| 80 | + return -EINVAL; | ||
| 81 | + } | ||
| 82 | + | ||
| 83 | + if (!vdd->pmic_info->uv_to_vsel) { | ||
| 84 | + pr_err("%s: PMIC function to convert voltage in uV to" | ||
| 85 | + "vsel not registered. Hence unable to scale voltage" | ||
| 86 | + "for vdd_%s\n", __func__, voltdm->name); | ||
| 87 | + return -ENODATA; | ||
| 88 | + } | ||
| 89 | + | ||
| 90 | + if (!vdd->read_reg || !vdd->write_reg) { | ||
| 91 | + pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 92 | + __func__, voltdm->name); | ||
| 93 | + return -EINVAL; | ||
| 94 | + } | ||
| 95 | + | ||
| 96 | + /* Get volt_data corresponding to target_volt */ | ||
| 97 | + volt_data = omap_voltage_get_voltdata(voltdm, target_volt); | ||
| 98 | + if (IS_ERR(volt_data)) | ||
| 99 | + volt_data = NULL; | ||
| 100 | + | ||
| 101 | + *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); | ||
| 102 | + *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); | ||
| 103 | + | ||
| 104 | + /* Setting the ON voltage to the new target voltage */ | ||
| 105 | + vc_cmdval = vdd->read_reg(vc->vc_common->prm_mod, vc->cmdval_reg); | ||
| 106 | + vc_cmdval &= ~vc_common->cmd_on_mask; | ||
| 107 | + vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); | ||
| 108 | + vdd->write_reg(vc_cmdval, vc->vc_common->prm_mod, vc->cmdval_reg); | ||
| 109 | + | ||
| 110 | + /* Setting vp errorgain based on the voltage */ | ||
| 111 | + if (volt_data) { | ||
| 112 | + vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, | ||
| 113 | + vdd->vp_data->vpconfig); | ||
| 114 | + vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; | ||
| 115 | + vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; | ||
| 116 | + vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << | ||
| 117 | + vp_common->vpconfig_errorgain_shift; | ||
| 118 | + vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod, | ||
| 119 | + vdd->vp_data->vpconfig); | ||
| 120 | + } | ||
| 121 | + | ||
| 122 | + return 0; | ||
| 123 | +} | ||
| 124 | + | ||
| 125 | +void omap_vc_post_scale(struct voltagedomain *voltdm, | ||
| 126 | + unsigned long target_volt, | ||
| 127 | + u8 target_vsel, u8 current_vsel) | ||
| 128 | +{ | ||
| 129 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 130 | + u32 smps_steps = 0, smps_delay = 0; | ||
| 131 | + | ||
| 132 | + smps_steps = abs(target_vsel - current_vsel); | ||
| 133 | + /* SMPS slew rate / step size. 2us added as buffer. */ | ||
| 134 | + smps_delay = ((smps_steps * vdd->pmic_info->step_size) / | ||
| 135 | + vdd->pmic_info->slew_rate) + 2; | ||
| 136 | + udelay(smps_delay); | ||
| 137 | + | ||
| 138 | + vdd->curr_volt = target_volt; | ||
| 139 | +} | ||
| 140 | + | ||
| 141 | +/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ | ||
| 142 | +int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, | ||
| 143 | + unsigned long target_volt) | ||
| 144 | +{ | ||
| 145 | + struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 146 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 147 | + u32 loop_cnt = 0, retries_cnt = 0; | ||
| 148 | + u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; | ||
| 149 | + u8 target_vsel, current_vsel; | ||
| 150 | + int ret; | ||
| 151 | + | ||
| 152 | + ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); | ||
| 153 | + if (ret) | ||
| 154 | + return ret; | ||
| 155 | + | ||
| 156 | + vc_valid = vc->vc_common->valid; | ||
| 157 | + vc_bypass_val_reg = vc->vc_common->bypass_val_reg; | ||
| 158 | + vc_bypass_value = (target_vsel << vc->vc_common->data_shift) | | ||
| 159 | + (vdd->pmic_info->pmic_reg << | ||
| 160 | + vc->vc_common->regaddr_shift) | | ||
| 161 | + (vdd->pmic_info->i2c_slave_addr << | ||
| 162 | + vc->vc_common->slaveaddr_shift); | ||
| 163 | + | ||
| 164 | + vdd->write_reg(vc_bypass_value, vc->vc_common->prm_mod, vc_bypass_val_reg); | ||
| 165 | + vdd->write_reg(vc_bypass_value | vc_valid, vc->vc_common->prm_mod, | ||
| 166 | + vc_bypass_val_reg); | ||
| 167 | + | ||
| 168 | + vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, vc_bypass_val_reg); | ||
| 169 | + /* | ||
| 170 | + * Loop till the bypass command is acknowledged from the SMPS. | ||
| 171 | + * NOTE: This is legacy code. The loop count and retry count needs | ||
| 172 | + * to be revisited. | ||
| 173 | + */ | ||
| 174 | + while (!(vc_bypass_value & vc_valid)) { | ||
| 175 | + loop_cnt++; | ||
| 176 | + | ||
| 177 | + if (retries_cnt > 10) { | ||
| 178 | + pr_warning("%s: Retry count exceeded\n", __func__); | ||
| 179 | + return -ETIMEDOUT; | ||
| 180 | + } | ||
| 181 | + | ||
| 182 | + if (loop_cnt > 50) { | ||
| 183 | + retries_cnt++; | ||
| 184 | + loop_cnt = 0; | ||
| 185 | + udelay(10); | ||
| 186 | + } | ||
| 187 | + vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, | ||
| 188 | + vc_bypass_val_reg); | ||
| 189 | + } | ||
| 190 | + | ||
| 191 | + omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); | ||
| 192 | + return 0; | ||
| 193 | +} | ||
| 194 | + | ||
| 195 | +static void __init omap3_vfsm_init(struct voltagedomain *voltdm) | ||
| 196 | +{ | ||
| 197 | + struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 198 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 199 | + | ||
| 200 | + /* | ||
| 201 | + * Voltage Manager FSM parameters init | ||
| 202 | + * XXX This data should be passed in from the board file | ||
| 203 | + */ | ||
| 204 | + vdd->write_reg(OMAP3_CLKSETUP, vc->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); | ||
| 205 | + vdd->write_reg(OMAP3_VOLTOFFSET, vc->vc_common->prm_mod, | ||
| 206 | + OMAP3_PRM_VOLTOFFSET_OFFSET); | ||
| 207 | + vdd->write_reg(OMAP3_VOLTSETUP2, vc->vc_common->prm_mod, | ||
| 208 | + OMAP3_PRM_VOLTSETUP2_OFFSET); | ||
| 209 | +} | ||
| 210 | + | ||
| 211 | +static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) | ||
| 212 | +{ | ||
| 213 | + struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 214 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 215 | + static bool is_initialized; | ||
| 216 | + u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; | ||
| 217 | + u32 vc_val; | ||
| 218 | + | ||
| 219 | + if (is_initialized) | ||
| 220 | + return; | ||
| 221 | + | ||
| 222 | + /* Set up the on, inactive, retention and off voltage */ | ||
| 223 | + on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); | ||
| 224 | + onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); | ||
| 225 | + ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); | ||
| 226 | + off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); | ||
| 227 | + vc_val = ((on_vsel << vc->vc_common->cmd_on_shift) | | ||
| 228 | + (onlp_vsel << vc->vc_common->cmd_onlp_shift) | | ||
| 229 | + (ret_vsel << vc->vc_common->cmd_ret_shift) | | ||
| 230 | + (off_vsel << vc->vc_common->cmd_off_shift)); | ||
| 231 | + vdd->write_reg(vc_val, vc->vc_common->prm_mod, vc->cmdval_reg); | ||
| 232 | + | ||
| 233 | + /* | ||
| 234 | + * Generic VC parameters init | ||
| 235 | + * XXX This data should be abstracted out | ||
| 236 | + */ | ||
| 237 | + vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->vc_common->prm_mod, | ||
| 238 | + OMAP3_PRM_VC_CH_CONF_OFFSET); | ||
| 239 | + vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->vc_common->prm_mod, | ||
| 240 | + OMAP3_PRM_VC_I2C_CFG_OFFSET); | ||
| 241 | + | ||
| 242 | + omap3_vfsm_init(voltdm); | ||
| 243 | + | ||
| 244 | + is_initialized = true; | ||
| 245 | +} | ||
| 246 | + | ||
| 247 | + | ||
| 248 | +/* OMAP4 specific voltage init functions */ | ||
| 249 | +static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) | ||
| 250 | +{ | ||
| 251 | + struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 252 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 253 | + static bool is_initialized; | ||
| 254 | + u32 vc_val; | ||
| 255 | + | ||
| 256 | + if (is_initialized) | ||
| 257 | + return; | ||
| 258 | + | ||
| 259 | + /* TODO: Configure setup times and CMD_VAL values*/ | ||
| 260 | + | ||
| 261 | + /* | ||
| 262 | + * Generic VC parameters init | ||
| 263 | + * XXX This data should be abstracted out | ||
| 264 | + */ | ||
| 265 | + vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | | ||
| 266 | + OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | | ||
| 267 | + OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); | ||
| 268 | + vdd->write_reg(vc_val, vc->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); | ||
| 269 | + | ||
| 270 | + /* XXX These are magic numbers and do not belong! */ | ||
| 271 | + vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); | ||
| 272 | + vdd->write_reg(vc_val, vc->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); | ||
| 273 | + | ||
| 274 | + is_initialized = true; | ||
| 275 | +} | ||
| 276 | + | ||
| 277 | +void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 278 | +{ | ||
| 279 | + struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 280 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 281 | + u32 vc_val; | ||
| 282 | + | ||
| 283 | + if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { | ||
| 284 | + pr_err("%s: PMIC info requried to configure vc for" | ||
| 285 | + "vdd_%s not populated.Hence cannot initialize vc\n", | ||
| 286 | + __func__, voltdm->name); | ||
| 287 | + return; | ||
| 288 | + } | ||
| 289 | + | ||
| 290 | + if (!vdd->read_reg || !vdd->write_reg) { | ||
| 291 | + pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 292 | + __func__, voltdm->name); | ||
| 293 | + return; | ||
| 294 | + } | ||
| 295 | + | ||
| 296 | + /* Set up the SMPS_SA(i2c slave address in VC */ | ||
| 297 | + vc_val = vdd->read_reg(vc->vc_common->prm_mod, | ||
| 298 | + vc->vc_common->smps_sa_reg); | ||
| 299 | + vc_val &= ~vc->smps_sa_mask; | ||
| 300 | + vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; | ||
| 301 | + vdd->write_reg(vc_val, vc->vc_common->prm_mod, | ||
| 302 | + vc->vc_common->smps_sa_reg); | ||
| 303 | + | ||
| 304 | + /* Setup the VOLRA(pmic reg addr) in VC */ | ||
| 305 | + vc_val = vdd->read_reg(vc->vc_common->prm_mod, | ||
| 306 | + vc->vc_common->smps_volra_reg); | ||
| 307 | + vc_val &= ~vc->smps_volra_mask; | ||
| 308 | + vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift; | ||
| 309 | + vdd->write_reg(vc_val, vc->vc_common->prm_mod, | ||
| 310 | + vc->vc_common->smps_volra_reg); | ||
| 311 | + | ||
| 312 | + /* Configure the setup times */ | ||
| 313 | + vc_val = vdd->read_reg(vc->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 314 | + vc_val &= ~vdd->vfsm->voltsetup_mask; | ||
| 315 | + vc_val |= vdd->pmic_info->volt_setup_time << | ||
| 316 | + vdd->vfsm->voltsetup_shift; | ||
| 317 | + vdd->write_reg(vc_val, vc->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 318 | + | ||
| 319 | + if (cpu_is_omap34xx()) | ||
| 320 | + omap3_vc_init_channel(voltdm); | ||
| 321 | + else if (cpu_is_omap44xx()) | ||
| 322 | + omap4_vc_init_channel(voltdm); | ||
| 323 | +} | ||
| 324 | + | ||
| 325 | diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h | ||
| 326 | index f7338af..d0bf348 100644 | ||
| 327 | --- a/arch/arm/mach-omap2/vc.h | ||
| 328 | +++ b/arch/arm/mach-omap2/vc.h | ||
| 329 | @@ -19,6 +19,8 @@ | ||
| 330 | |||
| 331 | #include <linux/kernel.h> | ||
| 332 | |||
| 333 | +struct voltagedomain; | ||
| 334 | + | ||
| 335 | /** | ||
| 336 | * struct omap_vc_common_data - per-VC register/bitfield data | ||
| 337 | * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register | ||
| 338 | @@ -81,5 +83,15 @@ extern struct omap_vc_instance_data omap4_vc_mpu_data; | ||
| 339 | extern struct omap_vc_instance_data omap4_vc_iva_data; | ||
| 340 | extern struct omap_vc_instance_data omap4_vc_core_data; | ||
| 341 | |||
| 342 | +void omap_vc_init_channel(struct voltagedomain *voltdm); | ||
| 343 | +int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 344 | + unsigned long target_volt, | ||
| 345 | + u8 *target_vsel, u8 *current_vsel); | ||
| 346 | +void omap_vc_post_scale(struct voltagedomain *voltdm, | ||
| 347 | + unsigned long target_volt, | ||
| 348 | + u8 target_vsel, u8 current_vsel); | ||
| 349 | +int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, | ||
| 350 | + unsigned long target_volt); | ||
| 351 | + | ||
| 352 | #endif | ||
| 353 | |||
| 354 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 355 | index 1e5c122..6ba6e49 100644 | ||
| 356 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 357 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 358 | @@ -293,136 +293,6 @@ static void __init vdd_debugfs_init(struct voltagedomain *voltdm) | ||
| 359 | &nom_volt_debug_fops); | ||
| 360 | } | ||
| 361 | |||
| 362 | -/* Voltage scale and accessory APIs */ | ||
| 363 | -static int _pre_volt_scale(struct voltagedomain *voltdm, | ||
| 364 | - unsigned long target_volt, u8 *target_vsel, u8 *current_vsel) | ||
| 365 | -{ | ||
| 366 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 367 | - struct omap_volt_data *volt_data; | ||
| 368 | - const struct omap_vc_common_data *vc_common; | ||
| 369 | - const struct omap_vp_common_data *vp_common; | ||
| 370 | - u32 vc_cmdval, vp_errgain_val; | ||
| 371 | - | ||
| 372 | - vc_common = vdd->vc_data->vc_common; | ||
| 373 | - vp_common = vdd->vp_data->vp_common; | ||
| 374 | - | ||
| 375 | - /* Check if suffiecient pmic info is available for this vdd */ | ||
| 376 | - if (!vdd->pmic_info) { | ||
| 377 | - pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", | ||
| 378 | - __func__, voltdm->name); | ||
| 379 | - return -EINVAL; | ||
| 380 | - } | ||
| 381 | - | ||
| 382 | - if (!vdd->pmic_info->uv_to_vsel) { | ||
| 383 | - pr_err("%s: PMIC function to convert voltage in uV to" | ||
| 384 | - "vsel not registered. Hence unable to scale voltage" | ||
| 385 | - "for vdd_%s\n", __func__, voltdm->name); | ||
| 386 | - return -ENODATA; | ||
| 387 | - } | ||
| 388 | - | ||
| 389 | - if (!vdd->read_reg || !vdd->write_reg) { | ||
| 390 | - pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 391 | - __func__, voltdm->name); | ||
| 392 | - return -EINVAL; | ||
| 393 | - } | ||
| 394 | - | ||
| 395 | - /* Get volt_data corresponding to target_volt */ | ||
| 396 | - volt_data = omap_voltage_get_voltdata(voltdm, target_volt); | ||
| 397 | - if (IS_ERR(volt_data)) | ||
| 398 | - volt_data = NULL; | ||
| 399 | - | ||
| 400 | - *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); | ||
| 401 | - *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); | ||
| 402 | - | ||
| 403 | - /* Setting the ON voltage to the new target voltage */ | ||
| 404 | - vc_cmdval = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); | ||
| 405 | - vc_cmdval &= ~vc_common->cmd_on_mask; | ||
| 406 | - vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); | ||
| 407 | - vdd->write_reg(vc_cmdval, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); | ||
| 408 | - | ||
| 409 | - /* Setting vp errorgain based on the voltage */ | ||
| 410 | - if (volt_data) { | ||
| 411 | - vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, | ||
| 412 | - vdd->vp_data->vpconfig); | ||
| 413 | - vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; | ||
| 414 | - vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; | ||
| 415 | - vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << | ||
| 416 | - vp_common->vpconfig_errorgain_shift; | ||
| 417 | - vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod, | ||
| 418 | - vdd->vp_data->vpconfig); | ||
| 419 | - } | ||
| 420 | - | ||
| 421 | - return 0; | ||
| 422 | -} | ||
| 423 | - | ||
| 424 | -static void _post_volt_scale(struct voltagedomain *voltdm, | ||
| 425 | - unsigned long target_volt, u8 target_vsel, u8 current_vsel) | ||
| 426 | -{ | ||
| 427 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 428 | - u32 smps_steps = 0, smps_delay = 0; | ||
| 429 | - | ||
| 430 | - smps_steps = abs(target_vsel - current_vsel); | ||
| 431 | - /* SMPS slew rate / step size. 2us added as buffer. */ | ||
| 432 | - smps_delay = ((smps_steps * vdd->pmic_info->step_size) / | ||
| 433 | - vdd->pmic_info->slew_rate) + 2; | ||
| 434 | - udelay(smps_delay); | ||
| 435 | - | ||
| 436 | - vdd->curr_volt = target_volt; | ||
| 437 | -} | ||
| 438 | - | ||
| 439 | -/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ | ||
| 440 | -static int vc_bypass_scale_voltage(struct voltagedomain *voltdm, | ||
| 441 | - unsigned long target_volt) | ||
| 442 | -{ | ||
| 443 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 444 | - u32 loop_cnt = 0, retries_cnt = 0; | ||
| 445 | - u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; | ||
| 446 | - u8 target_vsel, current_vsel; | ||
| 447 | - int ret; | ||
| 448 | - | ||
| 449 | - ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); | ||
| 450 | - if (ret) | ||
| 451 | - return ret; | ||
| 452 | - | ||
| 453 | - vc_valid = vdd->vc_data->vc_common->valid; | ||
| 454 | - vc_bypass_val_reg = vdd->vc_data->vc_common->bypass_val_reg; | ||
| 455 | - vc_bypass_value = (target_vsel << vdd->vc_data->vc_common->data_shift) | | ||
| 456 | - (vdd->pmic_info->pmic_reg << | ||
| 457 | - vdd->vc_data->vc_common->regaddr_shift) | | ||
| 458 | - (vdd->pmic_info->i2c_slave_addr << | ||
| 459 | - vdd->vc_data->vc_common->slaveaddr_shift); | ||
| 460 | - | ||
| 461 | - vdd->write_reg(vc_bypass_value, vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); | ||
| 462 | - vdd->write_reg(vc_bypass_value | vc_valid, vdd->vc_data->vc_common->prm_mod, | ||
| 463 | - vc_bypass_val_reg); | ||
| 464 | - | ||
| 465 | - vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vc_bypass_val_reg); | ||
| 466 | - /* | ||
| 467 | - * Loop till the bypass command is acknowledged from the SMPS. | ||
| 468 | - * NOTE: This is legacy code. The loop count and retry count needs | ||
| 469 | - * to be revisited. | ||
| 470 | - */ | ||
| 471 | - while (!(vc_bypass_value & vc_valid)) { | ||
| 472 | - loop_cnt++; | ||
| 473 | - | ||
| 474 | - if (retries_cnt > 10) { | ||
| 475 | - pr_warning("%s: Retry count exceeded\n", __func__); | ||
| 476 | - return -ETIMEDOUT; | ||
| 477 | - } | ||
| 478 | - | ||
| 479 | - if (loop_cnt > 50) { | ||
| 480 | - retries_cnt++; | ||
| 481 | - loop_cnt = 0; | ||
| 482 | - udelay(10); | ||
| 483 | - } | ||
| 484 | - vc_bypass_value = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, | ||
| 485 | - vc_bypass_val_reg); | ||
| 486 | - } | ||
| 487 | - | ||
| 488 | - _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); | ||
| 489 | - return 0; | ||
| 490 | -} | ||
| 491 | - | ||
| 492 | /* VP force update method of voltage scaling */ | ||
| 493 | static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, | ||
| 494 | unsigned long target_volt) | ||
| 495 | @@ -432,7 +302,7 @@ static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, | ||
| 496 | u8 target_vsel, current_vsel; | ||
| 497 | int ret, timeout = 0; | ||
| 498 | |||
| 499 | - ret = _pre_volt_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); | ||
| 500 | + ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); | ||
| 501 | if (ret) | ||
| 502 | return ret; | ||
| 503 | |||
| 504 | @@ -485,7 +355,7 @@ static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, | ||
| 505 | "TRANXDONE never got set after the voltage update\n", | ||
| 506 | __func__, voltdm->name); | ||
| 507 | |||
| 508 | - _post_volt_scale(voltdm, target_volt, target_vsel, current_vsel); | ||
| 509 | + omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); | ||
| 510 | |||
| 511 | /* | ||
| 512 | * Disable TransactionDone interrupt , clear all status, clear | ||
| 513 | @@ -517,132 +387,6 @@ static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, | ||
| 514 | return 0; | ||
| 515 | } | ||
| 516 | |||
| 517 | -static void __init omap3_vfsm_init(struct voltagedomain *voltdm) | ||
| 518 | -{ | ||
| 519 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 520 | - | ||
| 521 | - /* | ||
| 522 | - * Voltage Manager FSM parameters init | ||
| 523 | - * XXX This data should be passed in from the board file | ||
| 524 | - */ | ||
| 525 | - vdd->write_reg(OMAP3_CLKSETUP, vdd->vc_data->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); | ||
| 526 | - vdd->write_reg(OMAP3_VOLTOFFSET, vdd->vc_data->vc_common->prm_mod, | ||
| 527 | - OMAP3_PRM_VOLTOFFSET_OFFSET); | ||
| 528 | - vdd->write_reg(OMAP3_VOLTSETUP2, vdd->vc_data->vc_common->prm_mod, | ||
| 529 | - OMAP3_PRM_VOLTSETUP2_OFFSET); | ||
| 530 | -} | ||
| 531 | - | ||
| 532 | -static void __init omap3_vc_init(struct voltagedomain *voltdm) | ||
| 533 | -{ | ||
| 534 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 535 | - static bool is_initialized; | ||
| 536 | - u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; | ||
| 537 | - u32 vc_val; | ||
| 538 | - | ||
| 539 | - if (is_initialized) | ||
| 540 | - return; | ||
| 541 | - | ||
| 542 | - /* Set up the on, inactive, retention and off voltage */ | ||
| 543 | - on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); | ||
| 544 | - onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); | ||
| 545 | - ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); | ||
| 546 | - off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); | ||
| 547 | - vc_val = ((on_vsel << vdd->vc_data->vc_common->cmd_on_shift) | | ||
| 548 | - (onlp_vsel << vdd->vc_data->vc_common->cmd_onlp_shift) | | ||
| 549 | - (ret_vsel << vdd->vc_data->vc_common->cmd_ret_shift) | | ||
| 550 | - (off_vsel << vdd->vc_data->vc_common->cmd_off_shift)); | ||
| 551 | - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vc_data->cmdval_reg); | ||
| 552 | - | ||
| 553 | - /* | ||
| 554 | - * Generic VC parameters init | ||
| 555 | - * XXX This data should be abstracted out | ||
| 556 | - */ | ||
| 557 | - vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vdd->vc_data->vc_common->prm_mod, | ||
| 558 | - OMAP3_PRM_VC_CH_CONF_OFFSET); | ||
| 559 | - vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vdd->vc_data->vc_common->prm_mod, | ||
| 560 | - OMAP3_PRM_VC_I2C_CFG_OFFSET); | ||
| 561 | - | ||
| 562 | - omap3_vfsm_init(voltdm); | ||
| 563 | - | ||
| 564 | - is_initialized = true; | ||
| 565 | -} | ||
| 566 | - | ||
| 567 | - | ||
| 568 | -/* OMAP4 specific voltage init functions */ | ||
| 569 | -static void __init omap4_vc_init(struct voltagedomain *voltdm) | ||
| 570 | -{ | ||
| 571 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 572 | - static bool is_initialized; | ||
| 573 | - u32 vc_val; | ||
| 574 | - | ||
| 575 | - if (is_initialized) | ||
| 576 | - return; | ||
| 577 | - | ||
| 578 | - /* TODO: Configure setup times and CMD_VAL values*/ | ||
| 579 | - | ||
| 580 | - /* | ||
| 581 | - * Generic VC parameters init | ||
| 582 | - * XXX This data should be abstracted out | ||
| 583 | - */ | ||
| 584 | - vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | | ||
| 585 | - OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | | ||
| 586 | - OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); | ||
| 587 | - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); | ||
| 588 | - | ||
| 589 | - /* XXX These are magic numbers and do not belong! */ | ||
| 590 | - vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); | ||
| 591 | - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); | ||
| 592 | - | ||
| 593 | - is_initialized = true; | ||
| 594 | -} | ||
| 595 | - | ||
| 596 | -static void __init omap_vc_init(struct voltagedomain *voltdm) | ||
| 597 | -{ | ||
| 598 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 599 | - u32 vc_val; | ||
| 600 | - | ||
| 601 | - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { | ||
| 602 | - pr_err("%s: PMIC info requried to configure vc for" | ||
| 603 | - "vdd_%s not populated.Hence cannot initialize vc\n", | ||
| 604 | - __func__, voltdm->name); | ||
| 605 | - return; | ||
| 606 | - } | ||
| 607 | - | ||
| 608 | - if (!vdd->read_reg || !vdd->write_reg) { | ||
| 609 | - pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 610 | - __func__, voltdm->name); | ||
| 611 | - return; | ||
| 612 | - } | ||
| 613 | - | ||
| 614 | - /* Set up the SMPS_SA(i2c slave address in VC */ | ||
| 615 | - vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, | ||
| 616 | - vdd->vc_data->vc_common->smps_sa_reg); | ||
| 617 | - vc_val &= ~vdd->vc_data->smps_sa_mask; | ||
| 618 | - vc_val |= vdd->pmic_info->i2c_slave_addr << vdd->vc_data->smps_sa_shift; | ||
| 619 | - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, | ||
| 620 | - vdd->vc_data->vc_common->smps_sa_reg); | ||
| 621 | - | ||
| 622 | - /* Setup the VOLRA(pmic reg addr) in VC */ | ||
| 623 | - vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, | ||
| 624 | - vdd->vc_data->vc_common->smps_volra_reg); | ||
| 625 | - vc_val &= ~vdd->vc_data->smps_volra_mask; | ||
| 626 | - vc_val |= vdd->pmic_info->pmic_reg << vdd->vc_data->smps_volra_shift; | ||
| 627 | - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, | ||
| 628 | - vdd->vc_data->vc_common->smps_volra_reg); | ||
| 629 | - | ||
| 630 | - /* Configure the setup times */ | ||
| 631 | - vc_val = vdd->read_reg(vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 632 | - vc_val &= ~vdd->vfsm->voltsetup_mask; | ||
| 633 | - vc_val |= vdd->pmic_info->volt_setup_time << | ||
| 634 | - vdd->vfsm->voltsetup_shift; | ||
| 635 | - vdd->write_reg(vc_val, vdd->vc_data->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 636 | - | ||
| 637 | - if (cpu_is_omap34xx()) | ||
| 638 | - omap3_vc_init(voltdm); | ||
| 639 | - else if (cpu_is_omap44xx()) | ||
| 640 | - omap4_vc_init(voltdm); | ||
| 641 | -} | ||
| 642 | - | ||
| 643 | static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) | ||
| 644 | { | ||
| 645 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 646 | @@ -1025,7 +769,7 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, | ||
| 647 | vdd->volt_scale = vp_forceupdate_scale_voltage; | ||
| 648 | return; | ||
| 649 | case VOLTSCALE_VCBYPASS: | ||
| 650 | - vdd->volt_scale = vc_bypass_scale_voltage; | ||
| 651 | + vdd->volt_scale = omap_vc_bypass_scale_voltage; | ||
| 652 | return; | ||
| 653 | default: | ||
| 654 | pr_warning("%s: Trying to change the method of voltage scaling" | ||
| 655 | @@ -1061,7 +805,7 @@ int __init omap_voltage_late_init(void) | ||
| 656 | if (voltdm->vdd) { | ||
| 657 | if (omap_vdd_data_configure(voltdm)) | ||
| 658 | continue; | ||
| 659 | - omap_vc_init(voltdm); | ||
| 660 | + omap_vc_init_channel(voltdm); | ||
| 661 | vp_init(voltdm); | ||
| 662 | vdd_debugfs_init(voltdm); | ||
| 663 | } | ||
| 664 | -- | ||
| 665 | 1.7.2.5 | ||
| 666 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0110-OMAP2-voltage-move-VC-into-struct-voltagedomain-misc.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0110-OMAP2-voltage-move-VC-into-struct-voltagedomain-misc.patch deleted file mode 100644 index feb72d10..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0110-OMAP2-voltage-move-VC-into-struct-voltagedomain-misc.patch +++ /dev/null | |||
| @@ -1,544 +0,0 @@ | |||
| 1 | From 4b4aeca96cd144542cd21035d13885d9ef0b6980 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Tue, 22 Mar 2011 16:14:57 -0700 | ||
| 4 | Subject: [PATCH 110/149] OMAP2+: voltage: move VC into struct voltagedomain, misc. renames | ||
| 5 | |||
| 6 | Move the VC instance struct from omap_vdd_info into struct voltagedomain. | ||
| 7 | While moving, perform some misc. renames for readability. | ||
| 8 | |||
| 9 | No functional changes. | ||
| 10 | |||
| 11 | Summary of renames: | ||
| 12 | - rename omap_vc_instance to omap_vc_channel, since there is only | ||
| 13 | one instance of the VC IP and this actually represents channels | ||
| 14 | using TRM terminology. | ||
| 15 | - rename 'vc_common' field of VC channel which led to: | ||
| 16 | s/vc->vc_common/vc->common/ | ||
| 17 | - remove redundant '_data' suffix | ||
| 18 | - OMAP3: vc1 --> vc_mpu, vc2 --> vc_core | ||
| 19 | - omap_vc_bypass_scale_voltage() -> omap_vc_bypass_scale() | ||
| 20 | |||
| 21 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 22 | |||
| 23 | merge | ||
| 24 | --- | ||
| 25 | arch/arm/mach-omap2/vc.c | 90 ++++++++++++------------- | ||
| 26 | arch/arm/mach-omap2/vc.h | 26 ++++---- | ||
| 27 | arch/arm/mach-omap2/vc3xxx_data.c | 10 ++-- | ||
| 28 | arch/arm/mach-omap2/vc44xx_data.c | 14 ++-- | ||
| 29 | arch/arm/mach-omap2/voltage.c | 6 +- | ||
| 30 | arch/arm/mach-omap2/voltage.h | 5 +- | ||
| 31 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 4 +- | ||
| 32 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 6 +- | ||
| 33 | 8 files changed, 80 insertions(+), 81 deletions(-) | ||
| 34 | |||
| 35 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 36 | index 98f5a4b..7643940 100644 | ||
| 37 | --- a/arch/arm/mach-omap2/vc.c | ||
| 38 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 39 | @@ -15,14 +15,12 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 40 | unsigned long target_volt, | ||
| 41 | u8 *target_vsel, u8 *current_vsel) | ||
| 42 | { | ||
| 43 | - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 44 | + struct omap_vc_channel *vc = voltdm->vc; | ||
| 45 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 46 | struct omap_volt_data *volt_data; | ||
| 47 | - const struct omap_vc_common_data *vc_common; | ||
| 48 | const struct omap_vp_common_data *vp_common; | ||
| 49 | u32 vc_cmdval, vp_errgain_val; | ||
| 50 | |||
| 51 | - vc_common = vc->vc_common; | ||
| 52 | vp_common = vdd->vp_data->vp_common; | ||
| 53 | |||
| 54 | /* Check if sufficient pmic info is available for this vdd */ | ||
| 55 | @@ -54,10 +52,10 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 56 | *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); | ||
| 57 | |||
| 58 | /* Setting the ON voltage to the new target voltage */ | ||
| 59 | - vc_cmdval = vdd->read_reg(vc->vc_common->prm_mod, vc->cmdval_reg); | ||
| 60 | - vc_cmdval &= ~vc_common->cmd_on_mask; | ||
| 61 | - vc_cmdval |= (*target_vsel << vc_common->cmd_on_shift); | ||
| 62 | - vdd->write_reg(vc_cmdval, vc->vc_common->prm_mod, vc->cmdval_reg); | ||
| 63 | + vc_cmdval = vdd->read_reg(vc->common->prm_mod, vc->cmdval_reg); | ||
| 64 | + vc_cmdval &= ~vc->common->cmd_on_mask; | ||
| 65 | + vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); | ||
| 66 | + vdd->write_reg(vc_cmdval, vc->common->prm_mod, vc->cmdval_reg); | ||
| 67 | |||
| 68 | /* Setting vp errorgain based on the voltage */ | ||
| 69 | if (volt_data) { | ||
| 70 | @@ -90,11 +88,11 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, | ||
| 71 | vdd->curr_volt = target_volt; | ||
| 72 | } | ||
| 73 | |||
| 74 | -/* vc_bypass_scale_voltage - VC bypass method of voltage scaling */ | ||
| 75 | -int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, | ||
| 76 | - unsigned long target_volt) | ||
| 77 | +/* vc_bypass_scale - VC bypass method of voltage scaling */ | ||
| 78 | +int omap_vc_bypass_scale(struct voltagedomain *voltdm, | ||
| 79 | + unsigned long target_volt) | ||
| 80 | { | ||
| 81 | - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 82 | + struct omap_vc_channel *vc = voltdm->vc; | ||
| 83 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 84 | u32 loop_cnt = 0, retries_cnt = 0; | ||
| 85 | u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; | ||
| 86 | @@ -105,19 +103,19 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, | ||
| 87 | if (ret) | ||
| 88 | return ret; | ||
| 89 | |||
| 90 | - vc_valid = vc->vc_common->valid; | ||
| 91 | - vc_bypass_val_reg = vc->vc_common->bypass_val_reg; | ||
| 92 | - vc_bypass_value = (target_vsel << vc->vc_common->data_shift) | | ||
| 93 | + vc_valid = vc->common->valid; | ||
| 94 | + vc_bypass_val_reg = vc->common->bypass_val_reg; | ||
| 95 | + vc_bypass_value = (target_vsel << vc->common->data_shift) | | ||
| 96 | (vdd->pmic_info->pmic_reg << | ||
| 97 | - vc->vc_common->regaddr_shift) | | ||
| 98 | + vc->common->regaddr_shift) | | ||
| 99 | (vdd->pmic_info->i2c_slave_addr << | ||
| 100 | - vc->vc_common->slaveaddr_shift); | ||
| 101 | + vc->common->slaveaddr_shift); | ||
| 102 | |||
| 103 | - vdd->write_reg(vc_bypass_value, vc->vc_common->prm_mod, vc_bypass_val_reg); | ||
| 104 | - vdd->write_reg(vc_bypass_value | vc_valid, vc->vc_common->prm_mod, | ||
| 105 | + vdd->write_reg(vc_bypass_value, vc->common->prm_mod, vc_bypass_val_reg); | ||
| 106 | + vdd->write_reg(vc_bypass_value | vc_valid, vc->common->prm_mod, | ||
| 107 | vc_bypass_val_reg); | ||
| 108 | |||
| 109 | - vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, vc_bypass_val_reg); | ||
| 110 | + vc_bypass_value = vdd->read_reg(vc->common->prm_mod, vc_bypass_val_reg); | ||
| 111 | /* | ||
| 112 | * Loop till the bypass command is acknowledged from the SMPS. | ||
| 113 | * NOTE: This is legacy code. The loop count and retry count needs | ||
| 114 | @@ -136,7 +134,7 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, | ||
| 115 | loop_cnt = 0; | ||
| 116 | udelay(10); | ||
| 117 | } | ||
| 118 | - vc_bypass_value = vdd->read_reg(vc->vc_common->prm_mod, | ||
| 119 | + vc_bypass_value = vdd->read_reg(vc->common->prm_mod, | ||
| 120 | vc_bypass_val_reg); | ||
| 121 | } | ||
| 122 | |||
| 123 | @@ -146,23 +144,23 @@ int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, | ||
| 124 | |||
| 125 | static void __init omap3_vfsm_init(struct voltagedomain *voltdm) | ||
| 126 | { | ||
| 127 | - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 128 | + struct omap_vc_channel *vc = voltdm->vc; | ||
| 129 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 130 | |||
| 131 | /* | ||
| 132 | * Voltage Manager FSM parameters init | ||
| 133 | * XXX This data should be passed in from the board file | ||
| 134 | */ | ||
| 135 | - vdd->write_reg(OMAP3_CLKSETUP, vc->vc_common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); | ||
| 136 | - vdd->write_reg(OMAP3_VOLTOFFSET, vc->vc_common->prm_mod, | ||
| 137 | + vdd->write_reg(OMAP3_CLKSETUP, vc->common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); | ||
| 138 | + vdd->write_reg(OMAP3_VOLTOFFSET, vc->common->prm_mod, | ||
| 139 | OMAP3_PRM_VOLTOFFSET_OFFSET); | ||
| 140 | - vdd->write_reg(OMAP3_VOLTSETUP2, vc->vc_common->prm_mod, | ||
| 141 | + vdd->write_reg(OMAP3_VOLTSETUP2, vc->common->prm_mod, | ||
| 142 | OMAP3_PRM_VOLTSETUP2_OFFSET); | ||
| 143 | } | ||
| 144 | |||
| 145 | static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) | ||
| 146 | { | ||
| 147 | - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 148 | + struct omap_vc_channel *vc = voltdm->vc; | ||
| 149 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 150 | static bool is_initialized; | ||
| 151 | u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; | ||
| 152 | @@ -176,19 +174,19 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) | ||
| 153 | onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); | ||
| 154 | ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); | ||
| 155 | off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); | ||
| 156 | - vc_val = ((on_vsel << vc->vc_common->cmd_on_shift) | | ||
| 157 | - (onlp_vsel << vc->vc_common->cmd_onlp_shift) | | ||
| 158 | - (ret_vsel << vc->vc_common->cmd_ret_shift) | | ||
| 159 | - (off_vsel << vc->vc_common->cmd_off_shift)); | ||
| 160 | - vdd->write_reg(vc_val, vc->vc_common->prm_mod, vc->cmdval_reg); | ||
| 161 | + vc_val = ((on_vsel << vc->common->cmd_on_shift) | | ||
| 162 | + (onlp_vsel << vc->common->cmd_onlp_shift) | | ||
| 163 | + (ret_vsel << vc->common->cmd_ret_shift) | | ||
| 164 | + (off_vsel << vc->common->cmd_off_shift)); | ||
| 165 | + vdd->write_reg(vc_val, vc->common->prm_mod, vc->cmdval_reg); | ||
| 166 | |||
| 167 | /* | ||
| 168 | * Generic VC parameters init | ||
| 169 | * XXX This data should be abstracted out | ||
| 170 | */ | ||
| 171 | - vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->vc_common->prm_mod, | ||
| 172 | + vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->common->prm_mod, | ||
| 173 | OMAP3_PRM_VC_CH_CONF_OFFSET); | ||
| 174 | - vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->vc_common->prm_mod, | ||
| 175 | + vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->common->prm_mod, | ||
| 176 | OMAP3_PRM_VC_I2C_CFG_OFFSET); | ||
| 177 | |||
| 178 | omap3_vfsm_init(voltdm); | ||
| 179 | @@ -200,7 +198,7 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) | ||
| 180 | /* OMAP4 specific voltage init functions */ | ||
| 181 | static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) | ||
| 182 | { | ||
| 183 | - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 184 | + struct omap_vc_channel *vc = voltdm->vc; | ||
| 185 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 186 | static bool is_initialized; | ||
| 187 | u32 vc_val; | ||
| 188 | @@ -217,18 +215,18 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) | ||
| 189 | vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | | ||
| 190 | OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | | ||
| 191 | OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); | ||
| 192 | - vdd->write_reg(vc_val, vc->vc_common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); | ||
| 193 | + vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); | ||
| 194 | |||
| 195 | /* XXX These are magic numbers and do not belong! */ | ||
| 196 | vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); | ||
| 197 | - vdd->write_reg(vc_val, vc->vc_common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); | ||
| 198 | + vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); | ||
| 199 | |||
| 200 | is_initialized = true; | ||
| 201 | } | ||
| 202 | |||
| 203 | void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 204 | { | ||
| 205 | - struct omap_vc_instance_data *vc = voltdm->vdd->vc_data; | ||
| 206 | + struct omap_vc_channel *vc = voltdm->vc; | ||
| 207 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 208 | u32 vc_val; | ||
| 209 | |||
| 210 | @@ -246,27 +244,27 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 211 | } | ||
| 212 | |||
| 213 | /* Set up the SMPS_SA(i2c slave address in VC */ | ||
| 214 | - vc_val = vdd->read_reg(vc->vc_common->prm_mod, | ||
| 215 | - vc->vc_common->smps_sa_reg); | ||
| 216 | + vc_val = vdd->read_reg(vc->common->prm_mod, | ||
| 217 | + vc->common->smps_sa_reg); | ||
| 218 | vc_val &= ~vc->smps_sa_mask; | ||
| 219 | vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; | ||
| 220 | - vdd->write_reg(vc_val, vc->vc_common->prm_mod, | ||
| 221 | - vc->vc_common->smps_sa_reg); | ||
| 222 | + vdd->write_reg(vc_val, vc->common->prm_mod, | ||
| 223 | + vc->common->smps_sa_reg); | ||
| 224 | |||
| 225 | /* Setup the VOLRA(pmic reg addr) in VC */ | ||
| 226 | - vc_val = vdd->read_reg(vc->vc_common->prm_mod, | ||
| 227 | - vc->vc_common->smps_volra_reg); | ||
| 228 | + vc_val = vdd->read_reg(vc->common->prm_mod, | ||
| 229 | + vc->common->smps_volra_reg); | ||
| 230 | vc_val &= ~vc->smps_volra_mask; | ||
| 231 | vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift; | ||
| 232 | - vdd->write_reg(vc_val, vc->vc_common->prm_mod, | ||
| 233 | - vc->vc_common->smps_volra_reg); | ||
| 234 | + vdd->write_reg(vc_val, vc->common->prm_mod, | ||
| 235 | + vc->common->smps_volra_reg); | ||
| 236 | |||
| 237 | /* Configure the setup times */ | ||
| 238 | - vc_val = vdd->read_reg(vc->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 239 | + vc_val = vdd->read_reg(vc->common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 240 | vc_val &= ~vdd->vfsm->voltsetup_mask; | ||
| 241 | vc_val |= vdd->pmic_info->volt_setup_time << | ||
| 242 | vdd->vfsm->voltsetup_shift; | ||
| 243 | - vdd->write_reg(vc_val, vc->vc_common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 244 | + vdd->write_reg(vc_val, vc->common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 245 | |||
| 246 | if (cpu_is_omap34xx()) | ||
| 247 | omap3_vc_init_channel(voltdm); | ||
| 248 | diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h | ||
| 249 | index d0bf348..51d36a8 100644 | ||
| 250 | --- a/arch/arm/mach-omap2/vc.h | ||
| 251 | +++ b/arch/arm/mach-omap2/vc.h | ||
| 252 | @@ -22,7 +22,7 @@ | ||
| 253 | struct voltagedomain; | ||
| 254 | |||
| 255 | /** | ||
| 256 | - * struct omap_vc_common_data - per-VC register/bitfield data | ||
| 257 | + * struct omap_vc_common - per-VC register/bitfield data | ||
| 258 | * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register | ||
| 259 | * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register | ||
| 260 | * @prm_mod: PRM module id used for PRM register access | ||
| 261 | @@ -40,7 +40,7 @@ struct voltagedomain; | ||
| 262 | * XXX One of cmd_on_mask and cmd_on_shift are not needed | ||
| 263 | * XXX VALID should probably be a shift, not a mask | ||
| 264 | */ | ||
| 265 | -struct omap_vc_common_data { | ||
| 266 | +struct omap_vc_common { | ||
| 267 | u32 cmd_on_mask; | ||
| 268 | u32 valid; | ||
| 269 | s16 prm_mod; | ||
| 270 | @@ -57,8 +57,8 @@ struct omap_vc_common_data { | ||
| 271 | }; | ||
| 272 | |||
| 273 | /** | ||
| 274 | - * struct omap_vc_instance_data - VC per-instance data | ||
| 275 | - * @vc_common: pointer to VC common data for this platform | ||
| 276 | + * struct omap_vc_channel - VC per-instance data | ||
| 277 | + * @common: pointer to VC common data for this platform | ||
| 278 | * @smps_sa_mask: SA* bitmask in the PRM_VC_SMPS_SA register | ||
| 279 | * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register | ||
| 280 | * @smps_sa_shift: SA* field shift in the PRM_VC_SMPS_SA register | ||
| 281 | @@ -67,8 +67,8 @@ struct omap_vc_common_data { | ||
| 282 | * XXX It is not necessary to have both a *_mask and a *_shift - | ||
| 283 | * remove one | ||
| 284 | */ | ||
| 285 | -struct omap_vc_instance_data { | ||
| 286 | - const struct omap_vc_common_data *vc_common; | ||
| 287 | +struct omap_vc_channel { | ||
| 288 | + const struct omap_vc_common *common; | ||
| 289 | u32 smps_sa_mask; | ||
| 290 | u32 smps_volra_mask; | ||
| 291 | u8 cmdval_reg; | ||
| 292 | @@ -76,12 +76,12 @@ struct omap_vc_instance_data { | ||
| 293 | u8 smps_volra_shift; | ||
| 294 | }; | ||
| 295 | |||
| 296 | -extern struct omap_vc_instance_data omap3_vc1_data; | ||
| 297 | -extern struct omap_vc_instance_data omap3_vc2_data; | ||
| 298 | +extern struct omap_vc_channel omap3_vc_mpu; | ||
| 299 | +extern struct omap_vc_channel omap3_vc_core; | ||
| 300 | |||
| 301 | -extern struct omap_vc_instance_data omap4_vc_mpu_data; | ||
| 302 | -extern struct omap_vc_instance_data omap4_vc_iva_data; | ||
| 303 | -extern struct omap_vc_instance_data omap4_vc_core_data; | ||
| 304 | +extern struct omap_vc_channel omap4_vc_mpu; | ||
| 305 | +extern struct omap_vc_channel omap4_vc_iva; | ||
| 306 | +extern struct omap_vc_channel omap4_vc_core; | ||
| 307 | |||
| 308 | void omap_vc_init_channel(struct voltagedomain *voltdm); | ||
| 309 | int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 310 | @@ -90,8 +90,8 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 311 | void omap_vc_post_scale(struct voltagedomain *voltdm, | ||
| 312 | unsigned long target_volt, | ||
| 313 | u8 target_vsel, u8 current_vsel); | ||
| 314 | -int omap_vc_bypass_scale_voltage(struct voltagedomain *voltdm, | ||
| 315 | - unsigned long target_volt); | ||
| 316 | +int omap_vc_bypass_scale(struct voltagedomain *voltdm, | ||
| 317 | + unsigned long target_volt); | ||
| 318 | |||
| 319 | #endif | ||
| 320 | |||
| 321 | diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 322 | index 55caccb..1a17ed4 100644 | ||
| 323 | --- a/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 324 | +++ b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 325 | @@ -29,7 +29,7 @@ | ||
| 326 | * VC data common to 34xx/36xx chips | ||
| 327 | * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. | ||
| 328 | */ | ||
| 329 | -static struct omap_vc_common_data omap3_vc_common = { | ||
| 330 | +static struct omap_vc_common omap3_vc_common = { | ||
| 331 | .prm_mod = OMAP3430_GR_MOD, | ||
| 332 | .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, | ||
| 333 | .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, | ||
| 334 | @@ -45,8 +45,8 @@ static struct omap_vc_common_data omap3_vc_common = { | ||
| 335 | .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, | ||
| 336 | }; | ||
| 337 | |||
| 338 | -struct omap_vc_instance_data omap3_vc1_data = { | ||
| 339 | - .vc_common = &omap3_vc_common, | ||
| 340 | +struct omap_vc_channel omap3_vc_mpu = { | ||
| 341 | + .common = &omap3_vc_common, | ||
| 342 | .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, | ||
| 343 | .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, | ||
| 344 | .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, | ||
| 345 | @@ -54,8 +54,8 @@ struct omap_vc_instance_data omap3_vc1_data = { | ||
| 346 | .smps_volra_mask = OMAP3430_VOLRA0_MASK, | ||
| 347 | }; | ||
| 348 | |||
| 349 | -struct omap_vc_instance_data omap3_vc2_data = { | ||
| 350 | - .vc_common = &omap3_vc_common, | ||
| 351 | +struct omap_vc_channel omap3_vc_core = { | ||
| 352 | + .common = &omap3_vc_common, | ||
| 353 | .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, | ||
| 354 | .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, | ||
| 355 | .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, | ||
| 356 | diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 357 | index b62678e..56f3f4a 100644 | ||
| 358 | --- a/arch/arm/mach-omap2/vc44xx_data.c | ||
| 359 | +++ b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 360 | @@ -30,7 +30,7 @@ | ||
| 361 | * VC data common to 44xx chips | ||
| 362 | * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. | ||
| 363 | */ | ||
| 364 | -static const struct omap_vc_common_data omap4_vc_common = { | ||
| 365 | +static const struct omap_vc_common omap4_vc_common = { | ||
| 366 | .prm_mod = OMAP4430_PRM_DEVICE_INST, | ||
| 367 | .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, | ||
| 368 | .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, | ||
| 369 | @@ -47,8 +47,8 @@ static const struct omap_vc_common_data omap4_vc_common = { | ||
| 370 | }; | ||
| 371 | |||
| 372 | /* VC instance data for each controllable voltage line */ | ||
| 373 | -struct omap_vc_instance_data omap4_vc_mpu_data = { | ||
| 374 | - .vc_common = &omap4_vc_common, | ||
| 375 | +struct omap_vc_channel omap4_vc_mpu = { | ||
| 376 | + .common = &omap4_vc_common, | ||
| 377 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, | ||
| 378 | .smps_sa_shift = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT, | ||
| 379 | .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, | ||
| 380 | @@ -56,8 +56,8 @@ struct omap_vc_instance_data omap4_vc_mpu_data = { | ||
| 381 | .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, | ||
| 382 | }; | ||
| 383 | |||
| 384 | -struct omap_vc_instance_data omap4_vc_iva_data = { | ||
| 385 | - .vc_common = &omap4_vc_common, | ||
| 386 | +struct omap_vc_channel omap4_vc_iva = { | ||
| 387 | + .common = &omap4_vc_common, | ||
| 388 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, | ||
| 389 | .smps_sa_shift = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT, | ||
| 390 | .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, | ||
| 391 | @@ -65,8 +65,8 @@ struct omap_vc_instance_data omap4_vc_iva_data = { | ||
| 392 | .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, | ||
| 393 | }; | ||
| 394 | |||
| 395 | -struct omap_vc_instance_data omap4_vc_core_data = { | ||
| 396 | - .vc_common = &omap4_vc_common, | ||
| 397 | +struct omap_vc_channel omap4_vc_core = { | ||
| 398 | + .common = &omap4_vc_common, | ||
| 399 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, | ||
| 400 | .smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT, | ||
| 401 | .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, | ||
| 402 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 403 | index 6ba6e49..c6352e3 100644 | ||
| 404 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 405 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 406 | @@ -769,7 +769,7 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, | ||
| 407 | vdd->volt_scale = vp_forceupdate_scale_voltage; | ||
| 408 | return; | ||
| 409 | case VOLTSCALE_VCBYPASS: | ||
| 410 | - vdd->volt_scale = omap_vc_bypass_scale_voltage; | ||
| 411 | + vdd->volt_scale = omap_vc_bypass_scale; | ||
| 412 | return; | ||
| 413 | default: | ||
| 414 | pr_warning("%s: Trying to change the method of voltage scaling" | ||
| 415 | @@ -802,10 +802,12 @@ int __init omap_voltage_late_init(void) | ||
| 416 | if (!voltdm->scalable) | ||
| 417 | continue; | ||
| 418 | |||
| 419 | + if (voltdm->vc) | ||
| 420 | + omap_vc_init_channel(voltdm); | ||
| 421 | + | ||
| 422 | if (voltdm->vdd) { | ||
| 423 | if (omap_vdd_data_configure(voltdm)) | ||
| 424 | continue; | ||
| 425 | - omap_vc_init_channel(voltdm); | ||
| 426 | vp_init(voltdm); | ||
| 427 | vdd_debugfs_init(voltdm); | ||
| 428 | } | ||
| 429 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 430 | index b41d9f1..b06e03f 100644 | ||
| 431 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 432 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 433 | @@ -66,6 +66,8 @@ struct voltagedomain { | ||
| 434 | bool scalable; | ||
| 435 | struct list_head node; | ||
| 436 | struct list_head pwrdm_list; | ||
| 437 | + struct omap_vc_channel *vc; | ||
| 438 | + | ||
| 439 | struct omap_vdd_info *vdd; | ||
| 440 | }; | ||
| 441 | |||
| 442 | @@ -125,8 +127,6 @@ struct omap_volt_pmic_info { | ||
| 443 | * @vp_data : the register values, shifts, masks for various | ||
| 444 | * vp registers | ||
| 445 | * @vp_rt_data : VP data derived at runtime, not predefined | ||
| 446 | - * @vc_data : structure containing various various vc registers, | ||
| 447 | - * shifts, masks etc. | ||
| 448 | * @vfsm : voltage manager FSM data | ||
| 449 | * @debug_dir : debug directory for this voltage domain. | ||
| 450 | * @curr_volt : current voltage for this vdd. | ||
| 451 | @@ -139,7 +139,6 @@ struct omap_vdd_info { | ||
| 452 | struct omap_volt_pmic_info *pmic_info; | ||
| 453 | struct omap_vp_instance_data *vp_data; | ||
| 454 | struct omap_vp_runtime_data vp_rt_data; | ||
| 455 | - struct omap_vc_instance_data *vc_data; | ||
| 456 | const struct omap_vfsm_instance_data *vfsm; | ||
| 457 | struct dentry *debug_dir; | ||
| 458 | u32 curr_volt; | ||
| 459 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 460 | index d7e1052..7cb27ec 100644 | ||
| 461 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 462 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 463 | @@ -41,7 +41,6 @@ static struct omap_vdd_info omap3_vdd1_info = { | ||
| 464 | .prm_irqst_mod = OCP_MOD, | ||
| 465 | .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 466 | .vp_data = &omap3_vp1_data, | ||
| 467 | - .vc_data = &omap3_vc1_data, | ||
| 468 | .vfsm = &omap3_vdd1_vfsm_data, | ||
| 469 | }; | ||
| 470 | |||
| 471 | @@ -55,19 +54,20 @@ static struct omap_vdd_info omap3_vdd2_info = { | ||
| 472 | .prm_irqst_mod = OCP_MOD, | ||
| 473 | .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 474 | .vp_data = &omap3_vp2_data, | ||
| 475 | - .vc_data = &omap3_vc2_data, | ||
| 476 | .vfsm = &omap3_vdd2_vfsm_data, | ||
| 477 | }; | ||
| 478 | |||
| 479 | static struct voltagedomain omap3_voltdm_mpu = { | ||
| 480 | .name = "mpu_iva", | ||
| 481 | .scalable = true, | ||
| 482 | + .vc = &omap3_vc_mpu, | ||
| 483 | .vdd = &omap3_vdd1_info, | ||
| 484 | }; | ||
| 485 | |||
| 486 | static struct voltagedomain omap3_voltdm_core = { | ||
| 487 | .name = "core", | ||
| 488 | .scalable = true, | ||
| 489 | + .vc = &omap3_vc_core, | ||
| 490 | .vdd = &omap3_vdd2_info, | ||
| 491 | }; | ||
| 492 | |||
| 493 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 494 | index 9a17b5e..a05d90a 100644 | ||
| 495 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 496 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 497 | @@ -40,7 +40,6 @@ static struct omap_vdd_info omap4_vdd_mpu_info = { | ||
| 498 | .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 499 | .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, | ||
| 500 | .vp_data = &omap4_vp_mpu_data, | ||
| 501 | - .vc_data = &omap4_vc_mpu_data, | ||
| 502 | .vfsm = &omap4_vdd_mpu_vfsm_data, | ||
| 503 | }; | ||
| 504 | |||
| 505 | @@ -52,7 +51,6 @@ static struct omap_vdd_info omap4_vdd_iva_info = { | ||
| 506 | .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 507 | .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 508 | .vp_data = &omap4_vp_iva_data, | ||
| 509 | - .vc_data = &omap4_vc_iva_data, | ||
| 510 | .vfsm = &omap4_vdd_iva_vfsm_data, | ||
| 511 | }; | ||
| 512 | |||
| 513 | @@ -64,25 +62,27 @@ static struct omap_vdd_info omap4_vdd_core_info = { | ||
| 514 | .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 515 | .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 516 | .vp_data = &omap4_vp_core_data, | ||
| 517 | - .vc_data = &omap4_vc_core_data, | ||
| 518 | .vfsm = &omap4_vdd_core_vfsm_data, | ||
| 519 | }; | ||
| 520 | |||
| 521 | static struct voltagedomain omap4_voltdm_mpu = { | ||
| 522 | .name = "mpu", | ||
| 523 | .scalable = true, | ||
| 524 | + .vc = &omap4_vc_mpu, | ||
| 525 | .vdd = &omap4_vdd_mpu_info, | ||
| 526 | }; | ||
| 527 | |||
| 528 | static struct voltagedomain omap4_voltdm_iva = { | ||
| 529 | .name = "iva", | ||
| 530 | .scalable = true, | ||
| 531 | + .vc = &omap4_vc_iva, | ||
| 532 | .vdd = &omap4_vdd_iva_info, | ||
| 533 | }; | ||
| 534 | |||
| 535 | static struct voltagedomain omap4_voltdm_core = { | ||
| 536 | .name = "core", | ||
| 537 | .scalable = true, | ||
| 538 | + .vc = &omap4_vc_core, | ||
| 539 | .vdd = &omap4_vdd_core_info, | ||
| 540 | }; | ||
| 541 | |||
| 542 | -- | ||
| 543 | 1.7.2.5 | ||
| 544 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0111-OMAP2-voltage-enable-VC-bypass-scale-method-when-VC-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0111-OMAP2-voltage-enable-VC-bypass-scale-method-when-VC-.patch deleted file mode 100644 index a5ad5b8e..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0111-OMAP2-voltage-enable-VC-bypass-scale-method-when-VC-.patch +++ /dev/null | |||
| @@ -1,37 +0,0 @@ | |||
| 1 | From 23a2e1563c2e0bf2c8162c8c91b2cf1f6007c669 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 18 Jul 2011 15:48:22 -0700 | ||
| 4 | Subject: [PATCH 111/149] OMAP2+: voltage: enable VC bypass scale method when VC is initialized | ||
| 5 | |||
| 6 | VC is initialized first, set default scaling method to VC bypass. | ||
| 7 | If/when VP is initialized, default scaling method will be changed to | ||
| 8 | VP force-update. | ||
| 9 | |||
| 10 | Enabling VC bypass as default as soon as VC is initialized allows for | ||
| 11 | VC bypass scaling to work when no VP is configured/initialized for a | ||
| 12 | given voltage domain. | ||
| 13 | |||
| 14 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 15 | --- | ||
| 16 | arch/arm/mach-omap2/voltage.c | 4 +++- | ||
| 17 | 1 files changed, 3 insertions(+), 1 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 20 | index c6352e3..e1a22a3 100644 | ||
| 21 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 22 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 23 | @@ -802,8 +802,10 @@ int __init omap_voltage_late_init(void) | ||
| 24 | if (!voltdm->scalable) | ||
| 25 | continue; | ||
| 26 | |||
| 27 | - if (voltdm->vc) | ||
| 28 | + if (voltdm->vc) { | ||
| 29 | + voltdm->vdd->volt_scale = omap_vc_bypass_scale; | ||
| 30 | omap_vc_init_channel(voltdm); | ||
| 31 | + } | ||
| 32 | |||
| 33 | if (voltdm->vdd) { | ||
| 34 | if (omap_vdd_data_configure(voltdm)) | ||
| 35 | -- | ||
| 36 | 1.7.2.5 | ||
| 37 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0112-OMAP2-voltage-split-out-voltage-processor-VP-code-in.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0112-OMAP2-voltage-split-out-voltage-processor-VP-code-in.patch deleted file mode 100644 index 095b5bf6..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0112-OMAP2-voltage-split-out-voltage-processor-VP-code-in.patch +++ /dev/null | |||
| @@ -1,874 +0,0 @@ | |||
| 1 | From 0d45741059eb1c21dd4c1f34083d1ecaed7fca96 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 21 Mar 2011 14:29:13 -0700 | ||
| 4 | Subject: [PATCH 112/149] OMAP2+: voltage: split out voltage processor (VP) code into new layer | ||
| 5 | |||
| 6 | This patch is primarily a move of VP specific code from voltage.c into | ||
| 7 | its own code in vp.c and adds prototypes to vp.h | ||
| 8 | |||
| 9 | No functional changes, except debugfs... | ||
| 10 | |||
| 11 | VP debugfs moved to 'vp' subdir of <debugfs>/voltage/ and 'vp_' | ||
| 12 | prefixes removed from all debugfs filenames. | ||
| 13 | |||
| 14 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 15 | --- | ||
| 16 | arch/arm/mach-omap2/Makefile | 2 +- | ||
| 17 | arch/arm/mach-omap2/voltage.c | 348 +------------------------------------- | ||
| 18 | arch/arm/mach-omap2/voltage.h | 3 - | ||
| 19 | arch/arm/mach-omap2/vp.c | 374 +++++++++++++++++++++++++++++++++++++++++ | ||
| 20 | arch/arm/mach-omap2/vp.h | 9 + | ||
| 21 | 5 files changed, 387 insertions(+), 349 deletions(-) | ||
| 22 | create mode 100644 arch/arm/mach-omap2/vp.c | ||
| 23 | |||
| 24 | diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile | ||
| 25 | index ecbf361..8e79ca5 100644 | ||
| 26 | --- a/arch/arm/mach-omap2/Makefile | ||
| 27 | +++ b/arch/arm/mach-omap2/Makefile | ||
| 28 | @@ -90,7 +90,7 @@ obj-$(CONFIG_ARCH_OMAP4) += prcm.o cm2xxx_3xxx.o cminst44xx.o \ | ||
| 29 | |||
| 30 | # OMAP voltage domains | ||
| 31 | ifeq ($(CONFIG_PM),y) | ||
| 32 | -voltagedomain-common := voltage.o vc.o | ||
| 33 | +voltagedomain-common := voltage.o vc.o vp.o | ||
| 34 | obj-$(CONFIG_ARCH_OMAP2) += $(voltagedomain-common) \ | ||
| 35 | voltagedomains2xxx_data.o | ||
| 36 | obj-$(CONFIG_ARCH_OMAP3) += $(voltagedomain-common) \ | ||
| 37 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 38 | index e1a22a3..9b9f019 100644 | ||
| 39 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 40 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 41 | @@ -46,10 +46,6 @@ static LIST_HEAD(voltdm_list); | ||
| 42 | #define VOLTAGE_DIR_SIZE 16 | ||
| 43 | static struct dentry *voltage_dir; | ||
| 44 | |||
| 45 | -/* Init function pointers */ | ||
| 46 | -static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, | ||
| 47 | - unsigned long target_volt); | ||
| 48 | - | ||
| 49 | static u32 omap3_voltage_read_reg(u16 mod, u8 offset) | ||
| 50 | { | ||
| 51 | return omap2_prm_read_mod_reg(mod, offset); | ||
| 52 | @@ -105,7 +101,7 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 53 | sys_clk_speed /= 1000; | ||
| 54 | |||
| 55 | /* Generic voltage parameters */ | ||
| 56 | - vdd->volt_scale = vp_forceupdate_scale_voltage; | ||
| 57 | + vdd->volt_scale = omap_vp_forceupdate_scale; | ||
| 58 | vdd->vp_enabled = false; | ||
| 59 | |||
| 60 | vdd->vp_rt_data.vpconfig_erroroffset = | ||
| 61 | @@ -127,30 +123,6 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 62 | return 0; | ||
| 63 | } | ||
| 64 | |||
| 65 | -/* Voltage debugfs support */ | ||
| 66 | -static int vp_volt_debug_get(void *data, u64 *val) | ||
| 67 | -{ | ||
| 68 | - struct voltagedomain *voltdm = (struct voltagedomain *)data; | ||
| 69 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 70 | - u8 vsel; | ||
| 71 | - | ||
| 72 | - if (!vdd) { | ||
| 73 | - pr_warning("Wrong paramater passed\n"); | ||
| 74 | - return -EINVAL; | ||
| 75 | - } | ||
| 76 | - | ||
| 77 | - vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); | ||
| 78 | - | ||
| 79 | - if (!vdd->pmic_info->vsel_to_uv) { | ||
| 80 | - pr_warning("PMIC function to convert vsel to voltage" | ||
| 81 | - "in uV not registerd\n"); | ||
| 82 | - return -EINVAL; | ||
| 83 | - } | ||
| 84 | - | ||
| 85 | - *val = vdd->pmic_info->vsel_to_uv(vsel); | ||
| 86 | - return 0; | ||
| 87 | -} | ||
| 88 | - | ||
| 89 | static int nom_volt_debug_get(void *data, u64 *val) | ||
| 90 | { | ||
| 91 | struct voltagedomain *voltdm = (struct voltagedomain *)data; | ||
| 92 | @@ -165,85 +137,8 @@ static int nom_volt_debug_get(void *data, u64 *val) | ||
| 93 | return 0; | ||
| 94 | } | ||
| 95 | |||
| 96 | -DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); | ||
| 97 | DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL, | ||
| 98 | "%llu\n"); | ||
| 99 | -static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 100 | -{ | ||
| 101 | - u32 vpconfig; | ||
| 102 | - unsigned long uvdc; | ||
| 103 | - char vsel; | ||
| 104 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 105 | - | ||
| 106 | - uvdc = omap_voltage_get_nom_volt(voltdm); | ||
| 107 | - if (!uvdc) { | ||
| 108 | - pr_warning("%s: unable to find current voltage for vdd_%s\n", | ||
| 109 | - __func__, voltdm->name); | ||
| 110 | - return; | ||
| 111 | - } | ||
| 112 | - | ||
| 113 | - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { | ||
| 114 | - pr_warning("%s: PMIC function to convert voltage in uV to" | ||
| 115 | - " vsel not registered\n", __func__); | ||
| 116 | - return; | ||
| 117 | - } | ||
| 118 | - | ||
| 119 | - vsel = vdd->pmic_info->uv_to_vsel(uvdc); | ||
| 120 | - | ||
| 121 | - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 122 | - vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvoltage_mask | | ||
| 123 | - vdd->vp_data->vp_common->vpconfig_initvdd); | ||
| 124 | - vpconfig |= vsel << vdd->vp_data->vp_common->vpconfig_initvoltage_shift; | ||
| 125 | - | ||
| 126 | - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 127 | - | ||
| 128 | - /* Trigger initVDD value copy to voltage processor */ | ||
| 129 | - vdd->write_reg((vpconfig | vdd->vp_data->vp_common->vpconfig_initvdd), | ||
| 130 | - vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 131 | - | ||
| 132 | - /* Clear initVDD copy trigger bit */ | ||
| 133 | - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 134 | -} | ||
| 135 | - | ||
| 136 | -/* Generic voltage init functions */ | ||
| 137 | -static void __init vp_init(struct voltagedomain *voltdm) | ||
| 138 | -{ | ||
| 139 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 140 | - u32 vp_val; | ||
| 141 | - | ||
| 142 | - if (!vdd->read_reg || !vdd->write_reg) { | ||
| 143 | - pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 144 | - __func__, voltdm->name); | ||
| 145 | - return; | ||
| 146 | - } | ||
| 147 | - | ||
| 148 | - vp_val = vdd->vp_rt_data.vpconfig_erroroffset | | ||
| 149 | - (vdd->vp_rt_data.vpconfig_errorgain << | ||
| 150 | - vdd->vp_data->vp_common->vpconfig_errorgain_shift) | | ||
| 151 | - vdd->vp_data->vp_common->vpconfig_timeouten; | ||
| 152 | - vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 153 | - | ||
| 154 | - vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << | ||
| 155 | - vdd->vp_data->vp_common->vstepmin_smpswaittimemin_shift) | | ||
| 156 | - (vdd->vp_rt_data.vstepmin_stepmin << | ||
| 157 | - vdd->vp_data->vp_common->vstepmin_stepmin_shift)); | ||
| 158 | - vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmin); | ||
| 159 | - | ||
| 160 | - vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << | ||
| 161 | - vdd->vp_data->vp_common->vstepmax_smpswaittimemax_shift) | | ||
| 162 | - (vdd->vp_rt_data.vstepmax_stepmax << | ||
| 163 | - vdd->vp_data->vp_common->vstepmax_stepmax_shift)); | ||
| 164 | - vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstepmax); | ||
| 165 | - | ||
| 166 | - vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << | ||
| 167 | - vdd->vp_data->vp_common->vlimitto_vddmax_shift) | | ||
| 168 | - (vdd->vp_rt_data.vlimitto_vddmin << | ||
| 169 | - vdd->vp_data->vp_common->vlimitto_vddmin_shift) | | ||
| 170 | - (vdd->vp_rt_data.vlimitto_timeout << | ||
| 171 | - vdd->vp_data->vp_common->vlimitto_timeout_shift)); | ||
| 172 | - vdd->write_reg(vp_val, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vlimitto); | ||
| 173 | -} | ||
| 174 | - | ||
| 175 | static void __init vdd_debugfs_init(struct voltagedomain *voltdm) | ||
| 176 | { | ||
| 177 | char *name; | ||
| 178 | @@ -268,125 +163,11 @@ static void __init vdd_debugfs_init(struct voltagedomain *voltdm) | ||
| 179 | return; | ||
| 180 | } | ||
| 181 | |||
| 182 | - (void) debugfs_create_x16("vp_errorgain", S_IRUGO, vdd->debug_dir, | ||
| 183 | - &(vdd->vp_rt_data.vpconfig_errorgain)); | ||
| 184 | - (void) debugfs_create_x16("vp_smpswaittimemin", S_IRUGO, | ||
| 185 | - vdd->debug_dir, | ||
| 186 | - &(vdd->vp_rt_data.vstepmin_smpswaittimemin)); | ||
| 187 | - (void) debugfs_create_x8("vp_stepmin", S_IRUGO, vdd->debug_dir, | ||
| 188 | - &(vdd->vp_rt_data.vstepmin_stepmin)); | ||
| 189 | - (void) debugfs_create_x16("vp_smpswaittimemax", S_IRUGO, | ||
| 190 | - vdd->debug_dir, | ||
| 191 | - &(vdd->vp_rt_data.vstepmax_smpswaittimemax)); | ||
| 192 | - (void) debugfs_create_x8("vp_stepmax", S_IRUGO, vdd->debug_dir, | ||
| 193 | - &(vdd->vp_rt_data.vstepmax_stepmax)); | ||
| 194 | - (void) debugfs_create_x8("vp_vddmax", S_IRUGO, vdd->debug_dir, | ||
| 195 | - &(vdd->vp_rt_data.vlimitto_vddmax)); | ||
| 196 | - (void) debugfs_create_x8("vp_vddmin", S_IRUGO, vdd->debug_dir, | ||
| 197 | - &(vdd->vp_rt_data.vlimitto_vddmin)); | ||
| 198 | - (void) debugfs_create_x16("vp_timeout", S_IRUGO, vdd->debug_dir, | ||
| 199 | - &(vdd->vp_rt_data.vlimitto_timeout)); | ||
| 200 | - (void) debugfs_create_file("curr_vp_volt", S_IRUGO, vdd->debug_dir, | ||
| 201 | - (void *) voltdm, &vp_volt_debug_fops); | ||
| 202 | (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, | ||
| 203 | vdd->debug_dir, (void *) voltdm, | ||
| 204 | &nom_volt_debug_fops); | ||
| 205 | } | ||
| 206 | |||
| 207 | -/* VP force update method of voltage scaling */ | ||
| 208 | -static int vp_forceupdate_scale_voltage(struct voltagedomain *voltdm, | ||
| 209 | - unsigned long target_volt) | ||
| 210 | -{ | ||
| 211 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 212 | - u32 vpconfig; | ||
| 213 | - u8 target_vsel, current_vsel; | ||
| 214 | - int ret, timeout = 0; | ||
| 215 | - | ||
| 216 | - ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); | ||
| 217 | - if (ret) | ||
| 218 | - return ret; | ||
| 219 | - | ||
| 220 | - /* | ||
| 221 | - * Clear all pending TransactionDone interrupt/status. Typical latency | ||
| 222 | - * is <3us | ||
| 223 | - */ | ||
| 224 | - while (timeout++ < VP_TRANXDONE_TIMEOUT) { | ||
| 225 | - vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, | ||
| 226 | - vdd->prm_irqst_mod, vdd->prm_irqst_reg); | ||
| 227 | - if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & | ||
| 228 | - vdd->vp_data->prm_irqst_data->tranxdone_status)) | ||
| 229 | - break; | ||
| 230 | - udelay(1); | ||
| 231 | - } | ||
| 232 | - if (timeout >= VP_TRANXDONE_TIMEOUT) { | ||
| 233 | - pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." | ||
| 234 | - "Voltage change aborted", __func__, voltdm->name); | ||
| 235 | - return -ETIMEDOUT; | ||
| 236 | - } | ||
| 237 | - | ||
| 238 | - /* Configure for VP-Force Update */ | ||
| 239 | - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 240 | - vpconfig &= ~(vdd->vp_data->vp_common->vpconfig_initvdd | | ||
| 241 | - vdd->vp_data->vp_common->vpconfig_forceupdate | | ||
| 242 | - vdd->vp_data->vp_common->vpconfig_initvoltage_mask); | ||
| 243 | - vpconfig |= ((target_vsel << | ||
| 244 | - vdd->vp_data->vp_common->vpconfig_initvoltage_shift)); | ||
| 245 | - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 246 | - | ||
| 247 | - /* Trigger initVDD value copy to voltage processor */ | ||
| 248 | - vpconfig |= vdd->vp_data->vp_common->vpconfig_initvdd; | ||
| 249 | - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 250 | - | ||
| 251 | - /* Force update of voltage */ | ||
| 252 | - vpconfig |= vdd->vp_data->vp_common->vpconfig_forceupdate; | ||
| 253 | - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 254 | - | ||
| 255 | - /* | ||
| 256 | - * Wait for TransactionDone. Typical latency is <200us. | ||
| 257 | - * Depends on SMPSWAITTIMEMIN/MAX and voltage change | ||
| 258 | - */ | ||
| 259 | - timeout = 0; | ||
| 260 | - omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, | ||
| 261 | - vdd->prm_irqst_reg) & | ||
| 262 | - vdd->vp_data->prm_irqst_data->tranxdone_status), | ||
| 263 | - VP_TRANXDONE_TIMEOUT, timeout); | ||
| 264 | - if (timeout >= VP_TRANXDONE_TIMEOUT) | ||
| 265 | - pr_err("%s: vdd_%s TRANXDONE timeout exceeded." | ||
| 266 | - "TRANXDONE never got set after the voltage update\n", | ||
| 267 | - __func__, voltdm->name); | ||
| 268 | - | ||
| 269 | - omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); | ||
| 270 | - | ||
| 271 | - /* | ||
| 272 | - * Disable TransactionDone interrupt , clear all status, clear | ||
| 273 | - * control registers | ||
| 274 | - */ | ||
| 275 | - timeout = 0; | ||
| 276 | - while (timeout++ < VP_TRANXDONE_TIMEOUT) { | ||
| 277 | - vdd->write_reg(vdd->vp_data->prm_irqst_data->tranxdone_status, | ||
| 278 | - vdd->prm_irqst_mod, vdd->prm_irqst_reg); | ||
| 279 | - if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & | ||
| 280 | - vdd->vp_data->prm_irqst_data->tranxdone_status)) | ||
| 281 | - break; | ||
| 282 | - udelay(1); | ||
| 283 | - } | ||
| 284 | - | ||
| 285 | - if (timeout >= VP_TRANXDONE_TIMEOUT) | ||
| 286 | - pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying" | ||
| 287 | - "to clear the TRANXDONE status\n", | ||
| 288 | - __func__, voltdm->name); | ||
| 289 | - | ||
| 290 | - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 291 | - /* Clear initVDD copy trigger bit */ | ||
| 292 | - vpconfig &= ~vdd->vp_data->vp_common->vpconfig_initvdd; | ||
| 293 | - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 294 | - /* Clear force bit */ | ||
| 295 | - vpconfig &= ~vdd->vp_data->vp_common->vpconfig_forceupdate; | ||
| 296 | - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 297 | - | ||
| 298 | - return 0; | ||
| 299 | -} | ||
| 300 | - | ||
| 301 | static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) | ||
| 302 | { | ||
| 303 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 304 | @@ -439,129 +220,6 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) | ||
| 305 | } | ||
| 306 | |||
| 307 | /** | ||
| 308 | - * omap_vp_get_curr_volt() - API to get the current vp voltage. | ||
| 309 | - * @voltdm: pointer to the VDD. | ||
| 310 | - * | ||
| 311 | - * This API returns the current voltage for the specified voltage processor | ||
| 312 | - */ | ||
| 313 | -unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) | ||
| 314 | -{ | ||
| 315 | - struct omap_vdd_info *vdd; | ||
| 316 | - u8 curr_vsel; | ||
| 317 | - | ||
| 318 | - if (!voltdm || IS_ERR(voltdm)) { | ||
| 319 | - pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 320 | - return 0; | ||
| 321 | - } | ||
| 322 | - | ||
| 323 | - vdd = voltdm->vdd; | ||
| 324 | - if (!vdd->read_reg) { | ||
| 325 | - pr_err("%s: No read API for reading vdd_%s regs\n", | ||
| 326 | - __func__, voltdm->name); | ||
| 327 | - return 0; | ||
| 328 | - } | ||
| 329 | - | ||
| 330 | - curr_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); | ||
| 331 | - | ||
| 332 | - if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { | ||
| 333 | - pr_warning("%s: PMIC function to convert vsel to voltage" | ||
| 334 | - "in uV not registerd\n", __func__); | ||
| 335 | - return 0; | ||
| 336 | - } | ||
| 337 | - | ||
| 338 | - return vdd->pmic_info->vsel_to_uv(curr_vsel); | ||
| 339 | -} | ||
| 340 | - | ||
| 341 | -/** | ||
| 342 | - * omap_vp_enable() - API to enable a particular VP | ||
| 343 | - * @voltdm: pointer to the VDD whose VP is to be enabled. | ||
| 344 | - * | ||
| 345 | - * This API enables a particular voltage processor. Needed by the smartreflex | ||
| 346 | - * class drivers. | ||
| 347 | - */ | ||
| 348 | -void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 349 | -{ | ||
| 350 | - struct omap_vdd_info *vdd; | ||
| 351 | - u32 vpconfig; | ||
| 352 | - | ||
| 353 | - if (!voltdm || IS_ERR(voltdm)) { | ||
| 354 | - pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 355 | - return; | ||
| 356 | - } | ||
| 357 | - | ||
| 358 | - vdd = voltdm->vdd; | ||
| 359 | - if (!vdd->read_reg || !vdd->write_reg) { | ||
| 360 | - pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 361 | - __func__, voltdm->name); | ||
| 362 | - return; | ||
| 363 | - } | ||
| 364 | - | ||
| 365 | - /* If VP is already enabled, do nothing. Return */ | ||
| 366 | - if (vdd->vp_enabled) | ||
| 367 | - return; | ||
| 368 | - | ||
| 369 | - vp_latch_vsel(voltdm); | ||
| 370 | - | ||
| 371 | - /* Enable VP */ | ||
| 372 | - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 373 | - vpconfig |= vdd->vp_data->vp_common->vpconfig_vpenable; | ||
| 374 | - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 375 | - vdd->vp_enabled = true; | ||
| 376 | -} | ||
| 377 | - | ||
| 378 | -/** | ||
| 379 | - * omap_vp_disable() - API to disable a particular VP | ||
| 380 | - * @voltdm: pointer to the VDD whose VP is to be disabled. | ||
| 381 | - * | ||
| 382 | - * This API disables a particular voltage processor. Needed by the smartreflex | ||
| 383 | - * class drivers. | ||
| 384 | - */ | ||
| 385 | -void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 386 | -{ | ||
| 387 | - struct omap_vdd_info *vdd; | ||
| 388 | - u32 vpconfig; | ||
| 389 | - int timeout; | ||
| 390 | - | ||
| 391 | - if (!voltdm || IS_ERR(voltdm)) { | ||
| 392 | - pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 393 | - return; | ||
| 394 | - } | ||
| 395 | - | ||
| 396 | - vdd = voltdm->vdd; | ||
| 397 | - if (!vdd->read_reg || !vdd->write_reg) { | ||
| 398 | - pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 399 | - __func__, voltdm->name); | ||
| 400 | - return; | ||
| 401 | - } | ||
| 402 | - | ||
| 403 | - /* If VP is already disabled, do nothing. Return */ | ||
| 404 | - if (!vdd->vp_enabled) { | ||
| 405 | - pr_warning("%s: Trying to disable VP for vdd_%s when" | ||
| 406 | - "it is already disabled\n", __func__, voltdm->name); | ||
| 407 | - return; | ||
| 408 | - } | ||
| 409 | - | ||
| 410 | - /* Disable VP */ | ||
| 411 | - vpconfig = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 412 | - vpconfig &= ~vdd->vp_data->vp_common->vpconfig_vpenable; | ||
| 413 | - vdd->write_reg(vpconfig, vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vpconfig); | ||
| 414 | - | ||
| 415 | - /* | ||
| 416 | - * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us | ||
| 417 | - */ | ||
| 418 | - omap_test_timeout((vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->vstatus)), | ||
| 419 | - VP_IDLE_TIMEOUT, timeout); | ||
| 420 | - | ||
| 421 | - if (timeout >= VP_IDLE_TIMEOUT) | ||
| 422 | - pr_warning("%s: vdd_%s idle timedout\n", | ||
| 423 | - __func__, voltdm->name); | ||
| 424 | - | ||
| 425 | - vdd->vp_enabled = false; | ||
| 426 | - | ||
| 427 | - return; | ||
| 428 | -} | ||
| 429 | - | ||
| 430 | -/** | ||
| 431 | * omap_voltage_scale_vdd() - API to scale voltage of a particular | ||
| 432 | * voltage domain. | ||
| 433 | * @voltdm: pointer to the VDD which is to be scaled. | ||
| 434 | @@ -766,7 +424,7 @@ void omap_change_voltscale_method(struct voltagedomain *voltdm, | ||
| 435 | |||
| 436 | switch (voltscale_method) { | ||
| 437 | case VOLTSCALE_VPFORCEUPDATE: | ||
| 438 | - vdd->volt_scale = vp_forceupdate_scale_voltage; | ||
| 439 | + vdd->volt_scale = omap_vp_forceupdate_scale; | ||
| 440 | return; | ||
| 441 | case VOLTSCALE_VCBYPASS: | ||
| 442 | vdd->volt_scale = omap_vc_bypass_scale; | ||
| 443 | @@ -810,8 +468,8 @@ int __init omap_voltage_late_init(void) | ||
| 444 | if (voltdm->vdd) { | ||
| 445 | if (omap_vdd_data_configure(voltdm)) | ||
| 446 | continue; | ||
| 447 | - vp_init(voltdm); | ||
| 448 | vdd_debugfs_init(voltdm); | ||
| 449 | + omap_vp_init(voltdm); | ||
| 450 | } | ||
| 451 | } | ||
| 452 | |||
| 453 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 454 | index b06e03f..83fa239 100644 | ||
| 455 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 456 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 457 | @@ -152,9 +152,6 @@ struct omap_vdd_info { | ||
| 458 | unsigned long target_volt); | ||
| 459 | }; | ||
| 460 | |||
| 461 | -unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); | ||
| 462 | -void omap_vp_enable(struct voltagedomain *voltdm); | ||
| 463 | -void omap_vp_disable(struct voltagedomain *voltdm); | ||
| 464 | int omap_voltage_scale_vdd(struct voltagedomain *voltdm, | ||
| 465 | unsigned long target_volt); | ||
| 466 | void omap_voltage_reset(struct voltagedomain *voltdm); | ||
| 467 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 468 | new file mode 100644 | ||
| 469 | index 0000000..f3503de | ||
| 470 | --- /dev/null | ||
| 471 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 472 | @@ -0,0 +1,374 @@ | ||
| 473 | +#include <linux/kernel.h> | ||
| 474 | +#include <linux/init.h> | ||
| 475 | +#include <linux/debugfs.h> | ||
| 476 | + | ||
| 477 | +#include <plat/common.h> | ||
| 478 | + | ||
| 479 | +#include "voltage.h" | ||
| 480 | +#include "vp.h" | ||
| 481 | +#include "prm-regbits-34xx.h" | ||
| 482 | +#include "prm-regbits-44xx.h" | ||
| 483 | +#include "prm44xx.h" | ||
| 484 | + | ||
| 485 | +static void __init vp_debugfs_init(struct voltagedomain *voltdm); | ||
| 486 | + | ||
| 487 | +static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 488 | +{ | ||
| 489 | + struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; | ||
| 490 | + u32 vpconfig; | ||
| 491 | + unsigned long uvdc; | ||
| 492 | + char vsel; | ||
| 493 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 494 | + | ||
| 495 | + uvdc = omap_voltage_get_nom_volt(voltdm); | ||
| 496 | + if (!uvdc) { | ||
| 497 | + pr_warning("%s: unable to find current voltage for vdd_%s\n", | ||
| 498 | + __func__, voltdm->name); | ||
| 499 | + return; | ||
| 500 | + } | ||
| 501 | + | ||
| 502 | + if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { | ||
| 503 | + pr_warning("%s: PMIC function to convert voltage in uV to" | ||
| 504 | + " vsel not registered\n", __func__); | ||
| 505 | + return; | ||
| 506 | + } | ||
| 507 | + | ||
| 508 | + vsel = vdd->pmic_info->uv_to_vsel(uvdc); | ||
| 509 | + | ||
| 510 | + vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); | ||
| 511 | + vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | | ||
| 512 | + vp->vp_common->vpconfig_initvdd); | ||
| 513 | + vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift; | ||
| 514 | + | ||
| 515 | + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 516 | + | ||
| 517 | + /* Trigger initVDD value copy to voltage processor */ | ||
| 518 | + vdd->write_reg((vpconfig | vp->vp_common->vpconfig_initvdd), | ||
| 519 | + vp->vp_common->prm_mod, vp->vpconfig); | ||
| 520 | + | ||
| 521 | + /* Clear initVDD copy trigger bit */ | ||
| 522 | + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 523 | +} | ||
| 524 | + | ||
| 525 | +/* Generic voltage init functions */ | ||
| 526 | +void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 527 | +{ | ||
| 528 | + struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; | ||
| 529 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 530 | + u32 vp_val; | ||
| 531 | + | ||
| 532 | + if (!vdd->read_reg || !vdd->write_reg) { | ||
| 533 | + pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 534 | + __func__, voltdm->name); | ||
| 535 | + return; | ||
| 536 | + } | ||
| 537 | + | ||
| 538 | + vp_val = vdd->vp_rt_data.vpconfig_erroroffset | | ||
| 539 | + (vdd->vp_rt_data.vpconfig_errorgain << | ||
| 540 | + vp->vp_common->vpconfig_errorgain_shift) | | ||
| 541 | + vp->vp_common->vpconfig_timeouten; | ||
| 542 | + vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 543 | + | ||
| 544 | + vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << | ||
| 545 | + vp->vp_common->vstepmin_smpswaittimemin_shift) | | ||
| 546 | + (vdd->vp_rt_data.vstepmin_stepmin << | ||
| 547 | + vp->vp_common->vstepmin_stepmin_shift)); | ||
| 548 | + vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmin); | ||
| 549 | + | ||
| 550 | + vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << | ||
| 551 | + vp->vp_common->vstepmax_smpswaittimemax_shift) | | ||
| 552 | + (vdd->vp_rt_data.vstepmax_stepmax << | ||
| 553 | + vp->vp_common->vstepmax_stepmax_shift)); | ||
| 554 | + vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmax); | ||
| 555 | + | ||
| 556 | + vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << | ||
| 557 | + vp->vp_common->vlimitto_vddmax_shift) | | ||
| 558 | + (vdd->vp_rt_data.vlimitto_vddmin << | ||
| 559 | + vp->vp_common->vlimitto_vddmin_shift) | | ||
| 560 | + (vdd->vp_rt_data.vlimitto_timeout << | ||
| 561 | + vp->vp_common->vlimitto_timeout_shift)); | ||
| 562 | + vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vlimitto); | ||
| 563 | + | ||
| 564 | + vp_debugfs_init(voltdm); | ||
| 565 | +} | ||
| 566 | + | ||
| 567 | +/* VP force update method of voltage scaling */ | ||
| 568 | +int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 569 | + unsigned long target_volt) | ||
| 570 | +{ | ||
| 571 | + struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; | ||
| 572 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 573 | + u32 vpconfig; | ||
| 574 | + u8 target_vsel, current_vsel; | ||
| 575 | + int ret, timeout = 0; | ||
| 576 | + | ||
| 577 | + ret = omap_vc_pre_scale(voltdm, target_volt, &target_vsel, ¤t_vsel); | ||
| 578 | + if (ret) | ||
| 579 | + return ret; | ||
| 580 | + | ||
| 581 | + /* | ||
| 582 | + * Clear all pending TransactionDone interrupt/status. Typical latency | ||
| 583 | + * is <3us | ||
| 584 | + */ | ||
| 585 | + while (timeout++ < VP_TRANXDONE_TIMEOUT) { | ||
| 586 | + vdd->write_reg(vp->prm_irqst_data->tranxdone_status, | ||
| 587 | + vdd->prm_irqst_mod, vdd->prm_irqst_reg); | ||
| 588 | + if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & | ||
| 589 | + vp->prm_irqst_data->tranxdone_status)) | ||
| 590 | + break; | ||
| 591 | + udelay(1); | ||
| 592 | + } | ||
| 593 | + if (timeout >= VP_TRANXDONE_TIMEOUT) { | ||
| 594 | + pr_warning("%s: vdd_%s TRANXDONE timeout exceeded." | ||
| 595 | + "Voltage change aborted", __func__, voltdm->name); | ||
| 596 | + return -ETIMEDOUT; | ||
| 597 | + } | ||
| 598 | + | ||
| 599 | + /* Configure for VP-Force Update */ | ||
| 600 | + vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); | ||
| 601 | + vpconfig &= ~(vp->vp_common->vpconfig_initvdd | | ||
| 602 | + vp->vp_common->vpconfig_forceupdate | | ||
| 603 | + vp->vp_common->vpconfig_initvoltage_mask); | ||
| 604 | + vpconfig |= ((target_vsel << | ||
| 605 | + vp->vp_common->vpconfig_initvoltage_shift)); | ||
| 606 | + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 607 | + | ||
| 608 | + /* Trigger initVDD value copy to voltage processor */ | ||
| 609 | + vpconfig |= vp->vp_common->vpconfig_initvdd; | ||
| 610 | + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 611 | + | ||
| 612 | + /* Force update of voltage */ | ||
| 613 | + vpconfig |= vp->vp_common->vpconfig_forceupdate; | ||
| 614 | + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 615 | + | ||
| 616 | + /* | ||
| 617 | + * Wait for TransactionDone. Typical latency is <200us. | ||
| 618 | + * Depends on SMPSWAITTIMEMIN/MAX and voltage change | ||
| 619 | + */ | ||
| 620 | + timeout = 0; | ||
| 621 | + omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, | ||
| 622 | + vdd->prm_irqst_reg) & | ||
| 623 | + vp->prm_irqst_data->tranxdone_status), | ||
| 624 | + VP_TRANXDONE_TIMEOUT, timeout); | ||
| 625 | + if (timeout >= VP_TRANXDONE_TIMEOUT) | ||
| 626 | + pr_err("%s: vdd_%s TRANXDONE timeout exceeded." | ||
| 627 | + "TRANXDONE never got set after the voltage update\n", | ||
| 628 | + __func__, voltdm->name); | ||
| 629 | + | ||
| 630 | + omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); | ||
| 631 | + | ||
| 632 | + /* | ||
| 633 | + * Disable TransactionDone interrupt , clear all status, clear | ||
| 634 | + * control registers | ||
| 635 | + */ | ||
| 636 | + timeout = 0; | ||
| 637 | + while (timeout++ < VP_TRANXDONE_TIMEOUT) { | ||
| 638 | + vdd->write_reg(vp->prm_irqst_data->tranxdone_status, | ||
| 639 | + vdd->prm_irqst_mod, vdd->prm_irqst_reg); | ||
| 640 | + if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & | ||
| 641 | + vp->prm_irqst_data->tranxdone_status)) | ||
| 642 | + break; | ||
| 643 | + udelay(1); | ||
| 644 | + } | ||
| 645 | + | ||
| 646 | + if (timeout >= VP_TRANXDONE_TIMEOUT) | ||
| 647 | + pr_warning("%s: vdd_%s TRANXDONE timeout exceeded while trying" | ||
| 648 | + "to clear the TRANXDONE status\n", | ||
| 649 | + __func__, voltdm->name); | ||
| 650 | + | ||
| 651 | + vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); | ||
| 652 | + /* Clear initVDD copy trigger bit */ | ||
| 653 | + vpconfig &= ~vp->vp_common->vpconfig_initvdd; | ||
| 654 | + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 655 | + /* Clear force bit */ | ||
| 656 | + vpconfig &= ~vp->vp_common->vpconfig_forceupdate; | ||
| 657 | + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 658 | + | ||
| 659 | + return 0; | ||
| 660 | +} | ||
| 661 | + | ||
| 662 | +/** | ||
| 663 | + * omap_vp_get_curr_volt() - API to get the current vp voltage. | ||
| 664 | + * @voltdm: pointer to the VDD. | ||
| 665 | + * | ||
| 666 | + * This API returns the current voltage for the specified voltage processor | ||
| 667 | + */ | ||
| 668 | +unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) | ||
| 669 | +{ | ||
| 670 | + struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; | ||
| 671 | + struct omap_vdd_info *vdd; | ||
| 672 | + u8 curr_vsel; | ||
| 673 | + | ||
| 674 | + if (!voltdm || IS_ERR(voltdm)) { | ||
| 675 | + pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 676 | + return 0; | ||
| 677 | + } | ||
| 678 | + | ||
| 679 | + vdd = voltdm->vdd; | ||
| 680 | + if (!vdd->read_reg) { | ||
| 681 | + pr_err("%s: No read API for reading vdd_%s regs\n", | ||
| 682 | + __func__, voltdm->name); | ||
| 683 | + return 0; | ||
| 684 | + } | ||
| 685 | + | ||
| 686 | + curr_vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); | ||
| 687 | + | ||
| 688 | + if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { | ||
| 689 | + pr_warning("%s: PMIC function to convert vsel to voltage" | ||
| 690 | + "in uV not registerd\n", __func__); | ||
| 691 | + return 0; | ||
| 692 | + } | ||
| 693 | + | ||
| 694 | + return vdd->pmic_info->vsel_to_uv(curr_vsel); | ||
| 695 | +} | ||
| 696 | + | ||
| 697 | +/** | ||
| 698 | + * omap_vp_enable() - API to enable a particular VP | ||
| 699 | + * @voltdm: pointer to the VDD whose VP is to be enabled. | ||
| 700 | + * | ||
| 701 | + * This API enables a particular voltage processor. Needed by the smartreflex | ||
| 702 | + * class drivers. | ||
| 703 | + */ | ||
| 704 | +void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 705 | +{ | ||
| 706 | + struct omap_vp_instance_data *vp; | ||
| 707 | + struct omap_vdd_info *vdd; | ||
| 708 | + u32 vpconfig; | ||
| 709 | + | ||
| 710 | + if (!voltdm || IS_ERR(voltdm)) { | ||
| 711 | + pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 712 | + return; | ||
| 713 | + } | ||
| 714 | + | ||
| 715 | + vdd = voltdm->vdd; | ||
| 716 | + vp = voltdm->vdd->vp_data; | ||
| 717 | + if (!vdd->read_reg || !vdd->write_reg) { | ||
| 718 | + pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 719 | + __func__, voltdm->name); | ||
| 720 | + return; | ||
| 721 | + } | ||
| 722 | + | ||
| 723 | + /* If VP is already enabled, do nothing. Return */ | ||
| 724 | + if (vdd->vp_enabled) | ||
| 725 | + return; | ||
| 726 | + | ||
| 727 | + vp_latch_vsel(voltdm); | ||
| 728 | + | ||
| 729 | + /* Enable VP */ | ||
| 730 | + vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); | ||
| 731 | + vpconfig |= vp->vp_common->vpconfig_vpenable; | ||
| 732 | + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 733 | + vdd->vp_enabled = true; | ||
| 734 | +} | ||
| 735 | + | ||
| 736 | +/** | ||
| 737 | + * omap_vp_disable() - API to disable a particular VP | ||
| 738 | + * @voltdm: pointer to the VDD whose VP is to be disabled. | ||
| 739 | + * | ||
| 740 | + * This API disables a particular voltage processor. Needed by the smartreflex | ||
| 741 | + * class drivers. | ||
| 742 | + */ | ||
| 743 | +void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 744 | +{ | ||
| 745 | + struct omap_vp_instance_data *vp; | ||
| 746 | + struct omap_vdd_info *vdd; | ||
| 747 | + u32 vpconfig; | ||
| 748 | + int timeout; | ||
| 749 | + | ||
| 750 | + if (!voltdm || IS_ERR(voltdm)) { | ||
| 751 | + pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 752 | + return; | ||
| 753 | + } | ||
| 754 | + | ||
| 755 | + vdd = voltdm->vdd; | ||
| 756 | + vp = voltdm->vdd->vp_data; | ||
| 757 | + if (!vdd->read_reg || !vdd->write_reg) { | ||
| 758 | + pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 759 | + __func__, voltdm->name); | ||
| 760 | + return; | ||
| 761 | + } | ||
| 762 | + | ||
| 763 | + /* If VP is already disabled, do nothing. Return */ | ||
| 764 | + if (!vdd->vp_enabled) { | ||
| 765 | + pr_warning("%s: Trying to disable VP for vdd_%s when" | ||
| 766 | + "it is already disabled\n", __func__, voltdm->name); | ||
| 767 | + return; | ||
| 768 | + } | ||
| 769 | + | ||
| 770 | + /* Disable VP */ | ||
| 771 | + vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); | ||
| 772 | + vpconfig &= ~vp->vp_common->vpconfig_vpenable; | ||
| 773 | + vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 774 | + | ||
| 775 | + /* | ||
| 776 | + * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us | ||
| 777 | + */ | ||
| 778 | + omap_test_timeout((vdd->read_reg(vp->vp_common->prm_mod, vp->vstatus)), | ||
| 779 | + VP_IDLE_TIMEOUT, timeout); | ||
| 780 | + | ||
| 781 | + if (timeout >= VP_IDLE_TIMEOUT) | ||
| 782 | + pr_warning("%s: vdd_%s idle timedout\n", | ||
| 783 | + __func__, voltdm->name); | ||
| 784 | + | ||
| 785 | + vdd->vp_enabled = false; | ||
| 786 | + | ||
| 787 | + return; | ||
| 788 | +} | ||
| 789 | + | ||
| 790 | +/* Voltage debugfs support */ | ||
| 791 | +static int vp_volt_debug_get(void *data, u64 *val) | ||
| 792 | +{ | ||
| 793 | + struct voltagedomain *voltdm = (struct voltagedomain *)data; | ||
| 794 | + struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; | ||
| 795 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 796 | + u8 vsel; | ||
| 797 | + | ||
| 798 | + if (!vdd) { | ||
| 799 | + pr_warning("Wrong paramater passed\n"); | ||
| 800 | + return -EINVAL; | ||
| 801 | + } | ||
| 802 | + | ||
| 803 | + vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); | ||
| 804 | + | ||
| 805 | + if (!vdd->pmic_info->vsel_to_uv) { | ||
| 806 | + pr_warning("PMIC function to convert vsel to voltage" | ||
| 807 | + "in uV not registerd\n"); | ||
| 808 | + return -EINVAL; | ||
| 809 | + } | ||
| 810 | + | ||
| 811 | + *val = vdd->pmic_info->vsel_to_uv(vsel); | ||
| 812 | + return 0; | ||
| 813 | +} | ||
| 814 | + | ||
| 815 | +DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); | ||
| 816 | + | ||
| 817 | +static void __init vp_debugfs_init(struct voltagedomain *voltdm) | ||
| 818 | +{ | ||
| 819 | + struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 820 | + struct dentry *debug_dir; | ||
| 821 | + | ||
| 822 | + debug_dir = debugfs_create_dir("vp", vdd->debug_dir); | ||
| 823 | + if (IS_ERR(debug_dir)) | ||
| 824 | + pr_err("%s: Unable to create VP debugfs dir dir\n", __func__); | ||
| 825 | + | ||
| 826 | + (void) debugfs_create_x16("errorgain", S_IRUGO, debug_dir, | ||
| 827 | + &(vdd->vp_rt_data.vpconfig_errorgain)); | ||
| 828 | + (void) debugfs_create_x16("smpswaittimemin", S_IRUGO, | ||
| 829 | + debug_dir, | ||
| 830 | + &(vdd->vp_rt_data.vstepmin_smpswaittimemin)); | ||
| 831 | + (void) debugfs_create_x8("stepmin", S_IRUGO, debug_dir, | ||
| 832 | + &(vdd->vp_rt_data.vstepmin_stepmin)); | ||
| 833 | + (void) debugfs_create_x16("smpswaittimemax", S_IRUGO, | ||
| 834 | + debug_dir, | ||
| 835 | + &(vdd->vp_rt_data.vstepmax_smpswaittimemax)); | ||
| 836 | + (void) debugfs_create_x8("stepmax", S_IRUGO, debug_dir, | ||
| 837 | + &(vdd->vp_rt_data.vstepmax_stepmax)); | ||
| 838 | + (void) debugfs_create_x8("vddmax", S_IRUGO, debug_dir, | ||
| 839 | + &(vdd->vp_rt_data.vlimitto_vddmax)); | ||
| 840 | + (void) debugfs_create_x8("vddmin", S_IRUGO, debug_dir, | ||
| 841 | + &(vdd->vp_rt_data.vlimitto_vddmin)); | ||
| 842 | + (void) debugfs_create_x16("timeout", S_IRUGO, debug_dir, | ||
| 843 | + &(vdd->vp_rt_data.vlimitto_timeout)); | ||
| 844 | + (void) debugfs_create_file("curr_volt", S_IRUGO, debug_dir, | ||
| 845 | + (void *) voltdm, &vp_volt_debug_fops); | ||
| 846 | +} | ||
| 847 | diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h | ||
| 848 | index 5406b08..025cf16 100644 | ||
| 849 | --- a/arch/arm/mach-omap2/vp.h | ||
| 850 | +++ b/arch/arm/mach-omap2/vp.h | ||
| 851 | @@ -19,6 +19,8 @@ | ||
| 852 | |||
| 853 | #include <linux/kernel.h> | ||
| 854 | |||
| 855 | +struct voltagedomain; | ||
| 856 | + | ||
| 857 | /* XXX document */ | ||
| 858 | #define VP_IDLE_TIMEOUT 200 | ||
| 859 | #define VP_TRANXDONE_TIMEOUT 300 | ||
| 860 | @@ -139,4 +141,11 @@ extern struct omap_vp_instance_data omap4_vp_mpu_data; | ||
| 861 | extern struct omap_vp_instance_data omap4_vp_iva_data; | ||
| 862 | extern struct omap_vp_instance_data omap4_vp_core_data; | ||
| 863 | |||
| 864 | +void omap_vp_init(struct voltagedomain *voltdm); | ||
| 865 | +void omap_vp_enable(struct voltagedomain *voltdm); | ||
| 866 | +void omap_vp_disable(struct voltagedomain *voltdm); | ||
| 867 | +unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); | ||
| 868 | +int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 869 | + unsigned long target_volt); | ||
| 870 | + | ||
| 871 | #endif | ||
| 872 | -- | ||
| 873 | 1.7.2.5 | ||
| 874 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0113-OMAP2-VC-support-PMICs-with-separate-voltage-and-com.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0113-OMAP2-VC-support-PMICs-with-separate-voltage-and-com.patch deleted file mode 100644 index 4f993c2d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0113-OMAP2-VC-support-PMICs-with-separate-voltage-and-com.patch +++ /dev/null | |||
| @@ -1,109 +0,0 @@ | |||
| 1 | From 01afb0a843a221a9a32db601de7ebd529c49aa66 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Tue, 22 Mar 2011 14:12:37 -0700 | ||
| 4 | Subject: [PATCH 113/149] OMAP2+: VC: support PMICs with separate voltage and command registers | ||
| 5 | |||
| 6 | The VC layer can support PMICs with separate voltage and command | ||
| 7 | registers by putting the different registers in the PRM_VC_SMPS_VOL_RA | ||
| 8 | and PRCM_VC_SMPS_CMD_RA registers respectively. | ||
| 9 | |||
| 10 | The PMIC data must supply at least a voltage register address | ||
| 11 | (volt_reg_addr). The command register address (cmd_reg_addr) is | ||
| 12 | optional. If the PMIC data does not supply a separate command | ||
| 13 | register address, the VC will use the voltage register address for both. | ||
| 14 | |||
| 15 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 16 | --- | ||
| 17 | arch/arm/mach-omap2/omap_twl.c | 10 +++++----- | ||
| 18 | arch/arm/mach-omap2/vc.c | 4 ++-- | ||
| 19 | arch/arm/mach-omap2/voltage.h | 3 ++- | ||
| 20 | 3 files changed, 9 insertions(+), 8 deletions(-) | ||
| 21 | |||
| 22 | diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c | ||
| 23 | index 760487b..3249fe3 100644 | ||
| 24 | --- a/arch/arm/mach-omap2/omap_twl.c | ||
| 25 | +++ b/arch/arm/mach-omap2/omap_twl.c | ||
| 26 | @@ -158,7 +158,7 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = { | ||
| 27 | .vp_vddmax = OMAP3430_VP1_VLIMITTO_VDDMAX, | ||
| 28 | .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, | ||
| 29 | .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, | ||
| 30 | - .pmic_reg = OMAP3_VDD_MPU_SR_CONTROL_REG, | ||
| 31 | + .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, | ||
| 32 | .vsel_to_uv = twl4030_vsel_to_uv, | ||
| 33 | .uv_to_vsel = twl4030_uv_to_vsel, | ||
| 34 | }; | ||
| 35 | @@ -178,7 +178,7 @@ static struct omap_volt_pmic_info omap3_core_volt_info = { | ||
| 36 | .vp_vddmax = OMAP3430_VP2_VLIMITTO_VDDMAX, | ||
| 37 | .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, | ||
| 38 | .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, | ||
| 39 | - .pmic_reg = OMAP3_VDD_CORE_SR_CONTROL_REG, | ||
| 40 | + .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, | ||
| 41 | .vsel_to_uv = twl4030_vsel_to_uv, | ||
| 42 | .uv_to_vsel = twl4030_uv_to_vsel, | ||
| 43 | }; | ||
| 44 | @@ -198,7 +198,7 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = { | ||
| 45 | .vp_vddmax = OMAP4_VP_MPU_VLIMITTO_VDDMAX, | ||
| 46 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, | ||
| 47 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, | ||
| 48 | - .pmic_reg = OMAP4_VDD_MPU_SR_VOLT_REG, | ||
| 49 | + .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, | ||
| 50 | .vsel_to_uv = twl6030_vsel_to_uv, | ||
| 51 | .uv_to_vsel = twl6030_uv_to_vsel, | ||
| 52 | }; | ||
| 53 | @@ -218,7 +218,7 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = { | ||
| 54 | .vp_vddmax = OMAP4_VP_IVA_VLIMITTO_VDDMAX, | ||
| 55 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, | ||
| 56 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, | ||
| 57 | - .pmic_reg = OMAP4_VDD_IVA_SR_VOLT_REG, | ||
| 58 | + .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, | ||
| 59 | .vsel_to_uv = twl6030_vsel_to_uv, | ||
| 60 | .uv_to_vsel = twl6030_uv_to_vsel, | ||
| 61 | }; | ||
| 62 | @@ -238,7 +238,7 @@ static struct omap_volt_pmic_info omap4_core_volt_info = { | ||
| 63 | .vp_vddmax = OMAP4_VP_CORE_VLIMITTO_VDDMAX, | ||
| 64 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, | ||
| 65 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, | ||
| 66 | - .pmic_reg = OMAP4_VDD_CORE_SR_VOLT_REG, | ||
| 67 | + .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, | ||
| 68 | .vsel_to_uv = twl6030_vsel_to_uv, | ||
| 69 | .uv_to_vsel = twl6030_uv_to_vsel, | ||
| 70 | }; | ||
| 71 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 72 | index 7643940..720c0cd 100644 | ||
| 73 | --- a/arch/arm/mach-omap2/vc.c | ||
| 74 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 75 | @@ -106,7 +106,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, | ||
| 76 | vc_valid = vc->common->valid; | ||
| 77 | vc_bypass_val_reg = vc->common->bypass_val_reg; | ||
| 78 | vc_bypass_value = (target_vsel << vc->common->data_shift) | | ||
| 79 | - (vdd->pmic_info->pmic_reg << | ||
| 80 | + (vdd->pmic_info->volt_reg_addr << | ||
| 81 | vc->common->regaddr_shift) | | ||
| 82 | (vdd->pmic_info->i2c_slave_addr << | ||
| 83 | vc->common->slaveaddr_shift); | ||
| 84 | @@ -255,7 +255,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 85 | vc_val = vdd->read_reg(vc->common->prm_mod, | ||
| 86 | vc->common->smps_volra_reg); | ||
| 87 | vc_val &= ~vc->smps_volra_mask; | ||
| 88 | - vc_val |= vdd->pmic_info->pmic_reg << vc->smps_volra_shift; | ||
| 89 | + vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift; | ||
| 90 | vdd->write_reg(vc_val, vc->common->prm_mod, | ||
| 91 | vc->common->smps_volra_reg); | ||
| 92 | |||
| 93 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 94 | index 83fa239..641597c 100644 | ||
| 95 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 96 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 97 | @@ -112,7 +112,8 @@ struct omap_volt_pmic_info { | ||
| 98 | u8 vp_vddmax; | ||
| 99 | u8 vp_timeout_us; | ||
| 100 | u8 i2c_slave_addr; | ||
| 101 | - u8 pmic_reg; | ||
| 102 | + u8 volt_reg_addr; | ||
| 103 | + u8 cmd_reg_addr; | ||
| 104 | unsigned long (*vsel_to_uv) (const u8 vsel); | ||
| 105 | u8 (*uv_to_vsel) (unsigned long uV); | ||
| 106 | }; | ||
| 107 | -- | ||
| 108 | 1.7.2.5 | ||
| 109 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0114-OMAP2-add-PRM-VP-functions-for-checking-clearing-VP-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0114-OMAP2-add-PRM-VP-functions-for-checking-clearing-VP-.patch deleted file mode 100644 index c61dec1a..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0114-OMAP2-add-PRM-VP-functions-for-checking-clearing-VP-.patch +++ /dev/null | |||
| @@ -1,375 +0,0 @@ | |||
| 1 | From b2521ca2e2c0633cc9e50848aae9a0a761f687b6 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 28 Mar 2011 10:52:04 -0700 | ||
| 4 | Subject: [PATCH 114/149] OMAP2+: add PRM VP functions for checking/clearing VP TX done status | ||
| 5 | |||
| 6 | Add SoC specific PRM VP helper functions for checking and clearing | ||
| 7 | the VP transaction done status. | ||
| 8 | |||
| 9 | Longer term, these events should be handled by the forthcoming PRCM | ||
| 10 | interrupt handler. | ||
| 11 | |||
| 12 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/prm2xxx_3xxx.c | 41 ++++++++++++++++++++++++++++++ | ||
| 15 | arch/arm/mach-omap2/prm2xxx_3xxx.h | 4 +++ | ||
| 16 | arch/arm/mach-omap2/prm44xx.c | 49 ++++++++++++++++++++++++++++++++++++ | ||
| 17 | arch/arm/mach-omap2/prm44xx.h | 4 +++ | ||
| 18 | arch/arm/mach-omap2/vp.h | 33 ++++++++++++++--------- | ||
| 19 | arch/arm/mach-omap2/vp3xxx_data.c | 19 ++++++------- | ||
| 20 | arch/arm/mach-omap2/vp44xx_data.c | 25 ++++++----------- | ||
| 21 | 7 files changed, 136 insertions(+), 39 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c | ||
| 24 | index 051213f..58c5c87 100644 | ||
| 25 | --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c | ||
| 26 | +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c | ||
| 27 | @@ -20,6 +20,8 @@ | ||
| 28 | #include <plat/cpu.h> | ||
| 29 | #include <plat/prcm.h> | ||
| 30 | |||
| 31 | +#include "vp.h" | ||
| 32 | + | ||
| 33 | #include "prm2xxx_3xxx.h" | ||
| 34 | #include "cm2xxx_3xxx.h" | ||
| 35 | #include "prm-regbits-24xx.h" | ||
| 36 | @@ -156,3 +158,42 @@ int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift) | ||
| 37 | |||
| 38 | return (c == MAX_MODULE_HARDRESET_WAIT) ? -EBUSY : 0; | ||
| 39 | } | ||
| 40 | + | ||
| 41 | +/* PRM VP */ | ||
| 42 | + | ||
| 43 | +/* | ||
| 44 | + * struct omap3_vp - OMAP3 VP register access description. | ||
| 45 | + * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg | ||
| 46 | + */ | ||
| 47 | +struct omap3_vp { | ||
| 48 | + u32 tranxdone_status; | ||
| 49 | +}; | ||
| 50 | + | ||
| 51 | +struct omap3_vp omap3_vp[] = { | ||
| 52 | + [OMAP3_VP_VDD_MPU_ID] = { | ||
| 53 | + .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, | ||
| 54 | + }, | ||
| 55 | + [OMAP3_VP_VDD_CORE_ID] = { | ||
| 56 | + .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, | ||
| 57 | + }, | ||
| 58 | +}; | ||
| 59 | + | ||
| 60 | +#define MAX_VP_ID ARRAY_SIZE(omap3_vp); | ||
| 61 | + | ||
| 62 | +u32 omap3_prm_vp_check_txdone(u8 vp_id) | ||
| 63 | +{ | ||
| 64 | + struct omap3_vp *vp = &omap3_vp[vp_id]; | ||
| 65 | + u32 irqstatus; | ||
| 66 | + | ||
| 67 | + irqstatus = omap2_prm_read_mod_reg(OCP_MOD, | ||
| 68 | + OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
| 69 | + return irqstatus & vp->tranxdone_status; | ||
| 70 | +} | ||
| 71 | + | ||
| 72 | +void omap3_prm_vp_clear_txdone(u8 vp_id) | ||
| 73 | +{ | ||
| 74 | + struct omap3_vp *vp = &omap3_vp[vp_id]; | ||
| 75 | + | ||
| 76 | + omap2_prm_write_mod_reg(vp->tranxdone_status, | ||
| 77 | + OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
| 78 | +} | ||
| 79 | diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 80 | index a1fc62a..5112526 100644 | ||
| 81 | --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 82 | +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 83 | @@ -303,6 +303,10 @@ extern int omap2_prm_is_hardreset_asserted(s16 prm_mod, u8 shift); | ||
| 84 | extern int omap2_prm_assert_hardreset(s16 prm_mod, u8 shift); | ||
| 85 | extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); | ||
| 86 | |||
| 87 | +/* OMAP3-specific VP functions */ | ||
| 88 | +u32 omap3_prm_vp_check_txdone(u8 vp_id); | ||
| 89 | +void omap3_prm_vp_clear_txdone(u8 vp_id); | ||
| 90 | + | ||
| 91 | #endif /* CONFIG_ARCH_OMAP4 */ | ||
| 92 | #endif | ||
| 93 | |||
| 94 | diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c | ||
| 95 | index 0016555..390e32c 100644 | ||
| 96 | --- a/arch/arm/mach-omap2/prm44xx.c | ||
| 97 | +++ b/arch/arm/mach-omap2/prm44xx.c | ||
| 98 | @@ -21,6 +21,7 @@ | ||
| 99 | #include <plat/cpu.h> | ||
| 100 | #include <plat/prcm.h> | ||
| 101 | |||
| 102 | +#include "vp.h" | ||
| 103 | #include "prm44xx.h" | ||
| 104 | #include "prm-regbits-44xx.h" | ||
| 105 | |||
| 106 | @@ -50,3 +51,51 @@ u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 reg) | ||
| 107 | |||
| 108 | return v; | ||
| 109 | } | ||
| 110 | + | ||
| 111 | +/* PRM VP */ | ||
| 112 | + | ||
| 113 | +/* | ||
| 114 | + * struct omap4_vp - OMAP4 VP register access description. | ||
| 115 | + * @irqstatus_mpu: offset to IRQSTATUS_MPU register for VP | ||
| 116 | + * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg | ||
| 117 | + */ | ||
| 118 | +struct omap4_vp { | ||
| 119 | + u32 irqstatus_mpu; | ||
| 120 | + u32 tranxdone_status; | ||
| 121 | +}; | ||
| 122 | + | ||
| 123 | +static struct omap4_vp omap4_vp[] = { | ||
| 124 | + [OMAP4_VP_VDD_MPU_ID] = { | ||
| 125 | + .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, | ||
| 126 | + .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, | ||
| 127 | + }, | ||
| 128 | + [OMAP4_VP_VDD_IVA_ID] = { | ||
| 129 | + .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 130 | + .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, | ||
| 131 | + }, | ||
| 132 | + [OMAP4_VP_VDD_CORE_ID] = { | ||
| 133 | + .irqstatus_mpu = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 134 | + .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, | ||
| 135 | + }, | ||
| 136 | +}; | ||
| 137 | + | ||
| 138 | +u32 omap4_prm_vp_check_txdone(u8 vp_id) | ||
| 139 | +{ | ||
| 140 | + struct omap4_vp *vp = &omap4_vp[vp_id]; | ||
| 141 | + u32 irqstatus; | ||
| 142 | + | ||
| 143 | + irqstatus = omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, | ||
| 144 | + OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 145 | + vp->irqstatus_mpu); | ||
| 146 | + return irqstatus & vp->tranxdone_status; | ||
| 147 | +} | ||
| 148 | + | ||
| 149 | +void omap4_prm_vp_clear_txdone(u8 vp_id) | ||
| 150 | +{ | ||
| 151 | + struct omap4_vp *vp = &omap4_vp[vp_id]; | ||
| 152 | + | ||
| 153 | + omap4_prminst_write_inst_reg(vp->tranxdone_status, | ||
| 154 | + OMAP4430_PRM_PARTITION, | ||
| 155 | + OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 156 | + vp->irqstatus_mpu); | ||
| 157 | +}; | ||
| 158 | diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h | ||
| 159 | index 7dfa379..b28c87d 100644 | ||
| 160 | --- a/arch/arm/mach-omap2/prm44xx.h | ||
| 161 | +++ b/arch/arm/mach-omap2/prm44xx.h | ||
| 162 | @@ -751,6 +751,10 @@ extern u32 omap4_prm_read_inst_reg(s16 inst, u16 idx); | ||
| 163 | extern void omap4_prm_write_inst_reg(u32 val, s16 inst, u16 idx); | ||
| 164 | extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); | ||
| 165 | |||
| 166 | +/* OMAP4-specific VP functions */ | ||
| 167 | +u32 omap4_prm_vp_check_txdone(u8 vp_id); | ||
| 168 | +void omap4_prm_vp_clear_txdone(u8 vp_id); | ||
| 169 | + | ||
| 170 | # endif | ||
| 171 | |||
| 172 | #endif | ||
| 173 | diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h | ||
| 174 | index 025cf16..2c9cd76 100644 | ||
| 175 | --- a/arch/arm/mach-omap2/vp.h | ||
| 176 | +++ b/arch/arm/mach-omap2/vp.h | ||
| 177 | @@ -21,10 +21,28 @@ | ||
| 178 | |||
| 179 | struct voltagedomain; | ||
| 180 | |||
| 181 | +/* | ||
| 182 | + * Voltage Processor (VP) identifiers | ||
| 183 | + */ | ||
| 184 | +#define OMAP3_VP_VDD_MPU_ID 0 | ||
| 185 | +#define OMAP3_VP_VDD_CORE_ID 1 | ||
| 186 | +#define OMAP4_VP_VDD_CORE_ID 0 | ||
| 187 | +#define OMAP4_VP_VDD_IVA_ID 1 | ||
| 188 | +#define OMAP4_VP_VDD_MPU_ID 2 | ||
| 189 | + | ||
| 190 | /* XXX document */ | ||
| 191 | #define VP_IDLE_TIMEOUT 200 | ||
| 192 | #define VP_TRANXDONE_TIMEOUT 300 | ||
| 193 | |||
| 194 | +/** | ||
| 195 | + * struct omap_vp_ops - per-VP operations | ||
| 196 | + * @check_txdone: check for VP transaction done | ||
| 197 | + * @clear_txdone: clear VP transaction done status | ||
| 198 | + */ | ||
| 199 | +struct omap_vp_ops { | ||
| 200 | + u32 (*check_txdone)(u8 vp_id); | ||
| 201 | + void (*clear_txdone)(u8 vp_id); | ||
| 202 | +}; | ||
| 203 | |||
| 204 | /** | ||
| 205 | * struct omap_vp_common_data - register data common to all VDDs | ||
| 206 | @@ -68,24 +86,13 @@ struct omap_vp_common_data { | ||
| 207 | u8 vlimitto_vddmin_shift; | ||
| 208 | u8 vlimitto_vddmax_shift; | ||
| 209 | u8 vlimitto_timeout_shift; | ||
| 210 | -}; | ||
| 211 | |||
| 212 | -/** | ||
| 213 | - * struct omap_vp_prm_irqst_data - PRM_IRQSTATUS_MPU.VP_TRANXDONE_ST data | ||
| 214 | - * @tranxdone_status: VP_TRANXDONE_ST bitmask in PRM_IRQSTATUS_MPU reg | ||
| 215 | - * | ||
| 216 | - * XXX Note that on OMAP3, VP_TRANXDONE interrupt may not work due to a | ||
| 217 | - * hardware bug | ||
| 218 | - * XXX This structure is probably not needed | ||
| 219 | - */ | ||
| 220 | -struct omap_vp_prm_irqst_data { | ||
| 221 | - u32 tranxdone_status; | ||
| 222 | + const struct omap_vp_ops *ops; | ||
| 223 | }; | ||
| 224 | |||
| 225 | /** | ||
| 226 | * struct omap_vp_instance_data - VP register offsets (per-VDD) | ||
| 227 | * @vp_common: pointer to struct omap_vp_common_data * for this SoC | ||
| 228 | - * @prm_irqst_data: pointer to struct omap_vp_prm_irqst_data for this VDD | ||
| 229 | * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start | ||
| 230 | * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start | ||
| 231 | * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start | ||
| 232 | @@ -96,13 +103,13 @@ struct omap_vp_prm_irqst_data { | ||
| 233 | */ | ||
| 234 | struct omap_vp_instance_data { | ||
| 235 | const struct omap_vp_common_data *vp_common; | ||
| 236 | - const struct omap_vp_prm_irqst_data *prm_irqst_data; | ||
| 237 | u8 vpconfig; | ||
| 238 | u8 vstepmin; | ||
| 239 | u8 vstepmax; | ||
| 240 | u8 vlimitto; | ||
| 241 | u8 vstatus; | ||
| 242 | u8 voltage; | ||
| 243 | + u8 id; | ||
| 244 | }; | ||
| 245 | |||
| 246 | /** | ||
| 247 | diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 248 | index a8ea045..0372c1a 100644 | ||
| 249 | --- a/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 250 | +++ b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 251 | @@ -25,6 +25,12 @@ | ||
| 252 | #include "voltage.h" | ||
| 253 | |||
| 254 | #include "vp.h" | ||
| 255 | +#include "prm2xxx_3xxx.h" | ||
| 256 | + | ||
| 257 | +static const struct omap_vp_ops omap3_vp_ops = { | ||
| 258 | + .check_txdone = omap3_prm_vp_check_txdone, | ||
| 259 | + .clear_txdone = omap3_prm_vp_clear_txdone, | ||
| 260 | +}; | ||
| 261 | |||
| 262 | /* | ||
| 263 | * VP data common to 34xx/36xx chips | ||
| 264 | @@ -48,13 +54,11 @@ static const struct omap_vp_common_data omap3_vp_common = { | ||
| 265 | .vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT, | ||
| 266 | .vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT, | ||
| 267 | .vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT, | ||
| 268 | -}; | ||
| 269 | - | ||
| 270 | -static const struct omap_vp_prm_irqst_data omap3_vp1_prm_irqst_data = { | ||
| 271 | - .tranxdone_status = OMAP3430_VP1_TRANXDONE_ST_MASK, | ||
| 272 | + .ops = &omap3_vp_ops, | ||
| 273 | }; | ||
| 274 | |||
| 275 | struct omap_vp_instance_data omap3_vp1_data = { | ||
| 276 | + .id = OMAP3_VP_VDD_MPU_ID, | ||
| 277 | .vp_common = &omap3_vp_common, | ||
| 278 | .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, | ||
| 279 | .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, | ||
| 280 | @@ -62,14 +66,10 @@ struct omap_vp_instance_data omap3_vp1_data = { | ||
| 281 | .vlimitto = OMAP3_PRM_VP1_VLIMITTO_OFFSET, | ||
| 282 | .vstatus = OMAP3_PRM_VP1_STATUS_OFFSET, | ||
| 283 | .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET, | ||
| 284 | - .prm_irqst_data = &omap3_vp1_prm_irqst_data, | ||
| 285 | -}; | ||
| 286 | - | ||
| 287 | -static const struct omap_vp_prm_irqst_data omap3_vp2_prm_irqst_data = { | ||
| 288 | - .tranxdone_status = OMAP3430_VP2_TRANXDONE_ST_MASK, | ||
| 289 | }; | ||
| 290 | |||
| 291 | struct omap_vp_instance_data omap3_vp2_data = { | ||
| 292 | + .id = OMAP3_VP_VDD_CORE_ID, | ||
| 293 | .vp_common = &omap3_vp_common, | ||
| 294 | .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, | ||
| 295 | .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, | ||
| 296 | @@ -77,5 +77,4 @@ struct omap_vp_instance_data omap3_vp2_data = { | ||
| 297 | .vlimitto = OMAP3_PRM_VP2_VLIMITTO_OFFSET, | ||
| 298 | .vstatus = OMAP3_PRM_VP2_STATUS_OFFSET, | ||
| 299 | .voltage = OMAP3_PRM_VP2_VOLTAGE_OFFSET, | ||
| 300 | - .prm_irqst_data = &omap3_vp2_prm_irqst_data, | ||
| 301 | }; | ||
| 302 | diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 303 | index 0957c24..738ba04 100644 | ||
| 304 | --- a/arch/arm/mach-omap2/vp44xx_data.c | ||
| 305 | +++ b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 306 | @@ -27,6 +27,11 @@ | ||
| 307 | |||
| 308 | #include "vp.h" | ||
| 309 | |||
| 310 | +static const struct omap_vp_ops omap4_vp_ops = { | ||
| 311 | + .check_txdone = omap4_prm_vp_check_txdone, | ||
| 312 | + .clear_txdone = omap4_prm_vp_clear_txdone, | ||
| 313 | +}; | ||
| 314 | + | ||
| 315 | /* | ||
| 316 | * VP data common to 44xx chips | ||
| 317 | * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. | ||
| 318 | @@ -49,13 +54,11 @@ static const struct omap_vp_common_data omap4_vp_common = { | ||
| 319 | .vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT, | ||
| 320 | .vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT, | ||
| 321 | .vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT, | ||
| 322 | -}; | ||
| 323 | - | ||
| 324 | -static const struct omap_vp_prm_irqst_data omap4_vp_mpu_prm_irqst_data = { | ||
| 325 | - .tranxdone_status = OMAP4430_VP_MPU_TRANXDONE_ST_MASK, | ||
| 326 | + .ops = &omap4_vp_ops, | ||
| 327 | }; | ||
| 328 | |||
| 329 | struct omap_vp_instance_data omap4_vp_mpu_data = { | ||
| 330 | + .id = OMAP4_VP_VDD_MPU_ID, | ||
| 331 | .vp_common = &omap4_vp_common, | ||
| 332 | .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, | ||
| 333 | .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, | ||
| 334 | @@ -63,14 +66,10 @@ struct omap_vp_instance_data omap4_vp_mpu_data = { | ||
| 335 | .vlimitto = OMAP4_PRM_VP_MPU_VLIMITTO_OFFSET, | ||
| 336 | .vstatus = OMAP4_PRM_VP_MPU_STATUS_OFFSET, | ||
| 337 | .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET, | ||
| 338 | - .prm_irqst_data = &omap4_vp_mpu_prm_irqst_data, | ||
| 339 | -}; | ||
| 340 | - | ||
| 341 | -static const struct omap_vp_prm_irqst_data omap4_vp_iva_prm_irqst_data = { | ||
| 342 | - .tranxdone_status = OMAP4430_VP_IVA_TRANXDONE_ST_MASK, | ||
| 343 | }; | ||
| 344 | |||
| 345 | struct omap_vp_instance_data omap4_vp_iva_data = { | ||
| 346 | + .id = OMAP4_VP_VDD_IVA_ID, | ||
| 347 | .vp_common = &omap4_vp_common, | ||
| 348 | .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, | ||
| 349 | .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, | ||
| 350 | @@ -78,14 +77,10 @@ struct omap_vp_instance_data omap4_vp_iva_data = { | ||
| 351 | .vlimitto = OMAP4_PRM_VP_IVA_VLIMITTO_OFFSET, | ||
| 352 | .vstatus = OMAP4_PRM_VP_IVA_STATUS_OFFSET, | ||
| 353 | .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET, | ||
| 354 | - .prm_irqst_data = &omap4_vp_iva_prm_irqst_data, | ||
| 355 | -}; | ||
| 356 | - | ||
| 357 | -static const struct omap_vp_prm_irqst_data omap4_vp_core_prm_irqst_data = { | ||
| 358 | - .tranxdone_status = OMAP4430_VP_CORE_TRANXDONE_ST_MASK, | ||
| 359 | }; | ||
| 360 | |||
| 361 | struct omap_vp_instance_data omap4_vp_core_data = { | ||
| 362 | + .id = OMAP4_VP_VDD_CORE_ID, | ||
| 363 | .vp_common = &omap4_vp_common, | ||
| 364 | .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, | ||
| 365 | .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, | ||
| 366 | @@ -93,6 +88,4 @@ struct omap_vp_instance_data omap4_vp_core_data = { | ||
| 367 | .vlimitto = OMAP4_PRM_VP_CORE_VLIMITTO_OFFSET, | ||
| 368 | .vstatus = OMAP4_PRM_VP_CORE_STATUS_OFFSET, | ||
| 369 | .voltage = OMAP4_PRM_VP_CORE_VOLTAGE_OFFSET, | ||
| 370 | - .prm_irqst_data = &omap4_vp_core_prm_irqst_data, | ||
| 371 | }; | ||
| 372 | - | ||
| 373 | -- | ||
| 374 | 1.7.2.5 | ||
| 375 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0115-OMAP3-VP-replace-transaction-done-check-clear-with-V.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0115-OMAP3-VP-replace-transaction-done-check-clear-with-V.patch deleted file mode 100644 index 64851b3d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0115-OMAP3-VP-replace-transaction-done-check-clear-with-V.patch +++ /dev/null | |||
| @@ -1,142 +0,0 @@ | |||
| 1 | From 754129bd8c94999c27162faf84abb5df24b79c9b Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 28 Mar 2011 11:57:18 -0700 | ||
| 4 | Subject: [PATCH 115/149] OMAP3+ VP: replace transaction done check/clear with VP ops | ||
| 5 | |||
| 6 | Replace the VP tranxdone check/clear with helper functions from the | ||
| 7 | PRM layer. | ||
| 8 | |||
| 9 | In the process, remove prm_irqst_* voltage structure fields for IRQ | ||
| 10 | status checking which are no longer needed. | ||
| 11 | |||
| 12 | Since these reads/writes of the IRQ status bits were the only PRM | ||
| 13 | accesses that were not to VC/VP registers, this allows the rest of the | ||
| 14 | register accesses in the VC/VP code to use VC/VP specific register | ||
| 15 | access functions (done in the following patch.) | ||
| 16 | |||
| 17 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 18 | --- | ||
| 19 | arch/arm/mach-omap2/voltage.h | 3 --- | ||
| 20 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 4 ---- | ||
| 21 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 6 ------ | ||
| 22 | arch/arm/mach-omap2/vp.c | 16 +++++----------- | ||
| 23 | 4 files changed, 5 insertions(+), 24 deletions(-) | ||
| 24 | |||
| 25 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 26 | index 641597c..363eee4 100644 | ||
| 27 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 28 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 29 | @@ -131,7 +131,6 @@ struct omap_volt_pmic_info { | ||
| 30 | * @vfsm : voltage manager FSM data | ||
| 31 | * @debug_dir : debug directory for this voltage domain. | ||
| 32 | * @curr_volt : current voltage for this vdd. | ||
| 33 | - * @prm_irqst_mod : PRM module id used for PRM IRQ status register access | ||
| 34 | * @vp_enabled : flag to keep track of whether vp is enabled or not | ||
| 35 | * @volt_scale : API to scale the voltage of the vdd. | ||
| 36 | */ | ||
| 37 | @@ -145,8 +144,6 @@ struct omap_vdd_info { | ||
| 38 | u32 curr_volt; | ||
| 39 | bool vp_enabled; | ||
| 40 | |||
| 41 | - s16 prm_irqst_mod; | ||
| 42 | - u8 prm_irqst_reg; | ||
| 43 | u32 (*read_reg) (u16 mod, u8 offset); | ||
| 44 | void (*write_reg) (u32 val, u16 mod, u8 offset); | ||
| 45 | int (*volt_scale) (struct voltagedomain *voltdm, | ||
| 46 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 47 | index 7cb27ec..ad8f05b 100644 | ||
| 48 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 49 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 50 | @@ -38,8 +38,6 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { | ||
| 51 | }; | ||
| 52 | |||
| 53 | static struct omap_vdd_info omap3_vdd1_info = { | ||
| 54 | - .prm_irqst_mod = OCP_MOD, | ||
| 55 | - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 56 | .vp_data = &omap3_vp1_data, | ||
| 57 | .vfsm = &omap3_vdd1_vfsm_data, | ||
| 58 | }; | ||
| 59 | @@ -51,8 +49,6 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { | ||
| 60 | }; | ||
| 61 | |||
| 62 | static struct omap_vdd_info omap3_vdd2_info = { | ||
| 63 | - .prm_irqst_mod = OCP_MOD, | ||
| 64 | - .prm_irqst_reg = OMAP3_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 65 | .vp_data = &omap3_vp2_data, | ||
| 66 | .vfsm = &omap3_vdd2_vfsm_data, | ||
| 67 | }; | ||
| 68 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 69 | index a05d90a..43e1d38 100644 | ||
| 70 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 71 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 72 | @@ -37,8 +37,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { | ||
| 73 | }; | ||
| 74 | |||
| 75 | static struct omap_vdd_info omap4_vdd_mpu_info = { | ||
| 76 | - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 77 | - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET, | ||
| 78 | .vp_data = &omap4_vp_mpu_data, | ||
| 79 | .vfsm = &omap4_vdd_mpu_vfsm_data, | ||
| 80 | }; | ||
| 81 | @@ -48,8 +46,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { | ||
| 82 | }; | ||
| 83 | |||
| 84 | static struct omap_vdd_info omap4_vdd_iva_info = { | ||
| 85 | - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 86 | - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 87 | .vp_data = &omap4_vp_iva_data, | ||
| 88 | .vfsm = &omap4_vdd_iva_vfsm_data, | ||
| 89 | }; | ||
| 90 | @@ -59,8 +55,6 @@ static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { | ||
| 91 | }; | ||
| 92 | |||
| 93 | static struct omap_vdd_info omap4_vdd_core_info = { | ||
| 94 | - .prm_irqst_mod = OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 95 | - .prm_irqst_reg = OMAP4_PRM_IRQSTATUS_MPU_OFFSET, | ||
| 96 | .vp_data = &omap4_vp_core_data, | ||
| 97 | .vfsm = &omap4_vdd_core_vfsm_data, | ||
| 98 | }; | ||
| 99 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 100 | index f3503de..113c839 100644 | ||
| 101 | --- a/arch/arm/mach-omap2/vp.c | ||
| 102 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 103 | @@ -111,10 +111,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 104 | * is <3us | ||
| 105 | */ | ||
| 106 | while (timeout++ < VP_TRANXDONE_TIMEOUT) { | ||
| 107 | - vdd->write_reg(vp->prm_irqst_data->tranxdone_status, | ||
| 108 | - vdd->prm_irqst_mod, vdd->prm_irqst_reg); | ||
| 109 | - if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & | ||
| 110 | - vp->prm_irqst_data->tranxdone_status)) | ||
| 111 | + vp->vp_common->ops->clear_txdone(vp->id); | ||
| 112 | + if (!vp->vp_common->ops->check_txdone(vp->id)) | ||
| 113 | break; | ||
| 114 | udelay(1); | ||
| 115 | } | ||
| 116 | @@ -146,9 +144,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 117 | * Depends on SMPSWAITTIMEMIN/MAX and voltage change | ||
| 118 | */ | ||
| 119 | timeout = 0; | ||
| 120 | - omap_test_timeout((vdd->read_reg(vdd->prm_irqst_mod, | ||
| 121 | - vdd->prm_irqst_reg) & | ||
| 122 | - vp->prm_irqst_data->tranxdone_status), | ||
| 123 | + omap_test_timeout(vp->vp_common->ops->check_txdone(vp->id), | ||
| 124 | VP_TRANXDONE_TIMEOUT, timeout); | ||
| 125 | if (timeout >= VP_TRANXDONE_TIMEOUT) | ||
| 126 | pr_err("%s: vdd_%s TRANXDONE timeout exceeded." | ||
| 127 | @@ -163,10 +159,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 128 | */ | ||
| 129 | timeout = 0; | ||
| 130 | while (timeout++ < VP_TRANXDONE_TIMEOUT) { | ||
| 131 | - vdd->write_reg(vp->prm_irqst_data->tranxdone_status, | ||
| 132 | - vdd->prm_irqst_mod, vdd->prm_irqst_reg); | ||
| 133 | - if (!(vdd->read_reg(vdd->prm_irqst_mod, vdd->prm_irqst_reg) & | ||
| 134 | - vp->prm_irqst_data->tranxdone_status)) | ||
| 135 | + vp->vp_common->ops->clear_txdone(vp->id); | ||
| 136 | + if (!vp->vp_common->ops->check_txdone(vp->id)) | ||
| 137 | break; | ||
| 138 | udelay(1); | ||
| 139 | } | ||
| 140 | -- | ||
| 141 | 1.7.2.5 | ||
| 142 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0116-OMAP2-PRM-add-register-access-functions-for-VC-VP.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0116-OMAP2-PRM-add-register-access-functions-for-VC-VP.patch deleted file mode 100644 index fbb27a2e..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0116-OMAP2-PRM-add-register-access-functions-for-VC-VP.patch +++ /dev/null | |||
| @@ -1,119 +0,0 @@ | |||
| 1 | From 3326bc8057e4dd85f135faa00a3d079fab05ac1e Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 28 Mar 2011 10:25:12 -0700 | ||
| 4 | Subject: [PATCH 116/149] OMAP2+: PRM: add register access functions for VC/VP | ||
| 5 | |||
| 6 | On OMAP3+, the voltage controller (VC) and voltage processor (VP) are | ||
| 7 | inside the PRM. Add some PRM helper functions for register access to | ||
| 8 | these module registers. | ||
| 9 | |||
| 10 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/prm2xxx_3xxx.c | 15 +++++++++++++++ | ||
| 13 | arch/arm/mach-omap2/prm2xxx_3xxx.h | 8 ++++++++ | ||
| 14 | arch/arm/mach-omap2/prm44xx.c | 22 ++++++++++++++++++++++ | ||
| 15 | arch/arm/mach-omap2/prm44xx.h | 8 ++++++++ | ||
| 16 | 4 files changed, 53 insertions(+), 0 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.c b/arch/arm/mach-omap2/prm2xxx_3xxx.c | ||
| 19 | index 58c5c87..3b83763 100644 | ||
| 20 | --- a/arch/arm/mach-omap2/prm2xxx_3xxx.c | ||
| 21 | +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.c | ||
| 22 | @@ -197,3 +197,18 @@ void omap3_prm_vp_clear_txdone(u8 vp_id) | ||
| 23 | omap2_prm_write_mod_reg(vp->tranxdone_status, | ||
| 24 | OCP_MOD, OMAP3_PRM_IRQSTATUS_MPU_OFFSET); | ||
| 25 | } | ||
| 26 | + | ||
| 27 | +u32 omap3_prm_vcvp_read(u8 offset) | ||
| 28 | +{ | ||
| 29 | + return omap2_prm_read_mod_reg(OMAP3430_GR_MOD, offset); | ||
| 30 | +} | ||
| 31 | + | ||
| 32 | +void omap3_prm_vcvp_write(u32 val, u8 offset) | ||
| 33 | +{ | ||
| 34 | + omap2_prm_write_mod_reg(val, OMAP3430_GR_MOD, offset); | ||
| 35 | +} | ||
| 36 | + | ||
| 37 | +u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) | ||
| 38 | +{ | ||
| 39 | + return omap2_prm_rmw_mod_reg_bits(mask, bits, OMAP3430_GR_MOD, offset); | ||
| 40 | +} | ||
| 41 | diff --git a/arch/arm/mach-omap2/prm2xxx_3xxx.h b/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 42 | index 5112526..cef533d 100644 | ||
| 43 | --- a/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 44 | +++ b/arch/arm/mach-omap2/prm2xxx_3xxx.h | ||
| 45 | @@ -307,7 +307,15 @@ extern int omap2_prm_deassert_hardreset(s16 prm_mod, u8 rst_shift, u8 st_shift); | ||
| 46 | u32 omap3_prm_vp_check_txdone(u8 vp_id); | ||
| 47 | void omap3_prm_vp_clear_txdone(u8 vp_id); | ||
| 48 | |||
| 49 | +/* | ||
| 50 | + * OMAP3 access functions for voltage controller (VC) and | ||
| 51 | + * voltage proccessor (VP) in the PRM. | ||
| 52 | + */ | ||
| 53 | +extern u32 omap3_prm_vcvp_read(u8 offset); | ||
| 54 | +extern void omap3_prm_vcvp_write(u32 val, u8 offset); | ||
| 55 | +extern u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); | ||
| 56 | #endif /* CONFIG_ARCH_OMAP4 */ | ||
| 57 | + | ||
| 58 | #endif | ||
| 59 | |||
| 60 | /* | ||
| 61 | diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c | ||
| 62 | index 390e32c..495a31a 100644 | ||
| 63 | --- a/arch/arm/mach-omap2/prm44xx.c | ||
| 64 | +++ b/arch/arm/mach-omap2/prm44xx.c | ||
| 65 | @@ -24,6 +24,8 @@ | ||
| 66 | #include "vp.h" | ||
| 67 | #include "prm44xx.h" | ||
| 68 | #include "prm-regbits-44xx.h" | ||
| 69 | +#include "prcm44xx.h" | ||
| 70 | +#include "prminst44xx.h" | ||
| 71 | |||
| 72 | /* PRM low-level functions */ | ||
| 73 | |||
| 74 | @@ -99,3 +101,23 @@ void omap4_prm_vp_clear_txdone(u8 vp_id) | ||
| 75 | OMAP4430_PRM_OCP_SOCKET_INST, | ||
| 76 | vp->irqstatus_mpu); | ||
| 77 | }; | ||
| 78 | + | ||
| 79 | +u32 omap4_prm_vcvp_read(u8 offset) | ||
| 80 | +{ | ||
| 81 | + return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, | ||
| 82 | + OMAP4430_PRM_DEVICE_INST, offset); | ||
| 83 | +} | ||
| 84 | + | ||
| 85 | +void omap4_prm_vcvp_write(u32 val, u8 offset) | ||
| 86 | +{ | ||
| 87 | + omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, | ||
| 88 | + OMAP4430_PRM_DEVICE_INST, offset); | ||
| 89 | +} | ||
| 90 | + | ||
| 91 | +u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset) | ||
| 92 | +{ | ||
| 93 | + return omap4_prminst_rmw_inst_reg_bits(mask, bits, | ||
| 94 | + OMAP4430_PRM_PARTITION, | ||
| 95 | + OMAP4430_PRM_DEVICE_INST, | ||
| 96 | + offset); | ||
| 97 | +} | ||
| 98 | diff --git a/arch/arm/mach-omap2/prm44xx.h b/arch/arm/mach-omap2/prm44xx.h | ||
| 99 | index b28c87d..3d66ccd 100644 | ||
| 100 | --- a/arch/arm/mach-omap2/prm44xx.h | ||
| 101 | +++ b/arch/arm/mach-omap2/prm44xx.h | ||
| 102 | @@ -755,6 +755,14 @@ extern u32 omap4_prm_rmw_inst_reg_bits(u32 mask, u32 bits, s16 inst, s16 idx); | ||
| 103 | u32 omap4_prm_vp_check_txdone(u8 vp_id); | ||
| 104 | void omap4_prm_vp_clear_txdone(u8 vp_id); | ||
| 105 | |||
| 106 | +/* | ||
| 107 | + * OMAP4 access functions for voltage controller (VC) and | ||
| 108 | + * voltage proccessor (VP) in the PRM. | ||
| 109 | + */ | ||
| 110 | +extern u32 omap4_prm_vcvp_read(u8 offset); | ||
| 111 | +extern void omap4_prm_vcvp_write(u32 val, u8 offset); | ||
| 112 | +extern u32 omap4_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset); | ||
| 113 | + | ||
| 114 | # endif | ||
| 115 | |||
| 116 | #endif | ||
| 117 | -- | ||
| 118 | 1.7.2.5 | ||
| 119 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0117-OMAP3-voltage-convert-to-PRM-register-access-functio.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0117-OMAP3-voltage-convert-to-PRM-register-access-functio.patch deleted file mode 100644 index 3f7823eb..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0117-OMAP3-voltage-convert-to-PRM-register-access-functio.patch +++ /dev/null | |||
| @@ -1,627 +0,0 @@ | |||
| 1 | From 794143b8e468ddd8715ae76a6a0f7f0c9bc6778d Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 28 Mar 2011 10:40:15 -0700 | ||
| 4 | Subject: [PATCH 117/149] OMAP3+: voltage: convert to PRM register access functions | ||
| 5 | |||
| 6 | Convert VC/VP register access to use PRM VC/VP accessor functions. In | ||
| 7 | the process, move the read/write function pointers from vdd_info into | ||
| 8 | struct voltagedomain. | ||
| 9 | |||
| 10 | No functional changes. | ||
| 11 | |||
| 12 | Additional cleanup: | ||
| 13 | - remove prm_mod field from VC/VP data structures, the PRM register | ||
| 14 | access functions know which PRM module to use. | ||
| 15 | |||
| 16 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 17 | --- | ||
| 18 | arch/arm/mach-omap2/vc.c | 69 ++++++++++--------------- | ||
| 19 | arch/arm/mach-omap2/vc.h | 2 - | ||
| 20 | arch/arm/mach-omap2/vc3xxx_data.c | 1 - | ||
| 21 | arch/arm/mach-omap2/vc44xx_data.c | 1 - | ||
| 22 | arch/arm/mach-omap2/voltage.c | 31 +----------- | ||
| 23 | arch/arm/mach-omap2/voltage.h | 7 ++- | ||
| 24 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 6 ++ | ||
| 25 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 9 +++ | ||
| 26 | arch/arm/mach-omap2/vp.c | 57 ++++++++++---------- | ||
| 27 | arch/arm/mach-omap2/vp.h | 2 - | ||
| 28 | arch/arm/mach-omap2/vp3xxx_data.c | 1 - | ||
| 29 | arch/arm/mach-omap2/vp44xx_data.c | 1 - | ||
| 30 | 12 files changed, 76 insertions(+), 111 deletions(-) | ||
| 31 | |||
| 32 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 33 | index 720c0cd..9c2706c 100644 | ||
| 34 | --- a/arch/arm/mach-omap2/vc.c | ||
| 35 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 36 | @@ -37,7 +37,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 37 | return -ENODATA; | ||
| 38 | } | ||
| 39 | |||
| 40 | - if (!vdd->read_reg || !vdd->write_reg) { | ||
| 41 | + if (!voltdm->read || !voltdm->write) { | ||
| 42 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 43 | __func__, voltdm->name); | ||
| 44 | return -EINVAL; | ||
| 45 | @@ -49,24 +49,22 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 46 | volt_data = NULL; | ||
| 47 | |||
| 48 | *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); | ||
| 49 | - *current_vsel = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, vdd->vp_data->voltage); | ||
| 50 | + *current_vsel = voltdm->read(vdd->vp_data->voltage); | ||
| 51 | |||
| 52 | /* Setting the ON voltage to the new target voltage */ | ||
| 53 | - vc_cmdval = vdd->read_reg(vc->common->prm_mod, vc->cmdval_reg); | ||
| 54 | + vc_cmdval = voltdm->read(vc->cmdval_reg); | ||
| 55 | vc_cmdval &= ~vc->common->cmd_on_mask; | ||
| 56 | vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); | ||
| 57 | - vdd->write_reg(vc_cmdval, vc->common->prm_mod, vc->cmdval_reg); | ||
| 58 | + voltdm->write(vc_cmdval, vc->cmdval_reg); | ||
| 59 | |||
| 60 | /* Setting vp errorgain based on the voltage */ | ||
| 61 | if (volt_data) { | ||
| 62 | - vp_errgain_val = vdd->read_reg(vdd->vp_data->vp_common->prm_mod, | ||
| 63 | - vdd->vp_data->vpconfig); | ||
| 64 | + vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig); | ||
| 65 | vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; | ||
| 66 | vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; | ||
| 67 | vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << | ||
| 68 | vp_common->vpconfig_errorgain_shift; | ||
| 69 | - vdd->write_reg(vp_errgain_val, vdd->vp_data->vp_common->prm_mod, | ||
| 70 | - vdd->vp_data->vpconfig); | ||
| 71 | + voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig); | ||
| 72 | } | ||
| 73 | |||
| 74 | return 0; | ||
| 75 | @@ -111,11 +109,10 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, | ||
| 76 | (vdd->pmic_info->i2c_slave_addr << | ||
| 77 | vc->common->slaveaddr_shift); | ||
| 78 | |||
| 79 | - vdd->write_reg(vc_bypass_value, vc->common->prm_mod, vc_bypass_val_reg); | ||
| 80 | - vdd->write_reg(vc_bypass_value | vc_valid, vc->common->prm_mod, | ||
| 81 | - vc_bypass_val_reg); | ||
| 82 | + voltdm->write(vc_bypass_value, vc_bypass_val_reg); | ||
| 83 | + voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg); | ||
| 84 | |||
| 85 | - vc_bypass_value = vdd->read_reg(vc->common->prm_mod, vc_bypass_val_reg); | ||
| 86 | + vc_bypass_value = voltdm->read(vc_bypass_val_reg); | ||
| 87 | /* | ||
| 88 | * Loop till the bypass command is acknowledged from the SMPS. | ||
| 89 | * NOTE: This is legacy code. The loop count and retry count needs | ||
| 90 | @@ -134,8 +131,7 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, | ||
| 91 | loop_cnt = 0; | ||
| 92 | udelay(10); | ||
| 93 | } | ||
| 94 | - vc_bypass_value = vdd->read_reg(vc->common->prm_mod, | ||
| 95 | - vc_bypass_val_reg); | ||
| 96 | + vc_bypass_value = voltdm->read(vc_bypass_val_reg); | ||
| 97 | } | ||
| 98 | |||
| 99 | omap_vc_post_scale(voltdm, target_volt, target_vsel, current_vsel); | ||
| 100 | @@ -144,18 +140,13 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, | ||
| 101 | |||
| 102 | static void __init omap3_vfsm_init(struct voltagedomain *voltdm) | ||
| 103 | { | ||
| 104 | - struct omap_vc_channel *vc = voltdm->vc; | ||
| 105 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 106 | - | ||
| 107 | /* | ||
| 108 | * Voltage Manager FSM parameters init | ||
| 109 | * XXX This data should be passed in from the board file | ||
| 110 | */ | ||
| 111 | - vdd->write_reg(OMAP3_CLKSETUP, vc->common->prm_mod, OMAP3_PRM_CLKSETUP_OFFSET); | ||
| 112 | - vdd->write_reg(OMAP3_VOLTOFFSET, vc->common->prm_mod, | ||
| 113 | - OMAP3_PRM_VOLTOFFSET_OFFSET); | ||
| 114 | - vdd->write_reg(OMAP3_VOLTSETUP2, vc->common->prm_mod, | ||
| 115 | - OMAP3_PRM_VOLTSETUP2_OFFSET); | ||
| 116 | + voltdm->write(OMAP3_CLKSETUP, OMAP3_PRM_CLKSETUP_OFFSET); | ||
| 117 | + voltdm->write(OMAP3_VOLTOFFSET, OMAP3_PRM_VOLTOFFSET_OFFSET); | ||
| 118 | + voltdm->write(OMAP3_VOLTSETUP2, OMAP3_PRM_VOLTSETUP2_OFFSET); | ||
| 119 | } | ||
| 120 | |||
| 121 | static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) | ||
| 122 | @@ -178,16 +169,16 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) | ||
| 123 | (onlp_vsel << vc->common->cmd_onlp_shift) | | ||
| 124 | (ret_vsel << vc->common->cmd_ret_shift) | | ||
| 125 | (off_vsel << vc->common->cmd_off_shift)); | ||
| 126 | - vdd->write_reg(vc_val, vc->common->prm_mod, vc->cmdval_reg); | ||
| 127 | + voltdm->write(vc_val, vc->cmdval_reg); | ||
| 128 | |||
| 129 | /* | ||
| 130 | * Generic VC parameters init | ||
| 131 | * XXX This data should be abstracted out | ||
| 132 | */ | ||
| 133 | - vdd->write_reg(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, vc->common->prm_mod, | ||
| 134 | - OMAP3_PRM_VC_CH_CONF_OFFSET); | ||
| 135 | - vdd->write_reg(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, vc->common->prm_mod, | ||
| 136 | - OMAP3_PRM_VC_I2C_CFG_OFFSET); | ||
| 137 | + voltdm->write(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, | ||
| 138 | + OMAP3_PRM_VC_CH_CONF_OFFSET); | ||
| 139 | + voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, | ||
| 140 | + OMAP3_PRM_VC_I2C_CFG_OFFSET); | ||
| 141 | |||
| 142 | omap3_vfsm_init(voltdm); | ||
| 143 | |||
| 144 | @@ -198,8 +189,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) | ||
| 145 | /* OMAP4 specific voltage init functions */ | ||
| 146 | static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) | ||
| 147 | { | ||
| 148 | - struct omap_vc_channel *vc = voltdm->vc; | ||
| 149 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 150 | static bool is_initialized; | ||
| 151 | u32 vc_val; | ||
| 152 | |||
| 153 | @@ -215,11 +204,11 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) | ||
| 154 | vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | | ||
| 155 | OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | | ||
| 156 | OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); | ||
| 157 | - vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); | ||
| 158 | + voltdm->write(vc_val, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); | ||
| 159 | |||
| 160 | /* XXX These are magic numbers and do not belong! */ | ||
| 161 | vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); | ||
| 162 | - vdd->write_reg(vc_val, vc->common->prm_mod, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); | ||
| 163 | + voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); | ||
| 164 | |||
| 165 | is_initialized = true; | ||
| 166 | } | ||
| 167 | @@ -237,34 +226,30 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 168 | return; | ||
| 169 | } | ||
| 170 | |||
| 171 | - if (!vdd->read_reg || !vdd->write_reg) { | ||
| 172 | + if (!voltdm->read || !voltdm->write) { | ||
| 173 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 174 | __func__, voltdm->name); | ||
| 175 | return; | ||
| 176 | } | ||
| 177 | |||
| 178 | /* Set up the SMPS_SA(i2c slave address in VC */ | ||
| 179 | - vc_val = vdd->read_reg(vc->common->prm_mod, | ||
| 180 | - vc->common->smps_sa_reg); | ||
| 181 | + vc_val = voltdm->read(vc->common->smps_sa_reg); | ||
| 182 | vc_val &= ~vc->smps_sa_mask; | ||
| 183 | vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; | ||
| 184 | - vdd->write_reg(vc_val, vc->common->prm_mod, | ||
| 185 | - vc->common->smps_sa_reg); | ||
| 186 | + voltdm->write(vc_val, vc->common->smps_sa_reg); | ||
| 187 | |||
| 188 | /* Setup the VOLRA(pmic reg addr) in VC */ | ||
| 189 | - vc_val = vdd->read_reg(vc->common->prm_mod, | ||
| 190 | - vc->common->smps_volra_reg); | ||
| 191 | + vc_val = voltdm->read(vc->common->smps_volra_reg); | ||
| 192 | vc_val &= ~vc->smps_volra_mask; | ||
| 193 | vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift; | ||
| 194 | - vdd->write_reg(vc_val, vc->common->prm_mod, | ||
| 195 | - vc->common->smps_volra_reg); | ||
| 196 | + voltdm->write(vc_val, vc->common->smps_volra_reg); | ||
| 197 | |||
| 198 | /* Configure the setup times */ | ||
| 199 | - vc_val = vdd->read_reg(vc->common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 200 | + vc_val = voltdm->read(vdd->vfsm->voltsetup_reg); | ||
| 201 | vc_val &= ~vdd->vfsm->voltsetup_mask; | ||
| 202 | vc_val |= vdd->pmic_info->volt_setup_time << | ||
| 203 | vdd->vfsm->voltsetup_shift; | ||
| 204 | - vdd->write_reg(vc_val, vc->common->prm_mod, vdd->vfsm->voltsetup_reg); | ||
| 205 | + voltdm->write(vc_val, vdd->vfsm->voltsetup_reg); | ||
| 206 | |||
| 207 | if (cpu_is_omap34xx()) | ||
| 208 | omap3_vc_init_channel(voltdm); | ||
| 209 | diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h | ||
| 210 | index 51d36a8..d0050f0 100644 | ||
| 211 | --- a/arch/arm/mach-omap2/vc.h | ||
| 212 | +++ b/arch/arm/mach-omap2/vc.h | ||
| 213 | @@ -25,7 +25,6 @@ struct voltagedomain; | ||
| 214 | * struct omap_vc_common - per-VC register/bitfield data | ||
| 215 | * @cmd_on_mask: ON bitmask in PRM_VC_CMD_VAL* register | ||
| 216 | * @valid: VALID bitmask in PRM_VC_BYPASS_VAL register | ||
| 217 | - * @prm_mod: PRM module id used for PRM register access | ||
| 218 | * @smps_sa_reg: Offset of PRM_VC_SMPS_SA reg from PRM start | ||
| 219 | * @smps_volra_reg: Offset of PRM_VC_SMPS_VOL_RA reg from PRM start | ||
| 220 | * @bypass_val_reg: Offset of PRM_VC_BYPASS_VAL reg from PRM start | ||
| 221 | @@ -43,7 +42,6 @@ struct voltagedomain; | ||
| 222 | struct omap_vc_common { | ||
| 223 | u32 cmd_on_mask; | ||
| 224 | u32 valid; | ||
| 225 | - s16 prm_mod; | ||
| 226 | u8 smps_sa_reg; | ||
| 227 | u8 smps_volra_reg; | ||
| 228 | u8 bypass_val_reg; | ||
| 229 | diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 230 | index 1a17ed4..6b67203 100644 | ||
| 231 | --- a/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 232 | +++ b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 233 | @@ -30,7 +30,6 @@ | ||
| 234 | * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. | ||
| 235 | */ | ||
| 236 | static struct omap_vc_common omap3_vc_common = { | ||
| 237 | - .prm_mod = OMAP3430_GR_MOD, | ||
| 238 | .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, | ||
| 239 | .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, | ||
| 240 | .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, | ||
| 241 | diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 242 | index 56f3f4a..e3125a3 100644 | ||
| 243 | --- a/arch/arm/mach-omap2/vc44xx_data.c | ||
| 244 | +++ b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 245 | @@ -31,7 +31,6 @@ | ||
| 246 | * XXX This stuff presumably belongs in the vc3xxx.c or vc.c file. | ||
| 247 | */ | ||
| 248 | static const struct omap_vc_common omap4_vc_common = { | ||
| 249 | - .prm_mod = OMAP4430_PRM_DEVICE_INST, | ||
| 250 | .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, | ||
| 251 | .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, | ||
| 252 | .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, | ||
| 253 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 254 | index 9b9f019..9f9f014 100644 | ||
| 255 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 256 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 257 | @@ -46,27 +46,6 @@ static LIST_HEAD(voltdm_list); | ||
| 258 | #define VOLTAGE_DIR_SIZE 16 | ||
| 259 | static struct dentry *voltage_dir; | ||
| 260 | |||
| 261 | -static u32 omap3_voltage_read_reg(u16 mod, u8 offset) | ||
| 262 | -{ | ||
| 263 | - return omap2_prm_read_mod_reg(mod, offset); | ||
| 264 | -} | ||
| 265 | - | ||
| 266 | -static void omap3_voltage_write_reg(u32 val, u16 mod, u8 offset) | ||
| 267 | -{ | ||
| 268 | - omap2_prm_write_mod_reg(val, mod, offset); | ||
| 269 | -} | ||
| 270 | - | ||
| 271 | -static u32 omap4_voltage_read_reg(u16 mod, u8 offset) | ||
| 272 | -{ | ||
| 273 | - return omap4_prminst_read_inst_reg(OMAP4430_PRM_PARTITION, | ||
| 274 | - mod, offset); | ||
| 275 | -} | ||
| 276 | - | ||
| 277 | -static void omap4_voltage_write_reg(u32 val, u16 mod, u8 offset) | ||
| 278 | -{ | ||
| 279 | - omap4_prminst_write_inst_reg(val, OMAP4430_PRM_PARTITION, mod, offset); | ||
| 280 | -} | ||
| 281 | - | ||
| 282 | static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 283 | { | ||
| 284 | char *sys_ck_name; | ||
| 285 | @@ -183,15 +162,7 @@ static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) | ||
| 286 | if (IS_ERR_VALUE(_config_common_vdd_data(voltdm))) | ||
| 287 | goto ovdc_out; | ||
| 288 | |||
| 289 | - if (cpu_is_omap34xx()) { | ||
| 290 | - vdd->read_reg = omap3_voltage_read_reg; | ||
| 291 | - vdd->write_reg = omap3_voltage_write_reg; | ||
| 292 | - ret = 0; | ||
| 293 | - } else if (cpu_is_omap44xx()) { | ||
| 294 | - vdd->read_reg = omap4_voltage_read_reg; | ||
| 295 | - vdd->write_reg = omap4_voltage_write_reg; | ||
| 296 | - ret = 0; | ||
| 297 | - } | ||
| 298 | + ret = 0; | ||
| 299 | |||
| 300 | ovdc_out: | ||
| 301 | return ret; | ||
| 302 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 303 | index 363eee4..f4198aa 100644 | ||
| 304 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 305 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 306 | @@ -68,6 +68,11 @@ struct voltagedomain { | ||
| 307 | struct list_head pwrdm_list; | ||
| 308 | struct omap_vc_channel *vc; | ||
| 309 | |||
| 310 | + /* VC/VP register access functions: SoC specific */ | ||
| 311 | + u32 (*read) (u8 offset); | ||
| 312 | + void (*write) (u32 val, u8 offset); | ||
| 313 | + u32 (*rmw)(u32 mask, u32 bits, u8 offset); | ||
| 314 | + | ||
| 315 | struct omap_vdd_info *vdd; | ||
| 316 | }; | ||
| 317 | |||
| 318 | @@ -144,8 +149,6 @@ struct omap_vdd_info { | ||
| 319 | u32 curr_volt; | ||
| 320 | bool vp_enabled; | ||
| 321 | |||
| 322 | - u32 (*read_reg) (u16 mod, u8 offset); | ||
| 323 | - void (*write_reg) (u32 val, u16 mod, u8 offset); | ||
| 324 | int (*volt_scale) (struct voltagedomain *voltdm, | ||
| 325 | unsigned long target_volt); | ||
| 326 | }; | ||
| 327 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 328 | index ad8f05b..1d66749 100644 | ||
| 329 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 330 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 331 | @@ -56,6 +56,9 @@ static struct omap_vdd_info omap3_vdd2_info = { | ||
| 332 | static struct voltagedomain omap3_voltdm_mpu = { | ||
| 333 | .name = "mpu_iva", | ||
| 334 | .scalable = true, | ||
| 335 | + .read = omap3_prm_vcvp_read, | ||
| 336 | + .write = omap3_prm_vcvp_write, | ||
| 337 | + .rmw = omap3_prm_vcvp_rmw, | ||
| 338 | .vc = &omap3_vc_mpu, | ||
| 339 | .vdd = &omap3_vdd1_info, | ||
| 340 | }; | ||
| 341 | @@ -63,6 +66,9 @@ static struct voltagedomain omap3_voltdm_mpu = { | ||
| 342 | static struct voltagedomain omap3_voltdm_core = { | ||
| 343 | .name = "core", | ||
| 344 | .scalable = true, | ||
| 345 | + .read = omap3_prm_vcvp_read, | ||
| 346 | + .write = omap3_prm_vcvp_write, | ||
| 347 | + .rmw = omap3_prm_vcvp_rmw, | ||
| 348 | .vc = &omap3_vc_core, | ||
| 349 | .vdd = &omap3_vdd2_info, | ||
| 350 | }; | ||
| 351 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 352 | index 43e1d38..e435795 100644 | ||
| 353 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 354 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 355 | @@ -62,6 +62,9 @@ static struct omap_vdd_info omap4_vdd_core_info = { | ||
| 356 | static struct voltagedomain omap4_voltdm_mpu = { | ||
| 357 | .name = "mpu", | ||
| 358 | .scalable = true, | ||
| 359 | + .read = omap4_prm_vcvp_read, | ||
| 360 | + .write = omap4_prm_vcvp_write, | ||
| 361 | + .rmw = omap4_prm_vcvp_rmw, | ||
| 362 | .vc = &omap4_vc_mpu, | ||
| 363 | .vdd = &omap4_vdd_mpu_info, | ||
| 364 | }; | ||
| 365 | @@ -69,6 +72,9 @@ static struct voltagedomain omap4_voltdm_mpu = { | ||
| 366 | static struct voltagedomain omap4_voltdm_iva = { | ||
| 367 | .name = "iva", | ||
| 368 | .scalable = true, | ||
| 369 | + .read = omap4_prm_vcvp_read, | ||
| 370 | + .write = omap4_prm_vcvp_write, | ||
| 371 | + .rmw = omap4_prm_vcvp_rmw, | ||
| 372 | .vc = &omap4_vc_iva, | ||
| 373 | .vdd = &omap4_vdd_iva_info, | ||
| 374 | }; | ||
| 375 | @@ -76,6 +82,9 @@ static struct voltagedomain omap4_voltdm_iva = { | ||
| 376 | static struct voltagedomain omap4_voltdm_core = { | ||
| 377 | .name = "core", | ||
| 378 | .scalable = true, | ||
| 379 | + .read = omap4_prm_vcvp_read, | ||
| 380 | + .write = omap4_prm_vcvp_write, | ||
| 381 | + .rmw = omap4_prm_vcvp_rmw, | ||
| 382 | .vc = &omap4_vc_core, | ||
| 383 | .vdd = &omap4_vdd_core_info, | ||
| 384 | }; | ||
| 385 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 386 | index 113c839..88ac742 100644 | ||
| 387 | --- a/arch/arm/mach-omap2/vp.c | ||
| 388 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 389 | @@ -35,19 +35,19 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 390 | |||
| 391 | vsel = vdd->pmic_info->uv_to_vsel(uvdc); | ||
| 392 | |||
| 393 | - vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); | ||
| 394 | + vpconfig = voltdm->read(vp->vpconfig); | ||
| 395 | vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | | ||
| 396 | vp->vp_common->vpconfig_initvdd); | ||
| 397 | vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift; | ||
| 398 | |||
| 399 | - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 400 | + voltdm->write(vpconfig, vp->vpconfig); | ||
| 401 | |||
| 402 | /* Trigger initVDD value copy to voltage processor */ | ||
| 403 | - vdd->write_reg((vpconfig | vp->vp_common->vpconfig_initvdd), | ||
| 404 | - vp->vp_common->prm_mod, vp->vpconfig); | ||
| 405 | + voltdm->write((vpconfig | vp->vp_common->vpconfig_initvdd), | ||
| 406 | + vp->vpconfig); | ||
| 407 | |||
| 408 | /* Clear initVDD copy trigger bit */ | ||
| 409 | - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 410 | + voltdm->write(vpconfig, vp->vpconfig); | ||
| 411 | } | ||
| 412 | |||
| 413 | /* Generic voltage init functions */ | ||
| 414 | @@ -57,7 +57,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 415 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 416 | u32 vp_val; | ||
| 417 | |||
| 418 | - if (!vdd->read_reg || !vdd->write_reg) { | ||
| 419 | + if (!voltdm->read || !voltdm->write) { | ||
| 420 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 421 | __func__, voltdm->name); | ||
| 422 | return; | ||
| 423 | @@ -67,19 +67,19 @@ void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 424 | (vdd->vp_rt_data.vpconfig_errorgain << | ||
| 425 | vp->vp_common->vpconfig_errorgain_shift) | | ||
| 426 | vp->vp_common->vpconfig_timeouten; | ||
| 427 | - vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 428 | + voltdm->write(vp_val, vp->vpconfig); | ||
| 429 | |||
| 430 | vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << | ||
| 431 | vp->vp_common->vstepmin_smpswaittimemin_shift) | | ||
| 432 | (vdd->vp_rt_data.vstepmin_stepmin << | ||
| 433 | vp->vp_common->vstepmin_stepmin_shift)); | ||
| 434 | - vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmin); | ||
| 435 | + voltdm->write(vp_val, vp->vstepmin); | ||
| 436 | |||
| 437 | vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << | ||
| 438 | vp->vp_common->vstepmax_smpswaittimemax_shift) | | ||
| 439 | (vdd->vp_rt_data.vstepmax_stepmax << | ||
| 440 | vp->vp_common->vstepmax_stepmax_shift)); | ||
| 441 | - vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vstepmax); | ||
| 442 | + voltdm->write(vp_val, vp->vstepmax); | ||
| 443 | |||
| 444 | vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << | ||
| 445 | vp->vp_common->vlimitto_vddmax_shift) | | ||
| 446 | @@ -87,7 +87,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 447 | vp->vp_common->vlimitto_vddmin_shift) | | ||
| 448 | (vdd->vp_rt_data.vlimitto_timeout << | ||
| 449 | vp->vp_common->vlimitto_timeout_shift)); | ||
| 450 | - vdd->write_reg(vp_val, vp->vp_common->prm_mod, vp->vlimitto); | ||
| 451 | + voltdm->write(vp_val, vp->vlimitto); | ||
| 452 | |||
| 453 | vp_debugfs_init(voltdm); | ||
| 454 | } | ||
| 455 | @@ -97,7 +97,6 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 456 | unsigned long target_volt) | ||
| 457 | { | ||
| 458 | struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; | ||
| 459 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 460 | u32 vpconfig; | ||
| 461 | u8 target_vsel, current_vsel; | ||
| 462 | int ret, timeout = 0; | ||
| 463 | @@ -123,21 +122,21 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 464 | } | ||
| 465 | |||
| 466 | /* Configure for VP-Force Update */ | ||
| 467 | - vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); | ||
| 468 | + vpconfig = voltdm->read(vp->vpconfig); | ||
| 469 | vpconfig &= ~(vp->vp_common->vpconfig_initvdd | | ||
| 470 | vp->vp_common->vpconfig_forceupdate | | ||
| 471 | vp->vp_common->vpconfig_initvoltage_mask); | ||
| 472 | vpconfig |= ((target_vsel << | ||
| 473 | vp->vp_common->vpconfig_initvoltage_shift)); | ||
| 474 | - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 475 | + voltdm->write(vpconfig, vp->vpconfig); | ||
| 476 | |||
| 477 | /* Trigger initVDD value copy to voltage processor */ | ||
| 478 | vpconfig |= vp->vp_common->vpconfig_initvdd; | ||
| 479 | - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 480 | + voltdm->write(vpconfig, vp->vpconfig); | ||
| 481 | |||
| 482 | /* Force update of voltage */ | ||
| 483 | vpconfig |= vp->vp_common->vpconfig_forceupdate; | ||
| 484 | - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 485 | + voltdm->write(vpconfig, vp->vpconfig); | ||
| 486 | |||
| 487 | /* | ||
| 488 | * Wait for TransactionDone. Typical latency is <200us. | ||
| 489 | @@ -170,13 +169,13 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 490 | "to clear the TRANXDONE status\n", | ||
| 491 | __func__, voltdm->name); | ||
| 492 | |||
| 493 | - vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); | ||
| 494 | + vpconfig = voltdm->read(vp->vpconfig); | ||
| 495 | /* Clear initVDD copy trigger bit */ | ||
| 496 | vpconfig &= ~vp->vp_common->vpconfig_initvdd; | ||
| 497 | - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 498 | + voltdm->write(vpconfig, vp->vpconfig); | ||
| 499 | /* Clear force bit */ | ||
| 500 | vpconfig &= ~vp->vp_common->vpconfig_forceupdate; | ||
| 501 | - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 502 | + voltdm->write(vpconfig, vp->vpconfig); | ||
| 503 | |||
| 504 | return 0; | ||
| 505 | } | ||
| 506 | @@ -199,13 +198,13 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) | ||
| 507 | } | ||
| 508 | |||
| 509 | vdd = voltdm->vdd; | ||
| 510 | - if (!vdd->read_reg) { | ||
| 511 | + if (!voltdm->read) { | ||
| 512 | pr_err("%s: No read API for reading vdd_%s regs\n", | ||
| 513 | __func__, voltdm->name); | ||
| 514 | return 0; | ||
| 515 | } | ||
| 516 | |||
| 517 | - curr_vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); | ||
| 518 | + curr_vsel = voltdm->read(vp->voltage); | ||
| 519 | |||
| 520 | if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { | ||
| 521 | pr_warning("%s: PMIC function to convert vsel to voltage" | ||
| 522 | @@ -236,7 +235,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 523 | |||
| 524 | vdd = voltdm->vdd; | ||
| 525 | vp = voltdm->vdd->vp_data; | ||
| 526 | - if (!vdd->read_reg || !vdd->write_reg) { | ||
| 527 | + if (!voltdm->read || !voltdm->write) { | ||
| 528 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 529 | __func__, voltdm->name); | ||
| 530 | return; | ||
| 531 | @@ -249,9 +248,9 @@ void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 532 | vp_latch_vsel(voltdm); | ||
| 533 | |||
| 534 | /* Enable VP */ | ||
| 535 | - vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); | ||
| 536 | + vpconfig = voltdm->read(vp->vpconfig); | ||
| 537 | vpconfig |= vp->vp_common->vpconfig_vpenable; | ||
| 538 | - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 539 | + voltdm->write(vpconfig, vp->vpconfig); | ||
| 540 | vdd->vp_enabled = true; | ||
| 541 | } | ||
| 542 | |||
| 543 | @@ -276,7 +275,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 544 | |||
| 545 | vdd = voltdm->vdd; | ||
| 546 | vp = voltdm->vdd->vp_data; | ||
| 547 | - if (!vdd->read_reg || !vdd->write_reg) { | ||
| 548 | + if (!voltdm->read || !voltdm->write) { | ||
| 549 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 550 | __func__, voltdm->name); | ||
| 551 | return; | ||
| 552 | @@ -290,15 +289,15 @@ void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 553 | } | ||
| 554 | |||
| 555 | /* Disable VP */ | ||
| 556 | - vpconfig = vdd->read_reg(vp->vp_common->prm_mod, vp->vpconfig); | ||
| 557 | + vpconfig = voltdm->read(vp->vpconfig); | ||
| 558 | vpconfig &= ~vp->vp_common->vpconfig_vpenable; | ||
| 559 | - vdd->write_reg(vpconfig, vp->vp_common->prm_mod, vp->vpconfig); | ||
| 560 | + voltdm->write(vpconfig, vp->vpconfig); | ||
| 561 | |||
| 562 | /* | ||
| 563 | * Wait for VP idle Typical latency is <2us. Maximum latency is ~100us | ||
| 564 | */ | ||
| 565 | - omap_test_timeout((vdd->read_reg(vp->vp_common->prm_mod, vp->vstatus)), | ||
| 566 | - VP_IDLE_TIMEOUT, timeout); | ||
| 567 | + omap_test_timeout((voltdm->read(vp->vstatus)), | ||
| 568 | + VP_IDLE_TIMEOUT, timeout); | ||
| 569 | |||
| 570 | if (timeout >= VP_IDLE_TIMEOUT) | ||
| 571 | pr_warning("%s: vdd_%s idle timedout\n", | ||
| 572 | @@ -322,7 +321,7 @@ static int vp_volt_debug_get(void *data, u64 *val) | ||
| 573 | return -EINVAL; | ||
| 574 | } | ||
| 575 | |||
| 576 | - vsel = vdd->read_reg(vp->vp_common->prm_mod, vp->voltage); | ||
| 577 | + vsel = voltdm->read(vp->voltage); | ||
| 578 | |||
| 579 | if (!vdd->pmic_info->vsel_to_uv) { | ||
| 580 | pr_warning("PMIC function to convert vsel to voltage" | ||
| 581 | diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h | ||
| 582 | index 2c9cd76..79aa8d3 100644 | ||
| 583 | --- a/arch/arm/mach-omap2/vp.h | ||
| 584 | +++ b/arch/arm/mach-omap2/vp.h | ||
| 585 | @@ -62,7 +62,6 @@ struct omap_vp_ops { | ||
| 586 | * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg | ||
| 587 | * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg | ||
| 588 | * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg | ||
| 589 | - * @prm_mod: PRM module id used for PRM register access | ||
| 590 | * | ||
| 591 | * XXX It it not necessary to have both a mask and a shift for the same | ||
| 592 | * bitfield - remove one | ||
| 593 | @@ -75,7 +74,6 @@ struct omap_vp_common_data { | ||
| 594 | u32 vpconfig_initvdd; | ||
| 595 | u32 vpconfig_forceupdate; | ||
| 596 | u32 vpconfig_vpenable; | ||
| 597 | - s16 prm_mod; | ||
| 598 | u8 vpconfig_erroroffset_shift; | ||
| 599 | u8 vpconfig_errorgain_shift; | ||
| 600 | u8 vpconfig_initvoltage_shift; | ||
| 601 | diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 602 | index 0372c1a..b01d333 100644 | ||
| 603 | --- a/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 604 | +++ b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 605 | @@ -37,7 +37,6 @@ static const struct omap_vp_ops omap3_vp_ops = { | ||
| 606 | * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. | ||
| 607 | */ | ||
| 608 | static const struct omap_vp_common_data omap3_vp_common = { | ||
| 609 | - .prm_mod = OMAP3430_GR_MOD, | ||
| 610 | .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, | ||
| 611 | .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, | ||
| 612 | .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, | ||
| 613 | diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 614 | index 738ba04..9704c7b 100644 | ||
| 615 | --- a/arch/arm/mach-omap2/vp44xx_data.c | ||
| 616 | +++ b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 617 | @@ -37,7 +37,6 @@ static const struct omap_vp_ops omap4_vp_ops = { | ||
| 618 | * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. | ||
| 619 | */ | ||
| 620 | static const struct omap_vp_common_data omap4_vp_common = { | ||
| 621 | - .prm_mod = OMAP4430_PRM_DEVICE_INST, | ||
| 622 | .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, | ||
| 623 | .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, | ||
| 624 | .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, | ||
| 625 | -- | ||
| 626 | 1.7.2.5 | ||
| 627 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0118-OMAP3-VC-cleanup-i2c-slave-address-configuration.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0118-OMAP3-VC-cleanup-i2c-slave-address-configuration.patch deleted file mode 100644 index a538b7bf..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0118-OMAP3-VC-cleanup-i2c-slave-address-configuration.patch +++ /dev/null | |||
| @@ -1,145 +0,0 @@ | |||
| 1 | From 8a87503677e21700900e300a8e319a8239d6591f Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Tue, 29 Mar 2011 14:02:36 -0700 | ||
| 4 | Subject: [PATCH 118/149] OMAP3+: VC: cleanup i2c slave address configuration | ||
| 5 | |||
| 6 | - Add an i2c_slave_address field to the omap_vc_channel | ||
| 7 | - use VC/VP read/modify/write helper instead of open-coding | ||
| 8 | - remove smps_sa_shift, use __ffs(mask) for shift value | ||
| 9 | - I2C addresses 10-bit, change size to u16 | ||
| 10 | |||
| 11 | Special thanks to Shweta Gulati <shweta.gulati@ti.com> for suggesting | ||
| 12 | the use of __ffs(x) instead of ffs(x) - 1. | ||
| 13 | |||
| 14 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 15 | --- | ||
| 16 | arch/arm/mach-omap2/vc.c | 12 +++++++----- | ||
| 17 | arch/arm/mach-omap2/vc.h | 8 +++++--- | ||
| 18 | arch/arm/mach-omap2/vc3xxx_data.c | 2 -- | ||
| 19 | arch/arm/mach-omap2/vc44xx_data.c | 3 --- | ||
| 20 | arch/arm/mach-omap2/voltage.h | 2 +- | ||
| 21 | 5 files changed, 13 insertions(+), 14 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 24 | index 9c2706c..ca6165d 100644 | ||
| 25 | --- a/arch/arm/mach-omap2/vc.c | ||
| 26 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 27 | @@ -232,11 +232,13 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 28 | return; | ||
| 29 | } | ||
| 30 | |||
| 31 | - /* Set up the SMPS_SA(i2c slave address in VC */ | ||
| 32 | - vc_val = voltdm->read(vc->common->smps_sa_reg); | ||
| 33 | - vc_val &= ~vc->smps_sa_mask; | ||
| 34 | - vc_val |= vdd->pmic_info->i2c_slave_addr << vc->smps_sa_shift; | ||
| 35 | - voltdm->write(vc_val, vc->common->smps_sa_reg); | ||
| 36 | + /* get PMIC/board specific settings */ | ||
| 37 | + vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; | ||
| 38 | + | ||
| 39 | + /* Configure the i2c slave address for this VC */ | ||
| 40 | + voltdm->rmw(vc->smps_sa_mask, | ||
| 41 | + vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), | ||
| 42 | + vc->common->smps_sa_reg); | ||
| 43 | |||
| 44 | /* Setup the VOLRA(pmic reg addr) in VC */ | ||
| 45 | vc_val = voltdm->read(vc->common->smps_volra_reg); | ||
| 46 | diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h | ||
| 47 | index d0050f0..165fc74 100644 | ||
| 48 | --- a/arch/arm/mach-omap2/vc.h | ||
| 49 | +++ b/arch/arm/mach-omap2/vc.h | ||
| 50 | @@ -57,20 +57,22 @@ struct omap_vc_common { | ||
| 51 | /** | ||
| 52 | * struct omap_vc_channel - VC per-instance data | ||
| 53 | * @common: pointer to VC common data for this platform | ||
| 54 | - * @smps_sa_mask: SA* bitmask in the PRM_VC_SMPS_SA register | ||
| 55 | + * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register | ||
| 56 | * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register | ||
| 57 | - * @smps_sa_shift: SA* field shift in the PRM_VC_SMPS_SA register | ||
| 58 | * @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register | ||
| 59 | * | ||
| 60 | * XXX It is not necessary to have both a *_mask and a *_shift - | ||
| 61 | * remove one | ||
| 62 | */ | ||
| 63 | struct omap_vc_channel { | ||
| 64 | + /* channel state */ | ||
| 65 | + u16 i2c_slave_addr; | ||
| 66 | + | ||
| 67 | + /* register access data */ | ||
| 68 | const struct omap_vc_common *common; | ||
| 69 | u32 smps_sa_mask; | ||
| 70 | u32 smps_volra_mask; | ||
| 71 | u8 cmdval_reg; | ||
| 72 | - u8 smps_sa_shift; | ||
| 73 | u8 smps_volra_shift; | ||
| 74 | }; | ||
| 75 | |||
| 76 | diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 77 | index 6b67203..86be50c 100644 | ||
| 78 | --- a/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 79 | +++ b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 80 | @@ -47,7 +47,6 @@ static struct omap_vc_common omap3_vc_common = { | ||
| 81 | struct omap_vc_channel omap3_vc_mpu = { | ||
| 82 | .common = &omap3_vc_common, | ||
| 83 | .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, | ||
| 84 | - .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, | ||
| 85 | .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, | ||
| 86 | .smps_volra_shift = OMAP3430_VOLRA0_SHIFT, | ||
| 87 | .smps_volra_mask = OMAP3430_VOLRA0_MASK, | ||
| 88 | @@ -56,7 +55,6 @@ struct omap_vc_channel omap3_vc_mpu = { | ||
| 89 | struct omap_vc_channel omap3_vc_core = { | ||
| 90 | .common = &omap3_vc_common, | ||
| 91 | .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, | ||
| 92 | - .smps_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, | ||
| 93 | .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, | ||
| 94 | .smps_volra_shift = OMAP3430_VOLRA1_SHIFT, | ||
| 95 | .smps_volra_mask = OMAP3430_VOLRA1_MASK, | ||
| 96 | diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 97 | index e3125a3..af922b4 100644 | ||
| 98 | --- a/arch/arm/mach-omap2/vc44xx_data.c | ||
| 99 | +++ b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 100 | @@ -49,7 +49,6 @@ static const struct omap_vc_common omap4_vc_common = { | ||
| 101 | struct omap_vc_channel omap4_vc_mpu = { | ||
| 102 | .common = &omap4_vc_common, | ||
| 103 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, | ||
| 104 | - .smps_sa_shift = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_SHIFT, | ||
| 105 | .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, | ||
| 106 | .smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT, | ||
| 107 | .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, | ||
| 108 | @@ -58,7 +57,6 @@ struct omap_vc_channel omap4_vc_mpu = { | ||
| 109 | struct omap_vc_channel omap4_vc_iva = { | ||
| 110 | .common = &omap4_vc_common, | ||
| 111 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, | ||
| 112 | - .smps_sa_shift = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_SHIFT, | ||
| 113 | .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, | ||
| 114 | .smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT, | ||
| 115 | .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, | ||
| 116 | @@ -67,7 +65,6 @@ struct omap_vc_channel omap4_vc_iva = { | ||
| 117 | struct omap_vc_channel omap4_vc_core = { | ||
| 118 | .common = &omap4_vc_common, | ||
| 119 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, | ||
| 120 | - .smps_sa_shift = OMAP4430_SA_VDD_CORE_L_0_6_SHIFT, | ||
| 121 | .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, | ||
| 122 | .smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT, | ||
| 123 | .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, | ||
| 124 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 125 | index f4198aa..639e85c 100644 | ||
| 126 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 127 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 128 | @@ -110,13 +110,13 @@ struct omap_volt_pmic_info { | ||
| 129 | u32 ret_volt; | ||
| 130 | u32 off_volt; | ||
| 131 | u16 volt_setup_time; | ||
| 132 | + u16 i2c_slave_addr; | ||
| 133 | u8 vp_erroroffset; | ||
| 134 | u8 vp_vstepmin; | ||
| 135 | u8 vp_vstepmax; | ||
| 136 | u8 vp_vddmin; | ||
| 137 | u8 vp_vddmax; | ||
| 138 | u8 vp_timeout_us; | ||
| 139 | - u8 i2c_slave_addr; | ||
| 140 | u8 volt_reg_addr; | ||
| 141 | u8 cmd_reg_addr; | ||
| 142 | unsigned long (*vsel_to_uv) (const u8 vsel); | ||
| 143 | -- | ||
| 144 | 1.7.2.5 | ||
| 145 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0119-OMAP3-VC-cleanup-PMIC-register-address-configuration.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0119-OMAP3-VC-cleanup-PMIC-register-address-configuration.patch deleted file mode 100644 index 08620239..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0119-OMAP3-VC-cleanup-PMIC-register-address-configuration.patch +++ /dev/null | |||
| @@ -1,185 +0,0 @@ | |||
| 1 | From 3296114685831f06d5a73057464afbbed489dea4 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Thu, 9 Jun 2011 11:01:55 -0700 | ||
| 4 | Subject: [PATCH 119/149] OMAP3+: VC: cleanup PMIC register address configuration | ||
| 5 | |||
| 6 | - support both voltage register address and command register address | ||
| 7 | for each VC channel | ||
| 8 | - add fields for voltage register address (volra) and command register | ||
| 9 | address (cmdra) to struct omap_vc_channel | ||
| 10 | - use VC/VP register access read/modify/write helper | ||
| 11 | - remove volra_shift field (use __ffs(mask) for shift value) | ||
| 12 | - I2C addresses 10-bit, change size to u16 | ||
| 13 | |||
| 14 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 15 | --- | ||
| 16 | arch/arm/mach-omap2/vc.c | 17 ++++++++++++----- | ||
| 17 | arch/arm/mach-omap2/vc.h | 9 ++++----- | ||
| 18 | arch/arm/mach-omap2/vc3xxx_data.c | 5 +++-- | ||
| 19 | arch/arm/mach-omap2/vc44xx_data.c | 7 ++++--- | ||
| 20 | arch/arm/mach-omap2/voltage.h | 4 ++-- | ||
| 21 | 5 files changed, 25 insertions(+), 17 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 24 | index ca6165d..50b1f7c 100644 | ||
| 25 | --- a/arch/arm/mach-omap2/vc.c | ||
| 26 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 27 | @@ -234,17 +234,24 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 28 | |||
| 29 | /* get PMIC/board specific settings */ | ||
| 30 | vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; | ||
| 31 | + vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; | ||
| 32 | + vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr; | ||
| 33 | |||
| 34 | /* Configure the i2c slave address for this VC */ | ||
| 35 | voltdm->rmw(vc->smps_sa_mask, | ||
| 36 | vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), | ||
| 37 | vc->common->smps_sa_reg); | ||
| 38 | |||
| 39 | - /* Setup the VOLRA(pmic reg addr) in VC */ | ||
| 40 | - vc_val = voltdm->read(vc->common->smps_volra_reg); | ||
| 41 | - vc_val &= ~vc->smps_volra_mask; | ||
| 42 | - vc_val |= vdd->pmic_info->volt_reg_addr << vc->smps_volra_shift; | ||
| 43 | - voltdm->write(vc_val, vc->common->smps_volra_reg); | ||
| 44 | + /* | ||
| 45 | + * Configure the PMIC register addresses. | ||
| 46 | + */ | ||
| 47 | + voltdm->rmw(vc->smps_volra_mask, | ||
| 48 | + vc->volt_reg_addr << __ffs(vc->smps_volra_mask), | ||
| 49 | + vc->common->smps_volra_reg); | ||
| 50 | + if (vc->cmd_reg_addr) | ||
| 51 | + voltdm->rmw(vc->smps_cmdra_mask, | ||
| 52 | + vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), | ||
| 53 | + vc->common->smps_cmdra_reg); | ||
| 54 | |||
| 55 | /* Configure the setup times */ | ||
| 56 | vc_val = voltdm->read(vdd->vfsm->voltsetup_reg); | ||
| 57 | diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h | ||
| 58 | index 165fc74..f3b0551 100644 | ||
| 59 | --- a/arch/arm/mach-omap2/vc.h | ||
| 60 | +++ b/arch/arm/mach-omap2/vc.h | ||
| 61 | @@ -44,6 +44,7 @@ struct omap_vc_common { | ||
| 62 | u32 valid; | ||
| 63 | u8 smps_sa_reg; | ||
| 64 | u8 smps_volra_reg; | ||
| 65 | + u8 smps_cmdra_reg; | ||
| 66 | u8 bypass_val_reg; | ||
| 67 | u8 data_shift; | ||
| 68 | u8 slaveaddr_shift; | ||
| 69 | @@ -59,21 +60,19 @@ struct omap_vc_common { | ||
| 70 | * @common: pointer to VC common data for this platform | ||
| 71 | * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register | ||
| 72 | * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register | ||
| 73 | - * @smps_volra_shift: VOLRA* field shift in the PRM_VC_VOL_RA register | ||
| 74 | - * | ||
| 75 | - * XXX It is not necessary to have both a *_mask and a *_shift - | ||
| 76 | - * remove one | ||
| 77 | */ | ||
| 78 | struct omap_vc_channel { | ||
| 79 | /* channel state */ | ||
| 80 | u16 i2c_slave_addr; | ||
| 81 | + u16 volt_reg_addr; | ||
| 82 | + u16 cmd_reg_addr; | ||
| 83 | |||
| 84 | /* register access data */ | ||
| 85 | const struct omap_vc_common *common; | ||
| 86 | u32 smps_sa_mask; | ||
| 87 | u32 smps_volra_mask; | ||
| 88 | + u32 smps_cmdra_mask; | ||
| 89 | u8 cmdval_reg; | ||
| 90 | - u8 smps_volra_shift; | ||
| 91 | }; | ||
| 92 | |||
| 93 | extern struct omap_vc_channel omap3_vc_mpu; | ||
| 94 | diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 95 | index 86be50c..df8bd5e 100644 | ||
| 96 | --- a/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 97 | +++ b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 98 | @@ -32,6 +32,7 @@ | ||
| 99 | static struct omap_vc_common omap3_vc_common = { | ||
| 100 | .smps_sa_reg = OMAP3_PRM_VC_SMPS_SA_OFFSET, | ||
| 101 | .smps_volra_reg = OMAP3_PRM_VC_SMPS_VOL_RA_OFFSET, | ||
| 102 | + .smps_cmdra_reg = OMAP3_PRM_VC_SMPS_CMD_RA_OFFSET, | ||
| 103 | .bypass_val_reg = OMAP3_PRM_VC_BYPASS_VAL_OFFSET, | ||
| 104 | .data_shift = OMAP3430_DATA_SHIFT, | ||
| 105 | .slaveaddr_shift = OMAP3430_SLAVEADDR_SHIFT, | ||
| 106 | @@ -48,14 +49,14 @@ struct omap_vc_channel omap3_vc_mpu = { | ||
| 107 | .common = &omap3_vc_common, | ||
| 108 | .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_0_OFFSET, | ||
| 109 | .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, | ||
| 110 | - .smps_volra_shift = OMAP3430_VOLRA0_SHIFT, | ||
| 111 | .smps_volra_mask = OMAP3430_VOLRA0_MASK, | ||
| 112 | + .smps_cmdra_mask = OMAP3430_CMDRA0_MASK, | ||
| 113 | }; | ||
| 114 | |||
| 115 | struct omap_vc_channel omap3_vc_core = { | ||
| 116 | .common = &omap3_vc_common, | ||
| 117 | .cmdval_reg = OMAP3_PRM_VC_CMD_VAL_1_OFFSET, | ||
| 118 | .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, | ||
| 119 | - .smps_volra_shift = OMAP3430_VOLRA1_SHIFT, | ||
| 120 | .smps_volra_mask = OMAP3430_VOLRA1_MASK, | ||
| 121 | + .smps_cmdra_mask = OMAP3430_CMDRA1_MASK, | ||
| 122 | }; | ||
| 123 | diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 124 | index af922b4..5d104ff 100644 | ||
| 125 | --- a/arch/arm/mach-omap2/vc44xx_data.c | ||
| 126 | +++ b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 127 | @@ -33,6 +33,7 @@ | ||
| 128 | static const struct omap_vc_common omap4_vc_common = { | ||
| 129 | .smps_sa_reg = OMAP4_PRM_VC_SMPS_SA_OFFSET, | ||
| 130 | .smps_volra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_VOL_OFFSET, | ||
| 131 | + .smps_cmdra_reg = OMAP4_PRM_VC_VAL_SMPS_RA_CMD_OFFSET, | ||
| 132 | .bypass_val_reg = OMAP4_PRM_VC_VAL_BYPASS_OFFSET, | ||
| 133 | .data_shift = OMAP4430_DATA_SHIFT, | ||
| 134 | .slaveaddr_shift = OMAP4430_SLAVEADDR_SHIFT, | ||
| 135 | @@ -50,23 +51,23 @@ struct omap_vc_channel omap4_vc_mpu = { | ||
| 136 | .common = &omap4_vc_common, | ||
| 137 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, | ||
| 138 | .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, | ||
| 139 | - .smps_volra_shift = OMAP4430_VOLRA_VDD_MPU_L_SHIFT, | ||
| 140 | .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, | ||
| 141 | + .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK, | ||
| 142 | }; | ||
| 143 | |||
| 144 | struct omap_vc_channel omap4_vc_iva = { | ||
| 145 | .common = &omap4_vc_common, | ||
| 146 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_IVA_L_OFFSET, | ||
| 147 | .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, | ||
| 148 | - .smps_volra_shift = OMAP4430_VOLRA_VDD_IVA_L_SHIFT, | ||
| 149 | .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, | ||
| 150 | + .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK, | ||
| 151 | }; | ||
| 152 | |||
| 153 | struct omap_vc_channel omap4_vc_core = { | ||
| 154 | .common = &omap4_vc_common, | ||
| 155 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_CORE_L_OFFSET, | ||
| 156 | .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, | ||
| 157 | - .smps_volra_shift = OMAP4430_VOLRA_VDD_CORE_L_SHIFT, | ||
| 158 | .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, | ||
| 159 | + .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK, | ||
| 160 | }; | ||
| 161 | |||
| 162 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 163 | index 639e85c..3129d64 100644 | ||
| 164 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 165 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 166 | @@ -111,14 +111,14 @@ struct omap_volt_pmic_info { | ||
| 167 | u32 off_volt; | ||
| 168 | u16 volt_setup_time; | ||
| 169 | u16 i2c_slave_addr; | ||
| 170 | + u16 volt_reg_addr; | ||
| 171 | + u16 cmd_reg_addr; | ||
| 172 | u8 vp_erroroffset; | ||
| 173 | u8 vp_vstepmin; | ||
| 174 | u8 vp_vstepmax; | ||
| 175 | u8 vp_vddmin; | ||
| 176 | u8 vp_vddmax; | ||
| 177 | u8 vp_timeout_us; | ||
| 178 | - u8 volt_reg_addr; | ||
| 179 | - u8 cmd_reg_addr; | ||
| 180 | unsigned long (*vsel_to_uv) (const u8 vsel); | ||
| 181 | u8 (*uv_to_vsel) (unsigned long uV); | ||
| 182 | }; | ||
| 183 | -- | ||
| 184 | 1.7.2.5 | ||
| 185 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0120-OMAP3-VC-bypass-use-fields-from-VC-struct-instead-of.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0120-OMAP3-VC-bypass-use-fields-from-VC-struct-instead-of.patch deleted file mode 100644 index 37b7af09..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0120-OMAP3-VC-bypass-use-fields-from-VC-struct-instead-of.patch +++ /dev/null | |||
| @@ -1,42 +0,0 @@ | |||
| 1 | From ebe24c52d0431437103277f4e378c3dad0bde3e9 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Tue, 29 Mar 2011 14:24:47 -0700 | ||
| 4 | Subject: [PATCH 120/149] OMAP3+: VC bypass: use fields from VC struct instead of PMIC info | ||
| 5 | |||
| 6 | The PMIC configurable variables should be isolated to VC initialization. | ||
| 7 | The rest of the VC functions (like VC bypass) should use the i2c slave address | ||
| 8 | and voltage register address fields from struct omap_vc_channel. | ||
| 9 | |||
| 10 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/vc.c | 7 ++----- | ||
| 13 | 1 files changed, 2 insertions(+), 5 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 16 | index 50b1f7c..9e0dc8d 100644 | ||
| 17 | --- a/arch/arm/mach-omap2/vc.c | ||
| 18 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 19 | @@ -91,7 +91,6 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, | ||
| 20 | unsigned long target_volt) | ||
| 21 | { | ||
| 22 | struct omap_vc_channel *vc = voltdm->vc; | ||
| 23 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 24 | u32 loop_cnt = 0, retries_cnt = 0; | ||
| 25 | u32 vc_valid, vc_bypass_val_reg, vc_bypass_value; | ||
| 26 | u8 target_vsel, current_vsel; | ||
| 27 | @@ -104,10 +103,8 @@ int omap_vc_bypass_scale(struct voltagedomain *voltdm, | ||
| 28 | vc_valid = vc->common->valid; | ||
| 29 | vc_bypass_val_reg = vc->common->bypass_val_reg; | ||
| 30 | vc_bypass_value = (target_vsel << vc->common->data_shift) | | ||
| 31 | - (vdd->pmic_info->volt_reg_addr << | ||
| 32 | - vc->common->regaddr_shift) | | ||
| 33 | - (vdd->pmic_info->i2c_slave_addr << | ||
| 34 | - vc->common->slaveaddr_shift); | ||
| 35 | + (vc->volt_reg_addr << vc->common->regaddr_shift) | | ||
| 36 | + (vc->i2c_slave_addr << vc->common->slaveaddr_shift); | ||
| 37 | |||
| 38 | voltdm->write(vc_bypass_value, vc_bypass_val_reg); | ||
| 39 | voltdm->write(vc_bypass_value | vc_valid, vc_bypass_val_reg); | ||
| 40 | -- | ||
| 41 | 1.7.2.5 | ||
| 42 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0121-OMAP3-VC-cleanup-voltage-setup-time-configuration.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0121-OMAP3-VC-cleanup-voltage-setup-time-configuration.patch deleted file mode 100644 index 1e103a46..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0121-OMAP3-VC-cleanup-voltage-setup-time-configuration.patch +++ /dev/null | |||
| @@ -1,227 +0,0 @@ | |||
| 1 | From 50a49ce5dfe92764b167510f4edb9dcde880f9d5 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Tue, 29 Mar 2011 14:36:04 -0700 | ||
| 4 | Subject: [PATCH 121/149] OMAP3+: VC: cleanup voltage setup time configuration | ||
| 5 | |||
| 6 | - add setup_time field to struct omap_vc_channel (init'd from PMIC data) | ||
| 7 | - use VC/VP register access helper for read/modify/write | ||
| 8 | - move VFSM structure from omap_vdd_info into struct voltagedomain | ||
| 9 | - remove redunant _data suffix from VFSM structures and variables | ||
| 10 | |||
| 11 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/vc.c | 10 ++++------ | ||
| 14 | arch/arm/mach-omap2/vc.h | 1 + | ||
| 15 | arch/arm/mach-omap2/voltage.h | 7 +++---- | ||
| 16 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 8 ++++---- | ||
| 17 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 12 ++++++------ | ||
| 18 | 5 files changed, 18 insertions(+), 20 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 21 | index 9e0dc8d..d7415ea 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/vc.c | ||
| 23 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 24 | @@ -214,7 +214,6 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 25 | { | ||
| 26 | struct omap_vc_channel *vc = voltdm->vc; | ||
| 27 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 28 | - u32 vc_val; | ||
| 29 | |||
| 30 | if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { | ||
| 31 | pr_err("%s: PMIC info requried to configure vc for" | ||
| 32 | @@ -233,6 +232,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 33 | vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; | ||
| 34 | vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; | ||
| 35 | vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr; | ||
| 36 | + vc->setup_time = vdd->pmic_info->volt_setup_time; | ||
| 37 | |||
| 38 | /* Configure the i2c slave address for this VC */ | ||
| 39 | voltdm->rmw(vc->smps_sa_mask, | ||
| 40 | @@ -251,11 +251,9 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 41 | vc->common->smps_cmdra_reg); | ||
| 42 | |||
| 43 | /* Configure the setup times */ | ||
| 44 | - vc_val = voltdm->read(vdd->vfsm->voltsetup_reg); | ||
| 45 | - vc_val &= ~vdd->vfsm->voltsetup_mask; | ||
| 46 | - vc_val |= vdd->pmic_info->volt_setup_time << | ||
| 47 | - vdd->vfsm->voltsetup_shift; | ||
| 48 | - voltdm->write(vc_val, vdd->vfsm->voltsetup_reg); | ||
| 49 | + voltdm->rmw(voltdm->vfsm->voltsetup_mask, | ||
| 50 | + vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), | ||
| 51 | + voltdm->vfsm->voltsetup_reg); | ||
| 52 | |||
| 53 | if (cpu_is_omap34xx()) | ||
| 54 | omap3_vc_init_channel(voltdm); | ||
| 55 | diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h | ||
| 56 | index f3b0551..45e63cf 100644 | ||
| 57 | --- a/arch/arm/mach-omap2/vc.h | ||
| 58 | +++ b/arch/arm/mach-omap2/vc.h | ||
| 59 | @@ -66,6 +66,7 @@ struct omap_vc_channel { | ||
| 60 | u16 i2c_slave_addr; | ||
| 61 | u16 volt_reg_addr; | ||
| 62 | u16 cmd_reg_addr; | ||
| 63 | + u16 setup_time; | ||
| 64 | |||
| 65 | /* register access data */ | ||
| 66 | const struct omap_vc_common *common; | ||
| 67 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 68 | index 3129d64..2b2ab56 100644 | ||
| 69 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 70 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 71 | @@ -36,7 +36,7 @@ struct powerdomain; | ||
| 72 | struct omap_vdd_info; | ||
| 73 | |||
| 74 | /** | ||
| 75 | - * struct omap_vfsm_instance_data - per-voltage manager FSM register/bitfield | ||
| 76 | + * struct omap_vfsm_instance - per-voltage manager FSM register/bitfield | ||
| 77 | * data | ||
| 78 | * @voltsetup_mask: SETUP_TIME* bitmask in the PRM_VOLTSETUP* register | ||
| 79 | * @voltsetup_reg: register offset of PRM_VOLTSETUP from PRM base | ||
| 80 | @@ -46,7 +46,7 @@ struct omap_vdd_info; | ||
| 81 | * XXX It is not necessary to have both a _mask and a _shift for the same | ||
| 82 | * bitfield - remove one! | ||
| 83 | */ | ||
| 84 | -struct omap_vfsm_instance_data { | ||
| 85 | +struct omap_vfsm_instance { | ||
| 86 | u32 voltsetup_mask; | ||
| 87 | u8 voltsetup_reg; | ||
| 88 | u8 voltsetup_shift; | ||
| 89 | @@ -67,6 +67,7 @@ struct voltagedomain { | ||
| 90 | struct list_head node; | ||
| 91 | struct list_head pwrdm_list; | ||
| 92 | struct omap_vc_channel *vc; | ||
| 93 | + const struct omap_vfsm_instance *vfsm; | ||
| 94 | |||
| 95 | /* VC/VP register access functions: SoC specific */ | ||
| 96 | u32 (*read) (u8 offset); | ||
| 97 | @@ -133,7 +134,6 @@ struct omap_volt_pmic_info { | ||
| 98 | * @vp_data : the register values, shifts, masks for various | ||
| 99 | * vp registers | ||
| 100 | * @vp_rt_data : VP data derived at runtime, not predefined | ||
| 101 | - * @vfsm : voltage manager FSM data | ||
| 102 | * @debug_dir : debug directory for this voltage domain. | ||
| 103 | * @curr_volt : current voltage for this vdd. | ||
| 104 | * @vp_enabled : flag to keep track of whether vp is enabled or not | ||
| 105 | @@ -144,7 +144,6 @@ struct omap_vdd_info { | ||
| 106 | struct omap_volt_pmic_info *pmic_info; | ||
| 107 | struct omap_vp_instance_data *vp_data; | ||
| 108 | struct omap_vp_runtime_data vp_rt_data; | ||
| 109 | - const struct omap_vfsm_instance_data *vfsm; | ||
| 110 | struct dentry *debug_dir; | ||
| 111 | u32 curr_volt; | ||
| 112 | bool vp_enabled; | ||
| 113 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 114 | index 1d66749..4ea9a7b 100644 | ||
| 115 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 116 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 117 | @@ -31,7 +31,7 @@ | ||
| 118 | * VDD data | ||
| 119 | */ | ||
| 120 | |||
| 121 | -static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { | ||
| 122 | +static const struct omap_vfsm_instance omap3_vdd1_vfsm = { | ||
| 123 | .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, | ||
| 124 | .voltsetup_shift = OMAP3430_SETUP_TIME1_SHIFT, | ||
| 125 | .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, | ||
| 126 | @@ -39,10 +39,9 @@ static const struct omap_vfsm_instance_data omap3_vdd1_vfsm_data = { | ||
| 127 | |||
| 128 | static struct omap_vdd_info omap3_vdd1_info = { | ||
| 129 | .vp_data = &omap3_vp1_data, | ||
| 130 | - .vfsm = &omap3_vdd1_vfsm_data, | ||
| 131 | }; | ||
| 132 | |||
| 133 | -static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { | ||
| 134 | +static const struct omap_vfsm_instance omap3_vdd2_vfsm = { | ||
| 135 | .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, | ||
| 136 | .voltsetup_shift = OMAP3430_SETUP_TIME2_SHIFT, | ||
| 137 | .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, | ||
| 138 | @@ -50,7 +49,6 @@ static const struct omap_vfsm_instance_data omap3_vdd2_vfsm_data = { | ||
| 139 | |||
| 140 | static struct omap_vdd_info omap3_vdd2_info = { | ||
| 141 | .vp_data = &omap3_vp2_data, | ||
| 142 | - .vfsm = &omap3_vdd2_vfsm_data, | ||
| 143 | }; | ||
| 144 | |||
| 145 | static struct voltagedomain omap3_voltdm_mpu = { | ||
| 146 | @@ -60,6 +58,7 @@ static struct voltagedomain omap3_voltdm_mpu = { | ||
| 147 | .write = omap3_prm_vcvp_write, | ||
| 148 | .rmw = omap3_prm_vcvp_rmw, | ||
| 149 | .vc = &omap3_vc_mpu, | ||
| 150 | + .vfsm = &omap3_vdd1_vfsm, | ||
| 151 | .vdd = &omap3_vdd1_info, | ||
| 152 | }; | ||
| 153 | |||
| 154 | @@ -70,6 +69,7 @@ static struct voltagedomain omap3_voltdm_core = { | ||
| 155 | .write = omap3_prm_vcvp_write, | ||
| 156 | .rmw = omap3_prm_vcvp_rmw, | ||
| 157 | .vc = &omap3_vc_core, | ||
| 158 | + .vfsm = &omap3_vdd2_vfsm, | ||
| 159 | .vdd = &omap3_vdd2_info, | ||
| 160 | }; | ||
| 161 | |||
| 162 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 163 | index e435795..dd4bd22 100644 | ||
| 164 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 165 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 166 | @@ -32,31 +32,28 @@ | ||
| 167 | #include "vc.h" | ||
| 168 | #include "vp.h" | ||
| 169 | |||
| 170 | -static const struct omap_vfsm_instance_data omap4_vdd_mpu_vfsm_data = { | ||
| 171 | +static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { | ||
| 172 | .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, | ||
| 173 | }; | ||
| 174 | |||
| 175 | static struct omap_vdd_info omap4_vdd_mpu_info = { | ||
| 176 | .vp_data = &omap4_vp_mpu_data, | ||
| 177 | - .vfsm = &omap4_vdd_mpu_vfsm_data, | ||
| 178 | }; | ||
| 179 | |||
| 180 | -static const struct omap_vfsm_instance_data omap4_vdd_iva_vfsm_data = { | ||
| 181 | +static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = { | ||
| 182 | .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, | ||
| 183 | }; | ||
| 184 | |||
| 185 | static struct omap_vdd_info omap4_vdd_iva_info = { | ||
| 186 | .vp_data = &omap4_vp_iva_data, | ||
| 187 | - .vfsm = &omap4_vdd_iva_vfsm_data, | ||
| 188 | }; | ||
| 189 | |||
| 190 | -static const struct omap_vfsm_instance_data omap4_vdd_core_vfsm_data = { | ||
| 191 | +static const struct omap_vfsm_instance omap4_vdd_core_vfsm = { | ||
| 192 | .voltsetup_reg = OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, | ||
| 193 | }; | ||
| 194 | |||
| 195 | static struct omap_vdd_info omap4_vdd_core_info = { | ||
| 196 | .vp_data = &omap4_vp_core_data, | ||
| 197 | - .vfsm = &omap4_vdd_core_vfsm_data, | ||
| 198 | }; | ||
| 199 | |||
| 200 | static struct voltagedomain omap4_voltdm_mpu = { | ||
| 201 | @@ -66,6 +63,7 @@ static struct voltagedomain omap4_voltdm_mpu = { | ||
| 202 | .write = omap4_prm_vcvp_write, | ||
| 203 | .rmw = omap4_prm_vcvp_rmw, | ||
| 204 | .vc = &omap4_vc_mpu, | ||
| 205 | + .vfsm = &omap4_vdd_mpu_vfsm, | ||
| 206 | .vdd = &omap4_vdd_mpu_info, | ||
| 207 | }; | ||
| 208 | |||
| 209 | @@ -76,6 +74,7 @@ static struct voltagedomain omap4_voltdm_iva = { | ||
| 210 | .write = omap4_prm_vcvp_write, | ||
| 211 | .rmw = omap4_prm_vcvp_rmw, | ||
| 212 | .vc = &omap4_vc_iva, | ||
| 213 | + .vfsm = &omap4_vdd_iva_vfsm, | ||
| 214 | .vdd = &omap4_vdd_iva_info, | ||
| 215 | }; | ||
| 216 | |||
| 217 | @@ -86,6 +85,7 @@ static struct voltagedomain omap4_voltdm_core = { | ||
| 218 | .write = omap4_prm_vcvp_write, | ||
| 219 | .rmw = omap4_prm_vcvp_rmw, | ||
| 220 | .vc = &omap4_vc_core, | ||
| 221 | + .vfsm = &omap4_vdd_core_vfsm, | ||
| 222 | .vdd = &omap4_vdd_core_info, | ||
| 223 | }; | ||
| 224 | |||
| 225 | -- | ||
| 226 | 1.7.2.5 | ||
| 227 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0122-OMAP3-VC-move-on-onlp-ret-off-command-configuration-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0122-OMAP3-VC-move-on-onlp-ret-off-command-configuration-.patch deleted file mode 100644 index 00085fda..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0122-OMAP3-VC-move-on-onlp-ret-off-command-configuration-.patch +++ /dev/null | |||
| @@ -1,83 +0,0 @@ | |||
| 1 | From 998b0b0ef5013478d128a2b1a4f435b94394a1a5 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Tue, 29 Mar 2011 15:14:38 -0700 | ||
| 4 | Subject: [PATCH 122/149] OMAP3+: VC: move on/onlp/ret/off command configuration into common init | ||
| 5 | |||
| 6 | Configuring the on/onlp/ret/off command values is common to OMAP3 & 4. | ||
| 7 | Move from OMAP3-only init into common VC init. | ||
| 8 | |||
| 9 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 10 | --- | ||
| 11 | arch/arm/mach-omap2/vc.c | 30 +++++++++++++----------------- | ||
| 12 | 1 files changed, 13 insertions(+), 17 deletions(-) | ||
| 13 | |||
| 14 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 15 | index d7415ea..7df4438 100644 | ||
| 16 | --- a/arch/arm/mach-omap2/vc.c | ||
| 17 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 18 | @@ -148,26 +148,11 @@ static void __init omap3_vfsm_init(struct voltagedomain *voltdm) | ||
| 19 | |||
| 20 | static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) | ||
| 21 | { | ||
| 22 | - struct omap_vc_channel *vc = voltdm->vc; | ||
| 23 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 24 | static bool is_initialized; | ||
| 25 | - u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; | ||
| 26 | - u32 vc_val; | ||
| 27 | |||
| 28 | if (is_initialized) | ||
| 29 | return; | ||
| 30 | |||
| 31 | - /* Set up the on, inactive, retention and off voltage */ | ||
| 32 | - on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); | ||
| 33 | - onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); | ||
| 34 | - ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); | ||
| 35 | - off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); | ||
| 36 | - vc_val = ((on_vsel << vc->common->cmd_on_shift) | | ||
| 37 | - (onlp_vsel << vc->common->cmd_onlp_shift) | | ||
| 38 | - (ret_vsel << vc->common->cmd_ret_shift) | | ||
| 39 | - (off_vsel << vc->common->cmd_off_shift)); | ||
| 40 | - voltdm->write(vc_val, vc->cmdval_reg); | ||
| 41 | - | ||
| 42 | /* | ||
| 43 | * Generic VC parameters init | ||
| 44 | * XXX This data should be abstracted out | ||
| 45 | @@ -192,8 +177,6 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) | ||
| 46 | if (is_initialized) | ||
| 47 | return; | ||
| 48 | |||
| 49 | - /* TODO: Configure setup times and CMD_VAL values*/ | ||
| 50 | - | ||
| 51 | /* | ||
| 52 | * Generic VC parameters init | ||
| 53 | * XXX This data should be abstracted out | ||
| 54 | @@ -214,6 +197,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 55 | { | ||
| 56 | struct omap_vc_channel *vc = voltdm->vc; | ||
| 57 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 58 | + u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; | ||
| 59 | + u32 val; | ||
| 60 | |||
| 61 | if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { | ||
| 62 | pr_err("%s: PMIC info requried to configure vc for" | ||
| 63 | @@ -250,6 +235,17 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 64 | vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), | ||
| 65 | vc->common->smps_cmdra_reg); | ||
| 66 | |||
| 67 | + /* Set up the on, inactive, retention and off voltage */ | ||
| 68 | + on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); | ||
| 69 | + onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); | ||
| 70 | + ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); | ||
| 71 | + off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); | ||
| 72 | + val = ((on_vsel << vc->common->cmd_on_shift) | | ||
| 73 | + (onlp_vsel << vc->common->cmd_onlp_shift) | | ||
| 74 | + (ret_vsel << vc->common->cmd_ret_shift) | | ||
| 75 | + (off_vsel << vc->common->cmd_off_shift)); | ||
| 76 | + voltdm->write(val, vc->cmdval_reg); | ||
| 77 | + | ||
| 78 | /* Configure the setup times */ | ||
| 79 | voltdm->rmw(voltdm->vfsm->voltsetup_mask, | ||
| 80 | vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), | ||
| 81 | -- | ||
| 82 | 1.7.2.5 | ||
| 83 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0123-OMAP3-VC-abstract-out-channel-configuration.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0123-OMAP3-VC-abstract-out-channel-configuration.patch deleted file mode 100644 index ce091447..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0123-OMAP3-VC-abstract-out-channel-configuration.patch +++ /dev/null | |||
| @@ -1,267 +0,0 @@ | |||
| 1 | From 7f3361ef34caa14bf669907555a0bc7dbe92f8c9 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Tue, 29 Mar 2011 15:57:16 -0700 | ||
| 4 | Subject: [PATCH 123/149] OMAP3+: VC: abstract out channel configuration | ||
| 5 | |||
| 6 | VC channel configuration is programmed based on settings coming from | ||
| 7 | the PMIC configuration. | ||
| 8 | |||
| 9 | Currently, the VC channel to PMIC mapping is a simple one-to-one | ||
| 10 | mapping. Whenever a VC channel parameter is configured (i2c slave | ||
| 11 | addres, PMIC register address, on/ret/off command), the corresponding | ||
| 12 | bits are enabled in the VC channel configuration register. | ||
| 13 | |||
| 14 | If necessary, the programmability of channel configuration settings | ||
| 15 | could be extended to board/PMIC files, however, because this patch | ||
| 16 | changes the channel configuration to be programmed based on existing | ||
| 17 | values from the PMIC settings, it may not be required. | ||
| 18 | |||
| 19 | Also note that starting with OMAP4, where there are more than 2 | ||
| 20 | channels, one channel is identified as the "default" channel. When | ||
| 21 | any of the bits in the channel config for the other channels are zero, | ||
| 22 | it means to use the default channel. The OMAP4 TRM (at least through | ||
| 23 | NDA version Q) is wrong in describing which is the default channel. | ||
| 24 | The default channel on OMAP4 is MPU, not CORE as decribed in the TRM. | ||
| 25 | |||
| 26 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 27 | --- | ||
| 28 | arch/arm/mach-omap2/vc.c | 70 ++++++++++++++++++++++++++++++------ | ||
| 29 | arch/arm/mach-omap2/vc.h | 9 +++++ | ||
| 30 | arch/arm/mach-omap2/vc3xxx_data.c | 3 ++ | ||
| 31 | arch/arm/mach-omap2/vc44xx_data.c | 5 +++ | ||
| 32 | 4 files changed, 75 insertions(+), 12 deletions(-) | ||
| 33 | |||
| 34 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 35 | index 7df4438..e413b97 100644 | ||
| 36 | --- a/arch/arm/mach-omap2/vc.c | ||
| 37 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 38 | @@ -10,6 +10,52 @@ | ||
| 39 | #include "prm-regbits-44xx.h" | ||
| 40 | #include "prm44xx.h" | ||
| 41 | |||
| 42 | +/* | ||
| 43 | + * Channel configuration bits, common for OMAP3 & 4 | ||
| 44 | + * OMAP3 register: PRM_VC_CH_CONF | ||
| 45 | + * OMAP4 register: PRM_VC_CFG_CHANNEL | ||
| 46 | + */ | ||
| 47 | +#define CFG_CHANNEL_SA BIT(0) | ||
| 48 | +#define CFG_CHANNEL_RAV BIT(1) | ||
| 49 | +#define CFG_CHANNEL_RAC BIT(2) | ||
| 50 | +#define CFG_CHANNEL_RACEN BIT(3) | ||
| 51 | +#define CFG_CHANNEL_CMD BIT(4) | ||
| 52 | +#define CFG_CHANNEL_MASK 0x3f | ||
| 53 | + | ||
| 54 | +/** | ||
| 55 | + * omap_vc_config_channel - configure VC channel to PMIC mappings | ||
| 56 | + * @voltdm: pointer to voltagdomain defining the desired VC channel | ||
| 57 | + * | ||
| 58 | + * Configures the VC channel to PMIC mappings for the following | ||
| 59 | + * PMIC settings | ||
| 60 | + * - i2c slave address (SA) | ||
| 61 | + * - voltage configuration address (RAV) | ||
| 62 | + * - command configuration address (RAC) and enable bit (RACEN) | ||
| 63 | + * - command values for ON, ONLP, RET and OFF (CMD) | ||
| 64 | + * | ||
| 65 | + * This function currently only allows flexible configuration of the | ||
| 66 | + * non-default channel. Starting with OMAP4, there are more than 2 | ||
| 67 | + * channels, with one defined as the default (on OMAP4, it's MPU.) | ||
| 68 | + * Only the non-default channel can be configured. | ||
| 69 | + */ | ||
| 70 | +static int omap_vc_config_channel(struct voltagedomain *voltdm) | ||
| 71 | +{ | ||
| 72 | + struct omap_vc_channel *vc = voltdm->vc; | ||
| 73 | + | ||
| 74 | + /* | ||
| 75 | + * For default channel, the only configurable bit is RACEN. | ||
| 76 | + * All others must stay at zero (see function comment above.) | ||
| 77 | + */ | ||
| 78 | + if (vc->flags & OMAP_VC_CHANNEL_DEFAULT) | ||
| 79 | + vc->cfg_channel &= CFG_CHANNEL_RACEN; | ||
| 80 | + | ||
| 81 | + voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift, | ||
| 82 | + vc->cfg_channel << vc->cfg_channel_sa_shift, | ||
| 83 | + vc->common->cfg_channel_reg); | ||
| 84 | + | ||
| 85 | + return 0; | ||
| 86 | +} | ||
| 87 | + | ||
| 88 | /* Voltage scale and accessory APIs */ | ||
| 89 | int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 90 | unsigned long target_volt, | ||
| 91 | @@ -157,8 +203,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) | ||
| 92 | * Generic VC parameters init | ||
| 93 | * XXX This data should be abstracted out | ||
| 94 | */ | ||
| 95 | - voltdm->write(OMAP3430_CMD1_MASK | OMAP3430_RAV1_MASK, | ||
| 96 | - OMAP3_PRM_VC_CH_CONF_OFFSET); | ||
| 97 | voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, | ||
| 98 | OMAP3_PRM_VC_I2C_CFG_OFFSET); | ||
| 99 | |||
| 100 | @@ -177,15 +221,6 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) | ||
| 101 | if (is_initialized) | ||
| 102 | return; | ||
| 103 | |||
| 104 | - /* | ||
| 105 | - * Generic VC parameters init | ||
| 106 | - * XXX This data should be abstracted out | ||
| 107 | - */ | ||
| 108 | - vc_val = (OMAP4430_RAV_VDD_MPU_L_MASK | OMAP4430_CMD_VDD_MPU_L_MASK | | ||
| 109 | - OMAP4430_RAV_VDD_IVA_L_MASK | OMAP4430_CMD_VDD_IVA_L_MASK | | ||
| 110 | - OMAP4430_RAV_VDD_CORE_L_MASK | OMAP4430_CMD_VDD_CORE_L_MASK); | ||
| 111 | - voltdm->write(vc_val, OMAP4_PRM_VC_CFG_CHANNEL_OFFSET); | ||
| 112 | - | ||
| 113 | /* XXX These are magic numbers and do not belong! */ | ||
| 114 | vc_val = (0x60 << OMAP4430_SCLL_SHIFT | 0x26 << OMAP4430_SCLH_SHIFT); | ||
| 115 | voltdm->write(vc_val, OMAP4_PRM_VC_CFG_I2C_CLK_OFFSET); | ||
| 116 | @@ -213,6 +248,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 117 | return; | ||
| 118 | } | ||
| 119 | |||
| 120 | + vc->cfg_channel = 0; | ||
| 121 | + | ||
| 122 | /* get PMIC/board specific settings */ | ||
| 123 | vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; | ||
| 124 | vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; | ||
| 125 | @@ -223,6 +260,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 126 | voltdm->rmw(vc->smps_sa_mask, | ||
| 127 | vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), | ||
| 128 | vc->common->smps_sa_reg); | ||
| 129 | + vc->cfg_channel |= CFG_CHANNEL_SA; | ||
| 130 | |||
| 131 | /* | ||
| 132 | * Configure the PMIC register addresses. | ||
| 133 | @@ -230,10 +268,14 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 134 | voltdm->rmw(vc->smps_volra_mask, | ||
| 135 | vc->volt_reg_addr << __ffs(vc->smps_volra_mask), | ||
| 136 | vc->common->smps_volra_reg); | ||
| 137 | - if (vc->cmd_reg_addr) | ||
| 138 | + vc->cfg_channel |= CFG_CHANNEL_RAV; | ||
| 139 | + | ||
| 140 | + if (vc->cmd_reg_addr) { | ||
| 141 | voltdm->rmw(vc->smps_cmdra_mask, | ||
| 142 | vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), | ||
| 143 | vc->common->smps_cmdra_reg); | ||
| 144 | + vc->cfg_channel |= CFG_CHANNEL_RAC | CFG_CHANNEL_RACEN; | ||
| 145 | + } | ||
| 146 | |||
| 147 | /* Set up the on, inactive, retention and off voltage */ | ||
| 148 | on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); | ||
| 149 | @@ -245,6 +287,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 150 | (ret_vsel << vc->common->cmd_ret_shift) | | ||
| 151 | (off_vsel << vc->common->cmd_off_shift)); | ||
| 152 | voltdm->write(val, vc->cmdval_reg); | ||
| 153 | + vc->cfg_channel |= CFG_CHANNEL_CMD; | ||
| 154 | + | ||
| 155 | + /* Channel configuration */ | ||
| 156 | + omap_vc_config_channel(voltdm); | ||
| 157 | |||
| 158 | /* Configure the setup times */ | ||
| 159 | voltdm->rmw(voltdm->vfsm->voltsetup_mask, | ||
| 160 | diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h | ||
| 161 | index 45e63cf..604f5b6 100644 | ||
| 162 | --- a/arch/arm/mach-omap2/vc.h | ||
| 163 | +++ b/arch/arm/mach-omap2/vc.h | ||
| 164 | @@ -53,20 +53,28 @@ struct omap_vc_common { | ||
| 165 | u8 cmd_onlp_shift; | ||
| 166 | u8 cmd_ret_shift; | ||
| 167 | u8 cmd_off_shift; | ||
| 168 | + u8 cfg_channel_reg; | ||
| 169 | }; | ||
| 170 | |||
| 171 | +/* omap_vc_channel.flags values */ | ||
| 172 | +#define OMAP_VC_CHANNEL_DEFAULT BIT(0) | ||
| 173 | + | ||
| 174 | /** | ||
| 175 | * struct omap_vc_channel - VC per-instance data | ||
| 176 | + * @flags: VC channel-specific flags (optional) | ||
| 177 | * @common: pointer to VC common data for this platform | ||
| 178 | * @smps_sa_mask: i2c slave address bitmask in the PRM_VC_SMPS_SA register | ||
| 179 | * @smps_volra_mask: VOLRA* bitmask in the PRM_VC_VOL_RA register | ||
| 180 | */ | ||
| 181 | struct omap_vc_channel { | ||
| 182 | + u8 flags; | ||
| 183 | + | ||
| 184 | /* channel state */ | ||
| 185 | u16 i2c_slave_addr; | ||
| 186 | u16 volt_reg_addr; | ||
| 187 | u16 cmd_reg_addr; | ||
| 188 | u16 setup_time; | ||
| 189 | + u8 cfg_channel; | ||
| 190 | |||
| 191 | /* register access data */ | ||
| 192 | const struct omap_vc_common *common; | ||
| 193 | @@ -74,6 +82,7 @@ struct omap_vc_channel { | ||
| 194 | u32 smps_volra_mask; | ||
| 195 | u32 smps_cmdra_mask; | ||
| 196 | u8 cmdval_reg; | ||
| 197 | + u8 cfg_channel_sa_shift; | ||
| 198 | }; | ||
| 199 | |||
| 200 | extern struct omap_vc_channel omap3_vc_mpu; | ||
| 201 | diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 202 | index df8bd5e..f4449eb 100644 | ||
| 203 | --- a/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 204 | +++ b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 205 | @@ -43,6 +43,7 @@ static struct omap_vc_common omap3_vc_common = { | ||
| 206 | .cmd_onlp_shift = OMAP3430_VC_CMD_ONLP_SHIFT, | ||
| 207 | .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, | ||
| 208 | .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, | ||
| 209 | + .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, | ||
| 210 | }; | ||
| 211 | |||
| 212 | struct omap_vc_channel omap3_vc_mpu = { | ||
| 213 | @@ -51,6 +52,7 @@ struct omap_vc_channel omap3_vc_mpu = { | ||
| 214 | .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA0_MASK, | ||
| 215 | .smps_volra_mask = OMAP3430_VOLRA0_MASK, | ||
| 216 | .smps_cmdra_mask = OMAP3430_CMDRA0_MASK, | ||
| 217 | + .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA0_SHIFT, | ||
| 218 | }; | ||
| 219 | |||
| 220 | struct omap_vc_channel omap3_vc_core = { | ||
| 221 | @@ -59,4 +61,5 @@ struct omap_vc_channel omap3_vc_core = { | ||
| 222 | .smps_sa_mask = OMAP3430_PRM_VC_SMPS_SA_SA1_MASK, | ||
| 223 | .smps_volra_mask = OMAP3430_VOLRA1_MASK, | ||
| 224 | .smps_cmdra_mask = OMAP3430_CMDRA1_MASK, | ||
| 225 | + .cfg_channel_sa_shift = OMAP3430_PRM_VC_SMPS_SA_SA1_SHIFT, | ||
| 226 | }; | ||
| 227 | diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 228 | index 5d104ff..1610bde 100644 | ||
| 229 | --- a/arch/arm/mach-omap2/vc44xx_data.c | ||
| 230 | +++ b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 231 | @@ -44,15 +44,18 @@ static const struct omap_vc_common omap4_vc_common = { | ||
| 232 | .cmd_onlp_shift = OMAP4430_ONLP_SHIFT, | ||
| 233 | .cmd_ret_shift = OMAP4430_RET_SHIFT, | ||
| 234 | .cmd_off_shift = OMAP4430_OFF_SHIFT, | ||
| 235 | + .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, | ||
| 236 | }; | ||
| 237 | |||
| 238 | /* VC instance data for each controllable voltage line */ | ||
| 239 | struct omap_vc_channel omap4_vc_mpu = { | ||
| 240 | + .flags = OMAP_VC_CHANNEL_DEFAULT, | ||
| 241 | .common = &omap4_vc_common, | ||
| 242 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, | ||
| 243 | .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, | ||
| 244 | .smps_volra_mask = OMAP4430_VOLRA_VDD_MPU_L_MASK, | ||
| 245 | .smps_cmdra_mask = OMAP4430_CMDRA_VDD_MPU_L_MASK, | ||
| 246 | + .cfg_channel_sa_shift = OMAP4430_SA_VDD_MPU_L_SHIFT, | ||
| 247 | }; | ||
| 248 | |||
| 249 | struct omap_vc_channel omap4_vc_iva = { | ||
| 250 | @@ -61,6 +64,7 @@ struct omap_vc_channel omap4_vc_iva = { | ||
| 251 | .smps_sa_mask = OMAP4430_SA_VDD_IVA_L_PRM_VC_SMPS_SA_MASK, | ||
| 252 | .smps_volra_mask = OMAP4430_VOLRA_VDD_IVA_L_MASK, | ||
| 253 | .smps_cmdra_mask = OMAP4430_CMDRA_VDD_IVA_L_MASK, | ||
| 254 | + .cfg_channel_sa_shift = OMAP4430_SA_VDD_IVA_L_SHIFT, | ||
| 255 | }; | ||
| 256 | |||
| 257 | struct omap_vc_channel omap4_vc_core = { | ||
| 258 | @@ -69,5 +73,6 @@ struct omap_vc_channel omap4_vc_core = { | ||
| 259 | .smps_sa_mask = OMAP4430_SA_VDD_CORE_L_0_6_MASK, | ||
| 260 | .smps_volra_mask = OMAP4430_VOLRA_VDD_CORE_L_MASK, | ||
| 261 | .smps_cmdra_mask = OMAP4430_CMDRA_VDD_CORE_L_MASK, | ||
| 262 | + .cfg_channel_sa_shift = OMAP4430_SA_VDD_CORE_L_SHIFT, | ||
| 263 | }; | ||
| 264 | |||
| 265 | -- | ||
| 266 | 1.7.2.5 | ||
| 267 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0124-OMAP3-voltage-domain-move-PMIC-struct-from-vdd_info-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0124-OMAP3-voltage-domain-move-PMIC-struct-from-vdd_info-.patch deleted file mode 100644 index 9c5fbe3e..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0124-OMAP3-voltage-domain-move-PMIC-struct-from-vdd_info-.patch +++ /dev/null | |||
| @@ -1,394 +0,0 @@ | |||
| 1 | From 94945494c16d0ffd7b52b12492068abf5310654d Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 30 Mar 2011 11:01:10 -0700 | ||
| 4 | Subject: [PATCH 124/149] OMAP3+: voltage domain: move PMIC struct from vdd_info into struct voltagedomain | ||
| 5 | |||
| 6 | Move structure containing PMIC configurable settings into struct | ||
| 7 | voltagedomain. In the process, rename from omap_volt_pmic_info to | ||
| 8 | omap_voltdm_pmic (_info suffix is not helpful.) | ||
| 9 | |||
| 10 | No functional changes. | ||
| 11 | |||
| 12 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/omap_twl.c | 28 ++++++++++++++-------------- | ||
| 15 | arch/arm/mach-omap2/vc.c | 29 ++++++++++++++--------------- | ||
| 16 | arch/arm/mach-omap2/voltage.c | 29 ++++++++++++----------------- | ||
| 17 | arch/arm/mach-omap2/voltage.h | 12 +++++------- | ||
| 18 | arch/arm/mach-omap2/vp.c | 13 ++++++------- | ||
| 19 | 5 files changed, 51 insertions(+), 60 deletions(-) | ||
| 20 | |||
| 21 | diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c | ||
| 22 | index 3249fe3..e467d45 100644 | ||
| 23 | --- a/arch/arm/mach-omap2/omap_twl.c | ||
| 24 | +++ b/arch/arm/mach-omap2/omap_twl.c | ||
| 25 | @@ -143,7 +143,7 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) | ||
| 26 | return DIV_ROUND_UP(uv - 600000, 12500) + 1; | ||
| 27 | } | ||
| 28 | |||
| 29 | -static struct omap_volt_pmic_info omap3_mpu_volt_info = { | ||
| 30 | +static struct omap_voltdm_pmic omap3_mpu_pmic = { | ||
| 31 | .slew_rate = 4000, | ||
| 32 | .step_size = 12500, | ||
| 33 | .on_volt = 1200000, | ||
| 34 | @@ -163,7 +163,7 @@ static struct omap_volt_pmic_info omap3_mpu_volt_info = { | ||
| 35 | .uv_to_vsel = twl4030_uv_to_vsel, | ||
| 36 | }; | ||
| 37 | |||
| 38 | -static struct omap_volt_pmic_info omap3_core_volt_info = { | ||
| 39 | +static struct omap_voltdm_pmic omap3_core_pmic = { | ||
| 40 | .slew_rate = 4000, | ||
| 41 | .step_size = 12500, | ||
| 42 | .on_volt = 1200000, | ||
| 43 | @@ -183,7 +183,7 @@ static struct omap_volt_pmic_info omap3_core_volt_info = { | ||
| 44 | .uv_to_vsel = twl4030_uv_to_vsel, | ||
| 45 | }; | ||
| 46 | |||
| 47 | -static struct omap_volt_pmic_info omap4_mpu_volt_info = { | ||
| 48 | +static struct omap_voltdm_pmic omap4_mpu_pmic = { | ||
| 49 | .slew_rate = 4000, | ||
| 50 | .step_size = 12500, | ||
| 51 | .on_volt = 1350000, | ||
| 52 | @@ -203,7 +203,7 @@ static struct omap_volt_pmic_info omap4_mpu_volt_info = { | ||
| 53 | .uv_to_vsel = twl6030_uv_to_vsel, | ||
| 54 | }; | ||
| 55 | |||
| 56 | -static struct omap_volt_pmic_info omap4_iva_volt_info = { | ||
| 57 | +static struct omap_voltdm_pmic omap4_iva_pmic = { | ||
| 58 | .slew_rate = 4000, | ||
| 59 | .step_size = 12500, | ||
| 60 | .on_volt = 1100000, | ||
| 61 | @@ -223,7 +223,7 @@ static struct omap_volt_pmic_info omap4_iva_volt_info = { | ||
| 62 | .uv_to_vsel = twl6030_uv_to_vsel, | ||
| 63 | }; | ||
| 64 | |||
| 65 | -static struct omap_volt_pmic_info omap4_core_volt_info = { | ||
| 66 | +static struct omap_voltdm_pmic omap4_core_pmic = { | ||
| 67 | .slew_rate = 4000, | ||
| 68 | .step_size = 12500, | ||
| 69 | .on_volt = 1100000, | ||
| 70 | @@ -251,13 +251,13 @@ int __init omap4_twl_init(void) | ||
| 71 | return -ENODEV; | ||
| 72 | |||
| 73 | voltdm = voltdm_lookup("mpu"); | ||
| 74 | - omap_voltage_register_pmic(voltdm, &omap4_mpu_volt_info); | ||
| 75 | + omap_voltage_register_pmic(voltdm, &omap4_mpu_pmic); | ||
| 76 | |||
| 77 | voltdm = voltdm_lookup("iva"); | ||
| 78 | - omap_voltage_register_pmic(voltdm, &omap4_iva_volt_info); | ||
| 79 | + omap_voltage_register_pmic(voltdm, &omap4_iva_pmic); | ||
| 80 | |||
| 81 | voltdm = voltdm_lookup("core"); | ||
| 82 | - omap_voltage_register_pmic(voltdm, &omap4_core_volt_info); | ||
| 83 | + omap_voltage_register_pmic(voltdm, &omap4_core_pmic); | ||
| 84 | |||
| 85 | return 0; | ||
| 86 | } | ||
| 87 | @@ -270,10 +270,10 @@ int __init omap3_twl_init(void) | ||
| 88 | return -ENODEV; | ||
| 89 | |||
| 90 | if (cpu_is_omap3630()) { | ||
| 91 | - omap3_mpu_volt_info.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; | ||
| 92 | - omap3_mpu_volt_info.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; | ||
| 93 | - omap3_core_volt_info.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; | ||
| 94 | - omap3_core_volt_info.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; | ||
| 95 | + omap3_mpu_pmic.vp_vddmin = OMAP3630_VP1_VLIMITTO_VDDMIN; | ||
| 96 | + omap3_mpu_pmic.vp_vddmax = OMAP3630_VP1_VLIMITTO_VDDMAX; | ||
| 97 | + omap3_core_pmic.vp_vddmin = OMAP3630_VP2_VLIMITTO_VDDMIN; | ||
| 98 | + omap3_core_pmic.vp_vddmax = OMAP3630_VP2_VLIMITTO_VDDMAX; | ||
| 99 | } | ||
| 100 | |||
| 101 | /* | ||
| 102 | @@ -289,10 +289,10 @@ int __init omap3_twl_init(void) | ||
| 103 | omap3_twl_set_sr_bit(true); | ||
| 104 | |||
| 105 | voltdm = voltdm_lookup("mpu_iva"); | ||
| 106 | - omap_voltage_register_pmic(voltdm, &omap3_mpu_volt_info); | ||
| 107 | + omap_voltage_register_pmic(voltdm, &omap3_mpu_pmic); | ||
| 108 | |||
| 109 | voltdm = voltdm_lookup("core"); | ||
| 110 | - omap_voltage_register_pmic(voltdm, &omap3_core_volt_info); | ||
| 111 | + omap_voltage_register_pmic(voltdm, &omap3_core_pmic); | ||
| 112 | |||
| 113 | return 0; | ||
| 114 | } | ||
| 115 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 116 | index e413b97..c431ca2 100644 | ||
| 117 | --- a/arch/arm/mach-omap2/vc.c | ||
| 118 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 119 | @@ -70,13 +70,13 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 120 | vp_common = vdd->vp_data->vp_common; | ||
| 121 | |||
| 122 | /* Check if sufficient pmic info is available for this vdd */ | ||
| 123 | - if (!vdd->pmic_info) { | ||
| 124 | + if (!voltdm->pmic) { | ||
| 125 | pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", | ||
| 126 | __func__, voltdm->name); | ||
| 127 | return -EINVAL; | ||
| 128 | } | ||
| 129 | |||
| 130 | - if (!vdd->pmic_info->uv_to_vsel) { | ||
| 131 | + if (!voltdm->pmic->uv_to_vsel) { | ||
| 132 | pr_err("%s: PMIC function to convert voltage in uV to" | ||
| 133 | "vsel not registered. Hence unable to scale voltage" | ||
| 134 | "for vdd_%s\n", __func__, voltdm->name); | ||
| 135 | @@ -94,7 +94,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 136 | if (IS_ERR(volt_data)) | ||
| 137 | volt_data = NULL; | ||
| 138 | |||
| 139 | - *target_vsel = vdd->pmic_info->uv_to_vsel(target_volt); | ||
| 140 | + *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); | ||
| 141 | *current_vsel = voltdm->read(vdd->vp_data->voltage); | ||
| 142 | |||
| 143 | /* Setting the ON voltage to the new target voltage */ | ||
| 144 | @@ -125,8 +125,8 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, | ||
| 145 | |||
| 146 | smps_steps = abs(target_vsel - current_vsel); | ||
| 147 | /* SMPS slew rate / step size. 2us added as buffer. */ | ||
| 148 | - smps_delay = ((smps_steps * vdd->pmic_info->step_size) / | ||
| 149 | - vdd->pmic_info->slew_rate) + 2; | ||
| 150 | + smps_delay = ((smps_steps * voltdm->pmic->step_size) / | ||
| 151 | + voltdm->pmic->slew_rate) + 2; | ||
| 152 | udelay(smps_delay); | ||
| 153 | |||
| 154 | vdd->curr_volt = target_volt; | ||
| 155 | @@ -231,11 +231,10 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) | ||
| 156 | void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 157 | { | ||
| 158 | struct omap_vc_channel *vc = voltdm->vc; | ||
| 159 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 160 | u8 on_vsel, onlp_vsel, ret_vsel, off_vsel; | ||
| 161 | u32 val; | ||
| 162 | |||
| 163 | - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { | ||
| 164 | + if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { | ||
| 165 | pr_err("%s: PMIC info requried to configure vc for" | ||
| 166 | "vdd_%s not populated.Hence cannot initialize vc\n", | ||
| 167 | __func__, voltdm->name); | ||
| 168 | @@ -251,10 +250,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 169 | vc->cfg_channel = 0; | ||
| 170 | |||
| 171 | /* get PMIC/board specific settings */ | ||
| 172 | - vc->i2c_slave_addr = vdd->pmic_info->i2c_slave_addr; | ||
| 173 | - vc->volt_reg_addr = vdd->pmic_info->volt_reg_addr; | ||
| 174 | - vc->cmd_reg_addr = vdd->pmic_info->cmd_reg_addr; | ||
| 175 | - vc->setup_time = vdd->pmic_info->volt_setup_time; | ||
| 176 | + vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr; | ||
| 177 | + vc->volt_reg_addr = voltdm->pmic->volt_reg_addr; | ||
| 178 | + vc->cmd_reg_addr = voltdm->pmic->cmd_reg_addr; | ||
| 179 | + vc->setup_time = voltdm->pmic->volt_setup_time; | ||
| 180 | |||
| 181 | /* Configure the i2c slave address for this VC */ | ||
| 182 | voltdm->rmw(vc->smps_sa_mask, | ||
| 183 | @@ -278,10 +277,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 184 | } | ||
| 185 | |||
| 186 | /* Set up the on, inactive, retention and off voltage */ | ||
| 187 | - on_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->on_volt); | ||
| 188 | - onlp_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->onlp_volt); | ||
| 189 | - ret_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->ret_volt); | ||
| 190 | - off_vsel = vdd->pmic_info->uv_to_vsel(vdd->pmic_info->off_volt); | ||
| 191 | + on_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->on_volt); | ||
| 192 | + onlp_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->onlp_volt); | ||
| 193 | + ret_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->ret_volt); | ||
| 194 | + off_vsel = voltdm->pmic->uv_to_vsel(voltdm->pmic->off_volt); | ||
| 195 | val = ((on_vsel << vc->common->cmd_on_shift) | | ||
| 196 | (onlp_vsel << vc->common->cmd_onlp_shift) | | ||
| 197 | (ret_vsel << vc->common->cmd_ret_shift) | | ||
| 198 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 199 | index 9f9f014..94f7fc4 100644 | ||
| 200 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 201 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 202 | @@ -84,20 +84,20 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 203 | vdd->vp_enabled = false; | ||
| 204 | |||
| 205 | vdd->vp_rt_data.vpconfig_erroroffset = | ||
| 206 | - (vdd->pmic_info->vp_erroroffset << | ||
| 207 | + (voltdm->pmic->vp_erroroffset << | ||
| 208 | vdd->vp_data->vp_common->vpconfig_erroroffset_shift); | ||
| 209 | |||
| 210 | - timeout_val = (sys_clk_speed * vdd->pmic_info->vp_timeout_us) / 1000; | ||
| 211 | + timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; | ||
| 212 | vdd->vp_rt_data.vlimitto_timeout = timeout_val; | ||
| 213 | - vdd->vp_rt_data.vlimitto_vddmin = vdd->pmic_info->vp_vddmin; | ||
| 214 | - vdd->vp_rt_data.vlimitto_vddmax = vdd->pmic_info->vp_vddmax; | ||
| 215 | + vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; | ||
| 216 | + vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; | ||
| 217 | |||
| 218 | - waittime = ((vdd->pmic_info->step_size / vdd->pmic_info->slew_rate) * | ||
| 219 | + waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * | ||
| 220 | sys_clk_speed) / 1000; | ||
| 221 | vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; | ||
| 222 | vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; | ||
| 223 | - vdd->vp_rt_data.vstepmin_stepmin = vdd->pmic_info->vp_vstepmin; | ||
| 224 | - vdd->vp_rt_data.vstepmax_stepmax = vdd->pmic_info->vp_vstepmax; | ||
| 225 | + vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; | ||
| 226 | + vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; | ||
| 227 | |||
| 228 | return 0; | ||
| 229 | } | ||
| 230 | @@ -149,10 +149,9 @@ static void __init vdd_debugfs_init(struct voltagedomain *voltdm) | ||
| 231 | |||
| 232 | static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) | ||
| 233 | { | ||
| 234 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 235 | int ret = -EINVAL; | ||
| 236 | |||
| 237 | - if (!vdd->pmic_info) { | ||
| 238 | + if (!voltdm->pmic) { | ||
| 239 | pr_err("%s: PMIC info requried to configure vdd_%s not" | ||
| 240 | "populated.Hence cannot initialize vdd_%s\n", | ||
| 241 | __func__, voltdm->name, voltdm->name); | ||
| 242 | @@ -324,24 +323,20 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | ||
| 243 | * omap_voltage_register_pmic() - API to register PMIC specific data | ||
| 244 | * @voltdm: pointer to the VDD for which the PMIC specific data is | ||
| 245 | * to be registered | ||
| 246 | - * @pmic_info: the structure containing pmic info | ||
| 247 | + * @pmic: the structure containing pmic info | ||
| 248 | * | ||
| 249 | * This API is to be called by the SOC/PMIC file to specify the | ||
| 250 | - * pmic specific info as present in omap_volt_pmic_info structure. | ||
| 251 | + * pmic specific info as present in omap_voltdm_pmic structure. | ||
| 252 | */ | ||
| 253 | int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
| 254 | - struct omap_volt_pmic_info *pmic_info) | ||
| 255 | + struct omap_voltdm_pmic *pmic) | ||
| 256 | { | ||
| 257 | - struct omap_vdd_info *vdd; | ||
| 258 | - | ||
| 259 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 260 | pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 261 | return -EINVAL; | ||
| 262 | } | ||
| 263 | |||
| 264 | - vdd = voltdm->vdd; | ||
| 265 | - | ||
| 266 | - vdd->pmic_info = pmic_info; | ||
| 267 | + voltdm->pmic = pmic; | ||
| 268 | |||
| 269 | return 0; | ||
| 270 | } | ||
| 271 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 272 | index 2b2ab56..72a0255 100644 | ||
| 273 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 274 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 275 | @@ -68,6 +68,7 @@ struct voltagedomain { | ||
| 276 | struct list_head pwrdm_list; | ||
| 277 | struct omap_vc_channel *vc; | ||
| 278 | const struct omap_vfsm_instance *vfsm; | ||
| 279 | + struct omap_voltdm_pmic *pmic; | ||
| 280 | |||
| 281 | /* VC/VP register access functions: SoC specific */ | ||
| 282 | u32 (*read) (u8 offset); | ||
| 283 | @@ -97,13 +98,13 @@ struct omap_volt_data { | ||
| 284 | }; | ||
| 285 | |||
| 286 | /** | ||
| 287 | - * struct omap_volt_pmic_info - PMIC specific data required by voltage driver. | ||
| 288 | + * struct omap_voltdm_pmic - PMIC specific data required by voltage driver. | ||
| 289 | * @slew_rate: PMIC slew rate (in uv/us) | ||
| 290 | * @step_size: PMIC voltage step size (in uv) | ||
| 291 | * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. | ||
| 292 | * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. | ||
| 293 | */ | ||
| 294 | -struct omap_volt_pmic_info { | ||
| 295 | +struct omap_voltdm_pmic { | ||
| 296 | int slew_rate; | ||
| 297 | int step_size; | ||
| 298 | u32 on_volt; | ||
| 299 | @@ -129,8 +130,6 @@ struct omap_volt_pmic_info { | ||
| 300 | * | ||
| 301 | * @volt_data : voltage table having the distinct voltages supported | ||
| 302 | * by the domain and other associated per voltage data. | ||
| 303 | - * @pmic_info : pmic specific parameters which should be populted by | ||
| 304 | - * the pmic drivers. | ||
| 305 | * @vp_data : the register values, shifts, masks for various | ||
| 306 | * vp registers | ||
| 307 | * @vp_rt_data : VP data derived at runtime, not predefined | ||
| 308 | @@ -141,7 +140,6 @@ struct omap_volt_pmic_info { | ||
| 309 | */ | ||
| 310 | struct omap_vdd_info { | ||
| 311 | struct omap_volt_data *volt_data; | ||
| 312 | - struct omap_volt_pmic_info *pmic_info; | ||
| 313 | struct omap_vp_instance_data *vp_data; | ||
| 314 | struct omap_vp_runtime_data vp_rt_data; | ||
| 315 | struct dentry *debug_dir; | ||
| 316 | @@ -163,13 +161,13 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); | ||
| 317 | struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); | ||
| 318 | #ifdef CONFIG_PM | ||
| 319 | int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
| 320 | - struct omap_volt_pmic_info *pmic_info); | ||
| 321 | + struct omap_voltdm_pmic *pmic); | ||
| 322 | void omap_change_voltscale_method(struct voltagedomain *voltdm, | ||
| 323 | int voltscale_method); | ||
| 324 | int omap_voltage_late_init(void); | ||
| 325 | #else | ||
| 326 | static inline int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
| 327 | - struct omap_volt_pmic_info *pmic_info) | ||
| 328 | + struct omap_voltdm_pmic *pmic) | ||
| 329 | { | ||
| 330 | return -EINVAL; | ||
| 331 | } | ||
| 332 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 333 | index 88ac742..a3afcbe 100644 | ||
| 334 | --- a/arch/arm/mach-omap2/vp.c | ||
| 335 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 336 | @@ -18,7 +18,6 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 337 | u32 vpconfig; | ||
| 338 | unsigned long uvdc; | ||
| 339 | char vsel; | ||
| 340 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 341 | |||
| 342 | uvdc = omap_voltage_get_nom_volt(voltdm); | ||
| 343 | if (!uvdc) { | ||
| 344 | @@ -27,13 +26,13 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 345 | return; | ||
| 346 | } | ||
| 347 | |||
| 348 | - if (!vdd->pmic_info || !vdd->pmic_info->uv_to_vsel) { | ||
| 349 | + if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { | ||
| 350 | pr_warning("%s: PMIC function to convert voltage in uV to" | ||
| 351 | " vsel not registered\n", __func__); | ||
| 352 | return; | ||
| 353 | } | ||
| 354 | |||
| 355 | - vsel = vdd->pmic_info->uv_to_vsel(uvdc); | ||
| 356 | + vsel = voltdm->pmic->uv_to_vsel(uvdc); | ||
| 357 | |||
| 358 | vpconfig = voltdm->read(vp->vpconfig); | ||
| 359 | vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | | ||
| 360 | @@ -206,13 +205,13 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) | ||
| 361 | |||
| 362 | curr_vsel = voltdm->read(vp->voltage); | ||
| 363 | |||
| 364 | - if (!vdd->pmic_info || !vdd->pmic_info->vsel_to_uv) { | ||
| 365 | + if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) { | ||
| 366 | pr_warning("%s: PMIC function to convert vsel to voltage" | ||
| 367 | "in uV not registerd\n", __func__); | ||
| 368 | return 0; | ||
| 369 | } | ||
| 370 | |||
| 371 | - return vdd->pmic_info->vsel_to_uv(curr_vsel); | ||
| 372 | + return voltdm->pmic->vsel_to_uv(curr_vsel); | ||
| 373 | } | ||
| 374 | |||
| 375 | /** | ||
| 376 | @@ -323,13 +322,13 @@ static int vp_volt_debug_get(void *data, u64 *val) | ||
| 377 | |||
| 378 | vsel = voltdm->read(vp->voltage); | ||
| 379 | |||
| 380 | - if (!vdd->pmic_info->vsel_to_uv) { | ||
| 381 | + if (!voltdm->pmic->vsel_to_uv) { | ||
| 382 | pr_warning("PMIC function to convert vsel to voltage" | ||
| 383 | "in uV not registerd\n"); | ||
| 384 | return -EINVAL; | ||
| 385 | } | ||
| 386 | |||
| 387 | - *val = vdd->pmic_info->vsel_to_uv(vsel); | ||
| 388 | + *val = voltdm->pmic->vsel_to_uv(vsel); | ||
| 389 | return 0; | ||
| 390 | } | ||
| 391 | |||
| 392 | -- | ||
| 393 | 1.7.2.5 | ||
| 394 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0125-OMAP3-VC-make-I2C-config-programmable-with-PMIC-spec.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0125-OMAP3-VC-make-I2C-config-programmable-with-PMIC-spec.patch deleted file mode 100644 index ee628746..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0125-OMAP3-VC-make-I2C-config-programmable-with-PMIC-spec.patch +++ /dev/null | |||
| @@ -1,221 +0,0 @@ | |||
| 1 | From ecf26111e3d83dd4face7fa8f4327489775d1dc8 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Wed, 30 Mar 2011 16:36:30 -0700 | ||
| 4 | Subject: [PATCH 125/149] OMAP3+: VC: make I2C config programmable with PMIC-specific settings | ||
| 5 | |||
| 6 | Remove hard-coded I2C configuration in favor of settings that can be | ||
| 7 | configured from PMIC-specific values. Currently only high-speed mode | ||
| 8 | and the master-code value are supported, since they were the only | ||
| 9 | fields currently used, but extending this is now trivial. | ||
| 10 | |||
| 11 | Thanks to Nishanth Menon <nm@ti.com> for reporting/fixing a sparse | ||
| 12 | problem and making omap_vc_i2c_init() static, as well as finding and | ||
| 13 | fixing a problem with the shift/mask of mcode. | ||
| 14 | |||
| 15 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 16 | --- | ||
| 17 | arch/arm/mach-omap2/omap_twl.c | 4 +++ | ||
| 18 | arch/arm/mach-omap2/vc.c | 51 +++++++++++++++++++++++++++++++----- | ||
| 19 | arch/arm/mach-omap2/vc.h | 7 +++++ | ||
| 20 | arch/arm/mach-omap2/vc3xxx_data.c | 3 ++ | ||
| 21 | arch/arm/mach-omap2/vc44xx_data.c | 3 ++ | ||
| 22 | arch/arm/mach-omap2/voltage.h | 4 +++ | ||
| 23 | 6 files changed, 65 insertions(+), 7 deletions(-) | ||
| 24 | |||
| 25 | diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c | ||
| 26 | index e467d45..6b247d1 100644 | ||
| 27 | --- a/arch/arm/mach-omap2/omap_twl.c | ||
| 28 | +++ b/arch/arm/mach-omap2/omap_twl.c | ||
| 29 | @@ -159,6 +159,7 @@ static struct omap_voltdm_pmic omap3_mpu_pmic = { | ||
| 30 | .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, | ||
| 31 | .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, | ||
| 32 | .volt_reg_addr = OMAP3_VDD_MPU_SR_CONTROL_REG, | ||
| 33 | + .i2c_high_speed = true, | ||
| 34 | .vsel_to_uv = twl4030_vsel_to_uv, | ||
| 35 | .uv_to_vsel = twl4030_uv_to_vsel, | ||
| 36 | }; | ||
| 37 | @@ -179,6 +180,7 @@ static struct omap_voltdm_pmic omap3_core_pmic = { | ||
| 38 | .vp_timeout_us = OMAP3_VP_VLIMITTO_TIMEOUT_US, | ||
| 39 | .i2c_slave_addr = OMAP3_SRI2C_SLAVE_ADDR, | ||
| 40 | .volt_reg_addr = OMAP3_VDD_CORE_SR_CONTROL_REG, | ||
| 41 | + .i2c_high_speed = true, | ||
| 42 | .vsel_to_uv = twl4030_vsel_to_uv, | ||
| 43 | .uv_to_vsel = twl4030_uv_to_vsel, | ||
| 44 | }; | ||
| 45 | @@ -199,6 +201,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { | ||
| 46 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, | ||
| 47 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, | ||
| 48 | .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, | ||
| 49 | + .i2c_high_speed = true, | ||
| 50 | .vsel_to_uv = twl6030_vsel_to_uv, | ||
| 51 | .uv_to_vsel = twl6030_uv_to_vsel, | ||
| 52 | }; | ||
| 53 | @@ -219,6 +222,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { | ||
| 54 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, | ||
| 55 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, | ||
| 56 | .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, | ||
| 57 | + .i2c_high_speed = true, | ||
| 58 | .vsel_to_uv = twl6030_vsel_to_uv, | ||
| 59 | .uv_to_vsel = twl6030_uv_to_vsel, | ||
| 60 | }; | ||
| 61 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 62 | index c431ca2..97a4c6c 100644 | ||
| 63 | --- a/arch/arm/mach-omap2/vc.c | ||
| 64 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 65 | @@ -199,13 +199,6 @@ static void __init omap3_vc_init_channel(struct voltagedomain *voltdm) | ||
| 66 | if (is_initialized) | ||
| 67 | return; | ||
| 68 | |||
| 69 | - /* | ||
| 70 | - * Generic VC parameters init | ||
| 71 | - * XXX This data should be abstracted out | ||
| 72 | - */ | ||
| 73 | - voltdm->write(OMAP3430_MCODE_SHIFT | OMAP3430_HSEN_MASK, | ||
| 74 | - OMAP3_PRM_VC_I2C_CFG_OFFSET); | ||
| 75 | - | ||
| 76 | omap3_vfsm_init(voltdm); | ||
| 77 | |||
| 78 | is_initialized = true; | ||
| 79 | @@ -228,6 +221,48 @@ static void __init omap4_vc_init_channel(struct voltagedomain *voltdm) | ||
| 80 | is_initialized = true; | ||
| 81 | } | ||
| 82 | |||
| 83 | +/** | ||
| 84 | + * omap_vc_i2c_init - initialize I2C interface to PMIC | ||
| 85 | + * @voltdm: voltage domain containing VC data | ||
| 86 | + * | ||
| 87 | + * Use PMIC supplied seetings for I2C high-speed mode and | ||
| 88 | + * master code (if set) and program the VC I2C configuration | ||
| 89 | + * register. | ||
| 90 | + * | ||
| 91 | + * The VC I2C configuration is common to all VC channels, | ||
| 92 | + * so this function only configures I2C for the first VC | ||
| 93 | + * channel registers. All other VC channels will use the | ||
| 94 | + * same configuration. | ||
| 95 | + */ | ||
| 96 | +static void __init omap_vc_i2c_init(struct voltagedomain *voltdm) | ||
| 97 | +{ | ||
| 98 | + struct omap_vc_channel *vc = voltdm->vc; | ||
| 99 | + static bool initialized; | ||
| 100 | + static bool i2c_high_speed; | ||
| 101 | + u8 mcode; | ||
| 102 | + | ||
| 103 | + if (initialized) { | ||
| 104 | + if (voltdm->pmic->i2c_high_speed != i2c_high_speed) | ||
| 105 | + pr_warn("%s: I2C config for all channels must match.", | ||
| 106 | + __func__); | ||
| 107 | + return; | ||
| 108 | + } | ||
| 109 | + | ||
| 110 | + i2c_high_speed = voltdm->pmic->i2c_high_speed; | ||
| 111 | + if (i2c_high_speed) | ||
| 112 | + voltdm->rmw(vc->common->i2c_cfg_hsen_mask, | ||
| 113 | + vc->common->i2c_cfg_hsen_mask, | ||
| 114 | + vc->common->i2c_cfg_reg); | ||
| 115 | + | ||
| 116 | + mcode = voltdm->pmic->i2c_mcode; | ||
| 117 | + if (mcode) | ||
| 118 | + voltdm->rmw(vc->common->i2c_mcode_mask, | ||
| 119 | + mcode << __ffs(vc->common->i2c_mcode_mask), | ||
| 120 | + vc->common->i2c_cfg_reg); | ||
| 121 | + | ||
| 122 | + initialized = true; | ||
| 123 | +} | ||
| 124 | + | ||
| 125 | void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 126 | { | ||
| 127 | struct omap_vc_channel *vc = voltdm->vc; | ||
| 128 | @@ -296,6 +331,8 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 129 | vc->setup_time << __ffs(voltdm->vfsm->voltsetup_mask), | ||
| 130 | voltdm->vfsm->voltsetup_reg); | ||
| 131 | |||
| 132 | + omap_vc_i2c_init(voltdm); | ||
| 133 | + | ||
| 134 | if (cpu_is_omap34xx()) | ||
| 135 | omap3_vc_init_channel(voltdm); | ||
| 136 | else if (cpu_is_omap44xx()) | ||
| 137 | diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h | ||
| 138 | index 604f5b6..c577f28 100644 | ||
| 139 | --- a/arch/arm/mach-omap2/vc.h | ||
| 140 | +++ b/arch/arm/mach-omap2/vc.h | ||
| 141 | @@ -35,6 +35,9 @@ struct voltagedomain; | ||
| 142 | * @cmd_onlp_shift: ONLP field shift in PRM_VC_CMD_VAL_* register | ||
| 143 | * @cmd_ret_shift: RET field shift in PRM_VC_CMD_VAL_* register | ||
| 144 | * @cmd_off_shift: OFF field shift in PRM_VC_CMD_VAL_* register | ||
| 145 | + * @i2c_cfg_reg: I2C configuration register offset | ||
| 146 | + * @i2c_cfg_hsen_mask: high-speed mode bit field mask in I2C config register | ||
| 147 | + * @i2c_mcode_mask: MCODE field mask for I2C config register | ||
| 148 | * | ||
| 149 | * XXX One of cmd_on_mask and cmd_on_shift are not needed | ||
| 150 | * XXX VALID should probably be a shift, not a mask | ||
| 151 | @@ -54,6 +57,9 @@ struct omap_vc_common { | ||
| 152 | u8 cmd_ret_shift; | ||
| 153 | u8 cmd_off_shift; | ||
| 154 | u8 cfg_channel_reg; | ||
| 155 | + u8 i2c_cfg_reg; | ||
| 156 | + u8 i2c_cfg_hsen_mask; | ||
| 157 | + u8 i2c_mcode_mask; | ||
| 158 | }; | ||
| 159 | |||
| 160 | /* omap_vc_channel.flags values */ | ||
| 161 | @@ -75,6 +81,7 @@ struct omap_vc_channel { | ||
| 162 | u16 cmd_reg_addr; | ||
| 163 | u16 setup_time; | ||
| 164 | u8 cfg_channel; | ||
| 165 | + bool i2c_high_speed; | ||
| 166 | |||
| 167 | /* register access data */ | ||
| 168 | const struct omap_vc_common *common; | ||
| 169 | diff --git a/arch/arm/mach-omap2/vc3xxx_data.c b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 170 | index f4449eb..95d7701 100644 | ||
| 171 | --- a/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 172 | +++ b/arch/arm/mach-omap2/vc3xxx_data.c | ||
| 173 | @@ -44,6 +44,9 @@ static struct omap_vc_common omap3_vc_common = { | ||
| 174 | .cmd_ret_shift = OMAP3430_VC_CMD_RET_SHIFT, | ||
| 175 | .cmd_off_shift = OMAP3430_VC_CMD_OFF_SHIFT, | ||
| 176 | .cfg_channel_reg = OMAP3_PRM_VC_CH_CONF_OFFSET, | ||
| 177 | + .i2c_cfg_hsen_mask = OMAP3430_HSEN_MASK, | ||
| 178 | + .i2c_cfg_reg = OMAP3_PRM_VC_I2C_CFG_OFFSET, | ||
| 179 | + .i2c_mcode_mask = OMAP3430_MCODE_MASK, | ||
| 180 | }; | ||
| 181 | |||
| 182 | struct omap_vc_channel omap3_vc_mpu = { | ||
| 183 | diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 184 | index 1610bde..148be18 100644 | ||
| 185 | --- a/arch/arm/mach-omap2/vc44xx_data.c | ||
| 186 | +++ b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 187 | @@ -45,6 +45,9 @@ static const struct omap_vc_common omap4_vc_common = { | ||
| 188 | .cmd_ret_shift = OMAP4430_RET_SHIFT, | ||
| 189 | .cmd_off_shift = OMAP4430_OFF_SHIFT, | ||
| 190 | .cfg_channel_reg = OMAP4_PRM_VC_CFG_CHANNEL_OFFSET, | ||
| 191 | + .i2c_cfg_reg = OMAP4_PRM_VC_CFG_I2C_MODE_OFFSET, | ||
| 192 | + .i2c_cfg_hsen_mask = OMAP4430_HSMODEEN_MASK, | ||
| 193 | + .i2c_mcode_mask = OMAP4430_HSMCODE_MASK, | ||
| 194 | }; | ||
| 195 | |||
| 196 | /* VC instance data for each controllable voltage line */ | ||
| 197 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 198 | index 72a0255..a0ae5c6 100644 | ||
| 199 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 200 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 201 | @@ -101,6 +101,8 @@ struct omap_volt_data { | ||
| 202 | * struct omap_voltdm_pmic - PMIC specific data required by voltage driver. | ||
| 203 | * @slew_rate: PMIC slew rate (in uv/us) | ||
| 204 | * @step_size: PMIC voltage step size (in uv) | ||
| 205 | + * @i2c_high_speed: whether VC uses I2C high-speed mode to PMIC | ||
| 206 | + * @i2c_mcode: master code value for I2C high-speed preamble transmission | ||
| 207 | * @vsel_to_uv: PMIC API to convert vsel value to actual voltage in uV. | ||
| 208 | * @uv_to_vsel: PMIC API to convert voltage in uV to vsel value. | ||
| 209 | */ | ||
| 210 | @@ -121,6 +123,8 @@ struct omap_voltdm_pmic { | ||
| 211 | u8 vp_vddmin; | ||
| 212 | u8 vp_vddmax; | ||
| 213 | u8 vp_timeout_us; | ||
| 214 | + bool i2c_high_speed; | ||
| 215 | + u8 i2c_mcode; | ||
| 216 | unsigned long (*vsel_to_uv) (const u8 vsel); | ||
| 217 | u8 (*uv_to_vsel) (unsigned long uV); | ||
| 218 | }; | ||
| 219 | -- | ||
| 220 | 1.7.2.5 | ||
| 221 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0126-OMAP3-PM-VC-handle-mutant-channel-config-for-OMAP4-M.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0126-OMAP3-PM-VC-handle-mutant-channel-config-for-OMAP4-M.patch deleted file mode 100644 index f8b0fcbc..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0126-OMAP3-PM-VC-handle-mutant-channel-config-for-OMAP4-M.patch +++ /dev/null | |||
| @@ -1,168 +0,0 @@ | |||
| 1 | From dd6773950301f38c61e0039922c685f6e0542c47 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Thu, 2 Jun 2011 17:28:13 -0700 | ||
| 4 | Subject: [PATCH 126/149] OMAP3+: PM: VC: handle mutant channel config for OMAP4 MPU channel | ||
| 5 | |||
| 6 | On OMAP3+, all VC channels have the the same bitfield ordering for all | ||
| 7 | VC channels, except the OMAP4 MPU channel. This appears to be a freak | ||
| 8 | accident as all other VC channel (including OMAP5) have the standard | ||
| 9 | configuration. Handle the mutant case by adding a per-channel flag | ||
| 10 | to signal the deformity and handle it during VC init. | ||
| 11 | |||
| 12 | Special thanks to Nishanth Menon <nm@ti.com> for finding this problem | ||
| 13 | and for proposing the initial solution. | ||
| 14 | |||
| 15 | Cc: Nishanth Menon <nm@ti.com> | ||
| 16 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 17 | --- | ||
| 18 | arch/arm/mach-omap2/vc.c | 64 +++++++++++++++++++++++++++++------- | ||
| 19 | arch/arm/mach-omap2/vc.h | 1 + | ||
| 20 | arch/arm/mach-omap2/vc44xx_data.c | 2 +- | ||
| 21 | 3 files changed, 53 insertions(+), 14 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 24 | index 97a4c6c..9e51782 100644 | ||
| 25 | --- a/arch/arm/mach-omap2/vc.c | ||
| 26 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 27 | @@ -10,17 +10,51 @@ | ||
| 28 | #include "prm-regbits-44xx.h" | ||
| 29 | #include "prm44xx.h" | ||
| 30 | |||
| 31 | -/* | ||
| 32 | - * Channel configuration bits, common for OMAP3 & 4 | ||
| 33 | +/** | ||
| 34 | + * struct omap_vc_channel_cfg - describe the cfg_channel bitfield | ||
| 35 | + * @sa: bit for slave address | ||
| 36 | + * @rav: bit for voltage configuration register | ||
| 37 | + * @rac: bit for command configuration register | ||
| 38 | + * @racen: enable bit for RAC | ||
| 39 | + * @cmd: bit for command value set selection | ||
| 40 | + * | ||
| 41 | + * Channel configuration bits, common for OMAP3+ | ||
| 42 | * OMAP3 register: PRM_VC_CH_CONF | ||
| 43 | * OMAP4 register: PRM_VC_CFG_CHANNEL | ||
| 44 | + * OMAP5 register: PRM_VC_SMPS_<voltdm>_CONFIG | ||
| 45 | */ | ||
| 46 | -#define CFG_CHANNEL_SA BIT(0) | ||
| 47 | -#define CFG_CHANNEL_RAV BIT(1) | ||
| 48 | -#define CFG_CHANNEL_RAC BIT(2) | ||
| 49 | -#define CFG_CHANNEL_RACEN BIT(3) | ||
| 50 | -#define CFG_CHANNEL_CMD BIT(4) | ||
| 51 | -#define CFG_CHANNEL_MASK 0x3f | ||
| 52 | +struct omap_vc_channel_cfg { | ||
| 53 | + u8 sa; | ||
| 54 | + u8 rav; | ||
| 55 | + u8 rac; | ||
| 56 | + u8 racen; | ||
| 57 | + u8 cmd; | ||
| 58 | +}; | ||
| 59 | + | ||
| 60 | +static struct omap_vc_channel_cfg vc_default_channel_cfg = { | ||
| 61 | + .sa = BIT(0), | ||
| 62 | + .rav = BIT(1), | ||
| 63 | + .rac = BIT(2), | ||
| 64 | + .racen = BIT(3), | ||
| 65 | + .cmd = BIT(4), | ||
| 66 | +}; | ||
| 67 | + | ||
| 68 | +/* | ||
| 69 | + * On OMAP3+, all VC channels have the above default bitfield | ||
| 70 | + * configuration, except the OMAP4 MPU channel. This appears | ||
| 71 | + * to be a freak accident as every other VC channel has the | ||
| 72 | + * default configuration, thus creating a mutant channel config. | ||
| 73 | + */ | ||
| 74 | +static struct omap_vc_channel_cfg vc_mutant_channel_cfg = { | ||
| 75 | + .sa = BIT(0), | ||
| 76 | + .rav = BIT(2), | ||
| 77 | + .rac = BIT(3), | ||
| 78 | + .racen = BIT(4), | ||
| 79 | + .cmd = BIT(1), | ||
| 80 | +}; | ||
| 81 | + | ||
| 82 | +static struct omap_vc_channel_cfg *vc_cfg_bits; | ||
| 83 | +#define CFG_CHANNEL_MASK 0x1f | ||
| 84 | |||
| 85 | /** | ||
| 86 | * omap_vc_config_channel - configure VC channel to PMIC mappings | ||
| 87 | @@ -47,7 +81,7 @@ static int omap_vc_config_channel(struct voltagedomain *voltdm) | ||
| 88 | * All others must stay at zero (see function comment above.) | ||
| 89 | */ | ||
| 90 | if (vc->flags & OMAP_VC_CHANNEL_DEFAULT) | ||
| 91 | - vc->cfg_channel &= CFG_CHANNEL_RACEN; | ||
| 92 | + vc->cfg_channel &= vc_cfg_bits->racen; | ||
| 93 | |||
| 94 | voltdm->rmw(CFG_CHANNEL_MASK << vc->cfg_channel_sa_shift, | ||
| 95 | vc->cfg_channel << vc->cfg_channel_sa_shift, | ||
| 96 | @@ -283,6 +317,10 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 97 | } | ||
| 98 | |||
| 99 | vc->cfg_channel = 0; | ||
| 100 | + if (vc->flags & OMAP_VC_CHANNEL_CFG_MUTANT) | ||
| 101 | + vc_cfg_bits = &vc_mutant_channel_cfg; | ||
| 102 | + else | ||
| 103 | + vc_cfg_bits = &vc_default_channel_cfg; | ||
| 104 | |||
| 105 | /* get PMIC/board specific settings */ | ||
| 106 | vc->i2c_slave_addr = voltdm->pmic->i2c_slave_addr; | ||
| 107 | @@ -294,7 +332,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 108 | voltdm->rmw(vc->smps_sa_mask, | ||
| 109 | vc->i2c_slave_addr << __ffs(vc->smps_sa_mask), | ||
| 110 | vc->common->smps_sa_reg); | ||
| 111 | - vc->cfg_channel |= CFG_CHANNEL_SA; | ||
| 112 | + vc->cfg_channel |= vc_cfg_bits->sa; | ||
| 113 | |||
| 114 | /* | ||
| 115 | * Configure the PMIC register addresses. | ||
| 116 | @@ -302,13 +340,13 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 117 | voltdm->rmw(vc->smps_volra_mask, | ||
| 118 | vc->volt_reg_addr << __ffs(vc->smps_volra_mask), | ||
| 119 | vc->common->smps_volra_reg); | ||
| 120 | - vc->cfg_channel |= CFG_CHANNEL_RAV; | ||
| 121 | + vc->cfg_channel |= vc_cfg_bits->rav; | ||
| 122 | |||
| 123 | if (vc->cmd_reg_addr) { | ||
| 124 | voltdm->rmw(vc->smps_cmdra_mask, | ||
| 125 | vc->cmd_reg_addr << __ffs(vc->smps_cmdra_mask), | ||
| 126 | vc->common->smps_cmdra_reg); | ||
| 127 | - vc->cfg_channel |= CFG_CHANNEL_RAC | CFG_CHANNEL_RACEN; | ||
| 128 | + vc->cfg_channel |= vc_cfg_bits->rac | vc_cfg_bits->racen; | ||
| 129 | } | ||
| 130 | |||
| 131 | /* Set up the on, inactive, retention and off voltage */ | ||
| 132 | @@ -321,7 +359,7 @@ void __init omap_vc_init_channel(struct voltagedomain *voltdm) | ||
| 133 | (ret_vsel << vc->common->cmd_ret_shift) | | ||
| 134 | (off_vsel << vc->common->cmd_off_shift)); | ||
| 135 | voltdm->write(val, vc->cmdval_reg); | ||
| 136 | - vc->cfg_channel |= CFG_CHANNEL_CMD; | ||
| 137 | + vc->cfg_channel |= vc_cfg_bits->cmd; | ||
| 138 | |||
| 139 | /* Channel configuration */ | ||
| 140 | omap_vc_config_channel(voltdm); | ||
| 141 | diff --git a/arch/arm/mach-omap2/vc.h b/arch/arm/mach-omap2/vc.h | ||
| 142 | index c577f28..ec50643 100644 | ||
| 143 | --- a/arch/arm/mach-omap2/vc.h | ||
| 144 | +++ b/arch/arm/mach-omap2/vc.h | ||
| 145 | @@ -64,6 +64,7 @@ struct omap_vc_common { | ||
| 146 | |||
| 147 | /* omap_vc_channel.flags values */ | ||
| 148 | #define OMAP_VC_CHANNEL_DEFAULT BIT(0) | ||
| 149 | +#define OMAP_VC_CHANNEL_CFG_MUTANT BIT(1) | ||
| 150 | |||
| 151 | /** | ||
| 152 | * struct omap_vc_channel - VC per-instance data | ||
| 153 | diff --git a/arch/arm/mach-omap2/vc44xx_data.c b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 154 | index 148be18..0a4fc37 100644 | ||
| 155 | --- a/arch/arm/mach-omap2/vc44xx_data.c | ||
| 156 | +++ b/arch/arm/mach-omap2/vc44xx_data.c | ||
| 157 | @@ -52,7 +52,7 @@ static const struct omap_vc_common omap4_vc_common = { | ||
| 158 | |||
| 159 | /* VC instance data for each controllable voltage line */ | ||
| 160 | struct omap_vc_channel omap4_vc_mpu = { | ||
| 161 | - .flags = OMAP_VC_CHANNEL_DEFAULT, | ||
| 162 | + .flags = OMAP_VC_CHANNEL_DEFAULT | OMAP_VC_CHANNEL_CFG_MUTANT, | ||
| 163 | .common = &omap4_vc_common, | ||
| 164 | .cmdval_reg = OMAP4_PRM_VC_VAL_CMD_VDD_MPU_L_OFFSET, | ||
| 165 | .smps_sa_mask = OMAP4430_SA_VDD_MPU_L_PRM_VC_SMPS_SA_MASK, | ||
| 166 | -- | ||
| 167 | 1.7.2.5 | ||
| 168 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0127-OMAP3-VC-use-last-nominal-voltage-setting-to-get-cur.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0127-OMAP3-VC-use-last-nominal-voltage-setting-to-get-cur.patch deleted file mode 100644 index 6992056d..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0127-OMAP3-VC-use-last-nominal-voltage-setting-to-get-cur.patch +++ /dev/null | |||
| @@ -1,31 +0,0 @@ | |||
| 1 | From a8ee49ce71fcdf4e85720adabe9aeed2850678cc Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 18 Jul 2011 15:31:00 -0700 | ||
| 4 | Subject: [PATCH 127/149] OMAP3+: VC: use last nominal voltage setting to get current_vsel | ||
| 5 | |||
| 6 | Instead of reading current vsel value from the VP's voltage register, | ||
| 7 | just use current nominal voltage translated into vsel via the PMIC. | ||
| 8 | |||
| 9 | Doing this allows VC bypass scaling to work even without a VP configured. | ||
| 10 | |||
| 11 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/vc.c | 2 +- | ||
| 14 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 17 | index 9e51782..cee8fba 100644 | ||
| 18 | --- a/arch/arm/mach-omap2/vc.c | ||
| 19 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 20 | @@ -129,7 +129,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 21 | volt_data = NULL; | ||
| 22 | |||
| 23 | *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); | ||
| 24 | - *current_vsel = voltdm->read(vdd->vp_data->voltage); | ||
| 25 | + *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); | ||
| 26 | |||
| 27 | /* Setting the ON voltage to the new target voltage */ | ||
| 28 | vc_cmdval = voltdm->read(vc->cmdval_reg); | ||
| 29 | -- | ||
| 30 | 1.7.2.5 | ||
| 31 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0128-OMAP3-VP-cleanup-move-VP-instance-into-voltdm-misc.-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0128-OMAP3-VP-cleanup-move-VP-instance-into-voltdm-misc.-.patch deleted file mode 100644 index 1b153ca3..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0128-OMAP3-VP-cleanup-move-VP-instance-into-voltdm-misc.-.patch +++ /dev/null | |||
| @@ -1,643 +0,0 @@ | |||
| 1 | From 00a526b77cb5b54dbf2086c63936629845b7f980 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 4 Apr 2011 15:25:07 -0700 | ||
| 4 | Subject: [PATCH 128/149] OMAP3+: VP: cleanup: move VP instance into voltdm, misc. renames | ||
| 5 | |||
| 6 | - move VP instance struct from vdd_info into struct voltage domain | ||
| 7 | - remove _data suffix from structure name | ||
| 8 | - rename vp_ prefix from vp_common field: accesses are now vp->common | ||
| 9 | - move vp_enabled bool from vdd_info into VP instance | ||
| 10 | - remove remaining references to omap_vdd_info | ||
| 11 | |||
| 12 | No functional changes. | ||
| 13 | |||
| 14 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 15 | --- | ||
| 16 | arch/arm/mach-omap2/vc.c | 11 +-- | ||
| 17 | arch/arm/mach-omap2/voltage.c | 4 +- | ||
| 18 | arch/arm/mach-omap2/voltage.h | 6 +-- | ||
| 19 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 10 +-- | ||
| 20 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 15 ++--- | ||
| 21 | arch/arm/mach-omap2/vp.c | 88 ++++++++++++------------- | ||
| 22 | arch/arm/mach-omap2/vp.h | 24 ++++--- | ||
| 23 | arch/arm/mach-omap2/vp3xxx_data.c | 10 ++-- | ||
| 24 | arch/arm/mach-omap2/vp44xx_data.c | 14 ++-- | ||
| 25 | 9 files changed, 83 insertions(+), 99 deletions(-) | ||
| 26 | |||
| 27 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 28 | index cee8fba..7058585 100644 | ||
| 29 | --- a/arch/arm/mach-omap2/vc.c | ||
| 30 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 31 | @@ -98,11 +98,8 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 32 | struct omap_vc_channel *vc = voltdm->vc; | ||
| 33 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 34 | struct omap_volt_data *volt_data; | ||
| 35 | - const struct omap_vp_common_data *vp_common; | ||
| 36 | u32 vc_cmdval, vp_errgain_val; | ||
| 37 | |||
| 38 | - vp_common = vdd->vp_data->vp_common; | ||
| 39 | - | ||
| 40 | /* Check if sufficient pmic info is available for this vdd */ | ||
| 41 | if (!voltdm->pmic) { | ||
| 42 | pr_err("%s: Insufficient pmic info to scale the vdd_%s\n", | ||
| 43 | @@ -139,12 +136,12 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 44 | |||
| 45 | /* Setting vp errorgain based on the voltage */ | ||
| 46 | if (volt_data) { | ||
| 47 | - vp_errgain_val = voltdm->read(vdd->vp_data->vpconfig); | ||
| 48 | + vp_errgain_val = voltdm->read(voltdm->vp->vpconfig); | ||
| 49 | vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; | ||
| 50 | - vp_errgain_val &= ~vp_common->vpconfig_errorgain_mask; | ||
| 51 | + vp_errgain_val &= voltdm->vp->common->vpconfig_errorgain_mask; | ||
| 52 | vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << | ||
| 53 | - vp_common->vpconfig_errorgain_shift; | ||
| 54 | - voltdm->write(vp_errgain_val, vdd->vp_data->vpconfig); | ||
| 55 | + voltdm->vp->common->vpconfig_errorgain_shift; | ||
| 56 | + voltdm->write(vp_errgain_val, voltdm->vp->vpconfig); | ||
| 57 | } | ||
| 58 | |||
| 59 | return 0; | ||
| 60 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 61 | index 94f7fc4..c22b53c 100644 | ||
| 62 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 63 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 64 | @@ -81,11 +81,11 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 65 | |||
| 66 | /* Generic voltage parameters */ | ||
| 67 | vdd->volt_scale = omap_vp_forceupdate_scale; | ||
| 68 | - vdd->vp_enabled = false; | ||
| 69 | + voltdm->vp->enabled = false; | ||
| 70 | |||
| 71 | vdd->vp_rt_data.vpconfig_erroroffset = | ||
| 72 | (voltdm->pmic->vp_erroroffset << | ||
| 73 | - vdd->vp_data->vp_common->vpconfig_erroroffset_shift); | ||
| 74 | + voltdm->vp->common->vpconfig_erroroffset_shift); | ||
| 75 | |||
| 76 | timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; | ||
| 77 | vdd->vp_rt_data.vlimitto_timeout = timeout_val; | ||
| 78 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 79 | index a0ae5c6..65f94c7 100644 | ||
| 80 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 81 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 82 | @@ -68,6 +68,7 @@ struct voltagedomain { | ||
| 83 | struct list_head pwrdm_list; | ||
| 84 | struct omap_vc_channel *vc; | ||
| 85 | const struct omap_vfsm_instance *vfsm; | ||
| 86 | + struct omap_vp_instance *vp; | ||
| 87 | struct omap_voltdm_pmic *pmic; | ||
| 88 | |||
| 89 | /* VC/VP register access functions: SoC specific */ | ||
| 90 | @@ -134,21 +135,16 @@ struct omap_voltdm_pmic { | ||
| 91 | * | ||
| 92 | * @volt_data : voltage table having the distinct voltages supported | ||
| 93 | * by the domain and other associated per voltage data. | ||
| 94 | - * @vp_data : the register values, shifts, masks for various | ||
| 95 | - * vp registers | ||
| 96 | * @vp_rt_data : VP data derived at runtime, not predefined | ||
| 97 | * @debug_dir : debug directory for this voltage domain. | ||
| 98 | * @curr_volt : current voltage for this vdd. | ||
| 99 | - * @vp_enabled : flag to keep track of whether vp is enabled or not | ||
| 100 | * @volt_scale : API to scale the voltage of the vdd. | ||
| 101 | */ | ||
| 102 | struct omap_vdd_info { | ||
| 103 | struct omap_volt_data *volt_data; | ||
| 104 | - struct omap_vp_instance_data *vp_data; | ||
| 105 | struct omap_vp_runtime_data vp_rt_data; | ||
| 106 | struct dentry *debug_dir; | ||
| 107 | u32 curr_volt; | ||
| 108 | - bool vp_enabled; | ||
| 109 | |||
| 110 | int (*volt_scale) (struct voltagedomain *voltdm, | ||
| 111 | unsigned long target_volt); | ||
| 112 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 113 | index 4ea9a7b..4db2c6c 100644 | ||
| 114 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 115 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 116 | @@ -37,9 +37,7 @@ static const struct omap_vfsm_instance omap3_vdd1_vfsm = { | ||
| 117 | .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, | ||
| 118 | }; | ||
| 119 | |||
| 120 | -static struct omap_vdd_info omap3_vdd1_info = { | ||
| 121 | - .vp_data = &omap3_vp1_data, | ||
| 122 | -}; | ||
| 123 | +static struct omap_vdd_info omap3_vdd1_info; | ||
| 124 | |||
| 125 | static const struct omap_vfsm_instance omap3_vdd2_vfsm = { | ||
| 126 | .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, | ||
| 127 | @@ -47,9 +45,7 @@ static const struct omap_vfsm_instance omap3_vdd2_vfsm = { | ||
| 128 | .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, | ||
| 129 | }; | ||
| 130 | |||
| 131 | -static struct omap_vdd_info omap3_vdd2_info = { | ||
| 132 | - .vp_data = &omap3_vp2_data, | ||
| 133 | -}; | ||
| 134 | +static struct omap_vdd_info omap3_vdd2_info; | ||
| 135 | |||
| 136 | static struct voltagedomain omap3_voltdm_mpu = { | ||
| 137 | .name = "mpu_iva", | ||
| 138 | @@ -59,6 +55,7 @@ static struct voltagedomain omap3_voltdm_mpu = { | ||
| 139 | .rmw = omap3_prm_vcvp_rmw, | ||
| 140 | .vc = &omap3_vc_mpu, | ||
| 141 | .vfsm = &omap3_vdd1_vfsm, | ||
| 142 | + .vp = &omap3_vp_mpu, | ||
| 143 | .vdd = &omap3_vdd1_info, | ||
| 144 | }; | ||
| 145 | |||
| 146 | @@ -70,6 +67,7 @@ static struct voltagedomain omap3_voltdm_core = { | ||
| 147 | .rmw = omap3_prm_vcvp_rmw, | ||
| 148 | .vc = &omap3_vc_core, | ||
| 149 | .vfsm = &omap3_vdd2_vfsm, | ||
| 150 | + .vp = &omap3_vp_core, | ||
| 151 | .vdd = &omap3_vdd2_info, | ||
| 152 | }; | ||
| 153 | |||
| 154 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 155 | index dd4bd22..3e7cb4e 100644 | ||
| 156 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 157 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 158 | @@ -36,25 +36,19 @@ static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { | ||
| 159 | .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, | ||
| 160 | }; | ||
| 161 | |||
| 162 | -static struct omap_vdd_info omap4_vdd_mpu_info = { | ||
| 163 | - .vp_data = &omap4_vp_mpu_data, | ||
| 164 | -}; | ||
| 165 | +static struct omap_vdd_info omap4_vdd_mpu_info; | ||
| 166 | |||
| 167 | static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = { | ||
| 168 | .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, | ||
| 169 | }; | ||
| 170 | |||
| 171 | -static struct omap_vdd_info omap4_vdd_iva_info = { | ||
| 172 | - .vp_data = &omap4_vp_iva_data, | ||
| 173 | -}; | ||
| 174 | +static struct omap_vdd_info omap4_vdd_iva_info; | ||
| 175 | |||
| 176 | static const struct omap_vfsm_instance omap4_vdd_core_vfsm = { | ||
| 177 | .voltsetup_reg = OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, | ||
| 178 | }; | ||
| 179 | |||
| 180 | -static struct omap_vdd_info omap4_vdd_core_info = { | ||
| 181 | - .vp_data = &omap4_vp_core_data, | ||
| 182 | -}; | ||
| 183 | +static struct omap_vdd_info omap4_vdd_core_info; | ||
| 184 | |||
| 185 | static struct voltagedomain omap4_voltdm_mpu = { | ||
| 186 | .name = "mpu", | ||
| 187 | @@ -64,6 +58,7 @@ static struct voltagedomain omap4_voltdm_mpu = { | ||
| 188 | .rmw = omap4_prm_vcvp_rmw, | ||
| 189 | .vc = &omap4_vc_mpu, | ||
| 190 | .vfsm = &omap4_vdd_mpu_vfsm, | ||
| 191 | + .vp = &omap4_vp_mpu, | ||
| 192 | .vdd = &omap4_vdd_mpu_info, | ||
| 193 | }; | ||
| 194 | |||
| 195 | @@ -75,6 +70,7 @@ static struct voltagedomain omap4_voltdm_iva = { | ||
| 196 | .rmw = omap4_prm_vcvp_rmw, | ||
| 197 | .vc = &omap4_vc_iva, | ||
| 198 | .vfsm = &omap4_vdd_iva_vfsm, | ||
| 199 | + .vp = &omap4_vp_iva, | ||
| 200 | .vdd = &omap4_vdd_iva_info, | ||
| 201 | }; | ||
| 202 | |||
| 203 | @@ -86,6 +82,7 @@ static struct voltagedomain omap4_voltdm_core = { | ||
| 204 | .rmw = omap4_prm_vcvp_rmw, | ||
| 205 | .vc = &omap4_vc_core, | ||
| 206 | .vfsm = &omap4_vdd_core_vfsm, | ||
| 207 | + .vp = &omap4_vp_core, | ||
| 208 | .vdd = &omap4_vdd_core_info, | ||
| 209 | }; | ||
| 210 | |||
| 211 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 212 | index a3afcbe..53d6018 100644 | ||
| 213 | --- a/arch/arm/mach-omap2/vp.c | ||
| 214 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 215 | @@ -14,7 +14,7 @@ static void __init vp_debugfs_init(struct voltagedomain *voltdm); | ||
| 216 | |||
| 217 | static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 218 | { | ||
| 219 | - struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; | ||
| 220 | + struct omap_vp_instance *vp = voltdm->vp; | ||
| 221 | u32 vpconfig; | ||
| 222 | unsigned long uvdc; | ||
| 223 | char vsel; | ||
| 224 | @@ -35,14 +35,14 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 225 | vsel = voltdm->pmic->uv_to_vsel(uvdc); | ||
| 226 | |||
| 227 | vpconfig = voltdm->read(vp->vpconfig); | ||
| 228 | - vpconfig &= ~(vp->vp_common->vpconfig_initvoltage_mask | | ||
| 229 | - vp->vp_common->vpconfig_initvdd); | ||
| 230 | - vpconfig |= vsel << vp->vp_common->vpconfig_initvoltage_shift; | ||
| 231 | + vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | | ||
| 232 | + vp->common->vpconfig_initvdd); | ||
| 233 | + vpconfig |= vsel << vp->common->vpconfig_initvoltage_shift; | ||
| 234 | |||
| 235 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 236 | |||
| 237 | /* Trigger initVDD value copy to voltage processor */ | ||
| 238 | - voltdm->write((vpconfig | vp->vp_common->vpconfig_initvdd), | ||
| 239 | + voltdm->write((vpconfig | vp->common->vpconfig_initvdd), | ||
| 240 | vp->vpconfig); | ||
| 241 | |||
| 242 | /* Clear initVDD copy trigger bit */ | ||
| 243 | @@ -52,7 +52,7 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 244 | /* Generic voltage init functions */ | ||
| 245 | void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 246 | { | ||
| 247 | - struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; | ||
| 248 | + struct omap_vp_instance *vp = voltdm->vp; | ||
| 249 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 250 | u32 vp_val; | ||
| 251 | |||
| 252 | @@ -64,28 +64,28 @@ void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 253 | |||
| 254 | vp_val = vdd->vp_rt_data.vpconfig_erroroffset | | ||
| 255 | (vdd->vp_rt_data.vpconfig_errorgain << | ||
| 256 | - vp->vp_common->vpconfig_errorgain_shift) | | ||
| 257 | - vp->vp_common->vpconfig_timeouten; | ||
| 258 | + vp->common->vpconfig_errorgain_shift) | | ||
| 259 | + vp->common->vpconfig_timeouten; | ||
| 260 | voltdm->write(vp_val, vp->vpconfig); | ||
| 261 | |||
| 262 | vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << | ||
| 263 | - vp->vp_common->vstepmin_smpswaittimemin_shift) | | ||
| 264 | + vp->common->vstepmin_smpswaittimemin_shift) | | ||
| 265 | (vdd->vp_rt_data.vstepmin_stepmin << | ||
| 266 | - vp->vp_common->vstepmin_stepmin_shift)); | ||
| 267 | + vp->common->vstepmin_stepmin_shift)); | ||
| 268 | voltdm->write(vp_val, vp->vstepmin); | ||
| 269 | |||
| 270 | vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << | ||
| 271 | - vp->vp_common->vstepmax_smpswaittimemax_shift) | | ||
| 272 | + vp->common->vstepmax_smpswaittimemax_shift) | | ||
| 273 | (vdd->vp_rt_data.vstepmax_stepmax << | ||
| 274 | - vp->vp_common->vstepmax_stepmax_shift)); | ||
| 275 | + vp->common->vstepmax_stepmax_shift)); | ||
| 276 | voltdm->write(vp_val, vp->vstepmax); | ||
| 277 | |||
| 278 | vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << | ||
| 279 | - vp->vp_common->vlimitto_vddmax_shift) | | ||
| 280 | + vp->common->vlimitto_vddmax_shift) | | ||
| 281 | (vdd->vp_rt_data.vlimitto_vddmin << | ||
| 282 | - vp->vp_common->vlimitto_vddmin_shift) | | ||
| 283 | + vp->common->vlimitto_vddmin_shift) | | ||
| 284 | (vdd->vp_rt_data.vlimitto_timeout << | ||
| 285 | - vp->vp_common->vlimitto_timeout_shift)); | ||
| 286 | + vp->common->vlimitto_timeout_shift)); | ||
| 287 | voltdm->write(vp_val, vp->vlimitto); | ||
| 288 | |||
| 289 | vp_debugfs_init(voltdm); | ||
| 290 | @@ -95,7 +95,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 291 | int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 292 | unsigned long target_volt) | ||
| 293 | { | ||
| 294 | - struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; | ||
| 295 | + struct omap_vp_instance *vp = voltdm->vp; | ||
| 296 | u32 vpconfig; | ||
| 297 | u8 target_vsel, current_vsel; | ||
| 298 | int ret, timeout = 0; | ||
| 299 | @@ -109,8 +109,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 300 | * is <3us | ||
| 301 | */ | ||
| 302 | while (timeout++ < VP_TRANXDONE_TIMEOUT) { | ||
| 303 | - vp->vp_common->ops->clear_txdone(vp->id); | ||
| 304 | - if (!vp->vp_common->ops->check_txdone(vp->id)) | ||
| 305 | + vp->common->ops->clear_txdone(vp->id); | ||
| 306 | + if (!vp->common->ops->check_txdone(vp->id)) | ||
| 307 | break; | ||
| 308 | udelay(1); | ||
| 309 | } | ||
| 310 | @@ -122,19 +122,19 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 311 | |||
| 312 | /* Configure for VP-Force Update */ | ||
| 313 | vpconfig = voltdm->read(vp->vpconfig); | ||
| 314 | - vpconfig &= ~(vp->vp_common->vpconfig_initvdd | | ||
| 315 | - vp->vp_common->vpconfig_forceupdate | | ||
| 316 | - vp->vp_common->vpconfig_initvoltage_mask); | ||
| 317 | + vpconfig &= ~(vp->common->vpconfig_initvdd | | ||
| 318 | + vp->common->vpconfig_forceupdate | | ||
| 319 | + vp->common->vpconfig_initvoltage_mask); | ||
| 320 | vpconfig |= ((target_vsel << | ||
| 321 | - vp->vp_common->vpconfig_initvoltage_shift)); | ||
| 322 | + vp->common->vpconfig_initvoltage_shift)); | ||
| 323 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 324 | |||
| 325 | /* Trigger initVDD value copy to voltage processor */ | ||
| 326 | - vpconfig |= vp->vp_common->vpconfig_initvdd; | ||
| 327 | + vpconfig |= vp->common->vpconfig_initvdd; | ||
| 328 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 329 | |||
| 330 | /* Force update of voltage */ | ||
| 331 | - vpconfig |= vp->vp_common->vpconfig_forceupdate; | ||
| 332 | + vpconfig |= vp->common->vpconfig_forceupdate; | ||
| 333 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 334 | |||
| 335 | /* | ||
| 336 | @@ -142,7 +142,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 337 | * Depends on SMPSWAITTIMEMIN/MAX and voltage change | ||
| 338 | */ | ||
| 339 | timeout = 0; | ||
| 340 | - omap_test_timeout(vp->vp_common->ops->check_txdone(vp->id), | ||
| 341 | + omap_test_timeout(vp->common->ops->check_txdone(vp->id), | ||
| 342 | VP_TRANXDONE_TIMEOUT, timeout); | ||
| 343 | if (timeout >= VP_TRANXDONE_TIMEOUT) | ||
| 344 | pr_err("%s: vdd_%s TRANXDONE timeout exceeded." | ||
| 345 | @@ -157,8 +157,8 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 346 | */ | ||
| 347 | timeout = 0; | ||
| 348 | while (timeout++ < VP_TRANXDONE_TIMEOUT) { | ||
| 349 | - vp->vp_common->ops->clear_txdone(vp->id); | ||
| 350 | - if (!vp->vp_common->ops->check_txdone(vp->id)) | ||
| 351 | + vp->common->ops->clear_txdone(vp->id); | ||
| 352 | + if (!vp->common->ops->check_txdone(vp->id)) | ||
| 353 | break; | ||
| 354 | udelay(1); | ||
| 355 | } | ||
| 356 | @@ -170,10 +170,10 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 357 | |||
| 358 | vpconfig = voltdm->read(vp->vpconfig); | ||
| 359 | /* Clear initVDD copy trigger bit */ | ||
| 360 | - vpconfig &= ~vp->vp_common->vpconfig_initvdd; | ||
| 361 | + vpconfig &= ~vp->common->vpconfig_initvdd; | ||
| 362 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 363 | /* Clear force bit */ | ||
| 364 | - vpconfig &= ~vp->vp_common->vpconfig_forceupdate; | ||
| 365 | + vpconfig &= ~vp->common->vpconfig_forceupdate; | ||
| 366 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 367 | |||
| 368 | return 0; | ||
| 369 | @@ -187,8 +187,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 370 | */ | ||
| 371 | unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) | ||
| 372 | { | ||
| 373 | - struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; | ||
| 374 | - struct omap_vdd_info *vdd; | ||
| 375 | + struct omap_vp_instance *vp = voltdm->vp; | ||
| 376 | u8 curr_vsel; | ||
| 377 | |||
| 378 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 379 | @@ -196,7 +195,6 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) | ||
| 380 | return 0; | ||
| 381 | } | ||
| 382 | |||
| 383 | - vdd = voltdm->vdd; | ||
| 384 | if (!voltdm->read) { | ||
| 385 | pr_err("%s: No read API for reading vdd_%s regs\n", | ||
| 386 | __func__, voltdm->name); | ||
| 387 | @@ -223,8 +221,7 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) | ||
| 388 | */ | ||
| 389 | void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 390 | { | ||
| 391 | - struct omap_vp_instance_data *vp; | ||
| 392 | - struct omap_vdd_info *vdd; | ||
| 393 | + struct omap_vp_instance *vp; | ||
| 394 | u32 vpconfig; | ||
| 395 | |||
| 396 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 397 | @@ -232,8 +229,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 398 | return; | ||
| 399 | } | ||
| 400 | |||
| 401 | - vdd = voltdm->vdd; | ||
| 402 | - vp = voltdm->vdd->vp_data; | ||
| 403 | + vp = voltdm->vp; | ||
| 404 | if (!voltdm->read || !voltdm->write) { | ||
| 405 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 406 | __func__, voltdm->name); | ||
| 407 | @@ -241,16 +237,16 @@ void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 408 | } | ||
| 409 | |||
| 410 | /* If VP is already enabled, do nothing. Return */ | ||
| 411 | - if (vdd->vp_enabled) | ||
| 412 | + if (vp->enabled) | ||
| 413 | return; | ||
| 414 | |||
| 415 | vp_latch_vsel(voltdm); | ||
| 416 | |||
| 417 | /* Enable VP */ | ||
| 418 | vpconfig = voltdm->read(vp->vpconfig); | ||
| 419 | - vpconfig |= vp->vp_common->vpconfig_vpenable; | ||
| 420 | + vpconfig |= vp->common->vpconfig_vpenable; | ||
| 421 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 422 | - vdd->vp_enabled = true; | ||
| 423 | + vp->enabled = true; | ||
| 424 | } | ||
| 425 | |||
| 426 | /** | ||
| 427 | @@ -262,8 +258,7 @@ void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 428 | */ | ||
| 429 | void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 430 | { | ||
| 431 | - struct omap_vp_instance_data *vp; | ||
| 432 | - struct omap_vdd_info *vdd; | ||
| 433 | + struct omap_vp_instance *vp; | ||
| 434 | u32 vpconfig; | ||
| 435 | int timeout; | ||
| 436 | |||
| 437 | @@ -272,8 +267,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 438 | return; | ||
| 439 | } | ||
| 440 | |||
| 441 | - vdd = voltdm->vdd; | ||
| 442 | - vp = voltdm->vdd->vp_data; | ||
| 443 | + vp = voltdm->vp; | ||
| 444 | if (!voltdm->read || !voltdm->write) { | ||
| 445 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 446 | __func__, voltdm->name); | ||
| 447 | @@ -281,7 +275,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 448 | } | ||
| 449 | |||
| 450 | /* If VP is already disabled, do nothing. Return */ | ||
| 451 | - if (!vdd->vp_enabled) { | ||
| 452 | + if (!vp->enabled) { | ||
| 453 | pr_warning("%s: Trying to disable VP for vdd_%s when" | ||
| 454 | "it is already disabled\n", __func__, voltdm->name); | ||
| 455 | return; | ||
| 456 | @@ -289,7 +283,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 457 | |||
| 458 | /* Disable VP */ | ||
| 459 | vpconfig = voltdm->read(vp->vpconfig); | ||
| 460 | - vpconfig &= ~vp->vp_common->vpconfig_vpenable; | ||
| 461 | + vpconfig &= ~vp->common->vpconfig_vpenable; | ||
| 462 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 463 | |||
| 464 | /* | ||
| 465 | @@ -302,7 +296,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 466 | pr_warning("%s: vdd_%s idle timedout\n", | ||
| 467 | __func__, voltdm->name); | ||
| 468 | |||
| 469 | - vdd->vp_enabled = false; | ||
| 470 | + vp->enabled = false; | ||
| 471 | |||
| 472 | return; | ||
| 473 | } | ||
| 474 | @@ -311,7 +305,7 @@ void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 475 | static int vp_volt_debug_get(void *data, u64 *val) | ||
| 476 | { | ||
| 477 | struct voltagedomain *voltdm = (struct voltagedomain *)data; | ||
| 478 | - struct omap_vp_instance_data *vp = voltdm->vdd->vp_data; | ||
| 479 | + struct omap_vp_instance *vp = voltdm->vp; | ||
| 480 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 481 | u8 vsel; | ||
| 482 | |||
| 483 | diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h | ||
| 484 | index 79aa8d3..1d63960 100644 | ||
| 485 | --- a/arch/arm/mach-omap2/vp.h | ||
| 486 | +++ b/arch/arm/mach-omap2/vp.h | ||
| 487 | @@ -45,7 +45,7 @@ struct omap_vp_ops { | ||
| 488 | }; | ||
| 489 | |||
| 490 | /** | ||
| 491 | - * struct omap_vp_common_data - register data common to all VDDs | ||
| 492 | + * struct omap_vp_common - register data common to all VDDs | ||
| 493 | * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg | ||
| 494 | * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg | ||
| 495 | * @vpconfig_timeouten_mask: TIMEOUT bitmask in the PRM_VP*_CONFIG reg | ||
| 496 | @@ -67,7 +67,7 @@ struct omap_vp_ops { | ||
| 497 | * bitfield - remove one | ||
| 498 | * XXX Many of these fields are wrongly named -- e.g., vpconfig_smps* -- fix! | ||
| 499 | */ | ||
| 500 | -struct omap_vp_common_data { | ||
| 501 | +struct omap_vp_common { | ||
| 502 | u32 vpconfig_errorgain_mask; | ||
| 503 | u32 vpconfig_initvoltage_mask; | ||
| 504 | u32 vpconfig_timeouten; | ||
| 505 | @@ -89,18 +89,19 @@ struct omap_vp_common_data { | ||
| 506 | }; | ||
| 507 | |||
| 508 | /** | ||
| 509 | - * struct omap_vp_instance_data - VP register offsets (per-VDD) | ||
| 510 | - * @vp_common: pointer to struct omap_vp_common_data * for this SoC | ||
| 511 | + * struct omap_vp_instance - VP register offsets (per-VDD) | ||
| 512 | + * @common: pointer to struct omap_vp_common * for this SoC | ||
| 513 | * @vpconfig: PRM_VP*_CONFIG reg offset from PRM start | ||
| 514 | * @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start | ||
| 515 | * @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start | ||
| 516 | * @vstatus: PRM_VP*_VSTATUS reg offset from PRM start | ||
| 517 | * @voltage: PRM_VP*_VOLTAGE reg offset from PRM start | ||
| 518 | + * @enabled: flag to keep track of whether vp is enabled or not | ||
| 519 | * | ||
| 520 | * XXX vp_common is probably not needed since it is per-SoC | ||
| 521 | */ | ||
| 522 | -struct omap_vp_instance_data { | ||
| 523 | - const struct omap_vp_common_data *vp_common; | ||
| 524 | +struct omap_vp_instance { | ||
| 525 | + const struct omap_vp_common *common; | ||
| 526 | u8 vpconfig; | ||
| 527 | u8 vstepmin; | ||
| 528 | u8 vstepmax; | ||
| 529 | @@ -108,6 +109,7 @@ struct omap_vp_instance_data { | ||
| 530 | u8 vstatus; | ||
| 531 | u8 voltage; | ||
| 532 | u8 id; | ||
| 533 | + bool enabled; | ||
| 534 | }; | ||
| 535 | |||
| 536 | /** | ||
| 537 | @@ -139,12 +141,12 @@ struct omap_vp_runtime_data { | ||
| 538 | u8 vlimitto_vddmax; | ||
| 539 | }; | ||
| 540 | |||
| 541 | -extern struct omap_vp_instance_data omap3_vp1_data; | ||
| 542 | -extern struct omap_vp_instance_data omap3_vp2_data; | ||
| 543 | +extern struct omap_vp_instance omap3_vp_mpu; | ||
| 544 | +extern struct omap_vp_instance omap3_vp_core; | ||
| 545 | |||
| 546 | -extern struct omap_vp_instance_data omap4_vp_mpu_data; | ||
| 547 | -extern struct omap_vp_instance_data omap4_vp_iva_data; | ||
| 548 | -extern struct omap_vp_instance_data omap4_vp_core_data; | ||
| 549 | +extern struct omap_vp_instance omap4_vp_mpu; | ||
| 550 | +extern struct omap_vp_instance omap4_vp_iva; | ||
| 551 | +extern struct omap_vp_instance omap4_vp_core; | ||
| 552 | |||
| 553 | void omap_vp_init(struct voltagedomain *voltdm); | ||
| 554 | void omap_vp_enable(struct voltagedomain *voltdm); | ||
| 555 | diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 556 | index b01d333..79c3df9 100644 | ||
| 557 | --- a/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 558 | +++ b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 559 | @@ -36,7 +36,7 @@ static const struct omap_vp_ops omap3_vp_ops = { | ||
| 560 | * VP data common to 34xx/36xx chips | ||
| 561 | * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. | ||
| 562 | */ | ||
| 563 | -static const struct omap_vp_common_data omap3_vp_common = { | ||
| 564 | +static const struct omap_vp_common omap3_vp_common = { | ||
| 565 | .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, | ||
| 566 | .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, | ||
| 567 | .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, | ||
| 568 | @@ -56,9 +56,9 @@ static const struct omap_vp_common_data omap3_vp_common = { | ||
| 569 | .ops = &omap3_vp_ops, | ||
| 570 | }; | ||
| 571 | |||
| 572 | -struct omap_vp_instance_data omap3_vp1_data = { | ||
| 573 | +struct omap_vp_instance omap3_vp_mpu = { | ||
| 574 | .id = OMAP3_VP_VDD_MPU_ID, | ||
| 575 | - .vp_common = &omap3_vp_common, | ||
| 576 | + .common = &omap3_vp_common, | ||
| 577 | .vpconfig = OMAP3_PRM_VP1_CONFIG_OFFSET, | ||
| 578 | .vstepmin = OMAP3_PRM_VP1_VSTEPMIN_OFFSET, | ||
| 579 | .vstepmax = OMAP3_PRM_VP1_VSTEPMAX_OFFSET, | ||
| 580 | @@ -67,9 +67,9 @@ struct omap_vp_instance_data omap3_vp1_data = { | ||
| 581 | .voltage = OMAP3_PRM_VP1_VOLTAGE_OFFSET, | ||
| 582 | }; | ||
| 583 | |||
| 584 | -struct omap_vp_instance_data omap3_vp2_data = { | ||
| 585 | +struct omap_vp_instance omap3_vp_core = { | ||
| 586 | .id = OMAP3_VP_VDD_CORE_ID, | ||
| 587 | - .vp_common = &omap3_vp_common, | ||
| 588 | + .common = &omap3_vp_common, | ||
| 589 | .vpconfig = OMAP3_PRM_VP2_CONFIG_OFFSET, | ||
| 590 | .vstepmin = OMAP3_PRM_VP2_VSTEPMIN_OFFSET, | ||
| 591 | .vstepmax = OMAP3_PRM_VP2_VSTEPMAX_OFFSET, | ||
| 592 | diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 593 | index 9704c7b..8f75cd9 100644 | ||
| 594 | --- a/arch/arm/mach-omap2/vp44xx_data.c | ||
| 595 | +++ b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 596 | @@ -36,7 +36,7 @@ static const struct omap_vp_ops omap4_vp_ops = { | ||
| 597 | * VP data common to 44xx chips | ||
| 598 | * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. | ||
| 599 | */ | ||
| 600 | -static const struct omap_vp_common_data omap4_vp_common = { | ||
| 601 | +static const struct omap_vp_common omap4_vp_common = { | ||
| 602 | .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, | ||
| 603 | .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, | ||
| 604 | .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, | ||
| 605 | @@ -56,9 +56,9 @@ static const struct omap_vp_common_data omap4_vp_common = { | ||
| 606 | .ops = &omap4_vp_ops, | ||
| 607 | }; | ||
| 608 | |||
| 609 | -struct omap_vp_instance_data omap4_vp_mpu_data = { | ||
| 610 | +struct omap_vp_instance omap4_vp_mpu = { | ||
| 611 | .id = OMAP4_VP_VDD_MPU_ID, | ||
| 612 | - .vp_common = &omap4_vp_common, | ||
| 613 | + .common = &omap4_vp_common, | ||
| 614 | .vpconfig = OMAP4_PRM_VP_MPU_CONFIG_OFFSET, | ||
| 615 | .vstepmin = OMAP4_PRM_VP_MPU_VSTEPMIN_OFFSET, | ||
| 616 | .vstepmax = OMAP4_PRM_VP_MPU_VSTEPMAX_OFFSET, | ||
| 617 | @@ -67,9 +67,9 @@ struct omap_vp_instance_data omap4_vp_mpu_data = { | ||
| 618 | .voltage = OMAP4_PRM_VP_MPU_VOLTAGE_OFFSET, | ||
| 619 | }; | ||
| 620 | |||
| 621 | -struct omap_vp_instance_data omap4_vp_iva_data = { | ||
| 622 | +struct omap_vp_instance omap4_vp_iva = { | ||
| 623 | .id = OMAP4_VP_VDD_IVA_ID, | ||
| 624 | - .vp_common = &omap4_vp_common, | ||
| 625 | + .common = &omap4_vp_common, | ||
| 626 | .vpconfig = OMAP4_PRM_VP_IVA_CONFIG_OFFSET, | ||
| 627 | .vstepmin = OMAP4_PRM_VP_IVA_VSTEPMIN_OFFSET, | ||
| 628 | .vstepmax = OMAP4_PRM_VP_IVA_VSTEPMAX_OFFSET, | ||
| 629 | @@ -78,9 +78,9 @@ struct omap_vp_instance_data omap4_vp_iva_data = { | ||
| 630 | .voltage = OMAP4_PRM_VP_IVA_VOLTAGE_OFFSET, | ||
| 631 | }; | ||
| 632 | |||
| 633 | -struct omap_vp_instance_data omap4_vp_core_data = { | ||
| 634 | +struct omap_vp_instance omap4_vp_core = { | ||
| 635 | .id = OMAP4_VP_VDD_CORE_ID, | ||
| 636 | - .vp_common = &omap4_vp_common, | ||
| 637 | + .common = &omap4_vp_common, | ||
| 638 | .vpconfig = OMAP4_PRM_VP_CORE_CONFIG_OFFSET, | ||
| 639 | .vstepmin = OMAP4_PRM_VP_CORE_VSTEPMIN_OFFSET, | ||
| 640 | .vstepmax = OMAP4_PRM_VP_CORE_VSTEPMAX_OFFSET, | ||
| 641 | -- | ||
| 642 | 1.7.2.5 | ||
| 643 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0129-OMAP3-voltage-remove-unneeded-debugfs-interface.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0129-OMAP3-voltage-remove-unneeded-debugfs-interface.patch deleted file mode 100644 index fe5139f5..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0129-OMAP3-voltage-remove-unneeded-debugfs-interface.patch +++ /dev/null | |||
| @@ -1,317 +0,0 @@ | |||
| 1 | From fc1db2a579514eb36f5091b656133a6a9c2cbc0d Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Tue, 5 Apr 2011 14:39:11 -0700 | ||
| 4 | Subject: [PATCH 129/149] OMAP3+: voltage: remove unneeded debugfs interface | ||
| 5 | |||
| 6 | Remove read-only debugfs interface to VP values. Most of the values | ||
| 7 | are init-time only and never change. Current voltage value should be | ||
| 8 | retreived from the (eventual) regulator framework interface to the | ||
| 9 | voltage domain. | ||
| 10 | |||
| 11 | Fixes to original version provided by Nishanth Menon <nm@ti.com> | ||
| 12 | |||
| 13 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/smartreflex.c | 29 +++++++++----- | ||
| 16 | arch/arm/mach-omap2/voltage.c | 78 ------------------------------------- | ||
| 17 | arch/arm/mach-omap2/voltage.h | 3 - | ||
| 18 | arch/arm/mach-omap2/vp.c | 63 ----------------------------- | ||
| 19 | 4 files changed, 19 insertions(+), 154 deletions(-) | ||
| 20 | |||
| 21 | diff --git a/arch/arm/mach-omap2/smartreflex.c b/arch/arm/mach-omap2/smartreflex.c | ||
| 22 | index be6add0..edb94f2 100644 | ||
| 23 | --- a/arch/arm/mach-omap2/smartreflex.c | ||
| 24 | +++ b/arch/arm/mach-omap2/smartreflex.c | ||
| 25 | @@ -62,6 +62,7 @@ static LIST_HEAD(sr_list); | ||
| 26 | |||
| 27 | static struct omap_sr_class_data *sr_class; | ||
| 28 | static struct omap_sr_pmic_data *sr_pmic_data; | ||
| 29 | +static struct dentry *sr_dbg_dir; | ||
| 30 | |||
| 31 | static inline void sr_write_reg(struct omap_sr *sr, unsigned offset, u32 value) | ||
| 32 | { | ||
| 33 | @@ -826,9 +827,10 @@ static int __init omap_sr_probe(struct platform_device *pdev) | ||
| 34 | struct omap_sr *sr_info = kzalloc(sizeof(struct omap_sr), GFP_KERNEL); | ||
| 35 | struct omap_sr_data *pdata = pdev->dev.platform_data; | ||
| 36 | struct resource *mem, *irq; | ||
| 37 | - struct dentry *vdd_dbg_dir, *nvalue_dir; | ||
| 38 | + struct dentry *nvalue_dir; | ||
| 39 | struct omap_volt_data *volt_data; | ||
| 40 | int i, ret = 0; | ||
| 41 | + char *name; | ||
| 42 | |||
| 43 | if (!sr_info) { | ||
| 44 | dev_err(&pdev->dev, "%s: unable to allocate sr_info\n", | ||
| 45 | @@ -898,18 +900,25 @@ static int __init omap_sr_probe(struct platform_device *pdev) | ||
| 46 | } | ||
| 47 | |||
| 48 | dev_info(&pdev->dev, "%s: SmartReflex driver initialized\n", __func__); | ||
| 49 | + if (!sr_dbg_dir) { | ||
| 50 | + sr_dbg_dir = debugfs_create_dir("smartreflex", NULL); | ||
| 51 | + if (!sr_dbg_dir) { | ||
| 52 | + ret = PTR_ERR(sr_dbg_dir); | ||
| 53 | + pr_err("%s:sr debugfs dir creation failed(%d)\n", | ||
| 54 | + __func__, ret); | ||
| 55 | + goto err_iounmap; | ||
| 56 | + } | ||
| 57 | + } | ||
| 58 | |||
| 59 | - /* | ||
| 60 | - * If the voltage domain debugfs directory is not created, do | ||
| 61 | - * not try to create rest of the debugfs entries. | ||
| 62 | - */ | ||
| 63 | - vdd_dbg_dir = omap_voltage_get_dbgdir(sr_info->voltdm); | ||
| 64 | - if (!vdd_dbg_dir) { | ||
| 65 | - ret = -EINVAL; | ||
| 66 | + name = kasprintf(GFP_KERNEL, "sr_%s", sr_info->voltdm->name); | ||
| 67 | + if (!name) { | ||
| 68 | + dev_err(&pdev->dev, "%s: Unable to alloc debugfs name\n", | ||
| 69 | + __func__); | ||
| 70 | + ret = -ENOMEM; | ||
| 71 | goto err_iounmap; | ||
| 72 | } | ||
| 73 | - | ||
| 74 | - sr_info->dbg_dir = debugfs_create_dir("smartreflex", vdd_dbg_dir); | ||
| 75 | + sr_info->dbg_dir = debugfs_create_dir(name, sr_dbg_dir); | ||
| 76 | + kfree(name); | ||
| 77 | if (IS_ERR(sr_info->dbg_dir)) { | ||
| 78 | dev_err(&pdev->dev, "%s: Unable to create debugfs directory\n", | ||
| 79 | __func__); | ||
| 80 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 81 | index c22b53c..eaa5f93 100644 | ||
| 82 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 83 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 84 | @@ -43,9 +43,6 @@ | ||
| 85 | |||
| 86 | static LIST_HEAD(voltdm_list); | ||
| 87 | |||
| 88 | -#define VOLTAGE_DIR_SIZE 16 | ||
| 89 | -static struct dentry *voltage_dir; | ||
| 90 | - | ||
| 91 | static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 92 | { | ||
| 93 | char *sys_ck_name; | ||
| 94 | @@ -102,51 +99,6 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 95 | return 0; | ||
| 96 | } | ||
| 97 | |||
| 98 | -static int nom_volt_debug_get(void *data, u64 *val) | ||
| 99 | -{ | ||
| 100 | - struct voltagedomain *voltdm = (struct voltagedomain *)data; | ||
| 101 | - | ||
| 102 | - if (!voltdm) { | ||
| 103 | - pr_warning("Wrong paramater passed\n"); | ||
| 104 | - return -EINVAL; | ||
| 105 | - } | ||
| 106 | - | ||
| 107 | - *val = omap_voltage_get_nom_volt(voltdm); | ||
| 108 | - | ||
| 109 | - return 0; | ||
| 110 | -} | ||
| 111 | - | ||
| 112 | -DEFINE_SIMPLE_ATTRIBUTE(nom_volt_debug_fops, nom_volt_debug_get, NULL, | ||
| 113 | - "%llu\n"); | ||
| 114 | -static void __init vdd_debugfs_init(struct voltagedomain *voltdm) | ||
| 115 | -{ | ||
| 116 | - char *name; | ||
| 117 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 118 | - | ||
| 119 | - name = kzalloc(VOLTAGE_DIR_SIZE, GFP_KERNEL); | ||
| 120 | - if (!name) { | ||
| 121 | - pr_warning("%s: Unable to allocate memory for debugfs" | ||
| 122 | - " directory name for vdd_%s", | ||
| 123 | - __func__, voltdm->name); | ||
| 124 | - return; | ||
| 125 | - } | ||
| 126 | - strcpy(name, "vdd_"); | ||
| 127 | - strcat(name, voltdm->name); | ||
| 128 | - | ||
| 129 | - vdd->debug_dir = debugfs_create_dir(name, voltage_dir); | ||
| 130 | - kfree(name); | ||
| 131 | - if (IS_ERR(vdd->debug_dir)) { | ||
| 132 | - pr_warning("%s: Unable to create debugfs directory for" | ||
| 133 | - " vdd_%s\n", __func__, voltdm->name); | ||
| 134 | - vdd->debug_dir = NULL; | ||
| 135 | - return; | ||
| 136 | - } | ||
| 137 | - | ||
| 138 | - (void) debugfs_create_file("curr_nominal_volt", S_IRUGO, | ||
| 139 | - vdd->debug_dir, (void *) voltdm, | ||
| 140 | - &nom_volt_debug_fops); | ||
| 141 | -} | ||
| 142 | - | ||
| 143 | static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) | ||
| 144 | { | ||
| 145 | int ret = -EINVAL; | ||
| 146 | @@ -342,31 +294,6 @@ int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
| 147 | } | ||
| 148 | |||
| 149 | /** | ||
| 150 | - * omap_voltage_get_dbgdir() - API to get pointer to the debugfs directory | ||
| 151 | - * corresponding to a voltage domain. | ||
| 152 | - * | ||
| 153 | - * @voltdm: pointer to the VDD whose debug directory is required. | ||
| 154 | - * | ||
| 155 | - * This API returns pointer to the debugfs directory corresponding | ||
| 156 | - * to the voltage domain. Should be used by drivers requiring to | ||
| 157 | - * add any debug entry for a particular voltage domain. Returns NULL | ||
| 158 | - * in case of error. | ||
| 159 | - */ | ||
| 160 | -struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm) | ||
| 161 | -{ | ||
| 162 | - struct omap_vdd_info *vdd; | ||
| 163 | - | ||
| 164 | - if (!voltdm || IS_ERR(voltdm)) { | ||
| 165 | - pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 166 | - return NULL; | ||
| 167 | - } | ||
| 168 | - | ||
| 169 | - vdd = voltdm->vdd; | ||
| 170 | - | ||
| 171 | - return vdd->debug_dir; | ||
| 172 | -} | ||
| 173 | - | ||
| 174 | -/** | ||
| 175 | * omap_change_voltscale_method() - API to change the voltage scaling method. | ||
| 176 | * @voltdm: pointer to the VDD whose voltage scaling method | ||
| 177 | * has to be changed. | ||
| 178 | @@ -418,10 +345,6 @@ int __init omap_voltage_late_init(void) | ||
| 179 | return -EINVAL; | ||
| 180 | } | ||
| 181 | |||
| 182 | - voltage_dir = debugfs_create_dir("voltage", NULL); | ||
| 183 | - if (IS_ERR(voltage_dir)) | ||
| 184 | - pr_err("%s: Unable to create voltage debugfs main dir\n", | ||
| 185 | - __func__); | ||
| 186 | list_for_each_entry(voltdm, &voltdm_list, node) { | ||
| 187 | if (!voltdm->scalable) | ||
| 188 | continue; | ||
| 189 | @@ -434,7 +357,6 @@ int __init omap_voltage_late_init(void) | ||
| 190 | if (voltdm->vdd) { | ||
| 191 | if (omap_vdd_data_configure(voltdm)) | ||
| 192 | continue; | ||
| 193 | - vdd_debugfs_init(voltdm); | ||
| 194 | omap_vp_init(voltdm); | ||
| 195 | } | ||
| 196 | } | ||
| 197 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 198 | index 65f94c7..5261703 100644 | ||
| 199 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 200 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 201 | @@ -136,14 +136,12 @@ struct omap_voltdm_pmic { | ||
| 202 | * @volt_data : voltage table having the distinct voltages supported | ||
| 203 | * by the domain and other associated per voltage data. | ||
| 204 | * @vp_rt_data : VP data derived at runtime, not predefined | ||
| 205 | - * @debug_dir : debug directory for this voltage domain. | ||
| 206 | * @curr_volt : current voltage for this vdd. | ||
| 207 | * @volt_scale : API to scale the voltage of the vdd. | ||
| 208 | */ | ||
| 209 | struct omap_vdd_info { | ||
| 210 | struct omap_volt_data *volt_data; | ||
| 211 | struct omap_vp_runtime_data vp_rt_data; | ||
| 212 | - struct dentry *debug_dir; | ||
| 213 | u32 curr_volt; | ||
| 214 | |||
| 215 | int (*volt_scale) (struct voltagedomain *voltdm, | ||
| 216 | @@ -158,7 +156,6 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, | ||
| 217 | struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | ||
| 218 | unsigned long volt); | ||
| 219 | unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); | ||
| 220 | -struct dentry *omap_voltage_get_dbgdir(struct voltagedomain *voltdm); | ||
| 221 | #ifdef CONFIG_PM | ||
| 222 | int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
| 223 | struct omap_voltdm_pmic *pmic); | ||
| 224 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 225 | index 53d6018..c9a315f 100644 | ||
| 226 | --- a/arch/arm/mach-omap2/vp.c | ||
| 227 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 228 | @@ -1,6 +1,5 @@ | ||
| 229 | #include <linux/kernel.h> | ||
| 230 | #include <linux/init.h> | ||
| 231 | -#include <linux/debugfs.h> | ||
| 232 | |||
| 233 | #include <plat/common.h> | ||
| 234 | |||
| 235 | @@ -10,8 +9,6 @@ | ||
| 236 | #include "prm-regbits-44xx.h" | ||
| 237 | #include "prm44xx.h" | ||
| 238 | |||
| 239 | -static void __init vp_debugfs_init(struct voltagedomain *voltdm); | ||
| 240 | - | ||
| 241 | static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 242 | { | ||
| 243 | struct omap_vp_instance *vp = voltdm->vp; | ||
| 244 | @@ -87,8 +84,6 @@ void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 245 | (vdd->vp_rt_data.vlimitto_timeout << | ||
| 246 | vp->common->vlimitto_timeout_shift)); | ||
| 247 | voltdm->write(vp_val, vp->vlimitto); | ||
| 248 | - | ||
| 249 | - vp_debugfs_init(voltdm); | ||
| 250 | } | ||
| 251 | |||
| 252 | /* VP force update method of voltage scaling */ | ||
| 253 | @@ -300,61 +295,3 @@ void omap_vp_disable(struct voltagedomain *voltdm) | ||
| 254 | |||
| 255 | return; | ||
| 256 | } | ||
| 257 | - | ||
| 258 | -/* Voltage debugfs support */ | ||
| 259 | -static int vp_volt_debug_get(void *data, u64 *val) | ||
| 260 | -{ | ||
| 261 | - struct voltagedomain *voltdm = (struct voltagedomain *)data; | ||
| 262 | - struct omap_vp_instance *vp = voltdm->vp; | ||
| 263 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 264 | - u8 vsel; | ||
| 265 | - | ||
| 266 | - if (!vdd) { | ||
| 267 | - pr_warning("Wrong paramater passed\n"); | ||
| 268 | - return -EINVAL; | ||
| 269 | - } | ||
| 270 | - | ||
| 271 | - vsel = voltdm->read(vp->voltage); | ||
| 272 | - | ||
| 273 | - if (!voltdm->pmic->vsel_to_uv) { | ||
| 274 | - pr_warning("PMIC function to convert vsel to voltage" | ||
| 275 | - "in uV not registerd\n"); | ||
| 276 | - return -EINVAL; | ||
| 277 | - } | ||
| 278 | - | ||
| 279 | - *val = voltdm->pmic->vsel_to_uv(vsel); | ||
| 280 | - return 0; | ||
| 281 | -} | ||
| 282 | - | ||
| 283 | -DEFINE_SIMPLE_ATTRIBUTE(vp_volt_debug_fops, vp_volt_debug_get, NULL, "%llu\n"); | ||
| 284 | - | ||
| 285 | -static void __init vp_debugfs_init(struct voltagedomain *voltdm) | ||
| 286 | -{ | ||
| 287 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 288 | - struct dentry *debug_dir; | ||
| 289 | - | ||
| 290 | - debug_dir = debugfs_create_dir("vp", vdd->debug_dir); | ||
| 291 | - if (IS_ERR(debug_dir)) | ||
| 292 | - pr_err("%s: Unable to create VP debugfs dir dir\n", __func__); | ||
| 293 | - | ||
| 294 | - (void) debugfs_create_x16("errorgain", S_IRUGO, debug_dir, | ||
| 295 | - &(vdd->vp_rt_data.vpconfig_errorgain)); | ||
| 296 | - (void) debugfs_create_x16("smpswaittimemin", S_IRUGO, | ||
| 297 | - debug_dir, | ||
| 298 | - &(vdd->vp_rt_data.vstepmin_smpswaittimemin)); | ||
| 299 | - (void) debugfs_create_x8("stepmin", S_IRUGO, debug_dir, | ||
| 300 | - &(vdd->vp_rt_data.vstepmin_stepmin)); | ||
| 301 | - (void) debugfs_create_x16("smpswaittimemax", S_IRUGO, | ||
| 302 | - debug_dir, | ||
| 303 | - &(vdd->vp_rt_data.vstepmax_smpswaittimemax)); | ||
| 304 | - (void) debugfs_create_x8("stepmax", S_IRUGO, debug_dir, | ||
| 305 | - &(vdd->vp_rt_data.vstepmax_stepmax)); | ||
| 306 | - (void) debugfs_create_x8("vddmax", S_IRUGO, debug_dir, | ||
| 307 | - &(vdd->vp_rt_data.vlimitto_vddmax)); | ||
| 308 | - (void) debugfs_create_x8("vddmin", S_IRUGO, debug_dir, | ||
| 309 | - &(vdd->vp_rt_data.vlimitto_vddmin)); | ||
| 310 | - (void) debugfs_create_x16("timeout", S_IRUGO, debug_dir, | ||
| 311 | - &(vdd->vp_rt_data.vlimitto_timeout)); | ||
| 312 | - (void) debugfs_create_file("curr_volt", S_IRUGO, debug_dir, | ||
| 313 | - (void *) voltdm, &vp_volt_debug_fops); | ||
| 314 | -} | ||
| 315 | -- | ||
| 316 | 1.7.2.5 | ||
| 317 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0130-OMAP3-VP-struct-omap_vp_common-replace-shift-with-__.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0130-OMAP3-VP-struct-omap_vp_common-replace-shift-with-__.patch deleted file mode 100644 index 22dff617..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0130-OMAP3-VP-struct-omap_vp_common-replace-shift-with-__.patch +++ /dev/null | |||
| @@ -1,214 +0,0 @@ | |||
| 1 | From 19b2a24927050ee82e6f587ac47f484f1b114a57 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 4 Apr 2011 16:02:28 -0700 | ||
| 4 | Subject: [PATCH 130/149] OMAP3+: VP: struct omap_vp_common: replace shift with __ffs(mask) | ||
| 5 | |||
| 6 | In struct omap_vp_common, the shift value can be derived from the mask | ||
| 7 | value by using __ffs(), so remove the shift value for the various | ||
| 8 | VPCONFIG bitfields, and use __ffs() in the code for the shift value. | ||
| 9 | |||
| 10 | While here, rename field names in kerneldoc comment to match actual | ||
| 11 | field names in structure. Also, cleanup indendentaion for other VP | ||
| 12 | register accesses in omap_vp_init(). | ||
| 13 | |||
| 14 | No functional changes. | ||
| 15 | |||
| 16 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 17 | --- | ||
| 18 | arch/arm/mach-omap2/vc.c | 2 +- | ||
| 19 | arch/arm/mach-omap2/voltage.c | 2 +- | ||
| 20 | arch/arm/mach-omap2/vp.c | 29 ++++++++++++++--------------- | ||
| 21 | arch/arm/mach-omap2/vp.h | 34 ++++++++++++++-------------------- | ||
| 22 | arch/arm/mach-omap2/vp3xxx_data.c | 4 +--- | ||
| 23 | arch/arm/mach-omap2/vp44xx_data.c | 4 +--- | ||
| 24 | 6 files changed, 32 insertions(+), 43 deletions(-) | ||
| 25 | |||
| 26 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 27 | index 7058585..f64c826 100644 | ||
| 28 | --- a/arch/arm/mach-omap2/vc.c | ||
| 29 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 30 | @@ -140,7 +140,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 31 | vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; | ||
| 32 | vp_errgain_val &= voltdm->vp->common->vpconfig_errorgain_mask; | ||
| 33 | vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << | ||
| 34 | - voltdm->vp->common->vpconfig_errorgain_shift; | ||
| 35 | + __ffs(voltdm->vp->common->vpconfig_errorgain_mask); | ||
| 36 | voltdm->write(vp_errgain_val, voltdm->vp->vpconfig); | ||
| 37 | } | ||
| 38 | |||
| 39 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 40 | index eaa5f93..5b16fd1 100644 | ||
| 41 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 42 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 43 | @@ -82,7 +82,7 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 44 | |||
| 45 | vdd->vp_rt_data.vpconfig_erroroffset = | ||
| 46 | (voltdm->pmic->vp_erroroffset << | ||
| 47 | - voltdm->vp->common->vpconfig_erroroffset_shift); | ||
| 48 | + __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); | ||
| 49 | |||
| 50 | timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; | ||
| 51 | vdd->vp_rt_data.vlimitto_timeout = timeout_val; | ||
| 52 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 53 | index c9a315f..297d094 100644 | ||
| 54 | --- a/arch/arm/mach-omap2/vp.c | ||
| 55 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 56 | @@ -34,8 +34,7 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 57 | vpconfig = voltdm->read(vp->vpconfig); | ||
| 58 | vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | | ||
| 59 | vp->common->vpconfig_initvdd); | ||
| 60 | - vpconfig |= vsel << vp->common->vpconfig_initvoltage_shift; | ||
| 61 | - | ||
| 62 | + vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask); | ||
| 63 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 64 | |||
| 65 | /* Trigger initVDD value copy to voltage processor */ | ||
| 66 | @@ -61,28 +60,28 @@ void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 67 | |||
| 68 | vp_val = vdd->vp_rt_data.vpconfig_erroroffset | | ||
| 69 | (vdd->vp_rt_data.vpconfig_errorgain << | ||
| 70 | - vp->common->vpconfig_errorgain_shift) | | ||
| 71 | + __ffs(vp->common->vpconfig_errorgain_mask)) | | ||
| 72 | vp->common->vpconfig_timeouten; | ||
| 73 | voltdm->write(vp_val, vp->vpconfig); | ||
| 74 | |||
| 75 | vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << | ||
| 76 | - vp->common->vstepmin_smpswaittimemin_shift) | | ||
| 77 | - (vdd->vp_rt_data.vstepmin_stepmin << | ||
| 78 | - vp->common->vstepmin_stepmin_shift)); | ||
| 79 | + vp->common->vstepmin_smpswaittimemin_shift) | | ||
| 80 | + (vdd->vp_rt_data.vstepmin_stepmin << | ||
| 81 | + vp->common->vstepmin_stepmin_shift)); | ||
| 82 | voltdm->write(vp_val, vp->vstepmin); | ||
| 83 | |||
| 84 | vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << | ||
| 85 | - vp->common->vstepmax_smpswaittimemax_shift) | | ||
| 86 | - (vdd->vp_rt_data.vstepmax_stepmax << | ||
| 87 | - vp->common->vstepmax_stepmax_shift)); | ||
| 88 | + vp->common->vstepmax_smpswaittimemax_shift) | | ||
| 89 | + (vdd->vp_rt_data.vstepmax_stepmax << | ||
| 90 | + vp->common->vstepmax_stepmax_shift)); | ||
| 91 | voltdm->write(vp_val, vp->vstepmax); | ||
| 92 | |||
| 93 | vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << | ||
| 94 | - vp->common->vlimitto_vddmax_shift) | | ||
| 95 | - (vdd->vp_rt_data.vlimitto_vddmin << | ||
| 96 | - vp->common->vlimitto_vddmin_shift) | | ||
| 97 | - (vdd->vp_rt_data.vlimitto_timeout << | ||
| 98 | - vp->common->vlimitto_timeout_shift)); | ||
| 99 | + vp->common->vlimitto_vddmax_shift) | | ||
| 100 | + (vdd->vp_rt_data.vlimitto_vddmin << | ||
| 101 | + vp->common->vlimitto_vddmin_shift) | | ||
| 102 | + (vdd->vp_rt_data.vlimitto_timeout << | ||
| 103 | + vp->common->vlimitto_timeout_shift)); | ||
| 104 | voltdm->write(vp_val, vp->vlimitto); | ||
| 105 | } | ||
| 106 | |||
| 107 | @@ -121,7 +120,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 108 | vp->common->vpconfig_forceupdate | | ||
| 109 | vp->common->vpconfig_initvoltage_mask); | ||
| 110 | vpconfig |= ((target_vsel << | ||
| 111 | - vp->common->vpconfig_initvoltage_shift)); | ||
| 112 | + __ffs(vp->common->vpconfig_initvoltage_mask))); | ||
| 113 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 114 | |||
| 115 | /* Trigger initVDD value copy to voltage processor */ | ||
| 116 | diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h | ||
| 117 | index 1d63960..2afe11d 100644 | ||
| 118 | --- a/arch/arm/mach-omap2/vp.h | ||
| 119 | +++ b/arch/arm/mach-omap2/vp.h | ||
| 120 | @@ -46,37 +46,32 @@ struct omap_vp_ops { | ||
| 121 | |||
| 122 | /** | ||
| 123 | * struct omap_vp_common - register data common to all VDDs | ||
| 124 | + * @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the PRM_VP*_CONFIG reg | ||
| 125 | * @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg | ||
| 126 | * @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg | ||
| 127 | - * @vpconfig_timeouten_mask: TIMEOUT bitmask in the PRM_VP*_CONFIG reg | ||
| 128 | + * @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg | ||
| 129 | * @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg | ||
| 130 | * @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg | ||
| 131 | * @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg | ||
| 132 | * @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg | ||
| 133 | * @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg | ||
| 134 | * @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg | ||
| 135 | - * @vpconfig_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg | ||
| 136 | - * @vpconfig_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg | ||
| 137 | - * @vpconfig_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg | ||
| 138 | - * @vpconfig_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg | ||
| 139 | - * @vpconfig_vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg | ||
| 140 | - * @vpconfig_vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg | ||
| 141 | - * @vpconfig_vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg | ||
| 142 | - * | ||
| 143 | - * XXX It it not necessary to have both a mask and a shift for the same | ||
| 144 | - * bitfield - remove one | ||
| 145 | - * XXX Many of these fields are wrongly named -- e.g., vpconfig_smps* -- fix! | ||
| 146 | + * @vstepmin_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg | ||
| 147 | + * @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg | ||
| 148 | + * @vstepmax_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg | ||
| 149 | + * @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg | ||
| 150 | + * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg | ||
| 151 | + * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg | ||
| 152 | + * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg | ||
| 153 | */ | ||
| 154 | struct omap_vp_common { | ||
| 155 | + u32 vpconfig_erroroffset_mask; | ||
| 156 | u32 vpconfig_errorgain_mask; | ||
| 157 | u32 vpconfig_initvoltage_mask; | ||
| 158 | - u32 vpconfig_timeouten; | ||
| 159 | - u32 vpconfig_initvdd; | ||
| 160 | - u32 vpconfig_forceupdate; | ||
| 161 | - u32 vpconfig_vpenable; | ||
| 162 | - u8 vpconfig_erroroffset_shift; | ||
| 163 | - u8 vpconfig_errorgain_shift; | ||
| 164 | - u8 vpconfig_initvoltage_shift; | ||
| 165 | + u8 vpconfig_timeouten; | ||
| 166 | + u8 vpconfig_initvdd; | ||
| 167 | + u8 vpconfig_forceupdate; | ||
| 168 | + u8 vpconfig_vpenable; | ||
| 169 | u8 vstepmin_stepmin_shift; | ||
| 170 | u8 vstepmin_smpswaittimemin_shift; | ||
| 171 | u8 vstepmax_stepmax_shift; | ||
| 172 | @@ -127,7 +122,6 @@ struct omap_vp_instance { | ||
| 173 | * XXX Is this structure really needed? Why not just program the | ||
| 174 | * device directly? They are in PRM space, therefore in the WKUP | ||
| 175 | * powerdomain, so register contents should not be lost in off-mode. | ||
| 176 | - * XXX Some of these fields are incorrectly named, e.g., vstep* | ||
| 177 | */ | ||
| 178 | struct omap_vp_runtime_data { | ||
| 179 | u32 vpconfig_erroroffset; | ||
| 180 | diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 181 | index 79c3df9..d429c44 100644 | ||
| 182 | --- a/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 183 | +++ b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 184 | @@ -37,10 +37,8 @@ static const struct omap_vp_ops omap3_vp_ops = { | ||
| 185 | * XXX This stuff presumably belongs in the vp3xxx.c or vp.c file. | ||
| 186 | */ | ||
| 187 | static const struct omap_vp_common omap3_vp_common = { | ||
| 188 | - .vpconfig_erroroffset_shift = OMAP3430_ERROROFFSET_SHIFT, | ||
| 189 | + .vpconfig_erroroffset_mask = OMAP3430_ERROROFFSET_MASK, | ||
| 190 | .vpconfig_errorgain_mask = OMAP3430_ERRORGAIN_MASK, | ||
| 191 | - .vpconfig_errorgain_shift = OMAP3430_ERRORGAIN_SHIFT, | ||
| 192 | - .vpconfig_initvoltage_shift = OMAP3430_INITVOLTAGE_SHIFT, | ||
| 193 | .vpconfig_initvoltage_mask = OMAP3430_INITVOLTAGE_MASK, | ||
| 194 | .vpconfig_timeouten = OMAP3430_TIMEOUTEN_MASK, | ||
| 195 | .vpconfig_initvdd = OMAP3430_INITVDD_MASK, | ||
| 196 | diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 197 | index 8f75cd9..0daf2a4 100644 | ||
| 198 | --- a/arch/arm/mach-omap2/vp44xx_data.c | ||
| 199 | +++ b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 200 | @@ -37,10 +37,8 @@ static const struct omap_vp_ops omap4_vp_ops = { | ||
| 201 | * XXX This stuff presumably belongs in the vp44xx.c or vp.c file. | ||
| 202 | */ | ||
| 203 | static const struct omap_vp_common omap4_vp_common = { | ||
| 204 | - .vpconfig_erroroffset_shift = OMAP4430_ERROROFFSET_SHIFT, | ||
| 205 | + .vpconfig_erroroffset_mask = OMAP4430_ERROROFFSET_MASK, | ||
| 206 | .vpconfig_errorgain_mask = OMAP4430_ERRORGAIN_MASK, | ||
| 207 | - .vpconfig_errorgain_shift = OMAP4430_ERRORGAIN_SHIFT, | ||
| 208 | - .vpconfig_initvoltage_shift = OMAP4430_INITVOLTAGE_SHIFT, | ||
| 209 | .vpconfig_initvoltage_mask = OMAP4430_INITVOLTAGE_MASK, | ||
| 210 | .vpconfig_timeouten = OMAP4430_TIMEOUTEN_MASK, | ||
| 211 | .vpconfig_initvdd = OMAP4430_INITVDD_MASK, | ||
| 212 | -- | ||
| 213 | 1.7.2.5 | ||
| 214 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0131-OMAP3-VP-move-SoC-specific-sys-clock-rate-retreival-.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0131-OMAP3-VP-move-SoC-specific-sys-clock-rate-retreival-.patch deleted file mode 100644 index 2643c6bb..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0131-OMAP3-VP-move-SoC-specific-sys-clock-rate-retreival-.patch +++ /dev/null | |||
| @@ -1,184 +0,0 @@ | |||
| 1 | From d0c5c4d43250d9e7aad920ce3e7f5e7d5061be47 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 4 Apr 2011 17:22:28 -0700 | ||
| 4 | Subject: [PATCH 131/149] OMAP3+: VP: move SoC-specific sys clock rate retreival late init | ||
| 5 | |||
| 6 | Add sys clock name and rate to struct voltage domain. SoC specific | ||
| 7 | voltagedomain init code initializes sys clock name. After clock | ||
| 8 | framework is initialized, voltage late init will then use use the | ||
| 9 | sys_clk rate to calculate the various timing that depend on that rate. | ||
| 10 | |||
| 11 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/voltage.c | 47 +++++++++---------------- | ||
| 14 | arch/arm/mach-omap2/voltage.h | 5 +++ | ||
| 15 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 8 ++++ | ||
| 16 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 8 ++++ | ||
| 17 | 4 files changed, 38 insertions(+), 30 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 20 | index 5b16fd1..533ea38 100644 | ||
| 21 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 22 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 23 | @@ -21,10 +21,10 @@ | ||
| 24 | |||
| 25 | #include <linux/delay.h> | ||
| 26 | #include <linux/io.h> | ||
| 27 | -#include <linux/clk.h> | ||
| 28 | #include <linux/err.h> | ||
| 29 | #include <linux/debugfs.h> | ||
| 30 | #include <linux/slab.h> | ||
| 31 | +#include <linux/clk.h> | ||
| 32 | |||
| 33 | #include <plat/common.h> | ||
| 34 | |||
| 35 | @@ -45,36 +45,12 @@ static LIST_HEAD(voltdm_list); | ||
| 36 | |||
| 37 | static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 38 | { | ||
| 39 | - char *sys_ck_name; | ||
| 40 | - struct clk *sys_ck; | ||
| 41 | - u32 sys_clk_speed, timeout_val, waittime; | ||
| 42 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 43 | + u32 sys_clk_rate, timeout_val, waittime; | ||
| 44 | |||
| 45 | - /* | ||
| 46 | - * XXX Clockfw should handle this, or this should be in a | ||
| 47 | - * struct record | ||
| 48 | - */ | ||
| 49 | - if (cpu_is_omap24xx() || cpu_is_omap34xx()) | ||
| 50 | - sys_ck_name = "sys_ck"; | ||
| 51 | - else if (cpu_is_omap44xx()) | ||
| 52 | - sys_ck_name = "sys_clkin_ck"; | ||
| 53 | - else | ||
| 54 | - return -EINVAL; | ||
| 55 | - | ||
| 56 | - /* | ||
| 57 | - * Sys clk rate is require to calculate vp timeout value and | ||
| 58 | - * smpswaittimemin and smpswaittimemax. | ||
| 59 | - */ | ||
| 60 | - sys_ck = clk_get(NULL, sys_ck_name); | ||
| 61 | - if (IS_ERR(sys_ck)) { | ||
| 62 | - pr_warning("%s: Could not get the sys clk to calculate" | ||
| 63 | - "various vdd_%s params\n", __func__, voltdm->name); | ||
| 64 | - return -EINVAL; | ||
| 65 | - } | ||
| 66 | - sys_clk_speed = clk_get_rate(sys_ck); | ||
| 67 | - clk_put(sys_ck); | ||
| 68 | /* Divide to avoid overflow */ | ||
| 69 | - sys_clk_speed /= 1000; | ||
| 70 | + sys_clk_rate = voltdm->sys_clk.rate / 1000; | ||
| 71 | + WARN_ON(!sys_clk_rate); | ||
| 72 | |||
| 73 | /* Generic voltage parameters */ | ||
| 74 | vdd->volt_scale = omap_vp_forceupdate_scale; | ||
| 75 | @@ -84,13 +60,13 @@ static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 76 | (voltdm->pmic->vp_erroroffset << | ||
| 77 | __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); | ||
| 78 | |||
| 79 | - timeout_val = (sys_clk_speed * voltdm->pmic->vp_timeout_us) / 1000; | ||
| 80 | + timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; | ||
| 81 | vdd->vp_rt_data.vlimitto_timeout = timeout_val; | ||
| 82 | vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; | ||
| 83 | vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; | ||
| 84 | |||
| 85 | waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * | ||
| 86 | - sys_clk_speed) / 1000; | ||
| 87 | + sys_clk_rate) / 1000; | ||
| 88 | vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; | ||
| 89 | vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; | ||
| 90 | vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; | ||
| 91 | @@ -346,9 +322,20 @@ int __init omap_voltage_late_init(void) | ||
| 92 | } | ||
| 93 | |||
| 94 | list_for_each_entry(voltdm, &voltdm_list, node) { | ||
| 95 | + struct clk *sys_ck; | ||
| 96 | + | ||
| 97 | if (!voltdm->scalable) | ||
| 98 | continue; | ||
| 99 | |||
| 100 | + sys_ck = clk_get(NULL, voltdm->sys_clk.name); | ||
| 101 | + if (IS_ERR(sys_ck)) { | ||
| 102 | + pr_warning("%s: Could not get sys clk.\n", __func__); | ||
| 103 | + return -EINVAL; | ||
| 104 | + } | ||
| 105 | + voltdm->sys_clk.rate = clk_get_rate(sys_ck); | ||
| 106 | + WARN_ON(!voltdm->sys_clk.rate); | ||
| 107 | + clk_put(sys_ck); | ||
| 108 | + | ||
| 109 | if (voltdm->vc) { | ||
| 110 | voltdm->vdd->volt_scale = omap_vc_bypass_scale; | ||
| 111 | omap_vc_init_channel(voltdm); | ||
| 112 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 113 | index 5261703..d73c956 100644 | ||
| 114 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 115 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 116 | @@ -76,6 +76,11 @@ struct voltagedomain { | ||
| 117 | void (*write) (u32 val, u8 offset); | ||
| 118 | u32 (*rmw)(u32 mask, u32 bits, u8 offset); | ||
| 119 | |||
| 120 | + union { | ||
| 121 | + const char *name; | ||
| 122 | + u32 rate; | ||
| 123 | + } sys_clk; | ||
| 124 | + | ||
| 125 | struct omap_vdd_info *vdd; | ||
| 126 | }; | ||
| 127 | |||
| 128 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 129 | index 4db2c6c..e7a0be1 100644 | ||
| 130 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 131 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 132 | @@ -82,8 +82,13 @@ static struct voltagedomain *voltagedomains_omap3[] __initdata = { | ||
| 133 | NULL, | ||
| 134 | }; | ||
| 135 | |||
| 136 | +static const char *sys_clk_name __initdata = "sys_ck"; | ||
| 137 | + | ||
| 138 | void __init omap3xxx_voltagedomains_init(void) | ||
| 139 | { | ||
| 140 | + struct voltagedomain *voltdm; | ||
| 141 | + int i; | ||
| 142 | + | ||
| 143 | /* | ||
| 144 | * XXX Will depend on the process, validation, and binning | ||
| 145 | * for the currently-running IC | ||
| 146 | @@ -96,5 +101,8 @@ void __init omap3xxx_voltagedomains_init(void) | ||
| 147 | omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; | ||
| 148 | } | ||
| 149 | |||
| 150 | + for (i = 0; voltdm = voltagedomains_omap3[i], voltdm; i++) | ||
| 151 | + voltdm->sys_clk.name = sys_clk_name; | ||
| 152 | + | ||
| 153 | voltdm_init(voltagedomains_omap3); | ||
| 154 | }; | ||
| 155 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 156 | index 3e7cb4e..9c20fbb 100644 | ||
| 157 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 158 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 159 | @@ -98,8 +98,13 @@ static struct voltagedomain *voltagedomains_omap4[] __initdata = { | ||
| 160 | NULL, | ||
| 161 | }; | ||
| 162 | |||
| 163 | +static const char *sys_clk_name __initdata = "sys_clkin_ck"; | ||
| 164 | + | ||
| 165 | void __init omap44xx_voltagedomains_init(void) | ||
| 166 | { | ||
| 167 | + struct voltagedomain *voltdm; | ||
| 168 | + int i; | ||
| 169 | + | ||
| 170 | /* | ||
| 171 | * XXX Will depend on the process, validation, and binning | ||
| 172 | * for the currently-running IC | ||
| 173 | @@ -108,5 +113,8 @@ void __init omap44xx_voltagedomains_init(void) | ||
| 174 | omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; | ||
| 175 | omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; | ||
| 176 | |||
| 177 | + for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) | ||
| 178 | + voltdm->sys_clk.name = sys_clk_name; | ||
| 179 | + | ||
| 180 | voltdm_init(voltagedomains_omap4); | ||
| 181 | }; | ||
| 182 | -- | ||
| 183 | 1.7.2.5 | ||
| 184 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0132-OMAP3-VP-move-timing-calculation-config-into-VP-init.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0132-OMAP3-VP-move-timing-calculation-config-into-VP-init.patch deleted file mode 100644 index 23b4a313..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0132-OMAP3-VP-move-timing-calculation-config-into-VP-init.patch +++ /dev/null | |||
| @@ -1,94 +0,0 @@ | |||
| 1 | From 505468e0ec50f01f1bf37003096d7ae73deb491d Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Thu, 14 Jul 2011 11:10:27 -0700 | ||
| 4 | Subject: [PATCH 132/149] OMAP3+: VP: move timing calculation/config into VP init | ||
| 5 | |||
| 6 | Move VP timing calcluation (based on sys clock) and register programming | ||
| 7 | into VP init. | ||
| 8 | |||
| 9 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 10 | --- | ||
| 11 | arch/arm/mach-omap2/voltage.c | 22 ---------------------- | ||
| 12 | arch/arm/mach-omap2/vp.c | 23 ++++++++++++++++++++++- | ||
| 13 | 2 files changed, 22 insertions(+), 23 deletions(-) | ||
| 14 | |||
| 15 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 16 | index 533ea38..4a15668 100644 | ||
| 17 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 18 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 19 | @@ -46,31 +46,9 @@ static LIST_HEAD(voltdm_list); | ||
| 20 | static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 21 | { | ||
| 22 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 23 | - u32 sys_clk_rate, timeout_val, waittime; | ||
| 24 | - | ||
| 25 | - /* Divide to avoid overflow */ | ||
| 26 | - sys_clk_rate = voltdm->sys_clk.rate / 1000; | ||
| 27 | - WARN_ON(!sys_clk_rate); | ||
| 28 | |||
| 29 | /* Generic voltage parameters */ | ||
| 30 | vdd->volt_scale = omap_vp_forceupdate_scale; | ||
| 31 | - voltdm->vp->enabled = false; | ||
| 32 | - | ||
| 33 | - vdd->vp_rt_data.vpconfig_erroroffset = | ||
| 34 | - (voltdm->pmic->vp_erroroffset << | ||
| 35 | - __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); | ||
| 36 | - | ||
| 37 | - timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; | ||
| 38 | - vdd->vp_rt_data.vlimitto_timeout = timeout_val; | ||
| 39 | - vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; | ||
| 40 | - vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; | ||
| 41 | - | ||
| 42 | - waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * | ||
| 43 | - sys_clk_rate) / 1000; | ||
| 44 | - vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; | ||
| 45 | - vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; | ||
| 46 | - vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; | ||
| 47 | - vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; | ||
| 48 | |||
| 49 | return 0; | ||
| 50 | } | ||
| 51 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 52 | index 297d094..ea61a47 100644 | ||
| 53 | --- a/arch/arm/mach-omap2/vp.c | ||
| 54 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 55 | @@ -50,7 +50,7 @@ void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 56 | { | ||
| 57 | struct omap_vp_instance *vp = voltdm->vp; | ||
| 58 | struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 59 | - u32 vp_val; | ||
| 60 | + u32 vp_val, sys_clk_rate, timeout_val, waittime; | ||
| 61 | |||
| 62 | if (!voltdm->read || !voltdm->write) { | ||
| 63 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 64 | @@ -58,6 +58,27 @@ void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 65 | return; | ||
| 66 | } | ||
| 67 | |||
| 68 | + vp->enabled = false; | ||
| 69 | + | ||
| 70 | + /* Divide to avoid overflow */ | ||
| 71 | + sys_clk_rate = voltdm->sys_clk.rate / 1000; | ||
| 72 | + | ||
| 73 | + vdd->vp_rt_data.vpconfig_erroroffset = | ||
| 74 | + (voltdm->pmic->vp_erroroffset << | ||
| 75 | + __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); | ||
| 76 | + | ||
| 77 | + timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; | ||
| 78 | + vdd->vp_rt_data.vlimitto_timeout = timeout_val; | ||
| 79 | + vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; | ||
| 80 | + vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; | ||
| 81 | + | ||
| 82 | + waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * | ||
| 83 | + sys_clk_rate) / 1000; | ||
| 84 | + vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; | ||
| 85 | + vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; | ||
| 86 | + vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; | ||
| 87 | + vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; | ||
| 88 | + | ||
| 89 | vp_val = vdd->vp_rt_data.vpconfig_erroroffset | | ||
| 90 | (vdd->vp_rt_data.vpconfig_errorgain << | ||
| 91 | __ffs(vp->common->vpconfig_errorgain_mask)) | | ||
| 92 | -- | ||
| 93 | 1.7.2.5 | ||
| 94 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0133-OMAP3-VP-create-VP-helper-function-for-updating-erro.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0133-OMAP3-VP-create-VP-helper-function-for-updating-erro.patch deleted file mode 100644 index 2c1ce2ce..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0133-OMAP3-VP-create-VP-helper-function-for-updating-erro.patch +++ /dev/null | |||
| @@ -1,107 +0,0 @@ | |||
| 1 | From 0a3d1d2ea5a37d1afe583dd0aee310a979d0445f Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Tue, 5 Apr 2011 15:15:31 -0700 | ||
| 4 | Subject: [PATCH 133/149] OMAP3+: VP: create VP helper function for updating error gain | ||
| 5 | |||
| 6 | Create new helper function in VP layer for updating VP error gain. | ||
| 7 | Currently used during pre-scale for VP force update and VC bypass. | ||
| 8 | |||
| 9 | TODO: determine if this can be removed from the pre-scale path and | ||
| 10 | moved to VP enable path. | ||
| 11 | |||
| 12 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/vc.c | 19 ++----------------- | ||
| 15 | arch/arm/mach-omap2/vp.c | 19 +++++++++++++++++++ | ||
| 16 | arch/arm/mach-omap2/vp.h | 2 ++ | ||
| 17 | 3 files changed, 23 insertions(+), 17 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 20 | index f64c826..e855559 100644 | ||
| 21 | --- a/arch/arm/mach-omap2/vc.c | ||
| 22 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 23 | @@ -96,9 +96,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 24 | u8 *target_vsel, u8 *current_vsel) | ||
| 25 | { | ||
| 26 | struct omap_vc_channel *vc = voltdm->vc; | ||
| 27 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 28 | - struct omap_volt_data *volt_data; | ||
| 29 | - u32 vc_cmdval, vp_errgain_val; | ||
| 30 | + u32 vc_cmdval; | ||
| 31 | |||
| 32 | /* Check if sufficient pmic info is available for this vdd */ | ||
| 33 | if (!voltdm->pmic) { | ||
| 34 | @@ -120,11 +118,6 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 35 | return -EINVAL; | ||
| 36 | } | ||
| 37 | |||
| 38 | - /* Get volt_data corresponding to target_volt */ | ||
| 39 | - volt_data = omap_voltage_get_voltdata(voltdm, target_volt); | ||
| 40 | - if (IS_ERR(volt_data)) | ||
| 41 | - volt_data = NULL; | ||
| 42 | - | ||
| 43 | *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); | ||
| 44 | *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); | ||
| 45 | |||
| 46 | @@ -134,15 +127,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 47 | vc_cmdval |= (*target_vsel << vc->common->cmd_on_shift); | ||
| 48 | voltdm->write(vc_cmdval, vc->cmdval_reg); | ||
| 49 | |||
| 50 | - /* Setting vp errorgain based on the voltage */ | ||
| 51 | - if (volt_data) { | ||
| 52 | - vp_errgain_val = voltdm->read(voltdm->vp->vpconfig); | ||
| 53 | - vdd->vp_rt_data.vpconfig_errorgain = volt_data->vp_errgain; | ||
| 54 | - vp_errgain_val &= voltdm->vp->common->vpconfig_errorgain_mask; | ||
| 55 | - vp_errgain_val |= vdd->vp_rt_data.vpconfig_errorgain << | ||
| 56 | - __ffs(voltdm->vp->common->vpconfig_errorgain_mask); | ||
| 57 | - voltdm->write(vp_errgain_val, voltdm->vp->vpconfig); | ||
| 58 | - } | ||
| 59 | + omap_vp_update_errorgain(voltdm, target_volt); | ||
| 60 | |||
| 61 | return 0; | ||
| 62 | } | ||
| 63 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 64 | index ea61a47..f68a6db 100644 | ||
| 65 | --- a/arch/arm/mach-omap2/vp.c | ||
| 66 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 67 | @@ -106,6 +106,25 @@ void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 68 | voltdm->write(vp_val, vp->vlimitto); | ||
| 69 | } | ||
| 70 | |||
| 71 | +int omap_vp_update_errorgain(struct voltagedomain *voltdm, | ||
| 72 | + unsigned long target_volt) | ||
| 73 | +{ | ||
| 74 | + struct omap_volt_data *volt_data; | ||
| 75 | + | ||
| 76 | + /* Get volt_data corresponding to target_volt */ | ||
| 77 | + volt_data = omap_voltage_get_voltdata(voltdm, target_volt); | ||
| 78 | + if (IS_ERR(volt_data)) | ||
| 79 | + return -EINVAL; | ||
| 80 | + | ||
| 81 | + /* Setting vp errorgain based on the voltage */ | ||
| 82 | + voltdm->rmw(voltdm->vp->common->vpconfig_errorgain_mask, | ||
| 83 | + volt_data->vp_errgain << | ||
| 84 | + __ffs(voltdm->vp->common->vpconfig_errorgain_mask), | ||
| 85 | + voltdm->vp->vpconfig); | ||
| 86 | + | ||
| 87 | + return 0; | ||
| 88 | +} | ||
| 89 | + | ||
| 90 | /* VP force update method of voltage scaling */ | ||
| 91 | int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 92 | unsigned long target_volt) | ||
| 93 | diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h | ||
| 94 | index 2afe11d..71ac738 100644 | ||
| 95 | --- a/arch/arm/mach-omap2/vp.h | ||
| 96 | +++ b/arch/arm/mach-omap2/vp.h | ||
| 97 | @@ -148,5 +148,7 @@ void omap_vp_disable(struct voltagedomain *voltdm); | ||
| 98 | unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); | ||
| 99 | int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 100 | unsigned long target_volt); | ||
| 101 | +int omap_vp_update_errorgain(struct voltagedomain *voltdm, | ||
| 102 | + unsigned long target_volt); | ||
| 103 | |||
| 104 | #endif | ||
| 105 | -- | ||
| 106 | 1.7.2.5 | ||
| 107 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0134-OMAP3-VP-remove-omap_vp_runtime_data.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0134-OMAP3-VP-remove-omap_vp_runtime_data.patch deleted file mode 100644 index 23089958..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0134-OMAP3-VP-remove-omap_vp_runtime_data.patch +++ /dev/null | |||
| @@ -1,170 +0,0 @@ | |||
| 1 | From 7b7d6f216a49287479af9526b888df5e6325458b Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 4 Apr 2011 17:58:21 -0700 | ||
| 4 | Subject: [PATCH 134/149] OMAP3+: VP: remove omap_vp_runtime_data | ||
| 5 | |||
| 6 | Remove the "runtime" VP data in favor of direct programming of VP registers. | ||
| 7 | The VP is in the PRM, which is in the wakeup powerdomain, so there is no | ||
| 8 | need to keep the state dynamically. | ||
| 9 | |||
| 10 | Fixes to original version from Nishanth Menon <nm@ti.com> | ||
| 11 | |||
| 12 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/voltage.h | 2 - | ||
| 15 | arch/arm/mach-omap2/vp.c | 70 ++++++++++++++++++----------------------- | ||
| 16 | arch/arm/mach-omap2/vp.h | 28 ---------------- | ||
| 17 | 3 files changed, 31 insertions(+), 69 deletions(-) | ||
| 18 | |||
| 19 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 20 | index d73c956..5235eec 100644 | ||
| 21 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 22 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 23 | @@ -140,13 +140,11 @@ struct omap_voltdm_pmic { | ||
| 24 | * | ||
| 25 | * @volt_data : voltage table having the distinct voltages supported | ||
| 26 | * by the domain and other associated per voltage data. | ||
| 27 | - * @vp_rt_data : VP data derived at runtime, not predefined | ||
| 28 | * @curr_volt : current voltage for this vdd. | ||
| 29 | * @volt_scale : API to scale the voltage of the vdd. | ||
| 30 | */ | ||
| 31 | struct omap_vdd_info { | ||
| 32 | struct omap_volt_data *volt_data; | ||
| 33 | - struct omap_vp_runtime_data vp_rt_data; | ||
| 34 | u32 curr_volt; | ||
| 35 | |||
| 36 | int (*volt_scale) (struct voltagedomain *voltdm, | ||
| 37 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 38 | index f68a6db..e7d38f6 100644 | ||
| 39 | --- a/arch/arm/mach-omap2/vp.c | ||
| 40 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 41 | @@ -49,8 +49,8 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 42 | void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 43 | { | ||
| 44 | struct omap_vp_instance *vp = voltdm->vp; | ||
| 45 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 46 | - u32 vp_val, sys_clk_rate, timeout_val, waittime; | ||
| 47 | + u32 val, sys_clk_rate, timeout, waittime; | ||
| 48 | + u32 vddmin, vddmax, vstepmin, vstepmax; | ||
| 49 | |||
| 50 | if (!voltdm->read || !voltdm->write) { | ||
| 51 | pr_err("%s: No read/write API for accessing vdd_%s regs\n", | ||
| 52 | @@ -63,47 +63,39 @@ void __init omap_vp_init(struct voltagedomain *voltdm) | ||
| 53 | /* Divide to avoid overflow */ | ||
| 54 | sys_clk_rate = voltdm->sys_clk.rate / 1000; | ||
| 55 | |||
| 56 | - vdd->vp_rt_data.vpconfig_erroroffset = | ||
| 57 | - (voltdm->pmic->vp_erroroffset << | ||
| 58 | - __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)); | ||
| 59 | - | ||
| 60 | - timeout_val = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; | ||
| 61 | - vdd->vp_rt_data.vlimitto_timeout = timeout_val; | ||
| 62 | - vdd->vp_rt_data.vlimitto_vddmin = voltdm->pmic->vp_vddmin; | ||
| 63 | - vdd->vp_rt_data.vlimitto_vddmax = voltdm->pmic->vp_vddmax; | ||
| 64 | + timeout = (sys_clk_rate * voltdm->pmic->vp_timeout_us) / 1000; | ||
| 65 | + vddmin = voltdm->pmic->vp_vddmin; | ||
| 66 | + vddmax = voltdm->pmic->vp_vddmax; | ||
| 67 | |||
| 68 | waittime = ((voltdm->pmic->step_size / voltdm->pmic->slew_rate) * | ||
| 69 | sys_clk_rate) / 1000; | ||
| 70 | - vdd->vp_rt_data.vstepmin_smpswaittimemin = waittime; | ||
| 71 | - vdd->vp_rt_data.vstepmax_smpswaittimemax = waittime; | ||
| 72 | - vdd->vp_rt_data.vstepmin_stepmin = voltdm->pmic->vp_vstepmin; | ||
| 73 | - vdd->vp_rt_data.vstepmax_stepmax = voltdm->pmic->vp_vstepmax; | ||
| 74 | - | ||
| 75 | - vp_val = vdd->vp_rt_data.vpconfig_erroroffset | | ||
| 76 | - (vdd->vp_rt_data.vpconfig_errorgain << | ||
| 77 | - __ffs(vp->common->vpconfig_errorgain_mask)) | | ||
| 78 | + vstepmin = voltdm->pmic->vp_vstepmin; | ||
| 79 | + vstepmax = voltdm->pmic->vp_vstepmax; | ||
| 80 | + | ||
| 81 | + /* | ||
| 82 | + * VP_CONFIG: error gain is not set here, it will be updated | ||
| 83 | + * on each scale, based on OPP. | ||
| 84 | + */ | ||
| 85 | + val = (voltdm->pmic->vp_erroroffset << | ||
| 86 | + __ffs(voltdm->vp->common->vpconfig_erroroffset_mask)) | | ||
| 87 | vp->common->vpconfig_timeouten; | ||
| 88 | - voltdm->write(vp_val, vp->vpconfig); | ||
| 89 | - | ||
| 90 | - vp_val = ((vdd->vp_rt_data.vstepmin_smpswaittimemin << | ||
| 91 | - vp->common->vstepmin_smpswaittimemin_shift) | | ||
| 92 | - (vdd->vp_rt_data.vstepmin_stepmin << | ||
| 93 | - vp->common->vstepmin_stepmin_shift)); | ||
| 94 | - voltdm->write(vp_val, vp->vstepmin); | ||
| 95 | - | ||
| 96 | - vp_val = ((vdd->vp_rt_data.vstepmax_smpswaittimemax << | ||
| 97 | - vp->common->vstepmax_smpswaittimemax_shift) | | ||
| 98 | - (vdd->vp_rt_data.vstepmax_stepmax << | ||
| 99 | - vp->common->vstepmax_stepmax_shift)); | ||
| 100 | - voltdm->write(vp_val, vp->vstepmax); | ||
| 101 | - | ||
| 102 | - vp_val = ((vdd->vp_rt_data.vlimitto_vddmax << | ||
| 103 | - vp->common->vlimitto_vddmax_shift) | | ||
| 104 | - (vdd->vp_rt_data.vlimitto_vddmin << | ||
| 105 | - vp->common->vlimitto_vddmin_shift) | | ||
| 106 | - (vdd->vp_rt_data.vlimitto_timeout << | ||
| 107 | - vp->common->vlimitto_timeout_shift)); | ||
| 108 | - voltdm->write(vp_val, vp->vlimitto); | ||
| 109 | + voltdm->write(val, vp->vpconfig); | ||
| 110 | + | ||
| 111 | + /* VSTEPMIN */ | ||
| 112 | + val = (waittime << vp->common->vstepmin_smpswaittimemin_shift) | | ||
| 113 | + (vstepmin << vp->common->vstepmin_stepmin_shift); | ||
| 114 | + voltdm->write(val, vp->vstepmin); | ||
| 115 | + | ||
| 116 | + /* VSTEPMAX */ | ||
| 117 | + val = (vstepmax << vp->common->vstepmax_stepmax_shift) | | ||
| 118 | + (waittime << vp->common->vstepmax_smpswaittimemax_shift); | ||
| 119 | + voltdm->write(val, vp->vstepmax); | ||
| 120 | + | ||
| 121 | + /* VLIMITTO */ | ||
| 122 | + val = (vddmax << vp->common->vlimitto_vddmax_shift) | | ||
| 123 | + (vddmin << vp->common->vlimitto_vddmin_shift) | | ||
| 124 | + (timeout << vp->common->vlimitto_timeout_shift); | ||
| 125 | + voltdm->write(val, vp->vlimitto); | ||
| 126 | } | ||
| 127 | |||
| 128 | int omap_vp_update_errorgain(struct voltagedomain *voltdm, | ||
| 129 | diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h | ||
| 130 | index 71ac738..0d63267 100644 | ||
| 131 | --- a/arch/arm/mach-omap2/vp.h | ||
| 132 | +++ b/arch/arm/mach-omap2/vp.h | ||
| 133 | @@ -107,34 +107,6 @@ struct omap_vp_instance { | ||
| 134 | bool enabled; | ||
| 135 | }; | ||
| 136 | |||
| 137 | -/** | ||
| 138 | - * struct omap_vp_runtime_data - VP data populated at runtime by code | ||
| 139 | - * @vpconfig_erroroffset: value of ERROROFFSET bitfield in PRM_VP*_CONFIG | ||
| 140 | - * @vpconfig_errorgain: value of ERRORGAIN bitfield in PRM_VP*_CONFIG | ||
| 141 | - * @vstepmin_smpswaittimemin: value of SMPSWAITTIMEMIN bitfield in PRM_VP*_VSTEPMIN | ||
| 142 | - * @vstepmax_smpswaittimemax: value of SMPSWAITTIMEMAX bitfield in PRM_VP*_VSTEPMAX | ||
| 143 | - * @vlimitto_timeout: value of TIMEOUT bitfield in PRM_VP*_VLIMITTO | ||
| 144 | - * @vstepmin_stepmin: value of VSTEPMIN bitfield in PRM_VP*_VSTEPMIN | ||
| 145 | - * @vstepmax_stepmax: value of VSTEPMAX bitfield in PRM_VP*_VSTEPMAX | ||
| 146 | - * @vlimitto_vddmin: value of VDDMIN bitfield in PRM_VP*_VLIMITTO | ||
| 147 | - * @vlimitto_vddmax: value of VDDMAX bitfield in PRM_VP*_VLIMITTO | ||
| 148 | - * | ||
| 149 | - * XXX Is this structure really needed? Why not just program the | ||
| 150 | - * device directly? They are in PRM space, therefore in the WKUP | ||
| 151 | - * powerdomain, so register contents should not be lost in off-mode. | ||
| 152 | - */ | ||
| 153 | -struct omap_vp_runtime_data { | ||
| 154 | - u32 vpconfig_erroroffset; | ||
| 155 | - u16 vpconfig_errorgain; | ||
| 156 | - u16 vstepmin_smpswaittimemin; | ||
| 157 | - u16 vstepmax_smpswaittimemax; | ||
| 158 | - u16 vlimitto_timeout; | ||
| 159 | - u8 vstepmin_stepmin; | ||
| 160 | - u8 vstepmax_stepmax; | ||
| 161 | - u8 vlimitto_vddmin; | ||
| 162 | - u8 vlimitto_vddmax; | ||
| 163 | -}; | ||
| 164 | - | ||
| 165 | extern struct omap_vp_instance omap3_vp_mpu; | ||
| 166 | extern struct omap_vp_instance omap3_vp_core; | ||
| 167 | |||
| 168 | -- | ||
| 169 | 1.7.2.5 | ||
| 170 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0135-OMAP3-VP-move-voltage-scale-function-pointer-into-st.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0135-OMAP3-VP-move-voltage-scale-function-pointer-into-st.patch deleted file mode 100644 index efcc75a2..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0135-OMAP3-VP-move-voltage-scale-function-pointer-into-st.patch +++ /dev/null | |||
| @@ -1,134 +0,0 @@ | |||
| 1 | From 31b07224df028a7913f82c38f13c2bd621613756 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Thu, 14 Jul 2011 11:12:32 -0700 | ||
| 4 | Subject: [PATCH 135/149] OMAP3+: VP: move voltage scale function pointer into struct voltagedomain | ||
| 5 | |||
| 6 | Function pointer used for actual voltage scaling (e.g. VP force update | ||
| 7 | or VC bypass) is moved from omap_vdd_info into struct voltagedomain, | ||
| 8 | resulting in renames s/vdd->volt_scale/voltdm->scale/ | ||
| 9 | |||
| 10 | No functional changes. | ||
| 11 | |||
| 12 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/voltage.c | 24 +++++++----------------- | ||
| 15 | arch/arm/mach-omap2/voltage.h | 8 ++++---- | ||
| 16 | 2 files changed, 11 insertions(+), 21 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 19 | index 4a15668..32f0873 100644 | ||
| 20 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 21 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 22 | @@ -45,10 +45,8 @@ static LIST_HEAD(voltdm_list); | ||
| 23 | |||
| 24 | static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 25 | { | ||
| 26 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 27 | - | ||
| 28 | /* Generic voltage parameters */ | ||
| 29 | - vdd->volt_scale = omap_vp_forceupdate_scale; | ||
| 30 | + voltdm->scale = omap_vp_forceupdate_scale; | ||
| 31 | |||
| 32 | return 0; | ||
| 33 | } | ||
| 34 | @@ -107,22 +105,18 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) | ||
| 35 | int omap_voltage_scale_vdd(struct voltagedomain *voltdm, | ||
| 36 | unsigned long target_volt) | ||
| 37 | { | ||
| 38 | - struct omap_vdd_info *vdd; | ||
| 39 | - | ||
| 40 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 41 | pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 42 | return -EINVAL; | ||
| 43 | } | ||
| 44 | |||
| 45 | - vdd = voltdm->vdd; | ||
| 46 | - | ||
| 47 | - if (!vdd->volt_scale) { | ||
| 48 | + if (!voltdm->scale) { | ||
| 49 | pr_err("%s: No voltage scale API registered for vdd_%s\n", | ||
| 50 | __func__, voltdm->name); | ||
| 51 | return -ENODATA; | ||
| 52 | } | ||
| 53 | |||
| 54 | - return vdd->volt_scale(voltdm, target_volt); | ||
| 55 | + return voltdm->scale(voltdm, target_volt); | ||
| 56 | } | ||
| 57 | |||
| 58 | /** | ||
| 59 | @@ -258,23 +252,19 @@ int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
| 60 | * defined in voltage.h | ||
| 61 | */ | ||
| 62 | void omap_change_voltscale_method(struct voltagedomain *voltdm, | ||
| 63 | - int voltscale_method) | ||
| 64 | + int voltscale_method) | ||
| 65 | { | ||
| 66 | - struct omap_vdd_info *vdd; | ||
| 67 | - | ||
| 68 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 69 | pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 70 | return; | ||
| 71 | } | ||
| 72 | |||
| 73 | - vdd = voltdm->vdd; | ||
| 74 | - | ||
| 75 | switch (voltscale_method) { | ||
| 76 | case VOLTSCALE_VPFORCEUPDATE: | ||
| 77 | - vdd->volt_scale = omap_vp_forceupdate_scale; | ||
| 78 | + voltdm->scale = omap_vp_forceupdate_scale; | ||
| 79 | return; | ||
| 80 | case VOLTSCALE_VCBYPASS: | ||
| 81 | - vdd->volt_scale = omap_vc_bypass_scale; | ||
| 82 | + voltdm->scale = omap_vc_bypass_scale; | ||
| 83 | return; | ||
| 84 | default: | ||
| 85 | pr_warning("%s: Trying to change the method of voltage scaling" | ||
| 86 | @@ -315,7 +305,7 @@ int __init omap_voltage_late_init(void) | ||
| 87 | clk_put(sys_ck); | ||
| 88 | |||
| 89 | if (voltdm->vc) { | ||
| 90 | - voltdm->vdd->volt_scale = omap_vc_bypass_scale; | ||
| 91 | + voltdm->scale = omap_vc_bypass_scale; | ||
| 92 | omap_vc_init_channel(voltdm); | ||
| 93 | } | ||
| 94 | |||
| 95 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 96 | index 5235eec..d2a0c24 100644 | ||
| 97 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 98 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 99 | @@ -60,6 +60,7 @@ struct omap_vfsm_instance { | ||
| 100 | * @pwrdm_node: list_head linking all powerdomains in this voltagedomain | ||
| 101 | * @vdd: to be removed | ||
| 102 | * @pwrdms: powerdomains in this voltagedomain | ||
| 103 | + * @scale: function used to scale the voltage of the voltagedomain | ||
| 104 | */ | ||
| 105 | struct voltagedomain { | ||
| 106 | char *name; | ||
| 107 | @@ -81,6 +82,9 @@ struct voltagedomain { | ||
| 108 | u32 rate; | ||
| 109 | } sys_clk; | ||
| 110 | |||
| 111 | + int (*scale) (struct voltagedomain *voltdm, | ||
| 112 | + unsigned long target_volt); | ||
| 113 | + | ||
| 114 | struct omap_vdd_info *vdd; | ||
| 115 | }; | ||
| 116 | |||
| 117 | @@ -141,14 +145,10 @@ struct omap_voltdm_pmic { | ||
| 118 | * @volt_data : voltage table having the distinct voltages supported | ||
| 119 | * by the domain and other associated per voltage data. | ||
| 120 | * @curr_volt : current voltage for this vdd. | ||
| 121 | - * @volt_scale : API to scale the voltage of the vdd. | ||
| 122 | */ | ||
| 123 | struct omap_vdd_info { | ||
| 124 | struct omap_volt_data *volt_data; | ||
| 125 | u32 curr_volt; | ||
| 126 | - | ||
| 127 | - int (*volt_scale) (struct voltagedomain *voltdm, | ||
| 128 | - unsigned long target_volt); | ||
| 129 | }; | ||
| 130 | |||
| 131 | int omap_voltage_scale_vdd(struct voltagedomain *voltdm, | ||
| 132 | -- | ||
| 133 | 1.7.2.5 | ||
| 134 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0136-OMAP-VP-Explicitly-mask-VPVOLTAGE-field.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0136-OMAP-VP-Explicitly-mask-VPVOLTAGE-field.patch deleted file mode 100644 index 0bb557da..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0136-OMAP-VP-Explicitly-mask-VPVOLTAGE-field.patch +++ /dev/null | |||
| @@ -1,81 +0,0 @@ | |||
| 1 | From 6bf9eba8b75c6e8c895f7be294794846c51cc3f1 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Todd Poynor <toddpoynor@google.com> | ||
| 3 | Date: Fri, 27 May 2011 19:15:59 -0700 | ||
| 4 | Subject: [PATCH 136/149] OMAP: VP: Explicitly mask VPVOLTAGE field | ||
| 5 | |||
| 6 | Reading the VPVOLTAGE field of PRM_VP_*_VOLTAGE registers currently | ||
| 7 | relies on a u32 -> u8 conversion to mask off the FORCEUPDATEWAIT field | ||
| 8 | in the upper bits. Make this explicit using the mask symbol | ||
| 9 | already defined, added as a new field in struct omap_vp_common. | ||
| 10 | |||
| 11 | Signed-off-by: Todd Poynor <toddpoynor@google.com> | ||
| 12 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 13 | --- | ||
| 14 | arch/arm/mach-omap2/vp.c | 3 ++- | ||
| 15 | arch/arm/mach-omap2/vp.h | 2 ++ | ||
| 16 | arch/arm/mach-omap2/vp3xxx_data.c | 2 ++ | ||
| 17 | arch/arm/mach-omap2/vp44xx_data.c | 1 + | ||
| 18 | 4 files changed, 7 insertions(+), 1 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 21 | index e7d38f6..3807620 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/vp.c | ||
| 23 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 24 | @@ -227,7 +227,8 @@ unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) | ||
| 25 | return 0; | ||
| 26 | } | ||
| 27 | |||
| 28 | - curr_vsel = voltdm->read(vp->voltage); | ||
| 29 | + curr_vsel = (voltdm->read(vp->voltage) & vp->common->vpvoltage_mask) | ||
| 30 | + >> __ffs(vp->common->vpvoltage_mask); | ||
| 31 | |||
| 32 | if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) { | ||
| 33 | pr_warning("%s: PMIC function to convert vsel to voltage" | ||
| 34 | diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h | ||
| 35 | index 0d63267..f78752b 100644 | ||
| 36 | --- a/arch/arm/mach-omap2/vp.h | ||
| 37 | +++ b/arch/arm/mach-omap2/vp.h | ||
| 38 | @@ -63,6 +63,7 @@ struct omap_vp_ops { | ||
| 39 | * @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg | ||
| 40 | * @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg | ||
| 41 | * @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg | ||
| 42 | + * @vpvoltage_mask: VPVOLTAGE field mask in PRM_VP*_VOLTAGE reg | ||
| 43 | */ | ||
| 44 | struct omap_vp_common { | ||
| 45 | u32 vpconfig_erroroffset_mask; | ||
| 46 | @@ -79,6 +80,7 @@ struct omap_vp_common { | ||
| 47 | u8 vlimitto_vddmin_shift; | ||
| 48 | u8 vlimitto_vddmax_shift; | ||
| 49 | u8 vlimitto_timeout_shift; | ||
| 50 | + u8 vpvoltage_mask; | ||
| 51 | |||
| 52 | const struct omap_vp_ops *ops; | ||
| 53 | }; | ||
| 54 | diff --git a/arch/arm/mach-omap2/vp3xxx_data.c b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 55 | index d429c44..260c554 100644 | ||
| 56 | --- a/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 57 | +++ b/arch/arm/mach-omap2/vp3xxx_data.c | ||
| 58 | @@ -51,6 +51,8 @@ static const struct omap_vp_common omap3_vp_common = { | ||
| 59 | .vlimitto_vddmin_shift = OMAP3430_VDDMIN_SHIFT, | ||
| 60 | .vlimitto_vddmax_shift = OMAP3430_VDDMAX_SHIFT, | ||
| 61 | .vlimitto_timeout_shift = OMAP3430_TIMEOUT_SHIFT, | ||
| 62 | + .vpvoltage_mask = OMAP3430_VPVOLTAGE_MASK, | ||
| 63 | + | ||
| 64 | .ops = &omap3_vp_ops, | ||
| 65 | }; | ||
| 66 | |||
| 67 | diff --git a/arch/arm/mach-omap2/vp44xx_data.c b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 68 | index 0daf2a4..b4e7704 100644 | ||
| 69 | --- a/arch/arm/mach-omap2/vp44xx_data.c | ||
| 70 | +++ b/arch/arm/mach-omap2/vp44xx_data.c | ||
| 71 | @@ -51,6 +51,7 @@ static const struct omap_vp_common omap4_vp_common = { | ||
| 72 | .vlimitto_vddmin_shift = OMAP4430_VDDMIN_SHIFT, | ||
| 73 | .vlimitto_vddmax_shift = OMAP4430_VDDMAX_SHIFT, | ||
| 74 | .vlimitto_timeout_shift = OMAP4430_TIMEOUT_SHIFT, | ||
| 75 | + .vpvoltage_mask = OMAP4430_VPVOLTAGE_MASK, | ||
| 76 | .ops = &omap4_vp_ops, | ||
| 77 | }; | ||
| 78 | |||
| 79 | -- | ||
| 80 | 1.7.2.5 | ||
| 81 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0137-OMAP3-VP-update_errorgain-return-error-if-VP.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0137-OMAP3-VP-update_errorgain-return-error-if-VP.patch deleted file mode 100644 index b0ca14aa..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0137-OMAP3-VP-update_errorgain-return-error-if-VP.patch +++ /dev/null | |||
| @@ -1,29 +0,0 @@ | |||
| 1 | From abe6084b3aea9f55bb9b9127a0a4c58f915e635e Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 18 Jul 2011 15:31:43 -0700 | ||
| 4 | Subject: [PATCH 137/149] OMAP3+: VP: update_errorgain(): return error if VP | ||
| 5 | |||
| 6 | Add check for valid VP in omap_vp_update_errorgain() | ||
| 7 | |||
| 8 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 9 | --- | ||
| 10 | arch/arm/mach-omap2/vp.c | 3 +++ | ||
| 11 | 1 files changed, 3 insertions(+), 0 deletions(-) | ||
| 12 | |||
| 13 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 14 | index 3807620..29698ac 100644 | ||
| 15 | --- a/arch/arm/mach-omap2/vp.c | ||
| 16 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 17 | @@ -103,6 +103,9 @@ int omap_vp_update_errorgain(struct voltagedomain *voltdm, | ||
| 18 | { | ||
| 19 | struct omap_volt_data *volt_data; | ||
| 20 | |||
| 21 | + if (!voltdm->vp) | ||
| 22 | + return -EINVAL; | ||
| 23 | + | ||
| 24 | /* Get volt_data corresponding to target_volt */ | ||
| 25 | volt_data = omap_voltage_get_voltdata(voltdm, target_volt); | ||
| 26 | if (IS_ERR(volt_data)) | ||
| 27 | -- | ||
| 28 | 1.7.2.5 | ||
| 29 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0138-OMAP3-VP-remove-unused-omap_vp_get_curr_volt.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0138-OMAP3-VP-remove-unused-omap_vp_get_curr_volt.patch deleted file mode 100644 index 57ba0a29..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0138-OMAP3-VP-remove-unused-omap_vp_get_curr_volt.patch +++ /dev/null | |||
| @@ -1,70 +0,0 @@ | |||
| 1 | From 479369a9e78273521a5998af043bcad58ee832f8 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Fri, 15 Jul 2011 16:38:10 -0700 | ||
| 4 | Subject: [PATCH 138/149] OMAP3+: VP: remove unused omap_vp_get_curr_volt() | ||
| 5 | |||
| 6 | --- | ||
| 7 | arch/arm/mach-omap2/vp.c | 34 ---------------------------------- | ||
| 8 | arch/arm/mach-omap2/vp.h | 1 - | ||
| 9 | 2 files changed, 0 insertions(+), 35 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 12 | index 29698ac..24020ea 100644 | ||
| 13 | --- a/arch/arm/mach-omap2/vp.c | ||
| 14 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 15 | @@ -209,40 +209,6 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 16 | } | ||
| 17 | |||
| 18 | /** | ||
| 19 | - * omap_vp_get_curr_volt() - API to get the current vp voltage. | ||
| 20 | - * @voltdm: pointer to the VDD. | ||
| 21 | - * | ||
| 22 | - * This API returns the current voltage for the specified voltage processor | ||
| 23 | - */ | ||
| 24 | -unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm) | ||
| 25 | -{ | ||
| 26 | - struct omap_vp_instance *vp = voltdm->vp; | ||
| 27 | - u8 curr_vsel; | ||
| 28 | - | ||
| 29 | - if (!voltdm || IS_ERR(voltdm)) { | ||
| 30 | - pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 31 | - return 0; | ||
| 32 | - } | ||
| 33 | - | ||
| 34 | - if (!voltdm->read) { | ||
| 35 | - pr_err("%s: No read API for reading vdd_%s regs\n", | ||
| 36 | - __func__, voltdm->name); | ||
| 37 | - return 0; | ||
| 38 | - } | ||
| 39 | - | ||
| 40 | - curr_vsel = (voltdm->read(vp->voltage) & vp->common->vpvoltage_mask) | ||
| 41 | - >> __ffs(vp->common->vpvoltage_mask); | ||
| 42 | - | ||
| 43 | - if (!voltdm->pmic || !voltdm->pmic->vsel_to_uv) { | ||
| 44 | - pr_warning("%s: PMIC function to convert vsel to voltage" | ||
| 45 | - "in uV not registerd\n", __func__); | ||
| 46 | - return 0; | ||
| 47 | - } | ||
| 48 | - | ||
| 49 | - return voltdm->pmic->vsel_to_uv(curr_vsel); | ||
| 50 | -} | ||
| 51 | - | ||
| 52 | -/** | ||
| 53 | * omap_vp_enable() - API to enable a particular VP | ||
| 54 | * @voltdm: pointer to the VDD whose VP is to be enabled. | ||
| 55 | * | ||
| 56 | diff --git a/arch/arm/mach-omap2/vp.h b/arch/arm/mach-omap2/vp.h | ||
| 57 | index f78752b..d9bc4f1 100644 | ||
| 58 | --- a/arch/arm/mach-omap2/vp.h | ||
| 59 | +++ b/arch/arm/mach-omap2/vp.h | ||
| 60 | @@ -119,7 +119,6 @@ extern struct omap_vp_instance omap4_vp_core; | ||
| 61 | void omap_vp_init(struct voltagedomain *voltdm); | ||
| 62 | void omap_vp_enable(struct voltagedomain *voltdm); | ||
| 63 | void omap_vp_disable(struct voltagedomain *voltdm); | ||
| 64 | -unsigned long omap_vp_get_curr_volt(struct voltagedomain *voltdm); | ||
| 65 | int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 66 | unsigned long target_volt); | ||
| 67 | int omap_vp_update_errorgain(struct voltagedomain *voltdm, | ||
| 68 | -- | ||
| 69 | 1.7.2.5 | ||
| 70 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0139-OMAP3-VP-combine-setting-init-voltage-into-common-fu.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0139-OMAP3-VP-combine-setting-init-voltage-into-common-fu.patch deleted file mode 100644 index 484ae55b..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0139-OMAP3-VP-combine-setting-init-voltage-into-common-fu.patch +++ /dev/null | |||
| @@ -1,141 +0,0 @@ | |||
| 1 | From 562b12a6336f94d9e5957c68b7181a9f36931e7a Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Fri, 15 Jul 2011 17:05:48 -0700 | ||
| 4 | Subject: [PATCH 139/149] OMAP3+: VP: combine setting init voltage into common function | ||
| 5 | |||
| 6 | combine VPCONFIG init voltage setup into common function and use from | ||
| 7 | both vp_enable and from vp_forceupdate_scale(). | ||
| 8 | |||
| 9 | NOTE: this patch changes the sequence of when the initVDD bit is | ||
| 10 | cleared. The bit is now cleared immediately after it was written. | ||
| 11 | Since only the rising edge of this bit has any affect according to the | ||
| 12 | TRM, the exact timing of clearing of this bit should not have any | ||
| 13 | effect. | ||
| 14 | |||
| 15 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 16 | --- | ||
| 17 | arch/arm/mach-omap2/vp.c | 58 +++++++++++++++------------------------------- | ||
| 18 | 1 files changed, 19 insertions(+), 39 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/vp.c b/arch/arm/mach-omap2/vp.c | ||
| 21 | index 24020ea..66bd700 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/vp.c | ||
| 23 | +++ b/arch/arm/mach-omap2/vp.c | ||
| 24 | @@ -9,31 +9,18 @@ | ||
| 25 | #include "prm-regbits-44xx.h" | ||
| 26 | #include "prm44xx.h" | ||
| 27 | |||
| 28 | -static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 29 | +static u32 _vp_set_init_voltage(struct voltagedomain *voltdm, u32 volt) | ||
| 30 | { | ||
| 31 | struct omap_vp_instance *vp = voltdm->vp; | ||
| 32 | u32 vpconfig; | ||
| 33 | - unsigned long uvdc; | ||
| 34 | char vsel; | ||
| 35 | |||
| 36 | - uvdc = omap_voltage_get_nom_volt(voltdm); | ||
| 37 | - if (!uvdc) { | ||
| 38 | - pr_warning("%s: unable to find current voltage for vdd_%s\n", | ||
| 39 | - __func__, voltdm->name); | ||
| 40 | - return; | ||
| 41 | - } | ||
| 42 | - | ||
| 43 | - if (!voltdm->pmic || !voltdm->pmic->uv_to_vsel) { | ||
| 44 | - pr_warning("%s: PMIC function to convert voltage in uV to" | ||
| 45 | - " vsel not registered\n", __func__); | ||
| 46 | - return; | ||
| 47 | - } | ||
| 48 | - | ||
| 49 | - vsel = voltdm->pmic->uv_to_vsel(uvdc); | ||
| 50 | + vsel = voltdm->pmic->uv_to_vsel(volt); | ||
| 51 | |||
| 52 | vpconfig = voltdm->read(vp->vpconfig); | ||
| 53 | vpconfig &= ~(vp->common->vpconfig_initvoltage_mask | | ||
| 54 | - vp->common->vpconfig_initvdd); | ||
| 55 | + vp->common->vpconfig_forceupdate | | ||
| 56 | + vp->common->vpconfig_initvdd); | ||
| 57 | vpconfig |= vsel << __ffs(vp->common->vpconfig_initvoltage_mask); | ||
| 58 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 59 | |||
| 60 | @@ -43,6 +30,8 @@ static void vp_latch_vsel(struct voltagedomain *voltdm) | ||
| 61 | |||
| 62 | /* Clear initVDD copy trigger bit */ | ||
| 63 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 64 | + | ||
| 65 | + return vpconfig; | ||
| 66 | } | ||
| 67 | |||
| 68 | /* Generic voltage init functions */ | ||
| 69 | @@ -149,22 +138,11 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 70 | return -ETIMEDOUT; | ||
| 71 | } | ||
| 72 | |||
| 73 | - /* Configure for VP-Force Update */ | ||
| 74 | - vpconfig = voltdm->read(vp->vpconfig); | ||
| 75 | - vpconfig &= ~(vp->common->vpconfig_initvdd | | ||
| 76 | - vp->common->vpconfig_forceupdate | | ||
| 77 | - vp->common->vpconfig_initvoltage_mask); | ||
| 78 | - vpconfig |= ((target_vsel << | ||
| 79 | - __ffs(vp->common->vpconfig_initvoltage_mask))); | ||
| 80 | - voltdm->write(vpconfig, vp->vpconfig); | ||
| 81 | - | ||
| 82 | - /* Trigger initVDD value copy to voltage processor */ | ||
| 83 | - vpconfig |= vp->common->vpconfig_initvdd; | ||
| 84 | - voltdm->write(vpconfig, vp->vpconfig); | ||
| 85 | + vpconfig = _vp_set_init_voltage(voltdm, target_volt); | ||
| 86 | |||
| 87 | /* Force update of voltage */ | ||
| 88 | - vpconfig |= vp->common->vpconfig_forceupdate; | ||
| 89 | - voltdm->write(vpconfig, vp->vpconfig); | ||
| 90 | + voltdm->write(vpconfig | vp->common->vpconfig_forceupdate, | ||
| 91 | + voltdm->vp->vpconfig); | ||
| 92 | |||
| 93 | /* | ||
| 94 | * Wait for TransactionDone. Typical latency is <200us. | ||
| 95 | @@ -197,12 +175,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 96 | "to clear the TRANXDONE status\n", | ||
| 97 | __func__, voltdm->name); | ||
| 98 | |||
| 99 | - vpconfig = voltdm->read(vp->vpconfig); | ||
| 100 | - /* Clear initVDD copy trigger bit */ | ||
| 101 | - vpconfig &= ~vp->common->vpconfig_initvdd; | ||
| 102 | - voltdm->write(vpconfig, vp->vpconfig); | ||
| 103 | /* Clear force bit */ | ||
| 104 | - vpconfig &= ~vp->common->vpconfig_forceupdate; | ||
| 105 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 106 | |||
| 107 | return 0; | ||
| 108 | @@ -218,7 +191,7 @@ int omap_vp_forceupdate_scale(struct voltagedomain *voltdm, | ||
| 109 | void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 110 | { | ||
| 111 | struct omap_vp_instance *vp; | ||
| 112 | - u32 vpconfig; | ||
| 113 | + u32 vpconfig, volt; | ||
| 114 | |||
| 115 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 116 | pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 117 | @@ -236,12 +209,19 @@ void omap_vp_enable(struct voltagedomain *voltdm) | ||
| 118 | if (vp->enabled) | ||
| 119 | return; | ||
| 120 | |||
| 121 | - vp_latch_vsel(voltdm); | ||
| 122 | + volt = voltdm_get_voltage(voltdm); | ||
| 123 | + if (!volt) { | ||
| 124 | + pr_warning("%s: unable to find current voltage for %s\n", | ||
| 125 | + __func__, voltdm->name); | ||
| 126 | + return; | ||
| 127 | + } | ||
| 128 | + | ||
| 129 | + vpconfig = _vp_set_init_voltage(voltdm, volt); | ||
| 130 | |||
| 131 | /* Enable VP */ | ||
| 132 | - vpconfig = voltdm->read(vp->vpconfig); | ||
| 133 | vpconfig |= vp->common->vpconfig_vpenable; | ||
| 134 | voltdm->write(vpconfig, vp->vpconfig); | ||
| 135 | + | ||
| 136 | vp->enabled = true; | ||
| 137 | } | ||
| 138 | |||
| 139 | -- | ||
| 140 | 1.7.2.5 | ||
| 141 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0140-OMAP3-voltage-rename-scale-and-reset-functions-using.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0140-OMAP3-voltage-rename-scale-and-reset-functions-using.patch deleted file mode 100644 index 00a2b86c..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0140-OMAP3-voltage-rename-scale-and-reset-functions-using.patch +++ /dev/null | |||
| @@ -1,141 +0,0 @@ | |||
| 1 | From dfebda78f9517dcf20fae5f5cbbdb3c1bebe4e17 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Tue, 5 Apr 2011 16:27:21 -0700 | ||
| 4 | Subject: [PATCH 140/149] OMAP3+: voltage: rename scale and reset functions using voltdm_ prefix | ||
| 5 | |||
| 6 | Rename voltage scaling related functions to use voltdm_ prefix intead | ||
| 7 | of omap_voltage_, and cleanup kerneldoc comments in the process. | ||
| 8 | |||
| 9 | s/omap_voltage_scale_vdd/voltdm_scale/ | ||
| 10 | s/omap_voltage_reset/voltdm_reset/ | ||
| 11 | |||
| 12 | Also, in voltdm_reset() s/target_uvdc/target_volt/ to be consistent with | ||
| 13 | naming throughout the file. | ||
| 14 | |||
| 15 | No functional changes. | ||
| 16 | |||
| 17 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 18 | --- | ||
| 19 | arch/arm/mach-omap2/pm.c | 2 +- | ||
| 20 | arch/arm/mach-omap2/smartreflex-class3.c | 2 +- | ||
| 21 | arch/arm/mach-omap2/voltage.c | 29 ++++++++++++++--------------- | ||
| 22 | arch/arm/mach-omap2/voltage.h | 5 ++--- | ||
| 23 | 4 files changed, 18 insertions(+), 20 deletions(-) | ||
| 24 | |||
| 25 | diff --git a/arch/arm/mach-omap2/pm.c b/arch/arm/mach-omap2/pm.c | ||
| 26 | index f81340e..659e400 100644 | ||
| 27 | --- a/arch/arm/mach-omap2/pm.c | ||
| 28 | +++ b/arch/arm/mach-omap2/pm.c | ||
| 29 | @@ -214,7 +214,7 @@ static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name, | ||
| 30 | goto exit; | ||
| 31 | } | ||
| 32 | |||
| 33 | - omap_voltage_scale_vdd(voltdm, bootup_volt); | ||
| 34 | + voltdm_scale(voltdm, bootup_volt); | ||
| 35 | return 0; | ||
| 36 | |||
| 37 | exit: | ||
| 38 | diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c | ||
| 39 | index f438cf4..4eac1bc 100644 | ||
| 40 | --- a/arch/arm/mach-omap2/smartreflex-class3.c | ||
| 41 | +++ b/arch/arm/mach-omap2/smartreflex-class3.c | ||
| 42 | @@ -32,7 +32,7 @@ static int sr_class3_disable(struct voltagedomain *voltdm, int is_volt_reset) | ||
| 43 | omap_vp_disable(voltdm); | ||
| 44 | sr_disable(voltdm); | ||
| 45 | if (is_volt_reset) | ||
| 46 | - omap_voltage_reset(voltdm); | ||
| 47 | + voltdm_reset(voltdm); | ||
| 48 | |||
| 49 | return 0; | ||
| 50 | } | ||
| 51 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 52 | index 32f0873..7588480 100644 | ||
| 53 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 54 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 55 | @@ -94,16 +94,15 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) | ||
| 56 | } | ||
| 57 | |||
| 58 | /** | ||
| 59 | - * omap_voltage_scale_vdd() - API to scale voltage of a particular | ||
| 60 | - * voltage domain. | ||
| 61 | - * @voltdm: pointer to the VDD which is to be scaled. | ||
| 62 | - * @target_volt: The target voltage of the voltage domain | ||
| 63 | + * voltdm_scale() - API to scale voltage of a particular voltage domain. | ||
| 64 | + * @voltdm: pointer to the voltage domain which is to be scaled. | ||
| 65 | + * @target_volt: The target voltage of the voltage domain | ||
| 66 | * | ||
| 67 | * This API should be called by the kernel to do the voltage scaling | ||
| 68 | - * for a particular voltage domain during dvfs or any other situation. | ||
| 69 | + * for a particular voltage domain during DVFS. | ||
| 70 | */ | ||
| 71 | -int omap_voltage_scale_vdd(struct voltagedomain *voltdm, | ||
| 72 | - unsigned long target_volt) | ||
| 73 | +int voltdm_scale(struct voltagedomain *voltdm, | ||
| 74 | + unsigned long target_volt) | ||
| 75 | { | ||
| 76 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 77 | pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 78 | @@ -120,31 +119,31 @@ int omap_voltage_scale_vdd(struct voltagedomain *voltdm, | ||
| 79 | } | ||
| 80 | |||
| 81 | /** | ||
| 82 | - * omap_voltage_reset() - Resets the voltage of a particular voltage domain | ||
| 83 | - * to that of the current OPP. | ||
| 84 | - * @voltdm: pointer to the VDD whose voltage is to be reset. | ||
| 85 | + * voltdm_reset() - Resets the voltage of a particular voltage domain | ||
| 86 | + * to that of the current OPP. | ||
| 87 | + * @voltdm: pointer to the voltage domain whose voltage is to be reset. | ||
| 88 | * | ||
| 89 | * This API finds out the correct voltage the voltage domain is supposed | ||
| 90 | * to be at and resets the voltage to that level. Should be used especially | ||
| 91 | * while disabling any voltage compensation modules. | ||
| 92 | */ | ||
| 93 | -void omap_voltage_reset(struct voltagedomain *voltdm) | ||
| 94 | +void voltdm_reset(struct voltagedomain *voltdm) | ||
| 95 | { | ||
| 96 | - unsigned long target_uvdc; | ||
| 97 | + unsigned long target_volt; | ||
| 98 | |||
| 99 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 100 | pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 101 | return; | ||
| 102 | } | ||
| 103 | |||
| 104 | - target_uvdc = omap_voltage_get_nom_volt(voltdm); | ||
| 105 | - if (!target_uvdc) { | ||
| 106 | + target_volt = omap_voltage_get_nom_volt(voltdm); | ||
| 107 | + if (!target_volt) { | ||
| 108 | pr_err("%s: unable to find current voltage for vdd_%s\n", | ||
| 109 | __func__, voltdm->name); | ||
| 110 | return; | ||
| 111 | } | ||
| 112 | |||
| 113 | - omap_voltage_scale_vdd(voltdm, target_uvdc); | ||
| 114 | + voltdm_scale(voltdm, target_volt); | ||
| 115 | } | ||
| 116 | |||
| 117 | /** | ||
| 118 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 119 | index d2a0c24..e3efbf9 100644 | ||
| 120 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 121 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 122 | @@ -151,9 +151,6 @@ struct omap_vdd_info { | ||
| 123 | u32 curr_volt; | ||
| 124 | }; | ||
| 125 | |||
| 126 | -int omap_voltage_scale_vdd(struct voltagedomain *voltdm, | ||
| 127 | - unsigned long target_volt); | ||
| 128 | -void omap_voltage_reset(struct voltagedomain *voltdm); | ||
| 129 | void omap_voltage_get_volttable(struct voltagedomain *voltdm, | ||
| 130 | struct omap_volt_data **volt_data); | ||
| 131 | struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | ||
| 132 | @@ -191,4 +188,6 @@ int voltdm_for_each(int (*fn)(struct voltagedomain *voltdm, void *user), | ||
| 133 | int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, | ||
| 134 | int (*fn)(struct voltagedomain *voltdm, | ||
| 135 | struct powerdomain *pwrdm)); | ||
| 136 | +int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); | ||
| 137 | +void voltdm_reset(struct voltagedomain *voltdm); | ||
| 138 | #endif | ||
| 139 | -- | ||
| 140 | 1.7.2.5 | ||
| 141 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0141-OMAP3-voltage-move-rename-curr_volt-from-vdd_info-in.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0141-OMAP3-voltage-move-rename-curr_volt-from-vdd_info-in.patch deleted file mode 100644 index c9c483c7..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0141-OMAP3-voltage-move-rename-curr_volt-from-vdd_info-in.patch +++ /dev/null | |||
| @@ -1,106 +0,0 @@ | |||
| 1 | From 20a2c2c2dcf15d7e66d70b5e6724597dd697b4a7 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Tue, 5 Apr 2011 16:55:22 -0700 | ||
| 4 | Subject: [PATCH 141/149] OMAP3+: voltage: move/rename curr_volt from vdd_info into struct voltagedomain | ||
| 5 | |||
| 6 | Track current nominal voltage as part of struct voltagedomain instead | ||
| 7 | of omap_vdd_info, which will soon be removed. | ||
| 8 | |||
| 9 | Also renames field from curr_volt to nominal_volt. | ||
| 10 | |||
| 11 | No functional changes. | ||
| 12 | |||
| 13 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 14 | --- | ||
| 15 | arch/arm/mach-omap2/vc.c | 5 ++--- | ||
| 16 | arch/arm/mach-omap2/voltage.c | 6 +----- | ||
| 17 | arch/arm/mach-omap2/voltage.h | 4 ++-- | ||
| 18 | 3 files changed, 5 insertions(+), 10 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 21 | index e855559..3233c69 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/vc.c | ||
| 23 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 24 | @@ -119,7 +119,7 @@ int omap_vc_pre_scale(struct voltagedomain *voltdm, | ||
| 25 | } | ||
| 26 | |||
| 27 | *target_vsel = voltdm->pmic->uv_to_vsel(target_volt); | ||
| 28 | - *current_vsel = voltdm->pmic->uv_to_vsel(vdd->curr_volt); | ||
| 29 | + *current_vsel = voltdm->pmic->uv_to_vsel(voltdm->nominal_volt); | ||
| 30 | |||
| 31 | /* Setting the ON voltage to the new target voltage */ | ||
| 32 | vc_cmdval = voltdm->read(vc->cmdval_reg); | ||
| 33 | @@ -136,7 +136,6 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, | ||
| 34 | unsigned long target_volt, | ||
| 35 | u8 target_vsel, u8 current_vsel) | ||
| 36 | { | ||
| 37 | - struct omap_vdd_info *vdd = voltdm->vdd; | ||
| 38 | u32 smps_steps = 0, smps_delay = 0; | ||
| 39 | |||
| 40 | smps_steps = abs(target_vsel - current_vsel); | ||
| 41 | @@ -145,7 +144,7 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, | ||
| 42 | voltdm->pmic->slew_rate) + 2; | ||
| 43 | udelay(smps_delay); | ||
| 44 | |||
| 45 | - vdd->curr_volt = target_volt; | ||
| 46 | + voltdm->nominal_volt = target_volt; | ||
| 47 | } | ||
| 48 | |||
| 49 | /* vc_bypass_scale - VC bypass method of voltage scaling */ | ||
| 50 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 51 | index 7588480..29ab389 100644 | ||
| 52 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 53 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 54 | @@ -81,16 +81,12 @@ ovdc_out: | ||
| 55 | */ | ||
| 56 | unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) | ||
| 57 | { | ||
| 58 | - struct omap_vdd_info *vdd; | ||
| 59 | - | ||
| 60 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 61 | pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 62 | return 0; | ||
| 63 | } | ||
| 64 | |||
| 65 | - vdd = voltdm->vdd; | ||
| 66 | - | ||
| 67 | - return vdd->curr_volt; | ||
| 68 | + return voltdm->nominal_volt; | ||
| 69 | } | ||
| 70 | |||
| 71 | /** | ||
| 72 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 73 | index e3efbf9..3e32eda 100644 | ||
| 74 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 75 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 76 | @@ -61,6 +61,7 @@ struct omap_vfsm_instance { | ||
| 77 | * @vdd: to be removed | ||
| 78 | * @pwrdms: powerdomains in this voltagedomain | ||
| 79 | * @scale: function used to scale the voltage of the voltagedomain | ||
| 80 | + * @nominal_volt: current nominal voltage for this voltage domain | ||
| 81 | */ | ||
| 82 | struct voltagedomain { | ||
| 83 | char *name; | ||
| 84 | @@ -84,6 +85,7 @@ struct voltagedomain { | ||
| 85 | |||
| 86 | int (*scale) (struct voltagedomain *voltdm, | ||
| 87 | unsigned long target_volt); | ||
| 88 | + u32 nominal_volt; | ||
| 89 | |||
| 90 | struct omap_vdd_info *vdd; | ||
| 91 | }; | ||
| 92 | @@ -144,11 +146,9 @@ struct omap_voltdm_pmic { | ||
| 93 | * | ||
| 94 | * @volt_data : voltage table having the distinct voltages supported | ||
| 95 | * by the domain and other associated per voltage data. | ||
| 96 | - * @curr_volt : current voltage for this vdd. | ||
| 97 | */ | ||
| 98 | struct omap_vdd_info { | ||
| 99 | struct omap_volt_data *volt_data; | ||
| 100 | - u32 curr_volt; | ||
| 101 | }; | ||
| 102 | |||
| 103 | void omap_voltage_get_volttable(struct voltagedomain *voltdm, | ||
| 104 | -- | ||
| 105 | 1.7.2.5 | ||
| 106 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0142-OMAP3-voltdm-final-removal-of-omap_vdd_info.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0142-OMAP3-voltdm-final-removal-of-omap_vdd_info.patch deleted file mode 100644 index e191c6fd..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0142-OMAP3-voltdm-final-removal-of-omap_vdd_info.patch +++ /dev/null | |||
| @@ -1,282 +0,0 @@ | |||
| 1 | From e4cf1f9419b8613017296ee163acedb79dc2967b Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Thu, 14 Jul 2011 11:29:06 -0700 | ||
| 4 | Subject: [PATCH 142/149] OMAP3+: voltdm: final removal of omap_vdd_info | ||
| 5 | |||
| 6 | Remove last remaining member (volt_data) from omap_vdd_info into | ||
| 7 | struct voltagedomain and removal remaining usage and reference to | ||
| 8 | omap_vdd_info. | ||
| 9 | |||
| 10 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/voltage.c | 54 ++++-------------------- | ||
| 13 | arch/arm/mach-omap2/voltage.h | 16 +------ | ||
| 14 | arch/arm/mach-omap2/voltagedomains3xxx_data.c | 14 ++----- | ||
| 15 | arch/arm/mach-omap2/voltagedomains44xx_data.c | 15 +----- | ||
| 16 | 4 files changed, 18 insertions(+), 81 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 19 | index 29ab389..2e5528f 100644 | ||
| 20 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 21 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 22 | @@ -43,34 +43,6 @@ | ||
| 23 | |||
| 24 | static LIST_HEAD(voltdm_list); | ||
| 25 | |||
| 26 | -static int __init _config_common_vdd_data(struct voltagedomain *voltdm) | ||
| 27 | -{ | ||
| 28 | - /* Generic voltage parameters */ | ||
| 29 | - voltdm->scale = omap_vp_forceupdate_scale; | ||
| 30 | - | ||
| 31 | - return 0; | ||
| 32 | -} | ||
| 33 | - | ||
| 34 | -static int __init omap_vdd_data_configure(struct voltagedomain *voltdm) | ||
| 35 | -{ | ||
| 36 | - int ret = -EINVAL; | ||
| 37 | - | ||
| 38 | - if (!voltdm->pmic) { | ||
| 39 | - pr_err("%s: PMIC info requried to configure vdd_%s not" | ||
| 40 | - "populated.Hence cannot initialize vdd_%s\n", | ||
| 41 | - __func__, voltdm->name, voltdm->name); | ||
| 42 | - goto ovdc_out; | ||
| 43 | - } | ||
| 44 | - | ||
| 45 | - if (IS_ERR_VALUE(_config_common_vdd_data(voltdm))) | ||
| 46 | - goto ovdc_out; | ||
| 47 | - | ||
| 48 | - ret = 0; | ||
| 49 | - | ||
| 50 | -ovdc_out: | ||
| 51 | - return ret; | ||
| 52 | -} | ||
| 53 | - | ||
| 54 | /* Public functions */ | ||
| 55 | /** | ||
| 56 | * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated voltage | ||
| 57 | @@ -155,18 +127,14 @@ void voltdm_reset(struct voltagedomain *voltdm) | ||
| 58 | * | ||
| 59 | */ | ||
| 60 | void omap_voltage_get_volttable(struct voltagedomain *voltdm, | ||
| 61 | - struct omap_volt_data **volt_data) | ||
| 62 | + struct omap_volt_data **volt_data) | ||
| 63 | { | ||
| 64 | - struct omap_vdd_info *vdd; | ||
| 65 | - | ||
| 66 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 67 | pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 68 | return; | ||
| 69 | } | ||
| 70 | |||
| 71 | - vdd = voltdm->vdd; | ||
| 72 | - | ||
| 73 | - *volt_data = vdd->volt_data; | ||
| 74 | + *volt_data = voltdm->volt_data; | ||
| 75 | } | ||
| 76 | |||
| 77 | /** | ||
| 78 | @@ -185,9 +153,8 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, | ||
| 79 | * domain or if there is no matching entry. | ||
| 80 | */ | ||
| 81 | struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | ||
| 82 | - unsigned long volt) | ||
| 83 | + unsigned long volt) | ||
| 84 | { | ||
| 85 | - struct omap_vdd_info *vdd; | ||
| 86 | int i; | ||
| 87 | |||
| 88 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 89 | @@ -195,17 +162,15 @@ struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | ||
| 90 | return ERR_PTR(-EINVAL); | ||
| 91 | } | ||
| 92 | |||
| 93 | - vdd = voltdm->vdd; | ||
| 94 | - | ||
| 95 | - if (!vdd->volt_data) { | ||
| 96 | + if (!voltdm->volt_data) { | ||
| 97 | pr_warning("%s: voltage table does not exist for vdd_%s\n", | ||
| 98 | __func__, voltdm->name); | ||
| 99 | return ERR_PTR(-ENODATA); | ||
| 100 | } | ||
| 101 | |||
| 102 | - for (i = 0; vdd->volt_data[i].volt_nominal != 0; i++) { | ||
| 103 | - if (vdd->volt_data[i].volt_nominal == volt) | ||
| 104 | - return &vdd->volt_data[i]; | ||
| 105 | + for (i = 0; voltdm->volt_data[i].volt_nominal != 0; i++) { | ||
| 106 | + if (voltdm->volt_data[i].volt_nominal == volt) | ||
| 107 | + return &voltdm->volt_data[i]; | ||
| 108 | } | ||
| 109 | |||
| 110 | pr_notice("%s: Unable to match the current voltage with the voltage" | ||
| 111 | @@ -304,9 +269,8 @@ int __init omap_voltage_late_init(void) | ||
| 112 | omap_vc_init_channel(voltdm); | ||
| 113 | } | ||
| 114 | |||
| 115 | - if (voltdm->vdd) { | ||
| 116 | - if (omap_vdd_data_configure(voltdm)) | ||
| 117 | - continue; | ||
| 118 | + if (voltdm->vp) { | ||
| 119 | + voltdm->scale = omap_vp_forceupdate_scale; | ||
| 120 | omap_vp_init(voltdm); | ||
| 121 | } | ||
| 122 | } | ||
| 123 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 124 | index 3e32eda..68b1ed5 100644 | ||
| 125 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 126 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 127 | @@ -33,8 +33,6 @@ struct powerdomain; | ||
| 128 | #define OMAP3_VOLTOFFSET 0xff | ||
| 129 | #define OMAP3_VOLTSETUP2 0xff | ||
| 130 | |||
| 131 | -struct omap_vdd_info; | ||
| 132 | - | ||
| 133 | /** | ||
| 134 | * struct omap_vfsm_instance - per-voltage manager FSM register/bitfield | ||
| 135 | * data | ||
| 136 | @@ -85,9 +83,9 @@ struct voltagedomain { | ||
| 137 | |||
| 138 | int (*scale) (struct voltagedomain *voltdm, | ||
| 139 | unsigned long target_volt); | ||
| 140 | - u32 nominal_volt; | ||
| 141 | |||
| 142 | - struct omap_vdd_info *vdd; | ||
| 143 | + u32 nominal_volt; | ||
| 144 | + struct omap_volt_data *volt_data; | ||
| 145 | }; | ||
| 146 | |||
| 147 | /** | ||
| 148 | @@ -141,16 +139,6 @@ struct omap_voltdm_pmic { | ||
| 149 | u8 (*uv_to_vsel) (unsigned long uV); | ||
| 150 | }; | ||
| 151 | |||
| 152 | -/** | ||
| 153 | - * omap_vdd_info - Per Voltage Domain info | ||
| 154 | - * | ||
| 155 | - * @volt_data : voltage table having the distinct voltages supported | ||
| 156 | - * by the domain and other associated per voltage data. | ||
| 157 | - */ | ||
| 158 | -struct omap_vdd_info { | ||
| 159 | - struct omap_volt_data *volt_data; | ||
| 160 | -}; | ||
| 161 | - | ||
| 162 | void omap_voltage_get_volttable(struct voltagedomain *voltdm, | ||
| 163 | struct omap_volt_data **volt_data); | ||
| 164 | struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | ||
| 165 | diff --git a/arch/arm/mach-omap2/voltagedomains3xxx_data.c b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 166 | index e7a0be1..b0d0ae1 100644 | ||
| 167 | --- a/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 168 | +++ b/arch/arm/mach-omap2/voltagedomains3xxx_data.c | ||
| 169 | @@ -37,16 +37,12 @@ static const struct omap_vfsm_instance omap3_vdd1_vfsm = { | ||
| 170 | .voltsetup_mask = OMAP3430_SETUP_TIME1_MASK, | ||
| 171 | }; | ||
| 172 | |||
| 173 | -static struct omap_vdd_info omap3_vdd1_info; | ||
| 174 | - | ||
| 175 | static const struct omap_vfsm_instance omap3_vdd2_vfsm = { | ||
| 176 | .voltsetup_reg = OMAP3_PRM_VOLTSETUP1_OFFSET, | ||
| 177 | .voltsetup_shift = OMAP3430_SETUP_TIME2_SHIFT, | ||
| 178 | .voltsetup_mask = OMAP3430_SETUP_TIME2_MASK, | ||
| 179 | }; | ||
| 180 | |||
| 181 | -static struct omap_vdd_info omap3_vdd2_info; | ||
| 182 | - | ||
| 183 | static struct voltagedomain omap3_voltdm_mpu = { | ||
| 184 | .name = "mpu_iva", | ||
| 185 | .scalable = true, | ||
| 186 | @@ -56,7 +52,6 @@ static struct voltagedomain omap3_voltdm_mpu = { | ||
| 187 | .vc = &omap3_vc_mpu, | ||
| 188 | .vfsm = &omap3_vdd1_vfsm, | ||
| 189 | .vp = &omap3_vp_mpu, | ||
| 190 | - .vdd = &omap3_vdd1_info, | ||
| 191 | }; | ||
| 192 | |||
| 193 | static struct voltagedomain omap3_voltdm_core = { | ||
| 194 | @@ -68,7 +63,6 @@ static struct voltagedomain omap3_voltdm_core = { | ||
| 195 | .vc = &omap3_vc_core, | ||
| 196 | .vfsm = &omap3_vdd2_vfsm, | ||
| 197 | .vp = &omap3_vp_core, | ||
| 198 | - .vdd = &omap3_vdd2_info, | ||
| 199 | }; | ||
| 200 | |||
| 201 | static struct voltagedomain omap3_voltdm_wkup = { | ||
| 202 | @@ -94,11 +88,11 @@ void __init omap3xxx_voltagedomains_init(void) | ||
| 203 | * for the currently-running IC | ||
| 204 | */ | ||
| 205 | if (cpu_is_omap3630()) { | ||
| 206 | - omap3_vdd1_info.volt_data = omap36xx_vddmpu_volt_data; | ||
| 207 | - omap3_vdd2_info.volt_data = omap36xx_vddcore_volt_data; | ||
| 208 | + omap3_voltdm_mpu.volt_data = omap36xx_vddmpu_volt_data; | ||
| 209 | + omap3_voltdm_core.volt_data = omap36xx_vddcore_volt_data; | ||
| 210 | } else { | ||
| 211 | - omap3_vdd1_info.volt_data = omap34xx_vddmpu_volt_data; | ||
| 212 | - omap3_vdd2_info.volt_data = omap34xx_vddcore_volt_data; | ||
| 213 | + omap3_voltdm_mpu.volt_data = omap34xx_vddmpu_volt_data; | ||
| 214 | + omap3_voltdm_core.volt_data = omap34xx_vddcore_volt_data; | ||
| 215 | } | ||
| 216 | |||
| 217 | for (i = 0; voltdm = voltagedomains_omap3[i], voltdm; i++) | ||
| 218 | diff --git a/arch/arm/mach-omap2/voltagedomains44xx_data.c b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 219 | index 9c20fbb..c4584e9 100644 | ||
| 220 | --- a/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 221 | +++ b/arch/arm/mach-omap2/voltagedomains44xx_data.c | ||
| 222 | @@ -36,20 +36,14 @@ static const struct omap_vfsm_instance omap4_vdd_mpu_vfsm = { | ||
| 223 | .voltsetup_reg = OMAP4_PRM_VOLTSETUP_MPU_RET_SLEEP_OFFSET, | ||
| 224 | }; | ||
| 225 | |||
| 226 | -static struct omap_vdd_info omap4_vdd_mpu_info; | ||
| 227 | - | ||
| 228 | static const struct omap_vfsm_instance omap4_vdd_iva_vfsm = { | ||
| 229 | .voltsetup_reg = OMAP4_PRM_VOLTSETUP_IVA_RET_SLEEP_OFFSET, | ||
| 230 | }; | ||
| 231 | |||
| 232 | -static struct omap_vdd_info omap4_vdd_iva_info; | ||
| 233 | - | ||
| 234 | static const struct omap_vfsm_instance omap4_vdd_core_vfsm = { | ||
| 235 | .voltsetup_reg = OMAP4_PRM_VOLTSETUP_CORE_RET_SLEEP_OFFSET, | ||
| 236 | }; | ||
| 237 | |||
| 238 | -static struct omap_vdd_info omap4_vdd_core_info; | ||
| 239 | - | ||
| 240 | static struct voltagedomain omap4_voltdm_mpu = { | ||
| 241 | .name = "mpu", | ||
| 242 | .scalable = true, | ||
| 243 | @@ -59,7 +53,6 @@ static struct voltagedomain omap4_voltdm_mpu = { | ||
| 244 | .vc = &omap4_vc_mpu, | ||
| 245 | .vfsm = &omap4_vdd_mpu_vfsm, | ||
| 246 | .vp = &omap4_vp_mpu, | ||
| 247 | - .vdd = &omap4_vdd_mpu_info, | ||
| 248 | }; | ||
| 249 | |||
| 250 | static struct voltagedomain omap4_voltdm_iva = { | ||
| 251 | @@ -71,7 +64,6 @@ static struct voltagedomain omap4_voltdm_iva = { | ||
| 252 | .vc = &omap4_vc_iva, | ||
| 253 | .vfsm = &omap4_vdd_iva_vfsm, | ||
| 254 | .vp = &omap4_vp_iva, | ||
| 255 | - .vdd = &omap4_vdd_iva_info, | ||
| 256 | }; | ||
| 257 | |||
| 258 | static struct voltagedomain omap4_voltdm_core = { | ||
| 259 | @@ -83,7 +75,6 @@ static struct voltagedomain omap4_voltdm_core = { | ||
| 260 | .vc = &omap4_vc_core, | ||
| 261 | .vfsm = &omap4_vdd_core_vfsm, | ||
| 262 | .vp = &omap4_vp_core, | ||
| 263 | - .vdd = &omap4_vdd_core_info, | ||
| 264 | }; | ||
| 265 | |||
| 266 | static struct voltagedomain omap4_voltdm_wkup = { | ||
| 267 | @@ -109,9 +100,9 @@ void __init omap44xx_voltagedomains_init(void) | ||
| 268 | * XXX Will depend on the process, validation, and binning | ||
| 269 | * for the currently-running IC | ||
| 270 | */ | ||
| 271 | - omap4_vdd_mpu_info.volt_data = omap44xx_vdd_mpu_volt_data; | ||
| 272 | - omap4_vdd_iva_info.volt_data = omap44xx_vdd_iva_volt_data; | ||
| 273 | - omap4_vdd_core_info.volt_data = omap44xx_vdd_core_volt_data; | ||
| 274 | + omap4_voltdm_mpu.volt_data = omap44xx_vdd_mpu_volt_data; | ||
| 275 | + omap4_voltdm_iva.volt_data = omap44xx_vdd_iva_volt_data; | ||
| 276 | + omap4_voltdm_core.volt_data = omap44xx_vdd_core_volt_data; | ||
| 277 | |||
| 278 | for (i = 0; voltdm = voltagedomains_omap4[i], voltdm; i++) | ||
| 279 | voltdm->sys_clk.name = sys_clk_name; | ||
| 280 | -- | ||
| 281 | 1.7.2.5 | ||
| 282 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0143-OMAP3-voltage-rename-omap_voltage_get_nom_volt-voltd.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0143-OMAP3-voltage-rename-omap_voltage_get_nom_volt-voltd.patch deleted file mode 100644 index c65ead95..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0143-OMAP3-voltage-rename-omap_voltage_get_nom_volt-voltd.patch +++ /dev/null | |||
| @@ -1,91 +0,0 @@ | |||
| 1 | From da00ff6be37578f4c1adbe5c7dd28844073f7873 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Fri, 15 Jul 2011 16:05:12 -0700 | ||
| 4 | Subject: [PATCH 143/149] OMAP3+: voltage: rename omap_voltage_get_nom_volt -> voltdm_get_voltage | ||
| 5 | |||
| 6 | Use preferred voltdm_ naming for getting current nominal voltage. | ||
| 7 | |||
| 8 | No functional changes. | ||
| 9 | |||
| 10 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 11 | --- | ||
| 12 | arch/arm/mach-omap2/smartreflex-class3.c | 2 +- | ||
| 13 | arch/arm/mach-omap2/voltage.c | 14 ++++++++------ | ||
| 14 | arch/arm/mach-omap2/voltage.h | 2 +- | ||
| 15 | 3 files changed, 10 insertions(+), 8 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/arch/arm/mach-omap2/smartreflex-class3.c b/arch/arm/mach-omap2/smartreflex-class3.c | ||
| 18 | index 4eac1bc..53d9d0a 100644 | ||
| 19 | --- a/arch/arm/mach-omap2/smartreflex-class3.c | ||
| 20 | +++ b/arch/arm/mach-omap2/smartreflex-class3.c | ||
| 21 | @@ -15,7 +15,7 @@ | ||
| 22 | |||
| 23 | static int sr_class3_enable(struct voltagedomain *voltdm) | ||
| 24 | { | ||
| 25 | - unsigned long volt = omap_voltage_get_nom_volt(voltdm); | ||
| 26 | + unsigned long volt = voltdm_get_voltage(voltdm); | ||
| 27 | |||
| 28 | if (!volt) { | ||
| 29 | pr_warning("%s: Curr voltage unknown. Cannot enable sr_%s\n", | ||
| 30 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 31 | index 2e5528f..031f6bf 100644 | ||
| 32 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 33 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 34 | @@ -45,13 +45,13 @@ static LIST_HEAD(voltdm_list); | ||
| 35 | |||
| 36 | /* Public functions */ | ||
| 37 | /** | ||
| 38 | - * omap_voltage_get_nom_volt() - Gets the current non-auto-compensated voltage | ||
| 39 | - * @voltdm: pointer to the VDD for which current voltage info is needed | ||
| 40 | + * voltdm_get_voltage() - Gets the current non-auto-compensated voltage | ||
| 41 | + * @voltdm: pointer to the voltdm for which current voltage info is needed | ||
| 42 | * | ||
| 43 | - * API to get the current non-auto-compensated voltage for a VDD. | ||
| 44 | - * Returns 0 in case of error else returns the current voltage for the VDD. | ||
| 45 | + * API to get the current non-auto-compensated voltage for a voltage domain. | ||
| 46 | + * Returns 0 in case of error else returns the current voltage. | ||
| 47 | */ | ||
| 48 | -unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) | ||
| 49 | +unsigned long voltdm_get_voltage(struct voltagedomain *voltdm) | ||
| 50 | { | ||
| 51 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 52 | pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 53 | @@ -72,6 +72,8 @@ unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm) | ||
| 54 | int voltdm_scale(struct voltagedomain *voltdm, | ||
| 55 | unsigned long target_volt) | ||
| 56 | { | ||
| 57 | + int ret; | ||
| 58 | + | ||
| 59 | if (!voltdm || IS_ERR(voltdm)) { | ||
| 60 | pr_warning("%s: VDD specified does not exist!\n", __func__); | ||
| 61 | return -EINVAL; | ||
| 62 | @@ -104,7 +106,7 @@ void voltdm_reset(struct voltagedomain *voltdm) | ||
| 63 | return; | ||
| 64 | } | ||
| 65 | |||
| 66 | - target_volt = omap_voltage_get_nom_volt(voltdm); | ||
| 67 | + target_volt = voltdm_get_voltage(voltdm); | ||
| 68 | if (!target_volt) { | ||
| 69 | pr_err("%s: unable to find current voltage for vdd_%s\n", | ||
| 70 | __func__, voltdm->name); | ||
| 71 | diff --git a/arch/arm/mach-omap2/voltage.h b/arch/arm/mach-omap2/voltage.h | ||
| 72 | index 68b1ed5..b4c6259 100644 | ||
| 73 | --- a/arch/arm/mach-omap2/voltage.h | ||
| 74 | +++ b/arch/arm/mach-omap2/voltage.h | ||
| 75 | @@ -143,7 +143,6 @@ void omap_voltage_get_volttable(struct voltagedomain *voltdm, | ||
| 76 | struct omap_volt_data **volt_data); | ||
| 77 | struct omap_volt_data *omap_voltage_get_voltdata(struct voltagedomain *voltdm, | ||
| 78 | unsigned long volt); | ||
| 79 | -unsigned long omap_voltage_get_nom_volt(struct voltagedomain *voltdm); | ||
| 80 | #ifdef CONFIG_PM | ||
| 81 | int omap_voltage_register_pmic(struct voltagedomain *voltdm, | ||
| 82 | struct omap_voltdm_pmic *pmic); | ||
| 83 | @@ -178,4 +177,5 @@ int voltdm_for_each_pwrdm(struct voltagedomain *voltdm, | ||
| 84 | struct powerdomain *pwrdm)); | ||
| 85 | int voltdm_scale(struct voltagedomain *voltdm, unsigned long target_volt); | ||
| 86 | void voltdm_reset(struct voltagedomain *voltdm); | ||
| 87 | +unsigned long voltdm_get_voltage(struct voltagedomain *voltdm); | ||
| 88 | #endif | ||
| 89 | -- | ||
| 90 | 1.7.2.5 | ||
| 91 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0144-OMAP3-voltage-update-nominal-voltage-in-voltdm_scale.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0144-OMAP3-voltage-update-nominal-voltage-in-voltdm_scale.patch deleted file mode 100644 index 63ecb274..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0144-OMAP3-voltage-update-nominal-voltage-in-voltdm_scale.patch +++ /dev/null | |||
| @@ -1,49 +0,0 @@ | |||
| 1 | From 5bd4a2cb8354937390805ed248235670cf229935 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Kevin Hilman <khilman@ti.com> | ||
| 3 | Date: Mon, 18 Jul 2011 16:24:17 -0700 | ||
| 4 | Subject: [PATCH 144/149] OMAP3+: voltage: update nominal voltage in voltdm_scale() not VC post-scale | ||
| 5 | |||
| 6 | Currently, the nominal voltage is updated in the VC post-scale function | ||
| 7 | which is common to both scaling methods. However, this has readabiliy | ||
| 8 | problems as this update is not where it might be expected. Instead, move | ||
| 9 | the updated into voltdm_scale() upon a successful return of voltdm->scale() | ||
| 10 | |||
| 11 | Signed-off-by: Kevin Hilman <khilman@ti.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/vc.c | 2 -- | ||
| 14 | arch/arm/mach-omap2/voltage.c | 6 +++++- | ||
| 15 | 2 files changed, 5 insertions(+), 3 deletions(-) | ||
| 16 | |||
| 17 | diff --git a/arch/arm/mach-omap2/vc.c b/arch/arm/mach-omap2/vc.c | ||
| 18 | index 3233c69..16fa912 100644 | ||
| 19 | --- a/arch/arm/mach-omap2/vc.c | ||
| 20 | +++ b/arch/arm/mach-omap2/vc.c | ||
| 21 | @@ -143,8 +143,6 @@ void omap_vc_post_scale(struct voltagedomain *voltdm, | ||
| 22 | smps_delay = ((smps_steps * voltdm->pmic->step_size) / | ||
| 23 | voltdm->pmic->slew_rate) + 2; | ||
| 24 | udelay(smps_delay); | ||
| 25 | - | ||
| 26 | - voltdm->nominal_volt = target_volt; | ||
| 27 | } | ||
| 28 | |||
| 29 | /* vc_bypass_scale - VC bypass method of voltage scaling */ | ||
| 30 | diff --git a/arch/arm/mach-omap2/voltage.c b/arch/arm/mach-omap2/voltage.c | ||
| 31 | index 031f6bf..cebc8b1 100644 | ||
| 32 | --- a/arch/arm/mach-omap2/voltage.c | ||
| 33 | +++ b/arch/arm/mach-omap2/voltage.c | ||
| 34 | @@ -85,7 +85,11 @@ int voltdm_scale(struct voltagedomain *voltdm, | ||
| 35 | return -ENODATA; | ||
| 36 | } | ||
| 37 | |||
| 38 | - return voltdm->scale(voltdm, target_volt); | ||
| 39 | + ret = voltdm->scale(voltdm, target_volt); | ||
| 40 | + if (!ret) | ||
| 41 | + voltdm->nominal_volt = target_volt; | ||
| 42 | + | ||
| 43 | + return ret; | ||
| 44 | } | ||
| 45 | |||
| 46 | /** | ||
| 47 | -- | ||
| 48 | 1.7.2.5 | ||
| 49 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0145-OMAP4-PM-TWL6030-fix-voltage-conversion-formula.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0145-OMAP4-PM-TWL6030-fix-voltage-conversion-formula.patch deleted file mode 100644 index e114b6cb..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0145-OMAP4-PM-TWL6030-fix-voltage-conversion-formula.patch +++ /dev/null | |||
| @@ -1,85 +0,0 @@ | |||
| 1 | From 8ec7a1410e7ad5a4027deabc8025b5c7291c7579 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Patrick Titiano <p-titiano@ti.com> | ||
| 3 | Date: Wed, 18 May 2011 00:17:30 -0500 | ||
| 4 | Subject: [PATCH 145/149] OMAP4: PM: TWL6030: fix voltage conversion formula | ||
| 5 | |||
| 6 | omap_twl_vsel_to_uv() and omap_twl_uv_to_vsel() functions used to convert | ||
| 7 | voltages to TWL6030 SMPS commands (a.k.a "vsel") implement incorrect conversion | ||
| 8 | formula. | ||
| 9 | It uses legacy OMAP3 formula, but OMAP4 Power IC has different offset and | ||
| 10 | voltage step: | ||
| 11 | - Voltage Step is now 12.66mV (instead of 12.5mV) | ||
| 12 | - Offset is either 607.7mV or 709mV depending on TWL6030 chip revision | ||
| 13 | (instead of 600mV) | ||
| 14 | This leads to setting voltages potentially higher than expected, and so | ||
| 15 | potentially some (limited) power overconsumption. | ||
| 16 | |||
| 17 | For reference, see formula and tables in section 8.5.2.3 | ||
| 18 | "Output Voltage Selection (Standard Mode / Extended Mode with or without offset)" | ||
| 19 | in TWL6030 functional specifications document. | ||
| 20 | |||
| 21 | [nm@ti.com: ported to voltdm_c] | ||
| 22 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 23 | Signed-off-by: Patrick Titiano <p-titiano@ti.com> | ||
| 24 | --- | ||
| 25 | arch/arm/mach-omap2/omap_twl.c | 14 +++++++------- | ||
| 26 | 1 files changed, 7 insertions(+), 7 deletions(-) | ||
| 27 | |||
| 28 | diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c | ||
| 29 | index 6b247d1..a66bf6b 100644 | ||
| 30 | --- a/arch/arm/mach-omap2/omap_twl.c | ||
| 31 | +++ b/arch/arm/mach-omap2/omap_twl.c | ||
| 32 | @@ -106,9 +106,9 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) | ||
| 33 | return 1350000; | ||
| 34 | |||
| 35 | if (smps_offset & 0x8) | ||
| 36 | - return ((((vsel - 1) * 125) + 7000)) * 100; | ||
| 37 | + return ((((vsel - 1) * 1266) + 70900)) * 10; | ||
| 38 | else | ||
| 39 | - return ((((vsel - 1) * 125) + 6000)) * 100; | ||
| 40 | + return ((((vsel - 1) * 1266) + 60770)) * 10; | ||
| 41 | } | ||
| 42 | |||
| 43 | static u8 twl6030_uv_to_vsel(unsigned long uv) | ||
| 44 | @@ -138,9 +138,9 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) | ||
| 45 | return 0x3A; | ||
| 46 | |||
| 47 | if (smps_offset & 0x8) | ||
| 48 | - return DIV_ROUND_UP(uv - 700000, 12500) + 1; | ||
| 49 | + return DIV_ROUND_UP(uv - 709000, 12660) + 1; | ||
| 50 | else | ||
| 51 | - return DIV_ROUND_UP(uv - 600000, 12500) + 1; | ||
| 52 | + return DIV_ROUND_UP(uv - 607700, 12660) + 1; | ||
| 53 | } | ||
| 54 | |||
| 55 | static struct omap_voltdm_pmic omap3_mpu_pmic = { | ||
| 56 | @@ -187,7 +187,7 @@ static struct omap_voltdm_pmic omap3_core_pmic = { | ||
| 57 | |||
| 58 | static struct omap_voltdm_pmic omap4_mpu_pmic = { | ||
| 59 | .slew_rate = 4000, | ||
| 60 | - .step_size = 12500, | ||
| 61 | + .step_size = 12660, | ||
| 62 | .on_volt = 1350000, | ||
| 63 | .onlp_volt = 1350000, | ||
| 64 | .ret_volt = 837500, | ||
| 65 | @@ -208,7 +208,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { | ||
| 66 | |||
| 67 | static struct omap_voltdm_pmic omap4_iva_pmic = { | ||
| 68 | .slew_rate = 4000, | ||
| 69 | - .step_size = 12500, | ||
| 70 | + .step_size = 12660, | ||
| 71 | .on_volt = 1100000, | ||
| 72 | .onlp_volt = 1100000, | ||
| 73 | .ret_volt = 837500, | ||
| 74 | @@ -229,7 +229,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { | ||
| 75 | |||
| 76 | static struct omap_voltdm_pmic omap4_core_pmic = { | ||
| 77 | .slew_rate = 4000, | ||
| 78 | - .step_size = 12500, | ||
| 79 | + .step_size = 12660, | ||
| 80 | .on_volt = 1100000, | ||
| 81 | .onlp_volt = 1100000, | ||
| 82 | .ret_volt = 837500, | ||
| 83 | -- | ||
| 84 | 1.7.2.5 | ||
| 85 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0146-OMAP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0146-OMAP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch deleted file mode 100644 index 4f3851e4..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0146-OMAP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch +++ /dev/null | |||
| @@ -1,37 +0,0 @@ | |||
| 1 | From bfc31f950af6d9e8eb59ffeb80b3ba39ef98a943 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Wed, 18 May 2011 00:17:31 -0500 | ||
| 4 | Subject: [PATCH 146/149] OMAP4: PM: TWL6030: fix uv to voltage for >0x39 | ||
| 5 | |||
| 6 | using 1.35V as a check is not correct, we know that beyond 0x39, | ||
| 7 | voltages are non linear - hence use the conversion iff uV greater | ||
| 8 | than that for 0x39. For example, with 709mV as the smps offset, | ||
| 9 | the max linear is actually 1.41V(0x39vsel)! | ||
| 10 | |||
| 11 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 12 | --- | ||
| 13 | arch/arm/mach-omap2/omap_twl.c | 7 ++++++- | ||
| 14 | 1 files changed, 6 insertions(+), 1 deletions(-) | ||
| 15 | |||
| 16 | diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c | ||
| 17 | index a66bf6b..5def7c2 100644 | ||
| 18 | --- a/arch/arm/mach-omap2/omap_twl.c | ||
| 19 | +++ b/arch/arm/mach-omap2/omap_twl.c | ||
| 20 | @@ -134,8 +134,13 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) | ||
| 21 | * hardcoding only for 1.35 V which is used for 1GH OPP for | ||
| 22 | * OMAP4430. | ||
| 23 | */ | ||
| 24 | - if (uv == 1350000) | ||
| 25 | + if (uv > twl6030_vsel_to_uv(0x39)) { | ||
| 26 | + if (uv == 1350000) | ||
| 27 | + return 0x3A; | ||
| 28 | + pr_err("%s:OUT OF RANGE! non mapped vsel for %ld Vs max %ld\n", | ||
| 29 | + __func__, uv, twl6030_vsel_to_uv(0x39)); | ||
| 30 | return 0x3A; | ||
| 31 | + } | ||
| 32 | |||
| 33 | if (smps_offset & 0x8) | ||
| 34 | return DIV_ROUND_UP(uv - 709000, 12660) + 1; | ||
| 35 | -- | ||
| 36 | 1.7.2.5 | ||
| 37 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0147-OMAP4-PM-TWL6030-address-0V-conversions.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0147-OMAP4-PM-TWL6030-address-0V-conversions.patch deleted file mode 100644 index 5456fee3..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0147-OMAP4-PM-TWL6030-address-0V-conversions.patch +++ /dev/null | |||
| @@ -1,38 +0,0 @@ | |||
| 1 | From ccac5e6430353118ac7b9c46493e8cdf12114bf1 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Wed, 18 May 2011 00:17:32 -0500 | ||
| 4 | Subject: [PATCH 147/149] OMAP4: PM: TWL6030: address 0V conversions | ||
| 5 | |||
| 6 | 0V conversions should be mapped to 0 as it is meant to denote | ||
| 7 | off voltages. | ||
| 8 | |||
| 9 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 10 | --- | ||
| 11 | arch/arm/mach-omap2/omap_twl.c | 4 ++++ | ||
| 12 | 1 files changed, 4 insertions(+), 0 deletions(-) | ||
| 13 | |||
| 14 | diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c | ||
| 15 | index 5def7c2..b30adf3 100644 | ||
| 16 | --- a/arch/arm/mach-omap2/omap_twl.c | ||
| 17 | +++ b/arch/arm/mach-omap2/omap_twl.c | ||
| 18 | @@ -95,6 +95,8 @@ static unsigned long twl6030_vsel_to_uv(const u8 vsel) | ||
| 19 | is_offset_valid = true; | ||
| 20 | } | ||
| 21 | |||
| 22 | + if (!vsel) | ||
| 23 | + return 0; | ||
| 24 | /* | ||
| 25 | * There is no specific formula for voltage to vsel | ||
| 26 | * conversion above 1.3V. There are special hardcoded | ||
| 27 | @@ -127,6 +129,8 @@ static u8 twl6030_uv_to_vsel(unsigned long uv) | ||
| 28 | is_offset_valid = true; | ||
| 29 | } | ||
| 30 | |||
| 31 | + if (!uv) | ||
| 32 | + return 0x00; | ||
| 33 | /* | ||
| 34 | * There is no specific formula for voltage to vsel | ||
| 35 | * conversion above 1.3V. There are special hardcoded | ||
| 36 | -- | ||
| 37 | 1.7.2.5 | ||
| 38 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0148-OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0148-OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch deleted file mode 100644 index 64dd7cb9..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0148-OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch +++ /dev/null | |||
| @@ -1,71 +0,0 @@ | |||
| 1 | From 884d61bd127d9e46f6b31c24c5109ba9bc7a3730 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Patrick Titiano <p-titiano@ti.com> | ||
| 3 | Date: Wed, 18 May 2011 00:17:33 -0500 | ||
| 4 | Subject: [PATCH 148/149] OMAP4: PM: TWL6030: fix ON/RET/OFF voltages | ||
| 5 | |||
| 6 | According to latest OMAP4430 Data Manual v0.4 dated March 2011: | ||
| 7 | - Retention voltage shall be set to 0.83V. See tables 2.2, 2.4 and 2.6 in DM. | ||
| 8 | This allows saving a little more power in retention states. | ||
| 9 | - OPP100 IVA nominal voltage is 1.188V. See table 2.4 in DM. | ||
| 10 | This allows saving a little power when CPU wakes up until Smart-Reflex is | ||
| 11 | not yet resumed. | ||
| 12 | |||
| 13 | [nm@ti.com: ported to voltdm_c] | ||
| 14 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 15 | Signed-off-by: Patrick Titiano <p-titiano@ti.com> | ||
| 16 | --- | ||
| 17 | arch/arm/mach-omap2/omap_twl.c | 24 ++++++++++++------------ | ||
| 18 | 1 files changed, 12 insertions(+), 12 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c | ||
| 21 | index b30adf3..4bc99fb 100644 | ||
| 22 | --- a/arch/arm/mach-omap2/omap_twl.c | ||
| 23 | +++ b/arch/arm/mach-omap2/omap_twl.c | ||
| 24 | @@ -197,10 +197,10 @@ static struct omap_voltdm_pmic omap3_core_pmic = { | ||
| 25 | static struct omap_voltdm_pmic omap4_mpu_pmic = { | ||
| 26 | .slew_rate = 4000, | ||
| 27 | .step_size = 12660, | ||
| 28 | - .on_volt = 1350000, | ||
| 29 | - .onlp_volt = 1350000, | ||
| 30 | - .ret_volt = 837500, | ||
| 31 | - .off_volt = 600000, | ||
| 32 | + .on_volt = 1375000, | ||
| 33 | + .onlp_volt = 1375000, | ||
| 34 | + .ret_volt = 830000, | ||
| 35 | + .off_volt = 0, | ||
| 36 | .volt_setup_time = 0, | ||
| 37 | .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, | ||
| 38 | .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, | ||
| 39 | @@ -218,10 +218,10 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { | ||
| 40 | static struct omap_voltdm_pmic omap4_iva_pmic = { | ||
| 41 | .slew_rate = 4000, | ||
| 42 | .step_size = 12660, | ||
| 43 | - .on_volt = 1100000, | ||
| 44 | - .onlp_volt = 1100000, | ||
| 45 | - .ret_volt = 837500, | ||
| 46 | - .off_volt = 600000, | ||
| 47 | + .on_volt = 1188000, | ||
| 48 | + .onlp_volt = 1188000, | ||
| 49 | + .ret_volt = 830000, | ||
| 50 | + .off_volt = 0, | ||
| 51 | .volt_setup_time = 0, | ||
| 52 | .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, | ||
| 53 | .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, | ||
| 54 | @@ -239,10 +239,10 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { | ||
| 55 | static struct omap_voltdm_pmic omap4_core_pmic = { | ||
| 56 | .slew_rate = 4000, | ||
| 57 | .step_size = 12660, | ||
| 58 | - .on_volt = 1100000, | ||
| 59 | - .onlp_volt = 1100000, | ||
| 60 | - .ret_volt = 837500, | ||
| 61 | - .off_volt = 600000, | ||
| 62 | + .on_volt = 1200000, | ||
| 63 | + .onlp_volt = 1200000, | ||
| 64 | + .ret_volt = 830000, | ||
| 65 | + .off_volt = 0, | ||
| 66 | .volt_setup_time = 0, | ||
| 67 | .vp_erroroffset = OMAP4_VP_CONFIG_ERROROFFSET, | ||
| 68 | .vp_vstepmin = OMAP4_VP_VSTEPMIN_VSTEPMIN, | ||
| 69 | -- | ||
| 70 | 1.7.2.5 | ||
| 71 | |||
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0149-OMAP4-PM-TWL6030-add-cmd-register.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0149-OMAP4-PM-TWL6030-add-cmd-register.patch deleted file mode 100644 index 78829a61..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0149-OMAP4-PM-TWL6030-add-cmd-register.patch +++ /dev/null | |||
| @@ -1,56 +0,0 @@ | |||
| 1 | From 478e5300d4eb33cdebd393d634304a83833bc4d4 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nishanth Menon <nm@ti.com> | ||
| 3 | Date: Wed, 18 May 2011 00:17:34 -0500 | ||
| 4 | Subject: [PATCH 149/149] OMAP4: PM: TWL6030: add cmd register | ||
| 5 | |||
| 6 | Without the command register, ON/ONLP/RET/OFF voltages are | ||
| 7 | useless. and TWL will be unable to use these | ||
| 8 | |||
| 9 | Signed-off-by: Nishanth Menon <nm@ti.com> | ||
| 10 | --- | ||
| 11 | arch/arm/mach-omap2/omap_twl.c | 6 ++++++ | ||
| 12 | 1 files changed, 6 insertions(+), 0 deletions(-) | ||
| 13 | |||
| 14 | diff --git a/arch/arm/mach-omap2/omap_twl.c b/arch/arm/mach-omap2/omap_twl.c | ||
| 15 | index 4bc99fb..f515a1a 100644 | ||
| 16 | --- a/arch/arm/mach-omap2/omap_twl.c | ||
| 17 | +++ b/arch/arm/mach-omap2/omap_twl.c | ||
| 18 | @@ -42,8 +42,11 @@ | ||
| 19 | |||
| 20 | #define OMAP4_SRI2C_SLAVE_ADDR 0x12 | ||
| 21 | #define OMAP4_VDD_MPU_SR_VOLT_REG 0x55 | ||
| 22 | +#define OMAP4_VDD_MPU_SR_CMD_REG 0x56 | ||
| 23 | #define OMAP4_VDD_IVA_SR_VOLT_REG 0x5B | ||
| 24 | +#define OMAP4_VDD_IVA_SR_CMD_REG 0x5C | ||
| 25 | #define OMAP4_VDD_CORE_SR_VOLT_REG 0x61 | ||
| 26 | +#define OMAP4_VDD_CORE_SR_CMD_REG 0x62 | ||
| 27 | |||
| 28 | #define OMAP4_VP_CONFIG_ERROROFFSET 0x00 | ||
| 29 | #define OMAP4_VP_VSTEPMIN_VSTEPMIN 0x01 | ||
| 30 | @@ -210,6 +213,7 @@ static struct omap_voltdm_pmic omap4_mpu_pmic = { | ||
| 31 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, | ||
| 32 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, | ||
| 33 | .volt_reg_addr = OMAP4_VDD_MPU_SR_VOLT_REG, | ||
| 34 | + .cmd_reg_addr = OMAP4_VDD_MPU_SR_CMD_REG, | ||
| 35 | .i2c_high_speed = true, | ||
| 36 | .vsel_to_uv = twl6030_vsel_to_uv, | ||
| 37 | .uv_to_vsel = twl6030_uv_to_vsel, | ||
| 38 | @@ -231,6 +235,7 @@ static struct omap_voltdm_pmic omap4_iva_pmic = { | ||
| 39 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, | ||
| 40 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, | ||
| 41 | .volt_reg_addr = OMAP4_VDD_IVA_SR_VOLT_REG, | ||
| 42 | + .cmd_reg_addr = OMAP4_VDD_IVA_SR_CMD_REG, | ||
| 43 | .i2c_high_speed = true, | ||
| 44 | .vsel_to_uv = twl6030_vsel_to_uv, | ||
| 45 | .uv_to_vsel = twl6030_uv_to_vsel, | ||
| 46 | @@ -252,6 +257,7 @@ static struct omap_voltdm_pmic omap4_core_pmic = { | ||
| 47 | .vp_timeout_us = OMAP4_VP_VLIMITTO_TIMEOUT_US, | ||
| 48 | .i2c_slave_addr = OMAP4_SRI2C_SLAVE_ADDR, | ||
| 49 | .volt_reg_addr = OMAP4_VDD_CORE_SR_VOLT_REG, | ||
| 50 | + .cmd_reg_addr = OMAP4_VDD_CORE_SR_CMD_REG, | ||
| 51 | .vsel_to_uv = twl6030_vsel_to_uv, | ||
| 52 | .uv_to_vsel = twl6030_uv_to_vsel, | ||
| 53 | }; | ||
| 54 | -- | ||
| 55 | 1.7.2.5 | ||
| 56 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0001-mmc-don-t-display-single-block-read-console-messages.patch b/recipes-kernel/linux/linux-3.0/sakoman/0001-mmc-don-t-display-single-block-read-console-messages.patch deleted file mode 100644 index 8c1fabaf..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0001-mmc-don-t-display-single-block-read-console-messages.patch +++ /dev/null | |||
| @@ -1,28 +0,0 @@ | |||
| 1 | From cc8c276d530520ce822a1d0e8d748f7b9e54a2d5 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Mon, 4 Jan 2010 19:20:25 -0800 | ||
| 4 | Subject: [PATCH 01/14] mmc: don't display single block read console messages | ||
| 5 | |||
| 6 | mmc: don't display single block read console messages | ||
| 7 | --- | ||
| 8 | drivers/mmc/card/block.c | 4 ++-- | ||
| 9 | 1 files changed, 2 insertions(+), 2 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c | ||
| 12 | index f85e422..0025735 100644 | ||
| 13 | --- a/drivers/mmc/card/block.c | ||
| 14 | +++ b/drivers/mmc/card/block.c | ||
| 15 | @@ -812,8 +812,8 @@ static int mmc_blk_issue_rw_rq(struct mmc_queue *mq, struct request *req) | ||
| 16 | brq.data.error || brq.stop.error) { | ||
| 17 | if (brq.data.blocks > 1 && rq_data_dir(req) == READ) { | ||
| 18 | /* Redo read one sector at a time */ | ||
| 19 | - printk(KERN_WARNING "%s: retrying using single " | ||
| 20 | - "block read\n", req->rq_disk->disk_name); | ||
| 21 | + /* printk(KERN_WARNING "%s: retrying using single " | ||
| 22 | + "block read\n", req->rq_disk->disk_name); */ | ||
| 23 | disable_multi = 1; | ||
| 24 | continue; | ||
| 25 | } | ||
| 26 | -- | ||
| 27 | 1.7.2.5 | ||
| 28 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0002-omap-Change-omap_device-activate-dectivate-latency-m.patch b/recipes-kernel/linux/linux-3.0/sakoman/0002-omap-Change-omap_device-activate-dectivate-latency-m.patch deleted file mode 100644 index 54305bde..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0002-omap-Change-omap_device-activate-dectivate-latency-m.patch +++ /dev/null | |||
| @@ -1,49 +0,0 @@ | |||
| 1 | From a2e59d4041e8c42e21d90c0696ea8437a0cfc866 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Mon, 23 May 2011 12:16:50 -0700 | ||
| 4 | Subject: [PATCH 02/14] omap: Change omap_device activate/dectivate latency messages from pr_warning to pr_debug | ||
| 5 | |||
| 6 | Messages can be safely ignored, so reduce console noise | ||
| 7 | |||
| 8 | Signed-off-by: Steve Sakoman <steve@sakoman.com> | ||
| 9 | --- | ||
| 10 | arch/arm/plat-omap/omap_device.c | 8 ++++---- | ||
| 11 | 1 files changed, 4 insertions(+), 4 deletions(-) | ||
| 12 | |||
| 13 | diff --git a/arch/arm/plat-omap/omap_device.c b/arch/arm/plat-omap/omap_device.c | ||
| 14 | index be45147..e3d9520 100644 | ||
| 15 | --- a/arch/arm/plat-omap/omap_device.c | ||
| 16 | +++ b/arch/arm/plat-omap/omap_device.c | ||
| 17 | @@ -146,12 +146,12 @@ static int _omap_device_activate(struct omap_device *od, u8 ignore_lat) | ||
| 18 | odpl->activate_lat_worst = act_lat; | ||
| 19 | if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { | ||
| 20 | odpl->activate_lat = act_lat; | ||
| 21 | - pr_warning("omap_device: %s.%d: new worst case " | ||
| 22 | + pr_debug("omap_device: %s.%d: new worst case " | ||
| 23 | "activate latency %d: %llu\n", | ||
| 24 | od->pdev.name, od->pdev.id, | ||
| 25 | od->pm_lat_level, act_lat); | ||
| 26 | } else | ||
| 27 | - pr_warning("omap_device: %s.%d: activate " | ||
| 28 | + pr_debug("omap_device: %s.%d: activate " | ||
| 29 | "latency %d higher than exptected. " | ||
| 30 | "(%llu > %d)\n", | ||
| 31 | od->pdev.name, od->pdev.id, | ||
| 32 | @@ -214,12 +214,12 @@ static int _omap_device_deactivate(struct omap_device *od, u8 ignore_lat) | ||
| 33 | odpl->deactivate_lat_worst = deact_lat; | ||
| 34 | if (odpl->flags & OMAP_DEVICE_LATENCY_AUTO_ADJUST) { | ||
| 35 | odpl->deactivate_lat = deact_lat; | ||
| 36 | - pr_warning("omap_device: %s.%d: new worst case " | ||
| 37 | + pr_debug("omap_device: %s.%d: new worst case " | ||
| 38 | "deactivate latency %d: %llu\n", | ||
| 39 | od->pdev.name, od->pdev.id, | ||
| 40 | od->pm_lat_level, deact_lat); | ||
| 41 | } else | ||
| 42 | - pr_warning("omap_device: %s.%d: deactivate " | ||
| 43 | + pr_debug("omap_device: %s.%d: deactivate " | ||
| 44 | "latency %d higher than exptected. " | ||
| 45 | "(%llu > %d)\n", | ||
| 46 | od->pdev.name, od->pdev.id, | ||
| 47 | -- | ||
| 48 | 1.7.2.5 | ||
| 49 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0003-OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch b/recipes-kernel/linux/linux-3.0/sakoman/0003-OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch deleted file mode 100644 index 43562874..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0003-OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch +++ /dev/null | |||
| @@ -1,75 +0,0 @@ | |||
| 1 | From 630557c2785955cc0abbe4bf29b22f703a404e02 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Tue, 19 Jan 2010 21:19:15 -0800 | ||
| 4 | Subject: [PATCH 03/14] OMAP: DSS2: add bootarg for selecting svideo or composite for tv output | ||
| 5 | |||
| 6 | also add pal-16 and ntsc-16 omapfb.mode settings for 16bpp | ||
| 7 | --- | ||
| 8 | drivers/video/omap2/dss/venc.c | 22 ++++++++++++++++++++++ | ||
| 9 | drivers/video/omap2/omapfb/omapfb-main.c | 10 +++++++++- | ||
| 10 | 2 files changed, 31 insertions(+), 1 deletions(-) | ||
| 11 | |||
| 12 | diff --git a/drivers/video/omap2/dss/venc.c b/drivers/video/omap2/dss/venc.c | ||
| 13 | index 980f919..4fb594d 100644 | ||
| 14 | --- a/drivers/video/omap2/dss/venc.c | ||
| 15 | +++ b/drivers/video/omap2/dss/venc.c | ||
| 16 | @@ -85,6 +85,11 @@ | ||
| 17 | #define VENC_OUTPUT_TEST 0xC8 | ||
| 18 | #define VENC_DAC_B__DAC_C 0xC8 | ||
| 19 | |||
| 20 | +static char *tv_connection; | ||
| 21 | + | ||
| 22 | +module_param_named(tvcable, tv_connection, charp, 0); | ||
| 23 | +MODULE_PARM_DESC(tvcable, "TV connection type (svideo, composite)"); | ||
| 24 | + | ||
| 25 | struct venc_config { | ||
| 26 | u32 f_control; | ||
| 27 | u32 vidout_ctrl; | ||
| 28 | @@ -461,6 +466,23 @@ static int venc_panel_probe(struct omap_dss_device *dssdev) | ||
| 29 | { | ||
| 30 | dssdev->panel.timings = omap_dss_pal_timings; | ||
| 31 | |||
| 32 | + /* Allow the TV output to be overriden */ | ||
| 33 | + if (tv_connection) { | ||
| 34 | + if (strcmp(tv_connection, "svideo") == 0) { | ||
| 35 | + printk(KERN_INFO | ||
| 36 | + "omapdss: tv output is svideo.\n"); | ||
| 37 | + dssdev->phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO; | ||
| 38 | + } else if (strcmp(tv_connection, "composite") == 0) { | ||
| 39 | + printk(KERN_INFO | ||
| 40 | + "omapdss: tv output is composite.\n"); | ||
| 41 | + dssdev->phy.venc.type = OMAP_DSS_VENC_TYPE_COMPOSITE; | ||
| 42 | + } else { | ||
| 43 | + printk(KERN_INFO | ||
| 44 | + "omapdss: unsupported output type'%s'.\n", | ||
| 45 | + tv_connection); | ||
| 46 | + } | ||
| 47 | + } | ||
| 48 | + | ||
| 49 | return 0; | ||
| 50 | } | ||
| 51 | |||
| 52 | diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c | ||
| 53 | index 505bc12..c35c1f8 100644 | ||
| 54 | --- a/drivers/video/omap2/omapfb/omapfb-main.c | ||
| 55 | +++ b/drivers/video/omap2/omapfb/omapfb-main.c | ||
| 56 | @@ -2002,7 +2002,15 @@ static int omapfb_mode_to_timings(const char *mode_str, | ||
| 57 | int r; | ||
| 58 | |||
| 59 | #ifdef CONFIG_OMAP2_DSS_VENC | ||
| 60 | - if (strcmp(mode_str, "pal") == 0) { | ||
| 61 | + if (strcmp(mode_str, "pal-16") == 0) { | ||
| 62 | + *timings = omap_dss_pal_timings; | ||
| 63 | + *bpp = 16; | ||
| 64 | + return 0; | ||
| 65 | + } else if (strcmp(mode_str, "ntsc-16") == 0) { | ||
| 66 | + *timings = omap_dss_ntsc_timings; | ||
| 67 | + *bpp = 16; | ||
| 68 | + return 0; | ||
| 69 | + } else if (strcmp(mode_str, "pal") == 0) { | ||
| 70 | *timings = omap_dss_pal_timings; | ||
| 71 | *bpp = 24; | ||
| 72 | return 0; | ||
| 73 | -- | ||
| 74 | 1.7.2.5 | ||
| 75 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0004-mtd-nand-Eliminate-noisey-uncorrectable-error-messag.patch b/recipes-kernel/linux/linux-3.0/sakoman/0004-mtd-nand-Eliminate-noisey-uncorrectable-error-messag.patch deleted file mode 100644 index 94d629b4..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0004-mtd-nand-Eliminate-noisey-uncorrectable-error-messag.patch +++ /dev/null | |||
| @@ -1,28 +0,0 @@ | |||
| 1 | From bf974dd3f24e623f04422b8013d047d78d430f0e Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Fri, 1 Jul 2011 10:00:03 -0700 | ||
| 4 | Subject: [PATCH 04/14] mtd: nand: Eliminate noisey "uncorrectable error" messages | ||
| 5 | |||
| 6 | Other layers of the stack give more informative messages when __nand_correct_data() fails | ||
| 7 | |||
| 8 | Signed-off-by: Steve Sakoman <steve@sakoman.com> | ||
| 9 | --- | ||
| 10 | drivers/mtd/nand/nand_ecc.c | 2 +- | ||
| 11 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 12 | |||
| 13 | diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c | ||
| 14 | index 271b8e7..ad55e55 100644 | ||
| 15 | --- a/drivers/mtd/nand/nand_ecc.c | ||
| 16 | +++ b/drivers/mtd/nand/nand_ecc.c | ||
| 17 | @@ -507,7 +507,7 @@ int __nand_correct_data(unsigned char *buf, | ||
| 18 | if ((bitsperbyte[b0] + bitsperbyte[b1] + bitsperbyte[b2]) == 1) | ||
| 19 | return 1; /* error in ecc data; no action needed */ | ||
| 20 | |||
| 21 | - printk(KERN_ERR "uncorrectable error : "); | ||
| 22 | + // printk(KERN_ERR "uncorrectable error : "); | ||
| 23 | return -1; | ||
| 24 | } | ||
| 25 | EXPORT_SYMBOL(__nand_correct_data); | ||
| 26 | -- | ||
| 27 | 1.7.2.5 | ||
| 28 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0005-video-add-timings-for-hd720.patch b/recipes-kernel/linux/linux-3.0/sakoman/0005-video-add-timings-for-hd720.patch deleted file mode 100644 index 2b474d64..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0005-video-add-timings-for-hd720.patch +++ /dev/null | |||
| @@ -1,27 +0,0 @@ | |||
| 1 | From fbc33b30b663ec8c0d4374ba08f0608a7cc4b977 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Sat, 19 Dec 2009 06:52:43 -0800 | ||
| 4 | Subject: [PATCH 05/14] video: add timings for hd720 | ||
| 5 | |||
| 6 | --- | ||
| 7 | drivers/video/modedb.c | 4 ++++ | ||
| 8 | 1 files changed, 4 insertions(+), 0 deletions(-) | ||
| 9 | |||
| 10 | diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c | ||
| 11 | index cb175fe..9baead4 100644 | ||
| 12 | --- a/drivers/video/modedb.c | ||
| 13 | +++ b/drivers/video/modedb.c | ||
| 14 | @@ -103,6 +103,10 @@ static const struct fb_videomode modedb[] = { | ||
| 15 | { NULL, 70, 1024, 768, 13333, 144, 24, 29, 3, 136, 6, 0, | ||
| 16 | FB_VMODE_NONINTERLACED }, | ||
| 17 | |||
| 18 | + /* 1280x720 @ 60 Hz, 45 kHz hsync, CEA 681-E Format 4 */ | ||
| 19 | + { "hd720", 60, 1280, 720, 13468, 220, 110, 20, 5, 40, 5, 0, | ||
| 20 | + FB_VMODE_NONINTERLACED }, | ||
| 21 | + | ||
| 22 | /* 1280x1024 @ 87 Hz interlaced, 51 kHz hsync */ | ||
| 23 | { NULL, 87, 1280, 1024, 12500, 56, 16, 128, 1, 216, 12, 0, | ||
| 24 | FB_VMODE_INTERLACED }, | ||
| 25 | -- | ||
| 26 | 1.7.2.5 | ||
| 27 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0006-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch b/recipes-kernel/linux/linux-3.0/sakoman/0006-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch deleted file mode 100644 index b8fdba24..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0006-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch +++ /dev/null | |||
| @@ -1,29 +0,0 @@ | |||
| 1 | From 948bbae38457af6a11232375f9d95fc69641e9f4 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <sakoman@gmail.com> | ||
| 3 | Date: Tue, 15 Dec 2009 15:17:44 -0800 | ||
| 4 | Subject: [PATCH 06/14] drivers: net: smsc911x: return ENODEV if device is not found | ||
| 5 | |||
| 6 | Signed-off-by: Steve Sakoman <sakoman@gmail.com> | ||
| 7 | --- | ||
| 8 | drivers/net/smsc911x.c | 4 +++- | ||
| 9 | 1 files changed, 3 insertions(+), 1 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c | ||
| 12 | index c6d47d1..0c7c4a2 100644 | ||
| 13 | --- a/drivers/net/smsc911x.c | ||
| 14 | +++ b/drivers/net/smsc911x.c | ||
| 15 | @@ -2169,8 +2169,10 @@ static int __devinit smsc911x_drv_probe(struct platform_device *pdev) | ||
| 16 | pdata->ops = &shifted_smsc911x_ops; | ||
| 17 | |||
| 18 | retval = smsc911x_init(dev); | ||
| 19 | - if (retval < 0) | ||
| 20 | + if (retval < 0) { | ||
| 21 | + retval = -ENODEV; | ||
| 22 | goto out_unmap_io_3; | ||
| 23 | + } | ||
| 24 | |||
| 25 | /* configure irq polarity and type before connecting isr */ | ||
| 26 | if (pdata->config.irq_polarity == SMSC911X_IRQ_POLARITY_ACTIVE_HIGH) | ||
| 27 | -- | ||
| 28 | 1.7.2.5 | ||
| 29 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0007-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch b/recipes-kernel/linux/linux-3.0/sakoman/0007-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch deleted file mode 100644 index 158c0ad6..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0007-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch +++ /dev/null | |||
| @@ -1,45 +0,0 @@ | |||
| 1 | From 34f40fe736113c2066bf86ca163a4aff8b6d061f Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <sakoman@gmail.com> | ||
| 3 | Date: Tue, 15 Dec 2009 15:24:10 -0800 | ||
| 4 | Subject: [PATCH 07/14] drivers: input: touchscreen: ads7846: return ENODEV if device is not found | ||
| 5 | |||
| 6 | Signed-off-by: Steve Sakoman <sakoman@gmail.com> | ||
| 7 | --- | ||
| 8 | drivers/input/touchscreen/ads7846.c | 13 ++++++++++--- | ||
| 9 | 1 files changed, 10 insertions(+), 3 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c | ||
| 12 | index 5196861..b0bd1ba 100644 | ||
| 13 | --- a/drivers/input/touchscreen/ads7846.c | ||
| 14 | +++ b/drivers/input/touchscreen/ads7846.c | ||
| 15 | @@ -1349,9 +1349,16 @@ static int __devinit ads7846_probe(struct spi_device *spi) | ||
| 16 | * the touchscreen, in case it's not connected. | ||
| 17 | */ | ||
| 18 | if (ts->model == 7845) | ||
| 19 | - ads7845_read12_ser(&spi->dev, PWRDOWN); | ||
| 20 | + err = ads7845_read12_ser(&spi->dev, PWRDOWN); | ||
| 21 | else | ||
| 22 | - (void) ads7846_read12_ser(&spi->dev, READ_12BIT_SER(vaux)); | ||
| 23 | + err = ads7846_read12_ser(&spi->dev, READ_12BIT_SER(vaux)); | ||
| 24 | + | ||
| 25 | + /* if sample is all 0's or all 1's then there is no device on spi */ | ||
| 26 | + if ( (err == 0x000) || (err == 0xfff)) { | ||
| 27 | + dev_info(&spi->dev, "no device detected, test read result was 0x%08X\n", err); | ||
| 28 | + err = -ENODEV; | ||
| 29 | + goto err_free_irq; | ||
| 30 | + } | ||
| 31 | |||
| 32 | err = sysfs_create_group(&spi->dev.kobj, &ads784x_attr_group); | ||
| 33 | if (err) | ||
| 34 | @@ -1376,7 +1383,7 @@ static int __devinit ads7846_probe(struct spi_device *spi) | ||
| 35 | err_put_regulator: | ||
| 36 | regulator_put(ts->reg); | ||
| 37 | err_free_gpio: | ||
| 38 | - if (!ts->get_pendown_state) | ||
| 39 | + if (!ts->get_pendown_state && ts->gpio_pendown != -1) | ||
| 40 | gpio_free(ts->gpio_pendown); | ||
| 41 | err_cleanup_filter: | ||
| 42 | if (ts->filter_cleanup) | ||
| 43 | -- | ||
| 44 | 1.7.2.5 | ||
| 45 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0008-Revert-omap2_mcspi-Flush-posted-writes.patch b/recipes-kernel/linux/linux-3.0/sakoman/0008-Revert-omap2_mcspi-Flush-posted-writes.patch deleted file mode 100644 index 8058b5c3..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0008-Revert-omap2_mcspi-Flush-posted-writes.patch +++ /dev/null | |||
| @@ -1,27 +0,0 @@ | |||
| 1 | From baf40f002836b7c0fe9aeeba92ba483f6e9d2384 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Thu, 3 Mar 2011 13:29:30 -0800 | ||
| 4 | Subject: [PATCH 08/14] Revert "omap2_mcspi: Flush posted writes" | ||
| 5 | |||
| 6 | This reverts commit a330ce2001b290c59fe98c37e981683ef0a75fdf. | ||
| 7 | |||
| 8 | The above commit breaks the ads7846 driver | ||
| 9 | --- | ||
| 10 | drivers/spi/omap2_mcspi.c | 1 - | ||
| 11 | 1 files changed, 0 insertions(+), 1 deletions(-) | ||
| 12 | |||
| 13 | diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c | ||
| 14 | index 969cdd2..da981ee 100644 | ||
| 15 | --- a/drivers/spi/omap2_mcspi.c | ||
| 16 | +++ b/drivers/spi/omap2_mcspi.c | ||
| 17 | @@ -195,7 +195,6 @@ static inline void mcspi_write_chconf0(const struct spi_device *spi, u32 val) | ||
| 18 | |||
| 19 | cs->chconf0 = val; | ||
| 20 | mcspi_write_cs_reg(spi, OMAP2_MCSPI_CHCONF0, val); | ||
| 21 | - mcspi_read_cs_reg(spi, OMAP2_MCSPI_CHCONF0); | ||
| 22 | } | ||
| 23 | |||
| 24 | static void omap2_mcspi_set_dma_req(const struct spi_device *spi, | ||
| 25 | -- | ||
| 26 | 1.7.2.5 | ||
| 27 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0009-rtc-twl-Use-threaded-IRQ-remove-IRQ-enable-in-interr.patch b/recipes-kernel/linux/linux-3.0/sakoman/0009-rtc-twl-Use-threaded-IRQ-remove-IRQ-enable-in-interr.patch deleted file mode 100644 index 220f9749..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0009-rtc-twl-Use-threaded-IRQ-remove-IRQ-enable-in-interr.patch +++ /dev/null | |||
| @@ -1,57 +0,0 @@ | |||
| 1 | From 3532a9ceb9eb81147eab751b8c124b59acc87374 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Todd Poynor <toddpoynor@google.com> | ||
| 3 | Date: Wed, 27 Jul 2011 07:07:20 +0000 | ||
| 4 | Subject: [PATCH 09/14] rtc: twl: Use threaded IRQ, remove IRQ enable in interrupt handler | ||
| 5 | |||
| 6 | IRQs disabled on entry to twl_rtc_interrupt is not a consequence | ||
| 7 | of LOCKDEP; both twl6030 and twl4030 explicitly disable IRQs | ||
| 8 | before calling the module IRQ handlers. | ||
| 9 | |||
| 10 | The ISR should not be enabling IRQs; use a threaded IRQ handler | ||
| 11 | instead. | ||
| 12 | |||
| 13 | Also fixes warnings: | ||
| 14 | |||
| 15 | WARNING: at kernel/irq/handle.c:130 handle_irq_event_percpu+nnn | ||
| 16 | irq nnn handler twl_rtc_interrupt+nnn enabled interrupts | ||
| 17 | |||
| 18 | Signed-off-by: Todd Poynor <toddpoynor@google.com> | ||
| 19 | --- | ||
| 20 | drivers/rtc/rtc-twl.c | 14 +++----------- | ||
| 21 | 1 files changed, 3 insertions(+), 11 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c | ||
| 24 | index f9a2799..3fee95e 100644 | ||
| 25 | --- a/drivers/rtc/rtc-twl.c | ||
| 26 | +++ b/drivers/rtc/rtc-twl.c | ||
| 27 | @@ -362,14 +362,6 @@ static irqreturn_t twl_rtc_interrupt(int irq, void *rtc) | ||
| 28 | int res; | ||
| 29 | u8 rd_reg; | ||
| 30 | |||
| 31 | -#ifdef CONFIG_LOCKDEP | ||
| 32 | - /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which | ||
| 33 | - * we don't want and can't tolerate. Although it might be | ||
| 34 | - * friendlier not to borrow this thread context... | ||
| 35 | - */ | ||
| 36 | - local_irq_enable(); | ||
| 37 | -#endif | ||
| 38 | - | ||
| 39 | res = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); | ||
| 40 | if (res) | ||
| 41 | goto out; | ||
| 42 | @@ -462,9 +454,9 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) | ||
| 43 | if (ret < 0) | ||
| 44 | goto out1; | ||
| 45 | |||
| 46 | - ret = request_irq(irq, twl_rtc_interrupt, | ||
| 47 | - IRQF_TRIGGER_RISING, | ||
| 48 | - dev_name(&rtc->dev), rtc); | ||
| 49 | + ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, | ||
| 50 | + IRQF_TRIGGER_RISING, | ||
| 51 | + dev_name(&rtc->dev), rtc); | ||
| 52 | if (ret < 0) { | ||
| 53 | dev_err(&pdev->dev, "IRQ is not free.\n"); | ||
| 54 | goto out1; | ||
| 55 | -- | ||
| 56 | 1.7.2.5 | ||
| 57 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0010-rtc-twl-Fix-registration-vs.-init-order.patch b/recipes-kernel/linux/linux-3.0/sakoman/0010-rtc-twl-Fix-registration-vs.-init-order.patch deleted file mode 100644 index d710643a..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0010-rtc-twl-Fix-registration-vs.-init-order.patch +++ /dev/null | |||
| @@ -1,122 +0,0 @@ | |||
| 1 | From 2cc62887b37d504df009d7241e6cebc3c65c32a5 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Todd Poynor <toddpoynor@google.com> | ||
| 3 | Date: Wed, 27 Jul 2011 07:07:21 +0000 | ||
| 4 | Subject: [PATCH 10/14] rtc: twl: Fix registration vs. init order | ||
| 5 | |||
| 6 | Only register as an RTC device after the hardware has been | ||
| 7 | successfully initialized. The RTC class driver will call | ||
| 8 | back to this driver to read a pending alarm, and other | ||
| 9 | drivers watching for new devices on the RTC class may | ||
| 10 | read the RTC time upon registration. Such access might | ||
| 11 | occur while the RTC is stopped, prior to clearing | ||
| 12 | pending alarms, etc. | ||
| 13 | |||
| 14 | The new ordering also avoids leaving the platform | ||
| 15 | device drvdata set to an unregistered struct rtc_device * | ||
| 16 | on probe errors. | ||
| 17 | |||
| 18 | Signed-off-by: Todd Poynor <toddpoynor@google.com> | ||
| 19 | --- | ||
| 20 | drivers/rtc/rtc-twl.c | 52 ++++++++++++++++++++++-------------------------- | ||
| 21 | 1 files changed, 24 insertions(+), 28 deletions(-) | ||
| 22 | |||
| 23 | diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c | ||
| 24 | index 3fee95e..a64494e 100644 | ||
| 25 | --- a/drivers/rtc/rtc-twl.c | ||
| 26 | +++ b/drivers/rtc/rtc-twl.c | ||
| 27 | @@ -420,24 +420,12 @@ static struct rtc_class_ops twl_rtc_ops = { | ||
| 28 | static int __devinit twl_rtc_probe(struct platform_device *pdev) | ||
| 29 | { | ||
| 30 | struct rtc_device *rtc; | ||
| 31 | - int ret = 0; | ||
| 32 | + int ret = -EINVAL; | ||
| 33 | int irq = platform_get_irq(pdev, 0); | ||
| 34 | u8 rd_reg; | ||
| 35 | |||
| 36 | if (irq <= 0) | ||
| 37 | - return -EINVAL; | ||
| 38 | - | ||
| 39 | - rtc = rtc_device_register(pdev->name, | ||
| 40 | - &pdev->dev, &twl_rtc_ops, THIS_MODULE); | ||
| 41 | - if (IS_ERR(rtc)) { | ||
| 42 | - ret = PTR_ERR(rtc); | ||
| 43 | - dev_err(&pdev->dev, "can't register RTC device, err %ld\n", | ||
| 44 | - PTR_ERR(rtc)); | ||
| 45 | - goto out0; | ||
| 46 | - | ||
| 47 | - } | ||
| 48 | - | ||
| 49 | - platform_set_drvdata(pdev, rtc); | ||
| 50 | + goto out1; | ||
| 51 | |||
| 52 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG); | ||
| 53 | if (ret < 0) | ||
| 54 | @@ -454,14 +442,6 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) | ||
| 55 | if (ret < 0) | ||
| 56 | goto out1; | ||
| 57 | |||
| 58 | - ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, | ||
| 59 | - IRQF_TRIGGER_RISING, | ||
| 60 | - dev_name(&rtc->dev), rtc); | ||
| 61 | - if (ret < 0) { | ||
| 62 | - dev_err(&pdev->dev, "IRQ is not free.\n"); | ||
| 63 | - goto out1; | ||
| 64 | - } | ||
| 65 | - | ||
| 66 | if (twl_class_is_6030()) { | ||
| 67 | twl6030_interrupt_unmask(TWL6030_RTC_INT_MASK, | ||
| 68 | REG_INT_MSK_LINE_A); | ||
| 69 | @@ -472,28 +452,44 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) | ||
| 70 | /* Check RTC module status, Enable if it is off */ | ||
| 71 | ret = twl_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG); | ||
| 72 | if (ret < 0) | ||
| 73 | - goto out2; | ||
| 74 | + goto out1; | ||
| 75 | |||
| 76 | if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) { | ||
| 77 | dev_info(&pdev->dev, "Enabling TWL-RTC.\n"); | ||
| 78 | rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M; | ||
| 79 | ret = twl_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG); | ||
| 80 | if (ret < 0) | ||
| 81 | - goto out2; | ||
| 82 | + goto out1; | ||
| 83 | } | ||
| 84 | |||
| 85 | /* init cached IRQ enable bits */ | ||
| 86 | ret = twl_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG); | ||
| 87 | if (ret < 0) | ||
| 88 | + goto out1; | ||
| 89 | + | ||
| 90 | + rtc = rtc_device_register(pdev->name, | ||
| 91 | + &pdev->dev, &twl_rtc_ops, THIS_MODULE); | ||
| 92 | + if (IS_ERR(rtc)) { | ||
| 93 | + ret = PTR_ERR(rtc); | ||
| 94 | + dev_err(&pdev->dev, "can't register RTC device, err %ld\n", | ||
| 95 | + PTR_ERR(rtc)); | ||
| 96 | + goto out1; | ||
| 97 | + } | ||
| 98 | + | ||
| 99 | + ret = request_threaded_irq(irq, NULL, twl_rtc_interrupt, | ||
| 100 | + IRQF_TRIGGER_RISING, | ||
| 101 | + dev_name(&rtc->dev), rtc); | ||
| 102 | + if (ret < 0) { | ||
| 103 | + dev_err(&pdev->dev, "IRQ is not free.\n"); | ||
| 104 | goto out2; | ||
| 105 | + } | ||
| 106 | |||
| 107 | - return ret; | ||
| 108 | + platform_set_drvdata(pdev, rtc); | ||
| 109 | + return 0; | ||
| 110 | |||
| 111 | out2: | ||
| 112 | - free_irq(irq, rtc); | ||
| 113 | -out1: | ||
| 114 | rtc_device_unregister(rtc); | ||
| 115 | -out0: | ||
| 116 | +out1: | ||
| 117 | return ret; | ||
| 118 | } | ||
| 119 | |||
| 120 | -- | ||
| 121 | 1.7.2.5 | ||
| 122 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0011-soc-codecs-Enable-audio-capture-by-default-for-twl40.patch b/recipes-kernel/linux/linux-3.0/sakoman/0011-soc-codecs-Enable-audio-capture-by-default-for-twl40.patch deleted file mode 100644 index 4a903b2a..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0011-soc-codecs-Enable-audio-capture-by-default-for-twl40.patch +++ /dev/null | |||
| @@ -1,27 +0,0 @@ | |||
| 1 | From 76ab79b5491dd823477cd181b57795aa6b55f53c Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Thu, 17 Dec 2009 12:45:20 -0800 | ||
| 4 | Subject: [PATCH 11/14] soc: codecs: Enable audio capture by default for twl4030 | ||
| 5 | |||
| 6 | --- | ||
| 7 | sound/soc/codecs/twl4030.c | 4 ++-- | ||
| 8 | 1 files changed, 2 insertions(+), 2 deletions(-) | ||
| 9 | |||
| 10 | diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c | ||
| 11 | index bec788b..158ea04 100644 | ||
| 12 | --- a/sound/soc/codecs/twl4030.c | ||
| 13 | +++ b/sound/soc/codecs/twl4030.c | ||
| 14 | @@ -55,8 +55,8 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { | ||
| 15 | 0x00, /* REG_OPTION (0x2) */ | ||
| 16 | 0x00, /* REG_UNKNOWN (0x3) */ | ||
| 17 | 0x00, /* REG_MICBIAS_CTL (0x4) */ | ||
| 18 | - 0x00, /* REG_ANAMICL (0x5) */ | ||
| 19 | - 0x00, /* REG_ANAMICR (0x6) */ | ||
| 20 | + 0x34, /* REG_ANAMICL (0x5) */ | ||
| 21 | + 0x14, /* REG_ANAMICR (0x6) */ | ||
| 22 | 0x00, /* REG_AVADC_CTL (0x7) */ | ||
| 23 | 0x00, /* REG_ADCMICSEL (0x8) */ | ||
| 24 | 0x00, /* REG_DIGMIXING (0x9) */ | ||
| 25 | -- | ||
| 26 | 1.7.2.5 | ||
| 27 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0012-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch b/recipes-kernel/linux/linux-3.0/sakoman/0012-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch deleted file mode 100644 index 199a0f03..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0012-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch +++ /dev/null | |||
| @@ -1,25 +0,0 @@ | |||
| 1 | From 31ec83c7092588f41b69e024f0ddd585c1981094 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Wed, 29 Dec 2010 11:39:16 -0800 | ||
| 4 | Subject: [PATCH 12/14] soc: codecs: twl4030: Turn on mic bias by default | ||
| 5 | |||
| 6 | --- | ||
| 7 | sound/soc/codecs/twl4030.c | 2 +- | ||
| 8 | 1 files changed, 1 insertions(+), 1 deletions(-) | ||
| 9 | |||
| 10 | diff --git a/sound/soc/codecs/twl4030.c b/sound/soc/codecs/twl4030.c | ||
| 11 | index 158ea04..9bbf301 100644 | ||
| 12 | --- a/sound/soc/codecs/twl4030.c | ||
| 13 | +++ b/sound/soc/codecs/twl4030.c | ||
| 14 | @@ -54,7 +54,7 @@ static const u8 twl4030_reg[TWL4030_CACHEREGNUM] = { | ||
| 15 | 0x00, /* REG_CODEC_MODE (0x1) */ | ||
| 16 | 0x00, /* REG_OPTION (0x2) */ | ||
| 17 | 0x00, /* REG_UNKNOWN (0x3) */ | ||
| 18 | - 0x00, /* REG_MICBIAS_CTL (0x4) */ | ||
| 19 | + 0x03, /* REG_MICBIAS_CTL (0x4) */ | ||
| 20 | 0x34, /* REG_ANAMICL (0x5) */ | ||
| 21 | 0x14, /* REG_ANAMICR (0x6) */ | ||
| 22 | 0x00, /* REG_AVADC_CTL (0x7) */ | ||
| 23 | -- | ||
| 24 | 1.7.2.5 | ||
| 25 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0013-omap-mmc-twl4030-move-clock-input-selection-prior-to.patch b/recipes-kernel/linux/linux-3.0/sakoman/0013-omap-mmc-twl4030-move-clock-input-selection-prior-to.patch deleted file mode 100644 index 016323de..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0013-omap-mmc-twl4030-move-clock-input-selection-prior-to.patch +++ /dev/null | |||
| @@ -1,39 +0,0 @@ | |||
| 1 | From 23d7e04b5d71feafdd920f4bf4b735cc452fef59 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Sun, 24 Jan 2010 09:33:56 -0800 | ||
| 4 | Subject: [PATCH 13/14] omap: mmc-twl4030: move clock input selection prior to vcc test | ||
| 5 | |||
| 6 | otherwise it is not executed on systems that use non-twl regulators | ||
| 7 | --- | ||
| 8 | arch/arm/mach-omap2/hsmmc.c | 14 ++++++-------- | ||
| 9 | 1 files changed, 6 insertions(+), 8 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/arch/arm/mach-omap2/hsmmc.c b/arch/arm/mach-omap2/hsmmc.c | ||
| 12 | index 66868c5..48a6cfb 100644 | ||
| 13 | --- a/arch/arm/mach-omap2/hsmmc.c | ||
| 14 | +++ b/arch/arm/mach-omap2/hsmmc.c | ||
| 15 | @@ -192,15 +192,13 @@ static void hsmmc23_before_set_reg(struct device *dev, int slot, | ||
| 16 | if (mmc->slots[0].remux) | ||
| 17 | mmc->slots[0].remux(dev, slot, power_on); | ||
| 18 | |||
| 19 | - if (power_on) { | ||
| 20 | - /* Only MMC2 supports a CLKIN */ | ||
| 21 | - if (mmc->slots[0].internal_clock) { | ||
| 22 | - u32 reg; | ||
| 23 | + /* Only MMC2 supports a CLKIN */ | ||
| 24 | + if (mmc->slots[0].internal_clock) { | ||
| 25 | + u32 reg; | ||
| 26 | |||
| 27 | - reg = omap_ctrl_readl(control_devconf1_offset); | ||
| 28 | - reg |= OMAP2_MMCSDIO2ADPCLKISEL; | ||
| 29 | - omap_ctrl_writel(reg, control_devconf1_offset); | ||
| 30 | - } | ||
| 31 | + reg = omap_ctrl_readl(control_devconf1_offset); | ||
| 32 | + reg |= OMAP2_MMCSDIO2ADPCLKISEL; | ||
| 33 | + omap_ctrl_writel(reg, control_devconf1_offset); | ||
| 34 | } | ||
| 35 | } | ||
| 36 | |||
| 37 | -- | ||
| 38 | 1.7.2.5 | ||
| 39 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sakoman/0014-rtc-twl-add-support-for-backup-battery-recharge.patch b/recipes-kernel/linux/linux-3.0/sakoman/0014-rtc-twl-add-support-for-backup-battery-recharge.patch deleted file mode 100644 index f44b3d05..00000000 --- a/recipes-kernel/linux/linux-3.0/sakoman/0014-rtc-twl-add-support-for-backup-battery-recharge.patch +++ /dev/null | |||
| @@ -1,57 +0,0 @@ | |||
| 1 | From 55f8fd15557b03c2b336c8214d44de9753d0ba5f Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Steve Sakoman <steve@sakoman.com> | ||
| 3 | Date: Thu, 4 Feb 2010 12:26:22 -0800 | ||
| 4 | Subject: [PATCH 14/14] rtc-twl: add support for backup battery recharge | ||
| 5 | |||
| 6 | --- | ||
| 7 | drivers/rtc/rtc-twl.c | 27 ++++++++++++++++++++++++++- | ||
| 8 | 1 files changed, 26 insertions(+), 1 deletions(-) | ||
| 9 | |||
| 10 | diff --git a/drivers/rtc/rtc-twl.c b/drivers/rtc/rtc-twl.c | ||
| 11 | index a64494e..552446b 100644 | ||
| 12 | --- a/drivers/rtc/rtc-twl.c | ||
| 13 | +++ b/drivers/rtc/rtc-twl.c | ||
| 14 | @@ -30,7 +30,24 @@ | ||
| 15 | |||
| 16 | #include <linux/i2c/twl.h> | ||
| 17 | |||
| 18 | - | ||
| 19 | +/* | ||
| 20 | + * PM_RECEIVER block register offsets (use TWL4030_MODULE_PM_RECEIVER) | ||
| 21 | + */ | ||
| 22 | +#define REG_BB_CFG 0x12 | ||
| 23 | + | ||
| 24 | +/* PM_RECEIVER BB_CFG bitfields */ | ||
| 25 | +#define BIT_PM_RECEIVER_BB_CFG_BBCHEN 0x10 | ||
| 26 | +#define BIT_PM_RECEIVER_BB_CFG_BBSEL 0x0C | ||
| 27 | +#define BIT_PM_RECEIVER_BB_CFG_BBSEL_2V5 0x00 | ||
| 28 | +#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V0 0x04 | ||
| 29 | +#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 0x08 | ||
| 30 | +#define BIT_PM_RECEIVER_BB_CFG_BBSEL_3v2 0x0c | ||
| 31 | +#define BIT_PM_RECEIVER_BB_CFG_BBISEL 0x03 | ||
| 32 | +#define BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA 0x00 | ||
| 33 | +#define BIT_PM_RECEIVER_BB_CFG_BBISEL_150UA 0x01 | ||
| 34 | +#define BIT_PM_RECEIVER_BB_CFG_BBISEL_500UA 0x02 | ||
| 35 | +#define BIT_PM_RECEIVER_BB_CFG_BBISEL_1MA 0x03 | ||
| 36 | + | ||
| 37 | /* | ||
| 38 | * RTC block register offsets (use TWL_MODULE_RTC) | ||
| 39 | */ | ||
| 40 | @@ -484,6 +501,14 @@ static int __devinit twl_rtc_probe(struct platform_device *pdev) | ||
| 41 | goto out2; | ||
| 42 | } | ||
| 43 | |||
| 44 | + /* enable backup battery charging */ | ||
| 45 | + /* use a conservative 25uA @ 3.1V */ | ||
| 46 | + ret = twl_i2c_write_u8(TWL4030_MODULE_PM_RECEIVER, | ||
| 47 | + BIT_PM_RECEIVER_BB_CFG_BBCHEN | | ||
| 48 | + BIT_PM_RECEIVER_BB_CFG_BBSEL_3V1 | | ||
| 49 | + BIT_PM_RECEIVER_BB_CFG_BBISEL_25UA, | ||
| 50 | + REG_BB_CFG); | ||
| 51 | + | ||
| 52 | platform_set_drvdata(pdev, rtc); | ||
| 53 | return 0; | ||
| 54 | |||
| 55 | -- | ||
| 56 | 1.7.2.5 | ||
| 57 | |||
diff --git a/recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch b/recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch deleted file mode 100644 index 62217d28..00000000 --- a/recipes-kernel/linux/linux-3.0/sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch +++ /dev/null | |||
| @@ -1,67 +0,0 @@ | |||
| 1 | From 867025d0468dedea5303d1088b292ace4d01c047 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Vikram Pandita <vikram.pandita@ti.com> | ||
| 3 | Date: Tue, 31 May 2011 09:24:58 +0100 | ||
| 4 | Subject: [PATCH] ARM: L2: Add and export outer_clean_all | ||
| 5 | |||
| 6 | The Errata 588369 and 539766 demands that clean all operation be done | ||
| 7 | as clean each way at a time | ||
| 8 | |||
| 9 | This patch also raps the implementation under the CONFIG errata | ||
| 10 | macro so that for non-errata version silicon it can be disabled | ||
| 11 | |||
| 12 | Signed-off-by: Vikram Pandita <vikram.pandita@ti.com> | ||
| 13 | Cc: Santosh Shilimkar <santosh.shilimkar@ti.com> | ||
| 14 | Cc: Woodruff, Richard <r-woodruff2@ti.com> | ||
| 15 | --- | ||
| 16 | arch/arm/include/asm/outercache.h | 8 ++++++++ | ||
| 17 | arch/arm/mm/cache-l2x0.c | 1 + | ||
| 18 | 2 files changed, 9 insertions(+), 0 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/arch/arm/include/asm/outercache.h b/arch/arm/include/asm/outercache.h | ||
| 21 | index d838743..fa8cbd8 100644 | ||
| 22 | --- a/arch/arm/include/asm/outercache.h | ||
| 23 | +++ b/arch/arm/include/asm/outercache.h | ||
| 24 | @@ -28,6 +28,7 @@ struct outer_cache_fns { | ||
| 25 | void (*clean_range)(unsigned long, unsigned long); | ||
| 26 | void (*flush_range)(unsigned long, unsigned long); | ||
| 27 | void (*flush_all)(void); | ||
| 28 | + void (*clean_all)(void); | ||
| 29 | void (*inv_all)(void); | ||
| 30 | void (*disable)(void); | ||
| 31 | #ifdef CONFIG_OUTER_CACHE_SYNC | ||
| 32 | @@ -61,6 +62,11 @@ static inline void outer_flush_all(void) | ||
| 33 | if (outer_cache.flush_all) | ||
| 34 | outer_cache.flush_all(); | ||
| 35 | } | ||
| 36 | +static inline void outer_clean_all(void) | ||
| 37 | +{ | ||
| 38 | + if (outer_cache.clean_all) | ||
| 39 | + outer_cache.clean_all(); | ||
| 40 | +} | ||
| 41 | |||
| 42 | static inline void outer_inv_all(void) | ||
| 43 | { | ||
| 44 | @@ -97,6 +103,8 @@ static inline void outer_sync(void) | ||
| 45 | #else | ||
| 46 | static inline void outer_sync(void) | ||
| 47 | { } | ||
| 48 | +static inline void outer_clean_all(void) | ||
| 49 | +{ } | ||
| 50 | #endif | ||
| 51 | |||
| 52 | #endif /* __ASM_OUTERCACHE_H */ | ||
| 53 | diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c | ||
| 54 | index 44c0867..10b79d6 100644 | ||
| 55 | --- a/arch/arm/mm/cache-l2x0.c | ||
| 56 | +++ b/arch/arm/mm/cache-l2x0.c | ||
| 57 | @@ -346,6 +346,7 @@ void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | ||
| 58 | outer_cache.inv_all = l2x0_inv_all; | ||
| 59 | outer_cache.disable = l2x0_disable; | ||
| 60 | outer_cache.set_debug = l2x0_set_debug; | ||
| 61 | + outer_cache.clean_all = l2x0_clean_all; | ||
| 62 | |||
| 63 | printk(KERN_INFO "%s cache controller enabled\n", type); | ||
| 64 | printk(KERN_INFO "l2x0: %d ways, CACHE_ID 0x%08x, AUX_CTRL 0x%08x, Cache size: %d B\n", | ||
| 65 | -- | ||
| 66 | 1.7.2.5 | ||
| 67 | |||
diff --git a/recipes-kernel/linux/linux-3.0/ulcd/0001-OMAP_VOUT-Fix-build-break-caused-by-update_mode-remo.patch b/recipes-kernel/linux/linux-3.0/ulcd/0001-OMAP_VOUT-Fix-build-break-caused-by-update_mode-remo.patch deleted file mode 100644 index 44bb6b8f..00000000 --- a/recipes-kernel/linux/linux-3.0/ulcd/0001-OMAP_VOUT-Fix-build-break-caused-by-update_mode-remo.patch +++ /dev/null | |||
| @@ -1,44 +0,0 @@ | |||
| 1 | From 9e3cacdf6fb8c5d704c9fb98f744eddbb25e3cda Mon Sep 17 00:00:00 2001 | ||
| 2 | From: archit taneja <archit@ti.com> | ||
| 3 | Date: Fri, 5 Aug 2011 07:19:21 +0000 | ||
| 4 | Subject: [PATCH 1/4] OMAP_VOUT: Fix build break caused by update_mode removal in DSS2 | ||
| 5 | |||
| 6 | The DSS2 driver does not support the configuration of the update_mode of a | ||
| 7 | panel anymore. Remove the setting of update_mode done in omap_vout_probe(). | ||
| 8 | Ignore configuration of TE since omap_vout driver doesn't support manual update | ||
| 9 | displays anyway. | ||
| 10 | |||
| 11 | Signed-off-by: Archit Taneja <archit@ti.com> | ||
| 12 | Tested-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 13 | Signed-off-by: Vaibhav Hiremath <hvaibhav@ti.com> | ||
| 14 | --- | ||
| 15 | drivers/media/video/omap/omap_vout.c | 13 ------------- | ||
| 16 | 1 files changed, 0 insertions(+), 13 deletions(-) | ||
| 17 | |||
| 18 | diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c | ||
| 19 | index 4d07c58..d17d6b6 100644 | ||
| 20 | --- a/drivers/media/video/omap/omap_vout.c | ||
| 21 | +++ b/drivers/media/video/omap/omap_vout.c | ||
| 22 | @@ -2557,19 +2557,6 @@ static int __init omap_vout_probe(struct platform_device *pdev) | ||
| 23 | "'%s' Display already enabled\n", | ||
| 24 | def_display->name); | ||
| 25 | } | ||
| 26 | - /* set the update mode */ | ||
| 27 | - if (def_display->caps & | ||
| 28 | - OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) { | ||
| 29 | - if (dssdrv->enable_te) | ||
| 30 | - dssdrv->enable_te(def_display, 0); | ||
| 31 | - if (dssdrv->set_update_mode) | ||
| 32 | - dssdrv->set_update_mode(def_display, | ||
| 33 | - OMAP_DSS_UPDATE_MANUAL); | ||
| 34 | - } else { | ||
| 35 | - if (dssdrv->set_update_mode) | ||
| 36 | - dssdrv->set_update_mode(def_display, | ||
| 37 | - OMAP_DSS_UPDATE_AUTO); | ||
| 38 | - } | ||
| 39 | } | ||
| 40 | } | ||
| 41 | |||
| 42 | -- | ||
| 43 | 1.7.2.5 | ||
| 44 | |||
diff --git a/recipes-kernel/linux/linux-3.0/ulcd/0002-WIP-omap-beagleboard-add-bbtoys-ulcd-lite-support.patch b/recipes-kernel/linux/linux-3.0/ulcd/0002-WIP-omap-beagleboard-add-bbtoys-ulcd-lite-support.patch deleted file mode 100644 index 1b3d1ffd..00000000 --- a/recipes-kernel/linux/linux-3.0/ulcd/0002-WIP-omap-beagleboard-add-bbtoys-ulcd-lite-support.patch +++ /dev/null | |||
| @@ -1,235 +0,0 @@ | |||
| 1 | From ba0b157d461f6b8fe61e232e92ea7ee656ad5ecb Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Jason Kridner <jdk@ti.com> | ||
| 3 | Date: Mon, 12 Sep 2011 10:28:14 -0400 | ||
| 4 | Subject: [PATCH 2/4] WIP: omap: beagleboard: add bbtoys ulcd-lite support | ||
| 5 | |||
| 6 | Added support for the BeagleBoardToys ULCD-Lite. | ||
| 7 | * Added ThreeFiveCorp s9700rtwv35tr-01b panel to | ||
| 8 | panel-generic-dpi driver. | ||
| 9 | * Added TSC2007 and LCD panel to board file. | ||
| 10 | |||
| 11 | Relied heavily on the TSC2007 integration work done by | ||
| 12 | John Weber and panel timings from Roger Monk. | ||
| 13 | |||
| 14 | Signed-off-by: Jason Kridner <jdk@ti.com> | ||
| 15 | Cc: John Weber <rjohnweber@gmail.com> | ||
| 16 | Cc: Roger Monk <r-monk@ti.com> | ||
| 17 | Cc: Joel A Fernandes <agnel.joel@gmail.com> | ||
| 18 | Cc: Koen Kooi <koen@dominion.thruhere.net> | ||
| 19 | --- | ||
| 20 | arch/arm/mach-omap2/board-omap3beagle.c | 112 ++++++++++++++++++++++ | ||
| 21 | drivers/video/omap2/displays/panel-generic-dpi.c | 25 +++++ | ||
| 22 | 2 files changed, 137 insertions(+), 0 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 25 | index 0124060..8b30b4c 100644 | ||
| 26 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 27 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 28 | @@ -35,6 +35,7 @@ | ||
| 29 | #include <linux/i2c/twl.h> | ||
| 30 | #include <linux/netdevice.h> | ||
| 31 | #include <linux/if_ether.h> | ||
| 32 | +#include <linux/i2c/tsc2007.h> | ||
| 33 | |||
| 34 | #include <mach/hardware.h> | ||
| 35 | #include <asm/mach-types.h> | ||
| 36 | @@ -87,11 +88,15 @@ static struct { | ||
| 37 | int usb_pwr_level; | ||
| 38 | int reset_gpio; | ||
| 39 | int usr_button_gpio; | ||
| 40 | + char *lcd_driver_name; | ||
| 41 | + int lcd_pwren; | ||
| 42 | } beagle_config = { | ||
| 43 | .mmc1_gpio_wp = -EINVAL, | ||
| 44 | .usb_pwr_level = GPIOF_OUT_INIT_LOW, | ||
| 45 | .reset_gpio = 129, | ||
| 46 | .usr_button_gpio = 4, | ||
| 47 | + .lcd_driver_name = "", | ||
| 48 | + .lcd_pwren = 156 | ||
| 49 | }; | ||
| 50 | |||
| 51 | /* | ||
| 52 | @@ -471,9 +476,53 @@ static struct omap_dss_device beagle_tv_device = { | ||
| 53 | .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO, | ||
| 54 | }; | ||
| 55 | |||
| 56 | +static int beagle_enable_lcd(struct omap_dss_device *dssdev) | ||
| 57 | +{ | ||
| 58 | + if (gpio_is_valid(beagle_config.lcd_pwren)) { | ||
| 59 | + printk(KERN_INFO "%s: Enabling LCD\n", __FUNCTION__); | ||
| 60 | + gpio_set_value(beagle_config.lcd_pwren, 0); | ||
| 61 | + } else { | ||
| 62 | + printk(KERN_INFO "%s: Invalid LCD enable GPIO: %d\n", | ||
| 63 | + __FUNCTION__, beagle_config.lcd_pwren); | ||
| 64 | + } | ||
| 65 | + | ||
| 66 | + return 0; | ||
| 67 | +} | ||
| 68 | + | ||
| 69 | +static void beagle_disable_lcd(struct omap_dss_device *dssdev) | ||
| 70 | +{ | ||
| 71 | + if (gpio_is_valid(beagle_config.lcd_pwren)) { | ||
| 72 | + printk(KERN_INFO "%s: Disabling LCD\n", __FUNCTION__); | ||
| 73 | + gpio_set_value(beagle_config.lcd_pwren, 1); | ||
| 74 | + } else { | ||
| 75 | + printk(KERN_INFO "%s: Invalid LCD enable GPIO: %d\n", | ||
| 76 | + __FUNCTION__, beagle_config.lcd_pwren); | ||
| 77 | + } | ||
| 78 | + | ||
| 79 | + return; | ||
| 80 | +} | ||
| 81 | + | ||
| 82 | +static struct panel_generic_dpi_data lcd_panel = { | ||
| 83 | + .name = "tfc_s9700rtwv35tr-01b", | ||
| 84 | + .platform_enable = beagle_enable_lcd, | ||
| 85 | + .platform_disable = beagle_disable_lcd, | ||
| 86 | +}; | ||
| 87 | + | ||
| 88 | +static struct omap_dss_device beagle_lcd_device = { | ||
| 89 | + .type = OMAP_DISPLAY_TYPE_DPI, | ||
| 90 | + .name = "lcd", | ||
| 91 | + .driver_name = "generic_dpi_panel", | ||
| 92 | + .phy.dpi.data_lines = 24, | ||
| 93 | + .platform_enable = beagle_enable_lcd, | ||
| 94 | + .platform_disable = beagle_disable_lcd, | ||
| 95 | + .reset_gpio = -EINVAL, | ||
| 96 | + .data = &lcd_panel, | ||
| 97 | +}; | ||
| 98 | + | ||
| 99 | static struct omap_dss_device *beagle_dss_devices[] = { | ||
| 100 | &beagle_dvi_device, | ||
| 101 | &beagle_tv_device, | ||
| 102 | + &beagle_lcd_device, | ||
| 103 | }; | ||
| 104 | |||
| 105 | static struct omap_dss_board_info beagle_dss_data = { | ||
| 106 | @@ -490,6 +539,11 @@ static void __init beagle_display_init(void) | ||
| 107 | "DVI reset"); | ||
| 108 | if (r < 0) | ||
| 109 | printk(KERN_ERR "Unable to get DVI reset GPIO\n"); | ||
| 110 | + | ||
| 111 | + r = gpio_request_one(beagle_config.lcd_pwren, GPIOF_OUT_INIT_LOW, | ||
| 112 | + "LCD power"); | ||
| 113 | + if (r < 0) | ||
| 114 | + printk(KERN_ERR "Unable to get LCD power enable GPIO\n"); | ||
| 115 | } | ||
| 116 | |||
| 117 | #include "sdram-micron-mt46h32m32lf-6.h" | ||
| 118 | @@ -648,6 +702,53 @@ static struct i2c_board_info __initdata beagle_i2c2_zippy[] = { | ||
| 119 | static struct i2c_board_info __initdata beagle_i2c2_zippy[] = {}; | ||
| 120 | #endif | ||
| 121 | |||
| 122 | +#if defined(CONFIG_INPUT_TOUCHSCREEN) && \ | ||
| 123 | + defined(CONFIG_TOUCHSCREEN_TSC2007) | ||
| 124 | +/* Touchscreen */ | ||
| 125 | +#define OMAP3BEAGLE_TSC2007_GPIO 157 | ||
| 126 | +static int omap3beagle_tsc2007_get_pendown_state(void) | ||
| 127 | +{ | ||
| 128 | + return !gpio_get_value(OMAP3BEAGLE_TSC2007_GPIO); | ||
| 129 | +} | ||
| 130 | + | ||
| 131 | +static int omap3beagle_tsc2007_init(void) | ||
| 132 | +{ | ||
| 133 | + int gpio = OMAP3BEAGLE_TSC2007_GPIO; | ||
| 134 | + int ret = 0; | ||
| 135 | + printk(KERN_WARNING "TSC2007_init started"); | ||
| 136 | + ret = gpio_request(gpio, "tsc2007_pen_down"); | ||
| 137 | + if (ret < 0) { | ||
| 138 | + printk(KERN_ERR "Failed to request GPIO %d for " | ||
| 139 | + "tsc2007 pen down IRQ\n", gpio); | ||
| 140 | + return ret; | ||
| 141 | + } | ||
| 142 | + | ||
| 143 | + omap_mux_init_gpio(OMAP3BEAGLE_TSC2007_GPIO, OMAP_PIN_INPUT_PULLUP); | ||
| 144 | + gpio_direction_input(gpio); | ||
| 145 | + | ||
| 146 | + irq_set_irq_type(OMAP_GPIO_IRQ(OMAP3BEAGLE_TSC2007_GPIO), IRQ_TYPE_EDGE_FALLING); | ||
| 147 | + | ||
| 148 | + return ret; | ||
| 149 | +} | ||
| 150 | + | ||
| 151 | +static struct tsc2007_platform_data tsc2007_info = { | ||
| 152 | + .model = 2007, | ||
| 153 | + .x_plate_ohms = 180, | ||
| 154 | + .get_pendown_state = omap3beagle_tsc2007_get_pendown_state, | ||
| 155 | + .init_platform_hw = omap3beagle_tsc2007_init, | ||
| 156 | +}; | ||
| 157 | + | ||
| 158 | +static struct i2c_board_info __initdata beagle_i2c2_bbtoys_ulcd[] = { | ||
| 159 | + { | ||
| 160 | + I2C_BOARD_INFO("tsc2007", 0x48), | ||
| 161 | + .irq = OMAP_GPIO_IRQ(OMAP3BEAGLE_TSC2007_GPIO), | ||
| 162 | + .platform_data = &tsc2007_info, | ||
| 163 | + }, | ||
| 164 | +}; | ||
| 165 | +#else | ||
| 166 | +static struct i2c_board_info __initdata beagle_i2c2_bbtoys_ulcd[] = {}; | ||
| 167 | +#endif | ||
| 168 | + | ||
| 169 | static int __init omap3_beagle_i2c_init(void) | ||
| 170 | { | ||
| 171 | omap3_pmic_get_config(&beagle_twldata, | ||
| 172 | @@ -817,6 +918,10 @@ static void __init omap3_beagle_init(void) | ||
| 173 | |||
| 174 | gpio_buttons[0].gpio = beagle_config.usr_button_gpio; | ||
| 175 | |||
| 176 | + /* TODO: set lcd_driver_name by command line or device tree */ | ||
| 177 | + beagle_config.lcd_driver_name = "tfc_s9700rtwv35tr-01b", | ||
| 178 | + lcd_panel.name = beagle_config.lcd_driver_name; | ||
| 179 | + | ||
| 180 | platform_add_devices(omap3_beagle_devices, | ||
| 181 | ARRAY_SIZE(omap3_beagle_devices)); | ||
| 182 | omap_display_init(&beagle_dss_data); | ||
| 183 | @@ -892,6 +997,13 @@ static void __init omap3_beagle_init(void) | ||
| 184 | platform_device_register(&omap_vwlan_device); | ||
| 185 | } | ||
| 186 | |||
| 187 | + if(!strcmp(expansionboard_name, "bbtoys-ulcd")) | ||
| 188 | + { | ||
| 189 | + printk(KERN_INFO "Beagle expansionboard: registering bbtoys-ulcd\n"); | ||
| 190 | + omap_register_i2c_bus(2, 400, beagle_i2c2_bbtoys_ulcd, | ||
| 191 | + ARRAY_SIZE(beagle_i2c2_bbtoys_ulcd)); | ||
| 192 | + } | ||
| 193 | + | ||
| 194 | usb_musb_init(NULL); | ||
| 195 | usbhs_init(&usbhs_bdata); | ||
| 196 | omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, | ||
| 197 | diff --git a/drivers/video/omap2/displays/panel-generic-dpi.c b/drivers/video/omap2/displays/panel-generic-dpi.c | ||
| 198 | index 9c90f75..82c1ac3 100644 | ||
| 199 | --- a/drivers/video/omap2/displays/panel-generic-dpi.c | ||
| 200 | +++ b/drivers/video/omap2/displays/panel-generic-dpi.c | ||
| 201 | @@ -232,6 +232,31 @@ static struct panel_config generic_dpi_panels[] = { | ||
| 202 | .power_off_delay = 0, | ||
| 203 | .name = "powertip_ph480272t", | ||
| 204 | }, | ||
| 205 | + | ||
| 206 | + /* ThreeFiveCorp S9700RTWV35TR-01B */ | ||
| 207 | + { | ||
| 208 | + { | ||
| 209 | + .x_res = 800, | ||
| 210 | + .y_res = 480, | ||
| 211 | + | ||
| 212 | + .pixel_clock = 30000, | ||
| 213 | + | ||
| 214 | + .hsw = 49, | ||
| 215 | + .hfp = 41, | ||
| 216 | + .hbp = 40, | ||
| 217 | + | ||
| 218 | + .vsw = 4, | ||
| 219 | + .vfp = 14, | ||
| 220 | + .vbp = 29, | ||
| 221 | + }, | ||
| 222 | + .acbi = 0x0, | ||
| 223 | + .acb = 0x0, | ||
| 224 | + .config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IVS | | ||
| 225 | + OMAP_DSS_LCD_IHS, // | OMAP_DSS_LCD_IEO; - TODO check this - doesn't work with this enabled | ||
| 226 | + .power_on_delay = 50, | ||
| 227 | + .power_off_delay = 100, | ||
| 228 | + .name = "tfc_s9700rtwv35tr-01b", | ||
| 229 | + }, | ||
| 230 | }; | ||
| 231 | |||
| 232 | struct panel_drv_data { | ||
| 233 | -- | ||
| 234 | 1.7.2.5 | ||
| 235 | |||
diff --git a/recipes-kernel/linux/linux-3.0/ulcd/0003-ARM-OMAP2-beagleboard-add-support-for-loopthrough-ex.patch b/recipes-kernel/linux/linux-3.0/ulcd/0003-ARM-OMAP2-beagleboard-add-support-for-loopthrough-ex.patch deleted file mode 100644 index 46cb4321..00000000 --- a/recipes-kernel/linux/linux-3.0/ulcd/0003-ARM-OMAP2-beagleboard-add-support-for-loopthrough-ex.patch +++ /dev/null | |||
| @@ -1,61 +0,0 @@ | |||
| 1 | From eea23f28cacdb525471ecf4dc8a2366ccef5a28b Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | Date: Tue, 11 Oct 2011 13:13:35 +0200 | ||
| 4 | Subject: [PATCH 3/4] ARM: OMAP2: beagleboard: add support for loopthrough expansionboard, make uLCD use it | ||
| 5 | |||
| 6 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 7 | --- | ||
| 8 | arch/arm/mach-omap2/board-omap3beagle.c | 15 +++++++++++++-- | ||
| 9 | 1 files changed, 13 insertions(+), 2 deletions(-) | ||
| 10 | |||
| 11 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 12 | index 8b30b4c..47bc79b 100644 | ||
| 13 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 14 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 15 | @@ -253,6 +253,7 @@ static void __init omap3_beagle_init_rev(void) | ||
| 16 | } | ||
| 17 | |||
| 18 | char expansionboard_name[16]; | ||
| 19 | +char expansionboard2_name[16]; | ||
| 20 | |||
| 21 | #if defined(CONFIG_WL12XX) || defined(CONFIG_WL12XX_MODULE) | ||
| 22 | #include <linux/regulator/fixed.h> | ||
| 23 | @@ -862,6 +863,15 @@ static int __init expansionboard_setup(char *str) | ||
| 24 | return 0; | ||
| 25 | } | ||
| 26 | |||
| 27 | +static int __init expansionboard2_setup(char *str) | ||
| 28 | +{ | ||
| 29 | + if (!str) | ||
| 30 | + return -EINVAL; | ||
| 31 | + strncpy(expansionboard2_name, str, 16); | ||
| 32 | + printk(KERN_INFO "Beagle second expansionboard: %s\n", expansionboard2_name); | ||
| 33 | + return 0; | ||
| 34 | +} | ||
| 35 | + | ||
| 36 | static void __init beagle_opp_init(void) | ||
| 37 | { | ||
| 38 | int r = 0; | ||
| 39 | @@ -997,9 +1007,9 @@ static void __init omap3_beagle_init(void) | ||
| 40 | platform_device_register(&omap_vwlan_device); | ||
| 41 | } | ||
| 42 | |||
| 43 | - if(!strcmp(expansionboard_name, "bbtoys-ulcd")) | ||
| 44 | + if(!strcmp(expansionboard2_name, "bbtoys-ulcd")) | ||
| 45 | { | ||
| 46 | - printk(KERN_INFO "Beagle expansionboard: registering bbtoys-ulcd\n"); | ||
| 47 | + printk(KERN_INFO "Beagle second expansionboard: registering bbtoys-ulcd\n"); | ||
| 48 | omap_register_i2c_bus(2, 400, beagle_i2c2_bbtoys_ulcd, | ||
| 49 | ARRAY_SIZE(beagle_i2c2_bbtoys_ulcd)); | ||
| 50 | } | ||
| 51 | @@ -1021,6 +1031,7 @@ static void __init omap3_beagle_init(void) | ||
| 52 | } | ||
| 53 | |||
| 54 | early_param("buddy", expansionboard_setup); | ||
| 55 | +early_param("buddy2", expansionboard2_setup); | ||
| 56 | |||
| 57 | MACHINE_START(OMAP3_BEAGLE, "OMAP3 Beagle Board") | ||
| 58 | /* Maintainer: Syed Mohammed Khasim - http://beagleboard.org */ | ||
| 59 | -- | ||
| 60 | 1.7.2.5 | ||
| 61 | |||
diff --git a/recipes-kernel/linux/linux-3.0/ulcd/0004-LEDS-add-initial-support-for-WS2801-controller.patch b/recipes-kernel/linux/linux-3.0/ulcd/0004-LEDS-add-initial-support-for-WS2801-controller.patch deleted file mode 100644 index b81d1253..00000000 --- a/recipes-kernel/linux/linux-3.0/ulcd/0004-LEDS-add-initial-support-for-WS2801-controller.patch +++ /dev/null | |||
| @@ -1,242 +0,0 @@ | |||
| 1 | From e707458df28487c2fb0bf620cb3eff22466e2c6c Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Koen Kooi <koen@dominion.thruhere.net> | ||
| 3 | Date: Thu, 20 Oct 2011 16:13:16 +0200 | ||
| 4 | Subject: [PATCH 4/4] LEDS: add initial support for WS2801 controller | ||
| 5 | |||
| 6 | This adds initial support for the WS2801 RGB LED controller. | ||
| 7 | |||
| 8 | Signed-off-by: Koen Kooi <koen@dominion.thruhere.net> | ||
| 9 | --- | ||
| 10 | arch/arm/mach-omap2/board-omap3beagle.c | 11 ++ | ||
| 11 | drivers/leds/Kconfig | 6 + | ||
| 12 | drivers/leds/Makefile | 1 + | ||
| 13 | drivers/leds/leds-ws2801.c | 159 +++++++++++++++++++++++++++++++ | ||
| 14 | 4 files changed, 177 insertions(+), 0 deletions(-) | ||
| 15 | create mode 100644 drivers/leds/leds-ws2801.c | ||
| 16 | |||
| 17 | diff --git a/arch/arm/mach-omap2/board-omap3beagle.c b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 18 | index 47bc79b..016d0985 100644 | ||
| 19 | --- a/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 20 | +++ b/arch/arm/mach-omap2/board-omap3beagle.c | ||
| 21 | @@ -796,6 +796,11 @@ static struct platform_device leds_gpio = { | ||
| 22 | }, | ||
| 23 | }; | ||
| 24 | |||
| 25 | +static struct platform_device ws2801_leds = { | ||
| 26 | + .name = "ws2801-leds", | ||
| 27 | + .id = -1, | ||
| 28 | +}; | ||
| 29 | + | ||
| 30 | static struct gpio_keys_button gpio_buttons[] = { | ||
| 31 | { | ||
| 32 | .code = BTN_EXTRA, | ||
| 33 | @@ -1014,6 +1019,12 @@ static void __init omap3_beagle_init(void) | ||
| 34 | ARRAY_SIZE(beagle_i2c2_bbtoys_ulcd)); | ||
| 35 | } | ||
| 36 | |||
| 37 | + if(!strcmp(expansionboard_name, "beacon")) | ||
| 38 | + { | ||
| 39 | + printk(KERN_INFO "Beagle expansionboard: registering TinCanTools Beacon LED driver\n"); | ||
| 40 | + platform_device_register(&ws2801_leds); | ||
| 41 | + } | ||
| 42 | + | ||
| 43 | usb_musb_init(NULL); | ||
| 44 | usbhs_init(&usbhs_bdata); | ||
| 45 | omap_nand_flash_init(NAND_BUSWIDTH_16, omap3beagle_nand_partitions, | ||
| 46 | diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig | ||
| 47 | index 713d43b..fd2c4b3 100644 | ||
| 48 | --- a/drivers/leds/Kconfig | ||
| 49 | +++ b/drivers/leds/Kconfig | ||
| 50 | @@ -323,6 +323,12 @@ config LEDS_BD2802 | ||
| 51 | This option enables support for BD2802GU RGB LED driver chips | ||
| 52 | accessed via the I2C bus. | ||
| 53 | |||
| 54 | +config LEDS_WS2801 | ||
| 55 | + tristate "LED driver for WS2801 RGB LED" | ||
| 56 | + depends on LEDS_CLASS | ||
| 57 | + help | ||
| 58 | + This option enables support for WS2801 RGB LED driver chips. | ||
| 59 | + | ||
| 60 | config LEDS_INTEL_SS4200 | ||
| 61 | tristate "LED driver for Intel NAS SS4200 series" | ||
| 62 | depends on LEDS_CLASS | ||
| 63 | diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile | ||
| 64 | index bbfd2e3..14f849e 100644 | ||
| 65 | --- a/drivers/leds/Makefile | ||
| 66 | +++ b/drivers/leds/Makefile | ||
| 67 | @@ -43,6 +43,7 @@ obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o | ||
| 68 | obj-$(CONFIG_LEDS_NS2) += leds-ns2.o | ||
| 69 | obj-$(CONFIG_LEDS_NETXBIG) += leds-netxbig.o | ||
| 70 | obj-$(CONFIG_LEDS_ASIC3) += leds-asic3.o | ||
| 71 | +obj-$(CONFIG_LEDS_WS2801) += leds-ws2801.o | ||
| 72 | |||
| 73 | # LED SPI Drivers | ||
| 74 | obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o | ||
| 75 | diff --git a/drivers/leds/leds-ws2801.c b/drivers/leds/leds-ws2801.c | ||
| 76 | new file mode 100644 | ||
| 77 | index 0000000..9526a84 | ||
| 78 | --- /dev/null | ||
| 79 | +++ b/drivers/leds/leds-ws2801.c | ||
| 80 | @@ -0,0 +1,159 @@ | ||
| 81 | +/* | ||
| 82 | + * LEDs driver for WS2801 RGB Controller | ||
| 83 | + * | ||
| 84 | + * Copyright (C) 2006 Kristian Kielhofner <kris@krisk.org> | ||
| 85 | + * | ||
| 86 | + * Based on leds-net48xx.c | ||
| 87 | + * | ||
| 88 | + * This program is free software; you can redistribute it and/or modify | ||
| 89 | + * it under the terms of the GNU General Public License version 2 as | ||
| 90 | + * published by the Free Software Foundation. | ||
| 91 | + */ | ||
| 92 | + | ||
| 93 | +#include <linux/kernel.h> | ||
| 94 | +#include <linux/init.h> | ||
| 95 | +#include <linux/platform_device.h> | ||
| 96 | +#include <linux/leds.h> | ||
| 97 | +#include <linux/err.h> | ||
| 98 | +#include <linux/gpio.h> | ||
| 99 | +#include <linux/io.h> | ||
| 100 | + | ||
| 101 | +#define DRVNAME "ws2801-leds" | ||
| 102 | +#define WS2801_LED_CLOCK_GPIO 159 | ||
| 103 | +#define WS2801_LED_DATA_GPIO 158 | ||
| 104 | + | ||
| 105 | +static unsigned long rgb_color; | ||
| 106 | + | ||
| 107 | +static struct platform_device *pdev; | ||
| 108 | + | ||
| 109 | +static void ws2801_set_rgb(void) | ||
| 110 | +{ | ||
| 111 | + int count; | ||
| 112 | + int color_bit; | ||
| 113 | + | ||
| 114 | + for (count = 23; count >= 0 ; count--) { | ||
| 115 | + color_bit = (rgb_color>>count) & (1<<0); | ||
| 116 | + gpio_set_value(WS2801_LED_DATA_GPIO, color_bit); | ||
| 117 | + gpio_set_value(WS2801_LED_CLOCK_GPIO, 1); | ||
| 118 | + gpio_set_value(WS2801_LED_CLOCK_GPIO, 0); | ||
| 119 | + } | ||
| 120 | + | ||
| 121 | +} | ||
| 122 | + | ||
| 123 | +static void ws2801_red_led_set(struct led_classdev *led_cdev, | ||
| 124 | + enum led_brightness value) | ||
| 125 | +{ | ||
| 126 | + rgb_color &= ((0x00<<16)|(0xff<<8)|(0xff<<0)); | ||
| 127 | + rgb_color |= (value<<16); | ||
| 128 | + ws2801_set_rgb(); | ||
| 129 | +} | ||
| 130 | + | ||
| 131 | +static void ws2801_green_led_set(struct led_classdev *led_cdev, | ||
| 132 | + enum led_brightness value) | ||
| 133 | +{ | ||
| 134 | + rgb_color &= ((0xff<<16)|(0x00<<8)|(0xff<<0)); | ||
| 135 | + rgb_color |= (value<<8); | ||
| 136 | + ws2801_set_rgb(); | ||
| 137 | +} | ||
| 138 | + | ||
| 139 | +static void ws2801_blue_led_set(struct led_classdev *led_cdev, | ||
| 140 | + enum led_brightness value) | ||
| 141 | +{ | ||
| 142 | + rgb_color &= ((0xff<<16)|(0xff<<8)|(0x00<<0)); | ||
| 143 | + rgb_color |= (value<<0); | ||
| 144 | + ws2801_set_rgb(); | ||
| 145 | +} | ||
| 146 | + | ||
| 147 | +static struct led_classdev ws2801_red_led = { | ||
| 148 | + .name = "ws2801-red", | ||
| 149 | + .brightness_set = ws2801_red_led_set, | ||
| 150 | + .flags = LED_CORE_SUSPENDRESUME, | ||
| 151 | +}; | ||
| 152 | + | ||
| 153 | +static struct led_classdev ws2801_green_led = { | ||
| 154 | + .name = "ws2801-green", | ||
| 155 | + .brightness_set = ws2801_green_led_set, | ||
| 156 | + .flags = LED_CORE_SUSPENDRESUME, | ||
| 157 | +}; | ||
| 158 | + | ||
| 159 | +static struct led_classdev ws2801_blue_led = { | ||
| 160 | + .name = "ws2801-blue", | ||
| 161 | + .brightness_set = ws2801_blue_led_set, | ||
| 162 | + .flags = LED_CORE_SUSPENDRESUME, | ||
| 163 | +}; | ||
| 164 | + | ||
| 165 | +static int ws2801_led_probe(struct platform_device *pdev) | ||
| 166 | +{ | ||
| 167 | + int ret; | ||
| 168 | + | ||
| 169 | + ret = led_classdev_register(&pdev->dev, &ws2801_red_led); | ||
| 170 | + if (ret < 0) | ||
| 171 | + return ret; | ||
| 172 | + | ||
| 173 | + ret = led_classdev_register(&pdev->dev, &ws2801_green_led); | ||
| 174 | + if (ret < 0) | ||
| 175 | + goto err1; | ||
| 176 | + | ||
| 177 | + ret = led_classdev_register(&pdev->dev, &ws2801_blue_led); | ||
| 178 | + if (ret < 0) | ||
| 179 | + goto err2; | ||
| 180 | + | ||
| 181 | + gpio_request_one(WS2801_LED_DATA_GPIO, | ||
| 182 | + GPIOF_OUT_INIT_LOW, "ws2801_data"); | ||
| 183 | + | ||
| 184 | + gpio_request_one(WS2801_LED_CLOCK_GPIO, | ||
| 185 | + GPIOF_OUT_INIT_LOW, "ws2801_clock"); | ||
| 186 | + | ||
| 187 | + ws2801_set_rgb(); | ||
| 188 | + return ret; | ||
| 189 | + | ||
| 190 | +err2: | ||
| 191 | + led_classdev_unregister(&ws2801_green_led); | ||
| 192 | +err1: | ||
| 193 | + led_classdev_unregister(&ws2801_red_led); | ||
| 194 | + | ||
| 195 | + return ret; | ||
| 196 | +} | ||
| 197 | + | ||
| 198 | +static int ws2801_led_remove(struct platform_device *pdev) | ||
| 199 | +{ | ||
| 200 | + led_classdev_unregister(&ws2801_red_led); | ||
| 201 | + led_classdev_unregister(&ws2801_green_led); | ||
| 202 | + led_classdev_unregister(&ws2801_blue_led); | ||
| 203 | + return 0; | ||
| 204 | +} | ||
| 205 | + | ||
| 206 | +static struct platform_driver ws2801_led_driver = { | ||
| 207 | + .probe = ws2801_led_probe, | ||
| 208 | + .remove = ws2801_led_remove, | ||
| 209 | + .driver = { | ||
| 210 | + .name = DRVNAME, | ||
| 211 | + .owner = THIS_MODULE, | ||
| 212 | + }, | ||
| 213 | +}; | ||
| 214 | + | ||
| 215 | +static int __init ws2801_led_init(void) | ||
| 216 | +{ | ||
| 217 | + int ret; | ||
| 218 | + | ||
| 219 | + ret = platform_driver_register(&ws2801_led_driver); | ||
| 220 | + if (ret < 0) | ||
| 221 | + goto out; | ||
| 222 | + | ||
| 223 | +out: | ||
| 224 | + return ret; | ||
| 225 | +} | ||
| 226 | + | ||
| 227 | +static void __exit ws2801_led_exit(void) | ||
| 228 | +{ | ||
| 229 | + platform_device_unregister(pdev); | ||
| 230 | + platform_driver_unregister(&ws2801_led_driver); | ||
| 231 | +} | ||
| 232 | + | ||
| 233 | +module_init(ws2801_led_init); | ||
| 234 | +module_exit(ws2801_led_exit); | ||
| 235 | + | ||
| 236 | +MODULE_AUTHOR("David Anders <danders@tincantools.com>"); | ||
| 237 | +MODULE_DESCRIPTION("WS2801 RGB LED driver"); | ||
| 238 | +MODULE_LICENSE("GPL"); | ||
| 239 | + | ||
| 240 | -- | ||
| 241 | 1.7.2.5 | ||
| 242 | |||
diff --git a/recipes-kernel/linux/linux-3.0/usb/0001-Fix-sprz319-erratum-2.1.patch b/recipes-kernel/linux/linux-3.0/usb/0001-Fix-sprz319-erratum-2.1.patch deleted file mode 100644 index 8d65b5f0..00000000 --- a/recipes-kernel/linux/linux-3.0/usb/0001-Fix-sprz319-erratum-2.1.patch +++ /dev/null | |||
| @@ -1,210 +0,0 @@ | |||
| 1 | From cf5db5477d8d43f02f4511f3835ab4bec0dcc27c Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Richard Watts <rrw@kynesim.co.uk> | ||
| 3 | Date: Mon, 20 Feb 2012 17:58:26 +0000 | ||
| 4 | Subject: [PATCH] Fix sprz319 erratum 2.1 | ||
| 5 | |||
| 6 | There is an erratum in DM3730 which results in the | ||
| 7 | EHCI USB PLL (DPLL5) not updating sufficiently frequently; this | ||
| 8 | leads to USB PHY clock drift and once the clock has drifted far | ||
| 9 | enough, the PHY's ULPI interface stops responding and USB | ||
| 10 | drops out. This is manifested on a Beagle xM by having the attached | ||
| 11 | SMSC9514 report 'Cannot enable port 2. Maybe the USB cable is bad?' | ||
| 12 | or similar. | ||
| 13 | |||
| 14 | The fix is to carefully adjust your DPLL5 settings so as to | ||
| 15 | keep the PHY clock as close as possible to 120MHz over the long | ||
| 16 | term; TI SPRZ319e gives a table of such settings and this patch | ||
| 17 | applies that table to systems with a 13MHz or a 26MHz clock, | ||
| 18 | thus fixing the issue (inasfar as it can be fixed) on Beagle xM | ||
| 19 | and Overo Firestorm. | ||
| 20 | |||
| 21 | Signed-off-by: Richard Watts <rrw@kynesim.co.uk> | ||
| 22 | --- | ||
| 23 | arch/arm/mach-omap2/clkt_clksel.c | 15 ++++++++ | ||
| 24 | arch/arm/mach-omap2/clock.h | 7 ++++ | ||
| 25 | arch/arm/mach-omap2/clock3xxx.c | 65 +++++++++++++++++++++++++++++---- | ||
| 26 | arch/arm/mach-omap2/clock3xxx.h | 1 + | ||
| 27 | arch/arm/mach-omap2/clock3xxx_data.c | 2 +- | ||
| 28 | arch/arm/mach-omap2/dpll3xxx.c | 2 +- | ||
| 29 | 6 files changed, 82 insertions(+), 10 deletions(-) | ||
| 30 | |||
| 31 | diff --git a/arch/arm/mach-omap2/clkt_clksel.c b/arch/arm/mach-omap2/clkt_clksel.c | ||
| 32 | index e25364d..e378fe7 100644 | ||
| 33 | --- a/arch/arm/mach-omap2/clkt_clksel.c | ||
| 34 | +++ b/arch/arm/mach-omap2/clkt_clksel.c | ||
| 35 | @@ -460,6 +460,21 @@ int omap2_clksel_set_rate(struct clk *clk, unsigned long rate) | ||
| 36 | return 0; | ||
| 37 | } | ||
| 38 | |||
| 39 | +int omap2_clksel_force_divisor(struct clk *clk, int new_div) | ||
| 40 | +{ | ||
| 41 | + u32 field_val; | ||
| 42 | + | ||
| 43 | + field_val = _divisor_to_clksel(clk, new_div); | ||
| 44 | + if (field_val == ~0) | ||
| 45 | + return -EINVAL; | ||
| 46 | + | ||
| 47 | + _write_clksel_reg(clk, field_val); | ||
| 48 | + | ||
| 49 | + clk->rate = clk->parent->rate / new_div; | ||
| 50 | + | ||
| 51 | + return 0; | ||
| 52 | +} | ||
| 53 | + | ||
| 54 | /* | ||
| 55 | * Clksel parent setting function - not passed in struct clk function | ||
| 56 | * pointer - instead, the OMAP clock code currently assumes that any | ||
| 57 | diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h | ||
| 58 | index 8bad1c6..ac3d367 100644 | ||
| 59 | --- a/arch/arm/mach-omap2/clock.h | ||
| 60 | +++ b/arch/arm/mach-omap2/clock.h | ||
| 61 | @@ -61,6 +61,12 @@ void omap3_dpll_allow_idle(struct clk *clk); | ||
| 62 | void omap3_dpll_deny_idle(struct clk *clk); | ||
| 63 | u32 omap3_dpll_autoidle_read(struct clk *clk); | ||
| 64 | int omap3_noncore_dpll_set_rate(struct clk *clk, unsigned long rate); | ||
| 65 | +#if CONFIG_ARCH_OMAP3 | ||
| 66 | +int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel); | ||
| 67 | +/* If you are using this function and not on OMAP3, you are | ||
| 68 | + * Doing It Wrong(tm), so there is no stub. | ||
| 69 | + */ | ||
| 70 | +#endif | ||
| 71 | int omap3_noncore_dpll_enable(struct clk *clk); | ||
| 72 | void omap3_noncore_dpll_disable(struct clk *clk); | ||
| 73 | int omap4_dpllmx_gatectrl_read(struct clk *clk); | ||
| 74 | @@ -84,6 +90,7 @@ unsigned long omap2_clksel_recalc(struct clk *clk); | ||
| 75 | long omap2_clksel_round_rate(struct clk *clk, unsigned long target_rate); | ||
| 76 | int omap2_clksel_set_rate(struct clk *clk, unsigned long rate); | ||
| 77 | int omap2_clksel_set_parent(struct clk *clk, struct clk *new_parent); | ||
| 78 | +int omap2_clksel_force_divisor(struct clk *clk, int new_div); | ||
| 79 | |||
| 80 | /* clkt_iclk.c public functions */ | ||
| 81 | extern void omap2_clkt_iclk_allow_idle(struct clk *clk); | ||
| 82 | diff --git a/arch/arm/mach-omap2/clock3xxx.c b/arch/arm/mach-omap2/clock3xxx.c | ||
| 83 | index 952c3e0..d5be086 100644 | ||
| 84 | --- a/arch/arm/mach-omap2/clock3xxx.c | ||
| 85 | +++ b/arch/arm/mach-omap2/clock3xxx.c | ||
| 86 | @@ -40,6 +40,60 @@ | ||
| 87 | /* needed by omap3_core_dpll_m2_set_rate() */ | ||
| 88 | struct clk *sdrc_ick_p, *arm_fck_p; | ||
| 89 | |||
| 90 | +struct dpll_settings { | ||
| 91 | + int rate, m, n, f; | ||
| 92 | +}; | ||
| 93 | + | ||
| 94 | + | ||
| 95 | +static int omap3_dpll5_apply_erratum21(struct clk *clk, struct clk *dpll5_m2) | ||
| 96 | +{ | ||
| 97 | + struct clk *sys_clk; | ||
| 98 | + int i, rv; | ||
| 99 | + static const struct dpll_settings precomputed[] = { | ||
| 100 | + /* From DM3730 errata (sprz319e), table 36 | ||
| 101 | + * +1 is because the values in the table are register values; | ||
| 102 | + * dpll_program() will subtract one from what we give it, | ||
| 103 | + * so ... | ||
| 104 | + */ | ||
| 105 | + { 13000000, 443+1, 5+1, 8 }, | ||
| 106 | + { 26000000, 443+1, 11+1, 8 } | ||
| 107 | + }; | ||
| 108 | + | ||
| 109 | + sys_clk = clk_get(NULL, "sys_ck"); | ||
| 110 | + | ||
| 111 | + for (i = 0 ; i < (sizeof(precomputed)/sizeof(struct dpll_settings)) ; | ||
| 112 | + ++i) { | ||
| 113 | + const struct dpll_settings *d = &precomputed[i]; | ||
| 114 | + if (sys_clk->rate == d->rate) { | ||
| 115 | + rv = omap3_noncore_dpll_program(clk, d->m , d->n, 0); | ||
| 116 | + if (rv) | ||
| 117 | + return 1; | ||
| 118 | + rv = omap2_clksel_force_divisor(dpll5_m2 , d->f); | ||
| 119 | + return 1; | ||
| 120 | + } | ||
| 121 | + } | ||
| 122 | + return 0; | ||
| 123 | +} | ||
| 124 | + | ||
| 125 | +int omap3_dpll5_set_rate(struct clk *clk, unsigned long rate) | ||
| 126 | +{ | ||
| 127 | + struct clk *dpll5_m2; | ||
| 128 | + int rv; | ||
| 129 | + dpll5_m2 = clk_get(NULL, "dpll5_m2_ck"); | ||
| 130 | + | ||
| 131 | + if (cpu_is_omap3630() && rate == DPLL5_FREQ_FOR_USBHOST && | ||
| 132 | + omap3_dpll5_apply_erratum21(clk, dpll5_m2)) { | ||
| 133 | + return 1; | ||
| 134 | + } | ||
| 135 | + rv = omap3_noncore_dpll_set_rate(clk, rate); | ||
| 136 | + if (rv) | ||
| 137 | + goto out; | ||
| 138 | + rv = clk_set_rate(dpll5_m2, rate); | ||
| 139 | + | ||
| 140 | +out: | ||
| 141 | + return rv; | ||
| 142 | +} | ||
| 143 | + | ||
| 144 | int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate) | ||
| 145 | { | ||
| 146 | /* | ||
| 147 | @@ -59,19 +113,14 @@ int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate) | ||
| 148 | void __init omap3_clk_lock_dpll5(void) | ||
| 149 | { | ||
| 150 | struct clk *dpll5_clk; | ||
| 151 | - struct clk *dpll5_m2_clk; | ||
| 152 | |||
| 153 | dpll5_clk = clk_get(NULL, "dpll5_ck"); | ||
| 154 | clk_set_rate(dpll5_clk, DPLL5_FREQ_FOR_USBHOST); | ||
| 155 | - clk_enable(dpll5_clk); | ||
| 156 | |||
| 157 | - /* Program dpll5_m2_clk divider for no division */ | ||
| 158 | - dpll5_m2_clk = clk_get(NULL, "dpll5_m2_ck"); | ||
| 159 | - clk_enable(dpll5_m2_clk); | ||
| 160 | - clk_set_rate(dpll5_m2_clk, DPLL5_FREQ_FOR_USBHOST); | ||
| 161 | + /* dpll5_m2_ck is now (grottily!) handled by dpll5_clk's set routine, | ||
| 162 | + * to cope with an erratum on DM3730 | ||
| 163 | + */ | ||
| 164 | |||
| 165 | - clk_disable(dpll5_m2_clk); | ||
| 166 | - clk_disable(dpll5_clk); | ||
| 167 | return; | ||
| 168 | } | ||
| 169 | |||
| 170 | diff --git a/arch/arm/mach-omap2/clock3xxx.h b/arch/arm/mach-omap2/clock3xxx.h | ||
| 171 | index 8bbeeaf..0ede513 100644 | ||
| 172 | --- a/arch/arm/mach-omap2/clock3xxx.h | ||
| 173 | +++ b/arch/arm/mach-omap2/clock3xxx.h | ||
| 174 | @@ -10,6 +10,7 @@ | ||
| 175 | |||
| 176 | int omap3xxx_clk_init(void); | ||
| 177 | int omap3_dpll4_set_rate(struct clk *clk, unsigned long rate); | ||
| 178 | +int omap3_dpll5_set_rate(struct clk *clk, unsigned long rate); | ||
| 179 | int omap3_core_dpll_m2_set_rate(struct clk *clk, unsigned long rate); | ||
| 180 | void omap3_clk_lock_dpll5(void); | ||
| 181 | |||
| 182 | diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c | ||
| 183 | index ffd55b1..dcd7bdc 100644 | ||
| 184 | --- a/arch/arm/mach-omap2/clock3xxx_data.c | ||
| 185 | +++ b/arch/arm/mach-omap2/clock3xxx_data.c | ||
| 186 | @@ -942,7 +942,7 @@ static struct clk dpll5_ck = { | ||
| 187 | .parent = &sys_ck, | ||
| 188 | .dpll_data = &dpll5_dd, | ||
| 189 | .round_rate = &omap2_dpll_round_rate, | ||
| 190 | - .set_rate = &omap3_noncore_dpll_set_rate, | ||
| 191 | + .set_rate = &omap3_dpll5_set_rate, | ||
| 192 | .clkdm_name = "dpll5_clkdm", | ||
| 193 | .recalc = &omap3_dpll_recalc, | ||
| 194 | }; | ||
| 195 | diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c | ||
| 196 | index f77022b..1909cd0 100644 | ||
| 197 | --- a/arch/arm/mach-omap2/dpll3xxx.c | ||
| 198 | +++ b/arch/arm/mach-omap2/dpll3xxx.c | ||
| 199 | @@ -291,7 +291,7 @@ static void _lookup_sddiv(struct clk *clk, u8 *sd_div, u16 m, u8 n) | ||
| 200 | * Program the DPLL with the supplied M, N values, and wait for the DPLL to | ||
| 201 | * lock.. Returns -EINVAL upon error, or 0 upon success. | ||
| 202 | */ | ||
| 203 | -static int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel) | ||
| 204 | +int omap3_noncore_dpll_program(struct clk *clk, u16 m, u8 n, u16 freqsel) | ||
| 205 | { | ||
| 206 | struct dpll_data *dd = clk->dpll_data; | ||
| 207 | u8 dco, sd_div; | ||
| 208 | -- | ||
| 209 | 1.7.2.5 | ||
| 210 | |||
diff --git a/recipes-kernel/linux/linux_3.0.bb b/recipes-kernel/linux/linux_3.0.bb deleted file mode 100644 index 3aae2ca2..00000000 --- a/recipes-kernel/linux/linux_3.0.bb +++ /dev/null | |||
| @@ -1,234 +0,0 @@ | |||
| 1 | require linux.inc | ||
| 2 | |||
| 3 | DESCRIPTION = "Linux kernel for TI processors" | ||
| 4 | |||
| 5 | COMPATIBLE_MACHINE = "(beagleboard)" | ||
| 6 | |||
| 7 | PV = "3.0.28" | ||
| 8 | # v3.0.28 tag | ||
| 9 | SRCREV_pn-${PN} = "0527fde0639955203ad48a9fd83bd6fc35e82e07" | ||
| 10 | |||
| 11 | # The main PR is now using MACHINE_KERNEL_PR, for omap3 see conf/machine/include/omap3.inc | ||
| 12 | MACHINE_KERNEL_PR_append = "a" | ||
| 13 | |||
| 14 | FILESPATH =. "${FILE_DIRNAME}/linux-3.0:${FILE_DIRNAME}/linux-3.0/${MACHINE}:" | ||
| 15 | |||
| 16 | SRC_URI += "git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git;branch=linux-3.0.y;protocol=git \ | ||
| 17 | file://pm-wip/voltdm/0001-cleanup-regulator-supply-definitions-in-mach-omap2.patch \ | ||
| 18 | file://pm-wip/voltdm/0002-Remove-old-style-supply.dev-assignments-common-in-hs.patch \ | ||
| 19 | file://pm-wip/voltdm/0003-omap-Use-separate-init_irq-functions-to-avoid-cpu_is.patch \ | ||
| 20 | file://pm-wip/voltdm/0004-omap-Set-separate-timer-init-functions-to-avoid-cpu_.patch \ | ||
| 21 | file://pm-wip/voltdm/0005-omap-Move-dmtimer-defines-to-dmtimer.h.patch \ | ||
| 22 | file://pm-wip/voltdm/0006-omap-Make-a-subset-of-dmtimer-functions-into-inline-.patch \ | ||
| 23 | file://pm-wip/voltdm/0007-omap2-Use-dmtimer-macros-for-clockevent.patch \ | ||
| 24 | file://pm-wip/voltdm/0008-omap2-Remove-gptimer_wakeup-for-now.patch \ | ||
| 25 | file://pm-wip/voltdm/0009-OMAP3-SR-make-notify-independent-of-class.patch \ | ||
| 26 | file://pm-wip/voltdm/0010-OMAP3-SR-disable-interrupt-by-default.patch \ | ||
| 27 | file://pm-wip/voltdm/0011-OMAP3-SR-enable-disable-SR-only-on-need.patch \ | ||
| 28 | file://pm-wip/voltdm/0012-OMAP3-SR-fix-cosmetic-indentation.patch \ | ||
| 29 | file://pm-wip/voltdm/0013-omap2-Reserve-clocksource-and-timesource-and-initial.patch \ | ||
| 30 | file://pm-wip/voltdm/0014-omap2-Use-dmtimer-macros-for-clocksource.patch \ | ||
| 31 | file://pm-wip/voltdm/0015-omap2-Remove-omap2_gp_clockevent_set_gptimer.patch \ | ||
| 32 | file://pm-wip/voltdm/0016-omap2-Rename-timer-gp.c-into-timer.c-to-combine-time.patch \ | ||
| 33 | file://pm-wip/voltdm/0017-omap-cleanup-NAND-platform-data.patch \ | ||
| 34 | file://pm-wip/voltdm/0018-omap-board-omap3evm-Fix-compilation-error.patch \ | ||
| 35 | file://pm-wip/voltdm/0019-omap-mcbsp-Drop-SPI-mode-support.patch \ | ||
| 36 | file://pm-wip/voltdm/0020-omap-mcbsp-Drop-in-driver-transfer-support.patch \ | ||
| 37 | file://pm-wip/voltdm/0021-omap2-fix-build-regression.patch \ | ||
| 38 | file://pm-wip/voltdm/0022-OMAP-New-twl-common-for-common-TWL-configuration.patch \ | ||
| 39 | file://pm-wip/voltdm/0023-OMAP4-Move-common-twl6030-configuration-to-twl-commo.patch \ | ||
| 40 | file://pm-wip/voltdm/0024-OMAP3-Move-common-twl-configuration-to-twl-common.patch \ | ||
| 41 | file://pm-wip/voltdm/0025-OMAP3-Move-common-regulator-configuration-to-twl-com.patch \ | ||
| 42 | file://pm-wip/voltdm/0026-omap-mcbsp-Remove-rx_-tx_word_length-variables.patch \ | ||
| 43 | file://pm-wip/voltdm/0027-omap-mcbsp-Remove-port-number-enums.patch \ | ||
| 44 | file://pm-wip/voltdm/0028-OMAP-dmtimer-add-missing-include.patch \ | ||
| 45 | file://pm-wip/voltdm/0029-OMAP2-hwmod-Fix-smart-standby-wakeup-support.patch \ | ||
| 46 | file://pm-wip/voltdm/0030-OMAP4-hwmod-data-Add-MSTANDBY_SMART_WKUP-flag.patch \ | ||
| 47 | file://pm-wip/voltdm/0031-OMAP2-hwmod-Enable-module-in-shutdown-to-access-sysc.patch \ | ||
| 48 | file://pm-wip/voltdm/0032-OMAP2-hwmod-Do-not-write-the-enawakeup-bit-if-SYSC_H.patch \ | ||
| 49 | file://pm-wip/voltdm/0033-OMAP2-hwmod-Remove-_populate_mpu_rt_base-warning.patch \ | ||
| 50 | file://pm-wip/voltdm/0034-OMAP2-hwmod-Fix-the-HW-reset-management.patch \ | ||
| 51 | file://pm-wip/voltdm/0035-OMAP-hwmod-Add-warnings-if-enable-failed.patch \ | ||
| 52 | file://pm-wip/voltdm/0036-OMAP-hwmod-Move-pr_debug-to-improve-the-readability.patch \ | ||
| 53 | file://pm-wip/voltdm/0037-omap_hwmod-use-a-null-structure-record-to-terminate-.patch \ | ||
| 54 | file://pm-wip/voltdm/0038-omap_hwmod-share-identical-omap_hwmod_addr_space-arr.patch \ | ||
| 55 | file://pm-wip/voltdm/0039-omap_hwmod-use-a-terminator-record-with-omap_hwmod_m.patch \ | ||
| 56 | file://pm-wip/voltdm/0040-omap_hwmod-share-identical-omap_hwmod_mpu_irqs-array.patch \ | ||
| 57 | file://pm-wip/voltdm/0041-omap_hwmod-use-a-terminator-record-with-omap_hwmod_d.patch \ | ||
| 58 | file://pm-wip/voltdm/0042-omap_hwmod-share-identical-omap_hwmod_dma_info-array.patch \ | ||
| 59 | file://pm-wip/voltdm/0043-omap_hwmod-share-identical-omap_hwmod_class-omap_hwm.patch \ | ||
| 60 | file://pm-wip/voltdm/0044-OMAP4-hwmod-data-Fix-L3-interconnect-data-order-and-.patch \ | ||
| 61 | file://pm-wip/voltdm/0045-OMAP4-hwmod-data-Remove-un-needed-parens.patch \ | ||
| 62 | file://pm-wip/voltdm/0046-OMAP4-hwmod-data-Fix-bad-alignement.patch \ | ||
| 63 | file://pm-wip/voltdm/0047-OMAP4-hwmod-data-Align-interconnect-format-with-regu.patch \ | ||
| 64 | file://pm-wip/voltdm/0048-OMAP4-clock-data-Add-sddiv-to-USB-DPLL.patch \ | ||
| 65 | file://pm-wip/voltdm/0049-OMAP4-clock-data-Remove-usb_host_fs-clkdev-with-NULL.patch \ | ||
| 66 | file://pm-wip/voltdm/0050-OMAP4-clock-data-Re-order-some-clock-nodes-and-struc.patch \ | ||
| 67 | file://pm-wip/voltdm/0051-OMAP4-clock-data-Fix-max-mult-and-div-for-USB-DPLL.patch \ | ||
| 68 | file://pm-wip/voltdm/0052-OMAP4-prcm-Fix-errors-in-few-defines-name.patch \ | ||
| 69 | file://pm-wip/voltdm/0053-OMAP4-prm-Remove-wrong-clockdomain-offsets.patch \ | ||
| 70 | file://pm-wip/voltdm/0054-OMAP4-powerdomain-data-Fix-indentation.patch \ | ||
| 71 | file://pm-wip/voltdm/0055-OMAP4-cm-Remove-RESTORE-macros-to-avoid-access-from-.patch \ | ||
| 72 | file://pm-wip/voltdm/0056-OMAP4-prcm_mpu-Fix-indent-in-few-macros.patch \ | ||
| 73 | file://pm-wip/voltdm/0057-OMAP4-clockdomain-data-Fix-data-order-and-wrong-name.patch \ | ||
| 74 | file://pm-wip/voltdm/0058-OMAP-omap_device-replace-_find_by_pdev-with-to_omap_.patch \ | ||
| 75 | file://pm-wip/voltdm/0059-OMAP-PM-remove-OMAP_PM_NONE-config-option.patch \ | ||
| 76 | file://pm-wip/voltdm/0060-OMAP4-clock-data-Remove-McASP2-McASP3-and-MMC6-clock.patch \ | ||
| 77 | file://pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch \ | ||
| 78 | file://pm-wip/voltdm/0062-OMAP4-hwmod-data-Modify-DSS-opt-clocks.patch \ | ||
| 79 | file://pm-wip/voltdm/0063-OMAP2-PM-Initialise-sleep_switch-to-a-non-valid-valu.patch \ | ||
| 80 | file://pm-wip/voltdm/0064-OMAP4-powerdomain-data-Fix-core-mem-states-and-missi.patch \ | ||
| 81 | file://pm-wip/voltdm/0065-OMAP4-clock-data-Keep-GPMC-clocks-always-enabled-and.patch \ | ||
| 82 | file://pm-wip/voltdm/0066-OMAP4-powerdomain-data-Remove-unsupported-MPU-powerd.patch \ | ||
| 83 | file://pm-wip/voltdm/0067-OMAP4-hwmod-data-Change-DSS-main_clk-scheme.patch \ | ||
| 84 | file://pm-wip/voltdm/0068-I2C-OMAP2-Set-hwmod-flags-to-only-allow-16-bit-acces.patch \ | ||
| 85 | file://pm-wip/voltdm/0069-I2C-OMAP2-increase-omap_i2c_dev_attr-flags-from-u8-t.patch \ | ||
| 86 | file://pm-wip/voltdm/0070-I2C-OMAP2-Introduce-I2C-IP-versioning-constants.patch \ | ||
| 87 | file://pm-wip/voltdm/0071-I2C-OMAP1-OMAP2-create-omap-I2C-functionality-flags-.patch \ | ||
| 88 | file://pm-wip/voltdm/0072-I2C-OMAP2-Tag-all-OMAP2-hwmod-defintions-with-I2C-IP.patch \ | ||
| 89 | file://pm-wip/voltdm/0073-I2C-OMAP2-add-correct-functionality-flags-to-all-oma.patch \ | ||
| 90 | file://pm-wip/voltdm/0074-OMAP-hwmod-fix-the-i2c-reset-timeout-during-bootup.patch \ | ||
| 91 | file://pm-wip/voltdm/0075-OMAP-omap_device-Create-clkdev-entry-for-hwmod-main_.patch \ | ||
| 92 | file://pm-wip/voltdm/0076-OMAP4-clock-data-Add-missing-divider-selection-for-a.patch \ | ||
| 93 | file://pm-wip/voltdm/0077-OMAP4-hwmod-data-Add-clock-domain-attribute.patch \ | ||
| 94 | file://pm-wip/voltdm/0078-OMAP2-hwmod-Init-clkdm-field-at-boot-time.patch \ | ||
| 95 | file://pm-wip/voltdm/0079-OMAP4-hwmod-Replace-CLKCTRL-absolute-address-with-of.patch \ | ||
| 96 | file://pm-wip/voltdm/0080-OMAP-hwmod-Wait-the-idle-status-to-be-disabled.patch \ | ||
| 97 | file://pm-wip/voltdm/0081-OMAP4-hwmod-Replace-RSTCTRL-absolute-address-with-of.patch \ | ||
| 98 | file://pm-wip/voltdm/0082-OMAP4-prm-Replace-warm-reset-API-with-the-offset-bas.patch \ | ||
| 99 | file://pm-wip/voltdm/0083-OMAP4-prm-Remove-deprecated-functions.patch \ | ||
| 100 | file://pm-wip/voltdm/0084-OMAP4-hwmod-data-Add-PRM-context-register-offset.patch \ | ||
| 101 | file://pm-wip/voltdm/0085-OMAP4-hwmod-data-Add-modulemode-entry-in-omap_hwmod-.patch \ | ||
| 102 | file://pm-wip/voltdm/0086-OMAP4-cm-Add-two-new-APIs-for-modulemode-control.patch \ | ||
| 103 | file://pm-wip/voltdm/0087-OMAP4-hwmod-Introduce-the-module-control-in-hwmod-co.patch \ | ||
| 104 | file://pm-wip/voltdm/0088-OMAP-clockdomain-Remove-redundant-call-to-pwrdm_wait.patch \ | ||
| 105 | file://pm-wip/voltdm/0089-OMAP2-clockdomain-Add-2-APIs-to-control-clockdomain-.patch \ | ||
| 106 | file://pm-wip/voltdm/0090-OMAP2-clockdomain-add-clkdm_in_hwsup.patch \ | ||
| 107 | file://pm-wip/voltdm/0091-OMAP2-PM-idle-clkdms-only-if-already-in-idle.patch \ | ||
| 108 | file://pm-wip/voltdm/0092-OMAP2-clockdomain-Add-per-clkdm-lock-to-prevent-conc.patch \ | ||
| 109 | file://pm-wip/voltdm/0093-OMAP2-clock-allow-per-SoC-clock-init-code-to-prevent.patch \ | ||
| 110 | file://pm-wip/voltdm/0094-OMAP2-hwmod-Follow-the-recommended-PRCM-module-enabl.patch \ | ||
| 111 | file://pm-wip/voltdm/0095-OMAP-Add-debugfs-node-to-show-the-summary-of-all-clo.patch \ | ||
| 112 | file://pm-wip/voltdm/0096-OMAP2-hwmod-remove-unused-voltagedomain-pointer.patch \ | ||
| 113 | file://pm-wip/voltdm/0097-OMAP2-voltage-move-PRCM-mod-offets-into-VC-VP-struct.patch \ | ||
| 114 | file://pm-wip/voltdm/0098-OMAP2-voltage-move-prm_irqst_reg-from-VP-into-voltag.patch \ | ||
| 115 | file://pm-wip/voltdm/0099-OMAP2-voltage-start-towards-a-new-voltagedomain-laye.patch \ | ||
| 116 | file://pm-wip/voltdm/0100-OMAP3-voltage-rename-mpu-voltagedomain-to-mpu_iva.patch \ | ||
| 117 | file://pm-wip/voltdm/0101-OMAP3-voltagedomain-data-add-wakeup-domain.patch \ | ||
| 118 | file://pm-wip/voltdm/0102-OMAP3-voltage-add-scalable-flag-to-voltagedomain.patch \ | ||
| 119 | file://pm-wip/voltdm/0103-OMAP2-powerdomain-add-voltagedomain-to-struct-powerd.patch \ | ||
| 120 | file://pm-wip/voltdm/0104-OMAP2-add-voltage-domains-and-connect-to-powerdomain.patch \ | ||
| 121 | file://pm-wip/voltdm/0105-OMAP3-powerdomain-data-add-voltage-domains.patch \ | ||
| 122 | file://pm-wip/voltdm/0106-OMAP4-powerdomain-data-add-voltage-domains.patch \ | ||
| 123 | file://pm-wip/voltdm/0107-OMAP2-powerdomain-add-voltage-domain-lookup-during-r.patch \ | ||
| 124 | file://pm-wip/voltdm/0108-OMAP2-voltage-keep-track-of-powerdomains-in-each-vol.patch \ | ||
| 125 | file://pm-wip/voltdm/0109-OMAP2-voltage-split-voltage-controller-VC-code-into-.patch \ | ||
| 126 | file://pm-wip/voltdm/0110-OMAP2-voltage-move-VC-into-struct-voltagedomain-misc.patch \ | ||
| 127 | file://pm-wip/voltdm/0111-OMAP2-voltage-enable-VC-bypass-scale-method-when-VC-.patch \ | ||
| 128 | file://pm-wip/voltdm/0112-OMAP2-voltage-split-out-voltage-processor-VP-code-in.patch \ | ||
| 129 | file://pm-wip/voltdm/0113-OMAP2-VC-support-PMICs-with-separate-voltage-and-com.patch \ | ||
| 130 | file://pm-wip/voltdm/0114-OMAP2-add-PRM-VP-functions-for-checking-clearing-VP-.patch \ | ||
| 131 | file://pm-wip/voltdm/0115-OMAP3-VP-replace-transaction-done-check-clear-with-V.patch \ | ||
| 132 | file://pm-wip/voltdm/0116-OMAP2-PRM-add-register-access-functions-for-VC-VP.patch \ | ||
| 133 | file://pm-wip/voltdm/0117-OMAP3-voltage-convert-to-PRM-register-access-functio.patch \ | ||
| 134 | file://pm-wip/voltdm/0118-OMAP3-VC-cleanup-i2c-slave-address-configuration.patch \ | ||
| 135 | file://pm-wip/voltdm/0119-OMAP3-VC-cleanup-PMIC-register-address-configuration.patch \ | ||
| 136 | file://pm-wip/voltdm/0120-OMAP3-VC-bypass-use-fields-from-VC-struct-instead-of.patch \ | ||
| 137 | file://pm-wip/voltdm/0121-OMAP3-VC-cleanup-voltage-setup-time-configuration.patch \ | ||
| 138 | file://pm-wip/voltdm/0122-OMAP3-VC-move-on-onlp-ret-off-command-configuration-.patch \ | ||
| 139 | file://pm-wip/voltdm/0123-OMAP3-VC-abstract-out-channel-configuration.patch \ | ||
| 140 | file://pm-wip/voltdm/0124-OMAP3-voltage-domain-move-PMIC-struct-from-vdd_info-.patch \ | ||
| 141 | file://pm-wip/voltdm/0125-OMAP3-VC-make-I2C-config-programmable-with-PMIC-spec.patch \ | ||
| 142 | file://pm-wip/voltdm/0126-OMAP3-PM-VC-handle-mutant-channel-config-for-OMAP4-M.patch \ | ||
| 143 | file://pm-wip/voltdm/0127-OMAP3-VC-use-last-nominal-voltage-setting-to-get-cur.patch \ | ||
| 144 | file://pm-wip/voltdm/0128-OMAP3-VP-cleanup-move-VP-instance-into-voltdm-misc.-.patch \ | ||
| 145 | file://pm-wip/voltdm/0129-OMAP3-voltage-remove-unneeded-debugfs-interface.patch \ | ||
| 146 | file://pm-wip/voltdm/0130-OMAP3-VP-struct-omap_vp_common-replace-shift-with-__.patch \ | ||
| 147 | file://pm-wip/voltdm/0131-OMAP3-VP-move-SoC-specific-sys-clock-rate-retreival-.patch \ | ||
| 148 | file://pm-wip/voltdm/0132-OMAP3-VP-move-timing-calculation-config-into-VP-init.patch \ | ||
| 149 | file://pm-wip/voltdm/0133-OMAP3-VP-create-VP-helper-function-for-updating-erro.patch \ | ||
| 150 | file://pm-wip/voltdm/0134-OMAP3-VP-remove-omap_vp_runtime_data.patch \ | ||
| 151 | file://pm-wip/voltdm/0135-OMAP3-VP-move-voltage-scale-function-pointer-into-st.patch \ | ||
| 152 | file://pm-wip/voltdm/0136-OMAP-VP-Explicitly-mask-VPVOLTAGE-field.patch \ | ||
| 153 | file://pm-wip/voltdm/0137-OMAP3-VP-update_errorgain-return-error-if-VP.patch \ | ||
| 154 | file://pm-wip/voltdm/0138-OMAP3-VP-remove-unused-omap_vp_get_curr_volt.patch \ | ||
| 155 | file://pm-wip/voltdm/0139-OMAP3-VP-combine-setting-init-voltage-into-common-fu.patch \ | ||
| 156 | file://pm-wip/voltdm/0140-OMAP3-voltage-rename-scale-and-reset-functions-using.patch \ | ||
| 157 | file://pm-wip/voltdm/0141-OMAP3-voltage-move-rename-curr_volt-from-vdd_info-in.patch \ | ||
| 158 | file://pm-wip/voltdm/0142-OMAP3-voltdm-final-removal-of-omap_vdd_info.patch \ | ||
| 159 | file://pm-wip/voltdm/0143-OMAP3-voltage-rename-omap_voltage_get_nom_volt-voltd.patch \ | ||
| 160 | file://pm-wip/voltdm/0144-OMAP3-voltage-update-nominal-voltage-in-voltdm_scale.patch \ | ||
| 161 | file://pm-wip/voltdm/0145-OMAP4-PM-TWL6030-fix-voltage-conversion-formula.patch \ | ||
| 162 | file://pm-wip/voltdm/0146-OMAP4-PM-TWL6030-fix-uv-to-voltage-for-0x39.patch \ | ||
| 163 | file://pm-wip/voltdm/0147-OMAP4-PM-TWL6030-address-0V-conversions.patch \ | ||
| 164 | file://pm-wip/voltdm/0148-OMAP4-PM-TWL6030-fix-ON-RET-OFF-voltages.patch \ | ||
| 165 | file://pm-wip/voltdm/0149-OMAP4-PM-TWL6030-add-cmd-register.patch \ | ||
| 166 | file://pm-wip/cpufreq/0001-PM-OPP-introduce-function-to-free-cpufreq-table.patch \ | ||
| 167 | file://pm-wip/cpufreq/0002-OMAP-CPUfreq-ensure-driver-initializes-after-cpufreq.patch \ | ||
| 168 | file://pm-wip/cpufreq/0003-OMAP-CPUfreq-ensure-policy-is-fully-initialized.patch \ | ||
| 169 | file://pm-wip/cpufreq/0004-OMAP3-PM-CPUFreq-driver-for-OMAP3.patch \ | ||
| 170 | file://pm-wip/cpufreq/0005-OMAP-PM-CPUFREQ-Fix-conditional-compilation.patch \ | ||
| 171 | file://pm-wip/cpufreq/0006-cpufreq-fixup-after-new-OPP-layer-merged.patch \ | ||
| 172 | file://pm-wip/cpufreq/0007-OMAP-cpufreq-Split-OMAP1-and-OMAP2PLUS-CPUfreq-drive.patch \ | ||
| 173 | file://pm-wip/cpufreq/0008-OMAP2PLUS-cpufreq-Add-SMP-support-to-cater-OMAP4430.patch \ | ||
| 174 | file://pm-wip/cpufreq/0009-OMAP2PLUS-cpufreq-Fix-typo-when-attempting-to-set-mp.patch \ | ||
| 175 | file://pm-wip/cpufreq/0010-OMAP2-cpufreq-move-clk-name-decision-to-init.patch \ | ||
| 176 | file://pm-wip/cpufreq/0011-OMAP2-cpufreq-deny-initialization-if-no-mpudev.patch \ | ||
| 177 | file://pm-wip/cpufreq/0012-OMAP2-cpufreq-dont-support-freq_table.patch \ | ||
| 178 | file://pm-wip/cpufreq/0013-OMAP2-cpufreq-only-supports-OPP-library.patch \ | ||
| 179 | file://pm-wip/cpufreq/0014-OMAP2-cpufreq-put-clk-if-cpu_init-failed.patch \ | ||
| 180 | file://pm-wip/cpufreq/0015-OMAP2-cpufreq-fix-freq_table-leak.patch \ | ||
| 181 | file://pm-wip/cpufreq/0016-OMAP2-CPUfreq-Remove-superfluous-check-in-target-for.patch \ | ||
| 182 | file://pm-wip/cpufreq/0017-OMAP2-cpufreq-notify-even-with-bad-boot-frequency.patch \ | ||
| 183 | file://pm-wip/cpufreq/0018-OMAP2-cpufreq-Enable-all-CPUs-in-shared-policy-mask.patch \ | ||
| 184 | file://pm-wip/cpufreq/0019-OMAP2-CPUfreq-update-lpj-with-reference-value-to-avo.patch \ | ||
| 185 | \ | ||
| 186 | file://beagle/0001-OMAP3-beagle-add-support-for-beagleboard-xM-revision.patch \ | ||
| 187 | file://beagle/0002-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch \ | ||
| 188 | file://beagle/0003-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch \ | ||
| 189 | file://beagle/0004-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch \ | ||
| 190 | file://beagle/0005-omap3-Add-basic-support-for-720MHz-part.patch \ | ||
| 191 | file://beagle/0006-ARM-OMAP2-beagleboard-make-wilink-init-look-more-lik.patch \ | ||
| 192 | file://beagle/0007-omap_hsmmc-Set-dto-to-max-value-of-14-to-avoid-SD-Ca.patch \ | ||
| 193 | file://beagle/0008-OMAP2-add-cpu-id-register-to-MAC-address-helper.patch \ | ||
| 194 | file://beagle/0009-HACK-OMAP2-BeagleBoard-Fix-up-random-or-missing-MAC-.patch \ | ||
| 195 | file://beagle/0010-ARM-OMAP2-beagleboard-fix-mmc-write-protect-pin-when.patch \ | ||
| 196 | file://beagle/0011-beagleboard-reinstate-usage-of-hi-speed-PLL-divider.patch \ | ||
| 197 | file://madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch \ | ||
| 198 | file://madc/0002-mfd-twl-core-enable-madc-clock.patch \ | ||
| 199 | \ | ||
| 200 | file://sakoman/0001-mmc-don-t-display-single-block-read-console-messages.patch \ | ||
| 201 | file://sakoman/0002-omap-Change-omap_device-activate-dectivate-latency-m.patch \ | ||
| 202 | file://sakoman/0003-OMAP-DSS2-add-bootarg-for-selecting-svideo-or-compos.patch \ | ||
| 203 | file://sakoman/0004-mtd-nand-Eliminate-noisey-uncorrectable-error-messag.patch \ | ||
| 204 | file://sakoman/0005-video-add-timings-for-hd720.patch \ | ||
| 205 | file://sakoman/0006-drivers-net-smsc911x-return-ENODEV-if-device-is-not-.patch \ | ||
| 206 | file://sakoman/0007-drivers-input-touchscreen-ads7846-return-ENODEV-if-d.patch \ | ||
| 207 | file://sakoman/0008-Revert-omap2_mcspi-Flush-posted-writes.patch \ | ||
| 208 | file://sakoman/0009-rtc-twl-Use-threaded-IRQ-remove-IRQ-enable-in-interr.patch \ | ||
| 209 | file://sakoman/0010-rtc-twl-Fix-registration-vs.-init-order.patch \ | ||
| 210 | file://sakoman/0011-soc-codecs-Enable-audio-capture-by-default-for-twl40.patch \ | ||
| 211 | file://sakoman/0012-soc-codecs-twl4030-Turn-on-mic-bias-by-default.patch \ | ||
| 212 | file://sakoman/0013-omap-mmc-twl4030-move-clock-input-selection-prior-to.patch \ | ||
| 213 | file://sakoman/0014-rtc-twl-add-support-for-backup-battery-recharge.patch \ | ||
| 214 | \ | ||
| 215 | file://sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch \ | ||
| 216 | \ | ||
| 217 | file://ulcd/0001-OMAP_VOUT-Fix-build-break-caused-by-update_mode-remo.patch \ | ||
| 218 | file://ulcd/0002-WIP-omap-beagleboard-add-bbtoys-ulcd-lite-support.patch \ | ||
| 219 | file://ulcd/0003-ARM-OMAP2-beagleboard-add-support-for-loopthrough-ex.patch \ | ||
| 220 | file://ulcd/0004-LEDS-add-initial-support-for-WS2801-controller.patch \ | ||
| 221 | \ | ||
| 222 | file://omap4/0001-OMAP-Fix-linking-error-in-twl-common.c-for-OMAP2-3-4.patch \ | ||
| 223 | \ | ||
| 224 | file://misc/0001-compiler.h-Undef-before-redefining-__attribute_const.patch \ | ||
| 225 | \ | ||
| 226 | file://usb/0001-Fix-sprz319-erratum-2.1.patch \ | ||
| 227 | \ | ||
| 228 | file://defconfig" | ||
| 229 | |||
| 230 | SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \ | ||
| 231 | " | ||
| 232 | |||
| 233 | S = "${WORKDIR}/git" | ||
| 234 | |||
diff --git a/recipes-kernel/linux/linux_3.1.bb b/recipes-kernel/linux/linux_3.1.bb deleted file mode 100644 index 110d26c9..00000000 --- a/recipes-kernel/linux/linux_3.1.bb +++ /dev/null | |||
| @@ -1,33 +0,0 @@ | |||
| 1 | require linux.inc | ||
| 2 | |||
| 3 | COMPATIBLE_MACHINE = "beagleboard" | ||
| 4 | |||
| 5 | DESCRIPTION = "Linux kernel for TI processors" | ||
| 6 | |||
| 7 | DEFAULT_PREFERENCE = "-99" | ||
| 8 | |||
| 9 | PV = "3.0+3.1rc" | ||
| 10 | SRCREV_pn-${PN} = "9e79e3e9dd9672b37ac9412e9a926714306551fe" | ||
| 11 | |||
| 12 | # The main PR is now using MACHINE_KERNEL_PR, for omap3 see conf/machine/include/omap3.inc | ||
| 13 | MACHINE_KERNEL_PR_append = "e" | ||
| 14 | |||
| 15 | SRC_URI += "git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git;protocol=git \ | ||
| 16 | file://beagle/0001-UNFINISHED-OMAP3-beagle-add-support-for-expansionboa.patch \ | ||
| 17 | file://beagle/0002-HACK-OMAP3-beagle-switch-to-GPTIMER1.patch \ | ||
| 18 | file://madc/0001-Enabling-Hwmon-driver-for-twl4030-madc.patch \ | ||
| 19 | file://madc/0002-mfd-twl-core-enable-madc-clock.patch \ | ||
| 20 | file://sgx/0001-ARM-L2-Add-and-export-outer_clean_all.patch \ | ||
| 21 | file://fixes/vout.patch \ | ||
| 22 | file://defconfig" | ||
| 23 | |||
| 24 | # Needs refresh: | ||
| 25 | # file://beagle/0003-OMAP3-beagle-HACK-add-in-1GHz-OPP.patch \ | ||
| 26 | # | ||
| 27 | |||
| 28 | |||
| 29 | SRC_URI_append_beagleboard = " file://logo_linux_clut224.ppm \ | ||
| 30 | " | ||
| 31 | |||
| 32 | S = "${WORKDIR}/git" | ||
| 33 | |||