diff options
Diffstat (limited to 'recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch')
-rw-r--r-- | recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch | 99 |
1 files changed, 0 insertions, 99 deletions
diff --git a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch b/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch deleted file mode 100644 index fb4d44fe..00000000 --- a/recipes-kernel/linux/linux-3.0/pm-wip/voltdm/0061-OMAP4-clock-data-Remove-UNIPRO-clock-nodes.patch +++ /dev/null | |||
@@ -1,99 +0,0 @@ | |||
1 | From 73203093397f6939cea566cbedc2affc51d4b597 Mon Sep 17 00:00:00 2001 | ||
2 | From: Jon Hunter <jon-hunter@ti.com> | ||
3 | Date: Sat, 9 Jul 2011 19:14:47 -0600 | ||
4 | Subject: [PATCH 061/149] OMAP4: clock data: Remove UNIPRO clock nodes | ||
5 | |||
6 | UNIPRO was removed from OMAP4 devices from ES2.0 onwards. | ||
7 | Since this IP was anyway non-functional and not supported, | ||
8 | it is best to remove it completely. | ||
9 | |||
10 | Signed-off-by: Jon Hunter <jon-hunter@ti.com> | ||
11 | [b-cousson@ti.com: Update the changelog] | ||
12 | Signed-off-by: Benoit Cousson <b-cousson@ti.com> | ||
13 | [paul@pwsan.com: split PRCM header file changes into a separate patch] | ||
14 | Signed-off-by: Paul Walmsley <paul@pwsan.com> | ||
15 | --- | ||
16 | arch/arm/mach-omap2/clock44xx_data.c | 60 ---------------------------------- | ||
17 | 1 files changed, 0 insertions(+), 60 deletions(-) | ||
18 | |||
19 | diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c | ||
20 | index 96bc668..044df38 100644 | ||
21 | --- a/arch/arm/mach-omap2/clock44xx_data.c | ||
22 | +++ b/arch/arm/mach-omap2/clock44xx_data.c | ||
23 | @@ -935,63 +935,6 @@ static struct clk dpll_per_m7x2_ck = { | ||
24 | .set_rate = &omap2_clksel_set_rate, | ||
25 | }; | ||
26 | |||
27 | -/* DPLL_UNIPRO */ | ||
28 | -static struct dpll_data dpll_unipro_dd = { | ||
29 | - .mult_div1_reg = OMAP4430_CM_CLKSEL_DPLL_UNIPRO, | ||
30 | - .clk_bypass = &sys_clkin_ck, | ||
31 | - .clk_ref = &sys_clkin_ck, | ||
32 | - .control_reg = OMAP4430_CM_CLKMODE_DPLL_UNIPRO, | ||
33 | - .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED), | ||
34 | - .autoidle_reg = OMAP4430_CM_AUTOIDLE_DPLL_UNIPRO, | ||
35 | - .idlest_reg = OMAP4430_CM_IDLEST_DPLL_UNIPRO, | ||
36 | - .mult_mask = OMAP4430_DPLL_MULT_MASK, | ||
37 | - .div1_mask = OMAP4430_DPLL_DIV_MASK, | ||
38 | - .enable_mask = OMAP4430_DPLL_EN_MASK, | ||
39 | - .autoidle_mask = OMAP4430_AUTO_DPLL_MODE_MASK, | ||
40 | - .idlest_mask = OMAP4430_ST_DPLL_CLK_MASK, | ||
41 | - .max_multiplier = 2047, | ||
42 | - .max_divider = 128, | ||
43 | - .min_divider = 1, | ||
44 | -}; | ||
45 | - | ||
46 | - | ||
47 | -static struct clk dpll_unipro_ck = { | ||
48 | - .name = "dpll_unipro_ck", | ||
49 | - .parent = &sys_clkin_ck, | ||
50 | - .dpll_data = &dpll_unipro_dd, | ||
51 | - .init = &omap2_init_dpll_parent, | ||
52 | - .ops = &clkops_omap3_noncore_dpll_ops, | ||
53 | - .recalc = &omap3_dpll_recalc, | ||
54 | - .round_rate = &omap2_dpll_round_rate, | ||
55 | - .set_rate = &omap3_noncore_dpll_set_rate, | ||
56 | -}; | ||
57 | - | ||
58 | -static struct clk dpll_unipro_x2_ck = { | ||
59 | - .name = "dpll_unipro_x2_ck", | ||
60 | - .parent = &dpll_unipro_ck, | ||
61 | - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, | ||
62 | - .flags = CLOCK_CLKOUTX2, | ||
63 | - .ops = &clkops_omap4_dpllmx_ops, | ||
64 | - .recalc = &omap3_clkoutx2_recalc, | ||
65 | -}; | ||
66 | - | ||
67 | -static const struct clksel dpll_unipro_m2x2_div[] = { | ||
68 | - { .parent = &dpll_unipro_x2_ck, .rates = div31_1to31_rates }, | ||
69 | - { .parent = NULL }, | ||
70 | -}; | ||
71 | - | ||
72 | -static struct clk dpll_unipro_m2x2_ck = { | ||
73 | - .name = "dpll_unipro_m2x2_ck", | ||
74 | - .parent = &dpll_unipro_x2_ck, | ||
75 | - .clksel = dpll_unipro_m2x2_div, | ||
76 | - .clksel_reg = OMAP4430_CM_DIV_M2_DPLL_UNIPRO, | ||
77 | - .clksel_mask = OMAP4430_DPLL_CLKOUT_DIV_MASK, | ||
78 | - .ops = &clkops_omap4_dpllmx_ops, | ||
79 | - .recalc = &omap2_clksel_recalc, | ||
80 | - .round_rate = &omap2_clksel_round_rate, | ||
81 | - .set_rate = &omap2_clksel_set_rate, | ||
82 | -}; | ||
83 | - | ||
84 | static struct clk usb_hs_clk_div_ck = { | ||
85 | .name = "usb_hs_clk_div_ck", | ||
86 | .parent = &dpll_abe_m3x2_ck, | ||
87 | @@ -3058,9 +3001,6 @@ static struct omap_clk omap44xx_clks[] = { | ||
88 | CLK(NULL, "dpll_per_m5x2_ck", &dpll_per_m5x2_ck, CK_443X), | ||
89 | CLK(NULL, "dpll_per_m6x2_ck", &dpll_per_m6x2_ck, CK_443X), | ||
90 | CLK(NULL, "dpll_per_m7x2_ck", &dpll_per_m7x2_ck, CK_443X), | ||
91 | - CLK(NULL, "dpll_unipro_ck", &dpll_unipro_ck, CK_443X), | ||
92 | - CLK(NULL, "dpll_unipro_x2_ck", &dpll_unipro_x2_ck, CK_443X), | ||
93 | - CLK(NULL, "dpll_unipro_m2x2_ck", &dpll_unipro_m2x2_ck, CK_443X), | ||
94 | CLK(NULL, "usb_hs_clk_div_ck", &usb_hs_clk_div_ck, CK_443X), | ||
95 | CLK(NULL, "dpll_usb_ck", &dpll_usb_ck, CK_443X), | ||
96 | CLK(NULL, "dpll_usb_clkdcoldo_ck", &dpll_usb_clkdcoldo_ck, CK_443X), | ||
97 | -- | ||
98 | 1.7.2.5 | ||
99 | |||