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authorAppana Durga Kedareswara rao <appana.durga.rao@xilinx.com>2020-03-05 15:58:34 +0530
committerMark Hatle <mark.hatle@xilinx.com>2020-03-06 11:06:56 -0800
commit5a2dfa7bb09077c27ea4391b41b343440fa6f084 (patch)
treeeae5b1585ac5d768a91a7a61e208a71a9e1ff3ef /meta-xilinx-standalone/recipes-bsp
parent43dc7d3eb382eb04b724f40b716f1d48a3253783 (diff)
downloadmeta-xilinx-5a2dfa7bb09077c27ea4391b41b343440fa6f084.tar.gz
meta-xilinx-standalone: Add support for versal cortexr5 processor
This patch updates the COMPATIBLE_MACHINE and DTBFILE variables to compile esw use cases for cortexr5 processor on versal platform. Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
Diffstat (limited to 'meta-xilinx-standalone/recipes-bsp')
-rw-r--r--meta-xilinx-standalone/recipes-bsp/device-tree/device-tree.bbappend2
1 files changed, 2 insertions, 0 deletions
diff --git a/meta-xilinx-standalone/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-standalone/recipes-bsp/device-tree/device-tree.bbappend
index 96726933..abc96dd6 100644
--- a/meta-xilinx-standalone/recipes-bsp/device-tree/device-tree.bbappend
+++ b/meta-xilinx-standalone/recipes-bsp/device-tree/device-tree.bbappend
@@ -5,12 +5,14 @@ COMPATIBLE_MACHINE_cortexr5-zynqmp = ".*"
5COMPATIBLE_MACHINE_microblaze-pmu = ".*" 5COMPATIBLE_MACHINE_microblaze-pmu = ".*"
6COMPATIBLE_MACHINE_microblaze-plm = ".*" 6COMPATIBLE_MACHINE_microblaze-plm = ".*"
7COMPATIBLE_MACHINE_cortexa72-versal = ".*" 7COMPATIBLE_MACHINE_cortexa72-versal = ".*"
8COMPATIBLE_MACHINE_cortexr5-versal = ".*"
8 9
9XSCTH_PROC_cortexa53-zynqmp ??= "psu_cortexa53_0" 10XSCTH_PROC_cortexa53-zynqmp ??= "psu_cortexa53_0"
10XSCTH_PROC_cortexr5-zynqmp ??= "psu_cortexr5_0" 11XSCTH_PROC_cortexr5-zynqmp ??= "psu_cortexr5_0"
11XSCTH_PROC_microblaze-pmu ??= "psu_pmu_0" 12XSCTH_PROC_microblaze-pmu ??= "psu_pmu_0"
12XSCTH_PROC_cortexa72-versal ??= "psv_cortexa72_0" 13XSCTH_PROC_cortexa72-versal ??= "psv_cortexa72_0"
13XSCTH_PROC_microblaze-plm ??= "psv_pmc_0" 14XSCTH_PROC_microblaze-plm ??= "psv_pmc_0"
15XSCTH_PROC_cortexr5-versal ??= "psv_cortexr5_0"
14 16
15# Enable @ flag on dtc which is required by libxil 17# Enable @ flag on dtc which is required by libxil
16DTC_FLAGS_append_xilinx-standalone = " -@" 18DTC_FLAGS_append_xilinx-standalone = " -@"