meta-xilinx-standalone: Add support for versal cortexr5 processor

This patch updates the COMPATIBLE_MACHINE and DTBFILE
variables to compile esw use cases for cortexr5 processor
on versal platform.

Signed-off-by: Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>

2 files changed, 4 insertions, 0 deletions

diff --git a/meta-xilinx-standalone/classes/esw.bbclass b/meta-xilinx-standalone/classes/esw.bbclass
index f99dbdd5..1a6f24c4 100644
--- a/meta-xilinx-standalone/classes/esw.bbclass
+++ b/meta-xilinx-standalone/classes/esw.bbclass
@@ -31,6 +31,7 @@ COMPATIBLE_HOST_cortexa53-zynqmp = "aarch64.*-elf"
 COMPATIBLE_MACHINE_cortexa53-zynqmp = "cortexa53-zynqmp"
 
 COMPATIBLE_MACHINE_cortexr5-zynqmp = "cortexr5-zynqmp"
+COMPATIBLE_MACHINE_cortexr5-versal = "cortexr5-versal"
 
 COMPATIBLE_HOST_cortexa72-versal = "aarch64.*-elf"
 COMPATIBLE_MACHINE_cortexa72-versal = "cortexa72-versal"
@@ -43,6 +44,7 @@ DTBFILE_microblaze-plm ?= "${RECIPE_SYSROOT}/boot/devicetree/system-top.dtb"
 DTBFILE_cortexa53-zynqmp ?= "${RECIPE_SYSROOT}/boot/devicetree/system-top.dtb"
 DTBFILE_cortexr5-zynqmp ?= "${RECIPE_SYSROOT}/boot/devicetree/system-top.dtb"
 DTBFILE_cortexa72-versal ?= "${RECIPE_SYSROOT}/boot/devicetree/system-top.dtb"
+DTBFILE_cortexr5-versal ?= "${RECIPE_SYSROOT}/boot/devicetree/system-top.dtb"
 
 def get_xlnx_cmake_machine(fam, d):
     if (fam == 'zynqmp'):
diff --git a/meta-xilinx-standalone/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-standalone/recipes-bsp/device-tree/device-tree.bbappend
index 96726933..abc96dd6 100644
--- a/meta-xilinx-standalone/recipes-bsp/device-tree/device-tree.bbappend
+++ b/meta-xilinx-standalone/recipes-bsp/device-tree/device-tree.bbappend
@@ -5,12 +5,14 @@ COMPATIBLE_MACHINE_cortexr5-zynqmp = ".*"
 COMPATIBLE_MACHINE_microblaze-pmu = ".*"
 COMPATIBLE_MACHINE_microblaze-plm = ".*"
 COMPATIBLE_MACHINE_cortexa72-versal = ".*"
+COMPATIBLE_MACHINE_cortexr5-versal = ".*"
 
 XSCTH_PROC_cortexa53-zynqmp ??= "psu_cortexa53_0"
 XSCTH_PROC_cortexr5-zynqmp ??= "psu_cortexr5_0"
 XSCTH_PROC_microblaze-pmu ??= "psu_pmu_0"
 XSCTH_PROC_cortexa72-versal ??= "psv_cortexa72_0"
 XSCTH_PROC_microblaze-plm ??= "psv_pmc_0"
+XSCTH_PROC_cortexr5-versal ??= "psv_cortexr5_0"
 
 # Enable @ flag on dtc which is required by libxil
 DTC_FLAGS_append_xilinx-standalone = " -@"