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authorSiva Addepalli <sivaprasad.addepalli@xilinx.com>2023-11-14 12:46:10 +0530
committerMark Hatle <mark.hatle@amd.com>2023-11-20 16:27:20 -0600
commit8542abc620bdaab0d9c6e89178dfe20baa1af10c (patch)
tree07abe546cbe294eb8e0122ec093d5a63266785dd
parent35836b552db19bff5aa6106240cf171f7d91964e (diff)
downloadmeta-xilinx-8542abc620bdaab0d9c6e89178dfe20baa1af10c.tar.gz
Updated SRCREV of vcu-modules for 2024.1_4743
chore: align xilinx-private and master-allegro Fix compilation issue fix: xilinx implementation of add_memory refacto setup_dma reformat feat: Use the macro defined by the kernel to initialize dmabuf export informations. Move constant in al_constants.h small fixes cdev refacto Revert Revert Add support for reserved memory with start address not aligned on 2GB feat: getter/setter encode/decode Signed-off-by: Mark Hatle <mark.hatle@amd.com>
-rw-r--r--meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2024.1.bb2
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2024.1.bb b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2024.1.bb
index 7f2b205f..585dd629 100644
--- a/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2024.1.bb
+++ b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2024.1.bb
@@ -13,7 +13,7 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
13 13
14BRANCH = "master" 14BRANCH = "master"
15REPO = "git://github.com/Xilinx/vcu-modules.git;protocol=https" 15REPO = "git://github.com/Xilinx/vcu-modules.git;protocol=https"
16SRCREV = "689c8d823b383e2a8a5249be49de627f866cfaf2" 16SRCREV = "51f22c517a2c58fef4f358ffaac3e159692c5ee7"
17 17
18BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}" 18BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
19SRC_URI = " \ 19SRC_URI = " \