arm-trusted-firmware : Updated SRCREV for 2024.1_7471

Merge "fix(arm): correct the SPMC_AT_EL3 condition" into integration
Merge "fix(xlat): set MAX_PHYS_ADDR to total mapped physical region" into integration
Merge "fix(intel): update boot scratch cold register to use cold 8" into integration
Merge changes from topic "sb/remove-cryptocell" into integration
Merge "docs(qemu): mention a55 in list of v8.2 cores" into integration
Merge "build(qemu): use xlat tables v2 directly" into integration
chore(npcm845x): remove CryptoCell-712/713 support
build(qemu): use xlat tables v2 directly
docs(qemu): mention a55 in list of v8.2 cores
fix(arm): correct the SPMC_AT_EL3 condition
chore(auth)!: remove CryptoCell-712/713 support
Merge "build(qemu-sbsa): it is GICv3 platform" into integration
Merge changes Ia72b2542,I1eba5671 into integration
Merge "chore(libfdt): update header files to v1.7.0 tag" into integration
Merge "refactor(cm): introduce INIT_UNUSED_NS_EL2 macro" into integration
Merge "fix(el3-spmc): remove experimental flag" into integration
Merge changes from topic "ns/spmc_at_el3" into integration
Merge "fix(smccc): ensure that mpidr passed through SMC is valid" into integration
fix(el3-spmc): remove experimental flag
feat(sgi): increase sp memmap size
feat(build): include plat header in fdt build
feat(docs): save BL32 image base and size in entry point info
feat(arm): save BL32 image base and size in entry point info
refactor(cm): introduce INIT_UNUSED_NS_EL2 macro
chore(compiler-rt): update compiler-rt source files
chore(zlib): update zlib to version 1.3
chore(libfdt): update header files to v1.7.0 tag
fix(smccc): ensure that mpidr passed through SMC is valid
build(qemu-sbsa): it is GICv3 platform
Merge "fix(sdei): ensure that interrupt ID is valid" into integration
Merge changes from topic "enable_assertion" into integration
Merge changes from topic "errata" into integration
Merge "fix(ti): release lock in all TI-SCI xfer return paths" into integration
Merge "feat(xilinx): switch boot console to runtime" into integration
Merge "docs: add TF-A version numbering information" into integration
Merge "feat(zynqmp): remove pm_ioctl_set_sgmii_mode api" into integration
fix(ti): release lock in all TI-SCI xfer return paths
fix(intel): update boot scratch cold register to use cold 8
fix(xlat): set MAX_PHYS_ADDR to total mapped physical region
docs: add TF-A version numbering information
feat(zynqmp): remove pm_ioctl_set_sgmii_mode api
fix(cpus): workaround for Cortex-X2 erratum 2742423
fix(cpus): workaround for Cortex-A710 erratum 2742423
fix(cpus): workaround for Neoverse N2 erratum 2340933
fix(cpus): workaround for Neoverse N2 erratum 2346952
fix(sdei): ensure that interrupt ID is valid
feat(zynqmp): enable assertion
feat(versal-net): enable assertion
feat(versal): enable assertion
feat(xilinx): switch boot console to runtime

1 files changed, 1 insertions, 1 deletions

diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2024.1.bb b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2024.1.bb
index 5a288b20..87aeb17e 100644
--- a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2024.1.bb
+++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2024.1.bb
@@ -1,5 +1,5 @@
 ATF_VERSION = "3.0"
-SRCREV = "9bb15ab53ad2dc22323f4a90256a7fe7e7399960"
+SRCREV = "e7781c84e9b36c948aa84721a09d96ee9e2b6eef"
 BRANCH = "xlnx_rebase_v3.0"
 LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031"