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-rw-r--r--meta-microblaze/recipes-devtools/binutils/binutils/0018-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch167
1 files changed, 167 insertions, 0 deletions
diff --git a/meta-microblaze/recipes-devtools/binutils/binutils/0018-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch
new file mode 100644
index 00000000..6a70dbfb
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/binutils/binutils/0018-Patch-MicroBlaze-Adding-new-relocation-to-support-64.patch
@@ -0,0 +1,167 @@
1From 6209a572f4ec70608564fa7aa0270d640aa421f0 Mon Sep 17 00:00:00 2001
2From: Mahesh Bodapati <mbodapat@xilinx.com>
3Date: Tue, 2 Nov 2021 17:28:24 +0530
4Subject: [PATCH 18/34] [Patch,MicroBlaze : Adding new relocation to support
5 64bit rodata.
6
7---
8 bfd/elf64-microblaze.c | 11 +++++++--
9 gas/config/tc-microblaze.c | 49 ++++++++++++++++++++++++++++++++++----
10 2 files changed, 54 insertions(+), 6 deletions(-)
11
12diff --git a/bfd/elf64-microblaze.c b/bfd/elf64-microblaze.c
13index f16b544b1fc..355e9131987 100644
14--- a/bfd/elf64-microblaze.c
15+++ b/bfd/elf64-microblaze.c
16@@ -1529,6 +1529,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
17 case (int) R_MICROBLAZE_64_PCREL :
18 case (int) R_MICROBLAZE_64:
19 case (int) R_MICROBLAZE_32:
20+ case (int) R_MICROBLAZE_IMML_64:
21 {
22 /* r_symndx will be STN_UNDEF (zero) only for relocs against symbols
23 from removed linkonce sections, or sections discarded by
24@@ -1538,6 +1539,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
25 relocation += addend;
26 if (r_type == R_MICROBLAZE_32)// || r_type == R_MICROBLAZE_IMML_64)
27 bfd_put_32 (input_bfd, relocation, contents + offset);
28+ else if (r_type == R_MICROBLAZE_IMML_64)
29+ bfd_put_64 (input_bfd, relocation, contents + offset);
30 else
31 {
32 if (r_type == R_MICROBLAZE_64_PCREL)
33@@ -1626,7 +1629,7 @@ microblaze_elf_relocate_section (bfd *output_bfd,
34 }
35 else
36 {
37- if (r_type == R_MICROBLAZE_32)
38+ if (r_type == R_MICROBLAZE_32 || r_type == R_MICROBLAZE_IMML_64)
39 {
40 outrel.r_info = ELF64_R_INFO (0, R_MICROBLAZE_REL);
41 outrel.r_addend = relocation + addend;
42@@ -1652,6 +1655,8 @@ microblaze_elf_relocate_section (bfd *output_bfd,
43 relocation += addend;
44 if (r_type == R_MICROBLAZE_32)
45 bfd_put_32 (input_bfd, relocation, contents + offset);
46+ else if (r_type == R_MICROBLAZE_IMML_64)
47+ bfd_put_64 (input_bfd, relocation, contents + offset + endian);
48 else
49 {
50 if (r_type == R_MICROBLAZE_64_PCREL)
51@@ -2166,7 +2171,8 @@ microblaze_elf_relax_section (bfd *abfd,
52 microblaze_bfd_write_imm_value_32 (abfd, ocontents + irelscan->r_offset,
53 irelscan->r_addend);
54 }
55- if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32)
56+ if (ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_32
57+ || ELF64_R_TYPE (irelscan->r_info) == (int) R_MICROBLAZE_IMML_64)
58 {
59 isym = isymbuf + ELF64_R_SYM (irelscan->r_info);
60
61@@ -2633,6 +2639,7 @@ microblaze_elf_check_relocs (bfd * abfd,
62 case R_MICROBLAZE_64:
63 case R_MICROBLAZE_64_PCREL:
64 case R_MICROBLAZE_32:
65+ case R_MICROBLAZE_IMML_64:
66 {
67 if (h != NULL && !bfd_link_pic (info))
68 {
69diff --git a/gas/config/tc-microblaze.c b/gas/config/tc-microblaze.c
70index d3de049e9c0..76ce516d8aa 100644
71--- a/gas/config/tc-microblaze.c
72+++ b/gas/config/tc-microblaze.c
73@@ -1119,6 +1119,13 @@ md_assemble (char * str)
74 as_fatal (_("smi pseudo instruction should not use a label in imm field"));
75 if(streq (name, "lli") || streq (name, "sli"))
76 opc = str_microblaze_64;
77+ else if ((microblaze_arch_size == 64) && ((streq (name, "lbui")
78+ || streq (name, "lhui") || streq (name, "lwi") || streq (name, "sbi")
79+ || streq (name, "shi") || streq (name, "swi"))))
80+ {
81+ opc = str_microblaze_64;
82+ subtype = opcode->inst_offset_type;
83+ }
84 else if (reg2 == REG_ROSDP)
85 opc = str_microblaze_ro_anchor;
86 else if (reg2 == REG_RWSDP)
87@@ -1186,7 +1193,10 @@ md_assemble (char * str)
88 inst |= (immed << IMM_LOW) & IMM_MASK;
89 }
90 }
91- else if (streq (name, "lli") || streq (name, "sli"))
92+ else if (streq (name, "lli") || streq (name, "sli") || ((microblaze_arch_size == 64)
93+ && ((streq (name, "lbui")) || streq (name, "lhui")
94+ || streq (name, "lwi") || streq (name, "sbi")
95+ || streq (name, "shi") || streq (name, "swi"))))
96 {
97 temp = immed & 0xFFFFFF8000;
98 if (temp != 0 && temp != 0xFFFFFF8000)
99@@ -1802,6 +1812,11 @@ md_assemble (char * str)
100
101 if (exp.X_md != 0)
102 subtype = get_imm_otype(exp.X_md);
103+ else if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
104+ {
105+ opc = str_microblaze_64;
106+ subtype = opcode->inst_offset_type;
107+ }
108 else
109 subtype = opcode->inst_offset_type;
110
111@@ -1819,6 +1834,31 @@ md_assemble (char * str)
112 output = frag_more (isize);
113 immed = exp.X_add_number;
114 }
115+ if (streq (name, "brealid") || streq (name, "breaid") || streq (name, "breai"))
116+ {
117+ temp = immed & 0xFFFFFF8000;
118+ if (temp != 0 && temp != 0xFFFFFF8000)
119+ {
120+ /* Needs an immediate inst. */
121+ opcode1 = (struct op_code_struct *) str_hash_find (opcode_hash_control, "imml");
122+ if (opcode1 == NULL)
123+ {
124+ as_bad (_("unknown opcode \"%s\""), "imml");
125+ return;
126+ }
127+ inst1 = opcode1->bit_sequence;
128+ inst1 |= ((immed & 0xFFFFFFFFFFFF0000L) >> 16) & IMML_MASK;
129+ output[0] = INST_BYTE0 (inst1);
130+ output[1] = INST_BYTE1 (inst1);
131+ output[2] = INST_BYTE2 (inst1);
132+ output[3] = INST_BYTE3 (inst1);
133+ output = frag_more (isize);
134+ }
135+ inst |= (reg1 << RD_LOW) & RD_MASK;
136+ inst |= (immed << IMM_LOW) & IMM_MASK;
137+ }
138+ else
139+ {
140
141 temp = immed & 0xFFFF8000;
142 if ((temp != 0) && (temp != 0xFFFF8000))
143@@ -1844,6 +1884,7 @@ md_assemble (char * str)
144
145 inst |= (reg1 << RD_LOW) & RD_MASK;
146 inst |= (immed << IMM_LOW) & IMM_MASK;
147+ }
148 break;
149
150 case INST_TYPE_R2:
151@@ -3090,10 +3131,10 @@ cons_fix_new_microblaze (fragS * frag,
152 r = BFD_RELOC_32;
153 break;
154 case 8:
155- /*if (microblaze_arch_size == 64)
156- r = BFD_RELOC_32;
157- else*/
158+ if (microblaze_arch_size == 64)
159 r = BFD_RELOC_MICROBLAZE_EA64;
160+ else
161+ r = BFD_RELOC_64;
162 break;
163 default:
164 as_bad (_("unsupported BFD relocation size %u"), size);
165--
1662.37.1 (Apple Git-137.1)
167
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2024-06-09 07:27:06 +0000