summaryrefslogtreecommitdiffstats
path: root/meta-xilinx-standalone/classes
diff options
context:
space:
mode:
authorAddepalli, Siva <siva.addepalli@amd.com>2023-08-18 16:45:34 +0530
committerSiva Addepalli <siva.addepalli@amd.com>2023-08-18 17:57:10 +0530
commitbc3ca6fd44cc2d40e720f18ef9005e31a065bc32 (patch)
treecfb9e538d605d46184502b00013534802e01076a /meta-xilinx-standalone/classes
parentfdb9cb07d1675295fe1dcb361dc703f89544abd3 (diff)
downloadmeta-xilinx-bc3ca6fd44cc2d40e720f18ef9005e31a065bc32.tar.gz
embeddedsw : Updated SRCREV for 2023.2_8175
xilpm: versal_net: skip rpu halt if core is powered down xilpm: versal_net: do not skip core power down versal_psmfw: remove PCIL configuration from requested pwr sequence xilpm: versal_net: execute direct pwr down sequence for rpu sw_apps:versal_plm: Added redundancy for XOcp_KeyInit sdps: Fix code format issues sdps: Reorder XSdPs_FrameCmd and XSdPs_Identify_UhsMode APIs xilocp: Move SWPCR buffers in PCR example to shared memory qspipsu: data: Update yaml to port missing examples xilsecure:Remove TRNG driver from xilsecure library lwip213: Update axi ethernet and dma code to support SDT and non SDT flows lwip213: Update axi emaclite code in lwip adapter to support SDT and non SDT flows sw_apps: srec_spi_bootloader: Update dependent drivers in yaml file lib: sw_services: Update supported_processors list for psx_pmc and psx_psm processors v_hdmitxss1: Added support for VEK280 v_hdmirxss1: Added support for VEK280 Signed-off-by: Siva Addepalli <siva.addepalli@amd.com>
Diffstat (limited to 'meta-xilinx-standalone/classes')
-rw-r--r--meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass2
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
index 70fab2fc..2d409353 100644
--- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
+++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
@@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2-next"
8BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" 8BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}"
9 9
10ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" 10ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab"
11ESW_REV[2023.2] = "75c7c3382a2e2b7ae42f9d8e017ca388b1fe2358" 11ESW_REV[2023.2] = "ef3d824dc3a05106af750403ebb488aac07ee889"
12SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" 12SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}"
13 13
14EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" 14EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}"