Merge remote-tracking branch 'origin/rel-v2023.2' into nanbield

Signed-off-by: Mark Hatle <mark.hatle@amd.com>
author: Mark Hatle <mark.hatle@amd.com> 2023-10-23 08:51:20 -0600
committer: Mark Hatle <mark.hatle@amd.com> 2023-10-23 08:56:37 -0600
commit: eb42c7caeac33f42096673522e650441f05ca8da (patch)
tree: 33f97fe41ec8855cf591c2692c7c7038b6bc1ae3
parent: 387b31acf85b84bd34f339c87c0b51a9af4e16e4 (diff)
parent: 05911e19d85fd98c42054238392afe95a5125265 (diff)
download: meta-xilinx-eb42c7caeac33f42096673522e650441f05ca8da.tar.gz
105 files changed, 3261 insertions, 443 deletions
diff --git a/.gitmodules b/.gitmodules
index ae8486a4..017e758a 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,4 +1,4 @@
 [submodule "gen-machine-conf"]
        path = meta-xilinx-core/gen-machine-conf
-        url = https://github.com/Xilinx/gen-machine-conf.git
+        url = https://gitenterprise.xilinx.com/Petalinux/gen-machine-conf.git
-        branch = xlnx_rel_v2023.1
+        branch = xlnx_rel_v2023.2
diff --git a/README.building.md b/README.building.md
index 8bb866a7..7ffc1ab3 100644
--- a/README.building.md
+++ b/README.building.md
@@ -31,7 +31,7 @@ $ source poky/oe-init-build-env
 4. Once initialized configure `bblayers.conf` by adding dependency layers as shown
   below using `bitbake-layers` command.
 > **Note:** From step 3 by default `meta-yocto-bsp` will be included in bblayers.conf
-> file and this can be removed using `$ bitbake-layers add-layer meta-yocto-bsp`
+> file and this can be removed using `$ bitbake-layers remove-layer meta-yocto-bsp`
 > command.
 ```
diff --git a/docs/README.dfx.user.dts.md b/docs/README.dfx.user.dts.md
new file mode 100644
index 00000000..6cfc5fd0
--- /dev/null
+++ b/docs/README.dfx.user.dts.md
@@ -0,0 +1,475 @@
+# Build Instructions to create firmware recipes using dfx_user_dts bbclass
+* [Introduction](#introduction)
+* [How to create a firmware recipe app](#how-to-create-a-firmware-recipe-app)
+* [Test Procedure on Target](#test-procedure-on-target)
+  * [Loading PL bitstream or pdi and dt overlay](#loading-pl-bitstream-or-pdi-and-dt-overlay)
+  * [Testing PL functionality](#testing-pl-functionality)
+  * [Unloading PL bitstream or pdi and dt overlay](#unloading-pl-bitstream-or-pdi-and-dt-overlay)
+* [References](#references)
+## Introduction
+This readme describes the build instructions to create firmware recipes using
+dfx_user_dts.bbclass for dfx configuration. This bitbake class supports
+following use cases.
+> **Note:** Refer https://github.com/Xilinx/dfx-mgr/blob/master/README.md for
+> shell.json and accel.json file content.
+* **Zynq-7000 and ZynqMP**:
+  * Design: Vivado flat design.
+    * Input files to firmware recipes: .bit, .dtsi or dtbo and shell.json (optional)
+    * Usage Examples:
+```
+SRC_URI = " \
+    file://<flat_design_pl>.bit \
+    file://<flat_design_pl>.dtsi \
+    file://shell.json \
+    "
+```
+```
+SRC_URI = " \
+    file://<flat_design_pl>.bit \
+    file://<flat_design_pl>.dtbo \
+    file://shell.json \
+    "
+```
+* **ZynqMP and Versal**:
+  * Design: Vivado DFx design.
+    * Input files to firmware recipes: .bit(ZynqMP) or .pdi(Versal), .dtsi or dtbo
+      shell.json or accel.json (optional) and .xclbin (optional).
+    * Usage Examples:
+```
+# ZynqMP DFx Static
+SRC_URI = " \
+    file://<dfx_design_static_pl>.bit \
+    file://<dfx_design_static_pl>.dtsi \
+    file://shell.json \
+    file://<dfx_design_static_pl>.xclbin \
+    "
+```
+```
+# ZynqMP DFx Static
+SRC_URI = " \
+    file://<dfx_design_static_pl>.bit \
+    file://<dfx_design_static_pl>.dtbo \
+    file://shell.json \
+    file://<dfx_design_static_pl>.xclbin \
+    "
+```
+```
+# ZynqMP DFx RP
+SRC_URI = " \
+    file://<dfx_design_rp_rm_pl>.bit \
+    file://<dfx_design_rp_rm_pl>.dtsi \
+    file://accel.json \
+    file://<dfx_design_rp_rm_pl>.xclbin \
+    "
+```
+```
+# ZynqMP DFx RP
+SRC_URI = " \
+    file://<dfx_design_rp_rm_pl>.bit \
+    file://<dfx_design_rp_rm_pl>.dtbo \
+    file://accel.json \
+    file://<dfx_design_rp_rm_pl>.xclbin \
+    "
+```
+```
+# Versal DFx Static
+SRC_URI = " \
+    file://<dfx_design_static_pl>.pdi \
+    file://<dfx_design_static_pl>.dtsi \
+    file://shell.json \
+    file://<dfx_design_static_pl>.xclbin \
+    "
+```
+```
+# Versal DFx Static
+SRC_URI = " \
+    file://<dfx_design_static_pl>.pdi \
+    file://<dfx_design_static_pl>.dtbo \
+    file://shell.json \
+    file://<dfx_design_static_pl>.xclbin \
+    "
+```
+```
+# Versal DFx RP
+SRC_URI = " \
+    file://<dfx_design_rp_rm_pl>.pdi \
+    file://<dfx_design_rp_rm_pl>.dtsi \
+    file://accel.json \
+    file://<dfx_design_rp_rm_pl>.xclbin \
+    "
+```
+```
+# Versal DFx RP
+SRC_URI = " \
+    file://<dfx_design_rp_rm_pl>.pdi \
+    file://<dfx_design_rp_rm_pl>.dtbo \
+    file://accel.json \
+    file://<dfx_design_rp_rm_pl>.xclbin \
+    "
+```
+---
+## How to create a firmware recipe app
+1. Follow [Building Instructions](../README.building.md) upto step 4.
+2. Create recipes-firmware directory in meta layer and copy the .bit/pdi,
+   .dtsi/dtbo, .json and .xclbin file to these directories.
+```
+$ mkdir -p <meta-layer>/recipes-fimrware/<recipes-firmware-app>/files
+$ cp -r <path-to-files>/*.{bit or pdi, dtsi or dtbo, shell.json or accel.json and .xclbin} <meta-layer>/recipes-fimrware/<firmware-app-name>/files
+```
+3. Now create the recipes for flat or static or partial firmware using recipetool.
+```
+$ recipetool create -o <meta-layer>/recipes-fimrware/<firmware-app-name>/firmware-app-name.bb file:///<meta-layer>/recipes-fimrware/<firmware-app-name>/files 
+```
+4. Modify the recipe and inherit dfx_user_dts bbclass as shown below.
+```
+SUMMARY = "Full Bitstream loading app firmware using dfx_user_dts bbclass"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302"
+inherit dfx_user_dts
+SRC_URI = "\
+    file://zcu111-pl-demo.bit \
+    file://zcu111-pl-demo.dtsi \
+    "
+COMPATIBLE_MACHINE ?= "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+```
+5. Add firmware-recipe app to image and enable fpga-overlay machine features to
+   local.conf as shown below.
+> **Note:** fpga-manager-script provides fpgautil tool to load .bit/pdi and dtbo
+> at runtime linux.
+```
+MACHINE_FEATURES += "fpga-overlay"
+IMAGE_INSTALL:append = " \
+  firmware-app-name \
+  fpga-manager-script \
+  "
+```
+6. Follow [Building Instructions](../README.building.md) and continue from step 5.
+7. Once images are built firmware app files will be installed on target_rootfs.
+```
+# <target_rootfs>/lib/firmware/xilinx/firmware-app-name
+```
+---
+## Test Procedure on Target
+* Once Linux boots on target, use fpgautil command to load .bit or .pdi and
+  corresponding dt overlay as shown below.
+> **Note:** firmware can be loaded only with sudo or root permissions.
+---
+### Loading PL bitstream or pdi and dt overlay
+* ZynqMP
+```
+yocto-zynqmp-generic-20231:~$ sudo su
+yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
+           CPU0       CPU1       CPU2       CPU3
+ 11:      13309      13021      13673      14170     GICv2  30 Level     arch_timer
+ 14:          0          0          0          0     GICv2  67 Level     zynqmp_ipi
+ 15:          0          0          0          0     GICv2 175 Level     arm-pmu
+ 16:          0          0          0          0     GICv2 176 Level     arm-pmu
+ 17:          0          0          0          0     GICv2 177 Level     arm-pmu
+ 18:          0          0          0          0     GICv2 178 Level     arm-pmu
+ 19:          0          0          0          0     GICv2  58 Level     ffa60000.rtc
+ 20:          0          0          0          0     GICv2  59 Level     ffa60000.rtc
+ 21:          0          0          0          0     GICv2  42 Level     ff960000.memory-controller
+ 22:          0          0          0          0     GICv2  88 Level     ams-irq
+ 23:          0          0          0          0     GICv2 155 Level     axi-pmon, axi-pmon
+ 24:        327          0          0          0     GICv2  53 Level     xuartps
+ 27:          0          0          0          0     GICv2 156 Level     zynqmp-dma
+ 28:          0          0          0          0     GICv2 157 Level     zynqmp-dma
+ 29:          0          0          0          0     GICv2 158 Level     zynqmp-dma
+ 30:          0          0          0          0     GICv2 159 Level     zynqmp-dma
+ 31:          0          0          0          0     GICv2 160 Level     zynqmp-dma
+ 32:          0          0          0          0     GICv2 161 Level     zynqmp-dma
+ 33:          0          0          0          0     GICv2 162 Level     zynqmp-dma
+ 34:          0          0          0          0     GICv2 163 Level     zynqmp-dma
+ 35:          0          0          0          0     GICv2 109 Level     zynqmp-dma
+ 36:          0          0          0          0     GICv2 110 Level     zynqmp-dma
+ 37:          0          0          0          0     GICv2 111 Level     zynqmp-dma
+ 38:          0          0          0          0     GICv2 112 Level     zynqmp-dma
+ 39:          0          0          0          0     GICv2 113 Level     zynqmp-dma
+ 40:          0          0          0          0     GICv2 114 Level     zynqmp-dma
+ 41:          0          0          0          0     GICv2 115 Level     zynqmp-dma
+ 42:          0          0          0          0     GICv2 116 Level     zynqmp-dma
+ 43:          0          0          0          0     GICv2 154 Level     fd4c0000.dma-controller
+ 44:       5938          0          0          0     GICv2  47 Level     ff0f0000.spi
+ 45:         76          0          0          0     GICv2  95 Level     eth0, eth0
+ 46:          0          0          0          0     GICv2  57 Level     axi-pmon, axi-pmon
+ 47:       4802          0          0          0     GICv2  49 Level     cdns-i2c
+ 48:        501          0          0          0     GICv2  50 Level     cdns-i2c
+ 50:          0          0          0          0     GICv2  84 Edge      ff150000.watchdog
+ 51:          0          0          0          0     GICv2 151 Level     fd4a0000.display
+ 52:        548          0          0          0     GICv2  81 Level     mmc0
+ 53:          0          0          0          0     GICv2 165 Level     ahci-ceva[fd0c0000.ahci]
+ 54:          0          0          0          0     GICv2  97 Level     xhci-hcd:usb1
+ 55:          0          0          0          0  zynq-gpio  22 Edge      sw19
+IPI0:        64         25         87         38       Rescheduling interrupts
+IPI1:      1933       6579       1096       5686       Function call interrupts
+IPI2:         0          0          0          0       CPU stop interrupts
+IPI3:         0          0          0          0       CPU stop (for crash dump) interrupts
+IPI4:         0          0          0          0       Timer broadcast interrupts
+IPI5:         0          0          0          0       IRQ work interrupts
+IPI6:         0          0          0          0       CPU wake-up interrupts
+Err:          0
+yocto-zynqmp-generic-20231:/home/petalinux# tree /lib/firmware/
+/lib/firmware/
+`-- xilinx
+    `-- zcu111-pl-demo
+        |-- zcu111-pl-demo.bit.bin
+        `-- zcu111-pl-demo.dtbo
+2 directories, 2 files
+yocto-zynqmp-generic-20231:/home/petalinux# fpgautil -b /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.bit -o /lib/firmware/xilinx/zcu111-pl-demo/zcu111-pl-demo.dtbo
+[   91.039773] fpga_manager fpga0: writing zcu111-pl-demo.bit to Xilinx ZynqMP FPGA Manager
+[   91.528214] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/firmware-name
+[   91.538354] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/pid
+[   91.547598] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/resets
+[   91.557087] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga-full/uid
+[   91.566804] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/afi0
+[   91.576312] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/clocking0
+[   91.586255] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_0
+[   91.596280] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/misc_clk_0
+[   91.606300] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_1
+[   91.616325] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_gpio_2
+[   91.626342] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/axi_uartlite_0
+[   91.636705] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/ddr4_0
+[   91.661849] gpio gpiochip3: (a0000000.gpio): not an immutable chip, please consider fixing it!
+[   91.662020] gpio gpiochip4: (a0010000.gpio): not an immutable chip, please consider fixing it!
+[   91.863492] a0030000.serial: ttyUL0 at MMIO 0xa0030000 (irq = 58, base_baud = 0) is a uartlite
+[   91.876674] uartlite a0030000.serial: Runtime PM usage count underflow!
+[   91.906539] input: pl-gpio-keys as /devices/platform/pl-gpio-keys/input/input1
+Time taken to load BIN is 901.000000 Milli Seconds
+BIN FILE loaded through FPGA manager successfully
+yocto-zynqmp-generic-20231:/home/petalinux#
+```
+* Versal (DFx Static)
+```
+yocto-vck190-dfx-2023:~$ sudo su
+root@yocto-vck190-dfx-2023:~# 
+root@yocto-vck190-dfx-2023:~# fpgautil -o /lib/firmware/xilinx/vck190-dfx-static/vck190-dfx-static.dtbo
+[  257.555571] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/external-fpga-config
+[  257.565879] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/pid
+[  257.574670] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/uid
+[  257.583599] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR0
+[  257.593434] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR1
+[  257.603268] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/fpga_PR2
+[  257.613100] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_axi_bram_ctrl_0
+[  257.624762] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp1
+[  257.636589] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp2
+[  257.648415] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/static_region_dfx_decoupler_rp3
+[  257.663234] of-fpga-region fpga:fpga-PR0: FPGA Region probed
+[  257.669135] of-fpga-region fpga:fpga-PR1: FPGA Region probed
+[  257.675022] of-fpga-region fpga:fpga-PR2: FPGA Region probed
+root@yocto-vck190-dfx-2023:~#
+```
+* Versal (DFx RP)
+```
+root@yocto-vck190-dfx-2023:~# fpgautil -b /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.pdi -o /lib/firmware/xilinx/vck190-dfx-static/rp1/vck190-dfx-rp1rm1-dipsw/vck190-dfx-rp1rm1-dipsw.dtbo -f Partial -n PR0
+[  273.511455] fpga_manager fpga0: writing vck190-dfx-rp1rm1-dipsw.pdi to Xilinx Versal FPGA Manager
+[284052.461]Loading PDI from DDR
+[284052.566]Monolithic/Master Device
+[284055.847]3.365 ms: PDI initialization time
+[284059.809]+++Loading Image#: 0x0, Name: pl_cfi, Id: 0x18700002
+[284065.432]---Loading Partition#: 0x0, Id: 0x103
+[284069.829] 0.033 ms for Partition#: 0x0, Size: 1312 Bytes
+[284074.973]---Loading Partition#: 0x1, Id: 0x105
+[284079.344] 0.007 ms for Partition#: 0x1, Size: 160 Bytes
+[284084.430]---Loading Partition#: 0x2, Id: 0x205
+[284088.844] 0.049 ms for Partition#: 0x2, Size: 960 Bytes
+[284093.887]---Loading Partition#: 0x3, Id: 0x203
+[284098.280] 0.030 ms for Partition#: 0x3, Size: 688 Bytes
+[284103.342]---Loading Partition#: 0x4, Id: 0x303
+[284108.863] 1.156 ms for Partition#: 0x4, Size: 209440 Bytes
+[284113.052]---Loading Partition#: 0x5, Id: 0x305
+[284117.712] 0.296 ms for Partition#: 0x5, Size: 3536 Bytes
+[284122.594]---Loading Partition#: 0x6, Id: 0x403
+[284126.991] 0.034 ms for Partition#: 0x6, Size: 8096 Bytes
+[284132.136]---Loading Partition#: 0x7, Id: 0x405
+[284136.507] 0.007 ms for Partition#: 0x7, Size: 160 Bytes
+[284141.636]Subsystem PDI Load: Done
+[  273.615503] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/firmware-name
+[  273.627382] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/fpga-bridges
+[  273.636953] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /fpga/partial-fpga-config
+[  273.647241] OF: overlay: WARNING: memory leak will occur if overlay removed, property: /__symbols__/rp1_axi_gpio_0
+[  273.660826] gpio gpiochip1: (a4010000.gpio): not an immutable chip, please consider fixing it!
+[  273.670490] input: pl-gpio-keys as /devices/platform/pl-gpio-keys/input/input0
+Time taken to load BIN is 171.000000 Milli Seconds
+BIN FILE loaded through FPGA manager successfully
+root@yocto-vck190-dfx-2023:~#
+```
+---
+### Testing PL functionality 
+* This examples uses PL GPIO DIP switches and Push buttons to capture interrupts.
+* Verify PL GPIO DIP switches and Push buttons are registered.
+* Move the DIP Switches ON/OFF and verify the interrupt counts.
+```
+yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
+           CPU0       CPU1       CPU2       CPU3
+ 11:      23303      22971      24203      24990     GICv2  30 Level     arch_timer
+ 14:          0          0          0          0     GICv2  67 Level     zynqmp_ipi
+ 15:          0          0          0          0     GICv2 175 Level     arm-pmu
+ 16:          0          0          0          0     GICv2 176 Level     arm-pmu
+ 17:          0          0          0          0     GICv2 177 Level     arm-pmu
+ 18:          0          0          0          0     GICv2 178 Level     arm-pmu
+ 19:          0          0          0          0     GICv2  58 Level     ffa60000.rtc
+ 20:          0          0          0          0     GICv2  59 Level     ffa60000.rtc
+ 21:          0          0          0          0     GICv2  42 Level     ff960000.memory-controller
+ 22:          0          0          0          0     GICv2  88 Level     ams-irq
+ 23:          0          0          0          0     GICv2 155 Level     axi-pmon, axi-pmon
+ 24:        515          0          0          0     GICv2  53 Level     xuartps
+ 27:          0          0          0          0     GICv2 156 Level     zynqmp-dma
+ 28:          0          0          0          0     GICv2 157 Level     zynqmp-dma
+ 29:          0          0          0          0     GICv2 158 Level     zynqmp-dma
+ 30:          0          0          0          0     GICv2 159 Level     zynqmp-dma
+ 31:          0          0          0          0     GICv2 160 Level     zynqmp-dma
+ 32:          0          0          0          0     GICv2 161 Level     zynqmp-dma
+ 33:          0          0          0          0     GICv2 162 Level     zynqmp-dma
+ 34:          0          0          0          0     GICv2 163 Level     zynqmp-dma
+ 35:          0          0          0          0     GICv2 109 Level     zynqmp-dma
+ 36:          0          0          0          0     GICv2 110 Level     zynqmp-dma
+ 37:          0          0          0          0     GICv2 111 Level     zynqmp-dma
+ 38:          0          0          0          0     GICv2 112 Level     zynqmp-dma
+ 39:          0          0          0          0     GICv2 113 Level     zynqmp-dma
+ 40:          0          0          0          0     GICv2 114 Level     zynqmp-dma
+ 41:          0          0          0          0     GICv2 115 Level     zynqmp-dma
+ 42:          0          0          0          0     GICv2 116 Level     zynqmp-dma
+ 43:          0          0          0          0     GICv2 154 Level     fd4c0000.dma-controller
+ 44:       5938          0          0          0     GICv2  47 Level     ff0f0000.spi
+ 45:        110          0          0          0     GICv2  95 Level     eth0, eth0
+ 46:          0          0          0          0     GICv2  57 Level     axi-pmon, axi-pmon
+ 47:       4802          0          0          0     GICv2  49 Level     cdns-i2c
+ 48:        501          0          0          0     GICv2  50 Level     cdns-i2c
+ 50:          0          0          0          0     GICv2  84 Edge      ff150000.watchdog
+ 51:          0          0          0          0     GICv2 151 Level     fd4a0000.display
+ 52:        548          0          0          0     GICv2  81 Level     mmc0
+ 53:          0          0          0          0     GICv2 165 Level     ahci-ceva[fd0c0000.ahci]
+ 54:          0          0          0          0     GICv2  97 Level     xhci-hcd:usb1
+ 55:          0          0          0          0  zynq-gpio  22 Edge      sw19
+ 59:          0          0          0          0  gpio-xilinx   4 Edge      PL_GPIO_PB_SW9_N
+ 60:          0          0          0          0  gpio-xilinx   3 Edge      PL_GPIO_PB_SW12_E
+ 61:          0          0          0          0  gpio-xilinx   2 Edge      PL_GPIO_PB_SW13_S
+ 62:          0          0          0          0  gpio-xilinx   1 Edge      PL_GPIO_PB_SW10_W
+ 63:          0          0          0          0  gpio-xilinx   0 Edge      PL_GPIO_PB_SW11_C
+ 64:          0          0          0          0  gpio-xilinx   7 Edge      PL_GPIO_DIP_SW7
+ 65:          0          0          0          0  gpio-xilinx   6 Edge      PL_GPIO_DIP_SW6
+ 66:          0          0          0          0  gpio-xilinx   5 Edge      PL_GPIO_DIP_SW5
+ 67:          0          0          0          0  gpio-xilinx   4 Edge      PL_GPIO_DIP_SW4
+ 68:          0          0          0          0  gpio-xilinx   3 Edge      PL_GPIO_DIP_SW3
+ 69:          0          0          0          0  gpio-xilinx   2 Edge      PL_GPIO_DIP_SW2
+ 70:          0          0          0          0  gpio-xilinx   1 Edge      PL_GPIO_DIP_SW1
+ 71:          0          0          0          0  gpio-xilinx   0 Edge      PL_GPIO_DIP_SW0
+IPI0:        64         25         87         38       Rescheduling interrupts
+IPI1:      2066       6747       1212       5791       Function call interrupts
+IPI2:         0          0          0          0       CPU stop interrupts
+IPI3:         0          0          0          0       CPU stop (for crash dump) interrupts
+IPI4:         0          0          0          0       Timer broadcast interrupts
+IPI5:         0          0          0          0       IRQ work interrupts
+IPI6:         0          0          0          0       CPU wake-up interrupts
+Err:          0
+yocto-zynqmp-generic-20231:/home/petalinux# cat /proc/interrupts
+           CPU0       CPU1       CPU2       CPU3
+ 11:      28169      27725      29250      30190     GICv2  30 Level     arch_timer
+ 14:          0          0          0          0     GICv2  67 Level     zynqmp_ipi
+ 15:          0          0          0          0     GICv2 175 Level     arm-pmu
+ 16:          0          0          0          0     GICv2 176 Level     arm-pmu
+ 17:          0          0          0          0     GICv2 177 Level     arm-pmu
+ 18:          0          0          0          0     GICv2 178 Level     arm-pmu
+ 19:          0          0          0          0     GICv2  58 Level     ffa60000.rtc
+ 20:          0          0          0          0     GICv2  59 Level     ffa60000.rtc
+ 21:          0          0          0          0     GICv2  42 Level     ff960000.memory-controller
+ 22:          0          0          0          0     GICv2  88 Level     ams-irq
+ 23:          0          0          0          0     GICv2 155 Level     axi-pmon, axi-pmon
+ 24:        603          0          0          0     GICv2  53 Level     xuartps
+ 27:          0          0          0          0     GICv2 156 Level     zynqmp-dma
+ 28:          0          0          0          0     GICv2 157 Level     zynqmp-dma
+ 29:          0          0          0          0     GICv2 158 Level     zynqmp-dma
+ 30:          0          0          0          0     GICv2 159 Level     zynqmp-dma
+ 31:          0          0          0          0     GICv2 160 Level     zynqmp-dma
+ 32:          0          0          0          0     GICv2 161 Level     zynqmp-dma
+ 33:          0          0          0          0     GICv2 162 Level     zynqmp-dma
+ 34:          0          0          0          0     GICv2 163 Level     zynqmp-dma
+ 35:          0          0          0          0     GICv2 109 Level     zynqmp-dma
+ 36:          0          0          0          0     GICv2 110 Level     zynqmp-dma
+ 37:          0          0          0          0     GICv2 111 Level     zynqmp-dma
+ 38:          0          0          0          0     GICv2 112 Level     zynqmp-dma
+ 39:          0          0          0          0     GICv2 113 Level     zynqmp-dma
+ 40:          0          0          0          0     GICv2 114 Level     zynqmp-dma
+ 41:          0          0          0          0     GICv2 115 Level     zynqmp-dma
+ 42:          0          0          0          0     GICv2 116 Level     zynqmp-dma
+ 43:          0          0          0          0     GICv2 154 Level     fd4c0000.dma-controller
+ 44:       5938          0          0          0     GICv2  47 Level     ff0f0000.spi
+ 45:        134          0          0          0     GICv2  95 Level     eth0, eth0
+ 46:          0          0          0          0     GICv2  57 Level     axi-pmon, axi-pmon
+ 47:       4802          0          0          0     GICv2  49 Level     cdns-i2c
+ 48:        501          0          0          0     GICv2  50 Level     cdns-i2c
+ 50:          0          0          0          0     GICv2  84 Edge      ff150000.watchdog
+ 51:          0          0          0          0     GICv2 151 Level     fd4a0000.display
+ 52:        548          0          0          0     GICv2  81 Level     mmc0
+ 53:          0          0          0          0     GICv2 165 Level     ahci-ceva[fd0c0000.ahci]
+ 54:          0          0          0          0     GICv2  97 Level     xhci-hcd:usb1
+ 55:          0          0          0          0  zynq-gpio  22 Edge      sw19
+ 59:          2          0          0          0  gpio-xilinx   4 Edge      PL_GPIO_PB_SW9_N
+ 60:          4          0          0          0  gpio-xilinx   3 Edge      PL_GPIO_PB_SW12_E
+ 61:          2          0          0          0  gpio-xilinx   2 Edge      PL_GPIO_PB_SW13_S
+ 62:          2          0          0          0  gpio-xilinx   1 Edge      PL_GPIO_PB_SW10_W
+ 63:          2          0          0          0  gpio-xilinx   0 Edge      PL_GPIO_PB_SW11_C
+ 64:          2          0          0          0  gpio-xilinx   7 Edge      PL_GPIO_DIP_SW7
+ 65:          2          0          0          0  gpio-xilinx   6 Edge      PL_GPIO_DIP_SW6
+ 66:          4          0          0          0  gpio-xilinx   5 Edge      PL_GPIO_DIP_SW5
+ 67:          2          0          0          0  gpio-xilinx   4 Edge      PL_GPIO_DIP_SW4
+ 68:          2          0          0          0  gpio-xilinx   3 Edge      PL_GPIO_DIP_SW3
+ 69:          2          0          0          0  gpio-xilinx   2 Edge      PL_GPIO_DIP_SW2
+ 70:          2          0          0          0  gpio-xilinx   1 Edge      PL_GPIO_DIP_SW1
+ 71:          2          0          0          0  gpio-xilinx   0 Edge      PL_GPIO_DIP_SW0
+IPI0:        64         26         87         38       Rescheduling interrupts
+IPI1:      2163       6791       1243       5866       Function call interrupts
+IPI2:         0          0          0          0       CPU stop interrupts
+IPI3:         0          0          0          0       CPU stop (for crash dump) interrupts
+IPI4:         0          0          0          0       Timer broadcast interrupts
+IPI5:         0          0          0          0       IRQ work interrupts
+IPI6:         0          0          0          0       CPU wake-up interrupts
+Err:          0
+yocto-zynqmp-generic-20231:/home/petalinux#
+```
+---
+### Unloading PL bitstream or pdi and dt overlay
+* Zynq or ZynqMP
+```
+yocto-zynqmp-generic-20231:/home/petalinux# fpgautil -R
+```
+* Versal (DFx RP)
+```
+root@yocto-vck190-dfx-2023:~# fpgautil -R -n PR0
+```
+* Versal (DFx Static)
+```
+root@yocto-vck190-dfx-2023:~# fpgautil -R -n Full
+```
+---
+## References
+* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841645/Solution+Zynq+PL+Programming+With+FPGA+Manager
+* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841847/Solution+ZynqMP+PL+Programming
+* https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/1188397412/Solution+Versal+PL+Programming
diff --git a/docs/README.fpgamanager.custom.md b/docs/README.fpgamanager.custom.md
index ada3985e..dcdaec55 100644
--- a/docs/README.fpgamanager.custom.md
+++ b/docs/README.fpgamanager.custom.md
@@ -8,6 +8,9 @@
  * [Unloading PL bitstream or pdi and dt overlay](#unloading-pl-bitstream-or-pdi-and-dt-overlay)
 * [References](#references)
+> **Note:** This README will be deprecated in 2024.1 release. User sthould start
+> using [DFx User DTS README](README.dfx.user.dts.md)
 ## Introduction
 This readme describes the build instructions to create firmware recipes using
 fpgamanager_custom.bbclass for dynamic configuration. This bitbake class supports
diff --git a/meta-xilinx-bsp/README.md b/meta-xilinx-bsp/README.md
index 96a23687..2d869913 100644
--- a/meta-xilinx-bsp/README.md
+++ b/meta-xilinx-bsp/README.md
@@ -33,15 +33,16 @@ The following boards are supported by the meta-xilinx-bsp layer:
 |            | [ZCU104](https://www.xilinx.com/products/boards-and-kits/zcu104.html)         | [zcu104-zynqmp](conf/machine/zcu104-zynqmp.conf)             | `zcu104-zynqmp`       | `zcu104-revc`                       | Yes         | Yes       |
 |            | [ZCU106](https://www.xilinx.com/products/boards-and-kits/zcu106.html)         | [zcu106-zynqmp](conf/machine/zcu106-zynqmp.conf)             | `zcu106-zynqmp`       | `zcu106-reva`                       | Yes         | Yes       |
 |            | [ZCU111](https://www.xilinx.com/products/boards-and-kits/zcu111.html)         | [zcu111-zynqmp](conf/machine/zcu111-zynqmp.conf)             | `zcu111-zynqmp`       | `zcu111-reva`                       | Yes         | Yes       |
-|            | [ZCU1275](https://www.xilinx.com/products/boards-and-kits/zcu1275.html)       | [zcu1275-zynqmp](conf/machine/zcu1275-zynqmp.conf)           | `zcu1275-zynqmp`      | `zcu1275-revb`                      | Yes         | Yes       |
-|            | [ZCU1285](https://www.xilinx.com/products/boards-and-kits/zcu1285.html)       | [zcu1285-zynqmp](conf/machine/zcu1285-zynqmp.conf)           | `zcu1285-zynqmp`      | `zcu1285-reva`                      | Yes         | Yes       |
 |            | [ZCU208](https://www.xilinx.com/products/boards-and-kits/zcu208.html)         | [zcu208-zynqmp](conf/machine/zcu208-zynqmp.conf)             | `zcu208-zynqmp`       | `zcu208-reva`                       | Yes         | Yes       |
 |            | [ZCU216](https://www.xilinx.com/products/boards-and-kits/zcu216.html)         | [zcu216-zynqmp](conf/machine/zcu216-zynqmp.conf)             | `zcu216-zynqmp`       | `zcu216-reva`                       | Yes         | Yes       |
+|            | [ZCU670](https://www.xilinx.com/products/boards-and-kits/zcu670.html)         | [zcu670-zynqmp](conf/machine/zcu670-zynqmp.conf)             | `zcu670-zynqmp`       | `zcu670-revb`                       | Yes         | Yes       |
 | Versal     | [VCK190](https://www.xilinx.com/products/boards-and-kits/vck190.html)         | [vck190-versal](conf/machine/vck190-versal.conf)             | `vck190-versal`       | `versal-vck190-reva-x-ebm-01-reva`  | Yes         | Yes       |
 |            | [VMK180](https://www.xilinx.com/products/boards-and-kits/vmk180.html)         | [vmk180-versal](conf/machine/vmk180-versal.conf)             | `vmk180-versal`       | `versal-vmk180-reva-x-ebm-01-reva`  | Yes         | Yes       |
+|            | [VCK5000](https://www.xilinx.com/products/boards-and-kits/vck5000.html)       | [vck5000-versal](conf/machine/vck5000-versal.conf)           | `vck5000-versal`      | `versal-vck5000-reva-x-ebm-01-reva` | No          | No        |
 |            | [VPK120](https://www.xilinx.com/products/boards-and-kits/vpk120.html)         | [vpk120-versal](conf/machine/vpk120-versal.conf)             | `vpk120-versal`       | `versal-vpk120-reva`                | Yes         | Yes       |
 |            | [VPK180](https://www.xilinx.com/products/boards-and-kits/vpk180.html)         | [vpk180-versal](conf/machine/vpk180-versal.conf)             | `vpk180-versal`       | `versal-vpk180-reva`                | Yes         | Yes       |
-|            | [VEK280](https://www.xilinx.com/products/boards-and-kits/vek280.html)         | [vek280-versal](conf/machine/vek280-versal.conf)             | `vek280-versal`       | `versal-vek280-reva`                | Yes         | Yes       |
+|            | [VEK280](https://www.xilinx.com/products/boards-and-kits/vek280.html)         | [vek280-versal](conf/machine/vek280-versal.conf)             | `vek280-versal`       | `versal-vek280-revb`                | Yes         | Yes       |
+|            | [VHK158](https://www.xilinx.com/products/boards-and-kits/vhk158.html)         | [vhk158-versal](conf/machine/vhk158-versal.conf)             | `vhk158-versal`       | `versal-vhk158-reva`                | Yes         | Yes       |
 > **Note:** Additional information on Xilinx architectures can be found at:
        https://www.xilinx.com/products/silicon-devices.html
diff --git a/meta-xilinx-bsp/conf/machine/ac701-microblazeel.conf b/meta-xilinx-bsp/conf/machine/ac701-microblazeel.conf
index 88a0d7bb..27cb3939 100644
--- a/meta-xilinx-bsp/conf/machine/ac701-microblazeel.conf
+++ b/meta-xilinx-bsp/conf/machine/ac701-microblazeel.conf
@@ -10,13 +10,6 @@ MACHINEOVERRIDES =. "${@['', 'ac701-microblazeel:']['ac701-microblazeel' !='${MA
 # defined before calling the required inclusion file else pre-expansion value
 # defined in microblazeel-generic.conf will be set.
-# Yocto AC701 FS-Boot variables
-YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0"
-YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0"
-YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "MIG_7SERIES_0"
-YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0"
-XSCTH_PROC:pn-fs-boot ?= "microblaze_0"
 # Yocto AC701 device-tree variables
 YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0"
 YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "MIG_7SERIES_0"
@@ -25,6 +18,21 @@ DTC_FLAGS:pn-device-tree ?= ""
 XSCTH_PROC:pn-device-tree ?= "microblaze_0"
 YAML_DT_BOARD_FLAGS ?= "{BOARD ac701-full}"
+# Yocto FS-Boot variables
+YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0"
+YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0"
+YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "MIG_7SERIES_0"
+YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0"
+XSCTH_PROC:pn-fs-boot ?= "microblaze_0"
+# Yocto KERNEL Variables
+UBOOT_ENTRYPOINT  ?= "0x80000000"
+UBOOT_LOADADDRESS ?= "0x80000000"
+# ac701-microblazeel Serial Console
+SERIAL_CONSOLES ?= "115200;ttyUL0"
+YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
 # Set DDR Base address for u-boot-xlnx-scr variables
 DDR_BASEADDR ?= "0x80000000"
 SKIP_APPEND_BASEADDR ?= "0"
@@ -39,4 +47,4 @@ HDF_MACHINE = "ac701-microblazeel"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'ac701_microblazeel']['ac701-microblazeel' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' ac701_microblazeel']['ac701-microblazeel' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/kc705-microblazeel.conf b/meta-xilinx-bsp/conf/machine/kc705-microblazeel.conf
index f24d0356..f3236f07 100644
--- a/meta-xilinx-bsp/conf/machine/kc705-microblazeel.conf
+++ b/meta-xilinx-bsp/conf/machine/kc705-microblazeel.conf
@@ -15,7 +15,7 @@ YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0"
 YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "MIG_7SERIES_0"
 DT_PADDING_SIZE:pn-device-tree ?= "0x1000"
 DTC_FLAGS:pn-device-tree ?= ""
-XSCTH_PROC:microblaze:pn-device-tree ?= "microblaze_0"
+XSCTH_PROC:pn-device-tree ?= "microblaze_0"
 YAML_DT_BOARD_FLAGS ?= "{BOARD kc705-full}"
 # Yocto FS-Boot variables
@@ -29,14 +29,14 @@ XSCTH_PROC:pn-fs-boot ?= "microblaze_0"
 UBOOT_ENTRYPOINT  ?= "0x80000000"
 UBOOT_LOADADDRESS ?= "0x80000000"
-# Set DDR Base address for u-boot-xlnx-scr variables
-DDR_BASEADDR ?= "0x80000000"
-SKIP_APPEND_BASEADDR ?= "0"
 # kc705-microblazeel Serial Console
 SERIAL_CONSOLES ?= "115200;ttyUL0"
 YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
+# Set DDR Base address for u-boot-xlnx-scr variables
+DDR_BASEADDR ?= "0x80000000"
+SKIP_APPEND_BASEADDR ?= "0"
 # Required generic machine inclusion
 require conf/machine/microblaze-generic.conf
@@ -47,4 +47,4 @@ HDF_MACHINE = "kc705-microblazeel"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'kc705_microblazeel']['kc705-microblazeel' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' kc705_microblazeel']['kc705-microblazeel' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/kcu105-microblazeel.conf b/meta-xilinx-bsp/conf/machine/kcu105-microblazeel.conf
index 3edf190e..a866f87c 100644
--- a/meta-xilinx-bsp/conf/machine/kcu105-microblazeel.conf
+++ b/meta-xilinx-bsp/conf/machine/kcu105-microblazeel.conf
@@ -10,13 +10,6 @@ MACHINEOVERRIDES =. "${@['', 'kcu105-microblazeel:']['kcu105-microblazeel' !='${
 # defined before calling the required inclusion file else pre-expansion value
 # defined in microblazeel-generic.conf will be set.
-# Yocto KCU105 FS-Boot variables
-YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0"
-YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0"
-YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "DDR4_0"
-YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0"
-XSCTH_PROC:pn-fs-boot ?= "microblaze_0"
 # Yocto KCU105 device-tree variables
 YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0"
 YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "DDR4_0"
@@ -25,6 +18,21 @@ DTC_FLAGS:pn-device-tree ?= ""
 XSCTH_PROC:pn-device-tree ?= "microblaze_0"
 YAML_DT_BOARD_FLAGS ?= "{BOARD kcu105}"
+# Yocto FS-Boot variables
+YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0"
+YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0"
+YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "DDR4_0"
+YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0"
+XSCTH_PROC:pn-fs-boot ?= "microblaze_0"
+# Yocto KERNEL Variables
+UBOOT_ENTRYPOINT  ?= "0x80000000"
+UBOOT_LOADADDRESS ?= "0x80000000"
+# kcu105-microblazeel Serial Console
+SERIAL_CONSOLES ?= "115200;ttyUL0"
+YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
 # Set DDR Base address for u-boot-xlnx-scr variables
 DDR_BASEADDR ?= "0x80000000"
 SKIP_APPEND_BASEADDR ?= "0"
@@ -39,4 +47,4 @@ HDF_MACHINE = "kcu105-microblazeel"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'kcu105_microblazeel']['kcu105-microblazeel' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' kcu105_microblazeel']['kcu105-microblazeel' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/vck190-versal.conf b/meta-xilinx-bsp/conf/machine/vck190-versal.conf
index 1b3e8123..ed049268 100644
--- a/meta-xilinx-bsp/conf/machine/vck190-versal.conf
+++ b/meta-xilinx-bsp/conf/machine/vck190-versal.conf
@@ -2,10 +2,6 @@
 #@NAME: vck190-versal
 #@DESCRIPTION: Machine configuration for the VCK190 evaluation board.
-# Compatibility with old BOARD value.
-# TODO - Remove these once removed from petalinux bsp
-MACHINEOVERRIDES =. "vck190:"
 #### Preamble
 MACHINEOVERRIDES =. "${@['', 'vck190-versal:']['vck190-versal' !='${MACHINE}']}"
 #### Regular settings follow
@@ -46,4 +42,4 @@ HDF_MACHINE = "vck190-versal"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'vck190_versal']['vck190-versal' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' vck190_versal']['vck190-versal' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/vcu118-microblazeel.conf b/meta-xilinx-bsp/conf/machine/vcu118-microblazeel.conf
index ada52ceb..bfd60336 100644
--- a/meta-xilinx-bsp/conf/machine/vcu118-microblazeel.conf
+++ b/meta-xilinx-bsp/conf/machine/vcu118-microblazeel.conf
@@ -10,13 +10,6 @@ MACHINEOVERRIDES =. "${@['', 'vcu118-microblazeel:']['vcu118-microblazeel' !='${
 # defined before calling the required inclusion file else pre-expansion value
 # defined in microblazeel-generic.conf will be set.
-# Yocto VCU118 FS-Boot variables
-YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0"
-YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0"
-YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "DDR4_0"
-YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0"
-XSCTH_PROC:pn-fs-boot ?= "microblaze_0"
 # Yocto VCU118 device-tree variables
 YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0"
 YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "DDR4_0"
@@ -25,10 +18,21 @@ DTC_FLAGS:pn-device-tree ?= ""
 XSCTH_PROC:pn-device-tree ?= "microblaze_0"
 YAML_DT_BOARD_FLAGS ?= "{BOARD vcu118-rev2.0}"
+# Yocto FS-Boot variables
+YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0"
+YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0"
+YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "DDR4_0"
+YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0"
+XSCTH_PROC:pn-fs-boot ?= "microblaze_0"
 # Yocto KERNEL Variables
 UBOOT_ENTRYPOINT  ?= "0x80000000"
 UBOOT_LOADADDRESS ?= "0x80000000"
+# vcu118-microblazeel Serial Console
+SERIAL_CONSOLES ?= "115200;ttyUL0"
+YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
 # Set DDR Base address for u-boot-xlnx-scr variables
 DDR_BASEADDR ?= "0x80000000"
 SKIP_APPEND_BASEADDR ?= "0"
@@ -43,4 +47,4 @@ HDF_MACHINE = "vcu118-microblazeel"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'vcu118_microblazeel']['vcu118-microblazeel' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' vcu118_microblazeel']['vcu118-microblazeel' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/vek280-versal.conf b/meta-xilinx-bsp/conf/machine/vek280-versal.conf
index b533b833..625cbca1 100644
--- a/meta-xilinx-bsp/conf/machine/vek280-versal.conf
+++ b/meta-xilinx-bsp/conf/machine/vek280-versal.conf
@@ -12,12 +12,20 @@ MACHINEOVERRIDES =. "${@['', 'vek280-versal:']['vek280-versal' !='${MACHINE}']}"
 # Yocto device-tree variables
 YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "CIPS_0_pspmc_0_psv_sbsauart_0"
-YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vek280-reva}"
+YAML_DT_BOARD_FLAGS ?= "{BOARD versal-vek280-revb}"
+# Yocto arm-trusted-firmware(TF-A) variables
+ATF_CONSOLE ?= "pl011"
+TFA_BL33_LOAD ?= "0x8000000"
 # Yocto PLM variables
 YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware ?= "CIPS_0_pspmc_0_psv_sbsauart_0"
 YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "CIPS_0_pspmc_0_psv_sbsauart_0"
+# Yocto KERNEL Variables
+UBOOT_ENTRYPOINT  ?= "0x200000"
+UBOOT_LOADADDRESS ?= "0x200000"
 # vek280-versal Serial Console
 SERIAL_CONSOLES ?= "115200;ttyAMA0"
 YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
@@ -30,6 +38,16 @@ require conf/machine/versal-ai-edge-generic.conf
 # from local.conf.
 HDF_MACHINE = "vek280-versal"
+# VEK280 board has 12GB memory only but default versal-generic has QB_MEM set to
+# 8G, Hence we need set 12G in QB_MEM.
+QB_MEM = "-m 12G"
+QEMU_HW_DTB_PS = "${QEMU_HW_DTB_PATH}/board-versal-ps-vek280.dtb"
+QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb"
+# Yocto MACHINE_FEATURES Variable
+MACHINE_FEATURES += "vdu"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'vek280_versal']['vek280-versal' != '${MACHINE}']}"
-\ No newline at end of file
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' vek280_versal']['vek280-versal' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/vmk180-versal.conf b/meta-xilinx-bsp/conf/machine/vmk180-versal.conf
index 941f0aba..0f474f78 100644
--- a/meta-xilinx-bsp/conf/machine/vmk180-versal.conf
+++ b/meta-xilinx-bsp/conf/machine/vmk180-versal.conf
@@ -2,10 +2,6 @@
 #@NAME: vmk180-versal
 #@DESCRIPTION: Machine configuration for the VMK180 evaluation board.
-# Compatibility with old BOARD value.
-# TODO - Remove these once removed from petalinux bsp
-MACHINEOVERRIDES =. "vmk180:"
 #### Preamble
 MACHINEOVERRIDES =. "${@['', 'vmk180-versal:']['vmk180-versal' !='${MACHINE}']}"
 #### Regular settings follow
@@ -46,4 +42,4 @@ HDF_MACHINE = "vmk180-versal"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'vmk180_versal']['vmk180-versal' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' vmk180_versal']['vmk180-versal' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/vpk120-versal.conf b/meta-xilinx-bsp/conf/machine/vpk120-versal.conf
index 30818313..e200d42d 100644
--- a/meta-xilinx-bsp/conf/machine/vpk120-versal.conf
+++ b/meta-xilinx-bsp/conf/machine/vpk120-versal.conf
@@ -26,7 +26,7 @@ YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauar
 UBOOT_ENTRYPOINT  ?= "0x200000"
 UBOOT_LOADADDRESS ?= "0x200000"
-# vpk120-versal Serial Console 
+# vpk120-versal Serial Console
 SERIAL_CONSOLES ?= "115200;ttyAMA0"
 YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
@@ -45,4 +45,4 @@ QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'vpk120_versal']['vpk120-versal' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' vpk120_versal']['vpk120-versal' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/vpk180-versal.conf b/meta-xilinx-bsp/conf/machine/vpk180-versal.conf
index dd2dc111..92630e97 100644
--- a/meta-xilinx-bsp/conf/machine/vpk180-versal.conf
+++ b/meta-xilinx-bsp/conf/machine/vpk180-versal.conf
@@ -26,7 +26,7 @@ YAML_SERIAL_CONSOLE_STDOUT:pn-plm-firmware ?= "versal_cips_0_pspmc_0_psv_sbsauar
 UBOOT_ENTRYPOINT  ?= "0x200000"
 UBOOT_LOADADDRESS ?= "0x200000"
-# vpk180-versal Serial Console 
+# vpk180-versal Serial Console
 SERIAL_CONSOLES ?= "115200;ttyAMA0"
 YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
@@ -45,4 +45,4 @@ QEMU_HW_DTB_PMC = "${QEMU_HW_DTB_PATH}/board-versal-pmc-virt.dtb"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'vpk180_versal']['vpk180-versal' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' vpk180_versal']['vpk180-versal' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/zc702-zynq7.conf b/meta-xilinx-bsp/conf/machine/zc702-zynq7.conf
index dc6f55b1..1db0616f 100644
--- a/meta-xilinx-bsp/conf/machine/zc702-zynq7.conf
+++ b/meta-xilinx-bsp/conf/machine/zc702-zynq7.conf
@@ -41,4 +41,4 @@ HDF_MACHINE = "zc702-zynq7"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'zc702_zynq7']['zc702-zynq7' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' zc702_zynq7']['zc702-zynq7' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/zc706-zynq7.conf b/meta-xilinx-bsp/conf/machine/zc706-zynq7.conf
index e6b7ce57..7e0525d1 100644
--- a/meta-xilinx-bsp/conf/machine/zc706-zynq7.conf
+++ b/meta-xilinx-bsp/conf/machine/zc706-zynq7.conf
@@ -23,7 +23,7 @@ YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware ?= "ps7_uart_1"
 UBOOT_ENTRYPOINT  ?= "0x200000"
 UBOOT_LOADADDRESS ?= "0x200000"
-# zc702-zynq7 Serial Console
+# zc706-zynq7 Serial Console
 SERIAL_CONSOLES ?= "115200;ttyPS0"
 YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
@@ -41,4 +41,4 @@ HDF_MACHINE = "zc706-zynq7"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'zc706_zynq7']['zc706-zynq7' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' zc706_zynq7']['zc706-zynq7' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf
index c434067d..acd2544a 100644
--- a/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf
+++ b/meta-xilinx-bsp/conf/machine/zcu102-zynqmp.conf
@@ -2,10 +2,6 @@
 #@NAME: zcu102-zynqmp
 #@DESCRIPTION: Machine configuration for the ZCU102 evaluation board.
-# Compatibility with old BOARD value.
-# TODO - Remove these once removed from petalinux bsp
-MACHINEOVERRIDES =. "zcu102:"
 #### Preamble
 MACHINEOVERRIDES =. "${@['', 'zcu102-zynqmp:']['zcu102-zynqmp' !='${MACHINE}']}"
 #### Regular settings follow
@@ -55,4 +51,4 @@ HDF_MACHINE = "zcu102-zynqmp"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'zcu102_zynqmp']['zcu102-zynqmp' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu102_zynqmp']['zcu102-zynqmp' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf
index 710078eb..b4c11f3a 100644
--- a/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf
+++ b/meta-xilinx-bsp/conf/machine/zcu104-zynqmp.conf
@@ -49,9 +49,10 @@ HDF_MACHINE = "zcu104-zynqmp"
 # the xsa. User can enable explicitly if required from local.conf.
 # KERNEL_DEVICETREE = "xilinx/zynqmp-zcu104-revC.dtb"
+# Yocto IMAGE_FEATURES Variable
 MACHINE_HWCODECS = "libomxil-xlnx"
 IMAGE_FEATURES += "hwcodecs"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'zcu104_zynqmp']['zcu104-zynqmp' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu104_zynqmp']['zcu104-zynqmp' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf
index 23a936d8..ff273134 100644
--- a/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf
+++ b/meta-xilinx-bsp/conf/machine/zcu106-zynqmp.conf
@@ -2,10 +2,6 @@
 #@NAME: zcu106-zynqmp
 #@DESCRIPTION: Machine configuration for the ZCU106 evaluation board.
-# Compatibility with old BOARD value.
-# TODO - Remove these once removed from petalinux bsp
-MACHINEOVERRIDES =. "zcu106:"
 #### Preamble
 MACHINEOVERRIDES =. "${@['', 'zcu106-zynqmp:']['zcu106-zynqmp' !='${MACHINE}']}"
 #### Regular settings follow
@@ -53,9 +49,10 @@ HDF_MACHINE = "zcu106-zynqmp"
 # the xsa. User can enable explicitly if required from local.conf.
 # KERNEL_DEVICETREE = "xilinx/zynqmp-zcu106-revA.dtb"
+# Yocto IMAGE_FEATURES Variable
 MACHINE_HWCODECS = "libomxil-xlnx"
 IMAGE_FEATURES += "hwcodecs"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'zcu106_zynqmp']['zcu106-zynqmp' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu106_zynqmp']['zcu106-zynqmp' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf
index 5868449f..77da93ca 100644
--- a/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf
+++ b/meta-xilinx-bsp/conf/machine/zcu111-zynqmp.conf
@@ -2,10 +2,6 @@
 #@NAME: zcu111-zynqmp
 #@DESCRIPTION: Machine configuration for the ZCU111 evaluation board.
-# Compatibility with old BOARD value.
-# TODO - Remove these once removed from petalinux bsp
-MACHINEOVERRIDES =. "zcu111:"
 #### Preamble
 MACHINEOVERRIDES =. "${@['', 'zcu111-zynqmp:']['zcu111-zynqmp' !='${MACHINE}']}"
 #### Regular settings follow
@@ -55,4 +51,4 @@ HDF_MACHINE = "zcu111-zynqmp"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'zcu111_zynqmp']['zcu111-zynqmp' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu111_zynqmp']['zcu111-zynqmp' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/zcu1275-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu1275-zynqmp.conf
index 71c94038..18aa3eee 100644
--- a/meta-xilinx-bsp/conf/machine/zcu1275-zynqmp.conf
+++ b/meta-xilinx-bsp/conf/machine/zcu1275-zynqmp.conf
@@ -1,3 +1,5 @@
+XILINX_DEPRECATED[zcu1275-zynqmp] = "${@'zcu1275-zynqmp is not supported in 2023.2' if d.getVar("XILINX_RELEASE_VERSION") == 'v2023.2' else ''}"
 #@TYPE: Machine
 #@NAME: zcu1275-zynqmp
 #@DESCRIPTION: Machine configuration for the ZCU1275 evaluation board.
diff --git a/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf
index 812a283f..6fba3619 100644
--- a/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf
+++ b/meta-xilinx-bsp/conf/machine/zcu1285-zynqmp.conf
@@ -1,3 +1,5 @@
+XILINX_DEPRECATED[zcu1285-zynqmp] = "${@'zcu1285-zynqmp is not supported in 2023.2' if d.getVar("XILINX_RELEASE_VERSION") == 'v2023.2' else ''}"
 #@TYPE: Machine
 #@NAME: zcu1285-zynqmp
 #@DESCRIPTION: Machine configuration for the ZCU1285 evaluation board.
diff --git a/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf
index 273606e2..7bb2c9db 100644
--- a/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf
+++ b/meta-xilinx-bsp/conf/machine/zcu208-zynqmp.conf
@@ -47,4 +47,4 @@ HDF_MACHINE = "zcu208-zynqmp"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'zcu208_zynqmp']['zcu208-zynqmp' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu208_zynqmp']['zcu208-zynqmp' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf b/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf
index 80a15358..f4e1619d 100644
--- a/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf
+++ b/meta-xilinx-bsp/conf/machine/zcu216-zynqmp.conf
@@ -47,4 +47,4 @@ HDF_MACHINE = "zcu216-zynqmp"
 #### No additional settings should be after the Postamble
 #### Postamble
-PACKAGE_EXTRA_ARCHS:append = "${@['', 'zcu216_zynqmp']['zcu216-zynqmp' != '${MACHINE}']}"
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' zcu216_zynqmp']['zcu216-zynqmp' != '${MACHINE}']}"
diff --git a/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend
index 9ab3f24e..fa4816af 100644
--- a/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend
+++ b/meta-xilinx-bsp/recipes-bsp/device-tree/device-tree.bbappend
@@ -4,10 +4,4 @@ FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
 COMPATIBLE_MACHINE:qemu-zynq7 = ".*"
 SRC_URI:append:qemu-zynq7 = " file://qemu-zynq7.dts"
-SRC_URI:append = "${@bb.utils.contains('MACHINE_FEATURES', 'provencore', ' file://pnc.dtsi', '', d)}"
+EXTRA_OVERLAYS:append = "${@bb.utils.contains('MACHINE_FEATURES', 'provencore', ' pnc.dtsi', '', d)}"
-do_configure:append() {
-    if [ ${@bb.utils.contains('MACHINE_FEATURES', 'provencore', 'true', '', d)} ]; then
-        echo '#include "pnc.dtsi"' >> ${DT_FILES_PATH}/system-top.dts
-    fi
-}
diff --git a/meta-xilinx-bsp/recipes-bsp/dfx-mgr/dfx-mgr_%.bbappend b/meta-xilinx-bsp/recipes-bsp/dfx-mgr/dfx-mgr_%.bbappend
new file mode 100644
index 00000000..8fdf14bb
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/dfx-mgr/dfx-mgr_%.bbappend
@@ -0,0 +1,10 @@
+FILESEXTRAPATHS:append := ":${THISDIR}/files"
+SRC_URI += "file://zcu106-xlnx-firmware-detect"
+PACKAGE_ARCH:zcu106-zynqmp = "${MACHINE_ARCH}"
+# ZCU106 eval board firmware detection script.
+do_install:append:zcu106-zynqmp () {
+        install -m 0755 ${WORKDIR}/zcu106-xlnx-firmware-detect ${D}${bindir}/xlnx-firmware-detect
+}
diff --git a/meta-xilinx-bsp/recipes-bsp/dfx-mgr/files/zcu106-xlnx-firmware-detect b/meta-xilinx-bsp/recipes-bsp/dfx-mgr/files/zcu106-xlnx-firmware-detect
new file mode 100644
index 00000000..ef5654cc
--- /dev/null
+++ b/meta-xilinx-bsp/recipes-bsp/dfx-mgr/files/zcu106-xlnx-firmware-detect
@@ -0,0 +1,71 @@
+#! /bin/sh
+# Copyright (C) 2022 Xilinx, Inc. All rights reserved.
+# Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved.
+#
+# SPDX-License-Identifier: MIT
+# read values from dfx-mgr conf file
+conffile="/etc/dfx-mgrd/daemon.conf"
+if [ ! -f "${conffile}" ]; then
+        echo "dfx-mgrd configuration file not found: ${conffile}"
+        exit 1
+fi
+fwbasedir=$(grep "firmware_location" ${conffile} | sed 's/.*:.*\[\"\(.*\)\"\],\?/\1/')
+if [ -z "${fwbasedir}" ]; then
+        echo "Property 'firmware_location' not found in ${conffile}"
+        exit 1
+fi
+fwfile=$(grep "default_accel" ${conffile} | sed 's/.*:.*\"\(.*\)\",\?/\1/')
+if [ -z "${fwfile}" ]; then
+        echo "Property 'default_accel' not found in ${conffile}"
+        exit 1
+fi
+# check if default firmware is already set and present
+if [ -f "${fwfile}" ]; then
+    fwname=$(cat ${fwfile})
+    fwdir="${fwbasedir}/${fwname}"
+    if [ -n "${fwname}" ] && [ -d "${fwdir}" ]; then
+        echo "Default firmware detected: ${fwname}"
+        exit 0
+    fi
+fi
+# search for firmware based on EEPROM board id
+echo "Trying to detect default firmware based on EEPROM..."
+#check if board is a zcu106 eval board product
+eeprom=$(ls /sys/bus/i2c/devices/*54/eeprom 2> /dev/null)
+if [ -n "${eeprom}" ]; then
+    boardid=`dd if=$eeprom bs=1 count=6 skip=208 2>/dev/null | tr '[:upper:]' '[:lower:]'`
+    revision=`dd if=$eeprom bs=1 count=3 skip=224 2>/dev/null | tr '[:upper:]' '[:lower:]'`
+    fwname="${boardid}-${revision}"
+    fwdir="${fwbasedir}/${fwname}"
+    fixed_rev=2.0
+    var=$(awk 'BEGIN{ print "'$fixed_rev'"<"'$revision'" }')
+    if [ "${boardid}" == "zcu106" ] && [ "${var}" -eq 1 ] ;then
+         revision=2.0
+         echo "later than 2.0 board revisions are supported in 2.0 bit and dtbo files"
+         fwname="${boardid}-${revision}"
+         fwdir="${fwbasedir}/${fwname}"
+         echo "${fwname}" > "${fwfile}"
+         exit 1
+    elif [ ! -d "${fwdir}" ] ; then
+         echo "No default firmware named ${fwname} found in ${fwbasedir} , Loading rev1.0 bitstream and dtbo as default "
+         revision=1.0
+         fwname=$(ls ${fwbasedir} | grep ${revision})
+         fwdir="${fwbasedir}/${fwname}"
+         echo "${fwname}" > "${fwfile}"
+         exit 1
+    fi
+    echo "Default firmware detected: ${fwname}"
+    echo "${fwname}" > "${fwfile}"
+    exit 0
+fi
diff --git a/meta-xilinx-contrib/dynamic-layers/meta-xilinx-tools/recipes-bsp/bitstream/bitstream-extraction_%.bbappend b/meta-xilinx-contrib/dynamic-layers/meta-xilinx-tools/recipes-bsp/bitstream/bitstream-extraction_%.bbappend
new file mode 100644
index 00000000..4653c93a
--- /dev/null
+++ b/meta-xilinx-contrib/dynamic-layers/meta-xilinx-tools/recipes-bsp/bitstream/bitstream-extraction_%.bbappend
@@ -0,0 +1,2 @@
+COMPATIBLE_MACHINE:zybo-linux-bd-zynq7 = "^$"
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch
new file mode 100644
index 00000000..660bc218
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch
@@ -0,0 +1,305 @@
+From 21cc8144efdaa3cd8dbd7279f87b14fa3432fae4 Mon Sep 17 00:00:00 2001
+From: Jason Wu <jason.wu.misc@gmail.com>
+Date: Sun, 10 Apr 2016 13:14:13 +1000
+Subject: [PATCH 1/3] drm: xilinx: Add encoder for Digilent boards
+Add the dglnt_encoder driver that enables DRM support for the VGA and
+HDMI output ports found on many Digilent boards.
+Upstream-Status: Pending
+Signed-off-by: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
+---
+ .../bindings/drm/xilinx/dglnt_encoder.txt          |  23 +++
+ drivers/gpu/drm/xilinx/Kconfig                     |   6 +
+ drivers/gpu/drm/xilinx/Makefile                    |   1 +
+ drivers/gpu/drm/xilinx/dglnt_encoder.c             | 217 +++++++++++++++++++++
+ 4 files changed, 247 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
+ create mode 100644 drivers/gpu/drm/xilinx/dglnt_encoder.c
+diff --git a/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt b/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
+new file mode 100644
+index 0000000..242b24e
+--- /dev/null
+++ b/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
+@@ -0,0 +1,23 @@
+Device-Tree bindings for Digilent DRM Encoder Slave
+
+This driver provides support for VGA and HDMI outputs on Digilent FPGA boards.
+The VGA or HDMI port must be connected to a Xilinx display pipeline via an
+axi2vid IP core.
+
+Required properties:
+ - compatible: Should be "digilent,drm-encoder".
+
+Optional properties:
+ - dglnt,edid-i2c: The I2C device connected to the DDC bus on the video
+                   connector. This is used to obtain the supported resolutions
+                   of an attached monitor. If not defined, then a default
+                   set of resolutions is used and the display will initialize
+                   to 720p. Note most VGA connectors on Digilent boards do
+                   not have the DDC bus routed out.
+
+Example:
+
+       encoder_0: digilent_encoder {
+               compatible = "digilent,drm-encoder";
+               dglnt,edid-i2c = <&i2c1>;
+       };
+diff --git a/drivers/gpu/drm/xilinx/Kconfig b/drivers/gpu/drm/xilinx/Kconfig
+index 57e18a9..d9ecff2 100644
+--- a/drivers/gpu/drm/xilinx/Kconfig
+++ b/drivers/gpu/drm/xilinx/Kconfig
+@@ -33,6 +33,12 @@ config DRM_XILINX_DP_SUB
+        help
+          DRM driver for Xilinx Display Port Subsystem.
+ 
+config DRM_DIGILENT_ENCODER
+   tristate "Digilent VGA/HDMI DRM Encoder Driver"
+   depends on DRM_XILINX
+   help
+     DRM slave encoder for Video-out on Digilent boards.
+
+ config DRM_XILINX_DP_SUB_DEBUG_FS
+        bool "Xilinx DRM DPSUB debugfs"
+        depends on DEBUG_FS && DRM_XILINX_DP_SUB
+diff --git a/drivers/gpu/drm/xilinx/Makefile b/drivers/gpu/drm/xilinx/Makefile
+index 19bc154..c2717e40 100644
+--- a/drivers/gpu/drm/xilinx/Makefile
+++ b/drivers/gpu/drm/xilinx/Makefile
+@@ -7,6 +7,7 @@ xilinx_drm-y := xilinx_drm_crtc.o xilinx_drm_connector.o xilinx_drm_drv.o \
+                xilinx_drm_plane.o
+ xilinx_drm-y += xilinx_cresample.o xilinx_osd.o xilinx_rgb2yuv.o xilinx_vtc.o
+ 
+obj-$(CONFIG_DRM_DIGILENT_ENCODER) += dglnt_encoder.o
+ obj-$(CONFIG_DRM_XILINX) += xilinx_drm.o
+ obj-$(CONFIG_DRM_XILINX_DP) += xilinx_drm_dp.o
+ obj-$(CONFIG_DRM_XILINX_DP_SUB) += xilinx_drm_dp_sub.o
+diff --git a/drivers/gpu/drm/xilinx/dglnt_encoder.c b/drivers/gpu/drm/xilinx/dglnt_encoder.c
+new file mode 100644
+index 0000000..cb9fc7d
+--- /dev/null
+++ b/drivers/gpu/drm/xilinx/dglnt_encoder.c
+@@ -0,0 +1,217 @@
+/*
+ * dglnt_encoder.c - DRM slave encoder for Video-out on Digilent boards
+ *
+ * Copyright (C) 2015 Digilent
+ * Author: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+ *
+ * Based on udl_encoder.c and udl_connector.c, Copyright (C) 2012 Red Hat.
+ * Also based on xilinx_drm_dp.c, Copyright (C) 2014 Xilinx, Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <drm/drmP.h>
+#include <drm/drm_edid.h>
+#include <drm/drm_encoder_slave.h>
+
+#include <linux/device.h>
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/platform_device.h>
+
+#define DGLNT_ENC_MAX_FREQ 150000
+#define DGLNT_ENC_MAX_H 1920
+#define DGLNT_ENC_MAX_V 1080
+#define DGLNT_ENC_PREF_H 1280
+#define DGLNT_ENC_PREF_V 720
+
+struct dglnt_encoder {
+       struct drm_encoder *encoder;
+       struct i2c_adapter *i2c_bus;
+       bool i2c_present;
+};
+
+static inline struct dglnt_encoder *to_dglnt_encoder(
+                                       struct drm_encoder *encoder)
+{
+       return to_encoder_slave(encoder)->slave_priv;
+}
+
+static bool dglnt_mode_fixup(struct drm_encoder *encoder,
+                               const struct drm_display_mode *mode,
+                               struct drm_display_mode *adjusted_mode)
+{
+       return true;
+}
+
+static void dglnt_encoder_mode_set(struct drm_encoder *encoder,
+                               struct drm_display_mode *mode,
+                               struct drm_display_mode *adjusted_mode)
+{
+}
+
+static void
+dglnt_encoder_dpms(struct drm_encoder *encoder, int mode)
+{
+}
+
+static void dglnt_encoder_save(struct drm_encoder *encoder)
+{
+}
+
+static void dglnt_encoder_restore(struct drm_encoder *encoder)
+{
+}
+
+static int dglnt_encoder_mode_valid(struct drm_encoder *encoder,
+                               struct drm_display_mode *mode)
+{
+       if (mode &&
+               !(mode->flags & ((DRM_MODE_FLAG_INTERLACE |
+                       DRM_MODE_FLAG_DBLCLK) | DRM_MODE_FLAG_3D_MASK)) &&
+               (mode->clock <= DGLNT_ENC_MAX_FREQ) &&
+               (mode->hdisplay <= DGLNT_ENC_MAX_H) &&
+               (mode->vdisplay <= DGLNT_ENC_MAX_V))
+               return MODE_OK;
+       return MODE_BAD;
+}
+
+static int dglnt_encoder_get_modes(struct drm_encoder *encoder,
+                               struct drm_connector *connector)
+{
+       struct dglnt_encoder *dglnt = to_dglnt_encoder(encoder);
+       struct edid *edid;
+       int num_modes = 0;
+
+       if (dglnt->i2c_present) {
+               edid = drm_get_edid(connector, dglnt->i2c_bus);
+               drm_connector_update_edid_property(connector, edid);
+               if (edid) {
+                       num_modes = drm_add_edid_modes(connector, edid);
+                       kfree(edid);
+               }
+       } else {
+               num_modes = drm_add_modes_noedid(connector, DGLNT_ENC_MAX_H,
+                                               DGLNT_ENC_MAX_V);
+               drm_set_preferred_mode(connector, DGLNT_ENC_PREF_H,
+                                       DGLNT_ENC_PREF_V);
+       }
+       return num_modes;
+}
+
+static enum drm_connector_status dglnt_encoder_detect(
+                                       struct drm_encoder *encoder,
+                                       struct drm_connector *connector)
+{
+       struct dglnt_encoder *dglnt = to_dglnt_encoder(encoder);
+
+       if (dglnt->i2c_present) {
+               if (drm_probe_ddc(dglnt->i2c_bus))
+                       return connector_status_connected;
+               return connector_status_disconnected;
+       } else
+               return connector_status_unknown;
+}
+
+static struct drm_encoder_slave_funcs dglnt_encoder_slave_funcs = {
+       .dpms                   = dglnt_encoder_dpms,
+       .save                   = dglnt_encoder_save,
+       .restore                = dglnt_encoder_restore,
+       .mode_fixup             = dglnt_mode_fixup,
+       .mode_valid             = dglnt_encoder_mode_valid,
+       .mode_set               = dglnt_encoder_mode_set,
+       .detect                 = dglnt_encoder_detect,
+       .get_modes              = dglnt_encoder_get_modes,
+};
+
+static int dglnt_encoder_encoder_init(struct platform_device *pdev,
+                               struct drm_device *dev,
+                               struct drm_encoder_slave *encoder)
+{
+       struct dglnt_encoder *dglnt = platform_get_drvdata(pdev);
+       struct device_node *sub_node;
+
+       encoder->slave_priv = dglnt;
+       encoder->slave_funcs = &dglnt_encoder_slave_funcs;
+
+       dglnt->encoder = &encoder->base;
+
+       /* get i2c adapter for edid */
+       dglnt->i2c_present = false;
+       sub_node = of_parse_phandle(pdev->dev.of_node, "dglnt,edid-i2c", 0);
+       if (sub_node) {
+               dglnt->i2c_bus = of_find_i2c_adapter_by_node(sub_node);
+               if (!dglnt->i2c_bus)
+                       DRM_INFO("failed to get the edid i2c adapter, using default modes\n");
+               else
+                       dglnt->i2c_present = true;
+               of_node_put(sub_node);
+       }
+
+       return 0;
+}
+
+static int dglnt_encoder_probe(struct platform_device *pdev)
+{
+       struct dglnt_encoder *dglnt;
+
+       dglnt = devm_kzalloc(&pdev->dev, sizeof(*dglnt), GFP_KERNEL);
+       if (!dglnt)
+               return -ENOMEM;
+
+       platform_set_drvdata(pdev, dglnt);
+
+       return 0;
+}
+
+static int dglnt_encoder_remove(struct platform_device *pdev)
+{
+       return 0;
+}
+
+static const struct of_device_id dglnt_encoder_of_match[] = {
+       { .compatible = "digilent,drm-encoder", },
+       { /* end of table */ },
+};
+MODULE_DEVICE_TABLE(of, dglnt_encoder_of_match);
+
+static struct drm_platform_encoder_driver dglnt_encoder_driver = {
+       .platform_driver = {
+               .probe                  = dglnt_encoder_probe,
+               .remove                 = dglnt_encoder_remove,
+               .driver                 = {
+                       .owner          = THIS_MODULE,
+                       .name           = "dglnt-drm-enc",
+                       .of_match_table = dglnt_encoder_of_match,
+               },
+       },
+
+       .encoder_init = dglnt_encoder_encoder_init,
+};
+
+static int __init dglnt_encoder_init(void)
+{
+       return platform_driver_register(&dglnt_encoder_driver.platform_driver);
+}
+
+static void __exit dglnt_encoder_exit(void)
+{
+       platform_driver_unregister(&dglnt_encoder_driver.platform_driver);
+}
+
+module_init(dglnt_encoder_init);
+module_exit(dglnt_encoder_exit);
+
+MODULE_AUTHOR("Digilent, Inc.");
+MODULE_DESCRIPTION("DRM slave encoder for Video-out on Digilent boards");
+MODULE_LICENSE("GPL v2");
+-- 
+2.7.4
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch
new file mode 100644
index 00000000..9b6229db
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch
@@ -0,0 +1,607 @@
+From 217e3b6f4393926b8dcad841381527ef3fc808c2 Mon Sep 17 00:00:00 2001
+From: Jason Wu <jason.wu.misc@gmail.com>
+Date: Sun, 10 Apr 2016 13:16:06 +1000
+Subject: [PATCH 2/3] clk: Add driver for axi_dynclk IP Core
+Add support for the axi_dynclk IP Core available from Digilent. This IP
+core dynamically configures the clock resources inside a Xilinx FPGA to
+generate a clock with a software programmable frequency.
+Upstream-Status: Pending
+Signed-off-by: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
+---
+ drivers/clk/Kconfig            |   8 +
+ drivers/clk/Makefile           |   1 +
+ drivers/clk/clk-dglnt-dynclk.c | 547 +++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 556 insertions(+)
+ create mode 100644 drivers/clk/clk-dglnt-dynclk.c
+diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
+index dccb111100..7fe65a702b 100644
+--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
+@@ -148,6 +148,14 @@ config CLK_QORIQ
+          This adds the clock driver support for Freescale QorIQ platforms
+          using common clock framework.
+ 
+config COMMON_CLK_DGLNT_DYNCLK
+       tristate "Digilent axi_dynclk Driver"
+       depends on ARCH_ZYNQ || MICROBLAZE
+       help
+       ---help---
+         Support for the Digilent AXI Dynamic Clock core for Xilinx
+         FPGAs.
+
+ config COMMON_CLK_XGENE
+        bool "Clock driver for APM XGene SoC"
+        default y
+diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
+index 0760449dde..45ce97d053 100644
+--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
+@@ -24,6 +24,7 @@ obj-$(CONFIG_COMMON_CLK_CDCE706)      += clk-cdce706.o
+ obj-$(CONFIG_COMMON_CLK_CDCE925)       += clk-cdce925.o
+ obj-$(CONFIG_ARCH_CLPS711X)            += clk-clps711x.o
+ obj-$(CONFIG_COMMON_CLK_CS2000_CP)     += clk-cs2000-cp.o
+obj-$(CONFIG_COMMON_CLK_DGLNT_DYNCLK)  += clk-dglnt-dynclk.o
+ obj-$(CONFIG_ARCH_EFM32)               += clk-efm32gg.o
+ obj-$(CONFIG_ARCH_HIGHBANK)            += clk-highbank.o
+ obj-$(CONFIG_COMMON_CLK_MAX77686)      += clk-max77686.o
+diff --git a/drivers/clk/clk-dglnt-dynclk.c b/drivers/clk/clk-dglnt-dynclk.c
+new file mode 100644
+index 0000000000..496ad5fc90
+--- /dev/null
+++ b/drivers/clk/clk-dglnt-dynclk.c
+@@ -0,0 +1,547 @@
+/*
+ * clk-dglnt-dynclk.c - Digilent AXI Dynamic Clock (axi_dynclk) Driver
+ *
+ * Copyright (C) 2015 Digilent
+ * Author: Sam Bobrowicz <sbobrowicz@digilentinc.com>
+ *
+ * Reused code from clk-axi-clkgen.c, Copyright (C) 2012-2013 Analog Devices Inc.
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/clk-provider.h>
+#include <linux/clk.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/kernel.h>
+
+#define CLK_BIT_WEDGE 13
+#define CLK_BIT_NOCOUNT 12
+
+/* This value is used to signal an error */
+#define ERR_CLKCOUNTCALC 0xFFFFFFFF
+#define ERR_CLKDIVIDER (1 << CLK_BIT_WEDGE | 1 << CLK_BIT_NOCOUNT)
+
+#define DYNCLK_DIV_1_REGMASK 0x1041
+/* 25 MHz (125 KHz / 5) */
+#define DYNCLK_DEFAULT_FREQ 125000
+
+#define MMCM_FREQ_VCOMIN 600000
+#define MMCM_FREQ_VCOMAX 1200000
+#define MMCM_FREQ_PFDMIN 10000
+#define MMCM_FREQ_PFDMAX 450000
+#define MMCM_FREQ_OUTMIN 4000
+#define MMCM_FREQ_OUTMAX 800000
+#define MMCM_DIV_MAX 106
+#define MMCM_FB_MIN 2
+#define MMCM_FB_MAX 64
+#define MMCM_CLKDIV_MAX 128
+#define MMCM_CLKDIV_MIN 1
+
+#define OFST_DISPLAY_CTRL 0x0
+#define OFST_DISPLAY_STATUS 0x4
+#define OFST_DISPLAY_CLK_L 0x8
+#define OFST_DISPLAY_FB_L 0x0C
+#define OFST_DISPLAY_FB_H_CLK_H 0x10
+#define OFST_DISPLAY_DIV 0x14
+#define OFST_DISPLAY_LOCK_L 0x18
+#define OFST_DISPLAY_FLTR_LOCK_H 0x1C
+
+static const u64 lock_lookup[64] = {
+       0b0011000110111110100011111010010000000001,
+       0b0011000110111110100011111010010000000001,
+       0b0100001000111110100011111010010000000001,
+       0b0101101011111110100011111010010000000001,
+       0b0111001110111110100011111010010000000001,
+       0b1000110001111110100011111010010000000001,
+       0b1001110011111110100011111010010000000001,
+       0b1011010110111110100011111010010000000001,
+       0b1100111001111110100011111010010000000001,
+       0b1110011100111110100011111010010000000001,
+       0b1111111111111000010011111010010000000001,
+       0b1111111111110011100111111010010000000001,
+       0b1111111111101110111011111010010000000001,
+       0b1111111111101011110011111010010000000001,
+       0b1111111111101000101011111010010000000001,
+       0b1111111111100111000111111010010000000001,
+       0b1111111111100011111111111010010000000001,
+       0b1111111111100010011011111010010000000001,
+       0b1111111111100000110111111010010000000001,
+       0b1111111111011111010011111010010000000001,
+       0b1111111111011101101111111010010000000001,
+       0b1111111111011100001011111010010000000001,
+       0b1111111111011010100111111010010000000001,
+       0b1111111111011001000011111010010000000001,
+       0b1111111111011001000011111010010000000001,
+       0b1111111111010111011111111010010000000001,
+       0b1111111111010101111011111010010000000001,
+       0b1111111111010101111011111010010000000001,
+       0b1111111111010100010111111010010000000001,
+       0b1111111111010100010111111010010000000001,
+       0b1111111111010010110011111010010000000001,
+       0b1111111111010010110011111010010000000001,
+       0b1111111111010010110011111010010000000001,
+       0b1111111111010001001111111010010000000001,
+       0b1111111111010001001111111010010000000001,
+       0b1111111111010001001111111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001,
+       0b1111111111001111101011111010010000000001
+};
+
+static const u32 filter_lookup_low[64] = {
+       0b0001011111,
+       0b0001010111,
+       0b0001111011,
+       0b0001011011,
+       0b0001101011,
+       0b0001110011,
+       0b0001110011,
+       0b0001110011,
+       0b0001110011,
+       0b0001001011,
+       0b0001001011,
+       0b0001001011,
+       0b0010110011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001010011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0001100011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010010011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011,
+       0b0010100011
+};
+
+struct dglnt_dynclk_reg;
+struct dglnt_dynclk_mode;
+struct dglnt_dynclk;
+
+struct dglnt_dynclk_reg {
+       u32 clk0L;
+       u32 clkFBL;
+       u32 clkFBH_clk0H;
+       u32 divclk;
+       u32 lockL;
+       u32 fltr_lockH;
+};
+
+struct dglnt_dynclk_mode {
+       u32 freq;
+       u32 fbmult;
+       u32 clkdiv;
+       u32 maindiv;
+};
+
+struct dglnt_dynclk {
+       void __iomem *base;
+       struct clk_hw clk_hw;
+       unsigned long freq;
+};
+
+u32 dglnt_dynclk_divider(u32 divide)
+{
+       u32 output = 0;
+       u32 highTime = 0;
+       u32 lowTime = 0;
+
+       if ((divide < 1) || (divide > 128))
+               return ERR_CLKDIVIDER;
+
+       if (divide == 1)
+               return DYNCLK_DIV_1_REGMASK;
+
+       highTime = divide / 2;
+       /* if divide is odd */
+       if (divide & 0x1) {
+               lowTime = highTime + 1;
+               output = 1 << CLK_BIT_WEDGE;
+       } else {
+               lowTime = highTime;
+       }
+
+       output |= 0x03F & lowTime;
+       output |= 0xFC0 & (highTime << 6);
+       return output;
+}
+
+u32 dglnt_dynclk_count_calc(u32 divide)
+{
+       u32 output = 0;
+       u32 divCalc = 0;
+
+       divCalc = dglnt_dynclk_divider(divide);
+       if (divCalc == ERR_CLKDIVIDER)
+               output = ERR_CLKCOUNTCALC;
+       else
+               output = (0xFFF & divCalc) | ((divCalc << 10) & 0x00C00000);
+       return output;
+}
+
+
+int dglnt_dynclk_find_reg(struct dglnt_dynclk_reg *regValues,
+                         struct dglnt_dynclk_mode *clkParams)
+{
+       if ((clkParams->fbmult < 2) || clkParams->fbmult > 64)
+               return -EINVAL;
+
+       regValues->clk0L = dglnt_dynclk_count_calc(clkParams->clkdiv);
+       if (regValues->clk0L == ERR_CLKCOUNTCALC)
+               return -EINVAL;
+
+       regValues->clkFBL = dglnt_dynclk_count_calc(clkParams->fbmult);
+       if (regValues->clkFBL == ERR_CLKCOUNTCALC)
+               return -EINVAL;
+
+       regValues->clkFBH_clk0H = 0;
+
+       regValues->divclk = dglnt_dynclk_divider(clkParams->maindiv);
+       if (regValues->divclk == ERR_CLKDIVIDER)
+               return -EINVAL;
+
+       regValues->lockL = (u32)(lock_lookup[clkParams->fbmult - 1] &
+                                0xFFFFFFFF);
+
+       regValues->fltr_lockH = (u32)((lock_lookup[clkParams->fbmult - 1] >>
+                                      32) & 0x000000FF);
+       regValues->fltr_lockH |= ((filter_lookup_low[clkParams->fbmult - 1] <<
+                                  16) & 0x03FF0000);
+
+       return 0;
+}
+
+void dglnt_dynclk_write_reg(struct dglnt_dynclk_reg *regValues,
+                           void __iomem *baseaddr)
+{
+       writel(regValues->clk0L, baseaddr + OFST_DISPLAY_CLK_L);
+       writel(regValues->clkFBL, baseaddr + OFST_DISPLAY_FB_L);
+       writel(regValues->clkFBH_clk0H, baseaddr + OFST_DISPLAY_FB_H_CLK_H);
+       writel(regValues->divclk, baseaddr + OFST_DISPLAY_DIV);
+       writel(regValues->lockL, baseaddr + OFST_DISPLAY_LOCK_L);
+       writel(regValues->fltr_lockH, baseaddr + OFST_DISPLAY_FLTR_LOCK_H);
+}
+
+u32 dglnt_dynclk_find_mode(u32 freq, u32 parentFreq,
+                          struct dglnt_dynclk_mode *bestPick)
+{
+       u32 bestError = MMCM_FREQ_OUTMAX;
+       u32 curError;
+       u32 curClkMult;
+       u32 curFreq;
+       u32 divVal;
+       u32 curFb, curClkDiv;
+       u32 minFb = 0;
+       u32 maxFb = 0;
+       u32 curDiv = 1;
+       u32 maxDiv;
+       bool freq_found = false;
+
+       bestPick->freq = 0;
+       if (parentFreq == 0)
+               return 0;
+
+       /* minimum frequency is actually dictated by VCOmin */
+       if (freq < MMCM_FREQ_OUTMIN)
+               freq = MMCM_FREQ_OUTMIN;
+       if (freq > MMCM_FREQ_OUTMAX)
+               freq = MMCM_FREQ_OUTMAX;
+
+       if (parentFreq > MMCM_FREQ_PFDMAX)
+               curDiv = 2;
+       maxDiv = parentFreq / MMCM_FREQ_PFDMIN;
+       if (maxDiv > MMCM_DIV_MAX)
+               maxDiv = MMCM_DIV_MAX;
+
+       while (curDiv <= maxDiv && !freq_found) {
+               minFb = curDiv * DIV_ROUND_UP(MMCM_FREQ_VCOMIN, parentFreq);
+               maxFb = curDiv * (MMCM_FREQ_VCOMAX / parentFreq);
+               if (maxFb > MMCM_FB_MAX)
+                       maxFb = MMCM_FB_MAX;
+               if (minFb < MMCM_FB_MIN)
+                       minFb = MMCM_FB_MIN;
+
+               divVal = curDiv * freq;
+               /*
+                * This multiplier is used to find the best clkDiv value for
+                * each FB value
+                */
+               curClkMult = ((parentFreq * 1000) + (divVal / 2)) / divVal;
+
+               curFb = minFb;
+               while (curFb <= maxFb && !freq_found) {
+                       curClkDiv = ((curClkMult * curFb) + 500) / 1000;
+                       if (curClkDiv > MMCM_CLKDIV_MAX)
+                               curClkDiv = MMCM_CLKDIV_MAX;
+                       if (curClkDiv < MMCM_CLKDIV_MIN)
+                               curClkDiv = MMCM_CLKDIV_MIN;
+                       curFreq = (((parentFreq * curFb) / curDiv) / curClkDiv);
+                       if (curFreq >= freq)
+                               curError = curFreq - freq;
+                       else
+                               curError = freq - curFreq;
+                       if (curError < bestError) {
+                               bestError = curError;
+                               bestPick->clkdiv = curClkDiv;
+                               bestPick->fbmult = curFb;
+                               bestPick->maindiv = curDiv;
+                               bestPick->freq = curFreq;
+                       }
+                       if (!curError)
+                               freq_found = true;
+                       curFb++;
+               }
+               curDiv++;
+       }
+       return bestPick->freq;
+}
+
+static struct dglnt_dynclk *clk_hw_to_dglnt_dynclk(struct clk_hw *clk_hw)
+{
+       return container_of(clk_hw, struct dglnt_dynclk, clk_hw);
+}
+
+
+static int dglnt_dynclk_enable(struct clk_hw *clk_hw)
+{
+       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
+       unsigned int clock_state;
+
+       if (dglnt_dynclk->freq) {
+               writel(1, dglnt_dynclk->base + OFST_DISPLAY_CTRL);
+               do {
+                       clock_state = readl(dglnt_dynclk->base +
+                                           OFST_DISPLAY_STATUS);
+               } while (!clock_state);
+       }
+       return 0;
+}
+
+static void dglnt_dynclk_disable(struct clk_hw *clk_hw)
+{
+       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
+
+       writel(0, dglnt_dynclk->base + OFST_DISPLAY_CTRL);
+}
+
+static int dglnt_dynclk_set_rate(struct clk_hw *clk_hw,
+       unsigned long rate, unsigned long parent_rate)
+{
+       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
+       struct dglnt_dynclk_reg clkReg;
+       struct dglnt_dynclk_mode clkMode;
+
+       if (parent_rate == 0 || rate == 0)
+               return -EINVAL;
+       if (rate == dglnt_dynclk->freq)
+               return 0;
+
+       /*
+        * Convert from Hz to KHz, then multiply by five to account for
+        * BUFR division
+        */
+       rate = (rate + 100) / 200;
+       /* convert from Hz to KHz */
+       parent_rate = (parent_rate + 500) / 1000;
+       if (!dglnt_dynclk_find_mode(rate, parent_rate, &clkMode))
+               return -EINVAL;
+
+       /*
+        * Write to the PLL dynamic configuration registers to configure it
+        * with the calculated parameters.
+        */
+       dglnt_dynclk_find_reg(&clkReg, &clkMode);
+       dglnt_dynclk_write_reg(&clkReg, dglnt_dynclk->base);
+       dglnt_dynclk->freq = clkMode.freq * 200;
+       dglnt_dynclk_disable(clk_hw);
+       dglnt_dynclk_enable(clk_hw);
+
+       return 0;
+}
+
+static long dglnt_dynclk_round_rate(struct clk_hw *hw, unsigned long rate,
+       unsigned long *parent_rate)
+{
+       struct dglnt_dynclk_mode clkMode;
+
+       dglnt_dynclk_find_mode(((rate + 100) / 200),
+               ((*parent_rate) + 500) / 1000, &clkMode);
+
+       return (clkMode.freq * 200);
+}
+
+static unsigned long dglnt_dynclk_recalc_rate(struct clk_hw *clk_hw,
+       unsigned long parent_rate)
+{
+       struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
+
+       return dglnt_dynclk->freq;
+}
+
+
+static const struct clk_ops dglnt_dynclk_ops = {
+       .recalc_rate = dglnt_dynclk_recalc_rate,
+       .round_rate = dglnt_dynclk_round_rate,
+       .set_rate = dglnt_dynclk_set_rate,
+       .enable = dglnt_dynclk_enable,
+       .disable = dglnt_dynclk_disable,
+};
+
+static const struct of_device_id dglnt_dynclk_ids[] = {
+       { .compatible = "digilent,axi-dynclk", },
+       { },
+};
+MODULE_DEVICE_TABLE(of, dglnt_dynclk_ids);
+
+static int dglnt_dynclk_probe(struct platform_device *pdev)
+{
+       const struct of_device_id *id;
+       struct dglnt_dynclk *dglnt_dynclk;
+       struct clk_init_data init;
+       const char *parent_name;
+       const char *clk_name;
+       struct resource *mem;
+       struct clk *clk;
+
+       if (!pdev->dev.of_node)
+               return -ENODEV;
+
+       id = of_match_node(dglnt_dynclk_ids, pdev->dev.of_node);
+       if (!id)
+               return -ENODEV;
+
+       dglnt_dynclk = devm_kzalloc(&pdev->dev, sizeof(*dglnt_dynclk),
+                                   GFP_KERNEL);
+       if (!dglnt_dynclk)
+               return -ENOMEM;
+
+       mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+       dglnt_dynclk->base = devm_ioremap_resource(&pdev->dev, mem);
+       if (IS_ERR(dglnt_dynclk->base))
+               return PTR_ERR(dglnt_dynclk->base);
+
+       parent_name = of_clk_get_parent_name(pdev->dev.of_node, 0);
+       if (!parent_name)
+               return -EINVAL;
+
+       clk_name = pdev->dev.of_node->name;
+       of_property_read_string(pdev->dev.of_node, "clock-output-names",
+               &clk_name);
+
+       init.name = clk_name;
+       init.ops = &dglnt_dynclk_ops;
+       init.flags = 0;
+       init.parent_names = &parent_name;
+       init.num_parents = 1;
+
+       dglnt_dynclk->freq = 0;
+       dglnt_dynclk_disable(&dglnt_dynclk->clk_hw);
+
+       dglnt_dynclk->clk_hw.init = &init;
+       clk = devm_clk_register(&pdev->dev, &dglnt_dynclk->clk_hw);
+       if (IS_ERR(clk))
+               return PTR_ERR(clk);
+
+       return of_clk_add_provider(pdev->dev.of_node, of_clk_src_simple_get,
+                                  clk);
+}
+
+static int dglnt_dynclk_remove(struct platform_device *pdev)
+{
+       of_clk_del_provider(pdev->dev.of_node);
+
+       return 0;
+}
+
+static struct platform_driver dglnt_dynclk_driver = {
+       .driver = {
+               .name = "dglnt-dynclk",
+               .owner = THIS_MODULE,
+               .of_match_table = dglnt_dynclk_ids,
+       },
+       .probe = dglnt_dynclk_probe,
+       .remove = dglnt_dynclk_remove,
+};
+module_platform_driver(dglnt_dynclk_driver);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Sam Bobrowicz <sbobrowicz@digilentinc.com>");
+MODULE_DESCRIPTION("CCF Driver for Digilent axi_dynclk IP Core");
+-- 
+2.14.2
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch
new file mode 100644
index 00000000..a98d84c5
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch
@@ -0,0 +1,54 @@
+From 1a18e2b514ae9e75145597ac509a87f656c976ba Mon Sep 17 00:00:00 2001
+From: Nathan Rossi <nathan@nathanrossi.com>
+Date: Mon, 2 May 2016 23:46:42 +1000
+Subject: [PATCH 3/3] drm: xilinx: Fix DPMS transition to on
+Fix the issues where the VTC is reset (losing its timing config).
+Also fix the issue where the plane destroys its DMA descriptors and
+marks the DMA channels as inactive but never recreates the descriptors
+and never updates the active state when turning DPMS back on.
+Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
+Upstream-Status: Pending [This is a workaround]
+---
+ drivers/gpu/drm/xilinx/xilinx_drm_crtc.c  | 1 -
+ drivers/gpu/drm/xilinx/xilinx_drm_plane.c | 3 ++-
+ 2 files changed, 2 insertions(+), 2 deletions(-)
+diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c b/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
+index 631d35b921..93dbd4b58a 100644
+--- a/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
+++ b/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
+@@ -88,7 +88,6 @@ static void xilinx_drm_crtc_dpms(struct drm_crtc *base_crtc, int dpms)
+        default:
+                if (crtc->vtc) {
+                        xilinx_vtc_disable(crtc->vtc);
+-                       xilinx_vtc_reset(crtc->vtc);
+                }
+                if (crtc->cresample) {
+                        xilinx_cresample_disable(crtc->cresample);
+diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_plane.c b/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
+index 6a248b72d4..d2518a4bdf 100644
+--- a/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
+++ b/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
+@@ -140,7 +140,7 @@ void xilinx_drm_plane_commit(struct drm_plane *base_plane)
+        for (i = 0; i < MAX_NUM_SUB_PLANES; i++) {
+                struct xilinx_drm_plane_dma *dma = &plane->dma[i];
+ 
+-               if (dma->chan && dma->is_active) {
+               if (dma->chan) {
+                        flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
+                        desc = dmaengine_prep_interleaved_dma(dma->chan,
+                                                              &dma->xt,
+@@ -153,6 +153,7 @@ void xilinx_drm_plane_commit(struct drm_plane *base_plane)
+                        dmaengine_submit(desc);
+ 
+                        dma_async_issue_pending(dma->chan);
+                       dma->is_active = true;
+                }
+        }
+ }
+-- 
+2.14.2
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0004-minized-wifi-bluetooth.cfg b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0004-minized-wifi-bluetooth.cfg
new file mode 100644
index 00000000..f71e53ab
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx/v2023.2/0004-minized-wifi-bluetooth.cfg
@@ -0,0 +1,33 @@
+#
+# Bluetooth config
+#
+CONFIG_BT=y
+CONFIG_BT_BREDR=y
+CONFIG_BT_HS=y
+CONFIG_BT_LE=y
+CONFIG_BT_BCM=y
+CONFIG_BT_HCIUART=y
+CONFIG_BT_HCIUART_H4=y
+CONFIG_BT_HCIUART_BCM=y
+CONFIG_BT_HIDP=y
+CONFIG_CFG80211=y
+CONFIG_CFG80211_DEFAULT_PS=y
+CONFIG_CFG80211_CRDA_SUPPORT=y
+CONFIG_BRCMUTIL=y
+CONFIG_BRCMFMAC=y
+CONFIG_BRCMFMAC_PROTO_BCDC=y
+CONFIG_BRCMFMAC_SDIO=y
+CONFIG_CRYPTO_BLKCIPHER=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_ECB=y
+CONFIG_CRYPTO_CMAC=y
+CONFIG_CRYPTO_SHA256=y
+#
+# Regulator config
+#
+CONFIG_REGMAP_IRQ=y
+CONFIG_I2C_XILINX=y
+CONFIG_MFD_DA9062=y
+CONFIG_REGULATOR_DA9062=y
diff --git a/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2023.2.bbappend b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2023.2.bbappend
new file mode 100644
index 00000000..c789c7a9
--- /dev/null
+++ b/meta-xilinx-contrib/recipes-kernel/linux/linux-xlnx_2023.2.bbappend
@@ -0,0 +1,12 @@
+FILESEXTRAPATHS:prepend := "${THISDIR}/linux-xlnx/v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}:"
+# Note: These patches are very old and doesn't apply on top of 5.x
+#       kernel. For more details refer README.md file.
+#SRC_URI:append:zybo-linux-bd-zynq7 = " \
+#       file://0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch \
+#       file://0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch \
+#       file://0003-drm-xilinx-Fix-DPMS-transition-to-on.patch \
+#       "
+SRC_URI:append:minized-zynq7 = " file://0004-minized-wifi-bluetooth.cfg"
diff --git a/meta-xilinx-core/classes/dfx_user_dts.bbclass b/meta-xilinx-core/classes/dfx_user_dts.bbclass
new file mode 100644
index 00000000..4404aa05
--- /dev/null
+++ b/meta-xilinx-core/classes/dfx_user_dts.bbclass
@@ -0,0 +1,267 @@
+# This bbclass is inherited by flat, DFx Static and DFx RP firmware recipes.
+# dfx_user_dts.bbclass expects user to generate pl dtsi for flat, DFx Static
+# and DFx RP xsa outside of yocto.
+inherit devicetree
+DEPENDS = "dtc-native bootgen-native"
+# recipes that inherit from this class need to use an appropriate machine
+# override for COMPATIBLE_MACHINE to build successfully; don't allow building
+# for microblaze MACHINE
+COMPATIBLE_MACHINE ?= "^$"
+COMPATIBLE_MACHINE:microblaze = "^$"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+PROVIDES = ""
+do_fetch[cleandirs] = "${B}"
+DT_PADDING_SIZE = "0x1000"
+BOOTGEN_FLAGS ?= " -arch ${SOC_FAMILY} -w ${@bb.utils.contains('SOC_FAMILY','zynqmp','','-process_bitstream bin',d)}"
+S ?= "${WORKDIR}"
+FW_DIR ?= ""
+DTSI_PATH ?= ""
+DTBO_PATH ?= ""
+DT_FILES_PATH = "${S}/${DTSI_PATH}"
+FIRMWARE_NAME_DT_FILE ?= ""
+USER_DTS_FILE ?= ""
+FIRMWARE_NAME_DT_FILE[doc] = "DT file which has firmware-name device-tree property"
+USER_DTS_FILE[doc] = "Final DTSI or DTS file which is used for packaging final DT overlay"
+python() {
+    import re
+    soc_family = d.getVar("SOC_FAMILY")
+    if "git://" in d.getVar("SRC_URI") or "https://" in d.getVar("SRC_URI"):
+        d.setVar("S",'${WORKDIR}/git/'+d.getVar("FW_DIR"))
+    else:
+        dtsi_found = False
+        dtbo_found = False
+        bit_found = False
+        bin_found = False
+        pdi_found = False
+        # Required Inputs
+        if '.dtsi' in d.getVar("SRC_URI") or '.dts' in d.getVar("SRC_URI"):
+            dtsi_found = True
+            d.setVar("DTSI_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.dtsi' in a or '.dts' in a][0].lstrip('file://')))
+        if '.dtbo' in d.getVar("SRC_URI"):
+            dtbo_found = True
+            d.setVar("DTBO_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.dtbo' in a][0].lstrip('file://')))
+        if '.bit' in d.getVar("SRC_URI") and soc_family != "versal":
+            bit_found = True
+            d.setVar("BIT_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.bit' in a][0].lstrip('file://')))
+        if '.bin' in d.getVar("SRC_URI") and soc_family != "versal":
+            bin_found = True
+            d.setVar("BIT_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.bin' in a][0].lstrip('file://')))
+        if '.pdi' in d.getVar("SRC_URI") and soc_family == "versal":
+            pdi_found = True
+            d.setVar("PDI_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.pdi' in a][0].lstrip('file://')))
+        # Check for valid combination of input files in SRC_URI
+        if dtsi_found or dtbo_found:
+            bb.debug(2, "dtsi or dtbo found in SRC_URI")
+            if bit_found or pdi_found or bin_found:
+                bb.debug(2, "bitstream or pdi found in SRC_URI")
+            elif bit_found and bin_found:
+                raise bb.parse.SkipRecipe("Both '.bit' and '.bin' file found in SRC_URI, either .bit or .bin file is supported but not both.")
+            else:
+                raise bb.parse.SkipRecipe("Need one '.bit' or one '.pdi' file added to SRC_URI ")
+        else:
+            raise bb.parse.SkipRecipe("Need one '.dtsi' or one '.dtbo' file added to SRC_URI ")
+        # Check for valid combination of dtsi and dts files in SRC_URI
+        # Following file combinations are not supported use case.
+        # 1. More than one '.dtsi' and zero '.dts' file.
+        # 2. More than one '.dts' and zero or more than one '.dtsi'file .
+        pattern_dts = re.compile(r'[.]+dts\b')
+        pattern_dtsi = re.compile(r'[.]+dtsi\b')
+        dts_count = len([*re.finditer(pattern_dts, d.getVar('SRC_URI'))])
+        dtsi_count = len([*re.finditer(pattern_dtsi, d.getVar("SRC_URI"))])
+        if dtsi_count > 1 and dts_count == 0:
+            raise bb.parse.SkipRecipe("Recipe has more than one '.dtsi' and zero '.dts' found, this is an unsupported use case")
+        elif dts_count > 1:
+            raise bb.parse.SkipRecipe("Recipe has more than one '.dts' and zero or more than one '.dtsi' found, this is an unsupported use case")
+        # Optional input
+        if '.json' in d.getVar("SRC_URI"):
+            d.setVar("JSON_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.json' in a][0].lstrip('file://')))
+        if '.xclbin' in d.getVar("SRC_URI"):
+            d.setVar("XCL_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.xclbin' in a][0].lstrip('file://')))
+}
+# Function to get dts or dtsi file count.
+def get_dt_count(d, dt_ext):
+    import glob
+    dt_count = sum(1 for f in glob.iglob((d.getVar('S') + (d.getVar('DTSI_PATH')) + '/*.' + dt_ext),recursive=True) if os.path.isfile(f))
+    return dt_count
+# Function to search for dt firmware-name property in dts or dtsi file.
+python find_firmware_file() {
+    import glob
+    pattern_fw = 'firmware-name'
+    search_count = 0
+    for dt_files in glob.iglob((d.getVar('S') + (d.getVar('DTSI_PATH')) + '/*.dts*'),recursive=True):
+        with open(dt_files, "r") as f:
+            current_fd = f.read()
+            if pattern_fw in current_fd:
+                search_count += 1
+                if search_count > 1:
+                    bb.error("firmware-name dt property found in more than one dt files! Please fix the dts or dtsi file.")
+                    break
+                else:
+                    d.setVar('FIRMWARE_NAME_DT_FILE', os.path.basename(dt_files))
+}
+do_configure[prefuncs] += "find_firmware_file"
+python do_configure() {
+    import glob, re, shutil
+    soc_family = d.getVar("SOC_FAMILY")
+    if bb.utils.contains('MACHINE_FEATURES', 'fpga-overlay', False, True, d):
+        bb.warn("Using fpga-manager.bbclass requires fpga-overlay MACHINE_FEATURE to be enabled")
+    # Renaming firmware-name using $PN as bitstream/PDI will be renamed using
+    # $PN when generating the bin/pdi file.
+    if os.path.isfile(d.getVar('S') + (d.getVar('DTSI_PATH') or '') + '/' + d.getVar('FIRMWARE_NAME_DT_FILE')):
+        orig_dtsi = glob.glob(d.getVar('S')+ (d.getVar('DTSI_PATH') or '') + '/' + d.getVar('FIRMWARE_NAME_DT_FILE'))[0]
+        new_dtsi = d.getVar('S') + '/pl.dtsi_firmwarename'
+        with open(new_dtsi, 'w') as newdtsi:
+            with open(orig_dtsi) as olddtsi:
+                for line in olddtsi:
+                    if soc_family == 'versal':
+                        newdtsi.write(re.sub('firmware-name.*\".*\"','firmware-name = \"'+d.getVar('PN')+'.pdi\"',line))
+                    else:
+                        newdtsi.write(re.sub('firmware-name.*\".*\"','firmware-name = \"'+d.getVar('PN')+'.bit.bin\"',line))
+        shutil.move(new_dtsi,orig_dtsi)
+}
+do_compile[prefuncs] += "find_firmware_file"
+python devicetree_do_compile:append() {
+    import glob, subprocess, shutil
+    soc_family = d.getVar("SOC_FAMILY")
+    dtbo_count = sum(1 for f in glob.iglob((d.getVar('S') + '/*.dtbo'),recursive=True) if os.path.isfile(f))
+    # Skip devicetree do_compile task if input file is dtbo in SRC_URI
+    if not dtbo_count:
+        # Convert .bit to bit.bin format only if dtsi is input.
+        # In case of dtbo as input, bbclass doesn't know if firmware-name is .bit or
+        # .bit.bin format and corresponding file name. Hence we are not doing
+        # bit.bin conversion.
+        if soc_family != 'versal' and glob.glob(d.getVar('S') + '/' + d.getVar('FIRMWARE_NAME_DT_FILE')):
+            pn = d.getVar('PN')
+            biffile = pn + '.bif'
+            with open(biffile, 'w') as f:
+                f.write('all:\n{\n\t' + glob.glob(d.getVar('S')+(d.getVar('BIT_PATH') or '') + '/*.bit')[0] + '\n}')
+            bootgenargs = ["bootgen"] + (d.getVar("BOOTGEN_FLAGS") or "").split()
+            bootgenargs += ["-image", biffile, "-o", pn + ".bit.bin"]
+            subprocess.run(bootgenargs, check = True)
+            # In Zynq7k using both "-process_bitstream bin" and "-o" in bootgen flag,
+            # to convert bit file to bin format, "-o" option will not be effective
+            # and generated output file name is ${S}+${BIT_PATH}/<bit_file_name>.bit.bin
+            # file, Hence we need to rename this file from <bit_file_name>.bit.bin to
+            # ${PN}.bit.bin which matches the firmware name in dtbo and move
+            # ${PN}.bit.bin to ${B} directory.
+            if soc_family == 'zynq':
+                src_bitbin_file = glob.glob(d.getVar('S') + (d.getVar('BIT_PATH') or '') + '/*.bit.bin')[0]
+                dst_bitbin_file = d.getVar('B') + '/' + pn + '.bit.bin'
+                shutil.move(src_bitbin_file, dst_bitbin_file)
+            if not os.path.isfile(pn + ".bit.bin"):
+                bb.fatal("Couldn't find %s file, Enable '-log trace' in BOOTGEN_FLAGS" \
+                    "and check bootgen_log.txt" % (d.getVar('B') + '/' + pn + '.bit.bin'))
+}
+# If user inputs both dtsi and dts files then device-tree will generate dtbo
+# files for each dt file, Hence to package the firmware pick the right user dt
+# overlay file.
+python find_user_dts_overlay_file() {
+    import glob
+    dtbo_count = sum(1 for f in glob.iglob((d.getVar('S') + '/*.dtbo'),recursive=True) if os.path.isfile(f))
+    # Skip if input file is dtbo in SRC_URI
+    if not dtbo_count:
+        dts_count = get_dt_count(d, 'dts')
+        dtsi_count = get_dt_count(d, 'dtsi')
+        if dtsi_count == 1 and dts_count == 0:
+            dts_file =glob.glob(d.getVar('S')+ (d.getVar('DTSI_PATH') or '') + '/*.dtsi')[0]
+        elif dtsi_count >=0 and dts_count == 1:
+            dts_file = glob.glob(d.getVar('S')+ (d.getVar('DTSI_PATH') or '') + '/*.dts')[0]
+        d.setVar('USER_DTS_FILE', os.path.splitext(os.path.basename(dts_file))[0])
+}
+do_install[prefuncs] += "find_user_dts_overlay_file"
+do_install() {
+    install -d ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/
+    # In case of dtbo as input, dtbo will be copied from directly from ${S}
+    # In case of dtsi as input, dtbo will be copied from directly from ${B}
+    if [ `ls ${S}/*.dtbo | wc -l` -eq 1 ]; then
+        install -Dm 0644 ${S}/*.dtbo ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/
+    elif [ `ls ${S}/*.dtbo | wc -l` -gt 1 ]; then
+        bbfatal "Multiple DTBO found, use the right DTBO in SRC_URI from the following:\n$(basename -a ${S}/*.dtbo)"
+    elif [ -f ${B}/${USER_DTS_FILE}.dtbo ]; then
+        install -Dm 0644 ${B}/${USER_DTS_FILE}.dtbo ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.dtbo
+    else
+        bbfatal "A dtbo ending '.dtbo' expected but not found"
+    fi
+    if [ "${SOC_FAMILY}" == "versal" ]; then
+        # In case of dtbo as input, pdi will be copied from directly from ${S}
+        # without renaming the pdi name to ${PN}.pdi
+        if [ `ls ${S}/*.pdi | wc -l` -eq 1 ] && [ `ls ${S}/*.dtbo | wc -l` -eq 1 ]; then
+            install -Dm 0644 ${S}/*.pdi ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/
+        elif [ `ls ${S}/*.pdi | wc -l` -gt 1 ]; then
+            bbfatal "Multiple PDI found, use the right PDI in SRC_URI from the following:\n$(basename -a ${S}/*.pdi)"
+        elif [ `ls ${S}/*.pdi | wc -l` -eq 1 ] && [ -f ${B}/${USER_DTS_FILE}.dtbo ]; then
+            install -Dm 0644 ${S}/*.pdi ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.pdi
+        else
+            bbfatal "A PDI file with '.pdi' expected but not found"
+        fi
+    else
+        # In case of dtbo as input, .bit or .bin will be copied from directly
+        # from ${S} without renaming the .bit/.bin name to ${PN}.bit/${PN}.bin
+        # if more than one .bit/.bin file is found then fail the task.
+        if [ `ls ${S}/*.bit | wc -l` -gt 1 ]; then
+            bbfatal "Multiple .bit found, use the right .bit in SRC_URI from the following:\n$(basename -a ${S}/*.bit)"
+        elif [ `ls ${S}/*.bin | wc -l` -gt 1 ]; then
+            bbfatal "Multiple .bin found, use the right .bin in SRC_URI from the following:\n$(basename -a ${S}/*.bin)"
+        elif [ `ls ${S}/*.bit | wc -l` -eq 1 ] && [ `ls ${S}/*.dtbo | wc -l` -eq 1 ]; then
+            install -Dm 0644 ${S}/*.bit ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/
+        elif [ `ls ${S}/*.bin | wc -l` -eq 1 ] && [ `ls ${S}/*.dtbo | wc -l` -eq 1 ]; then
+            install -Dm 0644 ${S}/*.bin ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/
+        elif [ -f ${B}/${PN}.bit.bin ] && [ -f ${B}/${USER_DTS_FILE}.dtbo ]; then
+            install -Dm 0644 ${B}/${PN}.bit.bin ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.bit.bin
+        else
+            bbfatal "A bitstream file with '.bit' or '.bin' expected but not found"
+        fi
+    fi
+    if ls ${S}/${XCL_PATH}/*.xclbin >/dev/null 2>&1; then
+        install -Dm 0644 ${S}/${XCL_PATH}/*.xclbin ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.xclbin
+    fi
+    if [ -f ${S}/${JSON_PATH}/shell.json ] || [ -f ${S}/${JSON_PATH}/accel.json ]; then
+        install -Dm 0644 ${S}/${JSON_PATH}/*.json ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/
+    fi
+}
+do_deploy[noexec] = "1"
+FILES:${PN} += "${nonarch_base_libdir}/firmware/xilinx/${PN}"
diff --git a/meta-xilinx-core/classes/fpgamanager_custom.bbclass b/meta-xilinx-core/classes/fpgamanager_custom.bbclass
index e5255783..8c8997a1 100644
--- a/meta-xilinx-core/classes/fpgamanager_custom.bbclass
+++ b/meta-xilinx-core/classes/fpgamanager_custom.bbclass
@@ -1,177 +1,24 @@
-# This bbclass is inherited by flat, DFx Static and DFx RP firmware recipes.
+# This class inherits dfx_user_dts.bbclass for below use cases.
-# fpgamanager_custom.bbclass expects user to generate pl dtsi for flat, DFx Static
+# Zynq-7000 and ZynqMP: Full bitstream loading.
-# and DFx RP xsa outside of yocto.
+# ZynqMP: DFx Static and Partial bitstream loading.
+# Versal: DFx Static and Parial pdi loading.
-inherit devicetree
+# Versal: Full PDI loading.
-DEPENDS = "dtc-native bootgen-native"
+inherit dfx_user_dts
-# recipes that inherit from this class need to use an appropriate machine
+python fpgamanager_warn_msg () {
-# override for COMPATIBLE_MACHINE to build successfully; don't allow building
+    if not d.getVar("FPGAMANAGER_NO_WARN"):
-# for microblaze MACHINE
+        arch = d.getVar('SOC_FAMILY')
-COMPATIBLE_MACHINE ?= "^$"
+        pn = d.getVar('PN')        
-COMPATIBLE_MACHINE:microblaze = "^$"
+        warn_msg = 'Users should start using dfx_user_dts bbclass for '
+        if arch == 'zynq':
-PACKAGE_ARCH = "${MACHINE_ARCH}"
+            warn_msg += 'Zynq-7000 Full bitstream loading use case.'
+        elif arch == 'zynqmp':
-PROVIDES = ""
+            warn_msg += 'ZynqMP Full or DFx Static or DFx Partial bitstream loading use case.'
+        elif arch == 'versal':
-do_fetch[cleandirs] = "${B}"
+            warn_msg += 'Versal DFx Static or DFx Partial or Full PDI loading use case.'
-DT_PADDING_SIZE = "0x1000"
+        bb.warn("Recipe %s has inherited fpgamanager_custom bbclass which will be deprecated in 2024.1 release. \n%s" % (pn, warn_msg))
-BOOTGEN_FLAGS ?= " -arch ${SOC_FAMILY} -w ${@bb.utils.contains('SOC_FAMILY','zynqmp','','-process_bitstream bin',d)}"
-S ?= "${WORKDIR}"
-FW_DIR ?= ""
-DTSI_PATH ?= ""
-DTBO_PATH ?= ""
-DT_FILES_PATH = "${S}/${DTSI_PATH}"
-python() {
-    soc_family = d.getVar("SOC_FAMILY")
-    if "git://" in d.getVar("SRC_URI") or "https://" in d.getVar("SRC_URI"):
-        d.setVar("S",'${WORKDIR}/git/'+d.getVar("FW_DIR"))
-    else:
-        dtsi_found = False
-        dtbo_found = False
-        bit_found = False
-        pdi_found = False
-        # Required Inputs
-        if '.dtsi' in d.getVar("SRC_URI"):
-            dtsi_found = True
-            d.setVar("DTSI_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.dtsi' in a][0].lstrip('file://')))
-        if '.dtbo' in d.getVar("SRC_URI"):
-            dtbo_found = True
-            d.setVar("DTBO_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.dtbo' in a][0].lstrip('file://')))
-        if '.bit' in d.getVar("SRC_URI") and soc_family != "versal":
-            bit_found = True
-            d.setVar("BIT_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.bit' in a][0].lstrip('file://')))
-        if '.pdi' in d.getVar("SRC_URI") and soc_family == "versal":
-            pdi_found = True
-            d.setVar("PDI_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.pdi' in a][0].lstrip('file://')))
-        # Check for valid combination of input files in SRC_URI
-        if dtsi_found or dtbo_found:
-            bb.debug(2, "dtsi or dtbo found in SRC_URI")
-            if bit_found or pdi_found:
-                bb.debug(2, "bitstream or pdi found in SRC_URI")
-            else:
-                raise bb.parse.SkipRecipe("Need one '.bit' or one '.pdi' file added to SRC_URI ")
-        else:
-            raise bb.parse.SkipRecipe("Need one '.dtsi' or one '.dtbo' file added to SRC_URI ")
-        # Optional input
-        if '.json' in d.getVar("SRC_URI"):
-            d.setVar("JSON_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.json' in a][0].lstrip('file://')))
-        if '.xclbin' in d.getVar("SRC_URI"):
-            d.setVar("XCL_PATH",os.path.dirname([a for a in d.getVar('SRC_URI').split() if '.xclbin' in a][0].lstrip('file://')))
 }
-python do_configure() {
-    import glob, re, shutil
-    soc_family = d.getVar("SOC_FAMILY")
-    if bb.utils.contains('MACHINE_FEATURES', 'fpga-overlay', False, True, d):
-        bb.warn("Using fpga-manager.bbclass requires fpga-overlay MACHINE_FEATURE to be enabled")
-    # Renaming firmware-name using $PN as bitstream/PDI will be renamed using
-    # $PN when generating the bin/pdi file.
-    if '.dtsi' in d.getVar("SRC_URI"):
-        orig_dtsi = glob.glob(d.getVar('S')+ (d.getVar('DTSI_PATH') or '') + '/*.dtsi')[0]
-        new_dtsi = d.getVar('S') + '/pl.dtsi_firmwarename'
-        with open(new_dtsi, 'w') as newdtsi:
-            with open(orig_dtsi) as olddtsi:
-                for line in olddtsi:
-                    if soc_family == 'versal':
-                        newdtsi.write(re.sub('firmware-name.*\".*\"','firmware-name = \"'+d.getVar('PN')+'.pdi\"',line))
-                    else:
-                        newdtsi.write(re.sub('firmware-name.*\".*\"','firmware-name = \"'+d.getVar('PN')+'.bit.bin\"',line))
-        shutil.move(new_dtsi,orig_dtsi)
-}
-python devicetree_do_compile:append() {
-    import glob, subprocess, shutil
-    soc_family = d.getVar("SOC_FAMILY")
-    # Convert .bit to bit.bin format only if dtsi is input.
-    # In case of dtbo as input, bbclass doesn't know if firmware-name is .bit or
-    # .bit.bin format and corresponding file name. Hence we are not doing
-    # bit.bin conversion.
-    if soc_family != 'versal' and glob.glob(d.getVar('S') + '/*.dtsi'):
-        pn = d.getVar('PN')
-        biffile = pn + '.bif'
-        with open(biffile, 'w') as f:
-            f.write('all:\n{\n\t' + glob.glob(d.getVar('S')+(d.getVar('BIT_PATH') or '') + '/*.bit')[0] + '\n}')
-        bootgenargs = ["bootgen"] + (d.getVar("BOOTGEN_FLAGS") or "").split()
-        bootgenargs += ["-image", biffile, "-o", pn + ".bit.bin"]
-        subprocess.run(bootgenargs, check = True)
-        # In Zynq7k using both "-process_bitstream bin" and "-o" in bootgen flag,
-        # to convert bit file to bin format, "-o" option will not be effective
-        # and generated output file name is ${S}+${BIT_PATH}/<bit_file_name>.bit.bin
-        # file, Hence we need to rename this file from <bit_file_name>.bit.bin to
-        # ${PN}.bit.bin which matches the firmware name in dtbo and move
-        # ${PN}.bit.bin to ${B} directory.
-        if soc_family == 'zynq':
-            src_bitbin_file = glob.glob(d.getVar('S') + (d.getVar('BIT_PATH') or '') + '/*.bit.bin')[0]
-            dst_bitbin_file = d.getVar('B') + '/' + pn + '.bit.bin'
-            shutil.move(src_bitbin_file, dst_bitbin_file)
-        if not os.path.isfile(pn + ".bit.bin"):
-            bb.fatal("Couldn't find %s file, Enable '-log trace' in BOOTGEN_FLAGS" \
-                "and check bootgen_log.txt" % (d.getVar('B') + '/' + pn + '.bit.bin'))
-}
-do_install() {
-    install -d ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/
-    # In case of dtbo as input, dtbo will be copied from directly from ${S}
-    # In case of dtsi as input, dtbo will be copied from directly from ${B}
-    if [ -f ${S}/*.dtbo ]; then
-        install -Dm 0644 ${S}/*.dtbo ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/
-    elif [ -f ${B}/*.dtbo ]; then
-        install -Dm 0644 ${B}/*.dtbo ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.dtbo
-    else
-        bbfatal "A dtbo ending '.dtbo' expected but not found"
-    fi
-    if [ "${SOC_FAMILY}" == "versal" ]; then
-        # In case of dtbo as input, pdi will be copied from directly from ${S}
-        # without renaming the pdi name to ${PN}.pdi
-        if [ -f ${S}/*.pdi ] && [ -f ${S}/*.dtbo ]; then
-            install -Dm 0644 ${S}/*.pdi ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/
-        elif [ -f ${S}/*.pdi ] && [ -f ${B}/*.dtbo ]; then
-            install -Dm 0644 ${S}/*.pdi ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.pdi
-        else
-            bbfatal "A PDI file with '.pdi' expected but not found"
-        fi
-    else
-        # In case of dtbo as input, .bit or .bit.in will be copied from directly
-        # from ${S} without renaming the .bit name to ${PN}.bit.bin
-        if [ -f ${S}/*.bit* ] && [ -f ${S}/*.dtbo ]; then
-            install -Dm 0644 ${S}/*.bit* ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/
-        elif [ -f ${B}/${PN}.bit.bin ] && [ -f ${B}/*.dtbo ]; then
-            install -Dm 0644 ${B}/${PN}.bit.bin ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.bit.bin
-        else
-            bbfatal "A bitstream file with '.bit' or '.bit.bin' expected but not found"
-        fi
-    fi
-    if ls ${S}/${XCL_PATH}/*.xclbin >/dev/null 2>&1; then
-        install -Dm 0644 ${S}/${XCL_PATH}/*.xclbin ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/${PN}.xclbin
-    fi
-    if [ -f ${S}/${JSON_PATH}/shell.json ] || [ -f ${S}/${JSON_PATH}/accel.json ]; then
-        install -Dm 0644 ${S}/${JSON_PATH}/*.json ${D}/${nonarch_base_libdir}/firmware/xilinx/${PN}/
-    fi
-}
-do_deploy[noexec] = "1"
-FILES:${PN} += "${nonarch_base_libdir}/firmware/xilinx/${PN}"
+do_install[postfuncs] += "fpgamanager_warn_msg"
+\ No newline at end of file
diff --git a/meta-xilinx-core/conf/layer.conf b/meta-xilinx-core/conf/layer.conf
index 9745bb4d..afbf71c3 100644
--- a/meta-xilinx-core/conf/layer.conf
+++ b/meta-xilinx-core/conf/layer.conf
@@ -42,27 +42,26 @@ SIGGEN_EXCLUDE_SAFE_RECIPE_DEPS += " \
  *->xserver-xorg \
 "
-XILINX_RELEASE_VERSION ??= "v2023.1"
+XILINX_RELEASE_VERSION ??= "v2023.2"
 BUILDCFG_VARS:append = " SOC_VARIANT XILINX_RELEASE_VERSION"
 XILINX_QEMU_VERSION[v2022.1] = "v7.1.0-xilinx-v2022.1%"
 XILINX_QEMU_VERSION[v2022.2] = "v7.1.0-xilinx-v2022.2%"
 XILINX_QEMU_VERSION[v2023.1] = "v7.1.0-xilinx-v2023.1%"
+XILINX_QEMU_VERSION[v2023.2] = "v7.1.0-xilinx-v2023.2%"
 PREFERRED_VERSION_qemu-xilinx ?= "${@d.getVarFlag('XILINX_QEMU_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
 PREFERRED_VERSION_qemu-xilinx-native ?= "${@d.getVarFlag('XILINX_QEMU_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
 PREFERRED_VERSION_qemu-xilinx-system-native ?= "${@d.getVarFlag('XILINX_QEMU_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
 PREFERRED_VERSION_qemu-devicetrees ?= "xilinx-${XILINX_RELEASE_VERSION}%"
 PREFERRED_PROVIDER_qemu ?= "qemu-xilinx"
-XILINX_ATF_VERSION[v2022.1] = "2.6-xilinx-v2022.1%"
-XILINX_ATF_VERSION[v2022.2] = "2.6-xilinx-v2022.2%"
 XILINX_ATF_VERSION[v2023.1] = "2.8-xilinx-v2023.1%"
+XILINX_ATF_VERSION[v2023.2] = "2.8-xilinx-v2023.2%"
 PREFERRED_VERSION_arm-trusted-firmware ?= "${@d.getVarFlag('XILINX_ATF_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
-XILINX_UBOOT_VERSION[v2022.1] = "v2021.01-xilinx-v2022.1%"
-XILINX_UBOOT_VERSION[v2022.2] = "v2021.01-xilinx-v2022.2%"
 XILINX_UBOOT_VERSION[v2023.1] = "v2023.01-xilinx-v2023.1%"
+XILINX_UBOOT_VERSION[v2023.2] = "v2023.01-xilinx-v2023.2%"
 PREFERRED_VERSION_u-boot-xlnx ?= "${@d.getVarFlag('XILINX_UBOOT_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
 PREFERRED_VERSION_u-boot-tools-xlnx ?= "${@d.getVarFlag('XILINX_UBOOT_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
@@ -70,6 +69,7 @@ PREFERRED_VERSION_u-boot-tools-xlnx ?= "${@d.getVarFlag('XILINX_UBOOT_VERSION',
 XILINX_LINUX_VERSION[v2022.1] = "5.15.19-xilinx-v2022.1%"
 XILINX_LINUX_VERSION[v2022.2] = "5.15.36-xilinx-v2022.2%"
 XILINX_LINUX_VERSION[v2023.1] = "6.1.30-xilinx-v2023.1%"
+XILINX_LINUX_VERSION[v2023.2] = "6.1.30-xilinx-v2023.2%"
 PREFERRED_VERSION_linux-xlnx ?= "${@d.getVarFlag('XILINX_LINUX_VERSION', d.getVar('XILINX_RELEASE_VERSION')) or 'undefined'}"
 # Add support to eSDK for gen-machine-conf if it exists
diff --git a/meta-xilinx-core/conf/machine/README b/meta-xilinx-core/conf/machine/README
index 5361dc81..de8cf58d 100644
--- a/meta-xilinx-core/conf/machine/README
+++ b/meta-xilinx-core/conf/machine/README
@@ -142,20 +142,83 @@ you should not use :<machine> override values for the same reason.  Note,
 not every machine file will have all of these variables, only the ones
 you need to override should be set.
+Variables set before required inclusion file:
+Variables that changes based on hw design or board specific requirement must be
+set before required inclusion file else pre-expansion value defined in generic
+machine conf will be set. This way user can also override these variables from
+local.conf
 System wide setting:
 TUNE_FEATURES:tune-<tune> - Specific tune features
 external-hdf recipe from meta-xilinx-tools:
-HDF_MACHINE - Used by the  recipe to find the correct XSA
+HDF_MACHINE - Machine to load from reference defign xsa using hdf-examples recipe
-HDF_EXT - only xsa is supported, legacy variable
+HDF_EXT - Only ".xsa" externsion is supported, legacy variable.
-HDF_BASE - protocol if not using the default external-hdf repository
+HDF_BASE - Download protocol (file://, git://, http:// or https://) protocol if
-HDF_PATH - path to the repository or XSA file
+    not using the default external-hdf repository.
+HDF_PATH - Path to the repository or XSA file
+fs-boot recipe from meta-xilinx-tools:
+YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot - YAML based uart stdin configuration for
+MicroBlaze. Example: axi_uartlite_0 or axi_uart16550_0 etc,.
+YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot - YAML based uart stdout configuration for
+MicroBlaze. Example: axi_uartlite_0 or axi_uart16550_0 etc,.
+YAML_MAIN_MEMORY_CONFIG:pn-fs-boot - YAML based DDR4 or MIG configuration for
+MicroBlaze. Example: DDR4_0 or MIG_7SERIES_0 etc,.
+YAML_FLASH_MEMORY_CONFIG:pn-fs-boot - YAML based flash configuration for
+MicroBlaze. Example: axi_emc_0 or axi_quad_spi_0 etc,.
+XSCTH_PROC:pn-fs-boot - Processor IP used while configuring embeddedsw compoments.
+Example: microblaze_0 or microblaze_1 etc,.
+fsbl-firmware recipe from meta-xilinx-tools:
+YAML_SERIAL_CONSOLE_STDIN:pn-fsbl-firmware - YAML based FSBL uart stdin configuration
+for Zynq-7000 and ZynqMP devices.
+YAML_SERIAL_CONSOLE_STDOUT:pn-fsbl-firmware - YAML based FSBL uart stdout configuration
+for Zynq-7000 and ZynqMP devices.
+pmu-firmware recipe from meta-xilinx-tools:
+YAML_SERIAL_CONSOLE_STDIN:pn-pmu-firmware - YAML based PMUFW uart stdin configuration
+for ZynqMP devices.
+YAML_SERIAL_CONSOLE_STDOUT:pn-pmu-firmware - YAML based PMUFW uart stdout configuration
+for ZynqMP devices.
+plm-firmware recipe from meta-xilinx-tools:
+YAML_SERIAL_CONSOLE_STDIN:pn-plm-firmware - YAML based PLM uart stdin configuration
+for Versal devices.
+YAML_SERIAL_CONSOLE_STDOUT:pn-fplmsbl-firmware - YAML based PLM uart stdout
+configuration for Versal devices.
 device-tree recipe from meta-xilinx-tools:
-YAML_DT_BOARD_FLAGS - flags used for dtgen
+YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree - YAML based uart console configuration
+for all device families. Example: axi_uartlite_0 or psu_uart_0 etc,.
+YAML_MAIN_MEMORY_CONFIG:pn-device-tree - YAML based memory configuration for all
+device families. Example: DDR4_0 or PS7_DDR_0 or PSU_DDR_0 etc,.
+XSCTH_PROC:pn-device-tree - Processor IP used while configuring device-tree
+compoments. Example: microblaze_0 or microblaze_1 etc,.
+YAML_DT_BOARD_FLAGS:pn-device-tree - YAML based configuration for setting eval
+board specific dtsi files available in DTG repo.
+arm-trusted-firmware recipe from meta-xilinx-core:
+ATF_CONSOLE - Uart console configuration for all aarch64 device families.
+Example: pl011 or cadence or cadence1 etc,.
+TFA_BL33_LOAD - BL33 preloadded base address to EXTRA_OEMAKE for aarch64.
 u-boot-xlnx recipe from meta-xilinx-core:
 UBOOT_MACHINE - Name of the defconfig to use
-HAS_PLATFORM_INIT - List of defconfig files available for u-boot
+HAS_PLATFORM_INIT - List of defconfig files available for u-boot only for SPL boot.
+u-boot-xlnx-scr recipe from meta-xilinx-core:
+DDR_BASEADDR - Base address for DDR used for loading the images from u-boot env.
+SKIP_APPEND_BASEADDR - Skip appending ${DDR_BASEADDR} for image offsets.
+Varibable set after required inclusion file:
+Varibables that does not intend to change must be set before required inclusion
+file.
+external-hdf recipe from meta-xilinx-tools:
+HDF_MACHINE - Used by the  recipe to find the correct XSA
+HDF_EXT - only xsa is supported, legacy variable
+HDF_BASE - protocol if not using the default external-hdf repository
+HDF_PATH - path to the repository or XSA file
 ...and more...
diff --git a/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc b/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc
index 4a4384a1..e99b1f0e 100644
--- a/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc
+++ b/meta-xilinx-core/conf/machine/include/machine-xilinx-default.inc
@@ -64,33 +64,38 @@ FIT_CONF_DEFAULT_DTB ?= "${@os.path.basename(d.getVar('CONFIG_DTFILE')).replace(
 # Define to avoid parsse errors below if undefind elsewhere
 INITRAMFS_IMAGE ??= ""
+# IMAGE_BOOT_FILES is a whitespace-separated list of entries specifying files to be installed into the boot partition
+# entries can change the installed filename by specifying the destination name after a semicolon (e.g. u-boot.img;uboot)
+# make sure to use the installed filename when scanning IMAGE_BOOT_FILES
+IMAGE_BOOT_FILES_INSTALLED = "${@' '.join([x.split(';')[-1] for x in d.getVar('IMAGE_BOOT_FILES').split()])}"
 # Automatically add WKS_FILE_DEPENDS based on the configuration
 # Initial value from oe-core/meta/classes-recipe/image_types_wic.bbclass
 WKS_FILE_DEPENDS ?= "${WKS_FILE_DEPENDS_DEFAULT} ${WKS_FILE_DEPENDS_BOOTLOADERS}"
-WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'boot.bin',     ' virtual/boot-bin', '', d)}"
+WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'boot.bin',     ' virtual/boot-bin', '', d)}"
-WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'system.dtb',   ' virtual/dtb', '', d)}"
+WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'system.dtb',   ' virtual/dtb', '', d)}"
-WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'boot.scr',     ' u-boot-xlnx-scr', '', d)}"
+WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'boot.scr',     ' u-boot-xlnx-scr', '', d)}"
-WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'uEnv.txt',     ' u-boot-xlnx-uenv', '', d)}"
+WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'uEnv.txt',     ' u-boot-xlnx-uenv', '', d)}"
-WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'atf-uboot.ub', ' arm-trusted-firmware', '', d)}"
+WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'atf-uboot.ub', ' arm-trusted-firmware', '', d)}"
-WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'Image',        ' virtual/kernel', '', d)}"
+WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'Image',        ' virtual/kernel', '', d)}"
-WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'uImage',       ' virtual/kernel', '', d)}"
+WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'uImage',       ' virtual/kernel', '', d)}"
-WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'zImage',       ' virtual/kernel', '', d)}"
+WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'zImage',       ' virtual/kernel', '', d)}"
-WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'u-boot.bin',   ' virtual/bootloader', '', d)}"
+WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'u-boot.bin',   ' virtual/bootloader', '', d)}"
-WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'u-boot.elf',   ' virtual/bootloader', '', d)}"
+WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'u-boot.elf',   ' virtual/bootloader', '', d)}"
-WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', '${INITRAMFS_IMAGE}-${MACHINE}.cpio.gz.u-boot', ' ${INITRAMFS_IMAGE}', '', d)}"
+WKS_FILE_DEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', '${INITRAMFS_IMAGE}-${MACHINE}.cpio.gz.u-boot', ' ${INITRAMFS_IMAGE}', '', d)}"
 # Automatically add IMAGE_BOOT_FILES to /boot via packages
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'boot.bin',     ' ${PREFERRED_PROVIDER_virtual/boot-bin}', '', d)}"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'boot.bin',     ' ${PREFERRED_PROVIDER_virtual/boot-bin}', '', d)}"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'system.dtb',   ' ${PREFERRED_PROVIDER_virtual/dtb}', '', d)}"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'system.dtb',   ' ${PREFERRED_PROVIDER_virtual/dtb}', '', d)}"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'boot.scr',     ' u-boot-xlnx-scr', '', d)}"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'boot.scr',     ' u-boot-xlnx-scr', '', d)}"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'uEnv.txt',     ' u-boot-xlnx-uenv', '', d)}"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'uEnv.txt',     ' u-boot-xlnx-uenv', '', d)}"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'atf-uboot.ub', ' arm-trusted-firmware', '', d)}"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'atf-uboot.ub', ' arm-trusted-firmware', '', d)}"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'u-boot.bin',   ' ${PREFERRED_PROVIDER_virtual/bootloader}-bin', '', d)}"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'u-boot.bin',   ' ${PREFERRED_PROVIDER_virtual/bootloader}-bin', '', d)}"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'u-boot.elf',   ' ${PREFERRED_PROVIDER_virtual/bootloader}-elf', '', d)}"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'u-boot.elf',   ' ${PREFERRED_PROVIDER_virtual/bootloader}-elf', '', d)}"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'Image',        ' kernel-image-image', '', d)}"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'Image',        ' kernel-image-image', '', d)}"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'uImage',       ' kernel-image-uimage', '', d)}"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'uImage',       ' kernel-image-uimage', '', d)}"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', 'zImage',       ' kernel-image-zimage', '', d)}"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', 'zImage',       ' kernel-image-zimage', '', d)}"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES', '${INITRAMFS_IMAGE}-${MACHINE}.cpio.gz.u-boot', ' initramdisk-${INITRAMFS_IMAGE}', '', d)}"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS .= "${@bb.utils.contains('IMAGE_BOOT_FILES_INSTALLED', '${INITRAMFS_IMAGE}-${MACHINE}.cpio.gz.u-boot', ' initramdisk-${INITRAMFS_IMAGE}', '', d)}"
 # Default SD card wks file, split /boot and /
 WKS_FILES ?= "xilinx-default-sd.wks"
@@ -128,3 +133,6 @@ def get_default_image_boot_files(d):
 XSERVER_EXT ?= ""
 FPGA_MNGR_RECONFIG_ENABLE ?= "1"
+# This variable is supported only with SysVinit.
+SERIAL_CONSOLES_CHECK = "${@bb.utils.contains('DISTRO_FEATURES', 'sysvinit', '${SERIAL_CONSOLES}', '', d)}"
diff --git a/meta-xilinx-core/conf/machine/microblaze-generic.conf b/meta-xilinx-core/conf/machine/microblaze-generic.conf
index 9916a4ca..5bf87344 100644
--- a/meta-xilinx-core/conf/machine/microblaze-generic.conf
+++ b/meta-xilinx-core/conf/machine/microblaze-generic.conf
@@ -2,23 +2,36 @@
 #@NAME: microblaze-generic
 #@DESCRIPTION: Machine configuration for the microblaze-generic devices
+# Deprecated board config
+USE_BOARD = "${@"conf/machine/include/xilinx-board-pre.inc" if d.getVar("BOARD") or d.getVar("BOARD_VARIANT") else ""}"
+require ${USE_BOARD}
+unset USE_BOARD
 #### Preamble
 MACHINEOVERRIDES =. "${@['', 'microblaze-generic:']['microblaze-generic' != '${MACHINE}']}"
 #### Regular settings follow
 # Set the default for a modern full feature microblaze...
-TUNE_FEATURES:tune-microblaze ?= "microblaze v11.0 barrel-shift pattern-compare reorder divide-hard multiply-high"
+TUNE_FEATURES:tune-microblaze ?= "microblaze v11.0 pattern-compare barrel-shift divide-hard multiply-high fpu-hard reorder"
 DEFAULTTUNE ?= "microblaze"
 # Variables that changes based on hw design or board specific requirement must be
 # defined before calling the required inclusion file else pre-expansion value
 # defined in local.conf without machine override will not be reflected.
+# Yocto Microblaze device-tree variables
+YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0"
+YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "DDR4_0"
+DT_PADDING_SIZE:pn-device-tree ?= "0x1000"
+DTC_FLAGS:pn-device-tree ?= ""
+XSCTH_PROC:pn-device-tree ?= "microblaze_0"
+YAML_DT_BOARD_FLAGS ?= "{BOARD kcu105}"
 # Yocto Microblaze FS-Boot variables
 YAML_SERIAL_CONSOLE_STDIN:pn-fs-boot ?= "axi_uartlite_0"
 YAML_SERIAL_CONSOLE_STDOUT:pn-fs-boot ?= "axi_uartlite_0"
-YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "MIG_7SERIES_0"
+YAML_MAIN_MEMORY_CONFIG:pn-fs-boot ?= "DDR4_0"
-YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_emc_0"
+YAML_FLASH_MEMORY_CONFIG:pn-fs-boot ?= "axi_quad_spi_0"
 XSCTH_PROC:pn-fs-boot ?= "microblaze_0"
 # Yocto Microblaze u-boot-xlnx variables
@@ -26,14 +39,6 @@ UBOOT_MACHINE ?= "microblaze-generic_defconfig"
 UBOOT_INITIAL_ENV = ""
 BOOTMODE ?= "generic.root"
-# Yocto device-tree variables
-YAML_CONSOLE_DEVICE_CONFIG:pn-device-tree ?= "axi_uartlite_0"
-YAML_MAIN_MEMORY_CONFIG:pn-device-tree ?= "MIG_7SERIES_0"
-DT_PADDING_SIZE:pn-device-tree ?= "0x1000"
-DTC_FLAGS:pn-device-tree ?= ""
-XSCTH_PROC:pn-device-tree ?= "microblaze_0"
-YAML_DT_BOARD_FLAGS ?= "{BOARD kc705-full}"
 # Yocto Microblaze KERNEL Variables
 UBOOT_ENTRYPOINT  ?= "0x80000000"
 UBOOT_LOADADDRESS ?= "0x80000000"
@@ -41,7 +46,6 @@ KERNEL_EXTRA_ARGS += "UIMAGE_LOADADDR=${UBOOT_ENTRYPOINT}"
 # Microblaze Serial Console settings
 SERIAL_CONSOLES ?= "115200;ttyUL0"
-SERIAL_CONSOLES_CHECK = "${SERIAL_CONSOLES}"
 YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
 require conf/machine/include/soc-tune-include.inc
@@ -56,21 +60,21 @@ MB_MACHINE_ARCH = "${@[d.getVar('TUNE_PKGARCH'), d.getVar('TUNE_PKGARCH') + '-ge
 MACHINE_ARCH = "${@['${MB_MACHINE_ARCH}', '${DEF_MACHINE_ARCH}']['microblaze-generic' != "${MACHINE}"]}"
-# microblaze-generic.conf uses kc705-microblazeel xsa as reference input.
+# microblaze-generic.conf uses kcu105-microblazeel xsa as reference input.
 # User can override with custom xsa using HDF_BASE and HDF_PATH variables from
 # local.conf.
-HDF_MACHINE = "kc705-microblazeel"
+HDF_MACHINE = "kcu105-microblazeel"
 MACHINE_FEATURES = ""
 KERNEL_IMAGETYPE ?= "linux.bin.ub"
 KERNEL_IMAGETYPES = ""
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "${PREFERRED_PROVIDER_virtual/dtb}"
 IMAGE_BOOT_FILES += " \
-                ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \
+    ${@bb.utils.contains('PREFERRED_PROVIDER_virtual/dtb', 'device-tree', 'system.dtb', '', d)} \
-                "
+    "
 EXTRA_IMAGEDEPENDS += " \
    libyaml-native \
@@ -93,3 +97,8 @@ QB_NETWORK_DEVICE = "-net nic,netdev=net0,macaddr=@MAC@"
 #### No additional settings should be after the Postamble
 #### Postamble
 PACKAGE_EXTRA_ARCHS:append = "${@['', ' ${MB_MACHINE_ARCH}']['microblaze-generic' != "${MACHINE}"]}"
+# Deprecated board config
+USE_BOARD = "${@"conf/machine/include/xilinx-board-post.inc" if d.getVar("BOARD") or d.getVar("BOARD_VARIANT") else ""}"
+require ${USE_BOARD}
+unset USE_BOARD
diff --git a/meta-xilinx-core/conf/machine/versal-generic.conf b/meta-xilinx-core/conf/machine/versal-generic.conf
index e44e99f2..f87dc140 100644
--- a/meta-xilinx-core/conf/machine/versal-generic.conf
+++ b/meta-xilinx-core/conf/machine/versal-generic.conf
@@ -33,7 +33,6 @@ UBOOT_LOADADDRESS ?= "0x200000"
 # Versal Serial Console
 SERIAL_CONSOLES ?= "115200;ttyAMA0"
-SERIAL_CONSOLES_CHECK = "${SERIAL_CONSOLES}"
 YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
 require conf/machine/include/soc-versal.inc
@@ -47,7 +46,7 @@ HDF_MACHINE = "vck190-versal"
 MACHINE_FEATURES += "rtc ext2 ext3 vfat usbhost"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "${PREFERRED_PROVIDER_virtual/dtb}"
 # Default SD image build onfiguration, use qemu-sd to pad
 IMAGE_CLASSES += "image-types-xilinx-qemu"
diff --git a/meta-xilinx-core/conf/machine/versal-net-generic.conf b/meta-xilinx-core/conf/machine/versal-net-generic.conf
index 4b368e83..e1f222e2 100644
--- a/meta-xilinx-core/conf/machine/versal-net-generic.conf
+++ b/meta-xilinx-core/conf/machine/versal-net-generic.conf
@@ -1,3 +1,5 @@
+XILINX_DEPRECATED[versal-net] = "Versal-net is not supported in 2023.2"
 #@TYPE: Machine
 #@NAME: versal-net-generic
 #@DESCRIPTION: Machine configuration for the versal-net-generic devices
diff --git a/meta-xilinx-core/conf/machine/zynq-generic.conf b/meta-xilinx-core/conf/machine/zynq-generic.conf
index df82a683..e97be2ff 100644
--- a/meta-xilinx-core/conf/machine/zynq-generic.conf
+++ b/meta-xilinx-core/conf/machine/zynq-generic.conf
@@ -32,7 +32,6 @@ KERNEL_EXTRA_ARGS += "UIMAGE_LOADADDR=${UBOOT_ENTRYPOINT}"
 # Zynq-7000 Serial Console settings
 SERIAL_CONSOLES ?= "115200;ttyPS0"
-SERIAL_CONSOLES_CHECK = "${SERIAL_CONSOLES}"
 YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
 require conf/machine/include/soc-zynq.inc
@@ -46,7 +45,7 @@ HDF_MACHINE = "zc702-zynq7"
 MACHINE_FEATURES += "rtc ext2 ext3 vfat usbhost usbgadget"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "${PREFERRED_PROVIDER_virtual/dtb}"
 EXTRA_IMAGEDEPENDS += " \
    libyaml-native \
diff --git a/meta-xilinx-core/conf/machine/zynqmp-generic.conf b/meta-xilinx-core/conf/machine/zynqmp-generic.conf
index d24da3b4..b60014df 100644
--- a/meta-xilinx-core/conf/machine/zynqmp-generic.conf
+++ b/meta-xilinx-core/conf/machine/zynqmp-generic.conf
@@ -44,7 +44,6 @@ UBOOT_LOADADDRESS ?= "0x200000"
 # ZynqMP Serial Console
 SERIAL_CONSOLES ?= "115200;ttyPS0"
-SERIAL_CONSOLES_CHECK = "${SERIAL_CONSOLES}"
 YAML_SERIAL_CONSOLE_BAUDRATE ?= "115200"
 require conf/machine/include/soc-zynqmp.inc
@@ -65,7 +64,7 @@ IMAGE_CLASSES += "image-types-xilinx-qemu"
 # Add wic.qemu-sd only if initramfs_image not set due to circular dependecies
 IMAGE_FSTYPES += "${@'wic.qemu-sd' if (d.getVar('INITRAMFS_IMAGE') or '') == '' else 'cpio.gz.u-boot'}"
-MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "device-tree"
+MACHINE_ESSENTIAL_EXTRA_RDEPENDS += "${PREFERRED_PROVIDER_virtual/dtb}"
 EXTRA_IMAGEDEPENDS += " \
    libyaml-native \
@@ -150,8 +149,6 @@ QB_PMU_OPT = " \
 QB_OPT_APPEND += " -pmu-args '${QB_PMU_OPT}'"
-do_write_qemuboot_conf[depends] += "u-boot-xlnx-uenv:do_deploy"
 #### No additional settings should be after the Postamble
 #### Postamble
 PACKAGE_EXTRA_ARCHS:append = "${@['', ' zynqmp_generic']['zynqmp-generic' != "${MACHINE}"]}"
diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/device-tree.bbappend b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/device-tree.bbappend
index 4fd8b971..7dcee565 100644
--- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/device-tree.bbappend
+++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/device-tree.bbappend
@@ -1,12 +1,5 @@
 FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
-SRC_URI = " \
-    file://zynq-openamp.dtsi \
-    file://zynqmp-openamp.dtsi \
-    file://versal-openamp.dtsi \
-    file://versal-net-openamp.dtsi \
-"
 # openamp.dtsi is in the WORKDIR
 DT_INCLUDE:append = " ${WORKDIR}"
@@ -21,7 +14,7 @@ def set_openamp_extra_overlays(d):
    distro_features = d.getVar('DISTRO_FEATURES', True)
    enable_openamp_dtsi = d.getVar('ENABLE_OPENAMP_DTSI')
    if 'openamp' in distro_features and enable_openamp_dtsi == '1':
-        return d.getVar('OPENAMP_EXTRA_OVERLAYS', True)
+        return ' ${OPENAMP_EXTRA_OVERLAYS}'
    else:
        return ''
diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/open-amp-device-tree.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/open-amp-device-tree.bb
index 8f77bd54..9f481fec 100644
--- a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/open-amp-device-tree.bb
+++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-bsp/device-tree/open-amp-device-tree.bb
@@ -11,6 +11,8 @@ SRC_URI = " \
    file://zynqmp-openamp-overlay.dts \
    file://versal-openamp.dtsi \
    file://versal-openamp-overlay.dts \
+    file://versal-net-openamp.dtsi \
+    file://versal-net-openamp-overlay.dts \
 "
 # We don't have anything to include from the kernel
@@ -19,6 +21,7 @@ KERNEL_INCLUDE = ""
 COMPATIBLE_MACHINE:zynq = "${MACHINE}"
 COMPATIBLE_MACHINE:zynqmp = "${MACHINE}"
 COMPATIBLE_MACHINE:versal = "${MACHINE}"
+COMPATIBLE_MACHINE:versal-net = "${MACHINE}"
 inherit devicetree image-artifact-names features_check
diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb
new file mode 100644
index 00000000..5618ae88
--- /dev/null
+++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/libmetal/libmetal-xlnx_v2023.2.bb
@@ -0,0 +1,15 @@
+SRCBRANCH ?= "2023.2"
+SRCREV = "00fd771adc7adaed664ed6c5bc3d48d25856fe5c"
+BRANCH = "xlnx_rel_v2023.2"
+LIC_FILES_CHKSUM ?= "file://LICENSE.md;md5=f4d5df0f12dcea1b1a0124219c0dbab4"
+PV = "${SRCBRANCH}+git${SRCPV}"
+REPO = "git://github.com/Xilinx/libmetal.git;protocol=https"
+include ${LAYER_PATH_openamp-layer}/recipes-openamp/libmetal/libmetal.inc
+RPROVIDES:${PN}-dbg += "libmetal-dbg"
+RPROVIDES:${PN}-dev += "libmetal-dev"
+RPROVIDES:${PN}-lic += "libmetal-lic"
+RPROVIDES:${PN}-src += "libmetal-src"
+RPROVIDES:${PN}-staticdev += "libmetal-staticdev"
diff --git a/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb
new file mode 100644
index 00000000..8c6b4431
--- /dev/null
+++ b/meta-xilinx-core/dynamic-layers/openamp-layer/recipes-openamp/open-amp/open-amp-xlnx_v2023.2.bb
@@ -0,0 +1,16 @@
+SRCBRANCH ?= "2023.2"
+SRCREV = "73a546f2b5faffe71680b1e5389f3328be60773f"
+BRANCH = "xlnx_rel_v2023.2"
+LIC_FILES_CHKSUM ?= "file://LICENSE.md;md5=ab88daf995c0bd0071c2e1e55f3d3505"
+PV = "${SRCBRANCH}+git${SRCPV}"
+REPO = "git://github.com/Xilinx/open-amp.git;protocol=https"
+include ${LAYER_PATH_openamp-layer}/recipes-openamp/open-amp/open-amp.inc
+require ${LAYER_PATH_openamp-layer}/vendor/xilinx/recipes-openamp/open-amp/open-amp-xlnx.inc
+RPROVIDES:${PN}-dbg += "open-amp-dbg"
+RPROVIDES:${PN}-dev += "open-amp-dev"
+RPROVIDES:${PN}-lic += "open-amp-lic"
+RPROVIDES:${PN}-src += "open-amp-src"
+RPROVIDES:${PN}-staticdev += "open-amp-staticdev"
diff --git a/meta-xilinx-core/dynamic-layers/virtualization-layer/recipes-kernel/lopper/lopper_git.bbappend b/meta-xilinx-core/dynamic-layers/virtualization-layer/recipes-kernel/lopper/lopper_git.bbappend
index 0440b1bc..56cb8a45 100644
--- a/meta-xilinx-core/dynamic-layers/virtualization-layer/recipes-kernel/lopper/lopper_git.bbappend
+++ b/meta-xilinx-core/dynamic-layers/virtualization-layer/recipes-kernel/lopper/lopper_git.bbappend
@@ -1,5 +1,5 @@
 SRC_URI = "git://github.com/devicetree-org/lopper.git;branch=master;protocol=https"
-SRCREV = "395f00d44ee259d5db6fd6165c6cd18c8fe40e2f"
+SRCREV = "807435ae6fa0a07e8c84b458d138f3f54614eb5c"
 FILESEXTRAPATHS:prepend := "${THISDIR}/lopper:"
diff --git a/meta-xilinx-core/gen-machine-conf b/meta-xilinx-core/gen-machine-conf
-Subproject a08b0e9e88b4c70336b12d57d4704343474d608
+Subproject 911941fc094dc0073c2f01a2b94de3cc6e993fe
diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.2.bb b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.4.bb
index 810b51fd..f86c5985 100644
--- a/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.2.bb
+++ b/meta-xilinx-core/recipes-bsp/ai-engine/ai-engine-driver_3.4.bb
@@ -12,7 +12,7 @@ I = "${AIEDIR}/include"
 COMPATIBLE_MACHINE = "^$"
 COMPATIBLE_MACHINE:versal-ai-core = "versal-ai-core"
 COMPATIBLE_MACHINE:versal-ai-edge = "${SOC_VARIANT_ARCH}"
-PV = "3.2"
+PV = "3.3"
 IOBACKENDS ?= "Linux"
@@ -25,7 +25,7 @@ RPROVIDES:${PN}	= "libxaiengine"
 # The makefile isn't ready for parallel execution at the moment
 PARALLEL_MAKE = "-j 1"
-CFLAGS += "-Wall -Wextra -fno-thread-jumps -fno-tree-pre"
+CFLAGS += "-Wall -Wextra"
 CFLAGS += "${@bb.utils.contains('IOBACKENDS', 'Linux', ' -D__AIELINUX__', '', d)}"
 CFLAGS += "${@bb.utils.contains('IOBACKENDS', 'metal', ' -D__AIEMETAL__', '', d)}"
 EXTRA_OEMAKE = "-C ${AIEDIR}/src -f Makefile.Linux CFLAGS='${CFLAGS}'"
@@ -45,3 +45,5 @@ do_install(){
 }
 PACKAGE_ARCH:versal-ai-core = "${SOC_VARIANT_ARCH}"
+PACKAGE_ARCH:versal-ai-edge = "${SOC_VARIANT_ARCH}"
diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc
index 5eeb69d4..11059465 100644
--- a/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc
+++ b/meta-xilinx-core/recipes-bsp/ai-engine/aie-rt.inc
@@ -2,10 +2,10 @@ SECTION	= "libs"
 REPO ?= "git://github.com/Xilinx/aie-rt.git;protocol=https"
-BRANCH ?= "xlnx_rel_v2023.1"
+BRANCH ?= "xlnx_rel_v2023.2"
-SRCREV ?= "1ad203de0b7f282b1c0659fd2ae3f218652c7274"
+SRCREV ?= "84debe5d22c144fb09269b8410df4cb8a6aa3b2a"
 LICENSE = "BSD-3-Clause"
-LIC_FILES_CHKSUM ?= "file://license.txt;md5=b81abf1f508952331dd7d2ab36408f5b"
+LIC_FILES_CHKSUM ?= "file://license.txt;md5=04a153cae61a8a606fc79dff49c2c897"
 SRC_URI = "${REPO};branch=${BRANCH}"
diff --git a/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.0.bb b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.5.bb
index 7bb4b849..2c6c9cd1 100644
--- a/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.0.bb
+++ b/meta-xilinx-core/recipes-bsp/ai-engine/aiefal_1.5.bb
@@ -31,3 +31,5 @@ FILES:${PN}-demos = " \
 "
 PACKAGE_ARCH:versal-ai-core = "${SOC_VARIANT_ARCH}"
+PACKAGE_ARCH:versal-ai-edge = "${SOC_VARIANT_ARCH}"
diff --git a/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb
new file mode 100644
index 00000000..6ebd6cb5
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/arm-trusted-firmware/arm-trusted-firmware_2023.2.bb
@@ -0,0 +1,8 @@
+ATF_VERSION = "2.8"
+SRCREV = "6be857cb66300fb21e3f61308e4197911c8ac30d"
+BRANCH = "xlnx_rebase_v2.8"
+LIC_FILES_CHKSUM = "file://license.rst;md5=1dd070c98a281d18d9eefd938729b031"
+include arm-trusted-firmware.inc
diff --git a/meta-xilinx-core/recipes-bsp/bitstream/bitstream.bb b/meta-xilinx-core/recipes-bsp/bitstream/bitstream.bb
new file mode 100644
index 00000000..f61761f4
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/bitstream/bitstream.bb
@@ -0,0 +1,59 @@
+DESCRIPTION = "Recipe to provide a bitstream via virtual/bitstream"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://${COMMON_LICENSE_DIR}/MIT;md5=0835ade698e0bcf8506ecda2f7b4f302"
+INHIBIT_DEFAULT_DEPS = "1"
+# We never want to prefer this over another provider
+DEFAULT_PREFERENCE = "-1"
+PROVIDES = "virtual/bitstream"
+COMPATIBLE_MACHINE = "$^"
+COMPATIBLE_MACHINE:zynq = ".*"
+COMPATIBLE_MACHINE:zynqmp = ".*"
+# Since we're just copying, we can run any config
+COMPATIBLE_HOST = ".*"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+# Path where the bitstream can be found
+BITSTREAM_PATH ?= ""
+inherit deploy
+do_install() {
+    if [ ! -e ${BITSTREAM_PATH} ]; then
+        echo "Unable to find BITSTREAM_PATH (${BITSTREAM_PATH})"
+        exit 1
+    fi
+    install -Dm 0644 ${BITSTREAM_PATH} ${D}/boot/.
+}
+# If the item is already in OUR deploy_image_dir, nothing to deploy!
+SHOULD_DEPLOY = "${@'false' if (d.getVar('BITSTREAM_PATH')).startswith(d.getVar('DEPLOY_DIR_IMAGE')) else 'true'}"
+do_deploy() {
+    # If the item is already in OUR deploy_image_dir, nothing to deploy!
+    if ${SHOULD_DEPLOY}; then
+        install -Dm 0644 ${BITSTREAM_PATH} ${DEPLOYDIR}/.
+    fi
+}
+def check_bitstream_vars(d):
+   # If BITSTREAM_PATH is not defined, we error and instruct the user
+   # Don't cache this, as the items on disk can change!
+   d.setVar('BB_DONT_CACHE', '1')
+   if d.getVar('BITSTREAM_PATH') and not os.path.exists(d.getVar('BITSTREAM_PATH')):
+        raise bb.parse.SkipRecipe("The expected bitstream file %s is not available.\nSee the meta-xilinx-core README.")
+   if not d.getVar('BITSTREAM_PATH'):
+        raise bb.parse.SkipRecipe("Something is depending on virtual/bitstream and you have not provided a bitstream using BITSTREAM_PATH variable.\n See the meta-xilinx-core README.")
+python() {
+    # Need to allow bbappends to change the check
+    check_bitstream_vars(d)
+}
diff --git a/meta-xilinx-core/recipes-bsp/bootbin/xilinx-bootbin_1.0.bb b/meta-xilinx-core/recipes-bsp/bootbin/xilinx-bootbin_1.0.bb
index 5133fbd8..4c8bfa0e 100644
--- a/meta-xilinx-core/recipes-bsp/bootbin/xilinx-bootbin_1.0.bb
+++ b/meta-xilinx-core/recipes-bsp/bootbin/xilinx-bootbin_1.0.bb
@@ -44,6 +44,10 @@ BOOTGEN_EXTRA_ARGS ?= ""
 do_patch[noexec] = "1"
 def create_bif(config, attrflags, attrimage, ids, common_attr, biffd, d):
+    arch = d.getVar("SOC_FAMILY")
+    bb.error("create_bif function not defined for arch: %s" % (arch))
+def create_zynq_bif(config, attrflags, attrimage, ids, common_attr, biffd, d):
    import re, os
    for cfg in config:
        if cfg not in attrflags and common_attr:
@@ -117,23 +121,32 @@ def create_versal_bif(config, attrflags, attrimage, ids, common_attr, biffd, d):
 python do_configure() {
    fp = d.getVar("BIF_FILE_PATH")
    if fp == (d.getVar('B') + '/bootgen.bif'):
-        arch = d.getVar("SOC_FAMILY")
-        biffunc = {'versal':create_versal_bif, 'zynq':create_bif, 'zynqmp':create_bif}
        biffd = open(fp, 'w')
        biffd.write("the_ROM_image:\n")
        biffd.write("{\n")
+        arch = d.getVar("SOC_FAMILY")
        bifattr = (d.getVar("BIF_COMMON_ATTR") or "").split()
        if bifattr:
            attrflags = d.getVarFlags("BIF_COMMON_ATTR") or {}
-            biffunc[arch](bifattr, attrflags,'','', 1, biffd, d)
+            if arch in ['zynq', 'zynqmp']:
+                create_zynq_bif(bifattr, attrflags,'','', 1, biffd, d)
+            elif arch in ['versal']:
+                create_versal_bif(bifattr, attrflags,'','', 1, biffd, d)
+            else:
+                create_bif(bifattr, attrflags,'','', 1, biffd, d)
        bifpartition = (d.getVar("BIF_PARTITION_ATTR") or "").split()
        if bifpartition:
            attrflags = d.getVarFlags("BIF_PARTITION_ATTR") or {}
            attrimage = d.getVarFlags("BIF_PARTITION_IMAGE") or {}
            ids = d.getVarFlags("BIF_PARTITION_ID") or {}
-            biffunc[arch](bifpartition, attrflags, attrimage, ids, 0, biffd, d)
+            if arch in ['zynq', 'zynqmp']:
+                create_zynq_bif(bifpartition, attrflags, attrimage, ids, 0, biffd, d)
+            elif arch in ['versal']:
+                create_versal_bif(bifpartition, attrflags, attrimage, ids, 0, biffd, d)
+            else:
+                create_bif(bifpartition, attrflags, attrimage, ids, 0, biffd, d)
        biffd.write("}")
        biffd.close()
diff --git a/meta-xilinx-core/recipes-bsp/bootgen/bootgen_2023.2.bb b/meta-xilinx-core/recipes-bsp/bootgen/bootgen_2023.2.bb
new file mode 100644
index 00000000..03f323e1
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/bootgen/bootgen_2023.2.bb
@@ -0,0 +1,31 @@
+SUMMARY = "Building and installing bootgen"
+DESCRIPTION = "Building and installing bootgen, a Xilinx tool that lets you stitch binary files together and generate device boot images"
+LICENSE = "Apache-2.0"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=d526b6d0807bf263b97da1da876f39b1"
+S = "${WORKDIR}/git"
+DEPENDS += "openssl"
+RDEPENDS:${PN} += "openssl"
+REPO ?= "git://github.com/Xilinx/bootgen.git;protocol=https"
+BRANCH = "xlnx_rel_v2023.2"
+SRCREV = "8e6702bb5064b806e45028486de7376962470a36"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+EXTRA_OEMAKE += 'CROSS_COMPILER="${CXX}" -C ${S}'
+CXXFLAGS:append = " -std=c++0x"
+TARGET_CC_ARCH += "${LDFLAGS}"
+do_install() {
+    install -d ${D}${bindir}
+    install -Dm 0755 ${S}/bootgen ${D}${bindir}
+}
+FILES:${PN} = "${bindir}/bootgen"
+BBCLASSEXTEND = "native nativesdk"
diff --git a/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb b/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb
index 91a13fa1..8d7211f5 100644
--- a/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb
+++ b/meta-xilinx-core/recipes-bsp/device-tree/device-tree.bb
@@ -9,6 +9,11 @@ LIC_FILES_CHKSUM = " \
                file://${COMMON_LICENSE_DIR}/GPL-2.0-or-later;md5=fed54355545ffd980b814dab4a3b312c \
                "
+# Since we're not based on a kernel default to nothing.
+# This needs to be before the devicetree inherit, as it configured for use
+# with a linux kernel by default.
+KERNEL_INCLUDE ?= ""
 inherit devicetree image-artifact-names
 # Fall back to SYSTEM_DTFILE if specified...
@@ -17,7 +22,29 @@ inherit devicetree image-artifact-names
 # system.
 SYSTEM_DTFILE ??= ""
 CONFIG_DTFILE ??= "${SYSTEM_DTFILE}"
-DT_FILES_PATH = "${@os.path.dirname(d.getVar('CONFIG_DTFILE')) if d.getVar('CONFIG_DTFILE') else d.getVar('S')}"
+BASE_DTS ?= "${@os.path.basename(d.getVar('CONFIG_DTFILE') or '').rstrip('.dtb').rstrip('.dts') or 'system-top'}"
+EXTRA_DT_FILES ?= ""
+EXTRA_DTFILE_PREFIX ?= "system-top"
+EXTRA_DTFILES_BUNDLE ?= ""
+UBOOT_DT_FILES ?= ""
+UBOOT_DTFILE_PREFIX ?= "system-top"
+UBOOT_DTFILES_BUNDLE ?= ""
+EXTRA_OVERLAYS ?= ""
+SYSTEM_DTFILE[doc] = "System Device Tree which accepts at 0...1 dts file"
+CONFIG_DTFILE[doc] = "Domain Specific Device Tree which accepts 0...1 dts file"
+EXTRA_DT_FILES[doc] = "Add extra files to DT_FILES_PATH, it accepts 1...n dtsi files and adds to SRC_URI"
+EXTRA_OVERLAYS[doc] = "Add extra files to DT_FILES_PATH and adds a #include for each to the BASE_DTS, it access 1..n dtsi files and adds to SRC_URI"
+# There should only be ONE CONFIG_DTFILE listed
+# These need to be passed in from global, not from a bbappend
+FILESEXTRAPATHS:prepend := "${@'%s:' % os.path.dirname(d.getVar('CONFIG_DTFILE') or '') if (d.getVar('CONFIG_DTFILE')) else ''}"
+SRC_URI:append := " ${@'file://%s' % os.path.basename(d.getVar('CONFIG_DTFILE') or '') if (d.getVar('CONFIG_DTFILE')) else ''}"
+SRC_URI:append = " ${@" ".join(["file://%s" % f for f in (d.getVar('EXTRA_DT_FILES') or "").split()])}"
+SRC_URI:append = " ${@" ".join(["file://%s" % f for f in (d.getVar('EXTRA_OVERLAYS') or "").split()])}"
 COMPATIBLE_MACHINE:zynq   = ".*"
 COMPATIBLE_MACHINE:zynqmp = ".*"
@@ -30,11 +57,71 @@ PROVIDES = "virtual/dtb"
 # common zynq include
 SRC_URI:append:zynq = " file://zynq-7000-qspi-dummy.dtsi"
-DTB_FILE_NAME = "${@os.path.basename(d.getVar('CONFIG_DTFILE')).replace('.dts', '.dtb') if d.getVar('CONFIG_DTFILE') else ''}"
+DTB_FILE_NAME ?= "${BASE_DTS}.dtb"
 DTB_BASE_NAME ?= "${MACHINE}-system${IMAGE_VERSION_SUFFIX}"
+# Copy the EXTRA_DT_FILES and EXTRA_OVERLAYS files in prepend operation so that
+# it can be preprocessed.
+do_configure:prepend () {
+    # Create DT_FILES_PATH directory if doesn't exist during prepend operation.
+    if [ ! -d ${DT_FILES_PATH} ]; then
+        mkdir -p ${DT_FILES_PATH}
+    fi
+    for f in ${EXTRA_DT_FILES} ${EXTRA_OVERLAYS}; do
+        if [ "$(realpath ${WORKDIR}/${f})" != "$(realpath ${DT_FILES_PATH}/`basename ${f}`)" ]; then
+            cp ${WORKDIR}/${f} ${DT_FILES_PATH}/
+        fi
+    done
+}
+do_configure:append () {
+    for f in ${EXTRA_OVERLAYS}; do
+        if [ ! -e ${DT_FILES_PATH}/${BASE_DTS}.dts ]; then
+            if [ -e ${DT_FILES_PATH}/${BASE_DTS}.dtb ]; then
+                bberror "Unable to find ${BASE_DTS}.dts, to use EXTRA_OVERLAYS you must use a 'dts' and not 'dtb' in CONFIG_DTFILE"
+            else
+                bberror "Unable to find ${BASE_DTS}.dts, to use EXTRA_OVERLAYS you must set a valid CONFIG_DTFILE or use system-top.dts"
+            fi
+            exit 1
+        fi
+        echo "/include/ \"$f\"" >> ${DT_FILES_PATH}/${BASE_DTS}.dts
+    done
+}
+devicetree_do_compile:append() {
+    import subprocess
+    dtb_file = d.getVar('DTB_FILE_NAME') or ''
+    if not dtb_file or not os.path.isfile(dtb_file):
+        bb.error("Expected file ${DTB_FILE_NAME} doesn't exist")
+    if d.getVar('EXTRA_DTFILES_BUNDLE'):
+        ccdtb_prefix = d.getVar('EXTRA_DTFILE_PREFIX')
+        extra_dt_files = d.getVar('EXTRA_DT_FILES').split() or []
+        for dtsfile in extra_dt_files:
+            dtname = os.path.splitext(os.path.basename(dtsfile))[0]
+            if os.path.isfile(f"{dtname}.dtbo"):
+                fdtargs = ["fdtoverlay", "-o", f"{ccdtb_prefix}-{dtname}.dtb", "-i", dtb_file, f"{dtname}.dtbo"]
+                bb.note("Running {0}".format(" ".join(fdtargs)))
+                subprocess.run(fdtargs, check = True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+    if d.getVar('UBOOT_DTFILES_BUNDLE'):
+        uboot_ccdtb_prefix = d.getVar('UBOOT_DTFILE_PREFIX')
+        uboot_dt_files = d.getVar('UBOOT_DT_FILES').split() or []
+        for dtsfile in uboot_dt_files:
+            dtname = os.path.splitext(os.path.basename(dtsfile))[0]
+            if os.path.isfile(f"{dtname}.dtbo"):
+                fdtargs = ["fdtoverlay", "-o", f"{uboot_ccdtb_prefix}-{dtname}.dtb", "-i", dtb_file, f"{dtname}.dtbo"]
+                bb.note("Running {0}".format(" ".join(fdtargs)))
+                subprocess.run(fdtargs, check = True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+}
 FILES:${PN} += "/boot/system.dtb"
 devicetree_do_install:append() {
    if [ -n "${DTB_FILE_NAME}" ]; then
        # If it's already a dtb, we have to copy from the original location
@@ -73,14 +160,6 @@ def check_devicetree_variables(d):
    if not d.getVar('CONFIG_DTFILE'):
        raise bb.parse.SkipRecipe("CONFIG_DTFILE or SYSTEM_DTFILE is not defined.")
-    else:
-        if not os.path.exists(d.getVar('CONFIG_DTFILE')):
-            if not d.getVar('WITHIN_EXT_SDK'):
-                raise bb.parse.SkipRecipe("The device tree %s is not available." % d.getVar('CONFIG_DTFILE'))
-        else:
-            d.appendVar('SRC_URI', ' file://${CONFIG_DTFILE}')
-            d.setVarFlag('do_install', 'file-checksums', '${CONFIG_DTFILE}:True')
-            d.setVarFlag('do_deploy', 'file-checksums', '${CONFIG_DTFILE}:True')
 python() {
    # Need to allow bbappends to change the check
diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb
new file mode 100644
index 00000000..0d24c9fc
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb
@@ -0,0 +1,72 @@
+SUMMARY  = "Xilinx dfx-mgr libraries"
+DESCRIPTION = "Xilinx Runtime User Space Libraries and Binaries"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://LICENSE;md5=d67bcef754e935bf77b6d7051bd62b5e"
+REPO ?= "git://github.com/Xilinx/dfx-mgr.git;protocol=https"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+BRANCH = "xlnx_rel_v2023.2"
+SRCREV = "4dbd33accb043bd92ecbec2a3507f85a22045c51"
+SOMAJOR = "1"
+SOMINOR = "0"
+SOVERSION = "${SOMAJOR}.${SOMINOR}"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+COMPATIBLE_MACHINE:versal = "versal"
+S = "${WORKDIR}/git"
+inherit cmake update-rc.d systemd
+DEPENDS += " libwebsockets inotify-tools libdfx zocl libdrm"
+RDEPENDS:${PN} += " freeipmi"
+EXTRA_OECMAKE += " \
+               -DCMAKE_SYSROOT:PATH=${RECIPE_SYSROOT} \
+                "
+INITSCRIPT_NAME = "dfx-mgr.sh"
+INITSCRIPT_PARAMS = "start 99 S ."
+SYSTEMD_PACKAGES="${PN}"
+SYSTEMD_SERVICE:${PN}="dfx-mgr.service"
+SYSTEMD_AUTO_ENABLE:${PN}="enable"
+do_install(){
+        install -d ${D}${bindir}
+        install -d ${D}${libdir}
+        install -d ${D}${includedir}
+        install -d ${D}${base_libdir}/firmware/xilinx
+        install -d ${D}${sysconfdir}/dfx-mgrd
+        cp ${B}/example/sys/linux/dfx-mgrd-static ${D}${bindir}/dfx-mgrd
+        cp ${B}/example/sys/linux/dfx-mgr-client-static ${D}${bindir}/dfx-mgr-client
+        chrpath -d ${D}${bindir}/dfx-mgrd
+        chrpath -d ${D}${bindir}/dfx-mgr-client
+        install -m 0644 ${S}/src/dfxmgr_client.h ${D}${includedir}
+        oe_soinstall ${B}/src/libdfx-mgr.so.${SOVERSION} ${D}${libdir}
+        install -m 0755 ${S}/src/daemon.conf ${D}${sysconfdir}/dfx-mgrd/
+        if ${@bb.utils.contains('DISTRO_FEATURES', 'sysvinit', 'true', 'false', d)}; then
+                install -d ${D}${sysconfdir}/init.d/
+                install -m 0755 ${S}/src/dfx-mgr.sh ${D}${sysconfdir}/init.d/
+        fi
+        install -m 0755 ${S}/src/dfx-mgr.sh ${D}${bindir}
+        install -m 0755 ${S}/src/scripts/xlnx-firmware-detect ${D}${bindir}
+        install -d ${D}${systemd_system_unitdir}
+        install -m 0644 ${S}/src/dfx-mgr.service ${D}${systemd_system_unitdir}
+}
+PACKAGES =+ "libdfx-mgr"
+FILES:${PN} += "${base_libdir}/firmware/xilinx"
+FILES:${PN} += "${@bb.utils.contains('DISTRO_FEATURES','sysvinit','${sysconfdir}/init.d/dfx-mgr.sh', '', d)} ${systemd_system_unitdir}"
+FILES:libdfx-mgr = "${libdir}/libdfx-mgr.so.${SOVERSION} ${libdir}/libdfx-mgr.so.${SOMAJOR}"
diff --git a/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb
new file mode 100644
index 00000000..b3ccb884
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/libdfx/libdfx_2023.2.bb
@@ -0,0 +1,23 @@
+SUMMARY = "Xilinx libdfx library"
+DESCRIPTION = "Xilinx libdfx Library and headers"
+LICENSE = "MIT & GPL-2.0-or-later"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=94aba86aec117f003b958a52f019f1a7"
+BRANCH ?= "xlnx_rel_v2023.2"
+REPO ?= "git://github.com/Xilinx/libdfx.git;protocol=https"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+SRCREV = "52c1d83c72a2b2e85d256411a199ed1baed12ae1"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+COMPATIBLE_MACHINE:versal = "versal"
+S = "${WORKDIR}/git"
+inherit cmake
+# Due to an update where the soname/version was defined, we need to use an RREPLACES
+# so updates will work properly.
+RREPLACES:${PN} = "libdfx"
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2023.2.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2023.2.bb
new file mode 100644
index 00000000..43fec635
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-tools-xlnx_2023.2.bb
@@ -0,0 +1,21 @@
+require u-boot-tools-xlnx.inc
+require u-boot-xlnx-2023.2.inc
+# MUST clear CONFIG_VIDEO to avoid a compilation failure trying to construct
+# bmp_logo.h
+SED_CONFIG_EFI:append = ' -e "s/CONFIG_VIDEO=.*/# CONFIG_VIDEO is not set/"'
+# Default do_compile fails with:
+# | error: object directory ../downloads/git2/github.com.Xilinx.u-boot-xlnx.git/objects does not exist; check .git/objects/info/alternates.
+# The regular workaround of calling 'git diff' seems to be problematic.
+do_compile () {
+        oe_runmake -C ${S} tools-only_defconfig O=${B}
+        # Disable CONFIG_CMD_LICENSE, license.h is not used by tools and
+        # generating it requires bin2header tool, which for target build
+        # is built with target tools and thus cannot be executed on host.
+        sed -i -e "s/CONFIG_CMD_LICENSE=.*/# CONFIG_CMD_LICENSE is not set/" ${SED_CONFIG_EFI} ${B}/.config
+        oe_runmake -C ${S} cross_tools NO_SDL=1 O=${B}
+}
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc
new file mode 100644
index 00000000..0cfbd846
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc
@@ -0,0 +1,17 @@
+UBOOT_VERSION = "v2023.01"
+UBRANCH = "xlnx_rebase_v2023.01"
+SRCREV = "0fc19cad5a07a09958443e7a5b6f11e420ef195c"
+LICENSE = "GPL-2.0-or-later"
+LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897"
+# u-boot-xlnx has support for these
+HAS_PLATFORM_INIT ?= " \
+                xilinx_zynqmp_virt_config \
+                xilinx_zynq_virt_defconfig \
+                xilinx_versal_vc_p_a2197_revA_x_prc_01_revA \
+                "
+DEPENDS += "bc-native dtc-native python3-setuptools-native gnutls-native"
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-blob.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-blob.inc
index 86ba4fc6..bbf4125f 100644
--- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-blob.inc
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-blob.inc
@@ -101,7 +101,7 @@ do_blob_generate () {
        BASE_DTB=$(echo $CC_DTB | cut -d: -f2)
        OUTPUT_DTB=$(echo $CC_DTB | cut -d: -f3)
        if [ "${SYSTEM_DTB_BLOB}" = "1" ]; then
-                BASE_SYS_DTB="${RECIPE_SYSROOT}/${DTB_PATH}/${DTB_NAME}"
+                BASE_SYS_DTB="${RECIPE_SYSROOT}/${DTB_PATH}/${DTB_FILE_NAME}"
        else
                BASE_SYS_DTB="${B}/arch/arm/dts/${BASE_DTB}"
        fi
@@ -125,13 +125,13 @@ do_blob_generate () {
        its_filename="dtblob.its"
        dtblob_emit_its_section "${its_filename}" "header"
        dtblob_emit_its_section "${its_filename}" "imagestart"
-        for dtb in ${RECIPE_SYSROOT}/${DTB_PATH}/${DTB_NAME} $(find ${DT_BLOB_DIR} -name '*.dtb' | sort); do
+        for dtb in ${RECIPE_SYSROOT}/${DTB_PATH}/${DTB_FILE_NAME} $(find ${DT_BLOB_DIR} -name '*.dtb' | sort); do
                dtblob_emit_dtb "${its_filename}" "$(basename $dtb .dtb)" "$dtb"
        done
        dtblob_emit_its_section "${its_filename}" "sectend"
        dtblob_emit_its_section "${its_filename}" "confstart"
        dtbcount=1
-        for dtb in ${RECIPE_SYSROOT}/${DTB_PATH}/${DTB_NAME} $(find ${DT_BLOB_DIR} -name '*.dtb' | sort); do
+        for dtb in ${RECIPE_SYSROOT}/${DTB_PATH}/${DTB_FILE_NAME} $(find ${DT_BLOB_DIR} -name '*.dtb' | sort); do
                dtblob_emit_config "${its_filename}" "$(basename $dtb .dtb)" "$(basename $dtb .dtb)" "$dtbcount"
                dtbcount=`expr $dtbcount + 1`
        done
@@ -143,6 +143,8 @@ do_blob_generate () {
                        bbnote "Node ${DT_BLOB_DIR}/${DTB} with ${DT_BLOB_DIR}/${DUP_DTB}"
                        dtblob_emit_config "${its_filename}" "$DTB" "$DUP_DTB" "$dtbcount"
                        dtbcount=`expr $dtbcount + 1`
+        else
+            bberror "CC_DTBS_DUP file not found ${DT_BLOB_DIR}/${DTB}.dtb"
                fi
        done
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb
index afa4de23..6410fc25 100644
--- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr.bb
@@ -71,7 +71,14 @@ DEVICETREE_OFFSET:zynqmp ??= "0x100000"
 DEVICETREE_OFFSET:zynq ??= "0x100000"
 DEVICETREE_OFFSET:versal ??= "0x1000"
-DEVICETREE_OVERLAY_ADDRESS ?= "${@hex(int(d.getVar("DEVICETREE_ADDRESS"),16) + 0xf00000)}"
+DEVICETREE_OVERLAY_OFFSET:microblaze ??= "0x1e00000"
+DEVICETREE_OVERLAY_OFFSET:zynqmp ??= "0x100000"
+DEVICETREE_OVERLAY_OFFSET:zynq ??= "0x100000"
+DEVICETREE_OVERLAY_OFFSET:versal ??= "0x1000"
+DEVICETREE_OVERLAY_PADSIZE ??= "0xf00000"
+DEVICETREE_OVERLAY_ADDRESS ?= "${@hex(int(append_baseaddr(d,d.getVar('DEVICETREE_OVERLAY_OFFSET')),16) \
+                                + int(d.getVar('DEVICETREE_OVERLAY_PADSIZE'),16))}"
 KERNEL_LOAD_ADDRESS ?= "${@append_baseaddr(d,d.getVar('KERNEL_OFFSET'))}"
@@ -162,14 +169,8 @@ NAND_FIT_IMAGE_OFFSET ??= "0x4180000"
 NAND_FIT_IMAGE_OFFSET:zynq ??= "0x1080000"
 NAND_FIT_IMAGE_SIZE ??= "0x6400000"
-# Xen boot script variables. Define here and set it from meta-virtualization
+# Add variables as addendum.
-XEN_OFFSET ??= "0xBA00000"
+SCRIPT_SED_ADDENDUM = ""
-XEN_LOAD_ADDRESS ?= "${@append_baseaddr(d,d.getVar('XEN_OFFSET'))}"
-XEN_IMAGE_NAME ??= "xen"
-DOM0_MEM ??= "1500M"
-XEN_SERIAL_CONSOLES ??= "serial0"
-XEN_CMDLINE_APPEND ??= ""
-DOM0_MAX_VCPUS ??= "1"
 # Default to booting with the rootfs device being partition 2 for SD/eMMC
 PARTNUM ?= "2"
@@ -181,6 +182,9 @@ KERNEL_ROOT_SD ?= "root=/dev/\${bootdev}${PARTNUM} ro rootwait"
 # Set Kernel root filesystem parameter for JTAG/QSPI/OSPI/NAND(using RAMDISK) boot
 KERNEL_ROOT_RAMDISK ?= "root=/dev/ram0 rw"
+# Append the kernel command line
+KERNEL_COMMAND_APPEND ?= ""
 BITSTREAM_LOAD_ADDRESS ?= "0x100000"
 do_configure[noexec] = "1"
@@ -189,6 +193,9 @@ def append_baseaddr(d,offset):
    skip_append = d.getVar('SKIP_APPEND_BASEADDR') or ""
    if skip_append == "1":
        return offset
+    if offset.startswith('$'):
+        # If offset startswith '$' Assuming as uboot env variable.
+        return offset
    import subprocess
    baseaddr = d.getVar('DDR_BASEADDR') or "0x0"
    subcmd = "$((%s+%s));" % (baseaddr,offset)
@@ -240,13 +247,8 @@ do_compile() {
        -e 's/@@PARTNUM@@/${PARTNUM}/' \
        -e 's:@@KERNEL_ROOT_SD@@:${KERNEL_ROOT_SD}:' \
        -e 's:@@KERNEL_ROOT_RAMDISK@@:${KERNEL_ROOT_RAMDISK}:' \
-        -e 's/@@XEN_IMAGE_NAME@@/${XEN_IMAGE_NAME}/' \
+        -e 's:@@KERNEL_COMMAND_APPEND@@:${KERNEL_COMMAND_APPEND}:' \
-        -e 's/@@XEN_OFFSET@@/${XEN_OFFSET}/' \
+        ${SCRIPT_SED_ADDENDUM} \
-        -e 's/@@XEN_LOAD_ADDRESS@@/${XEN_LOAD_ADDRESS}/' \
-        -e 's/@@DOM0_MEM@@/${DOM0_MEM}/' \
-        -e 's/@@DOM0_MAX_VCPUS@@/${DOM0_MAX_VCPUS}/' \
-        -e 's:@@XEN_SERIAL_CONSOLES@@:${XEN_SERIAL_CONSOLES}:' \
-        -e 's:@@XEN_CMDLINE_APPEND@@:${XEN_CMDLINE_APPEND}:' \
        "${WORKDIR}/boot.cmd.${BOOTMODE}${BOOTFILE_EXT}" > "${WORKDIR}/boot.cmd"
    mkimage -A arm -T script -C none -n "Boot script" -d "${WORKDIR}/boot.cmd" boot.scr
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic
index ff2a5688..d99932ed 100644
--- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic
@@ -9,10 +9,16 @@ ramdisk_name=@@RAMDISK_IMAGE1@@
 rootfs_name=@@RAMDISK_IMAGE@@
 @@PRE_BOOTENV@@
+setenv get_bootargs 'fdt addr $fdtcontroladdr;fdt get value bootargs /chosen bootargs;'
+setenv update_bootargs 'if test -n ${launch_ramdisk_init} && test ${bootargs} = "";then if run get_bootargs;then setenv bootargs "\$bootargs launch_ramdisk_init=${launch_ramdisk_init} $extrabootargs";fi;fi'
 for boot_target in ${boot_targets};
 do
        echo "Trying to load boot images from ${boot_target}"
        if test "${boot_target}" = "jtag" ; then
+                run update_bootargs
                @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@
        fi
        if test "${boot_target}" = "mmc0" || test "${boot_target}" = "mmc1" || test "${boot_target}" = "usb0" || test "${boot_target}" = "usb1"; then
@@ -34,6 +40,7 @@ do
                fi
                if test -e ${devtype} ${devnum}:${distro_bootpart} /system.dtb; then
                        fatload ${devtype} ${devnum}:${distro_bootpart} @@DEVICETREE_ADDRESS@@ system.dtb;
+                        setenv fdtcontroladdr @@DEVICETREE_ADDRESS@@
                fi
                if test -e ${devtype} ${devnum}:${distro_bootpart} /devicetree/openamp.dtbo; then
                        fatload ${devtype} ${devnum}:${distro_bootpart} @@DEVICETREE_OVERLAY_ADDRESS@@ devicetree/openamp.dtbo;
@@ -41,6 +48,7 @@ do
                        fdt resize 8192
                        fdt apply @@DEVICETREE_OVERLAY_ADDRESS@@
                fi
+                run update_bootargs
                if test -e ${devtype} ${devnum}:${distro_bootpart} /${ramdisk_name} && test "${skip_tinyramdisk}" != "yes"; then
                        fatload ${devtype} ${devnum}:${distro_bootpart} @@RAMDISK_IMAGE_ADDRESS@@ ${ramdisk_name};
                        @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@
@@ -51,7 +59,7 @@ do
                fi
                @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ - @@DEVICETREE_ADDRESS@@
        fi
-        if test "${boot_target}" = "xspi0" || test "${boot_target}" = "qspi" || test "${boot_target}" = "qspi0"; then
+        if test "${boot_target}" = "xspi0" || test "${boot_target}" = "xspi1" || test "${boot_target}" = "qspi" || test "${boot_target}" = "qspi0"; then
                sf probe 0 0 0;
                sf read @@FIT_IMAGE_LOAD_ADDRESS@@ @@QSPI_FIT_IMAGE_OFFSET@@ @@QSPI_FIT_IMAGE_SIZE@@
                bootm @@FIT_IMAGE_LOAD_ADDRESS@@;
@@ -59,6 +67,7 @@ do
                sf read @@KERNEL_LOAD_ADDRESS@@ @@QSPI_KERNEL_OFFSET@@ @@QSPI_KERNEL_SIZE@@
                sf read @@RAMDISK_IMAGE_ADDRESS@@ @@QSPI_RAMDISK_OFFSET@@ @@QSPI_RAMDISK_SIZE@@
+                run update_bootargs
                @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@;
                echo "Booting using Separate images failed"
        fi
@@ -70,6 +79,7 @@ do
                nand read @@KERNEL_LOAD_ADDRESS@@ @@NAND_KERNEL_OFFSET@@ @@NAND_KERNEL_SIZE@@
                nand read @@RAMDISK_IMAGE_ADDRESS@@ @@NAND_RAMDISK_OFFSET@@ @@NAND_RAMDISK_SIZE@@
+                run update_bootargs
                @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@;
                echo "Booting using Separate images failed"
        fi
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root
index 816707cb..ed12f941 100644
--- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-scr/boot.cmd.generic.root
@@ -15,7 +15,7 @@ do
        if test "${boot_target}" = "jtag" ; then
                fdt addr @@DEVICETREE_ADDRESS@@
                fdt get value bootargs /chosen bootargs
-                setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@
+                setenv bootargs $bootargs @@KERNEL_COMMAND_APPEND@@ @@KERNEL_ROOT_RAMDISK@@
                @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@
        fi
        if test "${boot_target}" = "mmc0" || test "${boot_target}" = "mmc1" || test "${boot_target}" = "usb0" || test "${boot_target}" = "usb1"; then
@@ -65,7 +65,7 @@ do
                        fatload ${devtype} ${devnum}:${distro_bootpart} @@RAMDISK_IMAGE_ADDRESS@@ ${ramdisk_name};
                        fdt addr @@DEVICETREE_ADDRESS@@
                        fdt get value bootargs /chosen bootargs
-                        setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@
+                        setenv bootargs $bootargs @@KERNEL_COMMAND_APPEND@@ @@KERNEL_ROOT_RAMDISK@@
                        @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@
                fi
                echo "Checking for /${rootfs_name}"
@@ -74,12 +74,12 @@ do
                        fatload ${devtype} ${devnum}:${distro_bootpart} @@RAMDISK_IMAGE_ADDRESS@@ ${rootfs_name};
                        fdt addr @@DEVICETREE_ADDRESS@@
                        fdt get value bootargs /chosen bootargs
-                        setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@
+                        setenv bootargs $bootargs @@KERNEL_COMMAND_APPEND@@ @@KERNEL_ROOT_RAMDISK@@
                        @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@
                fi
                fdt addr @@DEVICETREE_ADDRESS@@
                fdt get value bootargs /chosen bootargs
-                setenv bootargs $bootargs @@KERNEL_ROOT_SD@@
+                setenv bootargs $bootargs @@KERNEL_COMMAND_APPEND@@ @@KERNEL_ROOT_SD@@
                @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ - @@DEVICETREE_ADDRESS@@
        fi
        if test "${boot_target}" = "xspi0" || test "${boot_target}" = "qspi" || test "${boot_target}" = "qspi0"; then
@@ -93,7 +93,7 @@ do
                sf read @@RAMDISK_IMAGE_ADDRESS@@ @@QSPI_RAMDISK_OFFSET@@ @@QSPI_RAMDISK_SIZE@@
                fdt addr @@DEVICETREE_ADDRESS@@
                fdt get value bootargs /chosen bootargs
-                setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@
+                setenv bootargs $bootargs @@KERNEL_COMMAND_APPEND@@ @@KERNEL_ROOT_RAMDISK@@
                @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@;
                echo "Booting using Separate images failed"
        fi
@@ -108,7 +108,7 @@ do
                nand read @@RAMDISK_IMAGE_ADDRESS@@ @@NAND_RAMDISK_OFFSET@@ @@NAND_RAMDISK_SIZE@@
                fdt addr @@DEVICETREE_ADDRESS@@
                fdt get value bootargs /chosen bootargs
-                setenv bootargs $bootargs @@KERNEL_ROOT_RAMDISK@@
+                setenv bootargs $bootargs @@KERNEL_COMMAND_APPEND@@ @@KERNEL_ROOT_RAMDISK@@
                @@KERNEL_BOOTCMD@@ @@KERNEL_LOAD_ADDRESS@@ @@RAMDISK_IMAGE_ADDRESS@@ @@DEVICETREE_ADDRESS@@;
                echo "Booting using Separate images failed"
        fi
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx.inc
index 10dfbb60..4c7ea934 100644
--- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx.inc
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx.inc
@@ -9,7 +9,7 @@ SYSROOT_DIRS += "/boot"
 BASE_DTS ?= "${@os.path.basename(d.getVar('CONFIG_DTFILE') or '').rstrip('.dtb').rstrip('.dts') or 'system-top'}"
 DTB_PATH ?= "boot/devicetree/"
-DTB_NAME ?= ""
+DTB_FILE_NAME ?= ""
 # This vairable is used for U-boot user specified dts from u-boot repo path
 # u-boot-xlnx/arch/arm/dts/versal-vck190-revA-x-ebm-01-revA.dts.
@@ -17,7 +17,7 @@ DTB_NAME ?= ""
 # Example: UBOOT_USER_SPECIFIED_DTS = "versal-vck190-revA-x-ebm-01-revA"
 UBOOT_USER_SPECIFIED_DTS ?= ""
-EXTRA_OEMAKE += "${@'EXT_DTB=${RECIPE_SYSROOT}/${DTB_PATH}/${DTB_NAME}' if (d.getVar('DTB_NAME') != '' and d.getVar('UBOOT_USER_SPECIFIED_DTS') == '') else '' }"
+EXTRA_OEMAKE += "${@'EXT_DTB=${RECIPE_SYSROOT}/${DTB_PATH}/${DTB_FILE_NAME}' if (d.getVar('DTB_FILE_NAME') != '' and d.getVar('UBOOT_USER_SPECIFIED_DTS') == '') else '' }"
 EXTRA_OEMAKE += "${@'DEVICE_TREE=${UBOOT_USER_SPECIFIED_DTS}' if (d.getVar('UBOOT_USER_SPECIFIED_DTS') != '') else '' }"
 python __anonymous () {
@@ -25,8 +25,8 @@ python __anonymous () {
    providerdtb = d.getVar("PREFERRED_PROVIDER_virtual/dtb")
    if providerdtb:
       d.appendVarFlag('do_configure', 'depends', ' virtual/dtb:do_populate_sysroot')
-       if d.getVar("DTB_NAME") is not None:
+       if d.getVar("DTB_FILE_NAME") is not None:
-           d.setVar('DTB_NAME', d.getVar('BASE_DTS')+ '.dtb')
+           d.setVar('DTB_FILE_NAME', d.getVar('BASE_DTS')+ '.dtb')
 }
 do_configure:prepend () {
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2023.2.bb b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2023.2.bb
new file mode 100644
index 00000000..22075424
--- /dev/null
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx_2023.2.bb
@@ -0,0 +1,4 @@
+require u-boot-xlnx.inc
+require u-boot-spl-zynq-init.inc
+require u-boot-xlnx-2023.2.inc
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb
new file mode 100644
index 00000000..d41743c1
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees_2023.2.bb
@@ -0,0 +1,6 @@
+require qemu-devicetrees.inc
+BRANCH ?= "xlnx_rel_v2023.2"
+SRCREV ?= "d1013382d9a5ef816cd020e7840813b7a2d65c51"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc
new file mode 100644
index 00000000..db6e1528
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2023.2.inc
@@ -0,0 +1,3 @@
+XILINX_QEMU_VERSION = "v7.1.0"
+BRANCH = "xlnx_rel_v2023.2"
+SRCREV = "23b643ba1683a47ef49447a45643fe2172d6f8ca"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2023.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2023.2.bb
new file mode 100644
index 00000000..ccfa9956
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-native_2023.2.bb
@@ -0,0 +1,9 @@
+require qemu-xilinx-2023.2.inc
+require qemu-xilinx-native-7.1.inc
+require qemu-native-alt.inc
+BPN = "qemu-xilinx"
+EXTRA_OECONF:append = " --target-list=${@get_qemu_usermode_target_list(d)} --disable-tools --disable-blobs --disable-guest-agent"
+PACKAGECONFIG ??= "pie"
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2023.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2023.2.bb
new file mode 100644
index 00000000..21208f72
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-system-native_2023.2.bb
@@ -0,0 +1,26 @@
+require qemu-system-native-alt.inc
+require qemu-xilinx-2023.2.inc
+require qemu-xilinx-native-7.1.inc
+PROVIDES = "qemu-system-native"
+EXTRA_OECONF:append = " --target-list=${@get_qemu_system_target_list(d)}"
+PACKAGECONFIG ??= "fdt alsa kvm gcrypt pie slirp"
+PACKAGECONFIG:remove = "${@'kvm' if not os.path.exists('/usr/include/linux/kvm.h') else ''}"
+DEPENDS += "pixman-native qemu-xilinx-native bison-native ninja-native meson-native"
+DEPENDS += "qemu-xilinx-multiarch-helper-native"
+do_install:append() {
+    # The following is also installed by qemu-native
+    rm -f ${D}${datadir}/qemu/trace-events-all
+    rm -rf ${D}${datadir}/qemu/keymaps
+    rm -rf ${D}${datadir}/icons
+    rm -rf ${D}${includedir}/qemu-plugin.h
+    # Install qmp.py to be used with testimage
+    install -d ${D}${libdir}/qemu-python/qmp/
+    install -D ${S}/python/qemu/qmp/* ${D}${libdir}/qemu-python/qmp/
+}
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2023.2.bb b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2023.2.bb
new file mode 100644
index 00000000..e79df9d7
--- /dev/null
+++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx_2023.2.bb
@@ -0,0 +1,26 @@
+require qemu-xilinx-2023.2.inc
+require recipes-devtools/qemu/qemu.inc
+require qemu-xilinx-7.1.inc
+require qemu-alt.inc
+# Links to libmali-xlnx, so it becomes MACHINE_ARCH specific
+DEFAULT_PACKAGE_ARCH := "${PACKAGE_ARCH}"
+MALI_PACKAGE_ARCH[vardepsexclude] = "MACHINE_ARCH"
+MALI_PACKAGE_ARCH = "${@'${MACHINE_ARCH}' if d.getVar('PREFERRED_PROVIDER_virtual/libgles1') == 'libmali-xlnx' else '${DEFAULT_PACKAGE_ARCH}'}"
+PACKAGE_ARCH[vardepsexclude] = "MALI_PACKAGE_ARCH"
+PACKAGE_ARCH:class-target = "${@bb.utils.contains_any('DEPENDS', 'libepoxy virglrenderer', '${MALI_PACKAGE_ARCH}', '${DEFAULT_PACKAGE_ARCH}', d)}"
+BBCLASSEXTEND = "nativesdk"
+RDEPENDS:${PN}:class-target += "bash"
+PROVIDES:class-nativesdk = "nativesdk-qemu"
+RPROVIDES:${PN}:class-nativesdk = "nativesdk-qemu"
+EXTRA_OECONF:append:class-target = " --target-list=${@get_qemu_target_list(d)}"
+EXTRA_OECONF:append:class-nativesdk = " --target-list=${@get_qemu_target_list(d)}"
+EXTRA_OECONF:append:class-target:mipsarcho32 = "${@bb.utils.contains('BBEXTENDCURR', 'multilib', ' --disable-capstone', '', d)}"
+do_install:append:class-nativesdk() {
+    ${@bb.utils.contains('PACKAGECONFIG', 'gtk+', 'make_qemu_wrapper', '', d)}
+}
diff --git a/meta-xilinx-core/recipes-graphics/libgles/libmali-xlnx.bb b/meta-xilinx-core/recipes-graphics/libgles/libmali-xlnx.bb
index 07de26dc..db99c4d7 100644
--- a/meta-xilinx-core/recipes-graphics/libgles/libmali-xlnx.bb
+++ b/meta-xilinx-core/recipes-graphics/libgles/libmali-xlnx.bb
@@ -13,7 +13,7 @@ PROVIDES += "virtual/libgles1 virtual/libgles2 virtual/egl virtual/libgbm"
 FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
 REPO ?= "git://github.com/Xilinx/mali-userspace-binaries.git;protocol=https"
-BRANCH ?= "xlnx_rel_v2023.1"
+BRANCH ?= "xlnx_rel_v2023.2"
 SRCREV ?= "b3a772aad859cdadc8513b11c3e995546c20e75e"
 BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
diff --git a/meta-xilinx-core/recipes-graphics/wayland/weston_%.bbappend b/meta-xilinx-core/recipes-graphics/wayland/weston_%.bbappend
new file mode 100644
index 00000000..ca77f0d3
--- /dev/null
+++ b/meta-xilinx-core/recipes-graphics/wayland/weston_%.bbappend
@@ -0,0 +1,17 @@
+FILESEXTRAPATHS:prepend:zynqmp := "${THISDIR}/files:"
+SRC_URI:append:zynqmp = " file://0001-libweston-Remove-substitute-format-for-ARGB8888.patch"
+# Due to the SRC_URI zynqmp specific change, this needs to be SOC_FAMILY_ARCH specific
+SOC_FAMILY_ARCH ??= "${TUNE_PKGARCH}"
+DEFAULT_PACKAGE_ARCH := "${PACKAGE_ARCH}"
+DEFAULT_PACKAGE_ARCH:zynqmp = "${SOC_FAMILY_ARCH}"
+PACKAGE_ARCH = "${DEFAULT_PACKAGE_ARCH}"
+# Links to libmali-xlnx, so it becomes MACHINE_ARCH specific
+DEFAULT_PACKAGE_ARCH := "${PACKAGE_ARCH}"
+MALI_PACKAGE_ARCH[vardepsexclude] = "MACHINE_ARCH"
+MALI_PACKAGE_ARCH = "${@'${MACHINE_ARCH}' if d.getVar('PREFERRED_PROVIDER_virtual/libgles1') == 'libmali-xlnx' else '${DEFAULT_PACKAGE_ARCH}'}"
+PACKAGE_ARCH[vardepsexclude] = "MALI_PACKAGE_ARCH"
+PACKAGE_ARCH = "${@bb.utils.contains_any('DEPENDS', 'virtual/libgles1 virtual/libgles2 virtual/egl virtual/libgbm', '${MALI_PACKAGE_ARCH}', '${DEFAULT_PACKAGE_ARCH}', d)}"
diff --git a/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg/monitor-hotplug.sh b/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg/monitor-hotplug.sh
index d603082d..bceb5607 100755
--- a/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg/monitor-hotplug.sh
+++ b/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg/monitor-hotplug.sh
@@ -27,12 +27,27 @@ DEVICES=$(find /sys/class/drm/*/status)
 # inspired by /etc/acpd/lid.sh and the function it sources.
-displaynum=`ls /tmp/.X11-unix/* | sed s#/tmp/.X11-unix/X##`
+# Read first X display number from the list.
+displaynum=`ls /tmp/.X11-unix/* | sed s#/tmp/.X11-unix/X## | head -n 1`
+displaynum=${displaynum%% *}
 display=":$displaynum.0"
 export DISPLAY=":$displaynum.0"
 # from https://wiki.archlinux.org/index.php/Acpid#Laptop_Monitor_Power_Off
-export XAUTHORITY=$(ps -C Xorg -f --no-header | sed -n 's/.*-auth //; s/ -[^ ].*//; p')
+# Clear XAUTHORITY by default in case X session is not using display manager.
+unset XAUTHORITY
+# Detect X session command line started for the display $displaynum and extract
+# -auth argument if any.
+ps -eo args | grep -e "Xorg\W*:$displaynum" | grep -e -auth | while read -r line
+do
+        if [[ "${line%% *}" == *Xorg ]]; then
+                export XAUTHORITY=`echo $line | sed -n 's/.*-auth //; s/ -[^ ].*//; p'`
+                break
+        fi
+done
 for i in /sys/class/drm/*/*/status ;
 do
diff --git a/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend b/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend
index 460ff581..7486200d 100644
--- a/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend
+++ b/meta-xilinx-core/recipes-graphics/xorg-xserver/xserver-xorg_%.bbappend
@@ -17,7 +17,7 @@ do_install:append() {
    install -m 0755 ${WORKDIR}/monitor-hotplug.sh ${D}${bindir}
    install -d ${D}${sysconfdir}/udev/rules.d
-    install -m 0644 ${WORKDIR}/99-monitor-hotplug.rules ${D}${sysconfdir}/udev/rules.d/99-monitor-hotplug.rules
+    install -m 0644 ${WORKDIR}/99-monitor-hotplug.rules ${D}${sysconfdir}/udev/rules.d/local.rules
 }
 FILES:${PN} += "${sysconfdir}/udev/rules.d/*"
diff --git a/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2023.2.bb b/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2023.2.bb
new file mode 100644
index 00000000..d1c6bd3d
--- /dev/null
+++ b/meta-xilinx-core/recipes-kernel/dp/kernel-module-dp_2023.2.bb
@@ -0,0 +1,24 @@
+SUMMARY = "Xilinx DisplayPort Linux Kernel module"
+DESCRIPTION = "Out-of-tree DisplayPort(DP) kernel modules provider for aarch64 devices"
+SECTION = "kernel/modules"
+LICENSE = "GPL-2.0-only"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a"
+XLNX_DP_VERSION = "6.1.0"
+PV = "${XLNX_DP_VERSION}+xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+S = "${WORKDIR}/git"
+BRANCH ?= "xlnx_rel_v2023.2"
+REPO   ?= "git://github.com/xilinx/dp-modules.git;protocol=https"
+SRCREV ?= "5b0969ac09f301c33bccc140c8f60e832f5cf222"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+inherit module
+EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+COMPATIBLE_MACHINE:versal = "versal"
diff --git a/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2023.2.bb b/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2023.2.bb
new file mode 100644
index 00000000..bc89f5f3
--- /dev/null
+++ b/meta-xilinx-core/recipes-kernel/hdmi/kernel-module-hdmi_2023.2.bb
@@ -0,0 +1,24 @@
+SUMMARY = "Xilinx HDMI Linux Kernel module"
+DESCRIPTION = "Out-of-tree HDMI kernel modules provider for MPSoC EG/EV devices"
+SECTION = "kernel/modules"
+LICENSE = "GPL-2.0-only"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=b34277fe156508fd5a650609dc36d1fe"
+XLNX_HDMI_VERSION = "6.1"
+PV = "${XLNX_HDMI_VERSION}+xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+S = "${WORKDIR}/git"
+BRANCH ?= "xlnx_rel_v2023.2"
+REPO   ?= "git://github.com/Xilinx/hdmi-modules.git;protocol=https"
+SRCREV = "82209b0021a7b5d7ef71a859eed4bafeb541ed08"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+inherit module
+EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+COMPATIBLE_MACHINE:versal = "versal"
diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb
new file mode 100644
index 00000000..8842cb10
--- /dev/null
+++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2023.2.bb
@@ -0,0 +1,11 @@
+LINUX_VERSION = "6.1.30"
+YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta"
+KBRANCH="xlnx_rebase_v6.1_LTS"
+SRCREV = "a19da02cf5b44420ec6afb1eef348c21d9e8cda2"
+SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f"
+KCONF_AUDIT_LEVEL="0"
+include linux-xlnx.inc
+FILESEXTRAPATHS:prepend := "${THISDIR}/${PN}:"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2023.2.bb
new file mode 100644
index 00000000..e8bd3397
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/kernel-module-vcu_2023.2.bb
@@ -0,0 +1,39 @@
+SUMMARY = "Linux kernel module for Video Code Unit"
+DESCRIPTION = "Out-of-tree VCU decoder, encoder and common kernel modules provider for MPSoC EV devices"
+SECTION = "kernel/modules"
+LICENSE = "GPL-2.0-only"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a"
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+S = "${WORKDIR}/git"
+FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
+BRANCH = "xlnx_rel_v2023.2"
+REPO = "git://github.com/Xilinx/vcu-modules.git;protocol=https"
+SRCREV = "689c8d823b383e2a8a5249be49de627f866cfaf2"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = " \
+    ${REPO};${BRANCHARG} \
+    file://99-vcu-enc-dec.rules \
+    "
+inherit module features_check
+REQUIRED_MACHINE_FEATURES = "vcu"
+EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}"
+RDEPENDS:${PN} = "vcu-firmware"
+KERNEL_MODULE_AUTOLOAD += "dmaproxy"
+do_install:append() {
+    install -d ${D}${sysconfdir}/udev/rules.d
+    install -m 0644 ${WORKDIR}/99-vcu-enc-dec.rules ${D}${sysconfdir}/udev/rules.d/
+}
+FILES:${PN} = "${sysconfdir}/udev/rules.d/*"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2023.2.bb
new file mode 100644
index 00000000..2c77e2b4
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/libomxil-xlnx_2023.2.bb
@@ -0,0 +1,50 @@
+SUMMARY = "OpenMAX Integration layer for VCU"
+DESCRIPTION = "OMX IL Libraries,test applications and headers for VCU"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=ef69c2bb405668101824f0b644631e2e"
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+BRANCH ?= "xlnx_rel_v2023.2"
+REPO   ?= "git://github.com/Xilinx/vcu-omx-il.git;protocol=https"
+SRCREV = "3a04b5adc661a0eced626c1373dbbfe699ae6fe0"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+S  = "${WORKDIR}/git"
+inherit features_check
+REQUIRED_MACHINE_FEATURES = "vcu"
+PACKAGE_ARCH = "${MACHINE_ARCH}"
+DEPENDS = "libvcu-xlnx"
+RDEPENDS:${PN} = "kernel-module-vcu libvcu-xlnx"
+EXTERNAL_INCLUDE="${STAGING_INCDIR}/vcu-ctrl-sw/include"
+EXTRA_OEMAKE = " \
+    CC='${CC}' CXX='${CXX} ${CXXFLAGS}' \
+    EXTERNAL_INCLUDE='${EXTERNAL_INCLUDE}' \
+    "
+do_install() {
+    install -d ${D}${libdir}
+    install -d ${D}${includedir}/vcu-omx-il
+    install -m 0644 ${S}/omx_header/*.h ${D}${includedir}/vcu-omx-il
+    oe_runmake install INSTALL_PATH=${D}${bindir}
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.core ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_decoder ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_encoder ${D}/${libdir}/
+}
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2023.2.bb
new file mode 100644
index 00000000..e6d38a4a
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/libvcu-xlnx_2023.2.bb
@@ -0,0 +1,41 @@
+SUMMARY = "Control Software for VCU"
+DESCRIPTION = "Control software libraries, test applications and headers provider for VCU"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=ef69c2bb405668101824f0b644631e2e"
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+BRANCH ?= "xlnx_rel_v2023.2"
+REPO   ?= "git://github.com/Xilinx/vcu-ctrl-sw.git;protocol=https"
+SRCREV = "84b0856cad7844d69f57ac4d9447c20930875475"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+S  = "${WORKDIR}/git"
+inherit features_check
+REQUIRED_MACHINE_FEATURES = "vcu"
+RDEPENDS:${PN} = "kernel-module-vcu"
+EXTRA_OEMAKE = "CC='${CC}' CXX='${CXX} ${CXXFLAGS}'"
+do_install() {
+    install -d ${D}${libdir}
+    install -d ${D}${includedir}/vcu-ctrl-sw/include
+    oe_runmake install_headers INSTALL_HDR_PATH=${D}${includedir}/vcu-ctrl-sw/include INSTALL_PATH=${D}/${bindir}
+    oe_libinstall -C ${S}/bin/ -so liballegro_decode ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so liballegro_encode ${D}/${libdir}/
+}
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
+# Disable buildpaths QA check warnings.
+INSANE_SKIP:${PN} += "buildpaths"
diff --git a/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2023.2.bb
new file mode 100644
index 00000000..b4cb66df
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vcu/vcu-firmware_2023.2.bb
@@ -0,0 +1,38 @@
+SUMMARY = "Firmware for VCU"
+DESCRIPTION = "Firmware binaries provider for VCU"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=52eb1e8f27e0e189b175c7d75f028cc6"
+XILINX_VCU_VERSION = "1.0.0"
+PV = "${XILINX_VCU_VERSION}-xilinx-v${@bb.parse.vars_from_file(d.getVar('FILE', False),d)[1] or ''}+git${SRCPV}"
+S  = "${WORKDIR}/git"
+BRANCH ?= "xlnx_rel_v2023.2"
+REPO ?= "git://github.com/Xilinx/vcu-firmware.git;protocol=https"
+SRCREV = "f4ab98d26aa3e244a487f518f5a76071137c8402"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI   = "${REPO};${BRANCHARG}"
+inherit features_check
+REQUIRED_MACHINE_FEATURES = "vcu"
+do_install() {
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5d_b.fw ${D}/lib/firmware/al5d_b.fw
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5d.fw ${D}/lib/firmware/al5d.fw
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5e_b.fw ${D}/lib/firmware/al5e_b.fw
+    install -Dm 0644 ${S}/${XILINX_VCU_VERSION}/lib/firmware/al5e.fw ${D}/lib/firmware/al5e.fw
+}
+# Inhibit warnings about files being stripped
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+INHIBIT_PACKAGE_STRIP = "1"
+FILES:${PN} = "/lib/firmware/*"
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
+INSANE_SKIP:${PN} = "ldflags"
diff --git a/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.1.bb b/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.1.bb
index a1396278..9b835490 100644
--- a/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.1.bb
+++ b/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.1.bb
@@ -5,7 +5,8 @@ LICENSE = "GPLv2"
 LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a"
 XILINX_VDU_VERSION = "1.0.0"
-PV = "${XILINX_VDU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}"
+PV =. "${XILINX_VDU_VERSION}-xilinx-v"
+PV .= "+git${SRCPV}"
 S = "${WORKDIR}/git"
 FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
diff --git a/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.2.bb
new file mode 100644
index 00000000..1c9ba8ad
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vdu/kernel-module-vdu_2023.2.bb
@@ -0,0 +1,42 @@
+SUMMARY = "Linux kernel module for Video Decode Unit"
+DESCRIPTION = "Out-of-tree VDU decoder common kernel modules"
+SECTION = "kernel/modules"
+LICENSE = "GPLv2"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=eb723b61539feef013de476e68b5c50a"
+XILINX_VDU_VERSION = "1.0.0"
+PV =. "${XILINX_VDU_VERSION}-xilinx-v"
+PV .= "+git${SRCPV}"
+S = "${WORKDIR}/git"
+FILESEXTRAPATHS:prepend := "${THISDIR}/files:"
+BRANCH ?= "xlnx_rel_v2023.2"
+REPO ?= "git://github.com/Xilinx/vdu-modules.git;protocol=https"
+SRCREV ?= "4d5134f54006f904f0b28f00e05dd3febd5fcfd3"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG} \
+        file://99-vdu-enc-dec.rules \
+"
+inherit module features_check
+REQUIRED_MACHINE_FEATURES = "vdu"
+EXTRA_OEMAKE += "O=${STAGING_KERNEL_BUILDDIR}"
+RDEPENDS:${PN} = "vdu-firmware"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:versal-ai-core = "versal-ai-core"
+COMPATIBLE_MACHINE:versal-ai-edge = "versal-ai-edge"
+PACKAGE_ARCH = "${SOC_FAMILY_ARCH}"
+do_install:append() {
+    install -d ${D}${sysconfdir}/udev/rules.d
+    install -m 0644 ${WORKDIR}/99-vdu-enc-dec.rules ${D}${sysconfdir}/udev/rules.d/
+}
+FILES:${PN} = "${sysconfdir}/udev/rules.d/*"
diff --git a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.1.bb b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.1.bb
index 82f3c4f5..602dc2fc 100644
--- a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.1.bb
+++ b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.1.bb
@@ -4,7 +4,8 @@ LICENSE = "MIT"
 LIC_FILES_CHKSUM = "file://LICENSE.md;md5=aaf483d309243c4596f6373eb9c8325f"
 XILINX_VDU_VERSION = "1.0.0"
-PV = "${XILINX_VDU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}"
+PV =. "${XILINX_VDU_VERSION}-xilinx-v"
+PV .= "+git${SRCPV}"
 inherit autotools features_check
diff --git a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.2.bb
new file mode 100644
index 00000000..2b9af94f
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-ctrlsw_2023.2.bb
@@ -0,0 +1,45 @@
+SUMMARY = "Control Software for VDU"
+DESCRIPTION = "Control software libraries, test applications and headers provider for VDU"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=aaf483d309243c4596f6373eb9c8325f"
+XILINX_VDU_VERSION = "1.0.0"
+PV =. "${XILINX_VDU_VERSION}-xilinx-v"
+PV .= "+git${SRCPV}"
+inherit autotools features_check
+REQUIRED_MACHINE_FEATURES = "vdu"
+BRANCH ?= "xlnx_rel_v2023.2"
+REPO   ?= "git://github.com/Xilinx/vdu-ctrl-sw.git;protocol=https"
+SRCREV ?= "1beb8f247d01b1a728faea36ce8f7847c895482f"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG}"
+S  = "${WORKDIR}/git"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:versal-ai-core = "versal-ai-core"
+COMPATIBLE_MACHINE:versal-ai-edge = "versal-ai-edge"
+PACKAGE_ARCH = "${SOC_FAMILY_ARCH}"
+RDEPENDS:${PN} = "kernel-module-vdu"
+do_compile[dirs] = "${S}"
+do_install[dirs] = "${S}"
+EXTRA_OEMAKE = "CC='${CC}' CXX='${CXX} ${CXXFLAGS}'"
+EXTRA_OEMAKE +=" INSTALL_HDR_PATH=${D}${includedir}/vdu-ctrl-sw/include INSTALL_PATH=${D}${bindir}"
+do_install:append() {
+    oe_libinstall -C ${S}/bin/ -so liballegro_decode ${D}/${libdir}/
+}
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
diff --git a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.1.bb b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.1.bb
index 88b50193..b4fc482e 100644
--- a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.1.bb
+++ b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.1.bb
@@ -4,7 +4,8 @@ LICENSE = "MIT"
 LIC_FILES_CHKSUM = "file://LICENSE.md;md5=aaf483d309243c4596f6373eb9c8325f"
 XILINX_VDU_VERSION = "1.0.0"
-PV = "${XILINX_VDU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}"
+PV =. "${XILINX_VDU_VERSION}-xilinx-v"
+PV .= "+git${SRCPV}"
 BRANCH ?= "xlnx_rel_v2023.1"
 REPO   ?= "git://github.com/Xilinx/vdu-omx-il.git;protocol=https"
diff --git a/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.2.bb
new file mode 100644
index 00000000..f6f159d2
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vdu/libvdu-omxil_2023.2.bb
@@ -0,0 +1,54 @@
+SUMMARY = "OpenMAX Integration layer for VDU"
+DESCRIPTION = "OMX IL Libraries,test application and headers for VDU"
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=aaf483d309243c4596f6373eb9c8325f"
+XILINX_VDU_VERSION = "1.0.0"
+PV =. "${XILINX_VDU_VERSION}-xilinx-v"
+PV .= "+git${SRCPV}"
+BRANCH ?= "xlnx_rel_v2023.2"
+REPO   ?= "git://github.com/Xilinx/vdu-omx-il.git;protocol=https"
+SRCREV ?= "811eefac953fd5e098c69cada97a0dd35f5e9015"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI = "${REPO};${BRANCHARG} \
+          "
+S  = "${WORKDIR}/git"
+inherit autotools features_check
+REQUIRED_MACHINE_FEATURES = "vdu"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:versal-ai-core = "versal-ai-core"
+COMPATIBLE_MACHINE:versal-ai-edge = "versal-ai-edge"
+PACKAGE_ARCH = "${SOC_FAMILY_ARCH}"
+DEPENDS = "libvdu-ctrlsw"
+RDEPENDS:${PN} = "kernel-module-vdu libvdu-ctrlsw"
+EXTERNAL_INCLUDE="${STAGING_INCDIR}/vdu-ctrl-sw/include"
+do_compile[dirs] = "${S}"
+do_install[dirs] = "${S}"
+EXTRA_OEMAKE = " \
+    CC='${CC}' CXX='${CXX} ${CXXFLAGS}' \
+    EXTERNAL_INCLUDE='${EXTERNAL_INCLUDE}' \
+    INSTALL_PATH=${D}${bindir} \
+    INCLUDE_INST_PATH=${D}${includedir} \
+    "
+do_install:append() {
+    install -d ${D}${libdir}
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.core ${D}/${libdir}/
+    oe_libinstall -C ${S}/bin/ -so libOMX.allegro.video_decoder ${D}/${libdir}/
+}
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
diff --git a/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.1.bb b/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.1.bb
index e96e0d24..8cc2cce1 100755
--- a/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.1.bb
+++ b/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.1.bb
@@ -4,7 +4,8 @@ LICENSE = "Proprietary"
 LIC_FILES_CHKSUM = "file://LICENSE.md;md5=c5784f63397086d836580d8785d1deb9"
 XILINX_VDU_VERSION = "1.0.0"
-PV = "${XILINX_VDU_VERSION}-xilinx-${XILINX_RELEASE_VERSION}+git${SRCPV}"
+PV =. "${XILINX_VDU_VERSION}-xilinx-v"
+PV .= "+git${SRCPV}"
 S  = "${WORKDIR}/git"
diff --git a/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb b/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb
new file mode 100644
index 00000000..e9ef222b
--- /dev/null
+++ b/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.2.bb
@@ -0,0 +1,43 @@
+SUMMARY = "Firmware for VDU"
+DESCRIPTION = "Firmware binaries provider for VDU"
+LICENSE = "Proprietary"
+LIC_FILES_CHKSUM = "file://LICENSE.md;md5=c5784f63397086d836580d8785d1deb9"
+XILINX_VDU_VERSION = "1.0.0"
+PV =. "${XILINX_VDU_VERSION}-xilinx-v"
+PV .= "+git${SRCPV}"
+S  = "${WORKDIR}/git"
+inherit autotools features_check
+REQUIRED_MACHINE_FEATURES = "vdu"
+BRANCH ?= "xlnx_rel_v2023.2"
+REPO ?= "git://github.com/Xilinx/vdu-firmware.git;protocol=https"
+SRCREV ?= "731897772730178f6a4e77eedeb4fb53faa1ab4d"
+BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
+SRC_URI   = "${REPO};${BRANCHARG}"
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:versal-ai-core = "versal-ai-core"
+COMPATIBLE_MACHINE:versal-ai-edge = "versal-ai-edge"
+PACKAGE_ARCH = "${SOC_FAMILY_ARCH}"
+EXTRA_OEMAKE +="INSTALL_PATH=${D}/lib/firmware"
+do_compile[noexec] = "1"
+do_install[dirs] = "${S}"
+# Inhibit warnings about files being stripped
+INHIBIT_PACKAGE_DEBUG_SPLIT = "1"
+INHIBIT_PACKAGE_STRIP = "1"
+FILES:${PN} = "/lib/firmware/*"
+# These libraries shouldn't get installed in world builds unless something
+# explicitly depends upon them.
+EXCLUDE_FROM_WORLD = "1"
+INSANE_SKIP:${PN} = "ldflags"
diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc
index 3b150673..14b2b968 100644
--- a/meta-xilinx-core/recipes-xrt/xrt/xrt.inc
+++ b/meta-xilinx-core/recipes-xrt/xrt/xrt.inc
@@ -1,8 +1,14 @@
 REPO ?= "git://github.com/Xilinx/XRT.git;protocol=https"
 BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '']}"
-SRC_URI = "${REPO};${BRANCHARG}"
+SRC_URI = "${REPO};${BRANCHARG};name=xrt"
-BRANCH= "2023.1"
+BRANCH= "2023.2"
-SRCREV= "64c933573e7e50a8aba939a74209590c2b739e8b"
+SRCREV_xrt = "2865a62b6a417dea523d2d5646154aa94a2cbc28"
-PV = "202310.2.15.0"
+PV = "202320.2.16.0"
+SRC_URI += "git://github.com/Xilinx/dma_ip_drivers.git;branch=master;name=dma_ip_drivers;destsuffix=git/src/runtime_src/core/pcie/driver/linux/xocl/lib/libqdma;protocol=https"
+SRCREV_dma_ip_drivers = "9f02769a2eddde008158c96efa39d7edb6512578"
+SRC_URI += "git://github.com/serge1/ELFIO.git;branch=main;name=ELFIO;destsuffix=git/src/runtime_src/core/common/elf;protocol=https"
+SRCREV_ELFIO = "a04810f12625207cce72665d783babb80f0175a8"
+SRCREV_FORMAT = "xrt"
diff --git a/meta-xilinx-core/recipes-xrt/xrt/xrt_git.bb b/meta-xilinx-core/recipes-xrt/xrt/xrt_git.bb
index 1124948f..f4e7b5de 100644
--- a/meta-xilinx-core/recipes-xrt/xrt/xrt_git.bb
+++ b/meta-xilinx-core/recipes-xrt/xrt/xrt_git.bb
@@ -3,14 +3,13 @@ DESCRIPTION = "Xilinx Runtime User Space Libraries and headers"
 require xrt.inc
-SRC_URI += "file://xrt-cstdint.patch;striplevel=2"
+LICENSE = "GPL-2.0-or-later & Apache-2.0 & MIT"
+LIC_FILES_CHKSUM = "file://../LICENSE;md5=de2c993ac479f02575bcbfb14ef9b485 \
-LICENSE = "GPL-2.0-or-later & Apache-2.0"
-LIC_FILES_CHKSUM = "file://../LICENSE;md5=da5408f748bce8a9851dac18e66f4bcf \
                    file://runtime_src/core/edge/drm/zocl/LICENSE;md5=7d040f51aae6ac6208de74e88a3795f8 \
                    file://runtime_src/core/pcie/driver/linux/xocl/LICENSE;md5=b234ee4d69f5fce4486a80fdaf4a4263 \
                    file://runtime_src/core/pcie/linux/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 \
-                    file://runtime_src/core/tools/xbutil2/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 "
+                    file://runtime_src/core/tools/xbutil2/LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57 \
+                    file://runtime_src/core/common/elf/LICENSE.txt;md5=b996e8b74af169e7e72e22d9e7d05b06 "
 COMPATIBLE_MACHINE ?= "^$"
 COMPATIBLE_MACHINE:zynqmp = ".*"
diff --git a/meta-xilinx-standalone-experimental/README.md b/meta-xilinx-standalone-experimental/README.md
index 8014265b..31aa0f63 100644
--- a/meta-xilinx-standalone-experimental/README.md
+++ b/meta-xilinx-standalone-experimental/README.md
@@ -34,7 +34,7 @@ $ bitbake meta-xilinx-setup
 ```
 3. Install the setup SDK:
 ```
-$ .${TMPDIR}/tmp/deploy/sdk/x86_64-xilinx-nativesdk-prestep-2023.1....sh -d prestep -y
+$ .${TMPDIR}/tmp/deploy/sdk/x86_64-xilinx-nativesdk-prestep-2023.2....sh -d prestep -y
 ```
 Then follow the instructions in the 'prestep/README-setup' file.
diff --git a/meta-xilinx-standalone-experimental/conf/dtb-embeddedsw.inc b/meta-xilinx-standalone-experimental/conf/dtb-embeddedsw.inc
index b252e609..a9192f62 100644
--- a/meta-xilinx-standalone-experimental/conf/dtb-embeddedsw.inc
+++ b/meta-xilinx-standalone-experimental/conf/dtb-embeddedsw.inc
@@ -2,13 +2,10 @@
 # meta-xilinx/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
 # Make it clear decoupling is 'experimental' in the version
-ESW_VER = "2023.1_sdt_experimental"
+ESW_VER = "2023_sdt_experimental"
 REPO = "git://github.com/Xilinx/embeddedsw-experimental-dt-support.git;protocol=https"
-ESW_BRANCH[2023.1_sdt_experimental] = "xlnx_rel_v2023.1_sdt"
+ESW_BRANCH[2023_sdt_experimental] = "xlnx_rel_v2023.2_sdt"
-ESW_REV[2023.1_sdt_experimental] = "b47bfef27d7af0690add590b9c98e6fc51a1a1f6"
+ESW_REV[2023_sdt_experimental] = "742a608800e7621fb7c376daf5124333b5826d6d"
-LIC_FILES_CHKSUM[master] = '7c92de7a21a6613265035c28f4a92f48'
+LIC_FILES_CHKSUM[xlnx_rel_v2023.2_sdt] = 'ce611484168a6000bd35df68fc4f4290'
-LIC_FILES_CHKSUM[xlnx_rel_v2022.1_sdt_experimental_beta] = 'e26f53a7d6f58f4b1a9687099417225c'
-LIC_FILES_CHKSUM[xlnx_rel_v2023.1_sdt_experimental] = 'ce611484168a6000bd35df68fc4f4290'
-LIC_FILES_CHKSUM[xlnx_rel_v2023.1_sdt] = 'ce611484168a6000bd35df68fc4f4290'
diff --git a/meta-xilinx-standalone-experimental/recipes-core/meta/files/dt-processor.sh b/meta-xilinx-standalone-experimental/recipes-core/meta/files/dt-processor.sh
index 939fabe4..1c754689 100755
--- a/meta-xilinx-standalone-experimental/recipes-core/meta/files/dt-processor.sh
+++ b/meta-xilinx-standalone-experimental/recipes-core/meta/files/dt-processor.sh
@@ -1,6 +1,7 @@
 #! /bin/bash
-# Copyright (c) 2021 Xilinx Inc
+# Copyright (c) 2021-2022 Xilinx Inc
+# Copyright (C) 2022-2023 Advanced Micro Devices, Inc. All rights reserved.
 #
 # Permission is hereby granted, free of charge, to any person obtaining a copy
 # of this software and associated documentation files (the "Software"), to deal
@@ -39,10 +40,13 @@ $0
    [-o <overlay_dts>]      Generate overlay dts
    [-e <external_fpga>]    Apply a partial overlay
    [-m <machine_conf>]     The name of the machine .conf to generate
+    [-D <dts_path>]         Absolute path or subdirectory of conf/dts to place DTS files in (usually auto detected from DTS)
    [-t <machine>]          Machine type: zynqmp or versal (usually auto detected)
    [-v <soc_variant>]      SOC Variant: cg, dr, eg, ev, ai-prime, premium (usually auto detected)
+    [-r <require_machine>]  This machine will be required, instead of the generic machine if defined
+    [-O <overrides>]        Optional, can add additional overrides to the generated machine
    [-p <psu_init_path>]    Path to psu_init files, defaults to system_dts path
-    [-i <pdu_path>]         Path to the pdi file
+    [-i <pdi_path>]         Path to the pdi file
    [-l <config_file>]      write local.conf changes to this file
    [-P <petalinux_schema>] Path to petalinux schema file
@@ -54,7 +58,7 @@ parse_args() {
  [ $# -eq 0 ] && usage
  [ $1 = "--help" ] && usage
-  while getopts ":c:s:d:o:e:m:l:hP:p:i:t:v:" opt; do
+  while getopts ":c:s:d:o:e:m:D:l:hP:p:i:t:v:r:O:" opt; do
    case ${opt} in
      c) config_dir=$OPTARG ;;
      s) system_dts=$OPTARG ;;
@@ -62,8 +66,11 @@ parse_args() {
      d) domain_file=$OPTARG ;;
      e) external_fpga=$OPTARG ;;
      m) mach_conf=$OPTARG ; mach_conf=${mach_conf%%.conf} ;;
+      D) dts_path=$OPTARG ;;
      t) machine=$OPTARG ;;
      v) soc_variant=$OPTARG ;;
+      r) incmachine=$OPTARG ;;
+      O) overrides=$OPTARG ;;
      p) psu_init_path=$OPTARG ;;
      i) pdi_path=$OPTARG ;;
      l) localconf=$OPTARG ;;
@@ -133,11 +140,15 @@ detect_machine() {
           soc_variant="hbm" ;;
         # Special Case Starter Kit SOMs
         xck26)
-           incmachine="k26-smk.conf"
+           if [ -z "${incmachine}" ]; then
+             incmachine="k26-smk.conf"
+           fi
           machine="zynqmp"
           soc_variant="ev" ;;
         xck24)
-           incmachine="k24-smk.conf"
+           if [ -z "${incmachine}" ]; then
+             incmachine="k24-smk.conf"
+           fi
           machine="zynqmp"
           soc_variant="eg" ;;
      esac
@@ -199,7 +210,7 @@ cortex_a53_linux() {
  # Check if it is overlay dts otherwise just create linux dts
  (
-    cd dts || error "Unable to cd to dts dir"
+    cd ${dts_path} || error "Unable to cd to ${dts_path} dir"
    if [ "${overlay_dts}" = "true" ]; then
      if [ "${external_fpga}" = "true" ]; then
        LOPPER_DTC_FLAGS="-b 0 -@" ${lopper} -f "${system_dts}" -- xlnx_overlay_dt ${machine} full \
@@ -232,7 +243,7 @@ cortex_a53_linux() {
  ## Generate a multiconfig
  cat <<EOF >"${conf_file}"
-CONFIG_DTFILE = "\${TOPDIR}/conf/dts/${dts_file}"
+CONFIG_DTFILE = "${dts_file_path}/${dts_file}"
 TMPDIR = "\${BASE_TMPDIR}/tmp-${mc_name}"
 EOF
@@ -268,7 +279,7 @@ cortex_a53_baremetal() {
  # Build device tree
  (
-    cd dts || error "Unable to cd to dts dir"
+    cd ${dts_path} || error "Unable to cd to ${dts_path} dir"
    if [ -n "${domain_file}" ]; then
      LOPPER_DTC_FLAGS="-b 0 -@" ${lopper} -f --enhanced -x '*.yaml' \
        -i "${domain_file}" -i "${lops_dir}/lop-a53-imux.dts" "${system_dts}" "${dts_file}" \
@@ -309,7 +320,7 @@ EOF
    cat /dev/null >"${conf_file}"
  fi
  cat <<EOF >>"${conf_file}"
-CONFIG_DTFILE = "\${TOPDIR}/conf/dts/${dts_file}"
+CONFIG_DTFILE = "${dts_file_path}/${dts_file}"
 ESW_MACHINE = "$3"
 DEFAULTTUNE = "cortexa53"
@@ -335,7 +346,7 @@ cortex_a53_freertos() {
  # Build device tree
  (
-    cd dts || error "Unable to cd to dts dir"
+    cd ${dts_path} || error "Unable to cd to ${dts_path} dir"
    if [ -n "${domain_file}" ]; then
      LOPPER_DTC_FLAGS="-b 0 -@" ${lopper} -f  --enhanced -x '*.yaml' \
        -i "${domain_file}" -i "${lops_dir}/lop-a53-imux.dts" "${system_dts}" "${dts_file}" \
@@ -361,7 +372,7 @@ cortex_a53_freertos() {
  sed -i ${features} -e "s,DISTRO_FEATURES,MACHINE_FEATURES,"
  cat <<EOF >"${conf_file}"
-CONFIG_DTFILE = "\${TOPDIR}/conf/dts/${dts_file}"
+CONFIG_DTFILE = "${dts_file_path}/${dts_file}"
 ESW_MACHINE = "$3"
 DEFAULTTUNE = "cortexa53"
@@ -396,10 +407,10 @@ cortex_a72_linux() {
  fi
  (
-    cd dts || error "Unable to cd to dts dir"
+    cd ${dts_path} || error "Unable to cd to ${dts_path} dir"
    # Check if it is overlay dts otherwise just create linux dts
    if [ "${overlay_dts}" = "true" ]; then
-      # As there is no partial support on Versal, As per fpga manager implementatin there is
+      # As there is no partial support on Versal, As per fpga manager implementation there is
      # a flag "external_fpga" which says apply overlay without loading the bit file.
      if [ "${external_fpga}" = "true" ]; then
        LOPPER_DTC_FLAGS="-b 0 -@" ${lopper} -f "${system_dts}" -- xlnx_overlay_dt \
@@ -432,7 +443,7 @@ cortex_a72_linux() {
  ## Generate a multiconfig
  cat <<EOF >"${conf_file}"
-CONFIG_DTFILE = "\${TOPDIR}/conf/dts/${dts_file}"
+CONFIG_DTFILE = "${dts_file_path}/${dts_file}"
 TMPDIR = "\${BASE_TMPDIR}/tmp-${mc_name}"
 EOF
@@ -453,7 +464,7 @@ cortex_a72_baremetal() {
  # Build device tree
  (
-    cd dts || error "Unable to cd to dts dir"
+    cd ${dts_path} || error "Unable to cd to ${dts_path} dir"
    if [ -n "${domain_file}" ]; then
      LOPPER_DTC_FLAGS="-b 0 -@" ${lopper} -f   --enhanced -x '*.yaml' \
        -i "${domain_file}" -i "${lops_dir}/lop-a72-imux.dts" "${system_dts}" "${dts_file}" \
@@ -479,7 +490,7 @@ cortex_a72_baremetal() {
  sed -i ${features} -e "s,DISTRO_FEATURES,MACHINE_FEATURES,"
  cat <<EOF >"${conf_file}"
-CONFIG_DTFILE = "\${TOPDIR}/conf/dts/${dts_file}"
+CONFIG_DTFILE = "${dts_file_path}/${dts_file}"
 ESW_MACHINE = "$3"
 DEFAULTTUNE = "cortexa72"
@@ -505,7 +516,7 @@ cortex_a72_freertos() {
  # Build device tree
  (
-    cd dts || error "Unable to cd to dts dir"
+    cd ${dts_path} || error "Unable to cd to ${dts_path} dir"
    if [ -n "${domain_file}" ]; then
      LOPPER_DTC_FLAGS="-b 0 -@" lopper -f --enhanced -x '*.yaml' \
        -i "${domain_file}" -i "${lops_dir}/lop-a72-imux.dts" "${system_dts}" "${dts_file}" \
@@ -531,7 +542,7 @@ cortex_a72_freertos() {
  sed -i ${features} -e "s,DISTRO_FEATURES,MACHINE_FEATURES,"
  cat <<EOF >"${conf_file}"
-CONFIG_DTFILE = "\${TOPDIR}/conf/dts/${dts_file}"
+CONFIG_DTFILE = "${dts_file_path}/${dts_file}"
 ESW_MACHINE = "$3"
 DEFAULTTUNE = "cortexa72"
@@ -572,7 +583,7 @@ cortex_r5_baremetal() {
  # Build device tree
  (
-    cd dts || error "Unable to cd to dts dir"
+    cd ${dts_path} || error "Unable to cd to ${dts_path} dir"
    if [ -n "$domain_file" ]; then
      LOPPER_DTC_FLAGS="-b 0 -@" ${lopper} -f --enhanced -x '*.yaml' \
        -i "${domain_file}" -i "${lops_dir}/lop-r5-imux.dts" "${system_dts}" "${dts_file}" \
@@ -612,7 +623,7 @@ EOF
    cat /dev/null >"${conf_file}"
  fi
  cat <<EOF >>"${conf_file}"
-CONFIG_DTFILE = "\${TOPDIR}/conf/dts/${dts_file}"
+CONFIG_DTFILE = "${dts_file_path}/${dts_file}"
 ESW_MACHINE = "$3"
 DEFAULTTUNE = "cortexr5"
@@ -638,7 +649,7 @@ cortex_r5_freertos() {
  # Build device tree
  (
-    cd dts || error "Unable to cd to dts dir"
+    cd ${dts_path} || error "Unable to cd to ${dts_path} dir"
    if [ -n "$domain_file" ]; then
      LOPPER_DTC_FLAGS="-b 0 -@" ${lopper} -f --enhanced -x '*.yaml' \
        -i "${domain_file}" -i "${lops_dir}/lop-r5-imux.dts" "${system_dts}" "${dts_file}" \
@@ -664,7 +675,7 @@ cortex_r5_freertos() {
  sed -i ${features} -e "s,DISTRO_FEATURES,MACHINE_FEATURES,"
  cat <<EOF >"${conf_file}"
-CONFIG_DTFILE = "\${TOPDIR}/conf/dts/${dts_file}"
+CONFIG_DTFILE = "${dts_file_path}/${dts_file}"
 ESW_MACHINE = "$3"
 DEFAULTTUNE = "cortexr5"
@@ -684,7 +695,7 @@ process_microblaze() {
  mkdir -p machine/include/${mach_conf}
  (
-    cd dts || error "Unable to cd to dts dir"
+    cd ${dts_path} || error "Unable to cd to ${dts_path} dir"
    LOPPER_DTC_FLAGS="-b 0 -@" ${lopper} -f --enhanced -i "${lops_dir}/lop-microblaze-yocto.dts" "${system_dts}" \
      || error "lopper failed"
    rm -f lop-microblaze-yocto.dts.dtb
@@ -714,7 +725,7 @@ pmu-microblaze() {
  # Build device tree
  (
-    cd dts || error "Unable to cd to dts dir"
+    cd ${dts_path} || error "Unable to cd to ${dts_path} dir"
    LOPPER_DTC_FLAGS="-b 0 -@" ${lopper} -f "${system_dts}" "${dts_file}" || error "lopper failed"
  )
@@ -732,7 +743,7 @@ pmu-microblaze() {
  sed -i ${features} -e "s,DISTRO_FEATURES,MACHINE_FEATURES,"
  cat <<EOF >"${conf_file}"
-CONFIG_DTFILE = "\${TOPDIR}/conf/dts/${dts_file}"
+CONFIG_DTFILE = "${dts_file_path}/${dts_file}"
 ESW_MACHINE = "$1"
@@ -765,7 +776,7 @@ pmc-microblaze() {
  # Build device tree
  (
-    cd dts || error "Unable to cd to dts dir"
+    cd ${dts_path} || error "Unable to cd to ${dts_path} dir"
    LOPPER_DTC_FLAGS="-b 0 -@" ${lopper} -f "${system_dts}" "${dts_file}" || error "lopper failed"
  )
@@ -783,7 +794,7 @@ pmc-microblaze() {
  sed -i ${features} -e "s,DISTRO_FEATURES,MACHINE_FEATURES,"
  cat <<EOF >"${conf_file}"
-CONFIG_DTFILE = "\${TOPDIR}/conf/dts/${dts_file}"
+CONFIG_DTFILE = "${dts_file_path}/${dts_file}"
 ESW_MACHINE = "$1"
@@ -816,7 +827,7 @@ psm-microblaze() {
  # Build device tree
  (
-    cd dts || error "Unable to cd to dts dir"
+    cd ${dts_path} || error "Unable to cd to ${dts_path} dir"
    LOPPER_DTC_FLAGS="-b 0 -@" ${lopper} -f "${system_dts}" "${dts_file}" || error "lopper failed"
  )
@@ -834,7 +845,7 @@ psm-microblaze() {
  sed -i ${features} -e "s,DISTRO_FEATURES,MACHINE_FEATURES,"
  cat <<EOF >"${conf_file}"
-CONFIG_DTFILE = "\${TOPDIR}/conf/dts/${dts_file}"
+CONFIG_DTFILE = "${dts_file_path}/${dts_file}"
 ESW_MACHINE = "$1"
@@ -874,6 +885,13 @@ MACHINEOVERRIDES =. "\${@['', '${mach_conf}:']['${mach_conf}' != '\${MACHINE}']}
 EOF
+  if [ -n "${overrides}" ]; then
+    cat <<EOF >>"${conf_file}"
+MACHINEOVERRIDES .= ":${overrides}"
+EOF
+  fi
  if [ "${machine}" == "zynqmp" ]; then
    cat <<EOF >>"${conf_file}"
 TUNEFILE[microblaze-pmu] = "conf/machine/include/${mach_conf}/microblaze.inc"
@@ -890,7 +908,7 @@ EOF
  cat <<EOF >>"${conf_file}"
 # Set the default (linux) domain device tree
-CONFIG_DTFILE ?= "\${TOPDIR}/conf/dts/${system_conf}"
+CONFIG_DTFILE ?= "${dts_file_path}/${system_conf}"
 CONFIG_DTFILE[vardepsexclude] += "TOPDIR"
 require conf/machine/${incmachine}
@@ -969,10 +987,10 @@ EOF
  cat <<EOF >>"${conf_file}"
 # Enable the correct version of the firmware components
-PREFERRED_VERSION_fsbl-firmware = "2023.1_sdt_experimental%"
+PREFERRED_VERSION_fsbl-firmware = "2023_sdt_experimental%"
-PREFERRED_VERSION_pmu-firmware = "2023.1_sdt_experimental%"
+PREFERRED_VERSION_pmu-firmware = "2023_sdt_experimental%"
-PREFERRED_VERSION_plm-firmware = "2023.1_sdt_experimental%"
+PREFERRED_VERSION_plm-firmware = "2023_sdt_experimental%"
-PREFERRED_VERSION_psm-firmware = "2023.1_sdt_experimental%"
+PREFERRED_VERSION_psm-firmware = "2023_sdt_experimental%"
 # Exclude BASE_TMPDIR from hash calculations
 BB_HASHEXCLUDE_COMMON:append = " BASE_TMPDIR"
@@ -1125,9 +1143,9 @@ BASE_TMPDIR ?= "\${TOPDIR}"
 # The following is the full set of multiconfigs for this configuration
 # A large list can cause a slow parse.
-BBMULTICONFIG ?= "${multiconf}"
+#BBMULTICONFIG ?= "${multiconf}"
 # Alternatively trim the list to the minimum
-#BBMULTICONFIG = "${multiconf_min}"
+BBMULTICONFIG = "${multiconf_min}"
 EOF
 }
@@ -1171,6 +1189,22 @@ if [ -z "${mach_conf}" ]; then
    mach_conf=${local_mach_conf}
 fi
+if [ -z "${dts_path}"]; then
+    dts_path=${local_mach_conf}
+fi
+# Is it relative?  If so, relative to conf/dts
+if [ "${dts_path##/}" = "${dts_path}" ]; then
+    dts_path="dts/${dts_path}"
+else
+    dts_path=$(realpath ${dts_path})
+fi
+# Convert the DTS_PATH into something we can put in a config file
+if [ "${dts_path##/}" = "${dts_path}" ]; then
+    dts_file_path="\${TOPDIR}/conf/${dts_path}"
+else
+    dts_file_path="${dts_path}"
+fi
 # Generate CPU list
 (
  cd dts || error "Unable to cd to dts dir"
@@ -1182,6 +1216,7 @@ fi
 detect_machine
 # Now that we know the machine name, we can create the directory
 mkdir -p machine/include/${mach_conf}
+mkdir -p ${dts_path}
 echo "System Configuration:"
 echo "MODEL       = \"${model}\""
diff --git a/meta-xilinx-standalone-experimental/recipes-drivers/dmaps_git.bb b/meta-xilinx-standalone-experimental/recipes-drivers/dmaps_git.bb
index 0891fb86..1dcd8404 100644
--- a/meta-xilinx-standalone-experimental/recipes-drivers/dmaps_git.bb
+++ b/meta-xilinx-standalone-experimental/recipes-drivers/dmaps_git.bb
@@ -1,3 +1,18 @@
-inherit esw_examples
+inherit features_check
-ESW_COMPONENT_SRC = "/XilinxProcessorIPLib/drivers/dmaps/examples/"
+REQUIRED_MACHINE_FEATURES = "dmaps"
+inherit esw python3native
+DEPENDS += "xilstandalone "
+ESW_COMPONENT_SRC = "/XilinxProcessorIPLib/drivers/dmaps/src/"
+ESW_COMPONENT_NAME = "libdmaps.a"
+addtask do_generate_driver_data before do_configure after do_prepare_recipe_sysroot
+do_prepare_recipe_sysroot[rdeptask] = "do_unpack"
+do_configure:prepend() {
+    LOPPER_DTC_FLAGS="-b 0 -@" lopper ${DTS_FILE} -- baremetal_xparameters_xlnx.py ${ESW_MACHINE} ${S}
+    install -m 0755 xparameters.h ${S}/${ESW_COMPONENT_SRC}/
+}
diff --git a/meta-xilinx-standalone-experimental/recipes-libraries/xilffs_git.bb b/meta-xilinx-standalone-experimental/recipes-libraries/xilffs_git.bb
index 298e3033..b8dc3b33 100644
--- a/meta-xilinx-standalone-experimental/recipes-libraries/xilffs_git.bb
+++ b/meta-xilinx-standalone-experimental/recipes-libraries/xilffs_git.bb
@@ -1,4 +1,4 @@
-inherit esw features_check
+inherit esw
 ESW_COMPONENT_SRC = "/lib/sw_services/xilffs/src/"
 ESW_COMPONENT_NAME = "libxilffs.a"
diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
index 51c8bdde..15b91fdb 100644
--- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
+++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
@@ -6,11 +6,13 @@ REPO ??= "git://github.com/Xilinx/embeddedsw.git;protocol=https"
 ESW_BRANCH[2022.1] = "xlnx_rel_v2022.1_update"
 ESW_BRANCH[2022.2] = "xlnx_rel_v2022.2"
 ESW_BRANCH[2023.1] = "xlnx_rel_v2023.1_update"
+ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2"
 BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}"
 ESW_REV[2022.1] = "56d94a506fd9f80949f4cff08e13015928603f01"
 ESW_REV[2022.2] = "5330a64c8efd14f0eef09befdbb8d3d738c33ec2"
 ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a"
+ESW_REV[2023.2] = "c9a0ee31b2a14cbcfcb56ca369037319b4ad4847"
 SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'invalid'}"
 EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}"
@@ -20,6 +22,7 @@ LICENSE = "MIT"
 LIC_FILES_CHKSUM[xlnx_rel_v2022.1_update] = 'e62cb7a722c4430999e0a55a7234035d'
 LIC_FILES_CHKSUM[xlnx_rel_v2022.2]  = 'ce611484168a6000bd35df68fc4f4290'
 LIC_FILES_CHKSUM[xlnx_rel_v2023.1_update] = '3c310a3ee2197a4c92c6a0e2937c207c'
+LIC_FILES_CHKSUM[xlnx_rel_v2023.2] = '9fceecdbcad88698f265578f3d4cb26c'
 LIC_FILES_CHKSUM ??= "file://license.txt;md5=${@d.getVarFlag('LIC_FILES_CHKSUM', d.getVar('BRANCH')) or '0'}"
 SRC_URI = "${EMBEDDEDSW_SRCURI}"
diff --git a/meta-xilinx-standalone/conf/distro/xilinx-standalone.inc b/meta-xilinx-standalone/conf/distro/xilinx-standalone.inc
index 4b51dd1b..814cb9cd 100644
--- a/meta-xilinx-standalone/conf/distro/xilinx-standalone.inc
+++ b/meta-xilinx-standalone/conf/distro/xilinx-standalone.inc
@@ -39,13 +39,11 @@ TOOLCHAIN_HOST_TASK:append:sdkmingw32 = " nativesdk-mingw-w64-winpthreads"
 # do so.
 DISABLE_STATIC:class-target ?= ""
-SECURITY_CFLAGS:class-target ?= ""
-SECURITY_LDFLAGS:class-target ?= ""
 require conf/distro/include/no-static-libs.inc
 require conf/distro/include/yocto-uninative.inc
-require conf/distro/include/security_flags.inc
 INHERIT += "uninative"
 BB_SIGNATURE_HANDLER ?= "OEEquivHash"
 BB_HASHSERVE ??= "auto"
+MACHINE_FEATURES_BACKFILL_CONSIDERED += "rtc qemu-usermode"
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2023.2.bb
new file mode 100644
index 00000000..8816dc4d
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/fsbl-firmware_2023.2.bb
@@ -0,0 +1,11 @@
+require fsbl-firmware.inc
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/2023.1:${FILE_DIRNAME}/embeddedsw"
+SRC_URI += " \
+            file://makefile-skip-copy_bsp.sh.patch \
+            file://fsbl-fixups.patch \
+           "
+# This version does not build for zynq
+COMPATIBLE_MACHINE:zynq = "none"
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2023.2.bb
new file mode 100644
index 00000000..37861b75
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/plm-firmware_2023.2.bb
@@ -0,0 +1,29 @@
+require plm-firmware.inc
+# Separate build directories for versal and versal-net
+SOC_DIR = "versal"
+SOC_DIR:versal-net = "versal_net"
+B = "${S}/lib/sw_apps/versal_plm/src/${SOC_DIR}"
+BSP_DIR ?= "${B}/../../misc/versal_plm_bsp"
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/2023.1:${FILE_DIRNAME}/embeddedsw"
+SRC_URI += " \
+            file://makefile-skip-copy_bsp.sh.patch \
+            file://0001-versal_fw-Fixup-core-makefiles.patch \
+           "
+EXTRA_COMPILER_FLAGS = "-g -ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects"
+do_configure() {
+    # manually do the copy_bsp step first, so as to be able to fix up use of
+    # mb-* commands
+    ${B}/../../misc/${SOC_DIR}/copy_bsp.sh
+}
+do_compile() {
+    oe_runmake
+    ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin
+}
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2023.2.bb
new file mode 100644
index 00000000..fe6deddc
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/pmu-firmware_2023.2.bb
@@ -0,0 +1,16 @@
+require pmu-firmware.inc
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/2023.1:${FILE_DIRNAME}/embeddedsw"
+SRC_URI += " \
+            file://makefile-skip-copy_bsp.sh.patch \
+            file://0001-zynqmp_pmufw-Fixup-core-makefiles.patch \
+           "
+EXTRA_COMPILER_FLAGS = "-ffunction-sections -fdata-sections -Wall -Wextra -Os -flto -ffat-lto-objects"
+do_compile() {
+    oe_runmake
+    ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin
+}
diff --git a/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2023.2.bb b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2023.2.bb
new file mode 100644
index 00000000..569c5a46
--- /dev/null
+++ b/meta-xilinx-standalone/recipes-bsp/embeddedsw/psm-firmware_2023.2.bb
@@ -0,0 +1,34 @@
+require psm-firmware.inc
+# Separate build directories for versal and versal-net
+SOC_DIR = "versal"
+SOC_DIR:versal-net = "versal_net"
+B = "${S}/lib/sw_apps/versal_psmfw/src/${SOC_DIR}"
+BSP_DIR ?= "${B}/../../misc/versal_psmfw_bsp"
+FILESPATH .= ":${FILE_DIRNAME}/embeddedsw/2023.1:${FILE_DIRNAME}/embeddedsw"
+SRC_URI += " \
+            file://makefile-skip-copy_bsp.sh.patch \
+            file://0001-versal_fw-Fixup-core-makefiles.patch \
+           "
+EXTRA_COMPILER_FLAGS = "-g -ffunction-sections -fdata-sections -Wall -Wextra"
+# Override default since we're in a subdirectory deeper now...
+do_configure() {
+    # manually do the copy_bsp step first, so as to be able to fix up use of
+    # mb-* commands
+    if [ ${SOC_DIR} != "versal" ]; then
+        ${B}/../../misc/${SOC_DIR}/copy_bsp.sh
+    else
+        ${B}/../../misc/copy_bsp.sh
+    fi
+}
+do_compile() {
+    oe_runmake
+    ${MB_OBJCOPY} -O binary ${B}/${ESW_COMPONENT} ${B}/${ESW_COMPONENT}.bin
+}
diff --git a/meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf b/meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf
index 6a88d757..daa73f2a 100644
--- a/meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf
+++ b/meta-xilinx-vendor/conf/machine/ultra96-zynqmp.conf
@@ -2,10 +2,6 @@
 #@NAME: ultra96-zynqmp
 #@DESCRIPTION: Machine support for Ultra96 Evaluation Board.
-# Compatibility with old BOARD value.
-# TODO - Remove these once removed from petalinux bsp
-MACHINEOVERRIDES =. "ultra96:"
 #### Preamble
 MACHINEOVERRIDES =. "${@['', 'ultra96-zynqmp:']['ultra96-zynqmp' !='${MACHINE}']}"
 #### Regular settings follow
@@ -51,6 +47,10 @@ require conf/machine/zynqmp-eg-generic.conf
 # from local.conf.
 HDF_MACHINE = "ultra96-zynqmp"
+# KERNEL_DEVICETREE is disabled as we use board device tree from DTG to match
+# the xsa. User can enable explicitly if required from local.conf.
+# KERNEL_DEVICETREE = "xilinx/zynqmp-zcu100-revC.dtb"
 # Ultra96 has 2GB memory only but default zynqmp-generic has QB_MEM set to 4G,
 # Hence set QB_MEM to 2GB.
 QB_MEM = "-m 2G"
@@ -71,3 +71,7 @@ MACHINE_ESSENTIAL_EXTRA_RDEPENDS += " \
    linux-firmware-wl18xx \
    linux-firmware-ti-bt-wl180x \
    "
+#### No additional settings should be after the Postamble
+#### Postamble
+PACKAGE_EXTRA_ARCHS:append = "${@['', ' ultra96_zynqmp']['ultra96-zynqmp' != '${MACHINE}']}"
author	Mark Hatle <mark.hatle@amd.com>	2023-10-23 08:51:20 -0600
committer	Mark Hatle <mark.hatle@amd.com>	2023-10-23 08:56:37 -0600
commit	eb42c7caeac33f42096673522e650441f05ca8da (patch)
tree	33f97fe41ec8855cf591c2692c7c7038b6bc1ae3
parent	387b31acf85b84bd34f339c87c0b51a9af4e16e4 (diff)
parent	05911e19d85fd98c42054238392afe95a5125265 (diff)
download	meta-xilinx-eb42c7caeac33f42096673522e650441f05ca8da.tar.gz