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| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-10-12 21:44:13 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-10-12 22:17:11 +0530 |
| commit | 05911e19d85fd98c42054238392afe95a5125265 (patch) | |
| tree | f9f4362f66f9e8506a4b33be279f2850cd43f694 | |
| parent | 8b1d3589fbd11a22285c9a4c04a98a7a0aafbe5a (diff) | |
| download | meta-xilinx-05911e19d85fd98c42054238392afe95a5125265.tar.gz | |
embeddedsw : Updated SRCREV for 2023.2_9035
xilpm: versal: server: Remove XRAM axi-lite clock selection
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
| -rw-r--r-- | meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass index f5fc133c..12db0da2 100644 --- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass +++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass | |||
| @@ -8,7 +8,7 @@ ESW_BRANCH[2023.2] = "xlnx_rel_v2023.2" | |||
| 8 | BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" | 8 | BRANCH ??= "${@d.getVarFlag('ESW_BRANCH', d.getVar('ESW_VER')) or '${ESW_VER}'}" |
| 9 | 9 | ||
| 10 | ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" | 10 | ESW_REV[2023.1] = "e24fe92b5517ee447e560790e798cad792f53bab" |
| 11 | ESW_REV[2023.2] = "bd497446bded94d1ea627096127587f60c9b8db6" | 11 | ESW_REV[2023.2] = "c9a0ee31b2a14cbcfcb56ca369037319b4ad4847" |
| 12 | SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" | 12 | SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or '${AUTOREV}'}" |
| 13 | 13 | ||
| 14 | EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" | 14 | EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" |