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authorAdrian Calianu <adrian.calianu@enea.com>2016-03-31 10:26:45 +0200
committerStefan Sicleru <stefan.sicleru@enea.com>2016-03-31 10:30:29 +0200
commitbde3b9305a5a45b85a6027b42562aa38d8fba8ef (patch)
tree862525c65505b4f516538e3454fe25e2fb5c63e8
parent4fa4c5f1b92fd0293319a011bb5bf5bca089bd5f (diff)
downloadmeta-enea-bsp-arm-bde3b9305a5a45b85a6027b42562aa38d8fba8ef.tar.gz
ls1021a: Add device tree for an old revision
Device tree for ls1021a TWR revision number: 700-28040 rev X3 Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
-rw-r--r--recipes-kernel/linux/linux-ls1/ls1021twr_revX3.dts892
-rw-r--r--recipes-kernel/linux/linux-ls1_3.12.bbappend10
2 files changed, 902 insertions, 0 deletions
diff --git a/recipes-kernel/linux/linux-ls1/ls1021twr_revX3.dts b/recipes-kernel/linux/linux-ls1/ls1021twr_revX3.dts
new file mode 100644
index 0000000..8c085c8
--- /dev/null
+++ b/recipes-kernel/linux/linux-ls1/ls1021twr_revX3.dts
@@ -0,0 +1,892 @@
1/dts-v1/;
2
3/ {
4 #address-cells = <0x00000002>;
5 #size-cells = <0x00000002>;
6 compatible = "fsl,ls1021a";
7 interrupt-parent = <0x00000001>;
8 model = "LS1021A TWR Board";
9 chosen {
10 };
11 aliases {
12 serial0 = "/soc/serial@2950000";
13 serial1 = "/soc/serial@2960000";
14 serial2 = "/soc/serial@2970000";
15 serial3 = "/soc/serial@2980000";
16 serial4 = "/soc/serial@2990000";
17 serial5 = "/soc/serial@29a0000";
18 gpio0 = "/soc/gpio@2300000";
19 gpio1 = "/soc/gpio@2310000";
20 gpio2 = "/soc/gpio@2320000";
21 gpio3 = "/soc/gpio@2330000";
22 ethernet0 = "/soc/ethernet@2d10000";
23 ethernet1 = "/soc/ethernet@2d50000";
24 ethernet2 = "/soc/ethernet@2d90000";
25 };
26 memory {
27 device_type = "memory";
28 reg = <0x00000000 0x80000000 0x00000000 0x20000000>;
29 };
30 cpus {
31 #address-cells = <0x00000001>;
32 #size-cells = <0x00000000>;
33 cpu@0 {
34 compatible = "arm,cortex-a7";
35 device_type = "cpu";
36 reg = <0x00000f00>;
37 };
38 cpu@1 {
39 compatible = "arm,cortex-a7";
40 device_type = "cpu";
41 reg = <0x00000f01>;
42 };
43 };
44 timer {
45 compatible = "arm,armv7-timer";
46 interrupts = <0x00000001 0x0000000d 0x00000308 0x00000001 0x0000000e 0x00000308 0x00000001 0x0000000b 0x00000308 0x00000001 0x0000000a 0x00000308>;
47 };
48 pmu {
49 compatible = "arm,cortex-a7-pmu";
50 interrupts = <0x00000000 0x0000008a 0x00000004 0x00000000 0x0000008b 0x00000004>;
51 };
52 soc {
53 #address-cells = <0x00000002>;
54 #size-cells = <0x00000002>;
55 compatible = "simple-bus";
56 interrupt-parent = <0x00000001>;
57 ranges;
58 interrupt-controller@1400000 {
59 compatible = "arm,cortex-a15-gic";
60 #interrupt-cells = <0x00000003>;
61 interrupt-controller;
62 reg = <0x00000000 0x01401000 0x00000000 0x00001000 0x00000000 0x01402000 0x00000000 0x00001000 0x00000000 0x01404000 0x00000000 0x00002000 0x00000000 0x01406000 0x00000000 0x00002000>;
63 interrupts = <0x00000001 0x00000009 0x00000304>;
64 linux,phandle = <0x00000001>;
65 phandle = <0x00000001>;
66 };
67 tzasc@1500000 {
68 reg = <0x00000000 0x01500000 0x00000000 0x00010000>;
69 interrupts = <0x00000000 0x0000007d 0x00000004>;
70 status = "disabled";
71 };
72 ifc@1530000 {
73 compatible = "fsl,ls1021a-ifc", "fsl,ifc", "simple-bus";
74 reg = <0x00000000 0x01530000 0x00000000 0x00010000>;
75 interrupts = <0x00000000 0x0000004b 0x00000004>;
76 status = "okay";
77 #address-cells = <0x00000002>;
78 #size-cells = <0x00000001>;
79 ranges = <0x00000000 0x00000000 0x00000000 0x60000000 0x08000000 0x00000002 0x00000000 0x00000000 0x7fb00000 0x00000100>;
80 nor@0,0 {
81 #address-cells = <0x00000001>;
82 #size-cells = <0x00000001>;
83 compatible = "cfi-flash";
84 reg = <0x00000000 0x00000000 0x08000000>;
85 bank-width = <0x00000002>;
86 device-width = <0x00000001>;
87 };
88 board-control@2,0 {
89 #address-cells = <0x00000001>;
90 #size-cells = <0x00000001>;
91 compatible = "fsl,ls1021aqds-fpga", "fsl,fpga-qixis";
92 reg = <0x00000002 0x00000000 0x00000100>;
93 bank-width = <0x00000001>;
94 device-width = <0x00000001>;
95 ranges = <0x00000000 0x00000002 0x00000000 0x00000100>;
96 };
97 };
98 dcfg@1ee0000 {
99 compatible = "fsl,ls1021a-dcfg";
100 reg = <0x00000000 0x01ee0000 0x00000000 0x00010000>;
101 };
102 quadspi@1550000 {
103 #address-cells = <0x00000001>;
104 #size-cells = <0x00000000>;
105 compatible = "fsl,vf610-qspi";
106 reg = <0x00000000 0x01550000 0x00000000 0x00010000>;
107 interrupts = <0x00000000 0x00000083 0x00000004>;
108 clock-names = "qspi_en", "qspi";
109 clocks = <0x00000002 0x00000001 0x00000002 0x00000001>;
110 big-endian;
111 amba-base = <0x40000000>;
112 status = "okay";
113 num-cs = <0x00000002>;
114 s25fl128s@0 {
115 #address-cells = <0x00000001>;
116 #size-cells = <0x00000001>;
117 compatible = "spansion,s25fl128s";
118 spi-max-frequency = <0x01312d00>;
119 reg = <0x00000000>;
120 partition@0 {
121 label = "s25fl128s-0";
122 reg = <0x00000000 0x01000000>;
123 };
124 };
125 };
126 esdhc@1560000 {
127 compatible = "fsl,ls1021a-esdhc", "fsl,esdhc";
128 reg = <0x00000000 0x01560000 0x00000000 0x00010000>;
129 interrupts = <0x00000000 0x0000005e 0x00000004>;
130 clock-frequency = <0x00000000>;
131 voltage-ranges = <0x00000708 0x00000708 0x00000ce4 0x00000ce4>;
132 sdhci,auto-cmd12;
133 big-endian;
134 bus-width = <0x00000004>;
135 status = "disabled";
136 };
137 scfg@1570000 {
138 compatible = "fsl,ls1021a-scfg";
139 reg = <0x00000000 0x01570000 0x00000000 0x00010000>;
140 };
141 crypto@1700000 {
142 compatible = "fsl,sec-v5.3", "fsl,sec-v5.0", "fsl,sec-v4.0";
143 fsl,sec-era = <0x00000004>;
144 #address-cells = <0x00000001>;
145 #size-cells = <0x00000001>;
146 reg = <0x00000000 0x01700000 0x00000000 0x00100000>;
147 ranges = <0x00000000 0x00000000 0x01700000 0x00100000>;
148 interrupts = <0x00000000 0x0000006b 0x00000004>;
149 jr@10000 {
150 compatible = "fsl,sec-v5.3-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
151 reg = <0x00010000 0x00010000>;
152 interrupts = <0x00000000 0x00000067 0x00000004>;
153 };
154 jr@20000 {
155 compatible = "fsl,sec-v5.3-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
156 reg = <0x00020000 0x00010000>;
157 interrupts = <0x00000000 0x00000068 0x00000004>;
158 };
159 jr@30000 {
160 compatible = "fsl,sec-v5.3-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
161 reg = <0x00030000 0x00010000>;
162 interrupts = <0x00000000 0x00000069 0x00000004>;
163 };
164 jr@40000 {
165 compatible = "fsl,sec-v5.3-job-ring", "fsl,sec-v5.0-job-ring", "fsl,sec-v4.0-job-ring";
166 reg = <0x00040000 0x00010000>;
167 interrupts = <0x00000000 0x0000006a 0x00000004>;
168 };
169 };
170 sfp@1e80000 {
171 reg = <0x00000000 0x01e80000 0x00000000 0x00010000>;
172 status = "disabled";
173 };
174 snvs@1e90000 {
175 reg = <0x00000000 0x01e90000 0x00000000 0x00010000>;
176 status = "disabled";
177 };
178 serdes1@1ea0000 {
179 reg = <0x00000000 0x01ea0000 0x00000000 0x00010000>;
180 status = "disabled";
181 };
182 clocking@1ee1000 {
183 compatible = "fsl,ls1021a-clockgen";
184 reg = <0x00000000 0x01ee1000 0x00000000 0x00010000>;
185 #address-cells = <0x00000001>;
186 #size-cells = <0x00000000>;
187 sysclk {
188 compatible = "fsl,sys-clock";
189 #clock-cells = <0x00000000>;
190 clock-frequency = <0x05f5e100>;
191 clock-output-names = "sysclk";
192 linux,phandle = <0x00000003>;
193 phandle = <0x00000003>;
194 };
195 pll1@800 {
196 compatible = "fsl,core-pll-clock";
197 #clock-cells = <0x00000001>;
198 reg = <0x00000800>;
199 clocks = <0x00000003>;
200 clock-output-names = "cga-pll1", "cga-pll1-div2", "cga-pll1-div3", "cga-pll1-div4";
201 linux,phandle = <0x00000004>;
202 phandle = <0x00000004>;
203 };
204 pll2@820 {
205 compatible = "fsl,core-pll-clock";
206 #clock-cells = <0x00000001>;
207 reg = <0x00000820>;
208 clocks = <0x00000003>;
209 clock-output-names = "cga-pll2", "cga-pll2-div2", "cga-pll2-div3", "cga-pll2-div4";
210 };
211 pll@c00 {
212 compatible = "fsl,core-pll-clock";
213 #clock-cells = <0x00000001>;
214 reg = <0x00000c00>;
215 clocks = <0x00000003>;
216 clock-output-names = "platform-clk", "platform-clk-div2";
217 linux,phandle = <0x00000002>;
218 phandle = <0x00000002>;
219 };
220 clk0c0@0 {
221 compatible = "fsl,core-mux-clock";
222 #clock-cells = <0x00000001>;
223 reg = <0x00000000>;
224 clock-names = "pll1cga", "pll1cga-div2";
225 clocks = <0x00000004 0x00000000 0x00000004 0x00000002>;
226 clock-output-names = "cluster1-clk";
227 };
228 };
229 rcpm@1ee2000 {
230 compatible = "fsl,ls1021a-rcpm", "fsl,qoriq-rcpm-2.1";
231 reg = <0x00000000 0x01ee2000 0x00000000 0x00010000>;
232 };
233 dspi@2100000 {
234 #address-cells = <0x00000001>;
235 #size-cells = <0x00000000>;
236 compatible = "fsl,vf610-dspi";
237 reg = <0x00000000 0x02100000 0x00000000 0x00010000>;
238 interrupts = <0x00000000 0x00000060 0x00000004>;
239 clock-names = "dspi";
240 clocks = <0x00000002 0x00000001>;
241 spi-num-chipselects = <0x00000005>;
242 big-endian;
243 status = "disabled";
244 };
245 dspi@2110000 {
246 #address-cells = <0x00000001>;
247 #size-cells = <0x00000000>;
248 compatible = "fsl,vf610-dspi";
249 reg = <0x00000000 0x02110000 0x00000000 0x00010000>;
250 interrupts = <0x00000000 0x00000061 0x00000004>;
251 clock-names = "dspi";
252 clocks = <0x00000002 0x00000001>;
253 spi-num-chipselects = <0x00000005>;
254 big-endian;
255 status = "okay";
256 bus-num = <0x00000000>;
257 s25fl064k@0 {
258 #address-cells = <0x00000001>;
259 #size-cells = <0x00000001>;
260 compatible = "spansion,s25fl064k";
261 spi-max-frequency = "", "�$";
262 spi-cpol;
263 spi-cpha;
264 reg = <0x00000000>;
265 };
266 };
267 i2c@2180000 {
268 #address-cells = <0x00000001>;
269 #size-cells = <0x00000000>;
270 compatible = "fsl,vf610-i2c";
271 reg = <0x00000000 0x02180000 0x00000000 0x00010000>;
272 interrupts = <0x00000000 0x00000058 0x00000004>;
273 clock-names = "i2c";
274 clocks = <0x00000002 0x00000001>;
275 dmas = <0x00000005 0x00000001 0x00000027 0x00000005 0x00000001 0x00000026>;
276 dma-names = "tx", "rx";
277 status = "okay";
278 };
279 i2c@2190000 {
280 #address-cells = <0x00000001>;
281 #size-cells = <0x00000000>;
282 compatible = "fsl,vf610-i2c";
283 reg = <0x00000000 0x02190000 0x00000000 0x00010000>;
284 interrupts = <0x00000000 0x00000059 0x00000004>;
285 clock-names = "i2c";
286 clocks = <0x00000002 0x00000001>;
287 status = "okay";
288 sgtl5000@14 {
289 compatible = "fsl,sgtl5000";
290 reg = <0x00000014>;
291 VDDA-supply = <0x00000006>;
292 VDDIO-supply = <0x00000006>;
293 clocks = <0x00000002 0x00000001>;
294 linux,phandle = <0x0000000f>;
295 phandle = <0x0000000f>;
296 };
297 };
298 i2c@21a0000 {
299 #address-cells = <0x00000001>;
300 #size-cells = <0x00000000>;
301 compatible = "fsl,vf610-i2c";
302 reg = <0x00000000 0x021a0000 0x00000000 0x00010000>;
303 interrupts = <0x00000000 0x0000005a 0x00000004>;
304 clock-names = "i2c";
305 clocks = <0x00000002 0x00000001>;
306 status = "disabled";
307 };
308 serial@21c0500 {
309 compatible = "ns16550";
310 reg = <0x00000000 0x021c0500 0x00000000 0x00000100>;
311 interrupts = <0x00000000 0x00000056 0x00000004>;
312 clock-frequency = <0x00000000>;
313 status = "okay";
314 };
315 serial@21c0600 {
316 compatible = "ns16550";
317 reg = <0x00000000 0x021c0600 0x00000000 0x00000100>;
318 interrupts = <0x00000000 0x00000056 0x00000004>;
319 clock-frequency = <0x00000000>;
320 status = "okay";
321 };
322 serial@21d0500 {
323 compatible = "ns16550";
324 reg = <0x00000000 0x021d0500 0x00000000 0x00000100>;
325 interrupts = <0x00000000 0x00000057 0x00000004>;
326 clock-frequency = <0x00000000>;
327 status = "disabled";
328 };
329 serial@21d0600 {
330 compatible = "ns16550";
331 reg = <0x00000000 0x021d0600 0x00000000 0x00000100>;
332 interrupts = <0x00000000 0x00000057 0x00000004>;
333 clock-frequency = <0x00000000>;
334 status = "disabled";
335 };
336 pio@2300000 {
337 compatible = "fsl,ls1021a-gpio";
338 reg = <0x00000000 0x02300000 0x00000000 0x00010000>;
339 interrupts = <0x00000000 0x00000062 0x00000004>;
340 gpio-controller;
341 #gpio-cells = <0x00000002>;
342 interrupt-controller;
343 #interrupt-cells = <0x00000002>;
344 };
345 pio@2310000 {
346 compatible = "fsl,ls1021a-gpio";
347 reg = <0x00000000 0x02310000 0x00000000 0x00010000>;
348 interrupts = <0x00000000 0x00000063 0x00000004>;
349 gpio-controller;
350 #gpio-cells = <0x00000002>;
351 interrupt-controller;
352 #interrupt-cells = <0x00000002>;
353 };
354 gpio@2320000 {
355 compatible = "fsl,ls1021a-gpio";
356 reg = <0x00000000 0x02320000 0x00000000 0x00010000>;
357 interrupts = <0x00000000 0x00000064 0x00000004>;
358 gpio-controller;
359 #gpio-cells = <0x00000002>;
360 interrupt-controller; #interrupt-cells = <0x00000002>;
361 };
362 gpio@2330000 {
363 compatible = "fsl,ls1021a-gpio";
364 reg = <0x00000000 0x02330000 0x00000000 0x00010000>;
365 interrupts = <0x00000000 0x000000a6 0x00000004>;
366 gpio-controller;
367 #gpio-cells = <0x00000002>;
368 interrupt-controller;
369 #interrupt-cells = <0x00000002>;
370 };
371 uqe@2400000 {
372 #address-cells = <0x00000001>;
373 #size-cells = <0x00000001>;
374 device_type = "qe";
375 compatible = "fsl,qe";
376 sl,qe-num-riscs = <0x00000001>;
377 sl,qe-num-snums = <0x0000001c>;
378 qeic@80 {
379 compatible = "fsl,qe-ic";
380 reg = <0x00000080 0x00000080>;
381 #address-cells = <0x00000000>;
382 interrupt-controller; #interrupt-cells = <0x00000001>;
383 interrupts = <0x00000000 0x0000006d 0x00000004 0x00000000 0x0000006d 0x00000004>;
384 linux,phandle = <0x00000007>;
385 phandle = <0x00000007>;
386 };
387 cc@2000 {
388 cell-index = <0x00000001>;
389 reg = <0x00002000 0x00000200>;
390 interrupts = <0x00000020>;
391 interrupt-parent = <0x00000007>;
392 };
393 cc@2200 {
394 cell-index = <0x00000003>;
395 reg = <0x00002200 0x00000200>;
396 interrupts = <0x00000022>;
397 interrupt-parent = <0x00000007>;
398 };
399 muram@10000 {
400 #address-cells = <0x00000001>;
401 #size-cells = <0x00000001>;
402 compatible = "fsl,qe-muram", "fsl,cpm-muram";
403 ranges = <0x00000000 0x00010000 0x00006000>;
404 data-only@0 {
405 compatible = "fsl,qe-muram-data", "fsl,cpm-muram-data";
406 reg = <0x00000000 0x00006000>;
407 };
408 };
409 };
410 serial@2950000 {
411 compatible = "fsl,vf610-lpuart";
412 reg = <0x00000000 0x02950000 0x00000000 0x00001000>;
413 interrupts = <0x00000000 0x00000050 0x00000004>;
414 clocks = <0x00000003>;
415 clock-names = "ipg";
416 fsl,lpuart32;
417 status = "okay";
418 };
419 serial@2960000 {
420 compatible = "fsl,vf610-lpuart";
421 reg = <0x00000000 0x02960000 0x00000000 0x00001000>;
422 interrupts = <0x00000000 0x00000051 0x00000004>;
423 clocks = <0x00000002 0x00000001>;
424 clock-names = "ipg";
425 fsl,lpuart32;
426 status = "disabled";
427 };
428 serial@2970000 {
429 compatible = "fsl,vf610-lpuart";
430 reg = <0x00000000 0x02970000 0x00000000 0x00001000>;
431 interrupts = <0x00000000 0x00000052 0x00000004>;
432 clocks = <0x00000002 0x00000001>;
433 clock-names = "ipg";
434 sl,lpuart32;
435 status = "disabled";
436 };
437 serial@2980000 {
438 compatible = "fsl,vf610-lpuart";
439 reg = <0x00000000 0x02980000 0x00000000 0x00001000>;
440 interrupts = <0x00000000 0x00000053 0x00000004>;
441 clocks = <0x00000002 0x00000001>;
442 clock-names= "ipg";
443 fsl,lpuart32;
444 status = "disabled";
445 };
446 serial@2990000 {
447 compatible = "sl,vf610-lpuart";
448 reg = <0x00000000 0x02990000 0x00000000 0x00001000>;
449 interrupts = <0x00000000 0x00000054 0x00000004>;
450 clocks = <0x00000002 0x00000001>;
451 clock-names = "ipg";
452 fsl,lpuart32;
453 status = "disabled";
454 };
455 serial@29a0000 {
456 compatible = "fsl,vf610-lpuart";
457 reg = <0x00000000 0x029a0000 0x00000000 0x00001000>;
458 interrupts = <0x00000000 0x00000055 0x00000004>;
459 clocks = <0x00000002 0x00000001>;
460 clock-names = "ipg";
461 fsl,lpuart32;
462 status = "disabled";
463 };
464 ftm0_1@29d0000 {
465 compatible = "fsl,ftm-timer";
466 reg = <0x00000000 0x029d0000 0x00000000 0x00010000 0x00000000 0x029e0000 0x00000000 0x00010000>;
467 interrupts = <0x00000000 0x00000076 0x00000004>;
468 clock-names = "ftm-evt", "ftm-src", "ftm-evt-counter-en", "ftm-src-counter-en";
469 clocks = <0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001>;
470 big-endian;
471 status = "okay";
472 };
473 ftm@29f0000 {
474 reg = <0x00000000 0x029f0000 0x00000000 0x00010000>;
475 interrupts = <0x00000000 0x00000078 0x00000004>;
476 status = "disabled";
477 };
478 tm@2a00000 {
479 compatible = "fsl,vf610-ftm-pwm";
480 #pwm-cells = <0x00000003>;
481 reg = <0x00000000 0x02a00000 0x00000000 0x00010000>;
482 interrupts = <0x00000000 0x00000079 0x00000004>;
483 clock-names = "ftm_sys", "ftm_ext", "ftm_fix", "ftm_cnt_clk_en";
484 clocks = <0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001>;
485 big-endian;
486 status = "disabled";
487 };
488 ftm@2a10000 {
489 reg = <0x00000000 0x02a10000 0x00000000 0x00010000>;
490 interrupts = <0x00000000 0x00000020 0x00000004>;
491 status = "disabled";
492 };
493 ftm@2a20000 {
494 reg = <0x00000000 0x02a20000 0x00000000 0x00010000>;
495 interrupts = <0x00000000 0x00000021 0x00000004>;
496 status = "disabled";
497 };ftm@2a30000 {
498 compatible = "fsl,vf610-ftm-pwm";
499 #pwm-cells = <0x00000003>;
500 reg = <0x00000000 0x02a30000 0x00000000 0x00010000>;
501 interrupts = <0x00000000 0x0000007b 0x00000004>;
502 clock-names = "ftm_sys", "ftm_ext", "ftm_fix", "ftm_cnt_clk_en";
503 clocks = <0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001>;
504 big-endian;
505 status = "okay";
506 };
507 ftm@2a40000 {
508 compatible = "fsl,vf610-ftm-pwm";
509 #pwm-cells = <0x00000003>;
510 reg = <0x00000000 0x02a40000 0x00000000 0x00010000>;
511 interrupts = <0x00000000 0x0000007c 0x00000004>;
512 clock-names = "ftm_sys", "ftm_ext", "ftm_fix", "ftm_cnt_clk_en";
513 clocks = <0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001 0x00000002 0x00000001>;
514 big-endian;
515 status = "okay";
516 };
517 wdog@2ad0000 {
518 compatible = "fsl,ls1021a-wdt", "fsl,imx21-wdt";
519 reg = <0x00000000 0x02ad0000 0x00000000 0x00010000>;
520 interrupts = <0x00000000 0x00000073 0x00000004>;
521 clocks = <0x00000002 0x00000001>;
522 clock-names = "wdog";
523 big-endian;
524 };
525 sai@2b60000 {
526 compatible= "fsl,vf610-sai";
527 reg = <0x00000000 0x02b60000 0x00000000 0x00010000>;
528 interrupts = <0x00000000 0x00000085 0x00000004>;
529 clocks = <0x00000002 0x00000001>;
530 clock-names = "sai";
531 dma-names = "tx", "rx";
532 dmas= <0x00000005 0x00000001 0x0000002d 0x00000005 0x00000001 0x0000002c>;
533 big-endian-regs;
534 status = "okay";
535 linux,phandle = <0x0000000e>;
536 phandle = <0x0000000e>;
537 };
538 edma@2c00000 {
539 #dma-cells = <0x00000002>;
540 compatible = "fsl,vf610-edma";
541 reg = <0x00000000 0x02c00000 0x00000000 0x00010000 0x00000000 0x02c10000 0x00000000 0x00010000 0x00000000 0x02c20000 0x00000000 0x00010000>;
542 interrupts = <0x00000000 0x00000087 0x00000004 0x00000000 0x00000087 0x00000004>;
543 interrupt-names = "edma-tx", "edma-err";
544 dma-channels = <0x00000020>;
545 big-endian;
546 clock-names = "dmamux0", "dmamux1";
547 clocks = <0x00000002 0x00000001 0x00000002 0x00000001>;
548 linux,phandle = <0x00000005>;
549 phandle = <0x00000005>;
550 };
551 dcu@2ce0000 {
552 compatible = "fsl,vf610-dcu";
553 reg = <0x00000000 0x002ce000 0x00000000 0x00010000>;
554 interrupts = <0x00000000 0x000000ac 0x00000004>;
555 clocks = <0x00000002 0x00000001>;
556 clock-names = "dcu";
557 big-endian;
558 status = "okay";
559 display = <0x00000008>;
560 display@0 {
561 bits-per-pixel = <0x00000018>;
562 linux,phandle = <0x00000008>;
563 phandle = <0x00000008>;
564 display-timings {
565 native-mode = <0x00000009>;
566 nl4827hc19 {
567 clock-frequency = <0x00a5dcf0>;
568 hactive = <0x000001e0>;
569 vactive = <0x00000110>;
570 hback-porch = <0x00000002>;
571 hfront-porch = <0x00000002>;
572 vback-porch = <0x00000001>;
573 vfront-porch = <0x00000001>;
574 hsync-len = <0x00000029>;
575 vsync-len = <0x00000002>;
576 hsync-active = <0x00000001>;
577 vsync-active = <0x00000001>;
578 linux,phandle = <0x00000009>;
579 phandle = <0x00000009>;
580 };
581 };
582 };
583 };
584 mdio@2d24000 {
585 #address-cells= <0x00000001>;
586 #size-cells = <0x00000000>;
587 device_type = "mdio";
588 compatible = "gianfar";
589 reg = <0x00000000 0x02d24000 0x00000000 0x00004000>;
590 tbi-phy@8 {
591 reg = <0x00000008>;
592 device_type = "tbi-phy";
593 };
594 ethernet-phy@0 {
595 reg = <0x00000000>;
596 linux,phandle = <0x0000000c>;
597 phandle = <0x0000000c>;
598 };
599 ethernet-phy@1 {
600 reg = <0x00000001>;
601 linux,phandle = <0x0000000d>;
602 phandle = <0x0000000d>;
603 };
604 ethernet-phy@2 {
605 reg = <0x00000002>;
606 linux,phandle = <0x0000000b>;
607 phandle = <0x0000000b>;
608 };
609 tbi-phy@1f {
610 reg =<0x0000001f>;
611 device_type = "tbi-phy";
612 linux,phandle = <0x0000000a>;
613 phandle = <0x0000000a>;
614 };
615 };
616 ethernet@2d10000 {
617 #address-cells = <0x00000002>;
618 #size-cells =<0x00000002>;
619 interrupt-parent = <0x00000001>;
620 device_type = "network";
621 model = "eTSEC";
622 compatible = "fsl,etsec2";
623 fsl,dma-endian-le;
624 fsl,num_rx_queues = <0x00000001>;
625 fsl,num_tx_queues = <0x00000001>;
626 local-mac-address = [00 00 00 00 00 00];
627 ranges;
628 tbi-handle = <0x0000000a>;
629 phy-handle = <0x0000000b>;
630 phy-connection-type = "sgmii";
631 status = "ok";
632 queue-group@0 {
633 #address-cells = <0x00000001>;
634 #size-cells = <0x00000001>;
635 reg = <0x00000000 0x02d10000 0x00000000 0x00008000>;
636 fsl,rx-bit-map = <0x000000ff>;
637 fsl,tx-bit-map = <0x000000ff>;
638 interrupts = <0x00000000 0x00000090 0x00000004 0x00000000 0x00000091 0x00000004 0x00000000 0x00000092 0x00000004>;
639 };};
640 ethernet@2d50000 {
641 #address-cells = <0x00000002>;
642 #size-cells = <0x00000002>;
643 interrupt-parent = <0x00000001>;
644 device_type = "network";
645 model = "eTSEC";
646 compatible = "fsl,etsec2";
647 fsl,dma-endian-le;
648 fsl,num_rx_qeues = <0x00000001>;
649 fsl,num_tx_queues = <0x00000001>;
650 local-mac-address = [00 00 00 00 00 00];
651 ranges;
652 tbi-handle = <0x0000000a>; phy-handle = <0x0000000c>;
653 phy-connection-type = "sgmii";
654 status = "ok";
655 queue-group@0 {
656 #address-cells = <0x00000001>;
657 #size-cells = <0x00000001>;
658 reg = <0x00000000 0x02d50000 0x00000000 0x00008000>;
659 fsl,rx-bit-map =<0x000000ff>;
660 fsl,tx-bit-map = <0x000000ff>;
661 interrupts = <0x00000000 0x00000096 0x00000004 0x00000000 0x00000098 0x00000004 0x00000000 0x00000099 0x00000004>;
662 };
663 };
664 ethernet@2d90000 {
665 #address-cells = <0x00000002>;
666 #size-cells = <0x00000002>;
667 interrupt-parent = <0x00000001>;
668 device_type = "network";
669 model = "eTSEC";
670 compatible = "fsl,etsec2";
671 fsl,dma-endian-le;
672 fsl,num_rx_queues = <0x00000001>;
673 sl,num_tx_queues = <0x00000001>;
674 local-mac-address = [00 00 00 00 00 00];
675 ranges;
676 phy-handle = <0x0000000d>;
677 phy-connection-type = "rgmii-id";
678 status = "ok";
679 queue-group@0 {
680 #address-cells = <0x00000001>;
681 #size-cells = <0x00000001>;
682 reg = <0x00000000 0x02d90000 0x00000000 0x00008000>;
683 fsl,rx-bit-map = <0x000000ff>;
684 fsl,tx-bit-map = <0x000000ff>;
685 interrupts = <0x00000000 0x0000009d 0x00000004 0x00000000 0x0000009e 0x00000004 0x00000000 0x0000009f 0x00000004>;
686 };
687 };
688 usb@8600000 {
689 compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr";
690 reg = <0x00000000 0x08600000 0x00000000 0x00001000>;
691 #address-cells = <0x00000001>;
692 #size-cells = <0x00000000>;
693 interrupts = <0x00000000 0x000000ab 0x00000004>;
694 dr_mode = "host";
695 phy_type = "ulpi";
696 };
697 usb@3100000 {
698 compatible = "fsl,fsl-dwc3";
699 #address-cells = <0x00000002>;
700 #size-cells = <0x00000002>;
701 ranges;
702 dwc3 {
703 compatible = "snps,dwc3";
704 reg = <0x00000000 0x03100000 0x00000000 0x00010000>;
705 interrupts = <0x00000000 0x0000005d 0x00000004>;
706 dr_mode = "host";
707 maximum-speed = "high-speed";
708 };
709 };
710 can@2a70000 {
711 compatible = "fsl,ls1021a-flexcan";
712 reg = <0x00000000 0x02a70000 0x00000000 0x00001000>;
713 interrupts = <0x00000000 0x0000007e 0x00000004>;
714 clocks = <0x00000002 0x00000001>;
715 clock-names = "per";
716 status = "okay";
717 };
718 can@2a80000 {
719 compatible = "fsl,ls1021a-flexcan";
720 reg = <0x00000000 0x02a80000 0x00000000 0x00001000>;
721 interrupts = <0x00000000 0x0000007f 0x00000004>;
722 clocks = <0x00000002 0x00000001>;
723 clock-names = "per";
724 status = "okay";
725 };
726 can@2a90000 {
727 compatible = "fsl,ls1021a-flexcan";
728 reg = <0x00000000 0x02a90000 0x00000000 0x00001000>;
729 interrupts = <0x00000000 0x00000080 0x00000004>;
730 clocks = <0x00000002 0x00000001>;
731 clock-names = "per";
732 status = "disabled";
733 };
734 can@2aa0000 {
735 compatible = "fsl,ls1021a-flexcan";
736 reg = <0x00000000 0x02aa0000 0x00000000 0x00001000>;
737 interrupts = <0x00000000 0x00000081 0x00000004>;
738 clocks = <0x00000002 0x00000001>;
739 clock-names = "per";
740 status = "disabled";
741 };
742 pcie@3400000 {
743 compatible = "fsl,ls1021a-pcie", "snps,dw-pcie";
744 reg = <0x0 0x3400000 0x0 0x10000 0x40 0x0 0x0 0x2000>;
745 reg-names = "regs", "config";
746 interrupts = <0x0 0xb1 0x4 0x0 0xb3 0x4 0x0 0xb5 0x4>;
747 interrupt-names = "intr", "msi", "pme";
748 fsl,pcie-scfg = <0xb 0x0>;
749 num-atus = <0x6>;
750 #address-cells = <0x3>;
751 #size-cells = <0x2>;
752 device_type = "pci";
753 num-lanes = <0x4>;
754 bus-range = <0x0 0xff>;
755 ranges = <0x81000000 0x0 0x0 0x40 0x10000 0x0 0x10000 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>;
756 #interrupt-cells = <0x1>;
757 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
758 interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x5b 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0xbc 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0xbe 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0xc0 0x4>;
759 };
760
761 pcie@3500000 {
762 compatible = "fsl,ls1021a-pcie", "snps,dw-pcie";
763 reg = <0x0 0x3500000 0x0 0x10000 0x48 0x0 0x0 0x2000>;
764 reg-names = "regs", "config";
765 interrupts = <0x0 0xb2 0x4 0x0 0xb4 0x4 0x0 0xb6 0x4>;
766 interrupt-names = "intr", "msi", "pme";
767 fsl,pcie-scfg = <0xb 0x1>;
768 num-atus = <0x6>;
769 #address-cells = <0x3>;
770 #size-cells = <0x2>;
771 device_type = "pci";
772 num-lanes = <0x2>;
773 bus-range = <0x0 0xff>;
774 ranges = <0x81000000 0x0 0x0 0x48 0x10000 0x0 0x10000 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>;
775 #interrupt-cells = <0x1>;
776 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
777 interrupt-map = <0x0 0x0 0x0 0x1 0x1 0x0 0x5c 0x4 0x0 0x0 0x0 0x2 0x1 0x0 0xbd 0x4 0x0 0x0 0x0 0x3 0x1 0x0 0xbf 0x4 0x0 0x0 0x0 0x4 0x1 0x0 0xc1 0x4>;
778 };
779 };
780 dcsr@20000000 {
781 #address-cells = <0x00000001>;
782 #size-cells = <0x00000001>;
783 compatible = "fsl,ls1021a-dcsr", "simple-bus";
784 ranges = <0x00000000 0x00000000 0x20000000 0x01000000>;
785 dcsr-epu@0 {
786 compatible = "fsl,ls1021a-dcsr-epu";
787 reg = <0x00000000 0x00010000>;
788 };
789 dcsr-gdi@100000 {
790 compatible = "fsl,ls1021a-dcsr-gdi";
791 reg = <0x00100000 0x00010000>;
792 };
793 dcsr-dddi@120000 {
794 compatible = "fsl,ls1021a-dcsr-dddi";
795 reg = <0x00120000 0x00010000>;
796 };
797 dcsr-dcfg@220000 {
798 compatible = "fsl,ls1021a-dcsr-dcfg";
799 reg = <0x00220000 0x00001000>;
800 };
801 dcsr-clock@221000 {
802 compatible = "fsl,ls1021a-dcsr-clock";
803 reg = <0x00221000 0x00001000>;
804 };
805 dcsr-rcpm@222000 {
806 compatible = "fsl,ls1021a-dcsr-rcpm";
807 reg = <0x00222000 0x00001000 0x00223000 0x00001000>;
808 };
809 dcsr-ccp@225000 {
810 compatible = "fsl,ls1021a-dcsr-ccp";
811 reg = <0x00225000 0x00001000>;
812 };
813 dcsr-fusectrl@226000 {
814 compatible = "fsl,ls1021a-dcsr-fusectrl";
815 reg = <0x00226000 0x00001000>;
816 };
817 dcsr-dap@300000 {
818 compatible = "fsl,ls1021a-dcsr-dap";
819 reg = <0x00300000 0x00010000>;
820 };
821 dcsr-cstf@350000 {
822 compatible = "fsl,ls1021a-dcsr-cstf";
823 reg = <0x00350000 0x00001000 0x003a7000 0x00001000>;
824 };
825 dcsr-a7rom@360000 {
826 compatible = "fsl,ls1021a-dcsr-a7rom";
827 reg = <0x00360000 0x00010000>;
828 };
829 dcsr-a7cpu@370000 {
830 compatible = "fsl,ls1021a-dcsr-a7cpu";
831 reg = <0x00370000 0x00008000>;
832 };
833 dcsr-a7cti@378000 {
834 compatible = "fsl,ls1021a-dcsr-a7cti";
835 reg = <0x00378000 0x00004000>;
836 };
837 dcsr-etm@37c000 {
838 compatible = "fsl,ls1021a-dcsr-etm";
839 reg = <0x0037c000 0x00001000 0x0037d000 0x00003000>;
840 };
841 dcsr-hugorom@3a0000 {
842 compatible = "fsl,ls1021a-dcsr-hugorom";
843 reg = <0x003a0000 0x00001000>;
844 };
845 dcsr-etf@3a1000 {
846 compatible = "fsl,ls1021a-dcsr-etf";
847 reg = <0x003a1000 0x00001000 0x003a2000 0x00001000>;
848 };
849 dcsr-etr@3a3000 {
850 compatible = "fsl,ls1021a-dcsr-etr";
851 reg = <0x003a3000 0x00001000>;
852 };
853 dcsr-cti@3a4000 {
854 compatible = "fsl,ls1021a-dcsr-cti";
855 reg = <0x003a4000 0x00001000 0x003a5000 0x00001000 0x003a6000 0x00001000>;
856 };
857 dcsr-atbrepl@3a8000 {
858 compatible = "fsl,ls1021a-dcsr-atbrepl";
859 reg = <0x003a8000 0x00001000>;
860 };
861 dcsr-tsgen-ctrl@3a9000 {
862 compatible = "fsl,ls1021a-dcsr-tsgen-ctrl";
863 reg = <0x003a9000 0x00001000>;
864 };
865 dcsr-tsgen-read@3aa000 {
866 compatible = "fsl,ls1021a-dcsr-tsgen-read";
867 reg = <0x003aa000 0x00001000>;
868 };
869 };
870 regulators {
871 compatible = "simple-bus";
872 #address-cells = <0x00000001>;
873 #size-cells = <0x00000000>;
874 regulator@0 {
875 compatible = "regulator-fixed";
876 reg = <0x00000000>;
877 regulator-name = "3P3V";
878 regulator-min-microvolt = <0x00325aa0>;
879 regulator-max-microvolt = <0x00325aa0>;
880 regulator-always-on;
881 linux,phandle = <0x00000006>;
882 phandle = <0x00000006>;
883 };
884 };
885 sound {
886 compatible = "fsl,vf610-sgtl5000";
887 simple-audio-card,name = "FSL-VF610-TWR-BOARD";
888 simple-audio-card,routing = "MIC_IN", "Microphone Jack", "Microphone Jack", "Mic Bias", "LINE_IN", "Line In Jack", "Headphone Jack", "HP_OUT", "Speaker Ext", "LINE_OUT";
889 simple-audio-card,cpu = <0x0000000e>;
890 simple-audio-card,codec = <0x0000000f>;
891 };
892};
diff --git a/recipes-kernel/linux/linux-ls1_3.12.bbappend b/recipes-kernel/linux/linux-ls1_3.12.bbappend
new file mode 100644
index 0000000..0d39a59
--- /dev/null
+++ b/recipes-kernel/linux/linux-ls1_3.12.bbappend
@@ -0,0 +1,10 @@
1FILESEXTRAPATHS_prepend := "${THISDIR}/${PN}:"
2
3SRC_URI += "file://ls1021twr_revX3.dts \
4 "
5
6KERNEL_DEVICETREE = "ls1021twr_revX3.dtb"
7
8do_configure_prepend() {
9 cp -rf ${WORKDIR}/ls1021twr_revX3.dts ${S}/arch/arm/boot/dts/ls1021twr_revX3.dts
10}