diff options
| -rw-r--r-- | meta/packages/prelink/prelink-20061027/arm_eabi.patch | 57 | ||||
| -rw-r--r-- | meta/packages/prelink/prelink-20061027/armfix.patch | 67 | ||||
| -rw-r--r-- | meta/packages/prelink/prelink_20061027.bb | 5 |
3 files changed, 32 insertions, 97 deletions
diff --git a/meta/packages/prelink/prelink-20061027/arm_eabi.patch b/meta/packages/prelink/prelink-20061027/arm_eabi.patch index dbce9d2895..768d82e74c 100644 --- a/meta/packages/prelink/prelink-20061027/arm_eabi.patch +++ b/meta/packages/prelink/prelink-20061027/arm_eabi.patch | |||
| @@ -5,18 +5,17 @@ | |||
| 5 | Index: prelink-0.0.20061027/src/arch-arm.c | 5 | Index: prelink-0.0.20061027/src/arch-arm.c |
| 6 | =================================================================== | 6 | =================================================================== |
| 7 | --- prelink-0.0.20061027.orig/src/arch-arm.c 2006-08-13 16:18:17.000000000 +0100 | 7 | --- prelink-0.0.20061027.orig/src/arch-arm.c 2006-08-13 16:18:17.000000000 +0100 |
| 8 | +++ prelink-0.0.20061027/src/arch-arm.c 2007-09-04 12:29:06.000000000 +0100 | 8 | +++ prelink-0.0.20061027/src/arch-arm.c 2008-06-12 10:46:12.000000000 +0100 |
| 9 | @@ -145,6 +145,26 @@ arm_prelink_rel (struct prelink_info *in | 9 | @@ -145,6 +145,27 @@ |
| 10 | error (0, 0, "%s: R_ARM_PC24 relocs with non-zero addend should not be present in prelinked REL sections", | 10 | error (0, 0, "%s: R_ARM_PC24 relocs with non-zero addend should not be present in prelinked REL sections", |
| 11 | dso->filename); | 11 | dso->filename); |
| 12 | return 1; | 12 | return 1; |
| 13 | + /* DTPOFF32, DTPMOD32 and TPOFF32 is impossible to predict unless prelink | 13 | + /* DTPMOD32 is impossible to predict unless prelink sets the rules. |
| 14 | + sets the rules. Also for DTPOFF32/TPOFF32 there is REL->RELA problem. */ | 14 | + DTPOFF32/TPOFF32 are converted REL->RELA. */ |
| 15 | + case R_ARM_TLS_DTPOFF32: | 15 | + case R_ARM_TLS_DTPOFF32: |
| 16 | + if (dso->ehdr.e_type == ET_EXEC) | 16 | + error (0, 0, "%s: R_ARM_TLS_DTPOFF32 relocs should not be present in prelinked REL section", |
| 17 | + error (0, 0, "%s: R_ARM_TLS_DTPOFF32 relocs should not be present in prelinked ET_EXEC REL sections", | ||
| 18 | + dso->filename); | 17 | + dso->filename); |
| 19 | + break; | 18 | + return 1; |
| 20 | + case R_ARM_TLS_DTPMOD32: | 19 | + case R_ARM_TLS_DTPMOD32: |
| 21 | + if (dso->ehdr.e_type == ET_EXEC) | 20 | + if (dso->ehdr.e_type == ET_EXEC) |
| 22 | + { | 21 | + { |
| @@ -26,20 +25,21 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 26 | + } | 25 | + } |
| 27 | + break; | 26 | + break; |
| 28 | + case R_ARM_TLS_TPOFF32: | 27 | + case R_ARM_TLS_TPOFF32: |
| 29 | + if (dso->ehdr.e_type == ET_EXEC) | 28 | + if (dso->ehdr.e_type == ET_EXEC) { |
| 30 | + error (0, 0, "%s: R_ARM_TLS_TPOFF32 relocs should not be present in prelinked ET_EXEC REL sections", | 29 | + error (0, 0, "%s: R_ARM_TLS_TPOFF32 relocs should not be present in prelinked ET_EXEC REL sections", |
| 31 | + dso->filename); | 30 | + dso->filename); |
| 31 | + return 1; | ||
| 32 | + } | ||
| 32 | + break; | 33 | + break; |
| 33 | case R_ARM_COPY: | 34 | case R_ARM_COPY: |
| 34 | if (dso->ehdr.e_type == ET_EXEC) | 35 | if (dso->ehdr.e_type == ET_EXEC) |
| 35 | /* COPY relocs are handled specially in generic code. */ | 36 | /* COPY relocs are handled specially in generic code. */ |
| 36 | @@ -195,6 +215,25 @@ arm_prelink_rela (struct prelink_info *i | 37 | @@ -195,6 +216,24 @@ |
| 37 | write_le32 (dso, rela->r_offset, | 38 | write_le32 (dso, rela->r_offset, |
| 38 | (read_ule32 (dso, rela->r_offset) & 0xff000000) | val); | 39 | (read_ule32 (dso, rela->r_offset) & 0xff000000) | val); |
| 39 | break; | 40 | break; |
| 40 | + case R_ARM_TLS_DTPOFF32: | 41 | + case R_ARM_TLS_DTPOFF32: |
| 41 | + if (dso->ehdr.e_type == ET_EXEC) | 42 | + write_le32 (dso, rela->r_offset, value + rela->r_addend); |
| 42 | + write_le32 (dso, rela->r_offset, value + rela->r_addend); | ||
| 43 | + break; | 43 | + break; |
| 44 | + /* DTPMOD32 and TPOFF32 are impossible to predict unless prelink | 44 | + /* DTPMOD32 and TPOFF32 are impossible to predict unless prelink |
| 45 | + sets the rules. */ | 45 | + sets the rules. */ |
| @@ -59,7 +59,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 59 | case R_ARM_COPY: | 59 | case R_ARM_COPY: |
| 60 | if (dso->ehdr.e_type == ET_EXEC) | 60 | if (dso->ehdr.e_type == ET_EXEC) |
| 61 | /* COPY relocs are handled specially in generic code. */ | 61 | /* COPY relocs are handled specially in generic code. */ |
| 62 | @@ -315,6 +354,7 @@ arm_prelink_conflict_rel (DSO *dso, stru | 62 | @@ -315,6 +354,7 @@ |
| 63 | { | 63 | { |
| 64 | GElf_Addr value; | 64 | GElf_Addr value; |
| 65 | struct prelink_conflict *conflict; | 65 | struct prelink_conflict *conflict; |
| @@ -67,7 +67,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 67 | GElf_Rela *ret; | 67 | GElf_Rela *ret; |
| 68 | 68 | ||
| 69 | if (GELF_R_TYPE (rel->r_info) == R_ARM_RELATIVE | 69 | if (GELF_R_TYPE (rel->r_info) == R_ARM_RELATIVE |
| 70 | @@ -324,8 +364,32 @@ arm_prelink_conflict_rel (DSO *dso, stru | 70 | @@ -324,8 +364,32 @@ |
| 71 | conflict = prelink_conflict (info, GELF_R_SYM (rel->r_info), | 71 | conflict = prelink_conflict (info, GELF_R_SYM (rel->r_info), |
| 72 | GELF_R_TYPE (rel->r_info)); | 72 | GELF_R_TYPE (rel->r_info)); |
| 73 | if (conflict == NULL) | 73 | if (conflict == NULL) |
| @@ -102,7 +102,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 102 | ret = prelink_conflict_add_rela (info); | 102 | ret = prelink_conflict_add_rela (info); |
| 103 | if (ret == NULL) | 103 | if (ret == NULL) |
| 104 | return 1; | 104 | return 1; |
| 105 | @@ -342,6 +406,33 @@ arm_prelink_conflict_rel (DSO *dso, stru | 105 | @@ -342,6 +406,33 @@ |
| 106 | error (0, 0, "%s: R_ARM_%s relocs should not be present in prelinked REL sections", | 106 | error (0, 0, "%s: R_ARM_%s relocs should not be present in prelinked REL sections", |
| 107 | dso->filename, GELF_R_TYPE (rel->r_info) == R_ARM_ABS32 ? "ABS32" : "PC24"); | 107 | dso->filename, GELF_R_TYPE (rel->r_info) == R_ARM_ABS32 ? "ABS32" : "PC24"); |
| 108 | return 1; | 108 | return 1; |
| @@ -136,7 +136,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 136 | case R_ARM_COPY: | 136 | case R_ARM_COPY: |
| 137 | error (0, 0, "R_ARM_COPY should not be present in shared libraries"); | 137 | error (0, 0, "R_ARM_COPY should not be present in shared libraries"); |
| 138 | return 1; | 138 | return 1; |
| 139 | @@ -359,6 +450,7 @@ arm_prelink_conflict_rela (DSO *dso, str | 139 | @@ -359,6 +450,7 @@ |
| 140 | { | 140 | { |
| 141 | GElf_Addr value; | 141 | GElf_Addr value; |
| 142 | struct prelink_conflict *conflict; | 142 | struct prelink_conflict *conflict; |
| @@ -144,7 +144,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 144 | GElf_Rela *ret; | 144 | GElf_Rela *ret; |
| 145 | Elf32_Sword val; | 145 | Elf32_Sword val; |
| 146 | 146 | ||
| 147 | @@ -369,8 +461,32 @@ arm_prelink_conflict_rela (DSO *dso, str | 147 | @@ -369,8 +461,32 @@ |
| 148 | conflict = prelink_conflict (info, GELF_R_SYM (rela->r_info), | 148 | conflict = prelink_conflict (info, GELF_R_SYM (rela->r_info), |
| 149 | GELF_R_TYPE (rela->r_info)); | 149 | GELF_R_TYPE (rela->r_info)); |
| 150 | if (conflict == NULL) | 150 | if (conflict == NULL) |
| @@ -179,7 +179,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 179 | ret = prelink_conflict_add_rela (info); | 179 | ret = prelink_conflict_add_rela (info); |
| 180 | if (ret == NULL) | 180 | if (ret == NULL) |
| 181 | return 1; | 181 | return 1; |
| 182 | @@ -398,6 +514,32 @@ arm_prelink_conflict_rela (DSO *dso, str | 182 | @@ -398,6 +514,32 @@ |
| 183 | case R_ARM_COPY: | 183 | case R_ARM_COPY: |
| 184 | error (0, 0, "R_ARM_COPY should not be present in shared libraries"); | 184 | error (0, 0, "R_ARM_COPY should not be present in shared libraries"); |
| 185 | return 1; | 185 | return 1; |
| @@ -190,7 +190,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 190 | + && (conflict->reloc_class != RTYPE_CLASS_TLS | 190 | + && (conflict->reloc_class != RTYPE_CLASS_TLS |
| 191 | + || conflict->lookup.tls == NULL)) | 191 | + || conflict->lookup.tls == NULL)) |
| 192 | + { | 192 | + { |
| 193 | + error (0, 0, "%s: R_386_TLS not resolving to STT_TLS symbol", | 193 | + error (0, 0, "%s: R_ARM_TLS not resolving to STT_TLS symbol", |
| 194 | + dso->filename); | 194 | + dso->filename); |
| 195 | + return 1; | 195 | + return 1; |
| 196 | + } | 196 | + } |
| @@ -212,7 +212,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 212 | default: | 212 | default: |
| 213 | error (0, 0, "%s: Unknown arm relocation type %d", dso->filename, | 213 | error (0, 0, "%s: Unknown arm relocation type %d", dso->filename, |
| 214 | (int) GELF_R_TYPE (rela->r_info)); | 214 | (int) GELF_R_TYPE (rela->r_info)); |
| 215 | @@ -418,6 +560,8 @@ arm_rel_to_rela (DSO *dso, GElf_Rel *rel | 215 | @@ -418,6 +560,8 @@ |
| 216 | abort (); | 216 | abort (); |
| 217 | case R_ARM_RELATIVE: | 217 | case R_ARM_RELATIVE: |
| 218 | case R_ARM_ABS32: | 218 | case R_ARM_ABS32: |
| @@ -221,7 +221,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 221 | rela->r_addend = (Elf32_Sword) read_ule32 (dso, rel->r_offset); | 221 | rela->r_addend = (Elf32_Sword) read_ule32 (dso, rel->r_offset); |
| 222 | break; | 222 | break; |
| 223 | case R_ARM_PC24: | 223 | case R_ARM_PC24: |
| 224 | @@ -426,6 +570,7 @@ arm_rel_to_rela (DSO *dso, GElf_Rel *rel | 224 | @@ -426,6 +570,7 @@ |
| 225 | break; | 225 | break; |
| 226 | case R_ARM_COPY: | 226 | case R_ARM_COPY: |
| 227 | case R_ARM_GLOB_DAT: | 227 | case R_ARM_GLOB_DAT: |
| @@ -229,7 +229,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 229 | rela->r_addend = 0; | 229 | rela->r_addend = 0; |
| 230 | break; | 230 | break; |
| 231 | } | 231 | } |
| 232 | @@ -445,6 +590,8 @@ arm_rela_to_rel (DSO *dso, GElf_Rela *re | 232 | @@ -445,6 +590,8 @@ |
| 233 | abort (); | 233 | abort (); |
| 234 | case R_ARM_RELATIVE: | 234 | case R_ARM_RELATIVE: |
| 235 | case R_ARM_ABS32: | 235 | case R_ARM_ABS32: |
| @@ -238,7 +238,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 238 | write_le32 (dso, rela->r_offset, rela->r_addend); | 238 | write_le32 (dso, rela->r_offset, rela->r_addend); |
| 239 | break; | 239 | break; |
| 240 | case R_ARM_PC24: | 240 | case R_ARM_PC24: |
| 241 | @@ -453,6 +600,7 @@ arm_rela_to_rel (DSO *dso, GElf_Rela *re | 241 | @@ -453,6 +600,7 @@ |
| 242 | | ((rela->r_addend >> 2) & 0xffffff)); | 242 | | ((rela->r_addend >> 2) & 0xffffff)); |
| 243 | break; | 243 | break; |
| 244 | case R_ARM_GLOB_DAT: | 244 | case R_ARM_GLOB_DAT: |
| @@ -246,13 +246,16 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 246 | write_le32 (dso, rela->r_offset, 0); | 246 | write_le32 (dso, rela->r_offset, 0); |
| 247 | break; | 247 | break; |
| 248 | } | 248 | } |
| 249 | @@ -488,6 +636,15 @@ arm_need_rel_to_rela (DSO *dso, int firs | 249 | @@ -488,6 +636,18 @@ |
| 250 | /* FALLTHROUGH */ | 250 | /* FALLTHROUGH */ |
| 251 | case R_ARM_PC24: | 251 | case R_ARM_PC24: |
| 252 | return 1; | 252 | return 1; |
| 253 | + case R_ARM_TLS_DTPOFF32: | 253 | + case R_ARM_TLS_DTPOFF32: |
| 254 | + /* We can prelink these fields, and the addend is relative | ||
| 255 | + to the symbol value. A RELA entry is needed. */ | ||
| 256 | + return 1; | ||
| 254 | + case R_ARM_TLS_TPOFF32: | 257 | + case R_ARM_TLS_TPOFF32: |
| 255 | + /* In shared libraries {D,}TPOFF32 is changed always into | 258 | + /* In shared libraries TPOFF32 is changed always into |
| 256 | + conflicts, for executables we need to preserve | 259 | + conflicts, for executables we need to preserve |
| 257 | + original addend. */ | 260 | + original addend. */ |
| 258 | + if (dso->ehdr.e_type == ET_EXEC) { | 261 | + if (dso->ehdr.e_type == ET_EXEC) { |
| @@ -262,7 +265,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 262 | } | 265 | } |
| 263 | } | 266 | } |
| 264 | } | 267 | } |
| 265 | @@ -612,6 +769,12 @@ arm_undo_prelink_rel (DSO *dso, GElf_Rel | 268 | @@ -612,6 +772,12 @@ |
| 266 | return 0; | 269 | return 0; |
| 267 | error (0, 0, "%s: R_ARM_COPY reloc in shared library?", dso->filename); | 270 | error (0, 0, "%s: R_ARM_COPY reloc in shared library?", dso->filename); |
| 268 | return 1; | 271 | return 1; |
| @@ -275,7 +278,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 275 | default: | 278 | default: |
| 276 | error (0, 0, "%s: Unknown arm relocation type %d", dso->filename, | 279 | error (0, 0, "%s: Unknown arm relocation type %d", dso->filename, |
| 277 | (int) GELF_R_TYPE (rel->r_info)); | 280 | (int) GELF_R_TYPE (rel->r_info)); |
| 278 | @@ -634,6 +797,10 @@ arm_reloc_class (int reloc_type) | 281 | @@ -634,6 +800,10 @@ |
| 279 | { | 282 | { |
| 280 | case R_ARM_COPY: return RTYPE_CLASS_COPY; | 283 | case R_ARM_COPY: return RTYPE_CLASS_COPY; |
| 281 | case R_ARM_JUMP_SLOT: return RTYPE_CLASS_PLT; | 284 | case R_ARM_JUMP_SLOT: return RTYPE_CLASS_PLT; |
| @@ -286,7 +289,7 @@ Index: prelink-0.0.20061027/src/arch-arm.c | |||
| 286 | default: return RTYPE_CLASS_VALID; | 289 | default: return RTYPE_CLASS_VALID; |
| 287 | } | 290 | } |
| 288 | } | 291 | } |
| 289 | @@ -646,7 +813,7 @@ PL_ARCH = { | 292 | @@ -646,7 +816,7 @@ |
| 290 | .R_JMP_SLOT = R_ARM_JUMP_SLOT, | 293 | .R_JMP_SLOT = R_ARM_JUMP_SLOT, |
| 291 | .R_COPY = R_ARM_COPY, | 294 | .R_COPY = R_ARM_COPY, |
| 292 | .R_RELATIVE = R_ARM_RELATIVE, | 295 | .R_RELATIVE = R_ARM_RELATIVE, |
diff --git a/meta/packages/prelink/prelink-20061027/armfix.patch b/meta/packages/prelink/prelink-20061027/armfix.patch deleted file mode 100644 index 87767b9cc7..0000000000 --- a/meta/packages/prelink/prelink-20061027/armfix.patch +++ /dev/null | |||
| @@ -1,67 +0,0 @@ | |||
| 1 | Index: prelink-0.0.20061027/src/arch-arm.c | ||
| 2 | =================================================================== | ||
| 3 | --- prelink-0.0.20061027.orig/src/arch-arm.c 2008-06-04 19:41:07.000000000 +0100 | ||
| 4 | +++ prelink-0.0.20061027/src/arch-arm.c 2008-06-04 19:41:59.000000000 +0100 | ||
| 5 | @@ -145,13 +145,12 @@ | ||
| 6 | error (0, 0, "%s: R_ARM_PC24 relocs with non-zero addend should not be present in prelinked REL sections", | ||
| 7 | dso->filename); | ||
| 8 | return 1; | ||
| 9 | - /* DTPOFF32, DTPMOD32 and TPOFF32 is impossible to predict unless prelink | ||
| 10 | - sets the rules. Also for DTPOFF32/TPOFF32 there is REL->RELA problem. */ | ||
| 11 | + /* DTPMOD32 is impossible to predict unless prelink sets the rules. | ||
| 12 | + DTPOFF32/TPOFF32 are converted REL->RELA. */ | ||
| 13 | case R_ARM_TLS_DTPOFF32: | ||
| 14 | - if (dso->ehdr.e_type == ET_EXEC) | ||
| 15 | - error (0, 0, "%s: R_ARM_TLS_DTPOFF32 relocs should not be present in prelinked ET_EXEC REL sections", | ||
| 16 | + error (0, 0, "%s: R_ARM_TLS_DTPOFF32 relocs should not be present in prelinked REL section", | ||
| 17 | dso->filename); | ||
| 18 | - break; | ||
| 19 | + return 1; | ||
| 20 | case R_ARM_TLS_DTPMOD32: | ||
| 21 | if (dso->ehdr.e_type == ET_EXEC) | ||
| 22 | { | ||
| 23 | @@ -161,9 +160,11 @@ | ||
| 24 | } | ||
| 25 | break; | ||
| 26 | case R_ARM_TLS_TPOFF32: | ||
| 27 | - if (dso->ehdr.e_type == ET_EXEC) | ||
| 28 | + if (dso->ehdr.e_type == ET_EXEC) { | ||
| 29 | error (0, 0, "%s: R_ARM_TLS_TPOFF32 relocs should not be present in prelinked ET_EXEC REL sections", | ||
| 30 | dso->filename); | ||
| 31 | + return 1; | ||
| 32 | + } | ||
| 33 | break; | ||
| 34 | case R_ARM_COPY: | ||
| 35 | if (dso->ehdr.e_type == ET_EXEC) | ||
| 36 | @@ -216,8 +217,7 @@ | ||
| 37 | (read_ule32 (dso, rela->r_offset) & 0xff000000) | val); | ||
| 38 | break; | ||
| 39 | case R_ARM_TLS_DTPOFF32: | ||
| 40 | - if (dso->ehdr.e_type == ET_EXEC) | ||
| 41 | - write_le32 (dso, rela->r_offset, value + rela->r_addend); | ||
| 42 | + write_le32 (dso, rela->r_offset, value + rela->r_addend); | ||
| 43 | break; | ||
| 44 | /* DTPMOD32 and TPOFF32 are impossible to predict unless prelink | ||
| 45 | sets the rules. */ | ||
| 46 | @@ -521,7 +521,7 @@ | ||
| 47 | && (conflict->reloc_class != RTYPE_CLASS_TLS | ||
| 48 | || conflict->lookup.tls == NULL)) | ||
| 49 | { | ||
| 50 | - error (0, 0, "%s: R_386_TLS not resolving to STT_TLS symbol", | ||
| 51 | + error (0, 0, "%s: R_ARM_TLS not resolving to STT_TLS symbol", | ||
| 52 | dso->filename); | ||
| 53 | return 1; | ||
| 54 | } | ||
| 55 | @@ -637,8 +637,11 @@ | ||
| 56 | case R_ARM_PC24: | ||
| 57 | return 1; | ||
| 58 | case R_ARM_TLS_DTPOFF32: | ||
| 59 | + /* We can prelink these fields, and the addend is relative | ||
| 60 | + to the symbol value. A RELA entry is needed. */ | ||
| 61 | + return 1; | ||
| 62 | case R_ARM_TLS_TPOFF32: | ||
| 63 | - /* In shared libraries {D,}TPOFF32 is changed always into | ||
| 64 | + /* In shared libraries TPOFF32 is changed always into | ||
| 65 | conflicts, for executables we need to preserve | ||
| 66 | original addend. */ | ||
| 67 | if (dso->ehdr.e_type == ET_EXEC) { | ||
diff --git a/meta/packages/prelink/prelink_20061027.bb b/meta/packages/prelink/prelink_20061027.bb index 22c6c72400..21c538d5c2 100644 --- a/meta/packages/prelink/prelink_20061027.bb +++ b/meta/packages/prelink/prelink_20061027.bb | |||
| @@ -4,7 +4,7 @@ DESCRIPTION = " The prelink package contains a utility which modifies ELF shared | |||
| 4 | and executables, so that far fewer relocations need to be resolved at \ | 4 | and executables, so that far fewer relocations need to be resolved at \ |
| 5 | runtime and thus programs come up faster." | 5 | runtime and thus programs come up faster." |
| 6 | LICENSE = "GPL" | 6 | LICENSE = "GPL" |
| 7 | PR = "r8" | 7 | PR = "r9" |
| 8 | 8 | ||
| 9 | SRC_URI = "${DEBIAN_MIRROR}/main/p/prelink/prelink_0.0.${PV}.orig.tar.gz \ | 9 | SRC_URI = "${DEBIAN_MIRROR}/main/p/prelink/prelink_0.0.${PV}.orig.tar.gz \ |
| 10 | file://prelink.conf \ | 10 | file://prelink.conf \ |
| @@ -13,8 +13,7 @@ SRC_URI = "${DEBIAN_MIRROR}/main/p/prelink/prelink_0.0.${PV}.orig.tar.gz \ | |||
| 13 | 13 | ||
| 14 | TARGET_OS_ORIG := "${TARGET_OS}" | 14 | TARGET_OS_ORIG := "${TARGET_OS}" |
| 15 | OVERRIDES_append = ":${TARGET_OS_ORIG}" | 15 | OVERRIDES_append = ":${TARGET_OS_ORIG}" |
| 16 | SRC_URI_append_linux-gnueabi = " file://arm_eabi.patch;patch=1 \ | 16 | SRC_URI_append_linux-gnueabi = " file://arm_eabi.patch;patch=1" |
| 17 | file://armfix.patch;patch=1 " | ||
| 18 | 17 | ||
| 19 | S = "${WORKDIR}/prelink-0.0.${PV}" | 18 | S = "${WORKDIR}/prelink-0.0.${PV}" |
| 20 | 19 | ||
