diff options
| author | Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> | 2025-10-11 18:30:14 +0300 |
|---|---|---|
| committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2025-10-13 18:01:04 +0100 |
| commit | 1eadde0f934b7a81a6f26b436908460e4ba0f55c (patch) | |
| tree | c01c2ce63e2c035a711bea3cb1121d4b88833159 /meta | |
| parent | 27c46b89fe8b8d57ffa4c103137b5a40661e4064 (diff) | |
| download | poky-1eadde0f934b7a81a6f26b436908460e4ba0f55c.tar.gz | |
vulkan: upgrade 1.4.321.0 -> 1.4.328.1
Upgrade all Vulkan-related packages together in a single commit.
License-Update: glslang dropped SPIR-V remapper
(From OE-Core rev: 55c7566c33833a8f36cbf50a70cb1a1cf7aa96d5)
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Mathieu Dubois-Briand <mathieu.dubois-briand@bootlin.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta')
| -rw-r--r-- | meta/recipes-graphics/glslang/glslang_1.4.328.1.bb (renamed from meta/recipes-graphics/glslang/glslang_1.4.321.0.bb) | 6 | ||||
| -rw-r--r-- | meta/recipes-graphics/spir/spirv-headers/0001-Add-SPV_INTEL_function_variants-532.patch | 642 | ||||
| -rw-r--r-- | meta/recipes-graphics/spir/spirv-headers_1.4.328.1.bb (renamed from meta/recipes-graphics/spir/spirv-headers_1.4.321.0.bb) | 7 | ||||
| -rw-r--r-- | meta/recipes-graphics/spir/spirv-tools/0001-SPV_INTEL_function_variants-basic-asm-dis-support-61.patch | 289 | ||||
| -rw-r--r-- | meta/recipes-graphics/spir/spirv-tools_1.4.328.1.bb (renamed from meta/recipes-graphics/spir/spirv-tools_1.4.321.0.bb) | 5 | ||||
| -rw-r--r-- | meta/recipes-graphics/vulkan/vulkan-headers_1.4.328.1.bb (renamed from meta/recipes-graphics/vulkan/vulkan-headers_1.4.321.0.bb) | 4 | ||||
| -rw-r--r-- | meta/recipes-graphics/vulkan/vulkan-loader_1.4.328.1.bb (renamed from meta/recipes-graphics/vulkan/vulkan-loader_1.4.321.0.bb) | 4 | ||||
| -rw-r--r-- | meta/recipes-graphics/vulkan/vulkan-tools_1.4.328.1.bb (renamed from meta/recipes-graphics/vulkan/vulkan-tools_1.4.321.0.bb) | 4 | ||||
| -rw-r--r-- | meta/recipes-graphics/vulkan/vulkan-utility-libraries_1.4.328.1.bb (renamed from meta/recipes-graphics/vulkan/vulkan-utility-libraries_1.4.321.0.bb) | 4 | ||||
| -rw-r--r-- | meta/recipes-graphics/vulkan/vulkan-validation-layers_1.4.328.1.bb (renamed from meta/recipes-graphics/vulkan/vulkan-validation-layers_1.4.321.0.bb) | 4 | ||||
| -rw-r--r-- | meta/recipes-graphics/vulkan/vulkan-volk_1.4.328.1.bb (renamed from meta/recipes-graphics/vulkan/vulkan-volk_1.4.321.0.bb) | 4 |
11 files changed, 20 insertions, 953 deletions
diff --git a/meta/recipes-graphics/glslang/glslang_1.4.321.0.bb b/meta/recipes-graphics/glslang/glslang_1.4.328.1.bb index 2d6f098ad9..57d9fe1a98 100644 --- a/meta/recipes-graphics/glslang/glslang_1.4.321.0.bb +++ b/meta/recipes-graphics/glslang/glslang_1.4.328.1.bb | |||
| @@ -6,10 +6,10 @@ either from a command line or programmatically." | |||
| 6 | SECTION = "graphics" | 6 | SECTION = "graphics" |
| 7 | HOMEPAGE = "https://www.khronos.org/opengles/sdk/tools/Reference-Compiler" | 7 | HOMEPAGE = "https://www.khronos.org/opengles/sdk/tools/Reference-Compiler" |
| 8 | LICENSE = "BSD-3-Clause & BSD-2-Clause & MIT & Apache-2.0 & GPL-3-with-bison-exception" | 8 | LICENSE = "BSD-3-Clause & BSD-2-Clause & MIT & Apache-2.0 & GPL-3-with-bison-exception" |
| 9 | LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=2a2b5acd7bc4844964cfda45fe807dc3" | 9 | LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=50ff9d0fcde2d5b953ebe431c48e34e3" |
| 10 | 10 | ||
| 11 | SRCREV = "8a85691a0740d390761a1008b4696f57facd02c4" | 11 | SRCREV = "a57276bf558f5cf94d3a9854ebdf5a2236849a5a" |
| 12 | SRC_URI = "git://github.com/KhronosGroup/glslang.git;protocol=https;branch=vulkan-sdk-1.4.321;tag=vulkan-sdk-${PV} \ | 12 | SRC_URI = "git://github.com/KhronosGroup/glslang.git;protocol=https;branch=vulkan-sdk-1.4.328;tag=vulkan-sdk-${PV} \ |
| 13 | file://0001-generate-glslang-pkg-config.patch \ | 13 | file://0001-generate-glslang-pkg-config.patch \ |
| 14 | " | 14 | " |
| 15 | PE = "1" | 15 | PE = "1" |
diff --git a/meta/recipes-graphics/spir/spirv-headers/0001-Add-SPV_INTEL_function_variants-532.patch b/meta/recipes-graphics/spir/spirv-headers/0001-Add-SPV_INTEL_function_variants-532.patch deleted file mode 100644 index 9a3ab15350..0000000000 --- a/meta/recipes-graphics/spir/spirv-headers/0001-Add-SPV_INTEL_function_variants-532.patch +++ /dev/null | |||
| @@ -1,642 +0,0 @@ | |||
| 1 | From 9e3836d7d6023843a72ecd3fbf3f09b1b6747a9e Mon Sep 17 00:00:00 2001 | ||
| 2 | From: =?UTF-8?q?Jakub=20=C5=BD=C3=A1dn=C3=ADk?= <jakub.zadnik@intel.com> | ||
| 3 | Date: Tue, 24 Jun 2025 15:35:27 +0300 | ||
| 4 | Subject: [PATCH] Add SPV_INTEL_function_variants (#532) | ||
| 5 | |||
| 6 | * Add tokens for SPV_INTEL_function_variants | ||
| 7 | |||
| 8 | Add FunctionVariantXXX decorations | ||
| 9 | |||
| 10 | Add SpecConditionalINTEL capability | ||
| 11 | |||
| 12 | Change class of conditional copy to Composite | ||
| 13 | |||
| 14 | Add new instructions; Update tokens | ||
| 15 | |||
| 16 | Fix wrong op name | ||
| 17 | |||
| 18 | Change spec const arch operand to integer | ||
| 19 | |||
| 20 | Reassign tokens; Fix operand | ||
| 21 | |||
| 22 | Remove old decorations | ||
| 23 | |||
| 24 | * Generate headers | ||
| 25 | |||
| 26 | * Add provisional entries and missing capability | ||
| 27 | |||
| 28 | Co-authored-by: Victor Lomuller <victor@codeplay.com> | ||
| 29 | |||
| 30 | --------- | ||
| 31 | |||
| 32 | Upstream-Status: Backport [https://github.com/KhronosGroup/SPIRV-Headers/commit/9e3836d7d6023843a72ecd3fbf3f09b1b6747a9e] | ||
| 33 | Signed-off-by: Khem Raj <raj.khem@gmail.com> | ||
| 34 | Co-authored-by: Victor Lomuller <victor@codeplay.com> | ||
| 35 | --- | ||
| 36 | include/spirv/unified1/spirv.bf | 10 ++ | ||
| 37 | .../spirv/unified1/spirv.core.grammar.json | 120 ++++++++++++++++++ | ||
| 38 | include/spirv/unified1/spirv.cs | 10 ++ | ||
| 39 | include/spirv/unified1/spirv.h | 27 ++++ | ||
| 40 | include/spirv/unified1/spirv.hpp | 27 ++++ | ||
| 41 | include/spirv/unified1/spirv.hpp11 | 27 ++++ | ||
| 42 | include/spirv/unified1/spirv.json | 10 ++ | ||
| 43 | include/spirv/unified1/spirv.lua | 10 ++ | ||
| 44 | include/spirv/unified1/spirv.py | 10 ++ | ||
| 45 | include/spirv/unified1/spv.d | 10 ++ | ||
| 46 | 10 files changed, 261 insertions(+) | ||
| 47 | |||
| 48 | diff --git a/include/spirv/unified1/spirv.bf b/include/spirv/unified1/spirv.bf | ||
| 49 | index 1d5945a..630f2f4 100644 | ||
| 50 | --- a/include/spirv/unified1/spirv.bf | ||
| 51 | +++ b/include/spirv/unified1/spirv.bf | ||
| 52 | @@ -655,6 +655,7 @@ namespace Spv | ||
| 53 | HostAccessINTEL = 6188, | ||
| 54 | InitModeINTEL = 6190, | ||
| 55 | ImplementInRegisterMapINTEL = 6191, | ||
| 56 | + ConditionalINTEL = 6247, | ||
| 57 | CacheControlLoadINTEL = 6442, | ||
| 58 | CacheControlStoreINTEL = 6443, | ||
| 59 | Max = 0x7fffffff, | ||
| 60 | @@ -1312,6 +1313,8 @@ namespace Spv | ||
| 61 | Subgroup2DBlockTransposeINTEL = 6230, | ||
| 62 | SubgroupMatrixMultiplyAccumulateINTEL = 6236, | ||
| 63 | TernaryBitwiseFunctionINTEL = 6241, | ||
| 64 | + SpecConditionalINTEL = 6245, | ||
| 65 | + FunctionVariantsINTEL = 6246, | ||
| 66 | GroupUniformArithmeticKHR = 6400, | ||
| 67 | TensorFloat32RoundingINTEL = 6425, | ||
| 68 | MaskedGatherScatterINTEL = 6427, | ||
| 69 | @@ -2472,6 +2475,13 @@ namespace Spv | ||
| 70 | OpSubgroup2DBlockStoreINTEL = 6235, | ||
| 71 | OpSubgroupMatrixMultiplyAccumulateINTEL = 6237, | ||
| 72 | OpBitwiseFunctionINTEL = 6242, | ||
| 73 | + OpConditionalExtensionINTEL = 6248, | ||
| 74 | + OpConditionalEntryPointINTEL = 6249, | ||
| 75 | + OpConditionalCapabilityINTEL = 6250, | ||
| 76 | + OpSpecConstantTargetINTEL = 6251, | ||
| 77 | + OpSpecConstantArchitectureINTEL = 6252, | ||
| 78 | + OpSpecConstantCapabilitiesINTEL = 6253, | ||
| 79 | + OpConditionalCopyObjectINTEL = 6254, | ||
| 80 | OpGroupIMulKHR = 6401, | ||
| 81 | OpGroupFMulKHR = 6402, | ||
| 82 | OpGroupBitwiseAndKHR = 6403, | ||
| 83 | diff --git a/include/spirv/unified1/spirv.core.grammar.json b/include/spirv/unified1/spirv.core.grammar.json | ||
| 84 | index b197d9e..2470bfa 100644 | ||
| 85 | --- a/include/spirv/unified1/spirv.core.grammar.json | ||
| 86 | +++ b/include/spirv/unified1/spirv.core.grammar.json | ||
| 87 | @@ -10777,6 +10777,101 @@ | ||
| 88 | "capabilities" : [ "TernaryBitwiseFunctionINTEL" ], | ||
| 89 | "version" : "None" | ||
| 90 | }, | ||
| 91 | + { | ||
| 92 | + "opname" : "OpConditionalExtensionINTEL", | ||
| 93 | + "class" : "Extension", | ||
| 94 | + "opcode" : 6248, | ||
| 95 | + "operands" : [ | ||
| 96 | + { "kind" : "IdRef", "name" : "Condition" }, | ||
| 97 | + { "kind" : "LiteralString", "name" : "Name" } | ||
| 98 | + ], | ||
| 99 | + "capabilities" : [ "SpecConditionalINTEL" ], | ||
| 100 | + "provisional" : true, | ||
| 101 | + "version" : "None" | ||
| 102 | + }, | ||
| 103 | + { | ||
| 104 | + "opname" : "OpConditionalEntryPointINTEL", | ||
| 105 | + "class" : "Mode-Setting", | ||
| 106 | + "opcode" : 6249, | ||
| 107 | + "operands" : [ | ||
| 108 | + { "kind" : "IdRef", "name" : "Condition" }, | ||
| 109 | + { "kind" : "ExecutionModel" }, | ||
| 110 | + { "kind" : "IdRef", "name" : "Entry Point" }, | ||
| 111 | + { "kind" : "LiteralString", "name" : "Name" }, | ||
| 112 | + { "kind" : "IdRef", "quantifier" : "*", "name" : "Interface" } | ||
| 113 | + ], | ||
| 114 | + "capabilities" : [ "SpecConditionalINTEL" ], | ||
| 115 | + "provisional" : true, | ||
| 116 | + "version" : "None" | ||
| 117 | + }, | ||
| 118 | + { | ||
| 119 | + "opname" : "OpConditionalCapabilityINTEL", | ||
| 120 | + "class" : "Mode-Setting", | ||
| 121 | + "opcode" : 6250, | ||
| 122 | + "operands" : [ | ||
| 123 | + { "kind" : "IdRef", "name" : "Condition" }, | ||
| 124 | + { "kind" : "Capability", "name" : "Capability" } | ||
| 125 | + ], | ||
| 126 | + "capabilities" : [ "SpecConditionalINTEL" ], | ||
| 127 | + "provisional" : true, | ||
| 128 | + "version" : "None" | ||
| 129 | + }, | ||
| 130 | + { | ||
| 131 | + "opname" : "OpSpecConstantTargetINTEL", | ||
| 132 | + "class" : "Constant-Creation", | ||
| 133 | + "opcode" : 6251, | ||
| 134 | + "operands" : [ | ||
| 135 | + { "kind" : "IdResultType" }, | ||
| 136 | + { "kind" : "IdResult" }, | ||
| 137 | + { "kind" : "LiteralInteger", "name" : "Target" }, | ||
| 138 | + { "kind" : "LiteralInteger", "quantifier" : "*", "name" : "Features" } | ||
| 139 | + ], | ||
| 140 | + "capabilities" : [ "FunctionVariantsINTEL" ], | ||
| 141 | + "provisional" : true, | ||
| 142 | + "version": "None" | ||
| 143 | + }, | ||
| 144 | + { | ||
| 145 | + "opname" : "OpSpecConstantArchitectureINTEL", | ||
| 146 | + "class" : "Constant-Creation", | ||
| 147 | + "opcode" : 6252, | ||
| 148 | + "operands" : [ | ||
| 149 | + { "kind" : "IdResultType" }, | ||
| 150 | + { "kind" : "IdResult" }, | ||
| 151 | + { "kind" : "LiteralInteger", "name" : "Category" }, | ||
| 152 | + { "kind" : "LiteralInteger", "name" : "Family" }, | ||
| 153 | + { "kind" : "LiteralInteger", "name" : "Opcode" }, | ||
| 154 | + { "kind" : "LiteralInteger", "name" : "Architecture" } | ||
| 155 | + ], | ||
| 156 | + "capabilities" : [ "FunctionVariantsINTEL" ], | ||
| 157 | + "provisional" : true, | ||
| 158 | + "version": "None" | ||
| 159 | + }, | ||
| 160 | + { | ||
| 161 | + "opname" : "OpSpecConstantCapabilitiesINTEL", | ||
| 162 | + "class" : "Constant-Creation", | ||
| 163 | + "opcode" : 6253, | ||
| 164 | + "operands" : [ | ||
| 165 | + { "kind" : "IdResultType" }, | ||
| 166 | + { "kind" : "IdResult" }, | ||
| 167 | + { "kind" : "Capability", "quantifier" : "*", "name" : "Capabilities" } | ||
| 168 | + ], | ||
| 169 | + "capabilities" : [ "FunctionVariantsINTEL" ], | ||
| 170 | + "provisional" : true, | ||
| 171 | + "version": "None" | ||
| 172 | + }, | ||
| 173 | + { | ||
| 174 | + "opname" : "OpConditionalCopyObjectINTEL", | ||
| 175 | + "class" : "Composite", | ||
| 176 | + "opcode" : 6254, | ||
| 177 | + "operands" : [ | ||
| 178 | + { "kind" : "IdResultType" }, | ||
| 179 | + { "kind" : "IdResult" }, | ||
| 180 | + { "kind" : "IdRef", "quantifier" : "*", "name" : "Condition 0, Operand 0, +\nCondition 1, Operand 1, +\n..." } | ||
| 181 | + ], | ||
| 182 | + "capabilities" : [ "SpecConditionalINTEL" ], | ||
| 183 | + "provisional" : true, | ||
| 184 | + "version" : "None" | ||
| 185 | + }, | ||
| 186 | { | ||
| 187 | "opname" : "OpGroupIMulKHR", | ||
| 188 | "class" : "Group", | ||
| 189 | @@ -14900,6 +14995,16 @@ | ||
| 190 | "capabilities" : [ "GlobalVariableFPGADecorationsINTEL" ], | ||
| 191 | "version" : "None" | ||
| 192 | }, | ||
| 193 | + { | ||
| 194 | + "enumerant" : "ConditionalINTEL", | ||
| 195 | + "value" : 6247, | ||
| 196 | + "parameters": [ | ||
| 197 | + { "kind" : "IdRef", "name" : "Condition" } | ||
| 198 | + ], | ||
| 199 | + "capabilities" : [ "SpecConditionalINTEL" ], | ||
| 200 | + "provisional" : true, | ||
| 201 | + "version" : "None" | ||
| 202 | + }, | ||
| 203 | { | ||
| 204 | "enumerant" : "CacheControlLoadINTEL", | ||
| 205 | "value" : 6442, | ||
| 206 | @@ -17563,6 +17668,21 @@ | ||
| 207 | "extensions" : [ "SPV_INTEL_ternary_bitwise_function"], | ||
| 208 | "version" : "None" | ||
| 209 | }, | ||
| 210 | + { | ||
| 211 | + "enumerant" : "SpecConditionalINTEL", | ||
| 212 | + "value" : 6245, | ||
| 213 | + "extensions" : [ "SPV_INTEL_function_variants" ], | ||
| 214 | + "provisional" : true, | ||
| 215 | + "version": "None" | ||
| 216 | + }, | ||
| 217 | + { | ||
| 218 | + "enumerant" : "FunctionVariantsINTEL", | ||
| 219 | + "value" : 6246, | ||
| 220 | + "capabilities" : [ "SpecConditionalINTEL" ], | ||
| 221 | + "extensions" : [ "SPV_INTEL_function_variants" ], | ||
| 222 | + "provisional" : true, | ||
| 223 | + "version": "None" | ||
| 224 | + }, | ||
| 225 | { | ||
| 226 | "enumerant" : "GroupUniformArithmeticKHR", | ||
| 227 | "value" : 6400, | ||
| 228 | diff --git a/include/spirv/unified1/spirv.cs b/include/spirv/unified1/spirv.cs | ||
| 229 | index b11a8b2..57e7216 100644 | ||
| 230 | --- a/include/spirv/unified1/spirv.cs | ||
| 231 | +++ b/include/spirv/unified1/spirv.cs | ||
| 232 | @@ -654,6 +654,7 @@ namespace Spv | ||
| 233 | HostAccessINTEL = 6188, | ||
| 234 | InitModeINTEL = 6190, | ||
| 235 | ImplementInRegisterMapINTEL = 6191, | ||
| 236 | + ConditionalINTEL = 6247, | ||
| 237 | CacheControlLoadINTEL = 6442, | ||
| 238 | CacheControlStoreINTEL = 6443, | ||
| 239 | Max = 0x7fffffff, | ||
| 240 | @@ -1311,6 +1312,8 @@ namespace Spv | ||
| 241 | Subgroup2DBlockTransposeINTEL = 6230, | ||
| 242 | SubgroupMatrixMultiplyAccumulateINTEL = 6236, | ||
| 243 | TernaryBitwiseFunctionINTEL = 6241, | ||
| 244 | + SpecConditionalINTEL = 6245, | ||
| 245 | + FunctionVariantsINTEL = 6246, | ||
| 246 | GroupUniformArithmeticKHR = 6400, | ||
| 247 | TensorFloat32RoundingINTEL = 6425, | ||
| 248 | MaskedGatherScatterINTEL = 6427, | ||
| 249 | @@ -2471,6 +2474,13 @@ namespace Spv | ||
| 250 | OpSubgroup2DBlockStoreINTEL = 6235, | ||
| 251 | OpSubgroupMatrixMultiplyAccumulateINTEL = 6237, | ||
| 252 | OpBitwiseFunctionINTEL = 6242, | ||
| 253 | + OpConditionalExtensionINTEL = 6248, | ||
| 254 | + OpConditionalEntryPointINTEL = 6249, | ||
| 255 | + OpConditionalCapabilityINTEL = 6250, | ||
| 256 | + OpSpecConstantTargetINTEL = 6251, | ||
| 257 | + OpSpecConstantArchitectureINTEL = 6252, | ||
| 258 | + OpSpecConstantCapabilitiesINTEL = 6253, | ||
| 259 | + OpConditionalCopyObjectINTEL = 6254, | ||
| 260 | OpGroupIMulKHR = 6401, | ||
| 261 | OpGroupFMulKHR = 6402, | ||
| 262 | OpGroupBitwiseAndKHR = 6403, | ||
| 263 | diff --git a/include/spirv/unified1/spirv.h b/include/spirv/unified1/spirv.h | ||
| 264 | index 005d451..84972da 100644 | ||
| 265 | --- a/include/spirv/unified1/spirv.h | ||
| 266 | +++ b/include/spirv/unified1/spirv.h | ||
| 267 | @@ -642,6 +642,7 @@ typedef enum SpvDecoration_ { | ||
| 268 | SpvDecorationHostAccessINTEL = 6188, | ||
| 269 | SpvDecorationInitModeINTEL = 6190, | ||
| 270 | SpvDecorationImplementInRegisterMapINTEL = 6191, | ||
| 271 | + SpvDecorationConditionalINTEL = 6247, | ||
| 272 | SpvDecorationCacheControlLoadINTEL = 6442, | ||
| 273 | SpvDecorationCacheControlStoreINTEL = 6443, | ||
| 274 | SpvDecorationMax = 0x7fffffff, | ||
| 275 | @@ -1282,6 +1283,8 @@ typedef enum SpvCapability_ { | ||
| 276 | SpvCapabilitySubgroup2DBlockTransposeINTEL = 6230, | ||
| 277 | SpvCapabilitySubgroupMatrixMultiplyAccumulateINTEL = 6236, | ||
| 278 | SpvCapabilityTernaryBitwiseFunctionINTEL = 6241, | ||
| 279 | + SpvCapabilitySpecConditionalINTEL = 6245, | ||
| 280 | + SpvCapabilityFunctionVariantsINTEL = 6246, | ||
| 281 | SpvCapabilityGroupUniformArithmeticKHR = 6400, | ||
| 282 | SpvCapabilityTensorFloat32RoundingINTEL = 6425, | ||
| 283 | SpvCapabilityMaskedGatherScatterINTEL = 6427, | ||
| 284 | @@ -2406,6 +2409,13 @@ typedef enum SpvOp_ { | ||
| 285 | SpvOpSubgroup2DBlockStoreINTEL = 6235, | ||
| 286 | SpvOpSubgroupMatrixMultiplyAccumulateINTEL = 6237, | ||
| 287 | SpvOpBitwiseFunctionINTEL = 6242, | ||
| 288 | + SpvOpConditionalExtensionINTEL = 6248, | ||
| 289 | + SpvOpConditionalEntryPointINTEL = 6249, | ||
| 290 | + SpvOpConditionalCapabilityINTEL = 6250, | ||
| 291 | + SpvOpSpecConstantTargetINTEL = 6251, | ||
| 292 | + SpvOpSpecConstantArchitectureINTEL = 6252, | ||
| 293 | + SpvOpSpecConstantCapabilitiesINTEL = 6253, | ||
| 294 | + SpvOpConditionalCopyObjectINTEL = 6254, | ||
| 295 | SpvOpGroupIMulKHR = 6401, | ||
| 296 | SpvOpGroupFMulKHR = 6402, | ||
| 297 | SpvOpGroupBitwiseAndKHR = 6403, | ||
| 298 | @@ -3225,6 +3235,13 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy | ||
| 299 | case SpvOpSubgroup2DBlockStoreINTEL: *hasResult = false; *hasResultType = false; break; | ||
| 300 | case SpvOpSubgroupMatrixMultiplyAccumulateINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 301 | case SpvOpBitwiseFunctionINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 302 | + case SpvOpConditionalExtensionINTEL: *hasResult = false; *hasResultType = false; break; | ||
| 303 | + case SpvOpConditionalEntryPointINTEL: *hasResult = false; *hasResultType = false; break; | ||
| 304 | + case SpvOpConditionalCapabilityINTEL: *hasResult = false; *hasResultType = false; break; | ||
| 305 | + case SpvOpSpecConstantTargetINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 306 | + case SpvOpSpecConstantArchitectureINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 307 | + case SpvOpSpecConstantCapabilitiesINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 308 | + case SpvOpConditionalCopyObjectINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 309 | case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break; | ||
| 310 | case SpvOpGroupFMulKHR: *hasResult = true; *hasResultType = true; break; | ||
| 311 | case SpvOpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break; | ||
| 312 | @@ -3765,6 +3782,7 @@ inline const char* SpvDecorationToString(SpvDecoration value) { | ||
| 313 | case SpvDecorationHostAccessINTEL: return "HostAccessINTEL"; | ||
| 314 | case SpvDecorationInitModeINTEL: return "InitModeINTEL"; | ||
| 315 | case SpvDecorationImplementInRegisterMapINTEL: return "ImplementInRegisterMapINTEL"; | ||
| 316 | + case SpvDecorationConditionalINTEL: return "ConditionalINTEL"; | ||
| 317 | case SpvDecorationCacheControlLoadINTEL: return "CacheControlLoadINTEL"; | ||
| 318 | case SpvDecorationCacheControlStoreINTEL: return "CacheControlStoreINTEL"; | ||
| 319 | default: return "Unknown"; | ||
| 320 | @@ -4204,6 +4222,8 @@ inline const char* SpvCapabilityToString(SpvCapability value) { | ||
| 321 | case SpvCapabilitySubgroup2DBlockTransposeINTEL: return "Subgroup2DBlockTransposeINTEL"; | ||
| 322 | case SpvCapabilitySubgroupMatrixMultiplyAccumulateINTEL: return "SubgroupMatrixMultiplyAccumulateINTEL"; | ||
| 323 | case SpvCapabilityTernaryBitwiseFunctionINTEL: return "TernaryBitwiseFunctionINTEL"; | ||
| 324 | + case SpvCapabilitySpecConditionalINTEL: return "SpecConditionalINTEL"; | ||
| 325 | + case SpvCapabilityFunctionVariantsINTEL: return "FunctionVariantsINTEL"; | ||
| 326 | case SpvCapabilityGroupUniformArithmeticKHR: return "GroupUniformArithmeticKHR"; | ||
| 327 | case SpvCapabilityTensorFloat32RoundingINTEL: return "TensorFloat32RoundingINTEL"; | ||
| 328 | case SpvCapabilityMaskedGatherScatterINTEL: return "MaskedGatherScatterINTEL"; | ||
| 329 | @@ -5198,6 +5218,13 @@ inline const char* SpvOpToString(SpvOp value) { | ||
| 330 | case SpvOpSubgroup2DBlockStoreINTEL: return "OpSubgroup2DBlockStoreINTEL"; | ||
| 331 | case SpvOpSubgroupMatrixMultiplyAccumulateINTEL: return "OpSubgroupMatrixMultiplyAccumulateINTEL"; | ||
| 332 | case SpvOpBitwiseFunctionINTEL: return "OpBitwiseFunctionINTEL"; | ||
| 333 | + case SpvOpConditionalExtensionINTEL: return "OpConditionalExtensionINTEL"; | ||
| 334 | + case SpvOpConditionalEntryPointINTEL: return "OpConditionalEntryPointINTEL"; | ||
| 335 | + case SpvOpConditionalCapabilityINTEL: return "OpConditionalCapabilityINTEL"; | ||
| 336 | + case SpvOpSpecConstantTargetINTEL: return "OpSpecConstantTargetINTEL"; | ||
| 337 | + case SpvOpSpecConstantArchitectureINTEL: return "OpSpecConstantArchitectureINTEL"; | ||
| 338 | + case SpvOpSpecConstantCapabilitiesINTEL: return "OpSpecConstantCapabilitiesINTEL"; | ||
| 339 | + case SpvOpConditionalCopyObjectINTEL: return "OpConditionalCopyObjectINTEL"; | ||
| 340 | case SpvOpGroupIMulKHR: return "OpGroupIMulKHR"; | ||
| 341 | case SpvOpGroupFMulKHR: return "OpGroupFMulKHR"; | ||
| 342 | case SpvOpGroupBitwiseAndKHR: return "OpGroupBitwiseAndKHR"; | ||
| 343 | diff --git a/include/spirv/unified1/spirv.hpp b/include/spirv/unified1/spirv.hpp | ||
| 344 | index f7a7bf8..a3d760a 100644 | ||
| 345 | --- a/include/spirv/unified1/spirv.hpp | ||
| 346 | +++ b/include/spirv/unified1/spirv.hpp | ||
| 347 | @@ -638,6 +638,7 @@ enum Decoration { | ||
| 348 | DecorationHostAccessINTEL = 6188, | ||
| 349 | DecorationInitModeINTEL = 6190, | ||
| 350 | DecorationImplementInRegisterMapINTEL = 6191, | ||
| 351 | + DecorationConditionalINTEL = 6247, | ||
| 352 | DecorationCacheControlLoadINTEL = 6442, | ||
| 353 | DecorationCacheControlStoreINTEL = 6443, | ||
| 354 | DecorationMax = 0x7fffffff, | ||
| 355 | @@ -1278,6 +1279,8 @@ enum Capability { | ||
| 356 | CapabilitySubgroup2DBlockTransposeINTEL = 6230, | ||
| 357 | CapabilitySubgroupMatrixMultiplyAccumulateINTEL = 6236, | ||
| 358 | CapabilityTernaryBitwiseFunctionINTEL = 6241, | ||
| 359 | + CapabilitySpecConditionalINTEL = 6245, | ||
| 360 | + CapabilityFunctionVariantsINTEL = 6246, | ||
| 361 | CapabilityGroupUniformArithmeticKHR = 6400, | ||
| 362 | CapabilityTensorFloat32RoundingINTEL = 6425, | ||
| 363 | CapabilityMaskedGatherScatterINTEL = 6427, | ||
| 364 | @@ -2402,6 +2405,13 @@ enum Op { | ||
| 365 | OpSubgroup2DBlockStoreINTEL = 6235, | ||
| 366 | OpSubgroupMatrixMultiplyAccumulateINTEL = 6237, | ||
| 367 | OpBitwiseFunctionINTEL = 6242, | ||
| 368 | + OpConditionalExtensionINTEL = 6248, | ||
| 369 | + OpConditionalEntryPointINTEL = 6249, | ||
| 370 | + OpConditionalCapabilityINTEL = 6250, | ||
| 371 | + OpSpecConstantTargetINTEL = 6251, | ||
| 372 | + OpSpecConstantArchitectureINTEL = 6252, | ||
| 373 | + OpSpecConstantCapabilitiesINTEL = 6253, | ||
| 374 | + OpConditionalCopyObjectINTEL = 6254, | ||
| 375 | OpGroupIMulKHR = 6401, | ||
| 376 | OpGroupFMulKHR = 6402, | ||
| 377 | OpGroupBitwiseAndKHR = 6403, | ||
| 378 | @@ -3221,6 +3231,13 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | ||
| 379 | case OpSubgroup2DBlockStoreINTEL: *hasResult = false; *hasResultType = false; break; | ||
| 380 | case OpSubgroupMatrixMultiplyAccumulateINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 381 | case OpBitwiseFunctionINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 382 | + case OpConditionalExtensionINTEL: *hasResult = false; *hasResultType = false; break; | ||
| 383 | + case OpConditionalEntryPointINTEL: *hasResult = false; *hasResultType = false; break; | ||
| 384 | + case OpConditionalCapabilityINTEL: *hasResult = false; *hasResultType = false; break; | ||
| 385 | + case OpSpecConstantTargetINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 386 | + case OpSpecConstantArchitectureINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 387 | + case OpSpecConstantCapabilitiesINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 388 | + case OpConditionalCopyObjectINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 389 | case OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break; | ||
| 390 | case OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break; | ||
| 391 | case OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break; | ||
| 392 | @@ -3761,6 +3778,7 @@ inline const char* DecorationToString(Decoration value) { | ||
| 393 | case DecorationHostAccessINTEL: return "HostAccessINTEL"; | ||
| 394 | case DecorationInitModeINTEL: return "InitModeINTEL"; | ||
| 395 | case DecorationImplementInRegisterMapINTEL: return "ImplementInRegisterMapINTEL"; | ||
| 396 | + case DecorationConditionalINTEL: return "ConditionalINTEL"; | ||
| 397 | case DecorationCacheControlLoadINTEL: return "CacheControlLoadINTEL"; | ||
| 398 | case DecorationCacheControlStoreINTEL: return "CacheControlStoreINTEL"; | ||
| 399 | default: return "Unknown"; | ||
| 400 | @@ -4200,6 +4218,8 @@ inline const char* CapabilityToString(Capability value) { | ||
| 401 | case CapabilitySubgroup2DBlockTransposeINTEL: return "Subgroup2DBlockTransposeINTEL"; | ||
| 402 | case CapabilitySubgroupMatrixMultiplyAccumulateINTEL: return "SubgroupMatrixMultiplyAccumulateINTEL"; | ||
| 403 | case CapabilityTernaryBitwiseFunctionINTEL: return "TernaryBitwiseFunctionINTEL"; | ||
| 404 | + case CapabilitySpecConditionalINTEL: return "SpecConditionalINTEL"; | ||
| 405 | + case CapabilityFunctionVariantsINTEL: return "FunctionVariantsINTEL"; | ||
| 406 | case CapabilityGroupUniformArithmeticKHR: return "GroupUniformArithmeticKHR"; | ||
| 407 | case CapabilityTensorFloat32RoundingINTEL: return "TensorFloat32RoundingINTEL"; | ||
| 408 | case CapabilityMaskedGatherScatterINTEL: return "MaskedGatherScatterINTEL"; | ||
| 409 | @@ -5194,6 +5214,13 @@ inline const char* OpToString(Op value) { | ||
| 410 | case OpSubgroup2DBlockStoreINTEL: return "OpSubgroup2DBlockStoreINTEL"; | ||
| 411 | case OpSubgroupMatrixMultiplyAccumulateINTEL: return "OpSubgroupMatrixMultiplyAccumulateINTEL"; | ||
| 412 | case OpBitwiseFunctionINTEL: return "OpBitwiseFunctionINTEL"; | ||
| 413 | + case OpConditionalExtensionINTEL: return "OpConditionalExtensionINTEL"; | ||
| 414 | + case OpConditionalEntryPointINTEL: return "OpConditionalEntryPointINTEL"; | ||
| 415 | + case OpConditionalCapabilityINTEL: return "OpConditionalCapabilityINTEL"; | ||
| 416 | + case OpSpecConstantTargetINTEL: return "OpSpecConstantTargetINTEL"; | ||
| 417 | + case OpSpecConstantArchitectureINTEL: return "OpSpecConstantArchitectureINTEL"; | ||
| 418 | + case OpSpecConstantCapabilitiesINTEL: return "OpSpecConstantCapabilitiesINTEL"; | ||
| 419 | + case OpConditionalCopyObjectINTEL: return "OpConditionalCopyObjectINTEL"; | ||
| 420 | case OpGroupIMulKHR: return "OpGroupIMulKHR"; | ||
| 421 | case OpGroupFMulKHR: return "OpGroupFMulKHR"; | ||
| 422 | case OpGroupBitwiseAndKHR: return "OpGroupBitwiseAndKHR"; | ||
| 423 | diff --git a/include/spirv/unified1/spirv.hpp11 b/include/spirv/unified1/spirv.hpp11 | ||
| 424 | index b83ca46..e8479cb 100644 | ||
| 425 | --- a/include/spirv/unified1/spirv.hpp11 | ||
| 426 | +++ b/include/spirv/unified1/spirv.hpp11 | ||
| 427 | @@ -638,6 +638,7 @@ enum class Decoration : unsigned { | ||
| 428 | HostAccessINTEL = 6188, | ||
| 429 | InitModeINTEL = 6190, | ||
| 430 | ImplementInRegisterMapINTEL = 6191, | ||
| 431 | + ConditionalINTEL = 6247, | ||
| 432 | CacheControlLoadINTEL = 6442, | ||
| 433 | CacheControlStoreINTEL = 6443, | ||
| 434 | Max = 0x7fffffff, | ||
| 435 | @@ -1278,6 +1279,8 @@ enum class Capability : unsigned { | ||
| 436 | Subgroup2DBlockTransposeINTEL = 6230, | ||
| 437 | SubgroupMatrixMultiplyAccumulateINTEL = 6236, | ||
| 438 | TernaryBitwiseFunctionINTEL = 6241, | ||
| 439 | + SpecConditionalINTEL = 6245, | ||
| 440 | + FunctionVariantsINTEL = 6246, | ||
| 441 | GroupUniformArithmeticKHR = 6400, | ||
| 442 | TensorFloat32RoundingINTEL = 6425, | ||
| 443 | MaskedGatherScatterINTEL = 6427, | ||
| 444 | @@ -2402,6 +2405,13 @@ enum class Op : unsigned { | ||
| 445 | OpSubgroup2DBlockStoreINTEL = 6235, | ||
| 446 | OpSubgroupMatrixMultiplyAccumulateINTEL = 6237, | ||
| 447 | OpBitwiseFunctionINTEL = 6242, | ||
| 448 | + OpConditionalExtensionINTEL = 6248, | ||
| 449 | + OpConditionalEntryPointINTEL = 6249, | ||
| 450 | + OpConditionalCapabilityINTEL = 6250, | ||
| 451 | + OpSpecConstantTargetINTEL = 6251, | ||
| 452 | + OpSpecConstantArchitectureINTEL = 6252, | ||
| 453 | + OpSpecConstantCapabilitiesINTEL = 6253, | ||
| 454 | + OpConditionalCopyObjectINTEL = 6254, | ||
| 455 | OpGroupIMulKHR = 6401, | ||
| 456 | OpGroupFMulKHR = 6402, | ||
| 457 | OpGroupBitwiseAndKHR = 6403, | ||
| 458 | @@ -3221,6 +3231,13 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) { | ||
| 459 | case Op::OpSubgroup2DBlockStoreINTEL: *hasResult = false; *hasResultType = false; break; | ||
| 460 | case Op::OpSubgroupMatrixMultiplyAccumulateINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 461 | case Op::OpBitwiseFunctionINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 462 | + case Op::OpConditionalExtensionINTEL: *hasResult = false; *hasResultType = false; break; | ||
| 463 | + case Op::OpConditionalEntryPointINTEL: *hasResult = false; *hasResultType = false; break; | ||
| 464 | + case Op::OpConditionalCapabilityINTEL: *hasResult = false; *hasResultType = false; break; | ||
| 465 | + case Op::OpSpecConstantTargetINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 466 | + case Op::OpSpecConstantArchitectureINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 467 | + case Op::OpSpecConstantCapabilitiesINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 468 | + case Op::OpConditionalCopyObjectINTEL: *hasResult = true; *hasResultType = true; break; | ||
| 469 | case Op::OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break; | ||
| 470 | case Op::OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break; | ||
| 471 | case Op::OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break; | ||
| 472 | @@ -3761,6 +3778,7 @@ inline const char* DecorationToString(Decoration value) { | ||
| 473 | case Decoration::HostAccessINTEL: return "HostAccessINTEL"; | ||
| 474 | case Decoration::InitModeINTEL: return "InitModeINTEL"; | ||
| 475 | case Decoration::ImplementInRegisterMapINTEL: return "ImplementInRegisterMapINTEL"; | ||
| 476 | + case Decoration::ConditionalINTEL: return "ConditionalINTEL"; | ||
| 477 | case Decoration::CacheControlLoadINTEL: return "CacheControlLoadINTEL"; | ||
| 478 | case Decoration::CacheControlStoreINTEL: return "CacheControlStoreINTEL"; | ||
| 479 | default: return "Unknown"; | ||
| 480 | @@ -4200,6 +4218,8 @@ inline const char* CapabilityToString(Capability value) { | ||
| 481 | case Capability::Subgroup2DBlockTransposeINTEL: return "Subgroup2DBlockTransposeINTEL"; | ||
| 482 | case Capability::SubgroupMatrixMultiplyAccumulateINTEL: return "SubgroupMatrixMultiplyAccumulateINTEL"; | ||
| 483 | case Capability::TernaryBitwiseFunctionINTEL: return "TernaryBitwiseFunctionINTEL"; | ||
| 484 | + case Capability::SpecConditionalINTEL: return "SpecConditionalINTEL"; | ||
| 485 | + case Capability::FunctionVariantsINTEL: return "FunctionVariantsINTEL"; | ||
| 486 | case Capability::GroupUniformArithmeticKHR: return "GroupUniformArithmeticKHR"; | ||
| 487 | case Capability::TensorFloat32RoundingINTEL: return "TensorFloat32RoundingINTEL"; | ||
| 488 | case Capability::MaskedGatherScatterINTEL: return "MaskedGatherScatterINTEL"; | ||
| 489 | @@ -5194,6 +5214,13 @@ inline const char* OpToString(Op value) { | ||
| 490 | case Op::OpSubgroup2DBlockStoreINTEL: return "OpSubgroup2DBlockStoreINTEL"; | ||
| 491 | case Op::OpSubgroupMatrixMultiplyAccumulateINTEL: return "OpSubgroupMatrixMultiplyAccumulateINTEL"; | ||
| 492 | case Op::OpBitwiseFunctionINTEL: return "OpBitwiseFunctionINTEL"; | ||
| 493 | + case Op::OpConditionalExtensionINTEL: return "OpConditionalExtensionINTEL"; | ||
| 494 | + case Op::OpConditionalEntryPointINTEL: return "OpConditionalEntryPointINTEL"; | ||
| 495 | + case Op::OpConditionalCapabilityINTEL: return "OpConditionalCapabilityINTEL"; | ||
| 496 | + case Op::OpSpecConstantTargetINTEL: return "OpSpecConstantTargetINTEL"; | ||
| 497 | + case Op::OpSpecConstantArchitectureINTEL: return "OpSpecConstantArchitectureINTEL"; | ||
| 498 | + case Op::OpSpecConstantCapabilitiesINTEL: return "OpSpecConstantCapabilitiesINTEL"; | ||
| 499 | + case Op::OpConditionalCopyObjectINTEL: return "OpConditionalCopyObjectINTEL"; | ||
| 500 | case Op::OpGroupIMulKHR: return "OpGroupIMulKHR"; | ||
| 501 | case Op::OpGroupFMulKHR: return "OpGroupFMulKHR"; | ||
| 502 | case Op::OpGroupBitwiseAndKHR: return "OpGroupBitwiseAndKHR"; | ||
| 503 | diff --git a/include/spirv/unified1/spirv.json b/include/spirv/unified1/spirv.json | ||
| 504 | index 0668c98..e0c0230 100644 | ||
| 505 | --- a/include/spirv/unified1/spirv.json | ||
| 506 | +++ b/include/spirv/unified1/spirv.json | ||
| 507 | @@ -661,6 +661,7 @@ | ||
| 508 | "HostAccessINTEL": 6188, | ||
| 509 | "InitModeINTEL": 6190, | ||
| 510 | "ImplementInRegisterMapINTEL": 6191, | ||
| 511 | + "ConditionalINTEL": 6247, | ||
| 512 | "CacheControlLoadINTEL": 6442, | ||
| 513 | "CacheControlStoreINTEL": 6443 | ||
| 514 | } | ||
| 515 | @@ -1254,6 +1255,8 @@ | ||
| 516 | "Subgroup2DBlockTransposeINTEL": 6230, | ||
| 517 | "SubgroupMatrixMultiplyAccumulateINTEL": 6236, | ||
| 518 | "TernaryBitwiseFunctionINTEL": 6241, | ||
| 519 | + "SpecConditionalINTEL": 6245, | ||
| 520 | + "FunctionVariantsINTEL": 6246, | ||
| 521 | "GroupUniformArithmeticKHR": 6400, | ||
| 522 | "TensorFloat32RoundingINTEL": 6425, | ||
| 523 | "MaskedGatherScatterINTEL": 6427, | ||
| 524 | @@ -2383,6 +2386,13 @@ | ||
| 525 | "OpSubgroup2DBlockStoreINTEL": 6235, | ||
| 526 | "OpSubgroupMatrixMultiplyAccumulateINTEL": 6237, | ||
| 527 | "OpBitwiseFunctionINTEL": 6242, | ||
| 528 | + "OpConditionalExtensionINTEL": 6248, | ||
| 529 | + "OpConditionalEntryPointINTEL": 6249, | ||
| 530 | + "OpConditionalCapabilityINTEL": 6250, | ||
| 531 | + "OpSpecConstantTargetINTEL": 6251, | ||
| 532 | + "OpSpecConstantArchitectureINTEL": 6252, | ||
| 533 | + "OpSpecConstantCapabilitiesINTEL": 6253, | ||
| 534 | + "OpConditionalCopyObjectINTEL": 6254, | ||
| 535 | "OpGroupIMulKHR": 6401, | ||
| 536 | "OpGroupFMulKHR": 6402, | ||
| 537 | "OpGroupBitwiseAndKHR": 6403, | ||
| 538 | diff --git a/include/spirv/unified1/spirv.lua b/include/spirv/unified1/spirv.lua | ||
| 539 | index a612e5c..410060b 100644 | ||
| 540 | --- a/include/spirv/unified1/spirv.lua | ||
| 541 | +++ b/include/spirv/unified1/spirv.lua | ||
| 542 | @@ -629,6 +629,7 @@ spv = { | ||
| 543 | HostAccessINTEL = 6188, | ||
| 544 | InitModeINTEL = 6190, | ||
| 545 | ImplementInRegisterMapINTEL = 6191, | ||
| 546 | + ConditionalINTEL = 6247, | ||
| 547 | CacheControlLoadINTEL = 6442, | ||
| 548 | CacheControlStoreINTEL = 6443, | ||
| 549 | Max = 0x7fffffff, | ||
| 550 | @@ -1269,6 +1270,8 @@ spv = { | ||
| 551 | Subgroup2DBlockTransposeINTEL = 6230, | ||
| 552 | SubgroupMatrixMultiplyAccumulateINTEL = 6236, | ||
| 553 | TernaryBitwiseFunctionINTEL = 6241, | ||
| 554 | + SpecConditionalINTEL = 6245, | ||
| 555 | + FunctionVariantsINTEL = 6246, | ||
| 556 | GroupUniformArithmeticKHR = 6400, | ||
| 557 | TensorFloat32RoundingINTEL = 6425, | ||
| 558 | MaskedGatherScatterINTEL = 6427, | ||
| 559 | @@ -2393,6 +2396,13 @@ spv = { | ||
| 560 | OpSubgroup2DBlockStoreINTEL = 6235, | ||
| 561 | OpSubgroupMatrixMultiplyAccumulateINTEL = 6237, | ||
| 562 | OpBitwiseFunctionINTEL = 6242, | ||
| 563 | + OpConditionalExtensionINTEL = 6248, | ||
| 564 | + OpConditionalEntryPointINTEL = 6249, | ||
| 565 | + OpConditionalCapabilityINTEL = 6250, | ||
| 566 | + OpSpecConstantTargetINTEL = 6251, | ||
| 567 | + OpSpecConstantArchitectureINTEL = 6252, | ||
| 568 | + OpSpecConstantCapabilitiesINTEL = 6253, | ||
| 569 | + OpConditionalCopyObjectINTEL = 6254, | ||
| 570 | OpGroupIMulKHR = 6401, | ||
| 571 | OpGroupFMulKHR = 6402, | ||
| 572 | OpGroupBitwiseAndKHR = 6403, | ||
| 573 | diff --git a/include/spirv/unified1/spirv.py b/include/spirv/unified1/spirv.py | ||
| 574 | index 5adfded..0b77b4f 100644 | ||
| 575 | --- a/include/spirv/unified1/spirv.py | ||
| 576 | +++ b/include/spirv/unified1/spirv.py | ||
| 577 | @@ -611,6 +611,7 @@ spv = { | ||
| 578 | 'HostAccessINTEL' : 6188, | ||
| 579 | 'InitModeINTEL' : 6190, | ||
| 580 | 'ImplementInRegisterMapINTEL' : 6191, | ||
| 581 | + 'ConditionalINTEL' : 6247, | ||
| 582 | 'CacheControlLoadINTEL' : 6442, | ||
| 583 | 'CacheControlStoreINTEL' : 6443, | ||
| 584 | }, | ||
| 585 | @@ -1240,6 +1241,8 @@ spv = { | ||
| 586 | 'Subgroup2DBlockTransposeINTEL' : 6230, | ||
| 587 | 'SubgroupMatrixMultiplyAccumulateINTEL' : 6236, | ||
| 588 | 'TernaryBitwiseFunctionINTEL' : 6241, | ||
| 589 | + 'SpecConditionalINTEL' : 6245, | ||
| 590 | + 'FunctionVariantsINTEL' : 6246, | ||
| 591 | 'GroupUniformArithmeticKHR' : 6400, | ||
| 592 | 'TensorFloat32RoundingINTEL' : 6425, | ||
| 593 | 'MaskedGatherScatterINTEL' : 6427, | ||
| 594 | @@ -2336,6 +2339,13 @@ spv = { | ||
| 595 | 'OpSubgroup2DBlockStoreINTEL' : 6235, | ||
| 596 | 'OpSubgroupMatrixMultiplyAccumulateINTEL' : 6237, | ||
| 597 | 'OpBitwiseFunctionINTEL' : 6242, | ||
| 598 | + 'OpConditionalExtensionINTEL' : 6248, | ||
| 599 | + 'OpConditionalEntryPointINTEL' : 6249, | ||
| 600 | + 'OpConditionalCapabilityINTEL' : 6250, | ||
| 601 | + 'OpSpecConstantTargetINTEL' : 6251, | ||
| 602 | + 'OpSpecConstantArchitectureINTEL' : 6252, | ||
| 603 | + 'OpSpecConstantCapabilitiesINTEL' : 6253, | ||
| 604 | + 'OpConditionalCopyObjectINTEL' : 6254, | ||
| 605 | 'OpGroupIMulKHR' : 6401, | ||
| 606 | 'OpGroupFMulKHR' : 6402, | ||
| 607 | 'OpGroupBitwiseAndKHR' : 6403, | ||
| 608 | diff --git a/include/spirv/unified1/spv.d b/include/spirv/unified1/spv.d | ||
| 609 | index 3c5130a..a5763e6 100644 | ||
| 610 | --- a/include/spirv/unified1/spv.d | ||
| 611 | +++ b/include/spirv/unified1/spv.d | ||
| 612 | @@ -657,6 +657,7 @@ enum Decoration : uint | ||
| 613 | HostAccessINTEL = 6188, | ||
| 614 | InitModeINTEL = 6190, | ||
| 615 | ImplementInRegisterMapINTEL = 6191, | ||
| 616 | + ConditionalINTEL = 6247, | ||
| 617 | CacheControlLoadINTEL = 6442, | ||
| 618 | CacheControlStoreINTEL = 6443, | ||
| 619 | Max = 0x7fffffff, | ||
| 620 | @@ -1314,6 +1315,8 @@ enum Capability : uint | ||
| 621 | Subgroup2DBlockTransposeINTEL = 6230, | ||
| 622 | SubgroupMatrixMultiplyAccumulateINTEL = 6236, | ||
| 623 | TernaryBitwiseFunctionINTEL = 6241, | ||
| 624 | + SpecConditionalINTEL = 6245, | ||
| 625 | + FunctionVariantsINTEL = 6246, | ||
| 626 | GroupUniformArithmeticKHR = 6400, | ||
| 627 | TensorFloat32RoundingINTEL = 6425, | ||
| 628 | MaskedGatherScatterINTEL = 6427, | ||
| 629 | @@ -2474,6 +2477,13 @@ enum Op : uint | ||
| 630 | OpSubgroup2DBlockStoreINTEL = 6235, | ||
| 631 | OpSubgroupMatrixMultiplyAccumulateINTEL = 6237, | ||
| 632 | OpBitwiseFunctionINTEL = 6242, | ||
| 633 | + OpConditionalExtensionINTEL = 6248, | ||
| 634 | + OpConditionalEntryPointINTEL = 6249, | ||
| 635 | + OpConditionalCapabilityINTEL = 6250, | ||
| 636 | + OpSpecConstantTargetINTEL = 6251, | ||
| 637 | + OpSpecConstantArchitectureINTEL = 6252, | ||
| 638 | + OpSpecConstantCapabilitiesINTEL = 6253, | ||
| 639 | + OpConditionalCopyObjectINTEL = 6254, | ||
| 640 | OpGroupIMulKHR = 6401, | ||
| 641 | OpGroupFMulKHR = 6402, | ||
| 642 | OpGroupBitwiseAndKHR = 6403, | ||
diff --git a/meta/recipes-graphics/spir/spirv-headers_1.4.321.0.bb b/meta/recipes-graphics/spir/spirv-headers_1.4.328.1.bb index 807e34abcc..2b750e4b92 100644 --- a/meta/recipes-graphics/spir/spirv-headers_1.4.321.0.bb +++ b/meta/recipes-graphics/spir/spirv-headers_1.4.328.1.bb | |||
| @@ -4,10 +4,9 @@ HOMEPAGE = "https://www.khronos.org/registry/spir-v" | |||
| 4 | LICENSE = "MIT & CC-BY-4.0" | 4 | LICENSE = "MIT & CC-BY-4.0" |
| 5 | LIC_FILES_CHKSUM = "file://LICENSE;md5=a0dcaa512cc2dee95fe0fd791ee83a18" | 5 | LIC_FILES_CHKSUM = "file://LICENSE;md5=a0dcaa512cc2dee95fe0fd791ee83a18" |
| 6 | 6 | ||
| 7 | SRCREV = "2a611a970fdbc41ac2e3e328802aed9985352dca" | 7 | SRCREV = "01e0577914a75a2569c846778c2f93aa8e6feddd" |
| 8 | SRC_URI = "git://github.com/KhronosGroup/SPIRV-Headers;protocol=https;branch=main \ | 8 | SRC_URI = "git://github.com/KhronosGroup/SPIRV-Headers;protocol=https;branch=vulkan-sdk-1.4.328 \ |
| 9 | file://0001-Add-SPV_INTEL_function_variants-532.patch \ | 9 | " |
| 10 | " | ||
| 11 | PE = "1" | 10 | PE = "1" |
| 12 | # These recipes need to be updated in lockstep with each other: | 11 | # These recipes need to be updated in lockstep with each other: |
| 13 | # glslang, vulkan-headers, vulkan-loader, vulkan-tools, spirv-headers, spirv-tools | 12 | # glslang, vulkan-headers, vulkan-loader, vulkan-tools, spirv-headers, spirv-tools |
diff --git a/meta/recipes-graphics/spir/spirv-tools/0001-SPV_INTEL_function_variants-basic-asm-dis-support-61.patch b/meta/recipes-graphics/spir/spirv-tools/0001-SPV_INTEL_function_variants-basic-asm-dis-support-61.patch deleted file mode 100644 index d4ca23c729..0000000000 --- a/meta/recipes-graphics/spir/spirv-tools/0001-SPV_INTEL_function_variants-basic-asm-dis-support-61.patch +++ /dev/null | |||
| @@ -1,289 +0,0 @@ | |||
| 1 | From 28a883ba4c67f58a9540fb0651c647bb02883622 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: David Neto <dneto@google.com> | ||
| 3 | Date: Wed, 25 Jun 2025 11:27:23 -0400 | ||
| 4 | Subject: [PATCH] SPV_INTEL_function_variants: basic asm, dis support (#6195) | ||
| 5 | |||
| 6 | The challenging part is that there are instructions that | ||
| 7 | take zero or more Capability operands. So we have to introduce | ||
| 8 | SPV_TYPE_OPERAND_VARIABLE_CAPABILITY and SPV_TYPE_OPERAND_OPTIONAL_CAPABILITY. | ||
| 9 | |||
| 10 | Remove deprecated enums for the first and last variable or optional | ||
| 11 | enums. | ||
| 12 | Upstream-Status: Backport [https://github.com/KhronosGroup/SPIRV-Tools/commit/28a883ba4c67f58a9540fb0651c647bb02883622] | ||
| 13 | Signed-off-by: Khem Raj <raj.khem@gmail.com> | ||
| 14 | --- | ||
| 15 | DEPS | 2 +- | ||
| 16 | include/spirv-tools/libspirv.h | 48 +++++++---------- | ||
| 17 | source/binary.cpp | 3 ++ | ||
| 18 | source/disassemble.cpp | 1 + | ||
| 19 | source/operand.cpp | 7 +++ | ||
| 20 | test/text_to_binary.extension_test.cpp | 73 ++++++++++++++++++++++++++ | ||
| 21 | utils/ggt.py | 3 +- | ||
| 22 | 7 files changed, 107 insertions(+), 30 deletions(-) | ||
| 23 | |||
| 24 | diff --git a/DEPS b/DEPS | ||
| 25 | index e25ca513..511fd718 100644 | ||
| 26 | --- a/DEPS | ||
| 27 | +++ b/DEPS | ||
| 28 | @@ -14,7 +14,7 @@ vars = { | ||
| 29 | |||
| 30 | 're2_revision': 'c84a140c93352cdabbfb547c531be34515b12228', | ||
| 31 | |||
| 32 | - 'spirv_headers_revision': '2a611a970fdbc41ac2e3e328802aed9985352dca', | ||
| 33 | + 'spirv_headers_revision': '9e3836d7d6023843a72ecd3fbf3f09b1b6747a9e', | ||
| 34 | |||
| 35 | 'mimalloc_revision': '09a27098aa6e9286518bd9c74e6ffa7199c3f04e', | ||
| 36 | } | ||
| 37 | diff --git a/include/spirv-tools/libspirv.h b/include/spirv-tools/libspirv.h | ||
| 38 | index a2a032a0..2a604e94 100644 | ||
| 39 | --- a/include/spirv-tools/libspirv.h | ||
| 40 | +++ b/include/spirv-tools/libspirv.h | ||
| 41 | @@ -189,36 +189,24 @@ typedef enum spv_operand_type_t { | ||
| 42 | SPV_OPERAND_TYPE_MEMORY_ACCESS, // SPIR-V Sec 3.26 | ||
| 43 | SPV_OPERAND_TYPE_FRAGMENT_SHADING_RATE, // SPIR-V Sec 3.FSR | ||
| 44 | |||
| 45 | -// NOTE: New concrete enum values should be added at the end. | ||
| 46 | - | ||
| 47 | -// The "optional" and "variable" operand types are only used internally by | ||
| 48 | -// the assembler and the binary parser. | ||
| 49 | -// There are two categories: | ||
| 50 | -// Optional : expands to 0 or 1 operand, like ? in regular expressions. | ||
| 51 | -// Variable : expands to 0, 1 or many operands or pairs of operands. | ||
| 52 | -// This is similar to * in regular expressions. | ||
| 53 | - | ||
| 54 | -// NOTE: These FIRST_* and LAST_* enum values are DEPRECATED. | ||
| 55 | -// The concept of "optional" and "variable" operand types are only intended | ||
| 56 | -// for use as an implementation detail of parsing SPIR-V, either in text or | ||
| 57 | -// binary form. Instead of using enum ranges, use characteristic function | ||
| 58 | -// spvOperandIsConcrete. | ||
| 59 | -// The use of enum value ranges in a public API makes it difficult to insert | ||
| 60 | -// new values into a range without also breaking binary compatibility. | ||
| 61 | -// | ||
| 62 | -// Macros for defining bounds on optional and variable operand types. | ||
| 63 | -// Any variable operand type is also optional. | ||
| 64 | -// TODO(dneto): Remove SPV_OPERAND_TYPE_FIRST_* and SPV_OPERAND_TYPE_LAST_* | ||
| 65 | -#define FIRST_OPTIONAL(ENUM) ENUM, SPV_OPERAND_TYPE_FIRST_OPTIONAL_TYPE = ENUM | ||
| 66 | -#define FIRST_VARIABLE(ENUM) ENUM, SPV_OPERAND_TYPE_FIRST_VARIABLE_TYPE = ENUM | ||
| 67 | -#define LAST_VARIABLE(ENUM) \ | ||
| 68 | - ENUM, SPV_OPERAND_TYPE_LAST_VARIABLE_TYPE = ENUM, \ | ||
| 69 | - SPV_OPERAND_TYPE_LAST_OPTIONAL_TYPE = ENUM | ||
| 70 | + // NOTE: New concrete enum values should be added at the end. | ||
| 71 | + | ||
| 72 | + // The "optional" and "variable" operand types are only used internally by | ||
| 73 | + // the assembler and the binary parser. | ||
| 74 | + // There are two categories: | ||
| 75 | + // Optional : expands to 0 or 1 operand, like ? in regular expressions. | ||
| 76 | + // Variable : expands to 0, 1 or many operands or pairs of operands. | ||
| 77 | + // This is similar to * in regular expressions. | ||
| 78 | + | ||
| 79 | + // Use characteristic function spvOperandIsConcrete to classify the | ||
| 80 | + // operand types; when it returns false, the operand is optional or variable. | ||
| 81 | + // | ||
| 82 | + // Any variable operand type is also optional. | ||
| 83 | |||
| 84 | // An optional operand represents zero or one logical operands. | ||
| 85 | // In an instruction definition, this may only appear at the end of the | ||
| 86 | // operand types. | ||
| 87 | - FIRST_OPTIONAL(SPV_OPERAND_TYPE_OPTIONAL_ID), | ||
| 88 | + SPV_OPERAND_TYPE_OPTIONAL_ID, | ||
| 89 | // An optional image operand type. | ||
| 90 | SPV_OPERAND_TYPE_OPTIONAL_IMAGE, | ||
| 91 | // An optional memory access type. | ||
| 92 | @@ -243,7 +231,7 @@ typedef enum spv_operand_type_t { | ||
| 93 | // A variable operand represents zero or more logical operands. | ||
| 94 | // In an instruction definition, this may only appear at the end of the | ||
| 95 | // operand types. | ||
| 96 | - FIRST_VARIABLE(SPV_OPERAND_TYPE_VARIABLE_ID), | ||
| 97 | + SPV_OPERAND_TYPE_VARIABLE_ID, | ||
| 98 | SPV_OPERAND_TYPE_VARIABLE_LITERAL_INTEGER, | ||
| 99 | // A sequence of zero or more pairs of (typed literal integer, Id). | ||
| 100 | // Expands to zero or more: | ||
| 101 | @@ -251,7 +239,7 @@ typedef enum spv_operand_type_t { | ||
| 102 | // where the literal number must always be an integer of some sort. | ||
| 103 | SPV_OPERAND_TYPE_VARIABLE_LITERAL_INTEGER_ID, | ||
| 104 | // A sequence of zero or more pairs of (Id, Literal integer) | ||
| 105 | - LAST_VARIABLE(SPV_OPERAND_TYPE_VARIABLE_ID_LITERAL_INTEGER), | ||
| 106 | + SPV_OPERAND_TYPE_VARIABLE_ID_LITERAL_INTEGER, | ||
| 107 | |||
| 108 | // The following are concrete enum types from the DebugInfo extended | ||
| 109 | // instruction set. | ||
| 110 | @@ -343,6 +331,10 @@ typedef enum spv_operand_type_t { | ||
| 111 | SPV_OPERAND_TYPE_TENSOR_OPERANDS, | ||
| 112 | SPV_OPERAND_TYPE_OPTIONAL_TENSOR_OPERANDS, | ||
| 113 | |||
| 114 | + // SPV_INTEL_function_variants | ||
| 115 | + SPV_OPERAND_TYPE_OPTIONAL_CAPABILITY, | ||
| 116 | + SPV_OPERAND_TYPE_VARIABLE_CAPABILITY, | ||
| 117 | + | ||
| 118 | // This is a sentinel value, and does not represent an operand type. | ||
| 119 | // It should come last. | ||
| 120 | SPV_OPERAND_TYPE_NUM_OPERAND_TYPES, | ||
| 121 | diff --git a/source/binary.cpp b/source/binary.cpp | ||
| 122 | index 180d0a99..8e4d899f 100644 | ||
| 123 | --- a/source/binary.cpp | ||
| 124 | +++ b/source/binary.cpp | ||
| 125 | @@ -636,6 +636,7 @@ spv_result_t Parser::parseOperand(size_t inst_offset, | ||
| 126 | } break; | ||
| 127 | |||
| 128 | case SPV_OPERAND_TYPE_CAPABILITY: | ||
| 129 | + case SPV_OPERAND_TYPE_OPTIONAL_CAPABILITY: | ||
| 130 | case SPV_OPERAND_TYPE_EXECUTION_MODEL: | ||
| 131 | case SPV_OPERAND_TYPE_ADDRESSING_MODEL: | ||
| 132 | case SPV_OPERAND_TYPE_MEMORY_MODEL: | ||
| 133 | @@ -689,6 +690,8 @@ spv_result_t Parser::parseOperand(size_t inst_offset, | ||
| 134 | parsed_operand.type = SPV_OPERAND_TYPE_PACKED_VECTOR_FORMAT; | ||
| 135 | if (type == SPV_OPERAND_TYPE_OPTIONAL_FPENCODING) | ||
| 136 | parsed_operand.type = SPV_OPERAND_TYPE_FPENCODING; | ||
| 137 | + if (type == SPV_OPERAND_TYPE_OPTIONAL_CAPABILITY) | ||
| 138 | + parsed_operand.type = SPV_OPERAND_TYPE_CAPABILITY; | ||
| 139 | |||
| 140 | const spvtools::OperandDesc* entry = nullptr; | ||
| 141 | if (spvtools::LookupOperand(type, word, &entry)) { | ||
| 142 | diff --git a/source/disassemble.cpp b/source/disassemble.cpp | ||
| 143 | index 2d9bb0ff..4267333a 100644 | ||
| 144 | --- a/source/disassemble.cpp | ||
| 145 | +++ b/source/disassemble.cpp | ||
| 146 | @@ -907,6 +907,7 @@ void InstructionDisassembler::EmitOperand(std::ostream& stream, | ||
| 147 | stream << '"'; | ||
| 148 | } break; | ||
| 149 | case SPV_OPERAND_TYPE_CAPABILITY: | ||
| 150 | + case SPV_OPERAND_TYPE_OPTIONAL_CAPABILITY: | ||
| 151 | case SPV_OPERAND_TYPE_SOURCE_LANGUAGE: | ||
| 152 | case SPV_OPERAND_TYPE_EXECUTION_MODEL: | ||
| 153 | case SPV_OPERAND_TYPE_ADDRESSING_MODEL: | ||
| 154 | diff --git a/source/operand.cpp b/source/operand.cpp | ||
| 155 | index c635c72d..d7fc535c 100644 | ||
| 156 | --- a/source/operand.cpp | ||
| 157 | +++ b/source/operand.cpp | ||
| 158 | @@ -111,6 +111,7 @@ const char* spvOperandTypeStr(spv_operand_type_t type) { | ||
| 159 | case SPV_OPERAND_TYPE_KERNEL_PROFILING_INFO: | ||
| 160 | return "kernel profiling info"; | ||
| 161 | case SPV_OPERAND_TYPE_CAPABILITY: | ||
| 162 | + case SPV_OPERAND_TYPE_OPTIONAL_CAPABILITY: | ||
| 163 | return "capability"; | ||
| 164 | case SPV_OPERAND_TYPE_RAY_FLAGS: | ||
| 165 | return "ray flags"; | ||
| 166 | @@ -394,6 +395,7 @@ bool spvOperandIsOptional(spv_operand_type_t type) { | ||
| 167 | case SPV_OPERAND_TYPE_OPTIONAL_RAW_ACCESS_CHAIN_OPERANDS: | ||
| 168 | case SPV_OPERAND_TYPE_OPTIONAL_FPENCODING: | ||
| 169 | case SPV_OPERAND_TYPE_OPTIONAL_TENSOR_OPERANDS: | ||
| 170 | + case SPV_OPERAND_TYPE_OPTIONAL_CAPABILITY: | ||
| 171 | return true; | ||
| 172 | default: | ||
| 173 | break; | ||
| 174 | @@ -408,6 +410,7 @@ bool spvOperandIsVariable(spv_operand_type_t type) { | ||
| 175 | case SPV_OPERAND_TYPE_VARIABLE_LITERAL_INTEGER: | ||
| 176 | case SPV_OPERAND_TYPE_VARIABLE_LITERAL_INTEGER_ID: | ||
| 177 | case SPV_OPERAND_TYPE_VARIABLE_ID_LITERAL_INTEGER: | ||
| 178 | + case SPV_OPERAND_TYPE_VARIABLE_CAPABILITY: | ||
| 179 | return true; | ||
| 180 | default: | ||
| 181 | break; | ||
| 182 | @@ -439,6 +442,10 @@ bool spvExpandOperandSequenceOnce(spv_operand_type_t type, | ||
| 183 | pattern->push_back(SPV_OPERAND_TYPE_LITERAL_INTEGER); | ||
| 184 | pattern->push_back(SPV_OPERAND_TYPE_OPTIONAL_ID); | ||
| 185 | return true; | ||
| 186 | + case SPV_OPERAND_TYPE_VARIABLE_CAPABILITY: | ||
| 187 | + pattern->push_back(type); | ||
| 188 | + pattern->push_back(SPV_OPERAND_TYPE_OPTIONAL_CAPABILITY); | ||
| 189 | + return true; | ||
| 190 | default: | ||
| 191 | break; | ||
| 192 | } | ||
| 193 | diff --git a/test/text_to_binary.extension_test.cpp b/test/text_to_binary.extension_test.cpp | ||
| 194 | index 65079d1b..39accfc1 100644 | ||
| 195 | --- a/test/text_to_binary.extension_test.cpp | ||
| 196 | +++ b/test/text_to_binary.extension_test.cpp | ||
| 197 | @@ -1495,5 +1495,78 @@ INSTANTIATE_TEST_SUITE_P( | ||
| 198 | SaturatedToLargestFloat8NormalConversionEXT)})}, | ||
| 199 | }))); | ||
| 200 | |||
| 201 | +// SPV_INTEL_function_variants | ||
| 202 | +// https://github.com/intel/llvm/blob/sycl/sycl/doc/design/spirv-extensions/SPV_INTEL_function_variants.asciidoc | ||
| 203 | +INSTANTIATE_TEST_SUITE_P( | ||
| 204 | + SPV_INTEL_function_variants, ExtensionRoundTripTest, | ||
| 205 | + Combine( | ||
| 206 | + Values(SPV_ENV_UNIVERSAL_1_0, SPV_ENV_UNIVERSAL_1_6), | ||
| 207 | + ValuesIn(std::vector<AssemblyCase>{ | ||
| 208 | + {"OpExtension \"SPV_INTEL_function_variants\"\n", | ||
| 209 | + MakeInstruction(spv::Op::OpExtension, | ||
| 210 | + MakeVector("SPV_INTEL_function_variants"))}, | ||
| 211 | + {"OpCapability SpecConditionalINTEL\n", | ||
| 212 | + MakeInstruction( | ||
| 213 | + spv::Op::OpCapability, | ||
| 214 | + {(uint32_t)spv::Capability::SpecConditionalINTEL})}, | ||
| 215 | + {"OpCapability FunctionVariantsINTEL\n", | ||
| 216 | + MakeInstruction( | ||
| 217 | + spv::Op::OpCapability, | ||
| 218 | + {(uint32_t)spv::Capability::FunctionVariantsINTEL})}, | ||
| 219 | + {"OpDecorate %1 ConditionalINTEL %2\n", | ||
| 220 | + MakeInstruction(spv::Op::OpDecorate, | ||
| 221 | + {1, (uint32_t)spv::Decoration::ConditionalINTEL, | ||
| 222 | + 2})}, | ||
| 223 | + | ||
| 224 | + {"OpConditionalExtensionINTEL %1 \"foo\"\n", | ||
| 225 | + MakeInstruction(spv::Op::OpConditionalExtensionINTEL, {1}, | ||
| 226 | + MakeVector("foo"))}, | ||
| 227 | + | ||
| 228 | + {"OpConditionalEntryPointINTEL %1 Kernel %2 \"foo\"\n", | ||
| 229 | + MakeInstruction(spv::Op::OpConditionalEntryPointINTEL, | ||
| 230 | + {1, (uint32_t)spv::ExecutionModel::Kernel, 2}, | ||
| 231 | + MakeVector("foo"))}, | ||
| 232 | + | ||
| 233 | + {"OpConditionalCapabilityINTEL %1 Kernel\n", | ||
| 234 | + MakeInstruction(spv::Op::OpConditionalCapabilityINTEL, | ||
| 235 | + {1, (uint32_t)spv::ExecutionModel::Kernel})}, | ||
| 236 | + | ||
| 237 | + {"%2 = OpSpecConstantTargetINTEL %1 42\n", | ||
| 238 | + MakeInstruction(spv::Op::OpSpecConstantTargetINTEL, {1, 2, 42})}, | ||
| 239 | + | ||
| 240 | + {"%2 = OpSpecConstantTargetINTEL %1 42 99\n", | ||
| 241 | + MakeInstruction(spv::Op::OpSpecConstantTargetINTEL, | ||
| 242 | + {1, 2, 42, 99})}, | ||
| 243 | + | ||
| 244 | + {"%2 = OpSpecConstantTargetINTEL %1 42 99 108\n", | ||
| 245 | + MakeInstruction(spv::Op::OpSpecConstantTargetINTEL, | ||
| 246 | + {1, 2, 42, 99, 108})}, | ||
| 247 | + | ||
| 248 | + {"%2 = OpSpecConstantArchitectureINTEL %1 42 99 108 72\n", | ||
| 249 | + MakeInstruction(spv::Op::OpSpecConstantArchitectureINTEL, | ||
| 250 | + {1, 2, 42, 99, 108, 72})}, | ||
| 251 | + | ||
| 252 | + {"%2 = OpSpecConstantCapabilitiesINTEL %1\n", | ||
| 253 | + MakeInstruction(spv::Op::OpSpecConstantCapabilitiesINTEL, {1, 2})}, | ||
| 254 | + | ||
| 255 | + {"%2 = OpSpecConstantCapabilitiesINTEL %1 Kernel\n", | ||
| 256 | + MakeInstruction(spv::Op::OpSpecConstantCapabilitiesINTEL, | ||
| 257 | + {1, 2, (uint32_t)spv::Capability::Kernel})}, | ||
| 258 | + | ||
| 259 | + {"%2 = OpSpecConstantCapabilitiesINTEL %1 Kernel Shader\n", | ||
| 260 | + MakeInstruction(spv::Op::OpSpecConstantCapabilitiesINTEL, | ||
| 261 | + {1, 2, (uint32_t)spv::Capability::Kernel, | ||
| 262 | + (uint32_t)spv::Capability::Shader})}, | ||
| 263 | + | ||
| 264 | + {"%2 = OpConditionalCopyObjectINTEL %1 %3 %4\n", | ||
| 265 | + MakeInstruction(spv::Op::OpConditionalCopyObjectINTEL, | ||
| 266 | + {1, 2, 3, 4})}, | ||
| 267 | + | ||
| 268 | + {"%2 = OpConditionalCopyObjectINTEL %1 %3 %4 %5 %6\n", | ||
| 269 | + MakeInstruction(spv::Op::OpConditionalCopyObjectINTEL, | ||
| 270 | + {1, 2, 3, 4, 5, 6})}, | ||
| 271 | + | ||
| 272 | + }))); | ||
| 273 | + | ||
| 274 | } // namespace | ||
| 275 | } // namespace spvtools | ||
| 276 | diff --git a/utils/ggt.py b/utils/ggt.py | ||
| 277 | index 258c1b00..45262ba8 100755 | ||
| 278 | --- a/utils/ggt.py | ||
| 279 | +++ b/utils/ggt.py | ||
| 280 | @@ -242,7 +242,8 @@ class Grammar(): | ||
| 281 | 'MatrixMultiplyAccumulateOperands', | ||
| 282 | 'RawAccessChainOperands', | ||
| 283 | 'FPEncoding', | ||
| 284 | - 'TensorOperands'] | ||
| 285 | + 'TensorOperands', | ||
| 286 | + 'Capability'] | ||
| 287 | |||
| 288 | def dump(self) -> None: | ||
| 289 | self.context.dump() | ||
diff --git a/meta/recipes-graphics/spir/spirv-tools_1.4.321.0.bb b/meta/recipes-graphics/spir/spirv-tools_1.4.328.1.bb index c3e0d17d87..e5aedb1620 100644 --- a/meta/recipes-graphics/spir/spirv-tools_1.4.321.0.bb +++ b/meta/recipes-graphics/spir/spirv-tools_1.4.328.1.bb | |||
| @@ -7,9 +7,8 @@ SECTION = "graphics" | |||
| 7 | LICENSE = "Apache-2.0" | 7 | LICENSE = "Apache-2.0" |
| 8 | LIC_FILES_CHKSUM = "file://LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57" | 8 | LIC_FILES_CHKSUM = "file://LICENSE;md5=3b83ef96387f14655fc854ddc3c6bd57" |
| 9 | 9 | ||
| 10 | SRCREV = "33e02568181e3312f49a3cf33df470bf96ef293a" | 10 | SRCREV = "7f2d9ee926f98fc77a3ed1e1e0f113b8c9c49458" |
| 11 | SRC_URI = "git://github.com/KhronosGroup/SPIRV-Tools.git;branch=main;protocol=https \ | 11 | SRC_URI = "git://github.com/KhronosGroup/SPIRV-Tools.git;branch=vulkan-sdk-1.4.328;protocol=https \ |
| 12 | file://0001-SPV_INTEL_function_variants-basic-asm-dis-support-61.patch \ | ||
| 13 | " | 12 | " |
| 14 | PE = "1" | 13 | PE = "1" |
| 15 | # These recipes need to be updated in lockstep with each other: | 14 | # These recipes need to be updated in lockstep with each other: |
diff --git a/meta/recipes-graphics/vulkan/vulkan-headers_1.4.321.0.bb b/meta/recipes-graphics/vulkan/vulkan-headers_1.4.328.1.bb index b3413b0e6b..d531ec8e87 100644 --- a/meta/recipes-graphics/vulkan/vulkan-headers_1.4.321.0.bb +++ b/meta/recipes-graphics/vulkan/vulkan-headers_1.4.328.1.bb | |||
| @@ -9,9 +9,9 @@ SECTION = "libs" | |||
| 9 | 9 | ||
| 10 | LICENSE = "Apache-2.0 & MIT" | 10 | LICENSE = "Apache-2.0 & MIT" |
| 11 | LIC_FILES_CHKSUM = "file://LICENSE.md;md5=1bc355d8c4196f774c8b87ed1a8dd625" | 11 | LIC_FILES_CHKSUM = "file://LICENSE.md;md5=1bc355d8c4196f774c8b87ed1a8dd625" |
| 12 | SRC_URI = "git://github.com/KhronosGroup/Vulkan-Headers.git;branch=main;protocol=https" | 12 | SRC_URI = "git://github.com/KhronosGroup/Vulkan-Headers.git;branch=vulkan-sdk-1.4.328;protocol=https" |
| 13 | 13 | ||
| 14 | SRCREV = "2cd90f9d20df57eac214c148f3aed885372ddcfe" | 14 | SRCREV = "19725e4d48082fe78e26622b15d3080ccd54112b" |
| 15 | 15 | ||
| 16 | inherit cmake | 16 | inherit cmake |
| 17 | 17 | ||
diff --git a/meta/recipes-graphics/vulkan/vulkan-loader_1.4.321.0.bb b/meta/recipes-graphics/vulkan/vulkan-loader_1.4.328.1.bb index 8ad088fa7e..d80e84a34e 100644 --- a/meta/recipes-graphics/vulkan/vulkan-loader_1.4.321.0.bb +++ b/meta/recipes-graphics/vulkan/vulkan-loader_1.4.328.1.bb | |||
| @@ -9,8 +9,8 @@ SECTION = "libs" | |||
| 9 | 9 | ||
| 10 | LICENSE = "Apache-2.0" | 10 | LICENSE = "Apache-2.0" |
| 11 | LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=7dbefed23242760aa3475ee42801c5ac" | 11 | LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=7dbefed23242760aa3475ee42801c5ac" |
| 12 | SRC_URI = "git://github.com/KhronosGroup/Vulkan-Loader.git;branch=vulkan-sdk-1.4.321;protocol=https" | 12 | SRC_URI = "git://github.com/KhronosGroup/Vulkan-Loader.git;branch=vulkan-sdk-1.4.328;protocol=https" |
| 13 | SRCREV = "da8d2caad9341ca8c5a7c3deba217d7da50a7c24" | 13 | SRCREV = "0a278cc725089cb67bf6027076e5d72f97c04d86" |
| 14 | 14 | ||
| 15 | REQUIRED_DISTRO_FEATURES = "vulkan" | 15 | REQUIRED_DISTRO_FEATURES = "vulkan" |
| 16 | 16 | ||
diff --git a/meta/recipes-graphics/vulkan/vulkan-tools_1.4.321.0.bb b/meta/recipes-graphics/vulkan/vulkan-tools_1.4.328.1.bb index 26c196336e..34823b295c 100644 --- a/meta/recipes-graphics/vulkan/vulkan-tools_1.4.321.0.bb +++ b/meta/recipes-graphics/vulkan/vulkan-tools_1.4.328.1.bb | |||
| @@ -6,8 +6,8 @@ SECTION = "libs" | |||
| 6 | 6 | ||
| 7 | LICENSE = "Apache-2.0" | 7 | LICENSE = "Apache-2.0" |
| 8 | LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=3b83ef96387f14655fc854ddc3c6bd57" | 8 | LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=3b83ef96387f14655fc854ddc3c6bd57" |
| 9 | SRC_URI = "git://github.com/KhronosGroup/Vulkan-Tools.git;branch=vulkan-sdk-1.4.321;protocol=https" | 9 | SRC_URI = "git://github.com/KhronosGroup/Vulkan-Tools.git;branch=vulkan-sdk-1.4.328;protocol=https" |
| 10 | SRCREV = "06ae73a3dc3a03466817d8370355203dac7b79b1" | 10 | SRCREV = "c08c91e473dcab3d5042e85856b005562fa5dbbb" |
| 11 | 11 | ||
| 12 | inherit cmake features_check pkgconfig | 12 | inherit cmake features_check pkgconfig |
| 13 | ANY_OF_DISTRO_FEATURES = "x11 wayland" | 13 | ANY_OF_DISTRO_FEATURES = "x11 wayland" |
diff --git a/meta/recipes-graphics/vulkan/vulkan-utility-libraries_1.4.321.0.bb b/meta/recipes-graphics/vulkan/vulkan-utility-libraries_1.4.328.1.bb index 54e8af6dcf..d59efaaaee 100644 --- a/meta/recipes-graphics/vulkan/vulkan-utility-libraries_1.4.321.0.bb +++ b/meta/recipes-graphics/vulkan/vulkan-utility-libraries_1.4.328.1.bb | |||
| @@ -9,8 +9,8 @@ SECTION = "libs" | |||
| 9 | LICENSE = "Apache-2.0" | 9 | LICENSE = "Apache-2.0" |
| 10 | LIC_FILES_CHKSUM = "file://LICENSE.md;md5=4ca2d6799091aaa98a8520f1b793939b" | 10 | LIC_FILES_CHKSUM = "file://LICENSE.md;md5=4ca2d6799091aaa98a8520f1b793939b" |
| 11 | 11 | ||
| 12 | SRC_URI = "git://github.com/KhronosGroup/Vulkan-Utility-Libraries.git;branch=vulkan-sdk-1.4.321;protocol=https" | 12 | SRC_URI = "git://github.com/KhronosGroup/Vulkan-Utility-Libraries.git;branch=vulkan-sdk-1.4.328;protocol=https" |
| 13 | SRCREV = "ec329e2721921f79743b90307ee047d08e057788" | 13 | SRCREV = "4322db5906e67b57ec9c327e6afe3d98ed893df7" |
| 14 | 14 | ||
| 15 | REQUIRED_DISTRO_FEATURES = "vulkan" | 15 | REQUIRED_DISTRO_FEATURES = "vulkan" |
| 16 | 16 | ||
diff --git a/meta/recipes-graphics/vulkan/vulkan-validation-layers_1.4.321.0.bb b/meta/recipes-graphics/vulkan/vulkan-validation-layers_1.4.328.1.bb index 466e757a90..76a87398c4 100644 --- a/meta/recipes-graphics/vulkan/vulkan-validation-layers_1.4.321.0.bb +++ b/meta/recipes-graphics/vulkan/vulkan-validation-layers_1.4.328.1.bb | |||
| @@ -8,8 +8,8 @@ SECTION = "libs" | |||
| 8 | LICENSE = "Apache-2.0 & MIT & BSL-1.0 " | 8 | LICENSE = "Apache-2.0 & MIT & BSL-1.0 " |
| 9 | LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=b1a17d548e004bfbbfaa0c40988b6b31" | 9 | LIC_FILES_CHKSUM = "file://LICENSE.txt;md5=b1a17d548e004bfbbfaa0c40988b6b31" |
| 10 | 10 | ||
| 11 | SRC_URI = "git://github.com/KhronosGroup/Vulkan-ValidationLayers.git;branch=vulkan-sdk-1.4.321;protocol=https" | 11 | SRC_URI = "git://github.com/KhronosGroup/Vulkan-ValidationLayers.git;branch=vulkan-sdk-1.4.328;protocol=https" |
| 12 | SRCREV = "fee7b2b4a926355e48668e29570be129eb82cb36" | 12 | SRCREV = "83bcbddf0813cbe5cbf1b916b612e493e2cacd70" |
| 13 | 13 | ||
| 14 | REQUIRED_DISTRO_FEATURES = "vulkan" | 14 | REQUIRED_DISTRO_FEATURES = "vulkan" |
| 15 | 15 | ||
diff --git a/meta/recipes-graphics/vulkan/vulkan-volk_1.4.321.0.bb b/meta/recipes-graphics/vulkan/vulkan-volk_1.4.328.1.bb index 17a290ed1d..a6b4b27355 100644 --- a/meta/recipes-graphics/vulkan/vulkan-volk_1.4.321.0.bb +++ b/meta/recipes-graphics/vulkan/vulkan-volk_1.4.328.1.bb | |||
| @@ -9,8 +9,8 @@ SECTION = "libs" | |||
| 9 | LICENSE = "MIT" | 9 | LICENSE = "MIT" |
| 10 | LIC_FILES_CHKSUM = "file://LICENSE.md;md5=fb3d6e8051a71edca1e54bc38d35e5af" | 10 | LIC_FILES_CHKSUM = "file://LICENSE.md;md5=fb3d6e8051a71edca1e54bc38d35e5af" |
| 11 | 11 | ||
| 12 | SRC_URI = "git://github.com/zeux/volk.git;branch=master;protocol=https" | 12 | SRC_URI = "git://github.com/zeux/volk.git;branch=vulkan-sdk-1.4.328;protocol=https" |
| 13 | SRCREV = "a8da8ef3368482b0ee9b0ec0c6079a16a89c6924" | 13 | SRCREV = "f30088b3f4160810b53e19258dd2f7395e5f0ba3" |
| 14 | 14 | ||
| 15 | REQUIRED_DISTRO_FEATURES = "vulkan" | 15 | REQUIRED_DISTRO_FEATURES = "vulkan" |
| 16 | 16 | ||
