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| author | Richard Purdie <richard.purdie@linuxfoundation.org> | 2022-07-23 13:25:32 +0100 |
|---|---|---|
| committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2022-07-28 11:07:33 +0100 |
| commit | a02bb3b794fe97cbd64d6740db494de00c17134b (patch) | |
| tree | 856db5e76a0e2296e12ee4fce3486a86ff183ed3 /meta/recipes-devtools/rust/rust-common.inc | |
| parent | 97e267f6df6063e1f02a31c68e9f8b0a6dbe2d98 (diff) | |
| download | poky-a02bb3b794fe97cbd64d6740db494de00c17134b.tar.gz | |
rust-common/rust-cross: Clean up target json generation code
Some of the subtleties in the different codepaths for target rust json generation
were not easy to spot. Start to simplfy the code to make this clearer.
This patch should not have any functionality change although ABIEXTENSION
has to be excluded from the function signature, the triplet would normally
cover anything set there.
(From OE-Core rev: 0f83d959465e0d99f98ade6803281585931d1b02)
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/recipes-devtools/rust/rust-common.inc')
| -rw-r--r-- | meta/recipes-devtools/rust/rust-common.inc | 33 |
1 files changed, 16 insertions, 17 deletions
diff --git a/meta/recipes-devtools/rust/rust-common.inc b/meta/recipes-devtools/rust/rust-common.inc index d00b380dbd..2edc71e0d3 100644 --- a/meta/recipes-devtools/rust/rust-common.inc +++ b/meta/recipes-devtools/rust/rust-common.inc | |||
| @@ -117,6 +117,7 @@ def llvm_features(d): | |||
| 117 | llvm_features_from_cc_arch(d) + | 117 | llvm_features_from_cc_arch(d) + |
| 118 | llvm_features_from_target_fpu(d)) | 118 | llvm_features_from_target_fpu(d)) |
| 119 | 119 | ||
| 120 | llvm_features[vardepvalue] = "${@llvm_features(d)}" | ||
| 120 | 121 | ||
| 121 | ## arm-unknown-linux-gnueabihf | 122 | ## arm-unknown-linux-gnueabihf |
| 122 | DATA_LAYOUT[arm-eabi] = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" | 123 | DATA_LAYOUT[arm-eabi] = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" |
| @@ -232,12 +233,6 @@ TARGET_POINTER_WIDTH[riscv64] = "64" | |||
| 232 | TARGET_C_INT_WIDTH[riscv64] = "64" | 233 | TARGET_C_INT_WIDTH[riscv64] = "64" |
| 233 | MAX_ATOMIC_WIDTH[riscv64] = "64" | 234 | MAX_ATOMIC_WIDTH[riscv64] = "64" |
| 234 | 235 | ||
| 235 | def sys_for(d, thing): | ||
| 236 | return d.getVar('{}_SYS'.format(thing)) | ||
| 237 | |||
| 238 | def prefix_for(d, thing): | ||
| 239 | return d.getVar('{}_PREFIX'.format(thing)) | ||
| 240 | |||
| 241 | # Convert a normal arch (HOST_ARCH, TARGET_ARCH, BUILD_ARCH, etc) to something | 236 | # Convert a normal arch (HOST_ARCH, TARGET_ARCH, BUILD_ARCH, etc) to something |
| 242 | # rust's internals won't choke on. | 237 | # rust's internals won't choke on. |
| 243 | def arch_to_rust_target_arch(arch): | 238 | def arch_to_rust_target_arch(arch): |
| @@ -285,20 +280,24 @@ def llvm_cpu(d): | |||
| 285 | except: | 280 | except: |
| 286 | return trans.get(target, "generic") | 281 | return trans.get(target, "generic") |
| 287 | 282 | ||
| 288 | TARGET_LLVM_CPU="${@llvm_cpu(d)}" | 283 | llvm_cpu[vardepvalue] = "${@llvm_cpu(d)}" |
| 289 | TARGET_LLVM_FEATURES = "${@llvm_features(d)}" | ||
| 290 | 284 | ||
| 291 | # class-native implies TARGET=HOST, and TUNE_FEATURES only describes the real | 285 | def rust_gen_target(d, thing, wd, arch): |
| 292 | # (original) target. | ||
| 293 | TARGET_LLVM_FEATURES:class-native = "${@','.join(llvm_features_from_cc_arch(d))}" | ||
| 294 | |||
| 295 | def rust_gen_target(d, thing, wd, features, cpu, arch, abi=""): | ||
| 296 | import json | 286 | import json |
| 297 | sys = sys_for(d, thing) | 287 | sys = d.getVar('{}_SYS'.format(thing)) |
| 298 | prefix = prefix_for(d, thing) | 288 | prefix = d.getVar('{}_PREFIX'.format(thing)) |
| 289 | |||
| 290 | abi = None | ||
| 291 | cpu = "generic" | ||
| 292 | features = "" | ||
| 299 | 293 | ||
| 300 | if thing == "TARGET": | 294 | if thing == "TARGET": |
| 301 | abi = d.getVar('ABIEXTENSION') | 295 | abi = d.getVar('ABIEXTENSION') |
| 296 | cpu = llvm_cpu(d) | ||
| 297 | if bb.data.inherits_class('native', d): | ||
| 298 | features = ','.join(llvm_features_from_cc_arch(d)) | ||
| 299 | else: | ||
| 300 | features = llvm_features(d) or "" | ||
| 302 | # arm and armv7 have different targets in llvm | 301 | # arm and armv7 have different targets in llvm |
| 303 | if arch == "arm" and target_is_armv7(d): | 302 | if arch == "arm" and target_is_armv7(d): |
| 304 | arch = 'armv7' | 303 | arch = 'armv7' |
| @@ -355,14 +354,14 @@ def rust_gen_target(d, thing, wd, features, cpu, arch, abi=""): | |||
| 355 | json.dump(tspec, f, indent=4) | 354 | json.dump(tspec, f, indent=4) |
| 356 | 355 | ||
| 357 | # These are accounted for in tmpdir path names so don't need to be in the task sig | 356 | # These are accounted for in tmpdir path names so don't need to be in the task sig |
| 358 | rust_gen_target[vardepsexclude] += "RUST_HOST_SYS RUST_TARGET_SYS" | 357 | rust_gen_target[vardepsexclude] += "RUST_HOST_SYS RUST_TARGET_SYS ABIEXTENSION llvm_cpu" |
| 359 | 358 | ||
| 360 | do_rust_gen_targets[vardeps] += "DATA_LAYOUT TARGET_ENDIAN TARGET_POINTER_WIDTH TARGET_C_INT_WIDTH MAX_ATOMIC_WIDTH FEATURES" | 359 | do_rust_gen_targets[vardeps] += "DATA_LAYOUT TARGET_ENDIAN TARGET_POINTER_WIDTH TARGET_C_INT_WIDTH MAX_ATOMIC_WIDTH FEATURES" |
| 361 | 360 | ||
| 362 | python do_rust_gen_targets () { | 361 | python do_rust_gen_targets () { |
| 363 | wd = d.getVar('WORKDIR') + '/targets/' | 362 | wd = d.getVar('WORKDIR') + '/targets/' |
| 364 | build_arch = d.getVar('BUILD_ARCH') | 363 | build_arch = d.getVar('BUILD_ARCH') |
| 365 | rust_gen_target(d, 'BUILD', wd, "", "generic", build_arch) | 364 | rust_gen_target(d, 'BUILD', wd, build_arch) |
| 366 | } | 365 | } |
| 367 | 366 | ||
| 368 | addtask rust_gen_targets after do_patch before do_compile | 367 | addtask rust_gen_targets after do_patch before do_compile |
