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| author | Mark Hatle <mark.hatle@amd.com> | 2025-06-17 18:39:38 -0500 |
|---|---|---|
| committer | Richard Purdie <richard.purdie@linuxfoundation.org> | 2025-06-20 09:52:28 +0100 |
| commit | 3c5c4cfa6bf4aa88bcd69e2688fdceea6a655165 (patch) | |
| tree | 06abd25119dcff90922795d0cc7f9c2a31e7af30 /meta/lib | |
| parent | 63fb85ec3709ae6899ad82ae4cc6ce00e11e0018 (diff) | |
| download | poky-3c5c4cfa6bf4aa88bcd69e2688fdceea6a655165.tar.gz | |
riscv tunes: ISA Implementation of RISC-V tune features
This implements the following base ISAs:
* rv32i, rv64i
* rv32e, rv64i
The following ABIs:
* ilp32, ilp32e, ilp32f, ilp32d
* lp64, lp64e, lp64f, lp64d
The following ISA extension are also implemented:
* M - Integer Multiplication and Division Extension
* A - Atomic Memory Extension
* F - Single-Precision Floating-Point Extension
* D - Double-Precision Floating-Point Extension
* C - Compressed Extension
* B - Bit Manipulation Extension (implies Zba, Zbb, Zbs)
* V - Vector Operations Extension
* Zicsr - Control and Status Register Access Extension
* Zifencei - Instruction-Fetch Fence Extension
* Zba - Address bit manipulation extension
* Zbb - Basic bit manipulation extension
* Zbc - Carry-less multiplication extension
* Zbs - Single-bit manipulation extension
* Zicbom - Cache-block management extension
The existing processors tunes are preserved:
* riscv64 (rv64gc)
* riscv32 (rv32gc)
* riscv64nf (rv64imac_zicsr_zifencei)
* riscv32nf (rv32imac_zicsr_zifencei)
* riscv64nc (rv64imafd_zicsr_zifencei)
Previously defined feature 'big-endian' has been removed as it was not used.
(From OE-Core rev: bcaf298a146dfd10e4c8f44223ea083bc4baf45c)
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Diffstat (limited to 'meta/lib')
| -rw-r--r-- | meta/lib/oe/__init__.py | 2 | ||||
| -rw-r--r-- | meta/lib/oe/tune.py | 81 |
2 files changed, 82 insertions, 1 deletions
diff --git a/meta/lib/oe/__init__.py b/meta/lib/oe/__init__.py index dd094a874a..73de774266 100644 --- a/meta/lib/oe/__init__.py +++ b/meta/lib/oe/__init__.py | |||
| @@ -12,4 +12,4 @@ __path__ = extend_path(__path__, __name__) | |||
| 12 | BBIMPORTS = ["qa", "data", "path", "utils", "types", "package", "packagedata", \ | 12 | BBIMPORTS = ["qa", "data", "path", "utils", "types", "package", "packagedata", \ |
| 13 | "packagegroup", "sstatesig", "lsb", "cachedpath", "license", "qemu", \ | 13 | "packagegroup", "sstatesig", "lsb", "cachedpath", "license", "qemu", \ |
| 14 | "reproducible", "rust", "buildcfg", "go", "spdx30_tasks", "spdx_common", \ | 14 | "reproducible", "rust", "buildcfg", "go", "spdx30_tasks", "spdx_common", \ |
| 15 | "cve_check"] | 15 | "cve_check", "tune"] |
diff --git a/meta/lib/oe/tune.py b/meta/lib/oe/tune.py new file mode 100644 index 0000000000..7fda19430d --- /dev/null +++ b/meta/lib/oe/tune.py | |||
| @@ -0,0 +1,81 @@ | |||
| 1 | # | ||
| 2 | # Copyright OpenEmbedded Contributors | ||
| 3 | # | ||
| 4 | # SPDX-License-Identifier: GPL-2.0-only | ||
| 5 | # | ||
| 6 | |||
| 7 | # riscv_isa_to_tune(isa) | ||
| 8 | # | ||
| 9 | # Automatically translate a RISC-V ISA string to TUNE_FEATURES | ||
| 10 | # | ||
| 11 | # Abbreviations, such as rv32g -> rv32imaffd_zicsr_zifencei are supported. | ||
| 12 | # | ||
| 13 | # Profiles, such as rva22u64, are NOT supported, you must use ISA strings. | ||
| 14 | # | ||
| 15 | def riscv_isa_to_tune(isa): | ||
| 16 | _isa = isa.lower() | ||
| 17 | |||
| 18 | feature = [] | ||
| 19 | iter = 0 | ||
| 20 | |||
| 21 | # rv or riscv | ||
| 22 | if _isa[iter:].startswith('rv'): | ||
| 23 | feature.append('rv') | ||
| 24 | iter = iter + 2 | ||
| 25 | elif _isa[iter:].startswith('riscv'): | ||
| 26 | feature.append('rv') | ||
| 27 | iter = iter + 5 | ||
| 28 | else: | ||
| 29 | # Not a risc-v ISA! | ||
| 30 | return _isa | ||
| 31 | |||
| 32 | while (_isa[iter:]): | ||
| 33 | # Skip _ and whitespace | ||
| 34 | if _isa[iter] == '_' or _isa[iter].isspace(): | ||
| 35 | iter = iter + 1 | ||
| 36 | continue | ||
| 37 | |||
| 38 | # Length, just capture numbers here | ||
| 39 | if _isa[iter].isdigit(): | ||
| 40 | iter_end = iter | ||
| 41 | while iter_end < len(_isa) and _isa[iter_end].isdigit(): | ||
| 42 | iter_end = iter_end + 1 | ||
| 43 | |||
| 44 | feature.append(_isa[iter:iter_end]) | ||
| 45 | iter = iter_end | ||
| 46 | continue | ||
| 47 | |||
| 48 | # Typically i, e or g is next, followed by extensions. | ||
| 49 | # Extensions are single character, except for Z, Ss, Sh, Sm, Sv, and X | ||
| 50 | |||
| 51 | # If the extension starts with 'Z', 'S' or 'X' use the name until the next _, whitespace or end | ||
| 52 | if _isa[iter] in ['z', 's', 'x']: | ||
| 53 | ext_type = _isa[iter] | ||
| 54 | iter_end = iter + 1 | ||
| 55 | |||
| 56 | # Multicharacter extension, these are supposed to have a _ before the next multicharacter extension | ||
| 57 | # See 37.4 and 37.5: | ||
| 58 | # 37.4: Underscores "_" may be used to separate ISA extensions... | ||
| 59 | # 37.5: All multi-letter extensions ... must be separated from other multi-letter extensions by an underscore... | ||
| 60 | # Some extensions permit only alphabetic characters, while others allow alphanumeric chartacters | ||
| 61 | while iter_end < len(_isa) and _isa[iter_end] != "_" and not _isa[iter_end].isspace(): | ||
| 62 | iter_end = iter_end + 1 | ||
| 63 | |||
| 64 | feature.append(_isa[iter:iter_end]) | ||
| 65 | iter = iter_end | ||
| 66 | continue | ||
| 67 | |||
| 68 | # 'g' is special, it's an abbreviation for imafd_zicsr_zifencei | ||
| 69 | # When expanding the abbreviation, any additional letters must appear before the _z* extensions | ||
| 70 | if _isa[iter] == 'g': | ||
| 71 | _isa = 'imafd' + _isa[iter+1:] + '_zicsr_zifencei' | ||
| 72 | iter = 0 | ||
| 73 | continue | ||
| 74 | |||
| 75 | feature.append(_isa[iter]) | ||
| 76 | iter = iter + 1 | ||
| 77 | continue | ||
| 78 | |||
| 79 | # Eliminate duplicates, but preserve the order | ||
| 80 | feature = list(dict.fromkeys(feature)) | ||
| 81 | return ' '.join(feature) | ||
