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-rw-r--r--meta-microblaze/recipes-devtools/gcc/gcc-13/0045-fixed-typos-in-mul-div-and-mod-assembly-files.patch465
1 files changed, 465 insertions, 0 deletions
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-13/0045-fixed-typos-in-mul-div-and-mod-assembly-files.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0045-fixed-typos-in-mul-div-and-mod-assembly-files.patch
new file mode 100644
index 00000000..4760926f
--- /dev/null
+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0045-fixed-typos-in-mul-div-and-mod-assembly-files.patch
@@ -0,0 +1,465 @@
1From 3c6f051ce41f06eab29932859be52ed864bef52f Mon Sep 17 00:00:00 2001
2From: Mahesh Bodapati <mbodapat@xilinx.com>
3Date: Wed, 17 Apr 2019 12:36:16 +0530
4Subject: [PATCH 45/54] fixed typos in mul,div and mod assembly files.
5
6---
7 libgcc/config/microblaze/divsi3.S | 47 ++++++++++++++++++++----
8 libgcc/config/microblaze/modsi3.S | 40 ++++++++++++++++++---
9 libgcc/config/microblaze/mulsi3.S | 33 ++++++++++++++++-
10 libgcc/config/microblaze/udivsi3.S | 54 +++++++++++++++++++++++++---
11 libgcc/config/microblaze/umodsi3.S | 58 +++++++++++++++++++++++++++---
12 5 files changed, 212 insertions(+), 20 deletions(-)
13
14diff --git a/libgcc/config/microblaze/divsi3.S b/libgcc/config/microblaze/divsi3.S
15index 9f04f59104e..e1dfccbf257 100644
16--- a/libgcc/config/microblaze/divsi3.S
17+++ b/libgcc/config/microblaze/divsi3.S
18@@ -46,7 +46,7 @@
19 __divsi3:
20 .frame r1,0,r15
21
22- ADDIK r1,r1,-32
23+ ADDLIK r1,r1,-32
24 SLI r28,r1,0
25 SLI r29,r1,8
26 SLI r30,r1,16
27@@ -61,13 +61,23 @@ __divsi3:
28 SWI r30,r1,8
29 SWI r31,r1,12
30 #endif
31- BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
32- BEQI r5,$LaResult_Is_Zero # Result is Zero
33- BGEID r5,$LaR5_Pos
34+#ifdef __arch64__
35+ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
36+ BEAEQI r5,$LaResult_Is_Zero # Result is Zero
37+ BEAGEID r5,$LaR5_Pos
38+#else
39+ BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
40+ BEQI r5,$LaResult_Is_Zero # Result is Zero
41+ BGEID r5,$LaR5_Pos
42+#endif
43 XOR r28,r5,r6 # Get the sign of the result
44 RSUBI r5,r5,0 # Make r5 positive
45 $LaR5_Pos:
46- BGEI r6,$LaR6_Pos
47+#ifdef __arch64__
48+ BEAGEI r6,$LaR6_Pos
49+#else
50+ BGEI r6,$LaR6_Pos
51+#endif
52 RSUBI r6,r6,0 # Make r6 positive
53 $LaR6_Pos:
54 ADDIK r30,r0,0 # Clear mod
55@@ -76,26 +86,51 @@ $LaR6_Pos:
56
57 # First part try to find the first '1' in the r5
58 $LaDIV0:
59- BLTI r5,$LaDIV2 # This traps r5 == 0x80000000
60+#ifdef __arch64__
61+ BEALTI r5,$LaDIV2 # This traps r5 == 0x80000000
62+#else
63+ BLTI r5,$LaDIV2 # This traps r5 == 0x80000000
64+#endif
65 $LaDIV1:
66 ADD r5,r5,r5 # left shift logical r5
67+#ifdef __arch64__
68+ BEAGTID r5,$LaDIV1
69+#else
70 BGTID r5,$LaDIV1
71+#endif
72 ADDIK r29,r29,-1
73 $LaDIV2:
74 ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
75 ADDC r30,r30,r30 # Move that bit into the Mod register
76 RSUB r31,r6,r30 # Try to subtract (r30 a r6)
77+#ifdef __arch64__
78+ BEALTI r31,$LaMOD_TOO_SMALL
79+#else
80 BLTI r31,$LaMOD_TOO_SMALL
81+#endif
82 OR r30,r0,r31 # Move the r31 to mod since the result was positive
83 ADDIK r3,r3,1
84 $LaMOD_TOO_SMALL:
85 ADDIK r29,r29,-1
86+#ifdef __arch64__
87+ BEAEQi r29,$LaLOOP_END
88+#else
89 BEQi r29,$LaLOOP_END
90+#endif
91 ADD r3,r3,r3 # Shift in the '1' into div
92+#ifdef __arch64__
93+ BREAI $LaDIV2 # Div2
94+#else
95 BRI $LaDIV2 # Div2
96+#endif
97 $LaLOOP_END:
98+#ifdef __arch64__
99+ BEAGEI r28,$LaRETURN_HERE
100+ BREAID $LaRETURN_HERE
101+#else
102 BGEI r28,$LaRETURN_HERE
103 BRID $LaRETURN_HERE
104+#endif
105 RSUBI r3,r3,0 # Negate the result
106 $LaDiv_By_Zero:
107 $LaResult_Is_Zero:
108diff --git a/libgcc/config/microblaze/modsi3.S b/libgcc/config/microblaze/modsi3.S
109index f8684db721e..3bf9b10ec3e 100644
110--- a/libgcc/config/microblaze/modsi3.S
111+++ b/libgcc/config/microblaze/modsi3.S
112@@ -62,40 +62,72 @@ __modsi3:
113 swi r31,r1,12
114 #endif
115
116+#ifdef __arch64__
117+ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
118+ BEAEQI r5,$LaResult_Is_Zero # Result is Zero
119+ BEAGEId r5,$LaR5_Pos
120+#else
121 BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
122 BEQI r5,$LaResult_Is_Zero # Result is Zero
123 BGEId r5,$LaR5_Pos
124+#endif
125 ADD r28,r5,r0 # Get the sign of the result [ Depends only on the first arg]
126 RSUBI r5,r5,0 # Make r5 positive
127 $LaR5_Pos:
128- BGEI r6,$LaR6_Pos
129+#ifdef __arch64__
130+ BEAGEI r6,$LaR6_Pos
131+#else
132+ BGEI r6,$LaR6_Pos
133+#endif
134 RSUBI r6,r6,0 # Make r6 positive
135 $LaR6_Pos:
136 ADDIK r3,r0,0 # Clear mod
137 ADDIK r30,r0,0 # clear div
138- BLTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip
139+#ifdef __arch64__
140+ BEALTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip
141 # the first bit search.
142+#else
143+ BLTId r5,$LaDIV2 # If r5 is still negative (0x80000000), skip
144+ # the first bit search.
145+#endif
146 ADDIK r29,r0,32 # Initialize the loop count
147 # First part try to find the first '1' in the r5
148 $LaDIV1:
149 ADD r5,r5,r5 # left shift logical r5
150- BGEID r5,$LaDIV1 #
151+#ifdef __arch64__
152+ BEAGEID r5,$LaDIV1 #
153+#else
154+ BGEID r5,$LaDIV1 #
155+#endif
156 ADDIK r29,r29,-1
157 $LaDIV2:
158 ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
159 ADDC r3,r3,r3 # Move that bit into the Mod register
160 rSUB r31,r6,r3 # Try to subtract (r30 a r6)
161+#ifdef __arch64__
162+ BEALTi r31,$LaMOD_TOO_SMALL
163+#else
164 BLTi r31,$LaMOD_TOO_SMALL
165+#endif
166 OR r3,r0,r31 # Move the r31 to mod since the result was positive
167 ADDIK r30,r30,1
168 $LaMOD_TOO_SMALL:
169 ADDIK r29,r29,-1
170+#ifdef __arch64__
171+ BEAEQi r29,$LaLOOP_END
172+ ADD r30,r30,r30 # Shift in the '1' into div
173+ BREAI $LaDIV2 # Div2
174+$LaLOOP_END:
175+ BEAGEI r28,$LaRETURN_HERE
176+ BREAId $LaRETURN_HERE
177+#else
178 BEQi r29,$LaLOOP_END
179 ADD r30,r30,r30 # Shift in the '1' into div
180 BRI $LaDIV2 # Div2
181 $LaLOOP_END:
182 BGEI r28,$LaRETURN_HERE
183 BRId $LaRETURN_HERE
184+#endif
185 rsubi r3,r3,0 # Negate the result
186 $LaDiv_By_Zero:
187 $LaResult_Is_Zero:
188@@ -108,7 +140,7 @@ $LaRETURN_HERE:
189 lli r29,r1,8
190 lli r30,r1,16
191 lli r31,r1,24
192- addik r1,r1,32
193+ addlik r1,r1,32
194 rtsd r15,8
195 nop
196 #else
197diff --git a/libgcc/config/microblaze/mulsi3.S b/libgcc/config/microblaze/mulsi3.S
198index 437e2bc309e..bc9ff9cdc89 100644
199--- a/libgcc/config/microblaze/mulsi3.S
200+++ b/libgcc/config/microblaze/mulsi3.S
201@@ -43,7 +43,37 @@
202 .type __mulsi3,@function
203 #ifdef __arch64__
204 .align 3
205-#endif
206+__mulsi3:
207+ .frame r1,0,r15
208+ add r3,r0,r0
209+ BEAEQI r5,$L_Result_Is_Zero # Multiply by Zero
210+ BEAEQI r6,$L_Result_Is_Zero # Multiply by Zero
211+ BEAGEId r5,$L_R5_Pos
212+ XOR r4,r5,r6 # Get the sign of the result
213+ RSUBI r5,r5,0 # Make r5 positive
214+$L_R5_Pos:
215+ BEAGEI r6,$L_R6_Pos
216+ RSUBI r6,r6,0 # Make r6 positive
217+$L_R6_Pos:
218+ breai $L1
219+$L2:
220+ add r5,r5,r5
221+$L1:
222+ srl r6,r6
223+ addc r7,r0,r0
224+ beaeqi r7,$L2
225+ beaneid r6,$L2
226+ add r3,r3,r5
227+ bealti r4,$L_NegateResult
228+ rtsd r15,8
229+ nop
230+$L_NegateResult:
231+ rtsd r15,8
232+ rsub r3,r3,r0
233+$L_Result_Is_Zero:
234+ rtsd r15,8
235+ addi r3,r0,0
236+#else
237 __mulsi3:
238 .frame r1,0,r15
239 add r3,r0,r0
240@@ -74,5 +104,6 @@ $L_NegateResult:
241 $L_Result_Is_Zero:
242 rtsd r15,8
243 addi r3,r0,0
244+#endif
245 .end __mulsi3
246 .size __mulsi3, . - __mulsi3
247diff --git a/libgcc/config/microblaze/udivsi3.S b/libgcc/config/microblaze/udivsi3.S
248index 496dd6794bf..486bc8f0819 100644
249--- a/libgcc/config/microblaze/udivsi3.S
250+++ b/libgcc/config/microblaze/udivsi3.S
251@@ -59,52 +59,96 @@ __udivsi3:
252 SWI r30,r1,4
253 SWI r31,r1,8
254 #endif
255+#ifdef __arch64__
256+ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
257+ BEAEQID r5,$LaResult_Is_Zero # Result is Zero
258+#else
259 BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
260 BEQID r5,$LaResult_Is_Zero # Result is Zero
261+#endif
262 ADDIK r30,r0,0 # Clear mod
263 ADDIK r29,r0,32 # Initialize the loop count
264
265 # Check if r6 and r5 are equal # if yes, return 1
266 RSUB r18,r5,r6
267+#ifdef __arch64__
268+ BEAEQID r18,$LaRETURN_HERE
269+#else
270 BEQID r18,$LaRETURN_HERE
271+#endif
272 ADDIK r3,r0,1
273
274 # Check if (uns)r6 is greater than (uns)r5. In that case, just return 0
275 XOR r18,r5,r6
276- BGEID r18,16
277+#ifdef __arch64__
278+ BEAGEID r18,16
279+#else
280+ BGEID r18,16
281+#endif
282 ADD r3,r0,r0 # We would anyways clear r3
283+#ifdef __arch64__
284+ BEALTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater
285+ BREAI $LCheckr6
286+ RSUB r18,r6,r5 # MICROBLAZEcmp
287+ BEALTI r18,$LaRETURN_HERE
288+#else
289 BLTI r6,$LaRETURN_HERE # r6[bit 31 = 1] hence is greater
290 BRI $LCheckr6
291 RSUB r18,r6,r5 # MICROBLAZEcmp
292 BLTI r18,$LaRETURN_HERE
293-
294+#endif
295 # If r6 [bit 31] is set, then return result as 1
296 $LCheckr6:
297- BGTI r6,$LaDIV0
298- BRID $LaRETURN_HERE
299+#ifdef __arch64__
300+ BEAGTI r6,$LaDIV0
301+ BREAID $LaRETURN_HERE
302+#else
303+ BGTI r6,$LaDIV0
304+ BRID $LaRETURN_HERE
305+#endif
306 ADDIK r3,r0,1
307
308 # First part try to find the first '1' in the r5
309 $LaDIV0:
310+#ifdef __arch64__
311+ BEALTI r5,$LaDIV2
312+#else
313 BLTI r5,$LaDIV2
314+#endif
315 $LaDIV1:
316 ADD r5,r5,r5 # left shift logical r5
317+#ifdef __arch64__
318+ BEAGTID r5,$LaDIV1
319+#else
320 BGTID r5,$LaDIV1
321+#endif
322 ADDIK r29,r29,-1
323 $LaDIV2:
324 ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
325 ADDC r30,r30,r30 # Move that bit into the Mod register
326 RSUB r31,r6,r30 # Try to subtract (r30 a r6)
327+#ifdef __arch64__
328+ BEALTI r31,$LaMOD_TOO_SMALL
329+#else
330 BLTI r31,$LaMOD_TOO_SMALL
331+#endif
332 OR r30,r0,r31 # Move the r31 to mod since the result was positive
333 ADDIK r3,r3,1
334 $LaMOD_TOO_SMALL:
335 ADDIK r29,r29,-1
336+#ifdef __arch64__
337+ BEAEQi r29,$LaLOOP_END
338+ ADD r3,r3,r3 # Shift in the '1' into div
339+ BREAI $LaDIV2 # Div2
340+$LaLOOP_END:
341+ BREAI $LaRETURN_HERE
342+#else
343 BEQi r29,$LaLOOP_END
344 ADD r3,r3,r3 # Shift in the '1' into div
345 BRI $LaDIV2 # Div2
346 $LaLOOP_END:
347 BRI $LaRETURN_HERE
348+#endif
349 $LaDiv_By_Zero:
350 $LaResult_Is_Zero:
351 OR r3,r0,r0 # set result to 0
352@@ -115,7 +159,7 @@ $LaRETURN_HERE:
353 LLI r29,r1,0
354 LLI r30,r1,8
355 LLI r31,r1,16
356- ADDIK r1,r1,24
357+ ADDLIK r1,r1,24
358 RTSD r15,8
359 NOP
360 #else
361diff --git a/libgcc/config/microblaze/umodsi3.S b/libgcc/config/microblaze/umodsi3.S
362index a706017c634..1d8e2921745 100644
363--- a/libgcc/config/microblaze/umodsi3.S
364+++ b/libgcc/config/microblaze/umodsi3.S
365@@ -46,7 +46,7 @@
366 __umodsi3:
367 .frame r1,0,r15
368
369- addik r1,r1,-24
370+ addlik r1,r1,-24
371 sli r29,r1,0
372 sli r30,r1,8
373 sli r31,r1,16
374@@ -59,27 +59,77 @@ __umodsi3:
375 swi r30,r1,4
376 swi r31,r1,8
377 #endif
378+#ifdef __arch64__
379+ BEAEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
380+ BEAEQId r5,$LaResult_Is_Zero # Result is Zero
381+#else
382 BEQI r6,$LaDiv_By_Zero # Div_by_Zero # Division Error
383 BEQId r5,$LaResult_Is_Zero # Result is Zero
384+#endif
385 ADDIK r3,r0,0 # Clear div
386 ADDIK r30,r0,0 # clear mod
387 ADDIK r29,r0,32 # Initialize the loop count
388
389 # Check if r6 and r5 are equal # if yes, return 0
390 rsub r18,r5,r6
391- beqi r18,$LaRETURN_HERE
392
393+#ifdef __arch64__
394+ beaeqi r18,$LaRETURN_HERE
395+#else
396+ beqi r18,$LaRETURN_HERE
397+#endif
398 # Check if (uns)r6 is greater than (uns)r5. In that case, just return r5
399 xor r18,r5,r6
400+#ifdef __arch64__
401+ beageid r18,16
402+ addik r3,r5,0
403+ bealti r6,$LaRETURN_HERE
404+ breai $LCheckr6
405+ rsub r18,r5,r6 # MICROBLAZEcmp
406+ beagti r18,$LaRETURN_HERE
407+#else
408 bgeid r18,16
409 addik r3,r5,0
410 blti r6,$LaRETURN_HERE
411 bri $LCheckr6
412 rsub r18,r5,r6 # MICROBLAZEcmp
413 bgti r18,$LaRETURN_HERE
414-
415+#endif
416 # If r6 [bit 31] is set, then return result as r5-r6
417 $LCheckr6:
418+#ifdef __arch64__
419+ beagtid r6,$LaDIV0
420+ addik r3,r0,0
421+ addik r18,r0,0x7fffffff
422+ and r5,r5,r18
423+ and r6,r6,r18
424+ breaid $LaRETURN_HERE
425+ rsub r3,r6,r5
426+# First part: try to find the first '1' in the r5
427+$LaDIV0:
428+ BEALTI r5,$LaDIV2
429+$LaDIV1:
430+ ADD r5,r5,r5 # left shift logical r5
431+ BEAGEID r5,$LaDIV1 #
432+ ADDIK r29,r29,-1
433+$LaDIV2:
434+ ADD r5,r5,r5 # left shift logical r5 get the '1' into the Carry
435+ ADDC r3,r3,r3 # Move that bit into the Mod register
436+ rSUB r31,r6,r3 # Try to subtract (r3 a r6)
437+ BEALTi r31,$LaMOD_TOO_SMALL
438+ OR r3,r0,r31 # Move the r31 to mod since the result was positive
439+ ADDIK r30,r30,1
440+$LaMOD_TOO_SMALL:
441+ ADDIK r29,r29,-1
442+ BEAEQi r29,$LaLOOP_END
443+ ADD r30,r30,r30 # Shift in the '1' into div
444+ BREAI $LaDIV2 # Div2
445+$LaLOOP_END:
446+ BREAI $LaRETURN_HERE
447+$LaDiv_By_Zero:
448+$LaResult_Is_Zero:
449+ or r3,r0,r0 # set result to 0
450+#else
451 bgtid r6,$LaDIV0
452 addik r3,r0,0
453 addik r18,r0,0x7fffffff
454@@ -111,7 +161,7 @@ $LaLOOP_END:
455 $LaDiv_By_Zero:
456 $LaResult_Is_Zero:
457 or r3,r0,r0 # set result to 0
458-
459+#endif
460 #ifdef __arch64__
461 $LaRETURN_HERE:
462 # Restore values of CSRs and that of r3 and the divisor and the dividend
463--
4642.34.1
465
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