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-rw-r--r--meta-microblaze/recipes-devtools/gcc/gcc-13/0017-Inline-Expansion-of-fsqrt-builtin.-The-changes-are-m.patch58
1 files changed, 58 insertions, 0 deletions
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-13/0017-Inline-Expansion-of-fsqrt-builtin.-The-changes-are-m.patch b/meta-microblaze/recipes-devtools/gcc/gcc-13/0017-Inline-Expansion-of-fsqrt-builtin.-The-changes-are-m.patch
new file mode 100644
index 00000000..91ca87fc
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+++ b/meta-microblaze/recipes-devtools/gcc/gcc-13/0017-Inline-Expansion-of-fsqrt-builtin.-The-changes-are-m.patch
@@ -0,0 +1,58 @@
1From 0760cd661f6c09cda8327288f79314319a0b9b14 Mon Sep 17 00:00:00 2001
2From: Mahesh Bodapati <mbodapat@xilinx.com>
3Date: Tue, 17 Jan 2017 17:11:04 +0530
4Subject: [PATCH 17/54] Inline Expansion of fsqrt builtin. The changes are made
5 in the patch for the inline expansion of the fsqrt builtin with fqrt
6 instruction. The sqrt math function takes double as argument and return
7 double as argument. The pattern is selected while expanding the unary op
8 through expand_unop which passes DFmode and the DFmode pattern was not there
9 returning zero. Thus the sqrt math function is not inlined and expanded. The
10 pattern with DFmode argument is added. Also the source and destination
11 argument is not same the DF through two different consecutive registers with
12 lower 32 bit is the argument passed to sqrt and the higher 32 bit is zero. If
13 the source and destinations are different the DFmode 64 bits registers is not
14 set properly giving the problem in runtime. Such changes are taken care in
15 the implementation of the pattern for DFmode for inline expansion of the
16 sqrt.
17
18ChangeLog:
192015-06-16 Ajit Agarwal <ajitkum@xilinx.com>
20 Nagaraju Mekala <nmekala@xilinx.com>
21
22 * config/microblaze/microblaze.md (sqrtdf2): New
23 pattern.
24
25Signed-off-by:Ajit Agarwal ajitkum@xilinx.com
26 Nagaraju Mekala nmekala@xilinx.com
27---
28 gcc/config/microblaze/microblaze.md | 14 ++++++++++++++
29 1 file changed, 14 insertions(+)
30
31diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md
32index 5d65ad84449..0597ed8d75a 100644
33--- a/gcc/config/microblaze/microblaze.md
34+++ b/gcc/config/microblaze/microblaze.md
35@@ -451,6 +451,20 @@
36 (set_attr "mode" "SF")
37 (set_attr "length" "4")])
38
39+(define_insn "sqrtdf2"
40+ [(set (match_operand:DF 0 "register_operand" "=d")
41+ (sqrt:DF (match_operand:DF 1 "register_operand" "dG")))]
42+ "TARGET_HARD_FLOAT && TARGET_FLOAT_SQRT"
43+ {
44+ if (REGNO (operands[0]) == REGNO (operands[1]))
45+ return "fsqrt\t%0,%1";
46+ else
47+ return "fsqrt\t%0,%1\n\taddk\t%D0,%D1,r0";
48+ }
49+ [(set_attr "type" "fsqrt")
50+ (set_attr "mode" "SF")
51+ (set_attr "length" "4")])
52+
53 (define_insn "fix_truncsfsi2"
54 [(set (match_operand:SI 0 "register_operand" "=d")
55 (fix:SI (match_operand:SF 1 "register_operand" "d")))]
56--
572.34.1
58