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authorManjukumar Matha <manjukumar.harthikote-matha@xilinx.com>2017-12-06 16:06:35 -0800
committerManjukumar Matha <manjukumar.harthikote-matha@xilinx.com>2017-12-13 16:11:14 -0800
commita18947c20dba2c0c38db8bde1ad4684995df4bbd (patch)
tree917bf2abbe439a6f99ede8cfafb25812dca54a9a /recipes-kernel
parent6ddc5873b0ede30e6542f0ab151a6236acc37944 (diff)
downloadmeta-xilinx-a18947c20dba2c0c38db8bde1ad4684995df4bbd.tar.gz
meta-xilinx: Restructuring meta-xilinx to support multiple layers
As discussed previously on mailing list, we are proceeding with layer restructuring. For rocko release we will have the following layers meta-xilinx ->meta-xilinx-bsp (current meta-xilinx) ->meta-xilinx-contrib In the subsequent releases we will add other layers from Xilinx meta-xilinx ->meta-xilinx-bsp (current meta-xilinx) ->meta-petalinux ->meta-xilinx-tools ->meta-xilinx-contrib This will provide one clone to get all the required meta layers from Xilinx for a complete solution, and the users can blacklist any layer which they don't want to use using bblayer.conf. This will enables us to help our vendors/partners to add their reference designs, board definitions etc. Recipe changes : * Move reference design zybo-linux-bd.bb to meta-xilinx-contrib * Move kernel patches realted to zybo-linux-bd-zynq7 board to meta-xilinx-contrib * Update README Signed-off-by: Manjukumar Matha <manjukumar.harthikote-matha@xilinx.com>
Diffstat (limited to 'recipes-kernel')
-rw-r--r--recipes-kernel/linux/linux-microblaze.inc5
-rw-r--r--recipes-kernel/linux/linux-xlnx-dev.bb18
-rw-r--r--recipes-kernel/linux/linux-xlnx.inc44
-rw-r--r--recipes-kernel/linux/linux-xlnx/v2017.3/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch302
-rw-r--r--recipes-kernel/linux/linux-xlnx/v2017.3/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch607
-rw-r--r--recipes-kernel/linux/linux-xlnx/v2017.3/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch54
-rw-r--r--recipes-kernel/linux/linux-xlnx_2017.3.bb12
-rw-r--r--recipes-kernel/linux/linux-yocto-dev.bbappend1
-rw-r--r--recipes-kernel/linux/linux-yocto-tiny_%.bbappend1
-rw-r--r--recipes-kernel/linux/linux-yocto-xilinx.inc25
-rw-r--r--recipes-kernel/linux/linux-yocto_%.bbappend1
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg17
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.scc4
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-standard.scc14
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-tiny.scc11
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.cfg14
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.scc4
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.cfg7
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.scc5
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-softip.cfg19
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynq.cfg16
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynqmp.cfg67
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-zynqmp.cfg68
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.cfg26
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.scc10
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-standard.scc15
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-tiny.scc9
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.cfg19
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.scc7
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/features/uio/uio.cfg4
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/features/uio/uio.scc5
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.cfg23
-rw-r--r--recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.scc4
33 files changed, 0 insertions, 1438 deletions
diff --git a/recipes-kernel/linux/linux-microblaze.inc b/recipes-kernel/linux/linux-microblaze.inc
deleted file mode 100644
index e23a50e8..00000000
--- a/recipes-kernel/linux/linux-microblaze.inc
+++ /dev/null
@@ -1,5 +0,0 @@
1# MicroBlaze is a uImage target, but its not called 'uImage' instead it is called 'linux.bin.ub'
2python () {
3 if d.getVar('KERNEL_IMAGETYPE', True).endswith('.ub'):
4 d.setVar('DEPENDS', "%s u-boot-mkimage-native" % d.getVar('DEPENDS', True))
5}
diff --git a/recipes-kernel/linux/linux-xlnx-dev.bb b/recipes-kernel/linux/linux-xlnx-dev.bb
deleted file mode 100644
index acb9938f..00000000
--- a/recipes-kernel/linux/linux-xlnx-dev.bb
+++ /dev/null
@@ -1,18 +0,0 @@
1# This recipe tracks the 'bleeding edge' linux-xlnx repository.
2# Since this tree is frequently updated, AUTOREV is used to track its contents.
3#
4# To enable this recipe, set PREFERRED_PROVIDER_virtual/kernel = "linux-xlnx-dev"
5
6KBRANCH ?= "master"
7
8# Use the SRCREV for the last tagged revision of linux-xlnx.
9SRCREV ?= '${@oe.utils.conditional("PREFERRED_PROVIDER_virtual/kernel", "linux-xlnx-dev", "${AUTOREV}", "84fb0cc65aae5970471cbc54b0c89009b9b904af", d)}'
10
11# skip version sanity, because the version moves with AUTOREV
12KERNEL_VERSION_SANITY_SKIP = "1"
13
14LINUX_VERSION ?= "4.9+"
15LINUX_VERSION_EXTENSION ?= "-xilinx-dev"
16
17include linux-xlnx.inc
18
diff --git a/recipes-kernel/linux/linux-xlnx.inc b/recipes-kernel/linux/linux-xlnx.inc
deleted file mode 100644
index 39c146aa..00000000
--- a/recipes-kernel/linux/linux-xlnx.inc
+++ /dev/null
@@ -1,44 +0,0 @@
1# This version extension should match CONFIG_LOCALVERSION in defconfig
2XILINX_RELEASE_VERSION ?= ""
3LINUX_VERSION_EXTENSION ?= "-xilinx-${XILINX_RELEASE_VERSION}"
4PV = "${LINUX_VERSION}${LINUX_VERSION_EXTENSION}+git${SRCPV}"
5
6# Sources, by default allow for the use of SRCREV pointing to orphaned tags/commits
7KBRANCH ?= ""
8SRCBRANCHARG = "${@['nobranch=1', 'branch=${KBRANCH}'][d.getVar('KBRANCH', True) != '']}"
9
10FILESOVERRIDES_append = ":${XILINX_RELEASE_VERSION}"
11KERNELURI ?= "git://github.com/Xilinx/linux-xlnx.git;protocol=https"
12SRC_URI = "${KERNELURI};${SRCBRANCHARG}"
13
14SRCREV_machine ?= "${SRCREV}"
15
16require recipes-kernel/linux/linux-yocto.inc
17require linux-microblaze.inc
18
19DESCRIPTION = "Xilinx Kernel"
20
21# Force the use of the KBUILD_DEFCONFIG even if some other defconfig was generated in the ${WORKDIR}
22do_kernel_metadata_prepend () {
23 [ -n "${KBUILD_DEFCONFIG}" ] && [ -e ${WORKDIR}/defconfig ] && rm ${WORKDIR}/defconfig
24}
25
26# Default to be only compatible with specific machines or soc families
27COMPATIBLE_MACHINE ?= "^$"
28COMPATIBLE_MACHINE_zynq = ".*"
29COMPATIBLE_MACHINE_zynqmp = ".*"
30COMPATIBLE_MACHINE_kc705-microblazeel = ".*"
31
32# Use DEFCONFIGs for configuring linux-xlnx kernels
33KCONFIG_MODE ?= "alldefconfig"
34KBUILD_DEFCONFIG_zynqmp = "xilinx_zynqmp_defconfig"
35KBUILD_DEFCONFIG_zynq = "xilinx_zynq_defconfig"
36KBUILD_DEFCONFIG_microblaze = "mmu_defconfig"
37
38# Add meta-xilinx kmeta, used for MicroBlaze BSP fragments
39FILESEXTRAPATHS_prepend := "${THISDIR}:"
40SRC_URI_append = " file://xilinx-kmeta;type=kmeta;name=xilinx-kmeta;destsuffix=xilinx-kmeta"
41
42# MicroBlaze BSP fragments
43KERNEL_FEATURES_append_kc705-microblazeel = " bsp/kc705-microblazeel/kc705-microblazeel.scc"
44
diff --git a/recipes-kernel/linux/linux-xlnx/v2017.3/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch b/recipes-kernel/linux/linux-xlnx/v2017.3/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch
deleted file mode 100644
index b8ba70ea..00000000
--- a/recipes-kernel/linux/linux-xlnx/v2017.3/0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch
+++ /dev/null
@@ -1,302 +0,0 @@
1From c1bf9e8c50baa237b514715dcb9c8fd367694c93 Mon Sep 17 00:00:00 2001
2From: Jason Wu <jason.wu.misc@gmail.com>
3Date: Sun, 10 Apr 2016 13:14:13 +1000
4Subject: [PATCH 1/3] drm: xilinx: Add encoder for Digilent boards
5
6Add the dglnt_encoder driver that enables DRM support for the VGA and
7HDMI output ports found on many Digilent boards.
8
9Upstream-Status: Pending
10
11Signed-off-by: Sam Bobrowicz <sbobrowicz@digilentinc.com>
12Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
13---
14 .../bindings/drm/xilinx/dglnt_encoder.txt | 23 +++
15 drivers/gpu/drm/xilinx/Kconfig | 6 +
16 drivers/gpu/drm/xilinx/Makefile | 1 +
17 drivers/gpu/drm/xilinx/dglnt_encoder.c | 217 +++++++++++++++++++++
18 4 files changed, 247 insertions(+)
19 create mode 100644 Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
20 create mode 100644 drivers/gpu/drm/xilinx/dglnt_encoder.c
21
22diff --git a/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt b/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
23new file mode 100644
24index 0000000000..242b24e482
25--- /dev/null
26+++ b/Documentation/devicetree/bindings/drm/xilinx/dglnt_encoder.txt
27@@ -0,0 +1,23 @@
28+Device-Tree bindings for Digilent DRM Encoder Slave
29+
30+This driver provides support for VGA and HDMI outputs on Digilent FPGA boards.
31+The VGA or HDMI port must be connected to a Xilinx display pipeline via an
32+axi2vid IP core.
33+
34+Required properties:
35+ - compatible: Should be "digilent,drm-encoder".
36+
37+Optional properties:
38+ - dglnt,edid-i2c: The I2C device connected to the DDC bus on the video
39+ connector. This is used to obtain the supported resolutions
40+ of an attached monitor. If not defined, then a default
41+ set of resolutions is used and the display will initialize
42+ to 720p. Note most VGA connectors on Digilent boards do
43+ not have the DDC bus routed out.
44+
45+Example:
46+
47+ encoder_0: digilent_encoder {
48+ compatible = "digilent,drm-encoder";
49+ dglnt,edid-i2c = <&i2c1>;
50+ };
51diff --git a/drivers/gpu/drm/xilinx/Kconfig b/drivers/gpu/drm/xilinx/Kconfig
52index 12b548c2a9..c3e2562e53 100644
53--- a/drivers/gpu/drm/xilinx/Kconfig
54+++ b/drivers/gpu/drm/xilinx/Kconfig
55@@ -57,3 +57,9 @@ config DRM_XILINX_SDI
56 depends on DRM_XILINX
57 help
58 DRM driver for Xilinx Display Port Subsystem.
59+
60+config DRM_DIGILENT_ENCODER
61+ tristate "Digilent VGA/HDMI DRM Encoder Driver"
62+ depends on DRM_XILINX
63+ help
64+ DRM slave encoder for Video-out on Digilent boards.
65diff --git a/drivers/gpu/drm/xilinx/Makefile b/drivers/gpu/drm/xilinx/Makefile
66index 19bc1541ca..c2717e40ea 100644
67--- a/drivers/gpu/drm/xilinx/Makefile
68+++ b/drivers/gpu/drm/xilinx/Makefile
69@@ -7,6 +7,7 @@ xilinx_drm-y := xilinx_drm_crtc.o xilinx_drm_connector.o xilinx_drm_drv.o \
70 xilinx_drm_plane.o
71 xilinx_drm-y += xilinx_cresample.o xilinx_osd.o xilinx_rgb2yuv.o xilinx_vtc.o
72
73+obj-$(CONFIG_DRM_DIGILENT_ENCODER) += dglnt_encoder.o
74 obj-$(CONFIG_DRM_XILINX) += xilinx_drm.o
75 obj-$(CONFIG_DRM_XILINX_DP) += xilinx_drm_dp.o
76 obj-$(CONFIG_DRM_XILINX_DP_SUB) += xilinx_drm_dp_sub.o
77diff --git a/drivers/gpu/drm/xilinx/dglnt_encoder.c b/drivers/gpu/drm/xilinx/dglnt_encoder.c
78new file mode 100644
79index 0000000000..26a23986f9
80--- /dev/null
81+++ b/drivers/gpu/drm/xilinx/dglnt_encoder.c
82@@ -0,0 +1,217 @@
83+/*
84+ * dglnt_encoder.c - DRM slave encoder for Video-out on Digilent boards
85+ *
86+ * Copyright (C) 2015 Digilent
87+ * Author: Sam Bobrowicz <sbobrowicz@digilentinc.com>
88+ *
89+ * Based on udl_encoder.c and udl_connector.c, Copyright (C) 2012 Red Hat.
90+ * Also based on xilinx_drm_dp.c, Copyright (C) 2014 Xilinx, Inc.
91+ *
92+ * This software is licensed under the terms of the GNU General Public
93+ * License version 2, as published by the Free Software Foundation, and
94+ * may be copied, distributed, and modified under those terms.
95+ *
96+ * This program is distributed in the hope that it will be useful,
97+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
98+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
99+ * GNU General Public License for more details.
100+ */
101+
102+#include <drm/drmP.h>
103+#include <drm/drm_edid.h>
104+#include <drm/drm_encoder_slave.h>
105+
106+#include <linux/device.h>
107+#include <linux/module.h>
108+#include <linux/err.h>
109+#include <linux/i2c.h>
110+#include <linux/of.h>
111+#include <linux/of_platform.h>
112+#include <linux/platform_device.h>
113+
114+#define DGLNT_ENC_MAX_FREQ 150000
115+#define DGLNT_ENC_MAX_H 1920
116+#define DGLNT_ENC_MAX_V 1080
117+#define DGLNT_ENC_PREF_H 1280
118+#define DGLNT_ENC_PREF_V 720
119+
120+struct dglnt_encoder {
121+ struct drm_encoder *encoder;
122+ struct i2c_adapter *i2c_bus;
123+ bool i2c_present;
124+};
125+
126+static inline struct dglnt_encoder *to_dglnt_encoder(
127+ struct drm_encoder *encoder)
128+{
129+ return to_encoder_slave(encoder)->slave_priv;
130+}
131+
132+static bool dglnt_mode_fixup(struct drm_encoder *encoder,
133+ const struct drm_display_mode *mode,
134+ struct drm_display_mode *adjusted_mode)
135+{
136+ return true;
137+}
138+
139+static void dglnt_encoder_mode_set(struct drm_encoder *encoder,
140+ struct drm_display_mode *mode,
141+ struct drm_display_mode *adjusted_mode)
142+{
143+}
144+
145+static void
146+dglnt_encoder_dpms(struct drm_encoder *encoder, int mode)
147+{
148+}
149+
150+static void dglnt_encoder_save(struct drm_encoder *encoder)
151+{
152+}
153+
154+static void dglnt_encoder_restore(struct drm_encoder *encoder)
155+{
156+}
157+
158+static int dglnt_encoder_mode_valid(struct drm_encoder *encoder,
159+ struct drm_display_mode *mode)
160+{
161+ if (mode &&
162+ !(mode->flags & ((DRM_MODE_FLAG_INTERLACE |
163+ DRM_MODE_FLAG_DBLCLK) | DRM_MODE_FLAG_3D_MASK)) &&
164+ (mode->clock <= DGLNT_ENC_MAX_FREQ) &&
165+ (mode->hdisplay <= DGLNT_ENC_MAX_H) &&
166+ (mode->vdisplay <= DGLNT_ENC_MAX_V))
167+ return MODE_OK;
168+ return MODE_BAD;
169+}
170+
171+static int dglnt_encoder_get_modes(struct drm_encoder *encoder,
172+ struct drm_connector *connector)
173+{
174+ struct dglnt_encoder *dglnt = to_dglnt_encoder(encoder);
175+ struct edid *edid;
176+ int num_modes = 0;
177+
178+ if (dglnt->i2c_present) {
179+ edid = drm_get_edid(connector, dglnt->i2c_bus);
180+ drm_mode_connector_update_edid_property(connector, edid);
181+ if (edid) {
182+ num_modes = drm_add_edid_modes(connector, edid);
183+ kfree(edid);
184+ }
185+ } else {
186+ num_modes = drm_add_modes_noedid(connector, DGLNT_ENC_MAX_H,
187+ DGLNT_ENC_MAX_V);
188+ drm_set_preferred_mode(connector, DGLNT_ENC_PREF_H,
189+ DGLNT_ENC_PREF_V);
190+ }
191+ return num_modes;
192+}
193+
194+static enum drm_connector_status dglnt_encoder_detect(
195+ struct drm_encoder *encoder,
196+ struct drm_connector *connector)
197+{
198+ struct dglnt_encoder *dglnt = to_dglnt_encoder(encoder);
199+
200+ if (dglnt->i2c_present) {
201+ if (drm_probe_ddc(dglnt->i2c_bus))
202+ return connector_status_connected;
203+ return connector_status_disconnected;
204+ } else
205+ return connector_status_unknown;
206+}
207+
208+static struct drm_encoder_slave_funcs dglnt_encoder_slave_funcs = {
209+ .dpms = dglnt_encoder_dpms,
210+ .save = dglnt_encoder_save,
211+ .restore = dglnt_encoder_restore,
212+ .mode_fixup = dglnt_mode_fixup,
213+ .mode_valid = dglnt_encoder_mode_valid,
214+ .mode_set = dglnt_encoder_mode_set,
215+ .detect = dglnt_encoder_detect,
216+ .get_modes = dglnt_encoder_get_modes,
217+};
218+
219+static int dglnt_encoder_encoder_init(struct platform_device *pdev,
220+ struct drm_device *dev,
221+ struct drm_encoder_slave *encoder)
222+{
223+ struct dglnt_encoder *dglnt = platform_get_drvdata(pdev);
224+ struct device_node *sub_node;
225+
226+ encoder->slave_priv = dglnt;
227+ encoder->slave_funcs = &dglnt_encoder_slave_funcs;
228+
229+ dglnt->encoder = &encoder->base;
230+
231+ /* get i2c adapter for edid */
232+ dglnt->i2c_present = false;
233+ sub_node = of_parse_phandle(pdev->dev.of_node, "dglnt,edid-i2c", 0);
234+ if (sub_node) {
235+ dglnt->i2c_bus = of_find_i2c_adapter_by_node(sub_node);
236+ if (!dglnt->i2c_bus)
237+ DRM_INFO("failed to get the edid i2c adapter, using default modes\n");
238+ else
239+ dglnt->i2c_present = true;
240+ of_node_put(sub_node);
241+ }
242+
243+ return 0;
244+}
245+
246+static int dglnt_encoder_probe(struct platform_device *pdev)
247+{
248+ struct dglnt_encoder *dglnt;
249+
250+ dglnt = devm_kzalloc(&pdev->dev, sizeof(*dglnt), GFP_KERNEL);
251+ if (!dglnt)
252+ return -ENOMEM;
253+
254+ platform_set_drvdata(pdev, dglnt);
255+
256+ return 0;
257+}
258+
259+static int dglnt_encoder_remove(struct platform_device *pdev)
260+{
261+ return 0;
262+}
263+
264+static const struct of_device_id dglnt_encoder_of_match[] = {
265+ { .compatible = "digilent,drm-encoder", },
266+ { /* end of table */ },
267+};
268+MODULE_DEVICE_TABLE(of, dglnt_encoder_of_match);
269+
270+static struct drm_platform_encoder_driver dglnt_encoder_driver = {
271+ .platform_driver = {
272+ .probe = dglnt_encoder_probe,
273+ .remove = dglnt_encoder_remove,
274+ .driver = {
275+ .owner = THIS_MODULE,
276+ .name = "dglnt-drm-enc",
277+ .of_match_table = dglnt_encoder_of_match,
278+ },
279+ },
280+
281+ .encoder_init = dglnt_encoder_encoder_init,
282+};
283+
284+static int __init dglnt_encoder_init(void)
285+{
286+ return platform_driver_register(&dglnt_encoder_driver.platform_driver);
287+}
288+
289+static void __exit dglnt_encoder_exit(void)
290+{
291+ platform_driver_unregister(&dglnt_encoder_driver.platform_driver);
292+}
293+
294+module_init(dglnt_encoder_init);
295+module_exit(dglnt_encoder_exit);
296+
297+MODULE_AUTHOR("Digilent, Inc.");
298+MODULE_DESCRIPTION("DRM slave encoder for Video-out on Digilent boards");
299+MODULE_LICENSE("GPL v2");
300--
3012.14.2
302
diff --git a/recipes-kernel/linux/linux-xlnx/v2017.3/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch b/recipes-kernel/linux/linux-xlnx/v2017.3/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch
deleted file mode 100644
index 9b6229db..00000000
--- a/recipes-kernel/linux/linux-xlnx/v2017.3/0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch
+++ /dev/null
@@ -1,607 +0,0 @@
1From 217e3b6f4393926b8dcad841381527ef3fc808c2 Mon Sep 17 00:00:00 2001
2From: Jason Wu <jason.wu.misc@gmail.com>
3Date: Sun, 10 Apr 2016 13:16:06 +1000
4Subject: [PATCH 2/3] clk: Add driver for axi_dynclk IP Core
5
6Add support for the axi_dynclk IP Core available from Digilent. This IP
7core dynamically configures the clock resources inside a Xilinx FPGA to
8generate a clock with a software programmable frequency.
9
10Upstream-Status: Pending
11
12Signed-off-by: Sam Bobrowicz <sbobrowicz@digilentinc.com>
13Signed-off-by: Jason Wu <jason.wu.misc@gmail.com>
14---
15 drivers/clk/Kconfig | 8 +
16 drivers/clk/Makefile | 1 +
17 drivers/clk/clk-dglnt-dynclk.c | 547 +++++++++++++++++++++++++++++++++++++++++
18 3 files changed, 556 insertions(+)
19 create mode 100644 drivers/clk/clk-dglnt-dynclk.c
20
21diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
22index dccb111100..7fe65a702b 100644
23--- a/drivers/clk/Kconfig
24+++ b/drivers/clk/Kconfig
25@@ -148,6 +148,14 @@ config CLK_QORIQ
26 This adds the clock driver support for Freescale QorIQ platforms
27 using common clock framework.
28
29+config COMMON_CLK_DGLNT_DYNCLK
30+ tristate "Digilent axi_dynclk Driver"
31+ depends on ARCH_ZYNQ || MICROBLAZE
32+ help
33+ ---help---
34+ Support for the Digilent AXI Dynamic Clock core for Xilinx
35+ FPGAs.
36+
37 config COMMON_CLK_XGENE
38 bool "Clock driver for APM XGene SoC"
39 default y
40diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
41index 0760449dde..45ce97d053 100644
42--- a/drivers/clk/Makefile
43+++ b/drivers/clk/Makefile
44@@ -24,6 +24,7 @@ obj-$(CONFIG_COMMON_CLK_CDCE706) += clk-cdce706.o
45 obj-$(CONFIG_COMMON_CLK_CDCE925) += clk-cdce925.o
46 obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o
47 obj-$(CONFIG_COMMON_CLK_CS2000_CP) += clk-cs2000-cp.o
48+obj-$(CONFIG_COMMON_CLK_DGLNT_DYNCLK) += clk-dglnt-dynclk.o
49 obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o
50 obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
51 obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
52diff --git a/drivers/clk/clk-dglnt-dynclk.c b/drivers/clk/clk-dglnt-dynclk.c
53new file mode 100644
54index 0000000000..496ad5fc90
55--- /dev/null
56+++ b/drivers/clk/clk-dglnt-dynclk.c
57@@ -0,0 +1,547 @@
58+/*
59+ * clk-dglnt-dynclk.c - Digilent AXI Dynamic Clock (axi_dynclk) Driver
60+ *
61+ * Copyright (C) 2015 Digilent
62+ * Author: Sam Bobrowicz <sbobrowicz@digilentinc.com>
63+ *
64+ * Reused code from clk-axi-clkgen.c, Copyright (C) 2012-2013 Analog Devices Inc.
65+ *
66+ * This software is licensed under the terms of the GNU General Public
67+ * License version 2, as published by the Free Software Foundation, and
68+ * may be copied, distributed, and modified under those terms.
69+ *
70+ * This program is distributed in the hope that it will be useful,
71+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
72+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
73+ * GNU General Public License for more details.
74+ */
75+
76+#include <linux/platform_device.h>
77+#include <linux/clk-provider.h>
78+#include <linux/clk.h>
79+#include <linux/slab.h>
80+#include <linux/io.h>
81+#include <linux/of.h>
82+#include <linux/module.h>
83+#include <linux/err.h>
84+#include <linux/kernel.h>
85+
86+#define CLK_BIT_WEDGE 13
87+#define CLK_BIT_NOCOUNT 12
88+
89+/* This value is used to signal an error */
90+#define ERR_CLKCOUNTCALC 0xFFFFFFFF
91+#define ERR_CLKDIVIDER (1 << CLK_BIT_WEDGE | 1 << CLK_BIT_NOCOUNT)
92+
93+#define DYNCLK_DIV_1_REGMASK 0x1041
94+/* 25 MHz (125 KHz / 5) */
95+#define DYNCLK_DEFAULT_FREQ 125000
96+
97+#define MMCM_FREQ_VCOMIN 600000
98+#define MMCM_FREQ_VCOMAX 1200000
99+#define MMCM_FREQ_PFDMIN 10000
100+#define MMCM_FREQ_PFDMAX 450000
101+#define MMCM_FREQ_OUTMIN 4000
102+#define MMCM_FREQ_OUTMAX 800000
103+#define MMCM_DIV_MAX 106
104+#define MMCM_FB_MIN 2
105+#define MMCM_FB_MAX 64
106+#define MMCM_CLKDIV_MAX 128
107+#define MMCM_CLKDIV_MIN 1
108+
109+#define OFST_DISPLAY_CTRL 0x0
110+#define OFST_DISPLAY_STATUS 0x4
111+#define OFST_DISPLAY_CLK_L 0x8
112+#define OFST_DISPLAY_FB_L 0x0C
113+#define OFST_DISPLAY_FB_H_CLK_H 0x10
114+#define OFST_DISPLAY_DIV 0x14
115+#define OFST_DISPLAY_LOCK_L 0x18
116+#define OFST_DISPLAY_FLTR_LOCK_H 0x1C
117+
118+static const u64 lock_lookup[64] = {
119+ 0b0011000110111110100011111010010000000001,
120+ 0b0011000110111110100011111010010000000001,
121+ 0b0100001000111110100011111010010000000001,
122+ 0b0101101011111110100011111010010000000001,
123+ 0b0111001110111110100011111010010000000001,
124+ 0b1000110001111110100011111010010000000001,
125+ 0b1001110011111110100011111010010000000001,
126+ 0b1011010110111110100011111010010000000001,
127+ 0b1100111001111110100011111010010000000001,
128+ 0b1110011100111110100011111010010000000001,
129+ 0b1111111111111000010011111010010000000001,
130+ 0b1111111111110011100111111010010000000001,
131+ 0b1111111111101110111011111010010000000001,
132+ 0b1111111111101011110011111010010000000001,
133+ 0b1111111111101000101011111010010000000001,
134+ 0b1111111111100111000111111010010000000001,
135+ 0b1111111111100011111111111010010000000001,
136+ 0b1111111111100010011011111010010000000001,
137+ 0b1111111111100000110111111010010000000001,
138+ 0b1111111111011111010011111010010000000001,
139+ 0b1111111111011101101111111010010000000001,
140+ 0b1111111111011100001011111010010000000001,
141+ 0b1111111111011010100111111010010000000001,
142+ 0b1111111111011001000011111010010000000001,
143+ 0b1111111111011001000011111010010000000001,
144+ 0b1111111111010111011111111010010000000001,
145+ 0b1111111111010101111011111010010000000001,
146+ 0b1111111111010101111011111010010000000001,
147+ 0b1111111111010100010111111010010000000001,
148+ 0b1111111111010100010111111010010000000001,
149+ 0b1111111111010010110011111010010000000001,
150+ 0b1111111111010010110011111010010000000001,
151+ 0b1111111111010010110011111010010000000001,
152+ 0b1111111111010001001111111010010000000001,
153+ 0b1111111111010001001111111010010000000001,
154+ 0b1111111111010001001111111010010000000001,
155+ 0b1111111111001111101011111010010000000001,
156+ 0b1111111111001111101011111010010000000001,
157+ 0b1111111111001111101011111010010000000001,
158+ 0b1111111111001111101011111010010000000001,
159+ 0b1111111111001111101011111010010000000001,
160+ 0b1111111111001111101011111010010000000001,
161+ 0b1111111111001111101011111010010000000001,
162+ 0b1111111111001111101011111010010000000001,
163+ 0b1111111111001111101011111010010000000001,
164+ 0b1111111111001111101011111010010000000001,
165+ 0b1111111111001111101011111010010000000001,
166+ 0b1111111111001111101011111010010000000001,
167+ 0b1111111111001111101011111010010000000001,
168+ 0b1111111111001111101011111010010000000001,
169+ 0b1111111111001111101011111010010000000001,
170+ 0b1111111111001111101011111010010000000001,
171+ 0b1111111111001111101011111010010000000001,
172+ 0b1111111111001111101011111010010000000001,
173+ 0b1111111111001111101011111010010000000001,
174+ 0b1111111111001111101011111010010000000001,
175+ 0b1111111111001111101011111010010000000001,
176+ 0b1111111111001111101011111010010000000001,
177+ 0b1111111111001111101011111010010000000001,
178+ 0b1111111111001111101011111010010000000001,
179+ 0b1111111111001111101011111010010000000001,
180+ 0b1111111111001111101011111010010000000001,
181+ 0b1111111111001111101011111010010000000001,
182+ 0b1111111111001111101011111010010000000001
183+};
184+
185+static const u32 filter_lookup_low[64] = {
186+ 0b0001011111,
187+ 0b0001010111,
188+ 0b0001111011,
189+ 0b0001011011,
190+ 0b0001101011,
191+ 0b0001110011,
192+ 0b0001110011,
193+ 0b0001110011,
194+ 0b0001110011,
195+ 0b0001001011,
196+ 0b0001001011,
197+ 0b0001001011,
198+ 0b0010110011,
199+ 0b0001010011,
200+ 0b0001010011,
201+ 0b0001010011,
202+ 0b0001010011,
203+ 0b0001010011,
204+ 0b0001010011,
205+ 0b0001010011,
206+ 0b0001010011,
207+ 0b0001010011,
208+ 0b0001010011,
209+ 0b0001100011,
210+ 0b0001100011,
211+ 0b0001100011,
212+ 0b0001100011,
213+ 0b0001100011,
214+ 0b0001100011,
215+ 0b0001100011,
216+ 0b0001100011,
217+ 0b0001100011,
218+ 0b0001100011,
219+ 0b0001100011,
220+ 0b0001100011,
221+ 0b0001100011,
222+ 0b0001100011,
223+ 0b0010010011,
224+ 0b0010010011,
225+ 0b0010010011,
226+ 0b0010010011,
227+ 0b0010010011,
228+ 0b0010010011,
229+ 0b0010010011,
230+ 0b0010010011,
231+ 0b0010010011,
232+ 0b0010010011,
233+ 0b0010100011,
234+ 0b0010100011,
235+ 0b0010100011,
236+ 0b0010100011,
237+ 0b0010100011,
238+ 0b0010100011,
239+ 0b0010100011,
240+ 0b0010100011,
241+ 0b0010100011,
242+ 0b0010100011,
243+ 0b0010100011,
244+ 0b0010100011,
245+ 0b0010100011,
246+ 0b0010100011,
247+ 0b0010100011,
248+ 0b0010100011,
249+ 0b0010100011
250+};
251+
252+struct dglnt_dynclk_reg;
253+struct dglnt_dynclk_mode;
254+struct dglnt_dynclk;
255+
256+struct dglnt_dynclk_reg {
257+ u32 clk0L;
258+ u32 clkFBL;
259+ u32 clkFBH_clk0H;
260+ u32 divclk;
261+ u32 lockL;
262+ u32 fltr_lockH;
263+};
264+
265+struct dglnt_dynclk_mode {
266+ u32 freq;
267+ u32 fbmult;
268+ u32 clkdiv;
269+ u32 maindiv;
270+};
271+
272+struct dglnt_dynclk {
273+ void __iomem *base;
274+ struct clk_hw clk_hw;
275+ unsigned long freq;
276+};
277+
278+u32 dglnt_dynclk_divider(u32 divide)
279+{
280+ u32 output = 0;
281+ u32 highTime = 0;
282+ u32 lowTime = 0;
283+
284+ if ((divide < 1) || (divide > 128))
285+ return ERR_CLKDIVIDER;
286+
287+ if (divide == 1)
288+ return DYNCLK_DIV_1_REGMASK;
289+
290+ highTime = divide / 2;
291+ /* if divide is odd */
292+ if (divide & 0x1) {
293+ lowTime = highTime + 1;
294+ output = 1 << CLK_BIT_WEDGE;
295+ } else {
296+ lowTime = highTime;
297+ }
298+
299+ output |= 0x03F & lowTime;
300+ output |= 0xFC0 & (highTime << 6);
301+ return output;
302+}
303+
304+u32 dglnt_dynclk_count_calc(u32 divide)
305+{
306+ u32 output = 0;
307+ u32 divCalc = 0;
308+
309+ divCalc = dglnt_dynclk_divider(divide);
310+ if (divCalc == ERR_CLKDIVIDER)
311+ output = ERR_CLKCOUNTCALC;
312+ else
313+ output = (0xFFF & divCalc) | ((divCalc << 10) & 0x00C00000);
314+ return output;
315+}
316+
317+
318+int dglnt_dynclk_find_reg(struct dglnt_dynclk_reg *regValues,
319+ struct dglnt_dynclk_mode *clkParams)
320+{
321+ if ((clkParams->fbmult < 2) || clkParams->fbmult > 64)
322+ return -EINVAL;
323+
324+ regValues->clk0L = dglnt_dynclk_count_calc(clkParams->clkdiv);
325+ if (regValues->clk0L == ERR_CLKCOUNTCALC)
326+ return -EINVAL;
327+
328+ regValues->clkFBL = dglnt_dynclk_count_calc(clkParams->fbmult);
329+ if (regValues->clkFBL == ERR_CLKCOUNTCALC)
330+ return -EINVAL;
331+
332+ regValues->clkFBH_clk0H = 0;
333+
334+ regValues->divclk = dglnt_dynclk_divider(clkParams->maindiv);
335+ if (regValues->divclk == ERR_CLKDIVIDER)
336+ return -EINVAL;
337+
338+ regValues->lockL = (u32)(lock_lookup[clkParams->fbmult - 1] &
339+ 0xFFFFFFFF);
340+
341+ regValues->fltr_lockH = (u32)((lock_lookup[clkParams->fbmult - 1] >>
342+ 32) & 0x000000FF);
343+ regValues->fltr_lockH |= ((filter_lookup_low[clkParams->fbmult - 1] <<
344+ 16) & 0x03FF0000);
345+
346+ return 0;
347+}
348+
349+void dglnt_dynclk_write_reg(struct dglnt_dynclk_reg *regValues,
350+ void __iomem *baseaddr)
351+{
352+ writel(regValues->clk0L, baseaddr + OFST_DISPLAY_CLK_L);
353+ writel(regValues->clkFBL, baseaddr + OFST_DISPLAY_FB_L);
354+ writel(regValues->clkFBH_clk0H, baseaddr + OFST_DISPLAY_FB_H_CLK_H);
355+ writel(regValues->divclk, baseaddr + OFST_DISPLAY_DIV);
356+ writel(regValues->lockL, baseaddr + OFST_DISPLAY_LOCK_L);
357+ writel(regValues->fltr_lockH, baseaddr + OFST_DISPLAY_FLTR_LOCK_H);
358+}
359+
360+u32 dglnt_dynclk_find_mode(u32 freq, u32 parentFreq,
361+ struct dglnt_dynclk_mode *bestPick)
362+{
363+ u32 bestError = MMCM_FREQ_OUTMAX;
364+ u32 curError;
365+ u32 curClkMult;
366+ u32 curFreq;
367+ u32 divVal;
368+ u32 curFb, curClkDiv;
369+ u32 minFb = 0;
370+ u32 maxFb = 0;
371+ u32 curDiv = 1;
372+ u32 maxDiv;
373+ bool freq_found = false;
374+
375+ bestPick->freq = 0;
376+ if (parentFreq == 0)
377+ return 0;
378+
379+ /* minimum frequency is actually dictated by VCOmin */
380+ if (freq < MMCM_FREQ_OUTMIN)
381+ freq = MMCM_FREQ_OUTMIN;
382+ if (freq > MMCM_FREQ_OUTMAX)
383+ freq = MMCM_FREQ_OUTMAX;
384+
385+ if (parentFreq > MMCM_FREQ_PFDMAX)
386+ curDiv = 2;
387+ maxDiv = parentFreq / MMCM_FREQ_PFDMIN;
388+ if (maxDiv > MMCM_DIV_MAX)
389+ maxDiv = MMCM_DIV_MAX;
390+
391+ while (curDiv <= maxDiv && !freq_found) {
392+ minFb = curDiv * DIV_ROUND_UP(MMCM_FREQ_VCOMIN, parentFreq);
393+ maxFb = curDiv * (MMCM_FREQ_VCOMAX / parentFreq);
394+ if (maxFb > MMCM_FB_MAX)
395+ maxFb = MMCM_FB_MAX;
396+ if (minFb < MMCM_FB_MIN)
397+ minFb = MMCM_FB_MIN;
398+
399+ divVal = curDiv * freq;
400+ /*
401+ * This multiplier is used to find the best clkDiv value for
402+ * each FB value
403+ */
404+ curClkMult = ((parentFreq * 1000) + (divVal / 2)) / divVal;
405+
406+ curFb = minFb;
407+ while (curFb <= maxFb && !freq_found) {
408+ curClkDiv = ((curClkMult * curFb) + 500) / 1000;
409+ if (curClkDiv > MMCM_CLKDIV_MAX)
410+ curClkDiv = MMCM_CLKDIV_MAX;
411+ if (curClkDiv < MMCM_CLKDIV_MIN)
412+ curClkDiv = MMCM_CLKDIV_MIN;
413+ curFreq = (((parentFreq * curFb) / curDiv) / curClkDiv);
414+ if (curFreq >= freq)
415+ curError = curFreq - freq;
416+ else
417+ curError = freq - curFreq;
418+ if (curError < bestError) {
419+ bestError = curError;
420+ bestPick->clkdiv = curClkDiv;
421+ bestPick->fbmult = curFb;
422+ bestPick->maindiv = curDiv;
423+ bestPick->freq = curFreq;
424+ }
425+ if (!curError)
426+ freq_found = true;
427+ curFb++;
428+ }
429+ curDiv++;
430+ }
431+ return bestPick->freq;
432+}
433+
434+static struct dglnt_dynclk *clk_hw_to_dglnt_dynclk(struct clk_hw *clk_hw)
435+{
436+ return container_of(clk_hw, struct dglnt_dynclk, clk_hw);
437+}
438+
439+
440+static int dglnt_dynclk_enable(struct clk_hw *clk_hw)
441+{
442+ struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
443+ unsigned int clock_state;
444+
445+ if (dglnt_dynclk->freq) {
446+ writel(1, dglnt_dynclk->base + OFST_DISPLAY_CTRL);
447+ do {
448+ clock_state = readl(dglnt_dynclk->base +
449+ OFST_DISPLAY_STATUS);
450+ } while (!clock_state);
451+ }
452+ return 0;
453+}
454+
455+static void dglnt_dynclk_disable(struct clk_hw *clk_hw)
456+{
457+ struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
458+
459+ writel(0, dglnt_dynclk->base + OFST_DISPLAY_CTRL);
460+}
461+
462+static int dglnt_dynclk_set_rate(struct clk_hw *clk_hw,
463+ unsigned long rate, unsigned long parent_rate)
464+{
465+ struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
466+ struct dglnt_dynclk_reg clkReg;
467+ struct dglnt_dynclk_mode clkMode;
468+
469+ if (parent_rate == 0 || rate == 0)
470+ return -EINVAL;
471+ if (rate == dglnt_dynclk->freq)
472+ return 0;
473+
474+ /*
475+ * Convert from Hz to KHz, then multiply by five to account for
476+ * BUFR division
477+ */
478+ rate = (rate + 100) / 200;
479+ /* convert from Hz to KHz */
480+ parent_rate = (parent_rate + 500) / 1000;
481+ if (!dglnt_dynclk_find_mode(rate, parent_rate, &clkMode))
482+ return -EINVAL;
483+
484+ /*
485+ * Write to the PLL dynamic configuration registers to configure it
486+ * with the calculated parameters.
487+ */
488+ dglnt_dynclk_find_reg(&clkReg, &clkMode);
489+ dglnt_dynclk_write_reg(&clkReg, dglnt_dynclk->base);
490+ dglnt_dynclk->freq = clkMode.freq * 200;
491+ dglnt_dynclk_disable(clk_hw);
492+ dglnt_dynclk_enable(clk_hw);
493+
494+ return 0;
495+}
496+
497+static long dglnt_dynclk_round_rate(struct clk_hw *hw, unsigned long rate,
498+ unsigned long *parent_rate)
499+{
500+ struct dglnt_dynclk_mode clkMode;
501+
502+ dglnt_dynclk_find_mode(((rate + 100) / 200),
503+ ((*parent_rate) + 500) / 1000, &clkMode);
504+
505+ return (clkMode.freq * 200);
506+}
507+
508+static unsigned long dglnt_dynclk_recalc_rate(struct clk_hw *clk_hw,
509+ unsigned long parent_rate)
510+{
511+ struct dglnt_dynclk *dglnt_dynclk = clk_hw_to_dglnt_dynclk(clk_hw);
512+
513+ return dglnt_dynclk->freq;
514+}
515+
516+
517+static const struct clk_ops dglnt_dynclk_ops = {
518+ .recalc_rate = dglnt_dynclk_recalc_rate,
519+ .round_rate = dglnt_dynclk_round_rate,
520+ .set_rate = dglnt_dynclk_set_rate,
521+ .enable = dglnt_dynclk_enable,
522+ .disable = dglnt_dynclk_disable,
523+};
524+
525+static const struct of_device_id dglnt_dynclk_ids[] = {
526+ { .compatible = "digilent,axi-dynclk", },
527+ { },
528+};
529+MODULE_DEVICE_TABLE(of, dglnt_dynclk_ids);
530+
531+static int dglnt_dynclk_probe(struct platform_device *pdev)
532+{
533+ const struct of_device_id *id;
534+ struct dglnt_dynclk *dglnt_dynclk;
535+ struct clk_init_data init;
536+ const char *parent_name;
537+ const char *clk_name;
538+ struct resource *mem;
539+ struct clk *clk;
540+
541+ if (!pdev->dev.of_node)
542+ return -ENODEV;
543+
544+ id = of_match_node(dglnt_dynclk_ids, pdev->dev.of_node);
545+ if (!id)
546+ return -ENODEV;
547+
548+ dglnt_dynclk = devm_kzalloc(&pdev->dev, sizeof(*dglnt_dynclk),
549+ GFP_KERNEL);
550+ if (!dglnt_dynclk)
551+ return -ENOMEM;
552+
553+ mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
554+ dglnt_dynclk->base = devm_ioremap_resource(&pdev->dev, mem);
555+ if (IS_ERR(dglnt_dynclk->base))
556+ return PTR_ERR(dglnt_dynclk->base);
557+
558+ parent_name = of_clk_get_parent_name(pdev->dev.of_node, 0);
559+ if (!parent_name)
560+ return -EINVAL;
561+
562+ clk_name = pdev->dev.of_node->name;
563+ of_property_read_string(pdev->dev.of_node, "clock-output-names",
564+ &clk_name);
565+
566+ init.name = clk_name;
567+ init.ops = &dglnt_dynclk_ops;
568+ init.flags = 0;
569+ init.parent_names = &parent_name;
570+ init.num_parents = 1;
571+
572+ dglnt_dynclk->freq = 0;
573+ dglnt_dynclk_disable(&dglnt_dynclk->clk_hw);
574+
575+ dglnt_dynclk->clk_hw.init = &init;
576+ clk = devm_clk_register(&pdev->dev, &dglnt_dynclk->clk_hw);
577+ if (IS_ERR(clk))
578+ return PTR_ERR(clk);
579+
580+ return of_clk_add_provider(pdev->dev.of_node, of_clk_src_simple_get,
581+ clk);
582+}
583+
584+static int dglnt_dynclk_remove(struct platform_device *pdev)
585+{
586+ of_clk_del_provider(pdev->dev.of_node);
587+
588+ return 0;
589+}
590+
591+static struct platform_driver dglnt_dynclk_driver = {
592+ .driver = {
593+ .name = "dglnt-dynclk",
594+ .owner = THIS_MODULE,
595+ .of_match_table = dglnt_dynclk_ids,
596+ },
597+ .probe = dglnt_dynclk_probe,
598+ .remove = dglnt_dynclk_remove,
599+};
600+module_platform_driver(dglnt_dynclk_driver);
601+
602+MODULE_LICENSE("GPL v2");
603+MODULE_AUTHOR("Sam Bobrowicz <sbobrowicz@digilentinc.com>");
604+MODULE_DESCRIPTION("CCF Driver for Digilent axi_dynclk IP Core");
605--
6062.14.2
607
diff --git a/recipes-kernel/linux/linux-xlnx/v2017.3/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch b/recipes-kernel/linux/linux-xlnx/v2017.3/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch
deleted file mode 100644
index a98d84c5..00000000
--- a/recipes-kernel/linux/linux-xlnx/v2017.3/0003-drm-xilinx-Fix-DPMS-transition-to-on.patch
+++ /dev/null
@@ -1,54 +0,0 @@
1From 1a18e2b514ae9e75145597ac509a87f656c976ba Mon Sep 17 00:00:00 2001
2From: Nathan Rossi <nathan@nathanrossi.com>
3Date: Mon, 2 May 2016 23:46:42 +1000
4Subject: [PATCH 3/3] drm: xilinx: Fix DPMS transition to on
5
6Fix the issues where the VTC is reset (losing its timing config).
7
8Also fix the issue where the plane destroys its DMA descriptors and
9marks the DMA channels as inactive but never recreates the descriptors
10and never updates the active state when turning DPMS back on.
11
12Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
13Upstream-Status: Pending [This is a workaround]
14---
15 drivers/gpu/drm/xilinx/xilinx_drm_crtc.c | 1 -
16 drivers/gpu/drm/xilinx/xilinx_drm_plane.c | 3 ++-
17 2 files changed, 2 insertions(+), 2 deletions(-)
18
19diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c b/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
20index 631d35b921..93dbd4b58a 100644
21--- a/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
22+++ b/drivers/gpu/drm/xilinx/xilinx_drm_crtc.c
23@@ -88,7 +88,6 @@ static void xilinx_drm_crtc_dpms(struct drm_crtc *base_crtc, int dpms)
24 default:
25 if (crtc->vtc) {
26 xilinx_vtc_disable(crtc->vtc);
27- xilinx_vtc_reset(crtc->vtc);
28 }
29 if (crtc->cresample) {
30 xilinx_cresample_disable(crtc->cresample);
31diff --git a/drivers/gpu/drm/xilinx/xilinx_drm_plane.c b/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
32index 6a248b72d4..d2518a4bdf 100644
33--- a/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
34+++ b/drivers/gpu/drm/xilinx/xilinx_drm_plane.c
35@@ -140,7 +140,7 @@ void xilinx_drm_plane_commit(struct drm_plane *base_plane)
36 for (i = 0; i < MAX_NUM_SUB_PLANES; i++) {
37 struct xilinx_drm_plane_dma *dma = &plane->dma[i];
38
39- if (dma->chan && dma->is_active) {
40+ if (dma->chan) {
41 flags = DMA_CTRL_ACK | DMA_PREP_INTERRUPT;
42 desc = dmaengine_prep_interleaved_dma(dma->chan,
43 &dma->xt,
44@@ -153,6 +153,7 @@ void xilinx_drm_plane_commit(struct drm_plane *base_plane)
45 dmaengine_submit(desc);
46
47 dma_async_issue_pending(dma->chan);
48+ dma->is_active = true;
49 }
50 }
51 }
52--
532.14.2
54
diff --git a/recipes-kernel/linux/linux-xlnx_2017.3.bb b/recipes-kernel/linux/linux-xlnx_2017.3.bb
deleted file mode 100644
index 9178f970..00000000
--- a/recipes-kernel/linux/linux-xlnx_2017.3.bb
+++ /dev/null
@@ -1,12 +0,0 @@
1LINUX_VERSION = "4.9"
2XILINX_RELEASE_VERSION = "v2017.3"
3SRCREV ?= "f1b1e077d641fc83b54c1b8f168cbb58044fbd4e"
4
5include linux-xlnx.inc
6
7SRC_URI_append_zybo-linux-bd-zynq7 = " \
8 file://0001-drm-xilinx-Add-encoder-for-Digilent-boards.patch \
9 file://0002-clk-Add-driver-for-axi_dynclk-IP-Core.patch \
10 file://0003-drm-xilinx-Fix-DPMS-transition-to-on.patch \
11 "
12
diff --git a/recipes-kernel/linux/linux-yocto-dev.bbappend b/recipes-kernel/linux/linux-yocto-dev.bbappend
deleted file mode 100644
index 05c39951..00000000
--- a/recipes-kernel/linux/linux-yocto-dev.bbappend
+++ /dev/null
@@ -1 +0,0 @@
1require linux-yocto-xilinx.inc
diff --git a/recipes-kernel/linux/linux-yocto-tiny_%.bbappend b/recipes-kernel/linux/linux-yocto-tiny_%.bbappend
deleted file mode 100644
index 05c39951..00000000
--- a/recipes-kernel/linux/linux-yocto-tiny_%.bbappend
+++ /dev/null
@@ -1 +0,0 @@
1require linux-yocto-xilinx.inc
diff --git a/recipes-kernel/linux/linux-yocto-xilinx.inc b/recipes-kernel/linux/linux-yocto-xilinx.inc
deleted file mode 100644
index 92093008..00000000
--- a/recipes-kernel/linux/linux-yocto-xilinx.inc
+++ /dev/null
@@ -1,25 +0,0 @@
1require linux-microblaze.inc
2
3# Add meta-xilinx kmeta
4FILESEXTRAPATHS_prepend := "${THISDIR}:"
5SRC_URI_append = " file://xilinx-kmeta;type=kmeta;name=xilinx-kmeta;destsuffix=xilinx-kmeta"
6
7# Zynq default generic KMACHINE
8COMPATIBLE_MACHINE_zynq = "zynq"
9KMACHINE_zynq = "zynq"
10
11# ZynqMP default generic KMACHINE
12COMPATIBLE_MACHINE_zynqmp = "zynqmp"
13KMACHINE_zynqmp = "zynqmp"
14
15# MicroBlaze KMACHINEs
16KMACHINE_ml605-qemu-microblazeel = "qemumicroblazeel"
17KMACHINE_s3adsp1800-qemu-microblazeeb = "qemumicroblazeeb"
18
19# MicroBlaze default generic KMACHINE
20KMACHINE_microblaze = "microblaze"
21COMPATIBLE_MACHINE_microblaze = "microblaze"
22
23# Default kernel config fragements for specific machines
24KERNEL_FEATURES_append_kc705-microblazeel = " bsp/kc705-microblazeel/kc705-microblazeel.scc"
25
diff --git a/recipes-kernel/linux/linux-yocto_%.bbappend b/recipes-kernel/linux/linux-yocto_%.bbappend
deleted file mode 100644
index 05c39951..00000000
--- a/recipes-kernel/linux/linux-yocto_%.bbappend
+++ /dev/null
@@ -1 +0,0 @@
1require linux-yocto-xilinx.inc
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg b/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg
deleted file mode 100644
index bf7f316a..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
1CONFIG_XILINX_MICROBLAZE0_FAMILY="kintex7"
2
3# CPU ISA Config
4CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR=1
5CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR=1
6CONFIG_XILINX_MICROBLAZE0_USE_BARREL=1
7CONFIG_XILINX_MICROBLAZE0_USE_DIV=1
8CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL=2
9CONFIG_XILINX_MICROBLAZE0_USE_FPU=0
10CONFIG_XILINX_MICROBLAZE0_HW_VER="10.0"
11
12# Memory Base Address
13CONFIG_KERNEL_BASE_ADDR=0x80000000
14
15CONFIG_XILINX_AXI_EMAC=y
16CONFIG_XILINX_PHY=y
17CONFIG_BLK_DEV_INITRD=y
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.scc b/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.scc
deleted file mode 100644
index aaf7c2af..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/kc705-microblazeel/kc705-microblazeel.scc
+++ /dev/null
@@ -1,4 +0,0 @@
1define KFEATURE_DESCRIPTION "Kernel Config for kc705-microblazeel specific setup"
2define KFEATURE_COMPATIBILITY board
3
4kconf hardware kc705-microblazeel.cfg
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-standard.scc b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-standard.scc
deleted file mode 100644
index 170489d4..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-standard.scc
+++ /dev/null
@@ -1,14 +0,0 @@
1define KMACHINE microblaze
2define KTYPE standard
3define KARCH microblaze
4
5include ktypes/standard/standard.scc
6
7include bsp/xilinx/soc/microblaze.scc
8
9# Common board drivers
10include bsp/xilinx/board-common.scc
11
12# default policy for standard kernels
13include features/latencytop/latencytop.scc
14include features/profiling/profiling.scc
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-tiny.scc b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-tiny.scc
deleted file mode 100644
index 979fb86b..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/microblaze-tiny.scc
+++ /dev/null
@@ -1,11 +0,0 @@
1define KMACHINE microblaze
2define KTYPE tiny
3define KARCH microblaze
4
5include ktypes/tiny/tiny.scc
6
7include bsp/xilinx/soc/microblaze.scc
8
9# Common board drivers
10include bsp/xilinx/board-common.scc
11
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.cfg b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.cfg
deleted file mode 100644
index 0f66c8bc..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.cfg
+++ /dev/null
@@ -1,14 +0,0 @@
1# CMA
2CONFIG_CMA=y
3CONFIG_DMA_CMA=y
4CONFIG_CMA_SIZE_MBYTES=128
5CONFIG_CMA_SIZE_SEL_MBYTES=y
6CONFIG_CMA_ALIGNMENT=8
7
8# DRM
9CONFIG_DRM=y
10CONFIG_DRM_XILINX=y
11
12# frame buffer console
13CONFIG_FRAMEBUFFER_CONSOLE=y
14
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.scc b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.scc
deleted file mode 100644
index 56c80c3a..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-drm.scc
+++ /dev/null
@@ -1,4 +0,0 @@
1define KFEATURE_DESCRIPTION "Enable Xilinx DRM support"
2define KFEATURE_COMPATIBILITY board
3
4kconfig hardware drivers-drm.cfg
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.cfg b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.cfg
deleted file mode 100644
index df88fce7..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.cfg
+++ /dev/null
@@ -1,7 +0,0 @@
1
2# PCIe
3CONFIG_PCI=y
4CONFIG_PCI_MSI=y
5CONFIG_PCIEPORTBUS=y
6CONFIG_PCIE_XILINX=y
7
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.scc b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.scc
deleted file mode 100644
index e60047ae..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-softip-pcie.scc
+++ /dev/null
@@ -1,5 +0,0 @@
1define KFEATURE_DESCRIPTION "Xilinx AXI PCIe Host Bridge"
2define KFEATURE_COMPATIBILITY board
3
4kconfig hardware drivers-softip-pcie.cfg
5
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-softip.cfg b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-softip.cfg
deleted file mode 100644
index 5c2529a2..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-softip.cfg
+++ /dev/null
@@ -1,19 +0,0 @@
1# Xilinx DMA engines
2CONFIG_XILINX_DMA_ENGINES=y
3
4# Xilinx Traffic Generator
5CONFIG_XILINX_TRAFGEN=y
6
7# Xilinx Perfmon UIO driver
8CONFIG_UIO_XILINX_APM=y
9
10# Interrupt controller
11CONFIG_XILINX_INTC=y
12
13# Xilinx PHY
14CONFIG_XILINX_PHY=y
15
16# JESD204B PHY
17CONFIG_XILINX_JESD204B=y
18CONFIG_XILINX_JESD204B_PHY=y
19
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynq.cfg b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynq.cfg
deleted file mode 100644
index 9b70ac4e..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynq.cfg
+++ /dev/null
@@ -1,16 +0,0 @@
1# Devcfg
2CONFIG_XILINX_DEVCFG=y
3
4# Ethernet
5CONFIG_XILINX_PS_EMAC=y
6
7# SPI
8CONFIG_SPI_ZYNQ_QSPI=y
9
10# NAND
11CONFIG_MTD_NAND_PL353=y
12CONFIG_MTD_NAND_PL35X=y
13
14# FPGA
15CONFIG_XILINX_PR_DECOUPLER=y
16
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynqmp.cfg b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynqmp.cfg
deleted file mode 100644
index 4cbb2050..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-xlnx-zynqmp.cfg
+++ /dev/null
@@ -1,67 +0,0 @@
1CONFIG_SOC_XILINX_ZYNQMP=y
2
3# PMU Firmware API
4CONFIG_ZYNQMP_PM_API_DEBUGFS=y
5
6# DMA
7CONFIG_DMADEVICES=y
8CONFIG_XILINX_DMA_ENGINES=y
9CONFIG_XILINX_DPDMA=y
10
11# NAND
12CONFIG_MTD=y
13CONFIG_MTD_NAND=y
14CONFIG_MTD_NAND_ARASAN=y
15
16# PCIe
17CONFIG_PCI=y
18CONFIG_PCI_MSI=y
19CONFIG_PCIE_XILINX_NWL=y
20
21# CONFIG_ARM_MALI is not set
22
23CONFIG_PHY_XILINX_ZYNQMP=y
24
25# EDAC
26CONFIG_EDAC=y
27CONFIG_EDAC_MM_EDAC=y
28CONFIG_EDAC_CORTEX_ARM64=y
29CONFIG_EDAC_SYNOPSYS=y
30CONFIG_EDAC_ZYNQMP_OCM=y
31
32# Sound
33CONFIG_SOUND=y
34CONFIG_SND=y
35CONFIG_SND_DRIVERS=y
36CONFIG_SND_SOC=y
37CONFIG_SND_SOC_XILINX_DP=y
38
39# Ethernet
40CONFIG_MACB_EXT_BD=y
41
42# FPGA
43CONFIG_FPGA=y
44CONFIG_FPGA_MGR_ZYNQMP_FPGA=y
45CONFIG_FPGA_REGION=y
46CONFIG_FPGA_BRIDGE=y
47CONFIG_XILINX_PR_DECOUPLER=y
48
49# AMS
50CONFIG_XILINX_AMS=y
51
52# NVMEM
53CONFIG_NVMEM=y
54CONFIG_NVMEM_ZYNQMP=y
55
56# Fabric Clock
57CONFIG_STAGING=y
58CONFIG_XILINX_FCLK=y
59
60# Clock controllers
61CONFIG_COMMON_CLK=y
62CONFIG_COMMON_CLK_ZYNQMP=y
63
64# Reset controller
65CONFIG_RESET_CONTROLLER=y
66CONFIG_ZYNQMP_RESET_CONTROLLER=y
67
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-zynqmp.cfg b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-zynqmp.cfg
deleted file mode 100644
index dc69a659..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/drivers-zynqmp.cfg
+++ /dev/null
@@ -1,68 +0,0 @@
1
2# Bus
3CONFIG_ARM_CCI400_PMU=y
4
5# IOMMU
6CONFIG_IOMMU_SUPPORT=y
7CONFIG_ARM_SMMU=y
8
9# Serial
10CONFIG_TTY=y
11CONFIG_SERIAL_EARLYCON=y
12CONFIG_SERIAL_XILINX_PS_UART=y
13CONFIG_SERIAL_XILINX_PS_UART_CONSOLE=y
14
15# Watchdog
16CONFIG_WATCHDOG=y
17CONFIG_CADENCE_WATCHDOG=y
18
19# RTC
20CONFIG_RTC_CLASS=y
21CONFIG_RTC_DRV_ZYNQMP=y
22
23# Ethernet
24CONFIG_NET_CADENCE=y
25CONFIG_MACB=y
26
27# GPIO
28CONFIG_GPIOLIB=y
29CONFIG_GPIO_SYSFS=y
30CONFIG_GPIO_ZYNQ=y
31
32# I2C
33CONFIG_I2C=y
34CONFIG_I2C_CADENCE=y
35
36# SPI
37CONFIG_SPI=y
38CONFIG_SPI_CADENCE=y
39CONFIG_SPI_ZYNQMP_GQSPI=y
40
41# CAN
42CONFIG_CAN=y
43CONFIG_CAN_DEV=y
44CONFIG_CAN_XILINXCAN=y
45
46# SATA
47CONFIG_ATA=y
48CONFIG_ATA_SFF=y
49CONFIG_SATA_AHCI_PLATFORM=y
50CONFIG_AHCI_CEVA=y
51
52# MMC/SD
53CONFIG_MMC=y
54CONFIG_MMC_SDHCI=y
55CONFIG_MMC_SDHCI_PLTFM=y
56CONFIG_MMC_SDHCI_OF_ARASAN=y
57
58# USB
59CONFIG_USB=y
60CONFIG_USB_SUPPORT=y
61CONFIG_USB_XHCI_HCD=y
62CONFIG_USB_DWC3=y
63CONFIG_USB_GADGET=y
64
65# DMA
66CONFIG_DMA_ENGINE=y
67CONFIG_XILINX_ZYNQMP_DMA=y
68
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.cfg b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.cfg
deleted file mode 100644
index 072a3feb..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.cfg
+++ /dev/null
@@ -1,26 +0,0 @@
1
2# Arch Feature Selections
3CONFIG_ARM64=y
4CONFIG_64BIT=y
5CONFIG_ARCH_ZYNQMP=y
6
7# SMP
8CONFIG_SMP=y
9
10# ARM 32-Bit compatiblity
11CONFIG_COMPAT=y
12# CONFIG_COMPAT_BRK is not set
13
14# CPU Frequency
15CONFIG_CPU_FREQ=y
16CONFIG_CPU_FREQ_STAT=y
17CONFIG_CPU_FREQ_STAT_DETAILS=y
18CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
19CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
20CONFIG_CPU_FREQ_GOV_POWERSAVE=y
21CONFIG_CPU_FREQ_GOV_ONDEMAND=y
22CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
23CONFIG_CPUFREQ_DT=y
24CONFIG_CPU_IDLE=y
25CONFIG_ARM_CPUIDLE=y
26
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.scc b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.scc
deleted file mode 100644
index 8fcb8e62..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/soc/zynqmp.scc
+++ /dev/null
@@ -1,10 +0,0 @@
1define KFEATURE_DESCRIPTION "Xilinx Zynq UltraScale+ MPSoC"
2define KFEATURE_COMPATIBILITY board
3
4include features/net/net.scc
5include cfg/timer/no_hz.scc
6
7kconf hardware zynqmp.cfg
8kconf hardware drivers-zynqmp.cfg
9include bsp/xilinx/soc/drivers-softip.scc
10
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-standard.scc b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-standard.scc
deleted file mode 100644
index 1c9a4f3d..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-standard.scc
+++ /dev/null
@@ -1,15 +0,0 @@
1define KMACHINE zynqmp
2define KTYPE standard
3define KARCH arm64
4
5include ktypes/standard/standard.scc
6
7include bsp/xilinx/soc/zynqmp.scc
8include bsp/xilinx/board-common.scc
9
10include features/input/input.scc
11include cfg/usb-mass-storage.scc
12
13# default policy for standard kernels
14#include features/latencytop/latencytop.scc
15#include features/profiling/profiling.scc
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-tiny.scc b/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-tiny.scc
deleted file mode 100644
index 6cdfc723..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/xilinx/zynqmp-tiny.scc
+++ /dev/null
@@ -1,9 +0,0 @@
1define KMACHINE zynqmp
2define KTYPE tiny
3define KARCH arm64
4
5include ktypes/tiny/tiny.scc
6
7include bsp/xilinx/soc/zynqmp.scc
8include bsp/xilinx/board-common.scc
9
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.cfg b/recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.cfg
deleted file mode 100644
index 37eaa4cf..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.cfg
+++ /dev/null
@@ -1,19 +0,0 @@
1# Keyboard GPIO support
2CONFIG_KEYBOARD_GPIO=y
3CONFIG_KEYBOARD_GPIO_POLLED=y
4
5# Sound support for Zybo linux_bd project
6CONFIG_SOUND=y
7CONFIG_SND=y
8CONFIG_SND_SOC=y
9CONFIG_SND_SOC_ADI=y
10CONFIG_SND_SOC_ADI_AXI_I2S=y
11CONFIG_SND_SIMPLE_CARD=y
12CONFIG_SND_SOC_SSM2602_I2C=y
13
14# Drivers for Digilent DRM encoder
15# DRM encoder
16CONFIG_DRM_DIGILENT_ENCODER=y
17# Common Clock Framework
18CONFIG_COMMON_CLK_DGLNT_DYNCLK=y
19
diff --git a/recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.scc b/recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.scc
deleted file mode 100644
index f3e6e8b8..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/bsp/zybo-linux-bd-zynq7/zybo-linux-bd-zynq7.scc
+++ /dev/null
@@ -1,7 +0,0 @@
1define KFEATURE_DESCRIPTION "Kernel Config for ZYBO Linux-BD Design"
2define KFEATURE_COMPATIBILITY board
3
4kconf hardware zybo-linux-bd-zynq7.cfg
5
6include bsp/xilinx/soc/drivers-drm.scc
7
diff --git a/recipes-kernel/linux/xilinx-kmeta/features/uio/uio.cfg b/recipes-kernel/linux/xilinx-kmeta/features/uio/uio.cfg
deleted file mode 100644
index 048ffe49..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/features/uio/uio.cfg
+++ /dev/null
@@ -1,4 +0,0 @@
1CONFIG_UIO=y
2CONFIG_UIO_PDRV_GENIRQ=y
3CONFIG_UIO_DMEM_GENIRQ=y
4
diff --git a/recipes-kernel/linux/xilinx-kmeta/features/uio/uio.scc b/recipes-kernel/linux/xilinx-kmeta/features/uio/uio.scc
deleted file mode 100644
index 9697949a..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/features/uio/uio.scc
+++ /dev/null
@@ -1,5 +0,0 @@
1define KFEATURE_DESCRIPTION "Enable UIO Support"
2define KFEATURE_COMPATIBILITY board
3
4kconfig hardware uio.cfg
5
diff --git a/recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.cfg b/recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.cfg
deleted file mode 100644
index 49a5d6fe..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.cfg
+++ /dev/null
@@ -1,23 +0,0 @@
1# Media support
2CONFIG_MEDIA_SUPPORT=y
3CONFIG_MEDIA_CAMERA_SUPPORT=y
4CONFIG_MEDIA_CONTROLLER=y
5
6# V4L
7CONFIG_V4L_PLATFORM_DRIVERS=y
8CONFIG_VIDEO_DEV=y
9CONFIG_VIDEO_V4L2=y
10CONFIG_VIDEO_V4L2_SUBDEV_API=y
11
12# Xilinx Video drivers
13CONFIG_VIDEO_XILINX=y
14CONFIG_VIDEO_XILINX_CFA=y
15CONFIG_VIDEO_XILINX_CRESAMPLE=y
16CONFIG_VIDEO_XILINX_HLS=y
17CONFIG_VIDEO_XILINX_REMAPPER=y
18CONFIG_VIDEO_XILINX_RGB2YUV=y
19CONFIG_VIDEO_XILINX_SCALER=y
20CONFIG_VIDEO_XILINX_SWITCH=y
21CONFIG_VIDEO_XILINX_TPG=y
22CONFIG_VIDEO_XILINX_VTC=y
23
diff --git a/recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.scc b/recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.scc
deleted file mode 100644
index 6d6ba6ac..00000000
--- a/recipes-kernel/linux/xilinx-kmeta/features/v4l2/v4l2-xilinx.scc
+++ /dev/null
@@ -1,4 +0,0 @@
1define KFEATURE_DESCRIPTION "Enable Xilinx V4L2 support"
2define KFEATURE_COMPATIBILITY board
3
4kconfig hardware v4l2-xilinx.cfg \ No newline at end of file
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2026-07-22 04:49:12 +0000