diff options
| author | Nathan Rossi <nathan.rossi@xilinx.com> | 2013-06-19 12:05:01 +1000 |
|---|---|---|
| committer | Nathan Rossi <nathan.rossi@xilinx.com> | 2013-06-19 14:23:17 +1000 |
| commit | 454259b0e8d854ec987a6bb6592ea0f2ed2ca2fc (patch) | |
| tree | b577cb37037ffa5ac8ec159a8a14ea2d6e18a2a0 /recipes-kernel | |
| parent | 633290c213455541c59b63d0b4d0e6e841929077 (diff) | |
| download | meta-xilinx-454259b0e8d854ec987a6bb6592ea0f2ed2ca2fc.tar.gz | |
linux-xlnx: Updated qemuzynq.dts to use dtsi fragment
* Refactored qemuzynq.dts
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
Diffstat (limited to 'recipes-kernel')
| -rw-r--r-- | recipes-kernel/linux/linux-xlnx/qemuzynq.dts | 351 |
1 files changed, 34 insertions, 317 deletions
diff --git a/recipes-kernel/linux/linux-xlnx/qemuzynq.dts b/recipes-kernel/linux/linux-xlnx/qemuzynq.dts index 093fd6cd..b66bcf81 100644 --- a/recipes-kernel/linux/linux-xlnx/qemuzynq.dts +++ b/recipes-kernel/linux/linux-xlnx/qemuzynq.dts | |||
| @@ -1,348 +1,65 @@ | |||
| 1 | /dts-v1/; | 1 | /dts-v1/; |
| 2 | /include/ "zynq-7-base.dtsi" | ||
| 2 | / { | 3 | / { |
| 3 | #address-cells = <1>; | ||
| 4 | #size-cells = <1>; | ||
| 5 | compatible = "xlnx,zynq-zc770"; | ||
| 6 | model = "xilinx-zynq-a9"; | 4 | model = "xilinx-zynq-a9"; |
| 7 | aliases { | ||
| 8 | ethernet0 = &ps7_ethernet_0; | ||
| 9 | ethernet1 = &ps7_ethernet_1; | ||
| 10 | serial0 = &ps7_uart_1; | ||
| 11 | serial1 = &ps7_uart_0; | ||
| 12 | } ; | ||
| 13 | chosen { | 5 | chosen { |
| 14 | bootargs = "console=ttyPS0,115200"; | 6 | bootargs = "console=ttyPS0,115200"; |
| 15 | linux,stdout-path = "/amba@0/serial@e0001000"; | 7 | linux,stdout-path = "/amba@0/serial@e0001000"; |
| 16 | } ; | 8 | } ; |
| 17 | cpus { | ||
| 18 | #address-cells = <1>; | ||
| 19 | #cpus = <0x2>; | ||
| 20 | #size-cells = <0>; | ||
| 21 | ps7_cortexa9_0: cpu@0 { | ||
| 22 | compatible = "xlnx,ps7-cortexa9-1.00.a"; | ||
| 23 | d-cache-line-size = <0x20>; | ||
| 24 | d-cache-size = <0x8000>; | ||
| 25 | device_type = "cpu"; | ||
| 26 | i-cache-line-size = <0x20>; | ||
| 27 | i-cache-size = <0x8000>; | ||
| 28 | model = "ps7_cortexa9,1.00.a"; | ||
| 29 | reg = <0>; | ||
| 30 | xlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>; | ||
| 31 | xlnx,cpu-clk-freq-hz = <0x27bc86bf>; | ||
| 32 | } ; | ||
| 33 | ps7_cortexa9_1: cpu@1 { | ||
| 34 | compatible = "xlnx,ps7-cortexa9-1.00.a"; | ||
| 35 | d-cache-line-size = <0x20>; | ||
| 36 | d-cache-size = <0x8000>; | ||
| 37 | device_type = "cpu"; | ||
| 38 | i-cache-line-size = <0x20>; | ||
| 39 | i-cache-size = <0x8000>; | ||
| 40 | model = "ps7_cortexa9,1.00.a"; | ||
| 41 | reg = <1>; | ||
| 42 | xlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>; | ||
| 43 | xlnx,cpu-clk-freq-hz = <0x27bc86bf>; | ||
| 44 | } ; | ||
| 45 | } ; | ||
| 46 | pmu { | ||
| 47 | compatible = "arm,cortex-a9-pmu"; | ||
| 48 | interrupt-parent = <&ps7_scugic_0>; | ||
| 49 | interrupts = < 0 5 4 0 6 4 >; | ||
| 50 | reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >; | ||
| 51 | } ; | ||
| 52 | ps7_ddr_0: memory@0 { | 9 | ps7_ddr_0: memory@0 { |
| 53 | device_type = "memory"; | 10 | device_type = "memory"; |
| 54 | reg = < 0x0 0x40000000 >; | 11 | reg = < 0x0 0x40000000 >; |
| 55 | } ; | 12 | } ; |
| 56 | ps7_axi_interconnect_0: amba@0 { | 13 | ps7_axi_interconnect_0: amba@0 { |
| 57 | #address-cells = <1>; | ||
| 58 | #size-cells = <1>; | ||
| 59 | compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus"; | ||
| 60 | ranges ; | ||
| 61 | ps7_afi_0: ps7-afi@f8008000 { | ||
| 62 | compatible = "xlnx,ps7-afi-1.00.a"; | ||
| 63 | reg = < 0xf8008000 0x1000 >; | ||
| 64 | } ; | ||
| 65 | ps7_afi_1: ps7-afi@f8009000 { | ||
| 66 | compatible = "xlnx,ps7-afi-1.00.a"; | ||
| 67 | reg = < 0xf8009000 0x1000 >; | ||
| 68 | } ; | ||
| 69 | ps7_afi_2: ps7-afi@f800a000 { | ||
| 70 | compatible = "xlnx,ps7-afi-1.00.a"; | ||
| 71 | reg = < 0xf800a000 0x1000 >; | ||
| 72 | } ; | ||
| 73 | ps7_afi_3: ps7-afi@f800b000 { | ||
| 74 | compatible = "xlnx,ps7-afi-1.00.a"; | ||
| 75 | reg = < 0xf800b000 0x1000 >; | ||
| 76 | } ; | ||
| 77 | ps7_ddrc_0: ps7-ddrc@f8006000 { | ||
| 78 | compatible = "xlnx,ps7-ddrc-1.00.a", "xlnx,ps7-ddrc"; | ||
| 79 | reg = < 0xf8006000 0x1000 >; | ||
| 80 | xlnx,has-ecc = <0x0>; | ||
| 81 | } ; | ||
| 82 | ps7_dev_cfg_0: ps7-dev-cfg@f8007000 { | ||
| 83 | compatible = "xlnx,ps7-dev-cfg-1.00.a"; | ||
| 84 | interrupt-parent = <&ps7_scugic_0>; | ||
| 85 | interrupts = < 0 8 4 >; | ||
| 86 | reg = < 0xf8007000 0x1000 >; | ||
| 87 | } ; | ||
| 88 | ps7_dma_s: ps7-dma@f8003000 { | ||
| 89 | #dma-cells = <1>; | ||
| 90 | #dma-channels = <8>; | ||
| 91 | #dma-requests = <4>; | ||
| 92 | arm,primecell-periphid = <0x41330>; | ||
| 93 | compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330"; | ||
| 94 | interrupt-parent = <&ps7_scugic_0>; | ||
| 95 | interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >; | ||
| 96 | reg = < 0xf8003000 0x1000 >; | ||
| 97 | } ; | ||
| 98 | ps7_ethernet_0: ps7-ethernet@e000b000 { | 14 | ps7_ethernet_0: ps7-ethernet@e000b000 { |
| 99 | #address-cells = <1>; | ||
| 100 | #size-cells = <0>; | ||
| 101 | compatible = "xlnx,ps7-ethernet-1.00.a"; | ||
| 102 | interrupt-parent = <&ps7_scugic_0>; | ||
| 103 | interrupts = < 0 22 1 >; | ||
| 104 | local-mac-address = [ 00 0a 35 00 00 00 ]; | ||
| 105 | phy-handle = <&phy0>; | 15 | phy-handle = <&phy0>; |
| 106 | phy-mode = "gmii"; | 16 | phy-mode = "gmii"; |
| 107 | reg = < 0xe000b000 0x1000 >; | ||
| 108 | xlnx,enet-clk-freq-hz = <0x17d7840>; | ||
| 109 | xlnx,enet-reset = <0xffffffff>; | ||
| 110 | xlnx,enet-slcr-1000mbps-div0 = <0x1>; | ||
| 111 | xlnx,enet-slcr-1000mbps-div1 = <0x1>; | ||
| 112 | xlnx,enet-slcr-100mbps-div0 = <0x1>; | ||
| 113 | xlnx,enet-slcr-100mbps-div1 = <0x5>; | ||
| 114 | xlnx,enet-slcr-10mbps-div0 = <0x1>; | ||
| 115 | xlnx,enet-slcr-10mbps-div1 = <0x32>; | ||
| 116 | xlnx,eth-mode = <0x0>; | ||
| 117 | xlnx,has-mdio = <0x1>; | ||
| 118 | xlnx,ptp-enet-clock = <111111115>; | ||
| 119 | mdio { | 17 | mdio { |
| 120 | #address-cells = <1>; | ||
| 121 | #size-cells = <0>; | ||
| 122 | phy0: phy@7 { | 18 | phy0: phy@7 { |
| 123 | compatible = "marvell,88e1116r"; | ||
| 124 | device_type = "ethernet-phy"; | 19 | device_type = "ethernet-phy"; |
| 125 | reg = <7>; | 20 | reg = <7>; |
| 126 | } ; | 21 | } ; |
| 127 | } ; | 22 | } ; |
| 128 | } ; | 23 | } ; |
| 129 | ps7_ethernet_1: ps7-ethernet@e000c000 { | ||
| 130 | #address-cells = <1>; | ||
| 131 | #size-cells = <0>; | ||
| 132 | compatible = "xlnx,ps7-ethernet-1.00.a"; | ||
| 133 | interrupt-parent = <&ps7_scugic_0>; | ||
| 134 | interrupts = < 0 45 1 >; | ||
| 135 | local-mac-address = [ 00 0a 35 00 00 01 ]; | ||
| 136 | phy-handle = <&phy1>; | ||
| 137 | phy-mode = "gmii"; | ||
| 138 | reg = < 0xe000c000 0x1000 >; | ||
| 139 | xlnx,enet-clk-freq-hz = <0x7735940>; | ||
| 140 | xlnx,enet-reset = <0xffffffff>; | ||
| 141 | xlnx,enet-slcr-1000mbps-div0 = <0x1>; | ||
| 142 | xlnx,enet-slcr-1000mbps-div1 = <0x1>; | ||
| 143 | xlnx,enet-slcr-100mbps-div0 = <0x1>; | ||
| 144 | xlnx,enet-slcr-100mbps-div1 = <0x5>; | ||
| 145 | xlnx,enet-slcr-10mbps-div0 = <0x1>; | ||
| 146 | xlnx,enet-slcr-10mbps-div1 = <0x32>; | ||
| 147 | xlnx,eth-mode = <0x0>; | ||
| 148 | xlnx,has-mdio = <0x1>; | ||
| 149 | xlnx,ptp-enet-clock = <111111115>; | ||
| 150 | mdio { | ||
| 151 | #address-cells = <1>; | ||
| 152 | #size-cells = <0>; | ||
| 153 | phy1: phy@7 { | ||
| 154 | compatible = "marvell,88e1116r"; | ||
| 155 | device_type = "ethernet-phy"; | ||
| 156 | reg = <7>; | ||
| 157 | } ; | ||
| 158 | } ; | ||
| 159 | } ; | ||
| 160 | ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 { | ||
| 161 | compatible = "xlnx,ps7-iop-bus-config-1.00.a"; | ||
| 162 | reg = < 0xe0200000 0x1000 >; | ||
| 163 | } ; | ||
| 164 | ps7_pl310_0: ps7-pl310@f8f02000 { | ||
| 165 | arm,data-latency = < 3 2 2 >; | ||
| 166 | arm,tag-latency = < 2 2 2 >; | ||
| 167 | cache-level = < 2 >; | ||
| 168 | cache-unified ; | ||
| 169 | compatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache"; | ||
| 170 | interrupt-parent = <&ps7_scugic_0>; | ||
| 171 | interrupts = < 0 2 4 >; | ||
| 172 | reg = < 0xf8f02000 0x1000 >; | ||
| 173 | } ; | ||
| 174 | ps7_qspi_0: ps7-qspi@e000d000 { | 24 | ps7_qspi_0: ps7-qspi@e000d000 { |
| 175 | #address-cells = <1>; | ||
| 176 | #size-cells = <0>; | ||
| 177 | bus-num = <2>; | ||
| 178 | compatible = "xlnx,ps7-qspi-1.00.a"; | ||
| 179 | interrupt-parent = <&ps7_scugic_0>; | ||
| 180 | interrupts = < 0 19 4 >; | ||
| 181 | is-dual = <1>; | 25 | is-dual = <1>; |
| 182 | num-chip-select = <1>; | ||
| 183 | reg = < 0xe000d000 0x1000 >; | ||
| 184 | speed-hz = <200000000>; | ||
| 185 | xlnx,fb-clk = <0x1>; | ||
| 186 | xlnx,qspi-clk-freq-hz = <0xbebc200>; | ||
| 187 | xlnx,qspi-mode = <0x2>; | ||
| 188 | primary_flash: ps7-qspi@0 { | 26 | primary_flash: ps7-qspi@0 { |
| 27 | #address-cells = <1>; | ||
| 28 | #size-cells = <1>; | ||
| 29 | compatible = "st,m25p80"; | ||
| 189 | reg = < 0x0 >; | 30 | reg = < 0x0 >; |
| 190 | spi-max-frequency = <50000000>; | 31 | spi-max-frequency = <50000000>; |
| 32 | partition@0x00000000 { | ||
| 33 | label = "boot"; | ||
| 34 | reg = <0x00000000 0x00500000>; | ||
| 35 | }; | ||
| 36 | partition@0x00500000 { | ||
| 37 | label = "bootenv"; | ||
| 38 | reg = <0x00500000 0x00020000>; | ||
| 39 | }; | ||
| 40 | partition@0x00520000 { | ||
| 41 | label = "config"; | ||
| 42 | reg = <0x00520000 0x00020000>; | ||
| 43 | }; | ||
| 44 | partition@0x00540000 { | ||
| 45 | label = "image"; | ||
| 46 | reg = <0x00540000 0x00a80000>; | ||
| 47 | }; | ||
| 48 | partition@0x00fc0000 { | ||
| 49 | label = "spare"; | ||
| 50 | reg = <0x00fc0000 0x00000000>; | ||
| 51 | }; | ||
| 191 | } ; | 52 | } ; |
| 192 | } ; | 53 | } ; |
| 193 | ps7_qspi_linear_0: ps7-qspi-linear@fc000000 { | 54 | |
| 194 | compatible = "xlnx,ps7-qspi-linear-1.00.a"; | 55 | /* Disabled Devices */ |
| 195 | reg = < 0xfc000000 0x1000000 >; | 56 | ps7_gpio_0: ps7-gpio@e000a000 { compatible = "invalid"; }; |
| 196 | xlnx,qspi-clk-freq-hz = <0xe4e1c0>; | 57 | ps7_uart_0: serial@e0000000 { compatible = "invalid"; }; |
| 197 | } ; | 58 | ps7_ethernet_1: ps7-ethernet@e000c000 { compatible = "invalid"; }; |
| 198 | ps7_ram_0: ps7-ram@0 { | 59 | ps7_i2c_0: ps7-i2c@e0004000 { compatible = "invalid"; }; |
| 199 | compatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm"; | 60 | ps7_i2c_1: ps7-i2c@e0005000 { compatible = "invalid"; }; |
| 200 | reg = < 0xfffc0000 0x40000 >; | 61 | ps7_wdt_0: ps7-wdt@f8005000 { compatible = "invalid"; }; |
| 201 | } ; | 62 | ps7_can_0: ps7-can@e0008000 { compatible = "invalid"; }; |
| 202 | ps7_scugic_0: ps7-scugic@f8f01000 { | 63 | ps7_can_1: ps7-can@e0009000 { compatible = "invalid"; }; |
| 203 | #address-cells = < 2 >; | ||
| 204 | #interrupt-cells = < 3 >; | ||
| 205 | #size-cells = < 1 >; | ||
| 206 | compatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic"; | ||
| 207 | interrupt-controller ; | ||
| 208 | linux,phandle = < 0x1 >; | ||
| 209 | phandle = < 0x1 >; | ||
| 210 | reg = < 0xf8f01000 0x1000 0xf8f00100 0x100 >; | ||
| 211 | } ; | ||
| 212 | ps7_scutimer_0: ps7-scutimer@f8f00600 { | ||
| 213 | compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer"; | ||
| 214 | interrupt-parent = <&ps7_scugic_0>; | ||
| 215 | interrupts = < 1 13 769 >; | ||
| 216 | reg = < 0xf8f00600 0x20 >; | ||
| 217 | } ; | ||
| 218 | ps7_scuwdt_0: ps7-scuwdt@f8f00620 { | ||
| 219 | compatible = "xlnx,ps7-scuwdt-1.00.a"; | ||
| 220 | device_type = "watchdog"; | ||
| 221 | interrupt-parent = <&ps7_scugic_0>; | ||
| 222 | interrupts = < 1 14 769 >; | ||
| 223 | reg = < 0xf8f00620 0xe0 >; | ||
| 224 | } ; | ||
| 225 | ps7_slcr_0: ps7-slcr@f8000000 { | ||
| 226 | compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr"; | ||
| 227 | reg = < 0xf8000000 0x1000 >; | ||
| 228 | clocks { | ||
| 229 | #address-cells = <1>; | ||
| 230 | #size-cells = <0>; | ||
| 231 | armpll: armpll { | ||
| 232 | #clock-cells = <0>; | ||
| 233 | clock-output-names = "armpll"; | ||
| 234 | clocks = <&ps_clk>; | ||
| 235 | compatible = "xlnx,zynq-pll"; | ||
| 236 | lockbit = <0>; | ||
| 237 | reg = < 0x100 0x110 0x10c >; | ||
| 238 | } ; | ||
| 239 | ddrpll: ddrpll { | ||
| 240 | #clock-cells = <0>; | ||
| 241 | clock-output-names = "ddrpll"; | ||
| 242 | clocks = <&ps_clk>; | ||
| 243 | compatible = "xlnx,zynq-pll"; | ||
| 244 | lockbit = <1>; | ||
| 245 | reg = < 0x104 0x114 0x10c >; | ||
| 246 | } ; | ||
| 247 | iopll: iopll { | ||
| 248 | #clock-cells = <0>; | ||
| 249 | clock-output-names = "iopll"; | ||
| 250 | clocks = <&ps_clk>; | ||
| 251 | compatible = "xlnx,zynq-pll"; | ||
| 252 | lockbit = <2>; | ||
| 253 | reg = < 0x108 0x118 0x10c >; | ||
| 254 | } ; | ||
| 255 | ps_clk: ps_clk { | ||
| 256 | #clock-cells = <0>; | ||
| 257 | clock-frequency = <33333333>; | ||
| 258 | clock-output-names = "ps_clk"; | ||
| 259 | compatible = "fixed-clock"; | ||
| 260 | } ; | ||
| 261 | } ; | ||
| 262 | } ; | ||
| 263 | ps7_spi_0: ps7-spi@e0006000 { | ||
| 264 | bus-num = <0>; | ||
| 265 | compatible = "xlnx,ps7-spi-1.00.a"; | ||
| 266 | interrupt-parent = <&ps7_scugic_0>; | ||
| 267 | interrupts = < 0 26 4 >; | ||
| 268 | num-chip-select = <4>; | ||
| 269 | reg = < 0xe0006000 0x1000 >; | ||
| 270 | speed-hz = <166666666>; | ||
| 271 | xlnx,has-ss0 = <0x1>; | ||
| 272 | xlnx,has-ss1 = <0x1>; | ||
| 273 | xlnx,has-ss2 = <0x1>; | ||
| 274 | xlnx,spi-clk-freq-hz = <0x9ef21aa>; | ||
| 275 | } ; | ||
| 276 | ps7_spi_1: ps7-spi@e0007000 { | ||
| 277 | bus-num = <1>; | ||
| 278 | compatible = "xlnx,ps7-spi-1.00.a"; | ||
| 279 | interrupt-parent = <&ps7_scugic_0>; | ||
| 280 | interrupts = < 0 49 4 >; | ||
| 281 | num-chip-select = <4>; | ||
| 282 | reg = < 0xe0007000 0x1000 >; | ||
| 283 | speed-hz = <166666666>; | ||
| 284 | xlnx,has-ss0 = <0x1>; | ||
| 285 | xlnx,has-ss1 = <0x1>; | ||
| 286 | xlnx,has-ss2 = <0x1>; | ||
| 287 | xlnx,spi-clk-freq-hz = <0x9ef21aa>; | ||
| 288 | } ; | ||
| 289 | ps7_ttc_0: ps7-ttc@f8001000 { | ||
| 290 | compatible = "xlnx,ps7-ttc-1.00.a"; | ||
| 291 | interrupt-parent = <&ps7_scugic_0>; | ||
| 292 | interrupts = < 0 10 4 0 11 4 0 12 4 >; | ||
| 293 | reg = < 0xf8001000 0x1000 >; | ||
| 294 | } ; | ||
| 295 | ps7_ttc_1: ps7-ttc@f8002000 { | ||
| 296 | compatible = "xlnx,ps7-ttc-1.00.a"; | ||
| 297 | interrupt-parent = <&ps7_scugic_0>; | ||
| 298 | interrupts = < 0 37 4 0 38 4 0 39 4 >; | ||
| 299 | reg = < 0xf8002000 0x1000 >; | ||
| 300 | } ; | ||
| 301 | ps7_uart_0: serial@e0000000 { | ||
| 302 | compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps"; | ||
| 303 | current-speed = <115200>; | ||
| 304 | device_type = "serial"; | ||
| 305 | interrupt-parent = <&ps7_scugic_0>; | ||
| 306 | interrupts = < 0 27 4 >; | ||
| 307 | port-number = <1>; | ||
| 308 | reg = < 0xe0000000 0x1000 >; | ||
| 309 | xlnx,has-modem = <0x0>; | ||
| 310 | xlnx,uart-clk-freq-hz = <0x2faf080>; | ||
| 311 | } ; | ||
| 312 | ps7_uart_1: serial@e0001000 { | ||
| 313 | compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps"; | ||
| 314 | current-speed = <115200>; | ||
| 315 | device_type = "serial"; | ||
| 316 | interrupt-parent = <&ps7_scugic_0>; | ||
| 317 | interrupts = < 0 50 4 >; | ||
| 318 | port-number = <0>; | ||
| 319 | reg = < 0xe0001000 0x1000 >; | ||
| 320 | xlnx,has-modem = <0x0>; | ||
| 321 | xlnx,uart-clk-freq-hz = <0x2faf080>; | ||
| 322 | } ; | ||
| 323 | ps7_usb_0: ps7-usb@e0002000 { | ||
| 324 | compatible = "xlnx,ps7-usb-1.00.a"; | ||
| 325 | dr_mode = "host"; | ||
| 326 | interrupt-parent = <&ps7_scugic_0>; | ||
| 327 | interrupts = < 0 21 4 >; | ||
| 328 | phy_type = "ulpi"; | ||
| 329 | reg = < 0xe0002000 0x1000 >; | ||
| 330 | xlnx,usb-reset = <0xffffffff>; | ||
| 331 | } ; | ||
| 332 | ps7_usb_1: ps7-usb@e0003000 { | ||
| 333 | compatible = "xlnx,ps7-usb-1.00.a"; | ||
| 334 | dr_mode = "host"; | ||
| 335 | interrupt-parent = <&ps7_scugic_0>; | ||
| 336 | interrupts = < 0 44 4 >; | ||
| 337 | phy_type = "ulpi"; | ||
| 338 | reg = < 0xe0003000 0x1000 >; | ||
| 339 | xlnx,usb-reset = <0xffffffff>; | ||
| 340 | } ; | ||
| 341 | ps7_xadc: ps7-xadc@f8007100 { | ||
| 342 | compatible = "xlnx,ps7-xadc-1.00.a"; | ||
| 343 | interrupt-parent = <&ps7_scugic_0>; | ||
| 344 | interrupts = < 0 7 4 >; | ||
| 345 | reg = < 0xf8007100 0x20 >; | ||
| 346 | } ; | ||
| 347 | } ; | 64 | } ; |
| 348 | } ; | 65 | } ; |
