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| author | Nathan Rossi <nathan.rossi@xilinx.com> | 2014-05-27 15:52:48 +1000 |
|---|---|---|
| committer | Nathan Rossi <nathan.rossi@xilinx.com> | 2014-05-27 15:52:48 +1000 |
| commit | 7c19cb06a61500f9aab21e9e95173d0305bff25c (patch) | |
| tree | a5b65e80b55b0bccd6216b39a239e374c1a4b5b3 /recipes-devtools/gdb/files/0011-Patch-microblaze-Add-mb-singlestepping.patch | |
| parent | 56afae038a1c5a8165371cd295ab50ba2400efd8 (diff) | |
| download | meta-xilinx-7c19cb06a61500f9aab21e9e95173d0305bff25c.tar.gz | |
gdb: Update gdb for microblaze
* Update recipe for gdb to 7.7
* Update patches for gdb, based on xlnx/master-rebase from the Xilinx
binutils-gdb repository
Signed-off-by: Nathan Rossi <nathan.rossi@xilinx.com>
Diffstat (limited to 'recipes-devtools/gdb/files/0011-Patch-microblaze-Add-mb-singlestepping.patch')
| -rw-r--r-- | recipes-devtools/gdb/files/0011-Patch-microblaze-Add-mb-singlestepping.patch | 196 |
1 files changed, 0 insertions, 196 deletions
diff --git a/recipes-devtools/gdb/files/0011-Patch-microblaze-Add-mb-singlestepping.patch b/recipes-devtools/gdb/files/0011-Patch-microblaze-Add-mb-singlestepping.patch deleted file mode 100644 index 51b2e36e..00000000 --- a/recipes-devtools/gdb/files/0011-Patch-microblaze-Add-mb-singlestepping.patch +++ /dev/null | |||
| @@ -1,196 +0,0 @@ | |||
| 1 | From: "Edgar E. Iglesias" <edgar@axis.com> | ||
| 2 | Date: Fri, 24 Feb 2012 11:52:30 +0100 | ||
| 3 | Subject: Add mb singlestepping. | ||
| 4 | |||
| 5 | Fix prologue analysis for little-endian. | ||
| 6 | Always provide a frame base. | ||
| 7 | |||
| 8 | Signed-off-by: Edgar E. Iglesias <edgar@axis.com> | ||
| 9 | |||
| 10 | Conflicts: | ||
| 11 | |||
| 12 | gdb/microblaze-tdep.c | ||
| 13 | |||
| 14 | Signed-off-by: David Holsgrove <david.holsgrove@xilinx.com> | ||
| 15 | Upstream-Status: Pending | ||
| 16 | --- | ||
| 17 | gdb/microblaze-tdep.c | 117 +++++++++++++++++++++++++++++++++++++++++++++++-- | ||
| 18 | 1 file changed, 114 insertions(+), 3 deletions(-) | ||
| 19 | |||
| 20 | diff --git a/gdb/microblaze-tdep.c b/gdb/microblaze-tdep.c | ||
| 21 | index a245169..9c9f3a9 100644 | ||
| 22 | --- a/gdb/microblaze-tdep.c | ||
| 23 | +++ b/gdb/microblaze-tdep.c | ||
| 24 | @@ -282,6 +282,8 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, | ||
| 25 | int flags = 0; | ||
| 26 | int save_hidden_pointer_found = 0; | ||
| 27 | int non_stack_instruction_found = 0; | ||
| 28 | + int n_insns; | ||
| 29 | + unsigned int *insn_block; | ||
| 30 | |||
| 31 | /* Find the start of this function. */ | ||
| 32 | find_pc_partial_function (pc, &name, &func_addr, &func_end); | ||
| 33 | @@ -321,11 +323,17 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, | ||
| 34 | name, paddress (gdbarch, func_addr), | ||
| 35 | paddress (gdbarch, stop)); | ||
| 36 | |||
| 37 | + /* Do a block read to minimize the transaction with the Debug Agent */ | ||
| 38 | + n_insns = (stop == func_addr) ? 1 : ((stop - func_addr) / INST_WORD_SIZE); | ||
| 39 | + insn_block = calloc(n_insns, sizeof(unsigned long)); | ||
| 40 | + | ||
| 41 | + target_read_memory (func_addr, (void*) insn_block, n_insns * INST_WORD_SIZE ); | ||
| 42 | + | ||
| 43 | for (addr = func_addr; addr < stop; addr += INST_WORD_SIZE) | ||
| 44 | { | ||
| 45 | insn = microblaze_fetch_instruction (addr); | ||
| 46 | op = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm); | ||
| 47 | - microblaze_debug ("%s %08lx\n", paddress (gdbarch, pc), insn); | ||
| 48 | + microblaze_debug ("%s %08lx op=%x r%d r%d imm=%d\n", paddress (gdbarch, addr), insn, op, rd, ra, imm); | ||
| 49 | |||
| 50 | /* This code is very sensitive to what functions are present in the | ||
| 51 | prologue. It assumes that the (addi, addik, swi, sw) can be the | ||
| 52 | @@ -449,7 +457,7 @@ microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc, | ||
| 53 | part of the prologue. */ | ||
| 54 | if (save_hidden_pointer_found) | ||
| 55 | prologue_end_addr -= INST_WORD_SIZE; | ||
| 56 | - | ||
| 57 | + free(insn_block); | ||
| 58 | return prologue_end_addr; | ||
| 59 | } | ||
| 60 | |||
| 61 | @@ -523,6 +531,7 @@ microblaze_frame_cache (struct frame_info *next_frame, void **this_cache) | ||
| 62 | |||
| 63 | func = get_frame_func (next_frame); | ||
| 64 | |||
| 65 | + cache->base = get_frame_register_unsigned (next_frame, gdbarch_sp_regnum (gdbarch)); | ||
| 66 | cache->pc = get_frame_address_in_block (next_frame); | ||
| 67 | |||
| 68 | return cache; | ||
| 69 | @@ -539,7 +548,7 @@ microblaze_frame_this_id (struct frame_info *next_frame, void **this_cache, | ||
| 70 | if (cache->base == 0) | ||
| 71 | return; | ||
| 72 | |||
| 73 | - (*this_id) = frame_id_build (cache->base, cache->pc); | ||
| 74 | + (*this_id) = frame_id_build (cache->base, get_frame_pc (next_frame)); | ||
| 75 | } | ||
| 76 | |||
| 77 | static struct value * | ||
| 78 | @@ -682,6 +691,107 @@ microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type) | ||
| 79 | return (TYPE_LENGTH (type) == 16); | ||
| 80 | } | ||
| 81 | |||
| 82 | +int | ||
| 83 | +microblaze_software_single_step (struct frame_info *frame) | ||
| 84 | +{ | ||
| 85 | + struct gdbarch *arch = get_frame_arch (frame); | ||
| 86 | + struct address_space *aspace = get_frame_address_space (frame); | ||
| 87 | + struct gdbarch_tdep *tdep = gdbarch_tdep (arch); | ||
| 88 | + static char le_breakp[] = MICROBLAZE_BREAKPOINT_LE; | ||
| 89 | + static char be_breakp[] = MICROBLAZE_BREAKPOINT; | ||
| 90 | + enum bfd_endian byte_order = gdbarch_byte_order (arch); | ||
| 91 | + char *breakp = byte_order == BFD_ENDIAN_BIG ? be_breakp : le_breakp; | ||
| 92 | + int ret = 0; | ||
| 93 | + | ||
| 94 | + /* Save the address and the values of the next_pc and the target */ | ||
| 95 | + static struct sstep_breaks | ||
| 96 | + { | ||
| 97 | + CORE_ADDR address; | ||
| 98 | + bfd_boolean valid; | ||
| 99 | + /* Shadow contents. */ | ||
| 100 | + char data[INST_WORD_SIZE]; | ||
| 101 | + } stepbreaks[2]; | ||
| 102 | + int ii; | ||
| 103 | + | ||
| 104 | + if (1) | ||
| 105 | + { | ||
| 106 | + CORE_ADDR pc; | ||
| 107 | + long insn; | ||
| 108 | + enum microblaze_instr minstr; | ||
| 109 | + bfd_boolean isunsignednum; | ||
| 110 | + enum microblaze_instr_type insn_type; | ||
| 111 | + short delay_slots; | ||
| 112 | + int imm; | ||
| 113 | + bfd_boolean immfound = FALSE; | ||
| 114 | + | ||
| 115 | + /* Set a breakpoint at the next instruction */ | ||
| 116 | + /* If the current instruction is an imm, set it at the inst after */ | ||
| 117 | + /* If the instruction has a delay slot, skip the delay slot */ | ||
| 118 | + pc = get_frame_pc (frame); | ||
| 119 | + insn = microblaze_fetch_instruction (pc); | ||
| 120 | + minstr = get_insn_microblaze (insn, &isunsignednum, &insn_type, &delay_slots); | ||
| 121 | + if (insn_type == immediate_inst) | ||
| 122 | + { | ||
| 123 | + int rd, ra, rb; | ||
| 124 | + immfound = TRUE; | ||
| 125 | + minstr = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm); | ||
| 126 | + pc = pc + INST_WORD_SIZE; | ||
| 127 | + insn = microblaze_fetch_instruction (pc); | ||
| 128 | + minstr = get_insn_microblaze (insn, &isunsignednum, &insn_type, &delay_slots); | ||
| 129 | + } | ||
| 130 | + stepbreaks[0].address = pc + (delay_slots * INST_WORD_SIZE) + INST_WORD_SIZE; | ||
| 131 | + if (insn_type != return_inst) { | ||
| 132 | + stepbreaks[0].valid = TRUE; | ||
| 133 | + } else { | ||
| 134 | + stepbreaks[0].valid = FALSE; | ||
| 135 | + } | ||
| 136 | + | ||
| 137 | + microblaze_debug ("single-step insn_type=%x insn=%x\n", insn_type, insn); | ||
| 138 | + /* Now check for branch or return instructions */ | ||
| 139 | + if (insn_type == branch_inst || insn_type == return_inst) { | ||
| 140 | + int limm; | ||
| 141 | + int lrd, lra, lrb; | ||
| 142 | + int ra, rb; | ||
| 143 | + bfd_boolean targetvalid; | ||
| 144 | + bfd_boolean unconditionalbranch; | ||
| 145 | + microblaze_decode_insn(insn, &lrd, &lra, &lrb, &limm); | ||
| 146 | + if (lra >= 0 && lra < MICROBLAZE_NUM_REGS) | ||
| 147 | + ra = get_frame_register_unsigned (frame, lra); | ||
| 148 | + else | ||
| 149 | + ra = 0; | ||
| 150 | + if (lrb >= 0 && lrb < MICROBLAZE_NUM_REGS) | ||
| 151 | + rb = get_frame_register_unsigned (frame, lrb); | ||
| 152 | + else | ||
| 153 | + rb = 0; | ||
| 154 | + stepbreaks[1].address = microblaze_get_target_address (insn, immfound, imm, pc, ra, rb, &targetvalid, &unconditionalbranch); | ||
| 155 | + microblaze_debug ("single-step uncondbr=%d targetvalid=%d target=%x\n", unconditionalbranch, targetvalid, stepbreaks[1].address); | ||
| 156 | + if (unconditionalbranch) | ||
| 157 | + stepbreaks[0].valid = FALSE; /* This is a unconditional branch: will not come to the next address */ | ||
| 158 | + if (targetvalid && (stepbreaks[0].valid == FALSE || | ||
| 159 | + (stepbreaks[0].address != stepbreaks[1].address)) | ||
| 160 | + && (stepbreaks[1].address != pc)) { | ||
| 161 | + stepbreaks[1].valid = TRUE; | ||
| 162 | + } else { | ||
| 163 | + stepbreaks[1].valid = FALSE; | ||
| 164 | + } | ||
| 165 | + } else { | ||
| 166 | + stepbreaks[1].valid = FALSE; | ||
| 167 | + } | ||
| 168 | + | ||
| 169 | + /* Insert the breakpoints */ | ||
| 170 | + for (ii = 0; ii < 2; ++ii) | ||
| 171 | + { | ||
| 172 | + | ||
| 173 | + /* ignore invalid breakpoint. */ | ||
| 174 | + if (stepbreaks[ii].valid) { | ||
| 175 | + insert_single_step_breakpoint (arch, aspace, stepbreaks[ii].address); | ||
| 176 | + ret = 1; | ||
| 177 | + } | ||
| 178 | + } | ||
| 179 | + } | ||
| 180 | + return ret; | ||
| 181 | +} | ||
| 182 | + | ||
| 183 | static void | ||
| 184 | microblaze_write_pc (struct regcache *regcache, CORE_ADDR pc) | ||
| 185 | { | ||
| 186 | @@ -832,6 +942,7 @@ microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches) | ||
| 187 | set_gdbarch_memory_remove_breakpoint (gdbarch, microblaze_linux_memory_remove_breakpoint); | ||
| 188 | |||
| 189 | set_gdbarch_breakpoint_from_pc (gdbarch, microblaze_breakpoint_from_pc); | ||
| 190 | + set_gdbarch_software_single_step (gdbarch, microblaze_software_single_step); | ||
| 191 | |||
| 192 | set_gdbarch_frame_args_skip (gdbarch, 8); | ||
| 193 | |||
| 194 | -- | ||
| 195 | 1.7.9.5 | ||
| 196 | |||
