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authorSivaprasad Addepalli <sivaprasad.addepalli@xilinx.com>2024-09-14 19:06:04 +0530
committerSiva Addepalli <sivaprasad.addepalli@xilinx.com>2024-09-14 21:47:09 +0530
commite2916460d575bea5a1cc938fc4fb01f88e66debd (patch)
treed28e4c9914baf2a474fdfcb41735f49440e32424 /meta-xilinx-standalone
parent214f469c9f902a3aeed9d9607a5af2dc360deb88 (diff)
downloadmeta-xilinx-e2916460d575bea5a1cc938fc4fb01f88e66debd.tar.gz
embeddedsw : Updated SRCREV for 2024.2_2919
asufw: src: Fix C++ compilation error esw: Fix multiple definition of `outbyte error for PLM for no uart enabled designs lib: bsp: standalone: intr_wrapper: updated XGetPriorityTriggerType() with IntrId to IntrNum transform xilpm: versal: server: Add entry for PMC_GPIO in WakeupHandler intc: Remove Unused variable and return value sw_services: xilasu: Add SHA2/SHA3 client examples Add asufw application and xilasu library with SDT flow support sw_services:xilplmi:Update XPlmi_VerifyAddrRange function to handle ASU memory regions xilsem:Update Cram Examples for SSIT and Mono To Correct prints of Last seven CE error Details drivers: emacps: Use array indexing instead of macro array indexing drivers: emacps: use function instead of macro array drivers: emacps: Add bit helper functions Revert "bsp: standalone: common: Add bit helper functions" esw: Update the code to support iomodule for stdin/sdtout configuration in sdt flow esw: Inline the STDIN define generation with xsct flow sw_apps:versal_plm: Add STL diagnostic task scheduling in keep alive task sw_services: xilplmi: Add error codes for STL diagnostic task asudma: Fix device reference to Versal Gen2
Diffstat (limited to 'meta-xilinx-standalone')
-rw-r--r--meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass2
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
index ea7f09da..99b176b1 100644
--- a/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
+++ b/meta-xilinx-standalone/classes/xlnx-embeddedsw.bbclass
@@ -19,7 +19,7 @@ ESW_REV[2022.2] = "5330a64c8efd14f0eef09befdbb8d3d738c33ec2"
19ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a" 19ESW_REV[2023.1] = "af784f742dad0ca6e69e05baf8de51152c396b9a"
20ESW_REV[2023.2] = "e847e1935dca630615e5f7dc694365a44b89699c" 20ESW_REV[2023.2] = "e847e1935dca630615e5f7dc694365a44b89699c"
21ESW_REV[2024.1] = "b173d246826f662b9a98215d8f39e93d39d699b4" 21ESW_REV[2024.1] = "b173d246826f662b9a98215d8f39e93d39d699b4"
22ESW_REV[2024.2] = "3866d0d1eeb3d4aae43f1ed1b4c4b397b66369b5" 22ESW_REV[2024.2] = "c09ecdb723e9f85a27fe8cbfbf16b9cedd14a0ae"
23SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}" 23SRCREV ??= "${@d.getVarFlag('ESW_REV', d.getVar('ESW_VER')) or 'INVALID'}"
24 24
25EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}" 25EMBEDDEDSW_BRANCHARG ?= "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH') != '']}"