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authorMubin Usman Sayyed <mubin.usman.sayyed@xilinx.com>2020-03-18 19:13:43 +0530
committerMark Hatle <mark.hatle@xilinx.com>2020-03-18 10:08:29 -0700
commit6cef85b32e2bc0fdb20dc23003d430434d426647 (patch)
tree989f093117ccf91ca84da26bd7e7085fc7f868ff /meta-xilinx-standalone/classes
parent2e637d24fdfdb8abb539ecf789f7aeb23526486b (diff)
downloadmeta-xilinx-6cef85b32e2bc0fdb20dc23003d430434d426647.tar.gz
meta-xilinx-standalone: Add support for zynq
Updated COMPATIBLE_MACHINE, DTBFILE, XSCTH_PROC and some other variables related to CMAKE build system. Signed-off-by: Mubin Usman Sayyed <mubin.usman.sayyed@xilinx.com> Rebase for updated esw/compatible machine changes. Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
Diffstat (limited to 'meta-xilinx-standalone/classes')
-rw-r--r--meta-xilinx-standalone/classes/esw.bbclass5
1 files changed, 5 insertions, 0 deletions
diff --git a/meta-xilinx-standalone/classes/esw.bbclass b/meta-xilinx-standalone/classes/esw.bbclass
index cca1af04..50fc7128 100644
--- a/meta-xilinx-standalone/classes/esw.bbclass
+++ b/meta-xilinx-standalone/classes/esw.bbclass
@@ -24,10 +24,13 @@ COMPATIBLE_OS_arm = "eabi"
24DTBFILE ?= "${RECIPE_SYSROOT}/boot/devicetree/system-top.dtb" 24DTBFILE ?= "${RECIPE_SYSROOT}/boot/devicetree/system-top.dtb"
25 25
26def get_xlnx_cmake_machine(fam, d): 26def get_xlnx_cmake_machine(fam, d):
27 cmake_machine = fam
27 if (fam == 'zynqmp'): 28 if (fam == 'zynqmp'):
28 cmake_machine = 'ZynqMP' 29 cmake_machine = 'ZynqMP'
29 elif (fam == 'versal'): 30 elif (fam == 'versal'):
30 cmake_machine = 'Versal' 31 cmake_machine = 'Versal'
32 elif (fam == 'zynq'):
33 cmake_machine = 'Zynq'
31 return cmake_machine 34 return cmake_machine
32 35
33def get_xlnx_cmake_processor(tune, machine, d): 36def get_xlnx_cmake_processor(tune, machine, d):
@@ -41,6 +44,8 @@ def get_xlnx_cmake_processor(tune, machine, d):
41 cmake_processor = 'microblaze' 44 cmake_processor = 'microblaze'
42 elif (tune in [ 'cortexr5', 'cortexr5f' ]): 45 elif (tune in [ 'cortexr5', 'cortexr5f' ]):
43 cmake_processor = 'cortexr5' 46 cmake_processor = 'cortexr5'
47 elif tune.startswith('cortexa9'):
48 cmake_processor = 'cortexa9'
44 elif (tune in [ 'cortexa53', 'cortexa72-cortexa53' ]): 49 elif (tune in [ 'cortexa53', 'cortexa72-cortexa53' ]):
45 cmake_processor = 'cortexa53' 50 cmake_processor = 'cortexa53'
46 elif tune == 'cortexa72': 51 elif tune == 'cortexa72':