README.md: Update SDT pl overlay instructions

1. Update SDT pl overlay build instructions.
2. Add note on supported devices for 2024.1 release.
3. Update README with new --multiconfigfull option.

Signed-off-by: Sandeep Gundlupet Raju <sandeep.gundlupet-raju@amd.com>
Signed-off-by: Mark Hatle <mark.hatle@amd.com>

1 files changed, 36 insertions, 9 deletions

diff --git a/meta-xilinx-standalone-experimental/README.md b/meta-xilinx-standalone-experimental/README.md
index 90f893cf..f315449f 100644
--- a/meta-xilinx-standalone-experimental/README.md
+++ b/meta-xilinx-standalone-experimental/README.md
@@ -19,7 +19,7 @@ meta-kria and meta-system-controller.
 as system configuration, you must build through gen-machineconf tool. This tool
 is passed a output of system device tree directory.
 
-The Yocto Project setup for the System Device Tree workflow is as follows.
+The Yocto Project setup for the System Device Tree (SDT) workflow is as follows.
 Be sure to read everything below.
 
 1. Follow [Building Instructions](https://github.com/Xilinx/meta-xilinx/blob/master/README.building.md)
@@ -28,6 +28,13 @@ Be sure to read everything below.
 2. Remove meta-xilinx-tools and meta-xilinx-tools dependency layers(such as
    meta-kria and meta-system-controller if included in bblayers.conf), then add
    the meta-xilinx-standalone-experimental layer.
+
+> **Note:** SDT builds for following devices are not supported in 2024.1 release.
+> * Zynq 7000
+> * MicoBlaze
+> * Kria
+> * System Controller
+
 ```
 $ bitbake-layers remove-layer meta-xilinx-tools
 $ bitbake-layers remove-layer meta-kria
@@ -40,16 +47,36 @@ $ bitbake-layers add-layer ./<path-to-layer>/meta-xilinx/meta-xilinx-standalone-
 $ export PATH=$PATH:<ABSOLUTE_PATH>/gen-machine-conf
 ```
 
-4. Run the script from the build or ${TOPDIR} directory.
-```
- $ gen-machineconf --hw-description <path_to_sdtgen_output_directory> -c <conf> -l conf/local.conf
-```
+4. Run the script from the build or ${TOPDIR} directory. This step describes
+   System Device Tree (SDT) with and without pl overlays. Configruations are same
+   for both SDT with and without pl overlays except for linux dts content.
+
 > **Note:**
 > 1. The -l option will automatically add the necessary parameters to the
    local.conf file.  If you need to re-run this comment, you just clear the
    parameters from the end of the file.  Without the -l option the items are
    printed to the screen and must be manually added to your conf/local.conf
 > 2. The --soc-family argument is an optional argument and user can skip this.
+> 3. By default minimal set of multiconfigs are generated by gen-machineconf tool.
+>    To enable full multiconfig(APU/RPU baremetal or FreeRTOS) then use
+>    `--multiconfigfull` option.
+
+   a. Without SDT pl overlay:
+```
+ $ gen-machineconf --hw-description <path_to_sdtgen_output_directory> -c <conf> -l conf/local.conf
+```
+
+   b. With SDT pl overlay:
+      To generate SDT pl overlay run gen-machineconf command with
+      `-g {full|dfx-static|dfx-partial}` option. Once SDT pl overlay command is
+      executed successfully pl.dtsi will be generated under
+      <conf>/dts/${MACHINE}/pl-overlay-{full|dfx-static|dfx-partial} directory.
+      User can use this pl.dtsi as input to firmware recipes.
+
+   * ZynqMP Full bitstream or Versal Segmented Configuration:
+```
+ $ gen-machineconf parse-sdt --hw-description <path_to_sdtgen_output_directory> -c <conf> -l conf/local.conf -g full
+```
 
 For example, zynqmp:
 ```
@@ -72,9 +99,9 @@ BASE_TMPDIR ?= "${TOPDIR}"
 
 # The following is the full set of multiconfigs for this configuration
 # A large list can cause a slow parse.
-BBMULTICONFIG = " cortexa53-0-zynqmp-fsbl-baremetal cortexa53-0-zynqmp-baremetal cortexa53-0-zynqmp-freertos cortexa53-1-zynqmp-baremetal cortexa53-1-zynqmp-freertos cortexa53-2-zynqmp-baremetal cortexa53-2-zynqmp-freertos cortexa53-3-zynqmp-baremetal cortexa53-3-zynqmp-freertos cortexr5-0-zynqmp-fsbl-baremetal cortexr5-0-zynqmp-baremetal cortexr5-0-zynqmp-freertos cortexr5-1-zynqmp-baremetal cortexr5-1-zynqmp-freertos microblaze-0-pmu"
+#BBMULTICONFIG = " cortexa53-0-zynqmp-fsbl-baremetal cortexa53-0-zynqmp-baremetal cortexa53-0-zynqmp-freertos cortexa53-1-zynqmp-baremetal cortexa53-1-zynqmp-freertos cortexa53-2-zynqmp-baremetal cortexa53-2-zynqmp-freertos cortexa53-3-zynqmp-baremetal cortexa53-3-zynqmp-freertos cortexr5-0-zynqmp-fsbl-baremetal cortexr5-0-zynqmp-baremetal cortexr5-0-zynqmp-freertos cortexr5-1-zynqmp-baremetal cortexr5-1-zynqmp-freertos microblaze-0-pmu"
 # Alternatively trim the list to the minimum
-#BBMULTICONFIG = " cortexa53-0-zynqmp-fsbl-baremetal microblaze-0-pmu"
+BBMULTICONFIG = " cortexa53-0-zynqmp-fsbl-baremetal microblaze-0-pmu"
 ```
 
 For example, versal:
@@ -99,9 +126,9 @@ BASE_TMPDIR ?= "${TOPDIR}"
 
 # The following is the full set of multiconfigs for this configuration
 # A large list can cause a slow parse.
-BBMULTICONFIG = " cortexa72-0-versal-baremetal cortexa72-0-versal-freertos cortexa72-1-versal-baremetal cortexa72-1-versal-freertos microblaze-0-pmc microblaze-0-psm cortexr5-0-versal-baremetal cortexr5-0-versal-freertos cortexr5-1-versal-baremetal cortexr5-1-versal-freertos"
+#BBMULTICONFIG = " cortexa72-0-versal-baremetal cortexa72-0-versal-freertos cortexa72-1-versal-baremetal cortexa72-1-versal-freertos microblaze-0-pmc microblaze-0-psm cortexr5-0-versal-baremetal cortexr5-0-versal-freertos cortexr5-1-versal-baremetal cortexr5-1-versal-freertos"
 # Alternatively trim the list to the minimum
-#BBMULTICONFIG = " microblaze-0-pmc microblaze-0-psm"
+BBMULTICONFIG = " microblaze-0-pmc microblaze-0-psm"
 ```
 > **Bitbake Performance Note:**
 Each BBMULTICONFIG value requires all of the recipes to be parsed for that