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| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-25 12:51:31 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-25 13:47:11 +0530 |
| commit | 55e94b3042398422a2034b1c3ed4db6472eb48bb (patch) | |
| tree | addfa3de45ce04862f2f1eb1e63da1c595124597 /meta-xilinx-core | |
| parent | a04fc0c769c749950de0a8e7ad08719ba30d281e (diff) | |
| download | meta-xilinx-55e94b3042398422a2034b1c3ed4db6472eb48bb.tar.gz | |
embeddedsw : Updated SRCREV for 2023.2_6539
sw_services: xilcert: Replace XSecure_MemCpy64 with Xil_SMemCpy
sw_services: xilcert: Fix the value of UEID extension
scripts: pyesw: reconfig_bsp: Add support for older platforms/bsp
axidma: Fix simple interrupt example for SDT flow
Xilsecure: Add version header file for client mode
VersalNet: Disable cache for xilpuf and xilnvm libraries
xilplmi: fixed missing header inclusion
lib: sw_apps: Update the User Compile and Link options for c++ sources
lib: sw_apps: Fix linker script LINK_DEPENDS in system device-tree flow
updated for changelog vtc
uartps: Fix xuartps_intr_example compilation errors in SDT flow
sw_services:xilpuf:Fixed doxygen warnings
sw_services:xilsecure:Fixed doxygen warnings
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
Diffstat (limited to 'meta-xilinx-core')
0 files changed, 0 insertions, 0 deletions