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authorSivaprasad Addepalli <sivaprasad.addepalli@xilinx.com>2023-09-11 16:13:34 +0530
committerMark Hatle <mark.hatle@amd.com>2023-09-18 16:38:35 -0500
commit4c8ee28682acaa7d680fd368dd93543363762139 (patch)
treea1b7ef91137e4c84f18a7375e2fd6bbfaa0dcd4a /meta-xilinx-core/conf
parentc8fde83f6580972f276eb59ba66113d5ece9e8d7 (diff)
downloadmeta-xilinx-4c8ee28682acaa7d680fd368dd93543363762139.tar.gz
embeddedsw : Updated SRCREV for 2023.2_2891
ospipsv: Fix MISRA-C Rule 8.13 violation sw_services:xilplmi:Sec COE Review Fixes uartlite: Correct SDT and interrupt checks in xuartlite_intr_tapp_example csudma:Fix HIS_COMF violations axidma: Fix sg_cyclic_intr example failure on r5 Updated version number to latest in examples/index.html for multiple drivers BSP: microblaze: Fix prototypes of few cache APIs plm: versal_net: Use Reserved DDR Region for DS storage during update xilpki: fix issues with PKI IRQ signal lib: sw_apps: zynqmp_pmufw: Fix compilation error when ENABLE_RECOVERY flag is enabled in sdt flow xilpdi:Fix MISRA C violations for Rule 12.1 scuwdt: Update examples to stop the wdt at the end of the test scutimer: Update examples to stop the timer at end of the test xilplmi: versal: Allow loading of ELFs to XRAM dmaps: Fix example instance structure handling v_hdmitx1: Add support for configurable VTEM packets esw: Fix CMAKE_MACHINE for plm and psm microblaze processors in versalnet cmake: UserConfig.cmake: Disable USER_COMPILE_PROFILING_ENABLE configuration scripts: pyesw: build_bsp: Use cmake --build with verbose esw: Properly handle the processor extra compiler options ThirdParty: sw_services: lwip213: Fix the target name in clean target xilpki: Update XPki_GetVersion() API prototype Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com> Signed-off-by: Mark Hatle <mark.hatle@amd.com>
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