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| author | Mark Hatle <mark.hatle@xilinx.com> | 2021-12-01 12:51:12 -0800 |
|---|---|---|
| committer | Mark Hatle <mark.hatle@xilinx.com> | 2022-01-14 11:21:32 -0800 |
| commit | 29a9511c3004d3ad8a0e9a66e6cd312677b8cc68 (patch) | |
| tree | 03a50e2406afae6664d70c10f1a436a2b8991042 /meta-microblaze/recipes-devtools/gcc/gcc-10 | |
| parent | 0afed0ce3d04c3da4f364c72d76faa591a4d1c60 (diff) | |
| download | meta-xilinx-29a9511c3004d3ad8a0e9a66e6cd312677b8cc68.tar.gz | |
gcc: Move everything to gcc-11 directory
Signed-off-by: Mark Hatle <mark.hatle@xilinx.com>
Diffstat (limited to 'meta-microblaze/recipes-devtools/gcc/gcc-10')
| -rw-r--r-- | meta-microblaze/recipes-devtools/gcc/gcc-10/0056-patch-microblaze64-Add-Zero_extended-instructions.patch | 57 |
1 files changed, 0 insertions, 57 deletions
diff --git a/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-patch-microblaze64-Add-Zero_extended-instructions.patch b/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-patch-microblaze64-Add-Zero_extended-instructions.patch deleted file mode 100644 index 949e6346..00000000 --- a/meta-microblaze/recipes-devtools/gcc/gcc-10/0056-patch-microblaze64-Add-Zero_extended-instructions.patch +++ /dev/null | |||
| @@ -1,57 +0,0 @@ | |||
| 1 | From 4096da3ea3765ec9484af719a16074789b8946ee Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Nagaraju Mekala <nmekala@xilinx.com> | ||
| 3 | Date: Mon, 30 Aug 2021 12:13:45 +0530 | ||
| 4 | Subject: [PATCH] [patch, microblaze64]: Add Zero_extended instructions | ||
| 5 | |||
| 6 | Due to latest changes in GCC-10.2 MB64 perforamance has reduced | ||
| 7 | We have added zero_extended instructions to get rid of left shift | ||
| 8 | and right shift loops | ||
| 9 | |||
| 10 | [CR/TSR]: TSR-974519 | ||
| 11 | |||
| 12 | Signed-off-by: Nagaraju Mekala<nmekala@xilinx.com> | ||
| 13 | --- | ||
| 14 | gcc/config/microblaze/microblaze.md | 27 +++++++++++++++++++++++++++ | ||
| 15 | 1 file changed, 27 insertions(+) | ||
| 16 | |||
| 17 | diff --git a/gcc/config/microblaze/microblaze.md b/gcc/config/microblaze/microblaze.md | ||
| 18 | index 71ac46dfb6c..51c2751e6be 100644 | ||
| 19 | --- a/gcc/config/microblaze/microblaze.md | ||
| 20 | +++ b/gcc/config/microblaze/microblaze.md | ||
| 21 | @@ -1191,6 +1191,33 @@ | ||
| 22 | (set_attr "mode" "SI,SI,SI") | ||
| 23 | (set_attr "length" "4,4,8")]) | ||
| 24 | |||
| 25 | +(define_insn "zero_extendhidi2" | ||
| 26 | + [(set (match_operand:DI 0 "register_operand" "=d") | ||
| 27 | + (zero_extend:DI (match_operand:HI 1 "register_operand" "d")))] | ||
| 28 | + "TARGET_MB_64" | ||
| 29 | + "andli\t%0,%1,0xffff" | ||
| 30 | + [(set_attr "type" "no_delay_arith") | ||
| 31 | + (set_attr "mode" "DI") | ||
| 32 | + (set_attr "length" "8")]) | ||
| 33 | + | ||
| 34 | +(define_insn "zero_extendsidi2" | ||
| 35 | + [(set (match_operand:DI 0 "register_operand" "=d") | ||
| 36 | + (zero_extend:DI (match_operand:SI 1 "register_operand" "d")))] | ||
| 37 | + "TARGET_MB_64" | ||
| 38 | + "andli\t%0,%1,0xffffffff" | ||
| 39 | + [(set_attr "type" "no_delay_arith") | ||
| 40 | + (set_attr "mode" "DI") | ||
| 41 | + (set_attr "length" "8")]) | ||
| 42 | + | ||
| 43 | +(define_insn "zero_extendqidi2" | ||
| 44 | + [(set (match_operand:DI 0 "register_operand" "=d") | ||
| 45 | + (zero_extend:DI (match_operand:QI 1 "register_operand" "d")))] | ||
| 46 | + "TARGET_MB_64" | ||
| 47 | + "andli\t%0,%1,0x00ff" | ||
| 48 | + [(set_attr "type" "no_delay_arith") | ||
| 49 | + (set_attr "mode" "DI") | ||
| 50 | + (set_attr "length" "8")]) | ||
| 51 | + | ||
| 52 | ;;---------------------------------------------------------------- | ||
| 53 | ;; Sign extension | ||
| 54 | ;;---------------------------------------------------------------- | ||
| 55 | -- | ||
| 56 | 2.17.1 | ||
| 57 | |||
