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| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-07 12:45:43 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-07 13:57:12 +0530 |
| commit | 2854d618010087bbffdc0c7d28055bdbff94e2f3 (patch) | |
| tree | ac18eef84b1790c8b8b2c1a0077564a8f8d1e2e7 /gen-machine-conf | |
| parent | 012eb3b0c1118e14b2102066549b4daa65e84e81 (diff) | |
| download | meta-xilinx-2854d618010087bbffdc0c7d28055bdbff94e2f3.tar.gz | |
arm-trusted-firmware : Updated SRCREV for 2023.2_8051
fix(xilinx): update dtb when dtb address and tf-a ddr flow is used
fix(versal): use correct macro name for ocm base address
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
Diffstat (limited to 'gen-machine-conf')
0 files changed, 0 insertions, 0 deletions