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| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-20 18:57:59 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-20 20:37:14 +0530 |
| commit | 504e113159d4357e159f7d09405e2323b9edc586 (patch) | |
| tree | 62d52d4729853b55469bdfa96c1f1fcc0b7e9ccd /docs | |
| parent | 658dc1c77ec2e6db8da533be68d9514628a446d6 (diff) | |
| download | meta-xilinx-504e113159d4357e159f7d09405e2323b9edc586.tar.gz | |
linux-xlnx : Updated SRCREV for 2023.2_7327
arm64: zynqmp: Add output-enable pins to SOMs
v4l: xilinx: xcsirxss: Fix YUV420 format
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
Diffstat (limited to 'docs')
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