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| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-05 23:47:49 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-06 00:37:15 +0530 |
| commit | 386e73eb02e6447a2fc9a9f6c2c5305fa78c01f3 (patch) | |
| tree | 6d16e7ecd66e500c7e48fba6135e6dce2d396cae /docs | |
| parent | 3cbca881e5567624a5a1152acadf7a46e2477b05 (diff) | |
| download | meta-xilinx-386e73eb02e6447a2fc9a9f6c2c5305fa78c01f3.tar.gz | |
linux-xlnx : Updated SRCREV for 2023.2_5539
mtd: spi-nor: Fix timeout issue with winbond multi die flash
dt-bindings: net: xilinx_gmii2rgmii: Convert to json schema
staging: xilinx_hdcp: Add mmult support for HDCP2x Rx
staging: xilinx_hdcp: Add HDCP2x Rx cipher support
staging: xilinx_hdcp: Add support for HDCP2x Rx
arm64: versal-net: Fix sysmon interrupt number
watchdog: of_xilinx_wdt: Remove unnecessary clock disable call in the remove path
watchdog: of_xilinx_wdt: Use devm_clk_get_enabled() helper
drivers: soc: xilinx: add check for platform
firmware: xilinx: Register event manager driver
drivers: soc: xilinx: add versal-net error event ids and masks
drivers: soc: xilinx: rename error event header file for versal
drivers: soc: xilinx: rename versal error event ids and masks
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
Diffstat (limited to 'docs')
0 files changed, 0 insertions, 0 deletions