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| author | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-02-22 13:03:14 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-02-22 13:03:14 +0530 |
| commit | f3fd690aeb059cf1ee5fd11df7fff596eb03d6d8 (patch) | |
| tree | b0c5645a793fb4b72e0c0bebaa0d3d22fb86c6c5 | |
| parent | 9241ddb71c3f9a03fd3d573145548893efa21e8d (diff) | |
| download | meta-xilinx-f3fd690aeb059cf1ee5fd11df7fff596eb03d6d8.tar.gz | |
Updated Commit ID
update_buildconf: Ignore errors looking for bitbake-layers
project_config.py: Move all Kconfig generation to GenKconfigProj
multiconfigs.py: Replace BASE_TMPDIR with MC_TMPDIR_PREFIX
update_buildconf.py: No longer print the full BBMULTICONF list
project_config.py: Move configuration file generation here
multiconfigs: Adjust output to make it more clear
gen-machineconf: Refactor SDT and XSCT flows
sdt_flow.py: Use the hw_file path for args.psu_init_path default
update_buildconf.py: Always output local.conf info
update_buildconf.py: GenSdtConf use logger.plain for reference output
gen-machineconf: Add additional exceptions to traceback
yocto_machine.py:passing boot pdi
Sync hardware info printing
Make gen-machineconf capable of directly working with bitbake
Move from various sys.exit(x) to raising exceptions
lib: multiconfigs: Add support for domains generated by hardware design
| m--------- | meta-xilinx-core/gen-machine-conf | 0 |
1 files changed, 0 insertions, 0 deletions
diff --git a/meta-xilinx-core/gen-machine-conf b/meta-xilinx-core/gen-machine-conf | |||
| Subproject cdd3c454e9f90a4a1d28ced484b31575d866a73 | Subproject d0088429e1ab2ac110fe293902b98afe60005a6 | ||