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| author | Mark Hatle <mark.hatle@amd.com> | 2025-02-07 16:30:23 -0700 |
|---|---|---|
| committer | Mark Hatle <mark.hatle@amd.com> | 2025-03-30 14:16:15 -0600 |
| commit | c80838e7e300d0f18cae482ac647d86ef2890d47 (patch) | |
| tree | 90c3e76370d8e2e91e2c80799f3d5cc68a74bb95 | |
| parent | 6c9a6f67f2b801990fe0892cc104c5fdf6279c8e (diff) | |
| download | meta-xilinx-c80838e7e300d0f18cae482ac647d86ef2890d47.tar.gz | |
meta-xilinx-core: machine-xilinx-qemu.inc: Clear default QB_SERIAL_OPT
On AMD FPGA SoC machines, we almost always include the serial port options
with the core QB_OPT_APPEND value. If a machine requires QB_SERIAL_OPT
it can override them.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| -rw-r--r-- | meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc b/meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc index ff3faf8d..3f4beda0 100644 --- a/meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc +++ b/meta-xilinx-core/conf/machine/include/machine-xilinx-qemu.inc | |||
| @@ -23,6 +23,7 @@ IMAGE_CLASSES += "qemuboot-xilinx" | |||
| 23 | # | 23 | # |
| 24 | QEMU_HW_SERIAL ??= "" | 24 | QEMU_HW_SERIAL ??= "" |
| 25 | QB_OPT_APPEND += "${QEMU_HW_SERIAL} -nodefaults" | 25 | QB_OPT_APPEND += "${QEMU_HW_SERIAL} -nodefaults" |
| 26 | QB_SERIAL_OPT = "" | ||
| 26 | 27 | ||
| 27 | # Workaround to trigger runqemu to use -dtb to send the APU DTB | 28 | # Workaround to trigger runqemu to use -dtb to send the APU DTB |
| 28 | # This is done to ensure that we can easily change APU DTB at runtime via | 29 | # This is done to ensure that we can easily change APU DTB at runtime via |