diff options
| author | Mark Hatle <mark.hatle@amd.com> | 2024-10-04 16:49:55 -0600 |
|---|---|---|
| committer | Mark Hatle <mark.hatle@amd.com> | 2024-10-05 19:40:29 -0500 |
| commit | 974bca597756347071ae8f6fe10ecb660b25b8ea (patch) | |
| tree | ca3e13d200c0c71e6ae5ea1c12f8be94e6ac0af0 | |
| parent | 99832d6051f1dfdd782aa720dbda3617aac7c874 (diff) | |
| download | meta-xilinx-974bca597756347071ae8f6fe10ecb660b25b8ea.tar.gz | |
qemu-devicetrees: Add qemu versal-net-alt version
Create an alternative DTB where the serial port 0 and 1 are the Linux capable
serial ports. This matches the requirements of the default Yocto Project
runqemu/testimage.
Signed-off-by: Mark Hatle <mark.hatle@amd.com>
| -rw-r--r-- | meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc | 1 | ||||
| -rw-r--r-- | meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees/0001-versal-net-Reorder-serial-port.patch | 291 |
2 files changed, 292 insertions, 0 deletions
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc index c002c6c1..26327ba3 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees.inc | |||
| @@ -15,6 +15,7 @@ BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != ' | |||
| 15 | SRC_URI = "${REPO};${BRANCHARG}" | 15 | SRC_URI = "${REPO};${BRANCHARG}" |
| 16 | 16 | ||
| 17 | SRC_URI += "file://0001-versal-Reorder-serial-ports.patch" | 17 | SRC_URI += "file://0001-versal-Reorder-serial-ports.patch" |
| 18 | SRC_URI += "file://0001-versal-net-Reorder-serial-port.patch" | ||
| 18 | 19 | ||
| 19 | S = "${WORKDIR}/git" | 20 | S = "${WORKDIR}/git" |
| 20 | 21 | ||
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees/0001-versal-net-Reorder-serial-port.patch b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees/0001-versal-net-Reorder-serial-port.patch new file mode 100644 index 00000000..97262ae4 --- /dev/null +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-devicetrees/0001-versal-net-Reorder-serial-port.patch | |||
| @@ -0,0 +1,291 @@ | |||
| 1 | From 58fdfde013dfabf3a9f2c83525c00a6f057768f1 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Mark Hatle <mark.hatle@amd.com> | ||
| 3 | Date: Fri, 4 Oct 2024 15:49:46 -0600 | ||
| 4 | Subject: [PATCH] versal-net: Reorder serial port | ||
| 5 | |||
| 6 | This commit requires the corresponding "versal: Reorder serial ports" | ||
| 7 | |||
| 8 | This change affects the order of the serial ports when calling qemu. | ||
| 9 | Previously the serial ports 0 & 1 were the PMC (firmware) uartlite, | ||
| 10 | while the standard serial pors were 2 & 3. Reverse this order to | ||
| 11 | ensure that the first two serial ports are the ones used by Linux. | ||
| 12 | |||
| 13 | Signed-off-by: Mark Hatle <mark.hatle@amd.com> | ||
| 14 | --- | ||
| 15 | board-versal-net-psx-spp-1.4-alt.dts | 36 ++++++++ | ||
| 16 | board-versal-net-psx-virt-alt.dts | 130 +++++++++++++++++++++++++++ | ||
| 17 | board-versal-pmx-virt-alt.dts | 82 +++++++++++++++++ | ||
| 18 | 3 files changed, 248 insertions(+) | ||
| 19 | create mode 100644 board-versal-net-psx-spp-1.4-alt.dts | ||
| 20 | create mode 100644 board-versal-net-psx-virt-alt.dts | ||
| 21 | create mode 100644 board-versal-pmx-virt-alt.dts | ||
| 22 | |||
| 23 | diff --git a/board-versal-net-psx-spp-1.4-alt.dts b/board-versal-net-psx-spp-1.4-alt.dts | ||
| 24 | new file mode 100644 | ||
| 25 | index 00000000..770a388e | ||
| 26 | --- /dev/null | ||
| 27 | +++ b/board-versal-net-psx-spp-1.4-alt.dts | ||
| 28 | @@ -0,0 +1,36 @@ | ||
| 29 | +/* | ||
| 30 | + * Versal Net PSX device tree. | ||
| 31 | + * | ||
| 32 | + * Copyright (c) 2022, Xilinx Inc | ||
| 33 | + * All rights reserved. | ||
| 34 | + * | ||
| 35 | + * Redistribution and use in source and binary forms, with or without | ||
| 36 | + * modification, are permitted provided that the following conditions are met: | ||
| 37 | + * * Redistributions of source code must retain the above copyright | ||
| 38 | + * notice, this list of conditions and the following disclaimer. | ||
| 39 | + * * Redistributions in binary form must reproduce the above copyright | ||
| 40 | + * notice, this list of conditions and the following disclaimer in the | ||
| 41 | + * documentation and/or other materials provided with the distribution. | ||
| 42 | + * * Neither the name of the <organization> nor the | ||
| 43 | + * names of its contributors may be used to endorse or promote products | ||
| 44 | + * derived from this software without specific prior written permission. | ||
| 45 | + * | ||
| 46 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND | ||
| 47 | + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
| 48 | + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
| 49 | + * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY | ||
| 50 | + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
| 51 | + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
| 52 | + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
| 53 | + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
| 54 | + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
| 55 | + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| 56 | + */ | ||
| 57 | + | ||
| 58 | +#define VERSAL_NET_APU_CPU_FREQ 100000000 | ||
| 59 | + | ||
| 60 | +#include "board-versal-net-psx-virt-alt.dts" | ||
| 61 | + | ||
| 62 | +&pmc_tap { | ||
| 63 | + platform-ver = <0x5>; | ||
| 64 | +}; | ||
| 65 | diff --git a/board-versal-net-psx-virt-alt.dts b/board-versal-net-psx-virt-alt.dts | ||
| 66 | new file mode 100644 | ||
| 67 | index 00000000..7ee4ad9d | ||
| 68 | --- /dev/null | ||
| 69 | +++ b/board-versal-net-psx-virt-alt.dts | ||
| 70 | @@ -0,0 +1,130 @@ | ||
| 71 | +/* | ||
| 72 | + * Versal-Net Virtual PSX board device tree. | ||
| 73 | + * | ||
| 74 | + * Copyright (c) 2021-2022, Xilinx Inc. | ||
| 75 | + * Copyright (C) 2022-2024, Advanced Micro Devices, Inc. | ||
| 76 | + * All rights reserved. | ||
| 77 | + * | ||
| 78 | + * Redistribution and use in source and binary forms, with or without | ||
| 79 | + * modification, are permitted provided that the following conditions are met: | ||
| 80 | + * * Redistributions of source code must retain the above copyright | ||
| 81 | + * notice, this list of conditions and the following disclaimer. | ||
| 82 | + * * Redistributions in binary form must reproduce the above copyright | ||
| 83 | + * notice, this list of conditions and the following disclaimer in the | ||
| 84 | + * documentation and/or other materials provided with the distribution. | ||
| 85 | + * * Neither the name of the <organization> nor the | ||
| 86 | + * names of its contributors may be used to endorse or promote products | ||
| 87 | + * derived from this software without specific prior written permission. | ||
| 88 | + * | ||
| 89 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND | ||
| 90 | + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
| 91 | + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
| 92 | + * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY | ||
| 93 | + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
| 94 | + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
| 95 | + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
| 96 | + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
| 97 | + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
| 98 | + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| 99 | + */ | ||
| 100 | + | ||
| 101 | +#ifndef NUM_APUS | ||
| 102 | +#define NUM_APUS 16 | ||
| 103 | +#endif | ||
| 104 | +#define VERSAL_NET_APU_CPU_FREQ 100000000 | ||
| 105 | + | ||
| 106 | +#define NUM_APUS_PER_CLUSTER 4 | ||
| 107 | + | ||
| 108 | +#define VERSAL_NPI_GENERIC | ||
| 109 | +#define VERSAL_PSX | ||
| 110 | +#define VERSAL_NET | ||
| 111 | +#define VERSAL_NPI_OVERRIDE | ||
| 112 | + | ||
| 113 | +/* TODO: Add GIC interrupt redirection support. */ | ||
| 114 | +#define RPU_GIC_INTERRUPT_TARGET_STEM rpu_cpu | ||
| 115 | + | ||
| 116 | +#define APU_CPU_MODEL "cortex-a78-arm-cpu" | ||
| 117 | +#define RPU_CPU_MODEL "cortex-r52-arm-cpu" | ||
| 118 | + | ||
| 119 | +#include "include/versal-net/npi-memmap.dtsh" | ||
| 120 | +#include "include/versal-net/fpd-memmap.dtsh" | ||
| 121 | +#include "board-versal-ps-virt-alt.dts" | ||
| 122 | +#include "versal-psx.dtsi" | ||
| 123 | +#include "versal-net-psmx.dtsi" | ||
| 124 | +#include "versal-psx-rpu.dtsi" | ||
| 125 | +#include "versal-net-boot-init.dtsi" | ||
| 126 | +#include "versal-net-hnic.dtsi" | ||
| 127 | +#include "versal-pmx-shared-overlay.dtsi" | ||
| 128 | +#include "versal-pmx-system-overlay.dtsi" | ||
| 129 | +#include "versal-psx-shared-overlay.dtsi" | ||
| 130 | + | ||
| 131 | +#ifndef VERSAL_NET_APU_CPU_FREQ | ||
| 132 | + #define VERSAL_NET_APU_CPU_FREQ 2720000 | ||
| 133 | +#endif | ||
| 134 | + | ||
| 135 | +#define SET_CPU_FREQ(n, f) \ | ||
| 136 | +&cpu ## n { \ | ||
| 137 | + generic-timer-frequency = <f>; \ | ||
| 138 | +} | ||
| 139 | + | ||
| 140 | +SET_CPU_FREQ(0, VERSAL_NET_APU_CPU_FREQ); | ||
| 141 | +SET_CPU_FREQ(1, VERSAL_NET_APU_CPU_FREQ); | ||
| 142 | +SET_CPU_FREQ(2, VERSAL_NET_APU_CPU_FREQ); | ||
| 143 | +SET_CPU_FREQ(3, VERSAL_NET_APU_CPU_FREQ); | ||
| 144 | +SET_CPU_FREQ(4, VERSAL_NET_APU_CPU_FREQ); | ||
| 145 | +SET_CPU_FREQ(5, VERSAL_NET_APU_CPU_FREQ); | ||
| 146 | +SET_CPU_FREQ(6, VERSAL_NET_APU_CPU_FREQ); | ||
| 147 | +SET_CPU_FREQ(7, VERSAL_NET_APU_CPU_FREQ); | ||
| 148 | +#if (NUM_APUS >= 16) | ||
| 149 | +SET_CPU_FREQ(8, VERSAL_NET_APU_CPU_FREQ); | ||
| 150 | +SET_CPU_FREQ(9, VERSAL_NET_APU_CPU_FREQ); | ||
| 151 | +SET_CPU_FREQ(10,VERSAL_NET_APU_CPU_FREQ); | ||
| 152 | +SET_CPU_FREQ(11,VERSAL_NET_APU_CPU_FREQ); | ||
| 153 | +SET_CPU_FREQ(12,VERSAL_NET_APU_CPU_FREQ); | ||
| 154 | +SET_CPU_FREQ(13,VERSAL_NET_APU_CPU_FREQ); | ||
| 155 | +SET_CPU_FREQ(14,VERSAL_NET_APU_CPU_FREQ); | ||
| 156 | +SET_CPU_FREQ(15,VERSAL_NET_APU_CPU_FREQ); | ||
| 157 | +#endif | ||
| 158 | +#if (NUM_APUS >= 32) | ||
| 159 | +SET_CPU_FREQ(16, VERSAL_NET_APU_CPU_FREQ); | ||
| 160 | +SET_CPU_FREQ(17, VERSAL_NET_APU_CPU_FREQ); | ||
| 161 | +SET_CPU_FREQ(18, VERSAL_NET_APU_CPU_FREQ); | ||
| 162 | +SET_CPU_FREQ(19, VERSAL_NET_APU_CPU_FREQ); | ||
| 163 | +SET_CPU_FREQ(20, VERSAL_NET_APU_CPU_FREQ); | ||
| 164 | +SET_CPU_FREQ(21, VERSAL_NET_APU_CPU_FREQ); | ||
| 165 | +SET_CPU_FREQ(22, VERSAL_NET_APU_CPU_FREQ); | ||
| 166 | +SET_CPU_FREQ(23, VERSAL_NET_APU_CPU_FREQ); | ||
| 167 | +SET_CPU_FREQ(24, VERSAL_NET_APU_CPU_FREQ); | ||
| 168 | +SET_CPU_FREQ(25, VERSAL_NET_APU_CPU_FREQ); | ||
| 169 | +SET_CPU_FREQ(26, VERSAL_NET_APU_CPU_FREQ); | ||
| 170 | +SET_CPU_FREQ(27, VERSAL_NET_APU_CPU_FREQ); | ||
| 171 | +SET_CPU_FREQ(28, VERSAL_NET_APU_CPU_FREQ); | ||
| 172 | +SET_CPU_FREQ(29, VERSAL_NET_APU_CPU_FREQ); | ||
| 173 | +SET_CPU_FREQ(30, VERSAL_NET_APU_CPU_FREQ); | ||
| 174 | +SET_CPU_FREQ(31, VERSAL_NET_APU_CPU_FREQ); | ||
| 175 | +#endif | ||
| 176 | + | ||
| 177 | +&rpu_ctrl_a { | ||
| 178 | + tcm-mr = <&s_axi_tcm_a>; | ||
| 179 | +}; | ||
| 180 | +&rpu_ctrl_a0 { | ||
| 181 | + core = <&rpu_cpu0>; | ||
| 182 | +}; | ||
| 183 | +&rpu_ctrl_a1 { | ||
| 184 | + core = <&rpu_cpu1>; | ||
| 185 | +}; | ||
| 186 | + | ||
| 187 | +&rpu_ctrl_b { | ||
| 188 | + tcm-mr = <&s_axi_tcm_b>; | ||
| 189 | +}; | ||
| 190 | +&rpu_ctrl_b0 { | ||
| 191 | + core = <&rpu_cpu2>; | ||
| 192 | +}; | ||
| 193 | +&rpu_ctrl_b1 { | ||
| 194 | + core = <&rpu_cpu3>; | ||
| 195 | +}; | ||
| 196 | + | ||
| 197 | +&pmc_tap { | ||
| 198 | + idcode = <0x14D80093>; | ||
| 199 | + platform-ver = <0x5>; | ||
| 200 | +}; | ||
| 201 | diff --git a/board-versal-pmx-virt-alt.dts b/board-versal-pmx-virt-alt.dts | ||
| 202 | new file mode 100644 | ||
| 203 | index 00000000..7a4679d0 | ||
| 204 | --- /dev/null | ||
| 205 | +++ b/board-versal-pmx-virt-alt.dts | ||
| 206 | @@ -0,0 +1,82 @@ | ||
| 207 | +/* | ||
| 208 | + * Versal Virtual PMC board device tree | ||
| 209 | + * | ||
| 210 | + * Copyright (c) 2016, Xilinx Inc | ||
| 211 | + * All rights reserved. | ||
| 212 | + * | ||
| 213 | + * Redistribution and use in source and binary forms, with or without | ||
| 214 | + * modification, are permitted provided that the following conditions are met: | ||
| 215 | + * * Redistributions of source code must retain the above copyright | ||
| 216 | + * notice, this list of conditions and the following disclaimer. | ||
| 217 | + * * Redistributions in binary form must reproduce the above copyright | ||
| 218 | + * notice, this list of conditions and the following disclaimer in the | ||
| 219 | + * documentation and/or other materials provided with the distribution. | ||
| 220 | + * * Neither the name of the <organization> nor the | ||
| 221 | + * names of its contributors may be used to endorse or promote products | ||
| 222 | + * derived from this software without specific prior written permission. | ||
| 223 | + * | ||
| 224 | + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND | ||
| 225 | + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED | ||
| 226 | + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE | ||
| 227 | + * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY | ||
| 228 | + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES | ||
| 229 | + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; | ||
| 230 | + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | ||
| 231 | + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
| 232 | + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS | ||
| 233 | + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | ||
| 234 | + */ | ||
| 235 | + | ||
| 236 | +#define VERSAL_PMX | ||
| 237 | +#define VERSAL_NET | ||
| 238 | +#define NUM_APUS 16 | ||
| 239 | +#define NUM_APUS_PER_CLUSTER 4 | ||
| 240 | +#define VERSAL_NPI_OVERRIDE | ||
| 241 | + | ||
| 242 | +#include "include/versal-net/npi-memmap.dtsh" | ||
| 243 | +#include "include/versal-net/fpd-memmap.dtsh" | ||
| 244 | +#include "board-versal-pmc-virt-alt.dts" | ||
| 245 | +#include "versal-pmx-shared-overlay.dtsi" | ||
| 246 | + | ||
| 247 | +#ifndef MULTI_ARCH | ||
| 248 | +/* | ||
| 249 | + * The single-arch setup has the entire system except | ||
| 250 | + * the ARM cores. So we need to add the missing dummy | ||
| 251 | + * ARM cores (pmc-virt.dts already has 0 - 1) and include | ||
| 252 | + * the PSX and PMX system overlays. | ||
| 253 | + */ | ||
| 254 | +#include "versal-pmx-system-overlay.dtsi" | ||
| 255 | +#include "versal-psx.dtsi" | ||
| 256 | +#include "versal-psx-shared-overlay.dtsi" | ||
| 257 | +#include "versal-net-psmx.dtsi" | ||
| 258 | + | ||
| 259 | +/ { | ||
| 260 | + /* Dummy APUs. */ | ||
| 261 | + cpu2: apu@2 { }; | ||
| 262 | + cpu3: apu@3 { }; | ||
| 263 | + cpu4: apu@4 { }; | ||
| 264 | + cpu5: apu@5 { }; | ||
| 265 | + cpu6: apu@6 { }; | ||
| 266 | + cpu7: apu@7 { }; | ||
| 267 | +#if (NUM_APUS >= 16) | ||
| 268 | + cpu8: apu@8 { }; | ||
| 269 | + cpu9: apu@9 { }; | ||
| 270 | + cpu10: apu@10 { }; | ||
| 271 | + cpu11: apu@11 { }; | ||
| 272 | + cpu12: apu@12 { }; | ||
| 273 | + cpu13: apu@13 { }; | ||
| 274 | + cpu14: apu@14 { }; | ||
| 275 | + cpu15: apu@15 { }; | ||
| 276 | +#endif | ||
| 277 | + /* Dummy GICs. */ | ||
| 278 | + rpu_gic_a: rpu_gic_a@0 { | ||
| 279 | + gpio_controller ; | ||
| 280 | + #gpio-cells = <1>; | ||
| 281 | + }; | ||
| 282 | + | ||
| 283 | + rpu_gic_b: rpu_gic_b@0 { | ||
| 284 | + gpio_controller ; | ||
| 285 | + #gpio-cells = <1>; | ||
| 286 | + }; | ||
| 287 | +}; | ||
| 288 | +#endif | ||
| 289 | -- | ||
| 290 | 2.34.1 | ||
| 291 | |||
