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authorSipke Vriend <sipke.vriend@xilinx.com>2013-06-06 15:33:00 +1000
committerSipke Vriend <sipke.vriend@xilinx.com>2013-06-06 15:33:00 +1000
commit72977138d19eb10e03ba23ea0107e29ca3f2ce3b (patch)
tree00b19e3326ce74915ee1c00a94a344de7821d629
parent814e67d1d3d9b845d28ed8a17a275157bc950a88 (diff)
downloadmeta-xilinx-72977138d19eb10e03ba23ea0107e29ca3f2ce3b.tar.gz
meta-zedboard: Added dts files to allow booting from mmc partition 2 or ramdisk
Two dts files added with change in root options for kernel bootargs. Still need to split these files into dtsi files. Signed-off-by: Sipke Vriend <sipke.vriend@xilinx.com>
Diffstat
-rw-r--r--meta-zedboard/recipes-kernel/linux/linux-xlnx.inc4
-rw-r--r--meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-mmcblk0p2.dts339
-rw-r--r--meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-ram.dts339
3 files changed, 681 insertions, 1 deletions
diff --git a/meta-zedboard/recipes-kernel/linux/linux-xlnx.inc b/meta-zedboard/recipes-kernel/linux/linux-xlnx.inc
index bcbfae7d..3e0e776a 100644
--- a/meta-zedboard/recipes-kernel/linux/linux-xlnx.inc
+++ b/meta-zedboard/recipes-kernel/linux/linux-xlnx.inc
@@ -7,7 +7,9 @@ FILESEXTRAPATHS_prepend := "${THISDIR}/linux-xlnx:"
7# meta-xilinx/meta-<boardlayer>/kernel-recipes for board specific fragments 7# meta-xilinx/meta-<boardlayer>/kernel-recipes for board specific fragments
8SRC_URI_append_zedboard += "file://xilinx_zynq_defconfig_${LINUX_VERSION}.cfg" 8SRC_URI_append_zedboard += "file://xilinx_zynq_defconfig_${LINUX_VERSION}.cfg"
9SRC_URI_append_zedboard += "file://nortc.cfg" 9SRC_URI_append_zedboard += "file://nortc.cfg"
10SRC_URI_append_zedboard += "file://zynq-zed-mmcblk0p2.dts"
11SRC_URI_append_zedboard += "file://zynq-zed-ram.dts"
10 12
11KERNEL_DEVICETREE_zedboard = "${S}/arch/arm/boot/dts/zynq-zed.dts" 13KERNEL_DEVICETREE_zedboard = "${WORKDIR}/zynq-zed-mmcblk0p2.dts ${WORKDIR}/zynq-zed-ram.dts"
12 14
13COMPATIBLE_MACHINE_zedboard = "zedboard" 15COMPATIBLE_MACHINE_zedboard = "zedboard"
diff --git a/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-mmcblk0p2.dts b/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-mmcblk0p2.dts
new file mode 100644
index 00000000..6400c1b3
--- /dev/null
+++ b/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-mmcblk0p2.dts
@@ -0,0 +1,339 @@
1/*
2 * Device Tree Generator version: 1.1
3 *
4 * (C) Copyright 2007-2012 Xilinx, Inc.
5 * (C) Copyright 2007-2012 Michal Simek
6 * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
7 *
8 * Michal SIMEK <monstr@monstr.eu>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 *
25 * CAUTION: This file is automatically generated by libgen.
26 * Version: Xilinx EDK 14.4 EDK_P.49d
27 * Today is: Wednesday, the 06 of February, 2013; 10:43:23
28 *
29 * XPS project directory: device-tree_bsp_0
30 */
31
32/dts-v1/;
33/ {
34 #address-cells = <1>;
35 #size-cells = <1>;
36 compatible = "xlnx,zynq-zc770";
37 model = "Xilinx Zynq";
38 aliases {
39 ethernet0 = &ps7_ethernet_0;
40 serial0 = &ps7_uart_1;
41 } ;
42 chosen {
43 bootargs = "console=ttyPS0,115200 root=/dev/mmcblk0p2 ro ip=:::::eth0:dhcp earlyprintk";
44 linux,stdout-path = "/axi@0/serial@e0001000";
45 } ;
46 cpus {
47 #address-cells = <1>;
48 #cpus = <0x2>;
49 #size-cells = <0>;
50 ps7_cortexa9_0: cpu@0 {
51 compatible = "xlnx,ps7-cortexa9-1.00.a";
52 d-cache-line-size = <0x20>;
53 d-cache-size = <0x8000>;
54 device_type = "cpu";
55 i-cache-line-size = <0x20>;
56 i-cache-size = <0x8000>;
57 model = "ps7_cortexa9,1.00.a";
58 reg = <0>;
59 xlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>;
60 xlnx,cpu-clk-freq-hz = <0x27bc86bf>;
61 } ;
62 ps7_cortexa9_1: cpu@1 {
63 compatible = "xlnx,ps7-cortexa9-1.00.a";
64 d-cache-line-size = <0x20>;
65 d-cache-size = <0x8000>;
66 device_type = "cpu";
67 i-cache-line-size = <0x20>;
68 i-cache-size = <0x8000>;
69 model = "ps7_cortexa9,1.00.a";
70 reg = <1>;
71 xlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>;
72 xlnx,cpu-clk-freq-hz = <0x27bc86bf>;
73 } ;
74 } ;
75 pmu {
76 compatible = "arm,cortex-a9-pmu";
77 interrupt-parent = <&ps7_scugic_0>;
78 interrupts = < 0 5 4 0 6 4 >;
79 reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
80 } ;
81 ps7_ddr_0: memory@0 {
82 device_type = "memory";
83 reg = < 0x0 0x20000000 >;
84 } ;
85 ps7_axi_interconnect_0: amba@0 {
86 #address-cells = <1>;
87 #size-cells = <1>;
88 compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
89 ranges ;
90 ps7_afi_0: ps7-afi@f8008000 {
91 compatible = "xlnx,ps7-afi-1.00.a";
92 reg = < 0xf8008000 0x1000 >;
93 } ;
94 ps7_afi_1: ps7-afi@f8009000 {
95 compatible = "xlnx,ps7-afi-1.00.a";
96 reg = < 0xf8009000 0x1000 >;
97 } ;
98 ps7_afi_2: ps7-afi@f800a000 {
99 compatible = "xlnx,ps7-afi-1.00.a";
100 reg = < 0xf800a000 0x1000 >;
101 } ;
102 ps7_afi_3: ps7-afi@f800b000 {
103 compatible = "xlnx,ps7-afi-1.00.a";
104 reg = < 0xf800b000 0x1000 >;
105 } ;
106 ps7_ddrc_0: ps7-ddrc@f8006000 {
107 compatible = "xlnx,ps7-ddrc-1.00.a", "xlnx,ps7-ddrc";
108 reg = < 0xf8006000 0x1000 >;
109 xlnx,has-ecc = <0x0>;
110 } ;
111 ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
112 compatible = "xlnx,ps7-dev-cfg-1.00.a";
113 interrupt-parent = <&ps7_scugic_0>;
114 interrupts = < 0 8 4 >;
115 reg = < 0xf8007000 0x1000 >;
116 } ;
117 ps7_dma_s: ps7-dma@f8003000 {
118 #dma-cells = <1>;
119 #dma-channels = <8>;
120 #dma-requests = <4>;
121 arm,primecell-periphid = <0x41330>;
122 compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
123 interrupt-parent = <&ps7_scugic_0>;
124 interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
125 reg = < 0xf8003000 0x1000 >;
126 } ;
127 ps7_ethernet_0: ps7-ethernet@e000b000 {
128 #address-cells = <1>;
129 #size-cells = <0>;
130 compatible = "xlnx,ps7-ethernet-1.00.a";
131 interrupt-parent = <&ps7_scugic_0>;
132 interrupts = < 0 22 1 >;
133 local-mac-address = [ 00 0a 35 00 00 00 ];
134 phy-handle = <&phy0>;
135 phy-mode = "rgmii-id";
136 reg = < 0xe000b000 0x1000 >;
137 xlnx,enet-clk-freq-hz = <0x7735940>;
138 xlnx,enet-reset = <0xffffffff>;
139 xlnx,enet-slcr-1000mbps-div0 = <0x8>;
140 xlnx,enet-slcr-1000mbps-div1 = <0x1>;
141 xlnx,enet-slcr-100mbps-div0 = <0x8>;
142 xlnx,enet-slcr-100mbps-div1 = <0x5>;
143 xlnx,enet-slcr-10mbps-div0 = <0x8>;
144 xlnx,enet-slcr-10mbps-div1 = <0x32>;
145 xlnx,eth-mode = <0x1>;
146 xlnx,has-mdio = <0x1>;
147 xlnx,ptp-enet-clock = <111111115>;
148 mdio {
149 #address-cells = <1>;
150 #size-cells = <0>;
151 phy0: phy@7 {
152 compatible = "marvell,88e1510";
153 device_type = "ethernet-phy";
154 reg = <7>;
155 } ;
156 } ;
157 } ;
158 ps7_gpio_0: ps7-gpio@e000a000 {
159 #gpio-cells = <2>;
160 compatible = "xlnx,ps7-gpio-1.00.a";
161 emio-gpio-width = <64>;
162 gpio-controller ;
163 gpio-mask-high = <0xc0000>;
164 gpio-mask-low = <0xfe81>;
165 interrupt-parent = <&ps7_scugic_0>;
166 interrupts = < 0 20 4 >;
167 reg = < 0xe000a000 0x1000 >;
168 } ;
169 ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
170 compatible = "xlnx,ps7-iop-bus-config-1.00.a";
171 reg = < 0xe0200000 0x1000 >;
172 } ;
173 ps7_pl310_0: ps7-pl310@f8f02000 {
174 arm,data-latency = < 3 2 2 >;
175 arm,tag-latency = < 2 2 2 >;
176 cache-level = < 2 >;
177 cache-unified ;
178 compatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache";
179 interrupt-parent = <&ps7_scugic_0>;
180 interrupts = < 0 2 4 >;
181 reg = < 0xf8f02000 0x1000 >;
182 } ;
183 ps7_qspi_0: ps7-qspi@e000d000 {
184 bus-num = <0>;
185 compatible = "xlnx,ps7-qspi-1.00.a";
186 interrupt-parent = <&ps7_scugic_0>;
187 interrupts = < 0 19 4 >;
188 is-dual = <0>;
189 num-chip-select = <1>;
190 reg = < 0xe000d000 0x1000 >;
191 speed-hz = <200000000>;
192 xlnx,fb-clk = <0x1>;
193 xlnx,qspi-clk-freq-hz = <0xbebc200>;
194 xlnx,qspi-mode = <0x0>;
195 #address-cells = <1>;
196 #size-cells = <0>;
197 flash@0 {
198 compatible = "n25q128";
199 reg = <0x0>;
200 spi-max-frequency = <50000000>;
201 #address-cells = <1>;
202 #size-cells = <1>;
203 partition@qspi-fsbl-uboot {
204 label = "qspi-fsbl-uboot";
205 reg = <0x0 0x100000>;
206 };
207 partition@qspi-linux {
208 label = "qspi-linux";
209 reg = <0x100000 0x500000>;
210 };
211 partition@qspi-device-tree {
212 label = "qspi-device-tree";
213 reg = <0x600000 0x20000>;
214 };
215 partition@qspi-rootfs {
216 label = "qspi-rootfs";
217 reg = <0x620000 0x5E0000>;
218 };
219 partition@qspi-bitstream {
220 label = "qspi-bitstream";
221 reg = <0xC00000 0x400000>;
222 };
223 };
224 } ;
225 ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
226 compatible = "xlnx,ps7-qspi-linear-1.00.a";
227 reg = < 0xfc000000 0x1000000 >;
228 xlnx,qspi-clk-freq-hz = <0xe4e1c0>;
229 } ;
230 ps7_ram_0: ps7-ram@0 {
231 compatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm";
232 reg = < 0xfffc0000 0x40000 >;
233 } ;
234 ps7_scugic_0: ps7-scugic@f8f01000 {
235 #address-cells = < 2 >;
236 #interrupt-cells = < 3 >;
237 #size-cells = < 1 >;
238 compatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic";
239 interrupt-controller ;
240 linux,phandle = < 0x1 >;
241 phandle = < 0x1 >;
242 reg = < 0xf8f01000 0x1000 0xf8f00100 0x100 >;
243 } ;
244 ps7_scutimer_0: ps7-scutimer@f8f00600 {
245 compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer";
246 interrupt-parent = <&ps7_scugic_0>;
247 interrupts = < 1 13 769 >;
248 reg = < 0xf8f00600 0x20 >;
249 } ;
250 ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
251 compatible = "xlnx,ps7-scuwdt-1.00.a";
252 device_type = "watchdog";
253 interrupt-parent = <&ps7_scugic_0>;
254 interrupts = < 1 14 769 >;
255 reg = < 0xf8f00620 0xe0 >;
256 } ;
257 ps7_sd_0: ps7-sdio@e0100000 {
258 clock-frequency = <50000000>;
259 compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci";
260 interrupt-parent = <&ps7_scugic_0>;
261 interrupts = < 0 24 4 >;
262 reg = < 0xe0100000 0x1000 >;
263 xlnx,has-cd = <0x1>;
264 xlnx,has-power = <0x0>;
265 xlnx,has-wp = <0x1>;
266 xlnx,sdio-clk-freq-hz = <0x2faf080>;
267 } ;
268 ps7_slcr_0: ps7-slcr@f8000000 {
269 compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr";
270 reg = < 0xf8000000 0x1000 >;
271 clocks {
272 #address-cells = <1>;
273 #size-cells = <0>;
274 armpll: armpll {
275 #clock-cells = <0>;
276 clock-output-names = "armpll";
277 clocks = <&ps_clk>;
278 compatible = "xlnx,zynq-pll";
279 lockbit = <0>;
280 reg = < 0x100 0x110 0x10c >;
281 } ;
282 ddrpll: ddrpll {
283 #clock-cells = <0>;
284 clock-output-names = "ddrpll";
285 clocks = <&ps_clk>;
286 compatible = "xlnx,zynq-pll";
287 lockbit = <1>;
288 reg = < 0x104 0x114 0x10c >;
289 } ;
290 iopll: iopll {
291 #clock-cells = <0>;
292 clock-output-names = "iopll";
293 clocks = <&ps_clk>;
294 compatible = "xlnx,zynq-pll";
295 lockbit = <2>;
296 reg = < 0x108 0x118 0x10c >;
297 } ;
298 ps_clk: ps_clk {
299 #clock-cells = <0>;
300 clock-frequency = <33333333>;
301 clock-output-names = "ps_clk";
302 compatible = "fixed-clock";
303 } ;
304 } ;
305 } ;
306 ps7_ttc_0: ps7-ttc@f8001000 {
307 compatible = "xlnx,ps7-ttc-1.00.a";
308 interrupt-parent = <&ps7_scugic_0>;
309 interrupts = < 0 10 4 0 11 4 0 12 4 >;
310 reg = < 0xf8001000 0x1000 >;
311 } ;
312 ps7_uart_1: serial@e0001000 {
313 compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
314 current-speed = <115200>;
315 device_type = "serial";
316 interrupt-parent = <&ps7_scugic_0>;
317 interrupts = < 0 50 4 >;
318 port-number = <0>;
319 reg = < 0xe0001000 0x1000 >;
320 xlnx,has-modem = <0x0>;
321 xlnx,uart-clk-freq-hz = <0x2faf080>;
322 } ;
323 ps7_usb_0: ps7-usb@e0002000 {
324 compatible = "xlnx,ps7-usb-1.00.a";
325 dr_mode = "host";
326 interrupt-parent = <&ps7_scugic_0>;
327 interrupts = < 0 21 4 >;
328 phy_type = "ulpi";
329 reg = < 0xe0002000 0x1000 >;
330 xlnx,usb-reset = <0xffffffff>;
331 } ;
332 ps7_xadc: ps7-xadc@f8007100 {
333 compatible = "xlnx,ps7-xadc-1.00.a";
334 interrupt-parent = <&ps7_scugic_0>;
335 interrupts = < 0 7 4 >;
336 reg = < 0xf8007100 0x20 >;
337 } ;
338 } ;
339} ;
diff --git a/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-ram.dts b/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-ram.dts
new file mode 100644
index 00000000..cd0bc860
--- /dev/null
+++ b/meta-zedboard/recipes-kernel/linux/linux-xlnx/zynq-zed-ram.dts
@@ -0,0 +1,339 @@
1/*
2 * Device Tree Generator version: 1.1
3 *
4 * (C) Copyright 2007-2012 Xilinx, Inc.
5 * (C) Copyright 2007-2012 Michal Simek
6 * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd
7 *
8 * Michal SIMEK <monstr@monstr.eu>
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
24 *
25 * CAUTION: This file is automatically generated by libgen.
26 * Version: Xilinx EDK 14.4 EDK_P.49d
27 * Today is: Wednesday, the 06 of February, 2013; 10:43:23
28 *
29 * XPS project directory: device-tree_bsp_0
30 */
31
32/dts-v1/;
33/ {
34 #address-cells = <1>;
35 #size-cells = <1>;
36 compatible = "xlnx,zynq-zc770";
37 model = "Xilinx Zynq";
38 aliases {
39 ethernet0 = &ps7_ethernet_0;
40 serial0 = &ps7_uart_1;
41 } ;
42 chosen {
43 bootargs = "console=ttyPS0,115200 root=/dev/ram rw ip=:::::eth0:dhcp earlyprintk";
44 linux,stdout-path = "/axi@0/serial@e0001000";
45 } ;
46 cpus {
47 #address-cells = <1>;
48 #cpus = <0x2>;
49 #size-cells = <0>;
50 ps7_cortexa9_0: cpu@0 {
51 compatible = "xlnx,ps7-cortexa9-1.00.a";
52 d-cache-line-size = <0x20>;
53 d-cache-size = <0x8000>;
54 device_type = "cpu";
55 i-cache-line-size = <0x20>;
56 i-cache-size = <0x8000>;
57 model = "ps7_cortexa9,1.00.a";
58 reg = <0>;
59 xlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>;
60 xlnx,cpu-clk-freq-hz = <0x27bc86bf>;
61 } ;
62 ps7_cortexa9_1: cpu@1 {
63 compatible = "xlnx,ps7-cortexa9-1.00.a";
64 d-cache-line-size = <0x20>;
65 d-cache-size = <0x8000>;
66 device_type = "cpu";
67 i-cache-line-size = <0x20>;
68 i-cache-size = <0x8000>;
69 model = "ps7_cortexa9,1.00.a";
70 reg = <1>;
71 xlnx,cpu-1x-clk-freq-hz = <0x69f6bcb>;
72 xlnx,cpu-clk-freq-hz = <0x27bc86bf>;
73 } ;
74 } ;
75 pmu {
76 compatible = "arm,cortex-a9-pmu";
77 interrupt-parent = <&ps7_scugic_0>;
78 interrupts = < 0 5 4 0 6 4 >;
79 reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >;
80 } ;
81 ps7_ddr_0: memory@0 {
82 device_type = "memory";
83 reg = < 0x0 0x20000000 >;
84 } ;
85 ps7_axi_interconnect_0: amba@0 {
86 #address-cells = <1>;
87 #size-cells = <1>;
88 compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus";
89 ranges ;
90 ps7_afi_0: ps7-afi@f8008000 {
91 compatible = "xlnx,ps7-afi-1.00.a";
92 reg = < 0xf8008000 0x1000 >;
93 } ;
94 ps7_afi_1: ps7-afi@f8009000 {
95 compatible = "xlnx,ps7-afi-1.00.a";
96 reg = < 0xf8009000 0x1000 >;
97 } ;
98 ps7_afi_2: ps7-afi@f800a000 {
99 compatible = "xlnx,ps7-afi-1.00.a";
100 reg = < 0xf800a000 0x1000 >;
101 } ;
102 ps7_afi_3: ps7-afi@f800b000 {
103 compatible = "xlnx,ps7-afi-1.00.a";
104 reg = < 0xf800b000 0x1000 >;
105 } ;
106 ps7_ddrc_0: ps7-ddrc@f8006000 {
107 compatible = "xlnx,ps7-ddrc-1.00.a", "xlnx,ps7-ddrc";
108 reg = < 0xf8006000 0x1000 >;
109 xlnx,has-ecc = <0x0>;
110 } ;
111 ps7_dev_cfg_0: ps7-dev-cfg@f8007000 {
112 compatible = "xlnx,ps7-dev-cfg-1.00.a";
113 interrupt-parent = <&ps7_scugic_0>;
114 interrupts = < 0 8 4 >;
115 reg = < 0xf8007000 0x1000 >;
116 } ;
117 ps7_dma_s: ps7-dma@f8003000 {
118 #dma-cells = <1>;
119 #dma-channels = <8>;
120 #dma-requests = <4>;
121 arm,primecell-periphid = <0x41330>;
122 compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330";
123 interrupt-parent = <&ps7_scugic_0>;
124 interrupts = < 0 13 4 0 14 4 0 15 4 0 16 4 0 17 4 0 40 4 0 41 4 0 42 4 0 43 4 >;
125 reg = < 0xf8003000 0x1000 >;
126 } ;
127 ps7_ethernet_0: ps7-ethernet@e000b000 {
128 #address-cells = <1>;
129 #size-cells = <0>;
130 compatible = "xlnx,ps7-ethernet-1.00.a";
131 interrupt-parent = <&ps7_scugic_0>;
132 interrupts = < 0 22 1 >;
133 local-mac-address = [ 00 0a 35 00 00 00 ];
134 phy-handle = <&phy0>;
135 phy-mode = "rgmii-id";
136 reg = < 0xe000b000 0x1000 >;
137 xlnx,enet-clk-freq-hz = <0x7735940>;
138 xlnx,enet-reset = <0xffffffff>;
139 xlnx,enet-slcr-1000mbps-div0 = <0x8>;
140 xlnx,enet-slcr-1000mbps-div1 = <0x1>;
141 xlnx,enet-slcr-100mbps-div0 = <0x8>;
142 xlnx,enet-slcr-100mbps-div1 = <0x5>;
143 xlnx,enet-slcr-10mbps-div0 = <0x8>;
144 xlnx,enet-slcr-10mbps-div1 = <0x32>;
145 xlnx,eth-mode = <0x1>;
146 xlnx,has-mdio = <0x1>;
147 xlnx,ptp-enet-clock = <111111115>;
148 mdio {
149 #address-cells = <1>;
150 #size-cells = <0>;
151 phy0: phy@7 {
152 compatible = "marvell,88e1510";
153 device_type = "ethernet-phy";
154 reg = <7>;
155 } ;
156 } ;
157 } ;
158 ps7_gpio_0: ps7-gpio@e000a000 {
159 #gpio-cells = <2>;
160 compatible = "xlnx,ps7-gpio-1.00.a";
161 emio-gpio-width = <64>;
162 gpio-controller ;
163 gpio-mask-high = <0xc0000>;
164 gpio-mask-low = <0xfe81>;
165 interrupt-parent = <&ps7_scugic_0>;
166 interrupts = < 0 20 4 >;
167 reg = < 0xe000a000 0x1000 >;
168 } ;
169 ps7_iop_bus_config_0: ps7-iop-bus-config@e0200000 {
170 compatible = "xlnx,ps7-iop-bus-config-1.00.a";
171 reg = < 0xe0200000 0x1000 >;
172 } ;
173 ps7_pl310_0: ps7-pl310@f8f02000 {
174 arm,data-latency = < 3 2 2 >;
175 arm,tag-latency = < 2 2 2 >;
176 cache-level = < 2 >;
177 cache-unified ;
178 compatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache";
179 interrupt-parent = <&ps7_scugic_0>;
180 interrupts = < 0 2 4 >;
181 reg = < 0xf8f02000 0x1000 >;
182 } ;
183 ps7_qspi_0: ps7-qspi@e000d000 {
184 bus-num = <0>;
185 compatible = "xlnx,ps7-qspi-1.00.a";
186 interrupt-parent = <&ps7_scugic_0>;
187 interrupts = < 0 19 4 >;
188 is-dual = <0>;
189 num-chip-select = <1>;
190 reg = < 0xe000d000 0x1000 >;
191 speed-hz = <200000000>;
192 xlnx,fb-clk = <0x1>;
193 xlnx,qspi-clk-freq-hz = <0xbebc200>;
194 xlnx,qspi-mode = <0x0>;
195 #address-cells = <1>;
196 #size-cells = <0>;
197 flash@0 {
198 compatible = "n25q128";
199 reg = <0x0>;
200 spi-max-frequency = <50000000>;
201 #address-cells = <1>;
202 #size-cells = <1>;
203 partition@qspi-fsbl-uboot {
204 label = "qspi-fsbl-uboot";
205 reg = <0x0 0x100000>;
206 };
207 partition@qspi-linux {
208 label = "qspi-linux";
209 reg = <0x100000 0x500000>;
210 };
211 partition@qspi-device-tree {
212 label = "qspi-device-tree";
213 reg = <0x600000 0x20000>;
214 };
215 partition@qspi-rootfs {
216 label = "qspi-rootfs";
217 reg = <0x620000 0x5E0000>;
218 };
219 partition@qspi-bitstream {
220 label = "qspi-bitstream";
221 reg = <0xC00000 0x400000>;
222 };
223 };
224 } ;
225 ps7_qspi_linear_0: ps7-qspi-linear@fc000000 {
226 compatible = "xlnx,ps7-qspi-linear-1.00.a";
227 reg = < 0xfc000000 0x1000000 >;
228 xlnx,qspi-clk-freq-hz = <0xe4e1c0>;
229 } ;
230 ps7_ram_0: ps7-ram@0 {
231 compatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm";
232 reg = < 0xfffc0000 0x40000 >;
233 } ;
234 ps7_scugic_0: ps7-scugic@f8f01000 {
235 #address-cells = < 2 >;
236 #interrupt-cells = < 3 >;
237 #size-cells = < 1 >;
238 compatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic";
239 interrupt-controller ;
240 linux,phandle = < 0x1 >;
241 phandle = < 0x1 >;
242 reg = < 0xf8f01000 0x1000 0xf8f00100 0x100 >;
243 } ;
244 ps7_scutimer_0: ps7-scutimer@f8f00600 {
245 compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer";
246 interrupt-parent = <&ps7_scugic_0>;
247 interrupts = < 1 13 769 >;
248 reg = < 0xf8f00600 0x20 >;
249 } ;
250 ps7_scuwdt_0: ps7-scuwdt@f8f00620 {
251 compatible = "xlnx,ps7-scuwdt-1.00.a";
252 device_type = "watchdog";
253 interrupt-parent = <&ps7_scugic_0>;
254 interrupts = < 1 14 769 >;
255 reg = < 0xf8f00620 0xe0 >;
256 } ;
257 ps7_sd_0: ps7-sdio@e0100000 {
258 clock-frequency = <50000000>;
259 compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci";
260 interrupt-parent = <&ps7_scugic_0>;
261 interrupts = < 0 24 4 >;
262 reg = < 0xe0100000 0x1000 >;
263 xlnx,has-cd = <0x1>;
264 xlnx,has-power = <0x0>;
265 xlnx,has-wp = <0x1>;
266 xlnx,sdio-clk-freq-hz = <0x2faf080>;
267 } ;
268 ps7_slcr_0: ps7-slcr@f8000000 {
269 compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr";
270 reg = < 0xf8000000 0x1000 >;
271 clocks {
272 #address-cells = <1>;
273 #size-cells = <0>;
274 armpll: armpll {
275 #clock-cells = <0>;
276 clock-output-names = "armpll";
277 clocks = <&ps_clk>;
278 compatible = "xlnx,zynq-pll";
279 lockbit = <0>;
280 reg = < 0x100 0x110 0x10c >;
281 } ;
282 ddrpll: ddrpll {
283 #clock-cells = <0>;
284 clock-output-names = "ddrpll";
285 clocks = <&ps_clk>;
286 compatible = "xlnx,zynq-pll";
287 lockbit = <1>;
288 reg = < 0x104 0x114 0x10c >;
289 } ;
290 iopll: iopll {
291 #clock-cells = <0>;
292 clock-output-names = "iopll";
293 clocks = <&ps_clk>;
294 compatible = "xlnx,zynq-pll";
295 lockbit = <2>;
296 reg = < 0x108 0x118 0x10c >;
297 } ;
298 ps_clk: ps_clk {
299 #clock-cells = <0>;
300 clock-frequency = <33333333>;
301 clock-output-names = "ps_clk";
302 compatible = "fixed-clock";
303 } ;
304 } ;
305 } ;
306 ps7_ttc_0: ps7-ttc@f8001000 {
307 compatible = "xlnx,ps7-ttc-1.00.a";
308 interrupt-parent = <&ps7_scugic_0>;
309 interrupts = < 0 10 4 0 11 4 0 12 4 >;
310 reg = < 0xf8001000 0x1000 >;
311 } ;
312 ps7_uart_1: serial@e0001000 {
313 compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps";
314 current-speed = <115200>;
315 device_type = "serial";
316 interrupt-parent = <&ps7_scugic_0>;
317 interrupts = < 0 50 4 >;
318 port-number = <0>;
319 reg = < 0xe0001000 0x1000 >;
320 xlnx,has-modem = <0x0>;
321 xlnx,uart-clk-freq-hz = <0x2faf080>;
322 } ;
323 ps7_usb_0: ps7-usb@e0002000 {
324 compatible = "xlnx,ps7-usb-1.00.a";
325 dr_mode = "host";
326 interrupt-parent = <&ps7_scugic_0>;
327 interrupts = < 0 21 4 >;
328 phy_type = "ulpi";
329 reg = < 0xe0002000 0x1000 >;
330 xlnx,usb-reset = <0xffffffff>;
331 } ;
332 ps7_xadc: ps7-xadc@f8007100 {
333 compatible = "xlnx,ps7-xadc-1.00.a";
334 interrupt-parent = <&ps7_scugic_0>;
335 interrupts = < 0 7 4 >;
336 reg = < 0xf8007100 0x20 >;
337 } ;
338 } ;
339} ;
generated by cgit v1.2.3-54-g00ecf (git 2.39.0) at 2026-07-24 23:45:20 +0000