linux-xlnx : Updated SRCREV for 2024.1_1555

Revert "firmware: xilinx: Open MMIO read/write interface via debugfs"
Revert "include: dt-bindings: Add mscc-vsc8531 RGMII clock delay definitions"
Revert "firmware: xilinx: add support for sd/usb/gem config"
arm: dts: xilinx: Remove redundant is-dual and is-stacked DT properties
Revert "firmware: xilinx: Add ULPI reset support"
misc: Get OPEN_DICE/VCPU_STALL_DETECTOR back
Revert "remoteproc: Add support for peek from remote and acking kick from remote"
Revert "uartlite: Update the default for the parameter"
dt-bindings: misc: Remove description for xlnx,fclk
clocking-wizard: Sync internal driver with v7 version
dt-bindings: clock: xilinx: add versal compatible
clocking-wizard: Sync valuem/d/o names with upstream version
Revert "clocking-wizard: Add versal clocking wizard support"
Revert "dt-bindings: Add versal clocking wizard"
arm64: versal: Switch to new xlnx,versal-ddrmc compatible string
EDAC/versal: Move driver to its final location
edac: zynqmp_edac: Moved driver to new location
Revert "i2c: mux: pca954x: write to mux channel always"
arm64: versal: Update SE5 Ethernet PHY RGMII properties
net: phy: mscc: fix packet loss due to RGMII delays
phy: mscc: Add support for RGMII delay configuration
phy: mscc: Use PHY_ID_MATCH_VENDOR to minimize PHY ID table
net: phy: mscc: enable VSC8501/2 RGMII RX clock
net: phy: mscc: remove unnecessary phydev locking
Revert "phy: mscc: Add support for VSC8531_02 with RGMII tuning"
Revert "dt-bindings: mscc: Add RGMII RX and TX delay tuning"
Revert "edac: Add documentation for cortexa53 edac sysfs"
soc: xilinx: Remove XPM_NODETYPE_ macro prefix
dt-bindings: i2c: xiic: Sync up with upstream
Revert "irqchip: xilinx: Make per cpu primary controller entries"
Revert "irqchip: xilinx: Move early initialization to own function"
Revert "irqchip: xilinx: Add support for sw interrupts"
Revert "irqchip: xilinx: Support only LE/BE irqc by the same driver"
Revert "irqchip: xilinx: Add support for cpu hotplug"
Revert "irqchip: xilinx: Add support for Microblaze SMP"
Revert "irqchip: xilinx: Change level for cpu-id warning"
Revert "edac: add support for ARM PL310 L2 cache parity"
Revert "microblaze: timer: Dont use cpu timer setting"
Revert "microblaze: timer: Separate clocksource timer from clockevent one"
Revert "microblaze: timer: Pass timer freq via parameter"
Revert "microblaze: timer: Squash clocksource code together"
Revert "microblaze: timer: Covert timer to use cpu hotplug"
Revert "microblaze: timer: Move irq code to clockevent function"
Revert "microblaze: timer: Create per cpu clockevent device"
Revert "microblaze: timer: Remove global variables"
Revert "microblaze: timer: Make sure that clockevent timer is initialized properly"
Revert "microblaze: timer: Group clockevent setting together"
Revert "microblaze: timer: Detect cpu_id from DT"
Revert "microblaze: timer: Change timer initialization setting"
Revert "microblaze: timer: Make timer SMP aware"
Revert "microblaze: timer: Add condition to check return value"
Revert "microblaze: timer: Fix incompatible parameters passed to the function"
Revert "microblaze: Change TLB mapping and free space allocation"
Revert "microblaze: Define SMP safe bit operations"
Revert "microblaze: Make cpuinfo structure SMP aware"
Revert "microblaze: Add SMP implementation of xchg and cmpxchg"
Revert "microblaze: Remove disabling IRQ while pte_update() run"
Revert "microblaze: Implement architecture spinlock"
Revert "microblaze: Do atomic operations by using exclusive"
Revert "microblaze: Prepare entry.S for SMP implementation"
Revert "microblaze: Rework mmu context management to prepare"
Revert "microblaze: Enable experimental SMP functionality"
Revert "microblaze: Add defconfig and DT for SMP design"
Revert "clk: Add ccf driver for IDT 8T49N24x UFT"
Revert "dt-bindings: Add binding for IDT 8T49N24x UFT"
arm64: zynqmp: Remove description for 8T49N240
Revert "Xilinx: ARM: Devcfg and SLCR drivers updated to support reconfiguration."
arm64: versal-net: Add missing xlnx,versal-firmware string
arm64: versal-net: Append xlnx,versal-clk to clock node
arm64: zynqmp: Remove unused xlnx,phy-type DT property
arm64: zynqmp: Add output-enable pins to SOM KD240
arm64: zynqmp: Enable uart0 with pinctrl description
arm64: zynqmp: Add support for K26 rev2 boards
arm64: zynqmp: Setup default si570 frequency to 156.25MHz
arm: dts: xilinx: Remove redundant is-dual and is-stacked DT properties
Revert "watchdog: xilinx_wwdt: Add "xlnx,versal-wwdt-1.0" compatible"
Revert "dt-bindings: watchdog: xlnx,versal-wwdt: Add "xlnx,versal-wwdt-1.0" compatible"
fpga: bridge: make fpga_bridge_class a static const structure
fpga: bridge: return errors in the show() method of the "state" attribute
fpga: bridge: properly initialize bridge device before populating children
fpga: bridge: fix kernel-doc parameter description
fpga: bridge: fix kernel-doc
edac: Remove the cortex cache edac driver
Revert "edac: Update device tree bindings for cortex_arm64"
drm: xlnx: hdmitx: Add HDCP1X support
dt-bindings: display: xlnx: hdmitx: Add HDCP1X key management support
drm: xlnx: hdcp: Add HDMI supportive HDCP1X functionalities
drm: xlnx: hdcp: Add HDMI supportive HDCP Secure hashing algorithm
staging: xilinx_hdcp: Remove unused XBYTES_PER_DIGIT #define
staging: xlnx_hdcp1x: Add HDMI supportive functionality
staging: xlnx_hdcp1x: Fix kernel-doc errors
firmware: xilinx: fix enum mismatch
Revert "uas: Add US_FL_NO_ATA_1X for linux tcm_usb_gadget"
Revert "serial: uartps: Fix stuck ISR if RX disabled with non-empty FIFO"
i2c: xiic: Correct return value check for xiic_reinit()
Revert "drivers: clk: zynqmp: Add versal-net compatible string"

1 files changed, 1 insertions, 1 deletions

diff --git a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2024.1.bb b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2024.1.bb
index 2a0dfe97..32d0d2b2 100644
--- a/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2024.1.bb
+++ b/meta-xilinx-core/recipes-kernel/linux/linux-xlnx_2024.1.bb
@@ -1,7 +1,7 @@
 LINUX_VERSION = "6.1.0"
 YOCTO_META ?= "git://git.yoctoproject.org/yocto-kernel-cache;type=kmeta;name=meta;branch=yocto-6.1;destsuffix=yocto-kmeta"
 KBRANCH="master"
-SRCREV = "c8b3583bc86352009c6ac61e2ced0e12118f8ebb"
+SRCREV = "8256ca0ce692402ad16cd35d26e7a31cc06d8215"
 SRCREV_meta = "185bcfcbe480c742247d9117011794c69682914f"
 
 KCONF_AUDIT_LEVEL="0"