diff options
| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-02-09 12:46:16 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2024-02-09 14:27:11 +0530 |
| commit | 5c40020118fdee113c312d108869234ae49e8c02 (patch) | |
| tree | 066cb2bdd72b1d378b7a18213ffd012b2f687531 | |
| parent | 1e22674ab5cd97ad411c0b88f5f6aa08105cd320 (diff) | |
| download | meta-xilinx-5c40020118fdee113c312d108869234ae49e8c02.tar.gz | |
qemu : Updated SRCREV for 2024.1_6439
remote-port: Fix full house check
versal: Add SERBS support on AFIFS for LPD & FPD
remote-port-memory-master: Implement timed response waits
versal: Add the SERBS interface
remote-port: Add timed wait for responses
versal: Add LPD & FPD interconnect config regs
hw/core: remove the dma-ctrl interface
hw: remove OSPI and DMA CSU legacy models
hw/ssi/xlnx-versal-ospi: align GPIO declaration with the legacy model
hw/dma/xlnx_csu_dma: add support for 128 bits CRC
hw/dma/xlnx_csu_dma: fix the dma-width property comment
hw/dma/xlnx_csu_dma: add support for unaligned accesses
hw/dma/xlnx_csu_dma: split endianness swapping logic in its own function
hw/dma/xlnx_csu_dma: split CRC computation in its own function
hw/dma/xlnx_csu_dma: change is-dst property default value to false
hw/dma/xlnx_csu_dma: add memattr and memattr-write legacy properties
hw/dma/xlnx_csu_dma: add legacy stream-connected-dma[01] properties
| -rw-r--r-- | meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2024.1.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2024.1.inc b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2024.1.inc index 378f1fdf..252b3372 100644 --- a/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2024.1.inc +++ b/meta-xilinx-core/recipes-devtools/qemu/qemu-xilinx-2024.1.inc | |||
| @@ -1,3 +1,3 @@ | |||
| 1 | XILINX_QEMU_VERSION = "v8.1.0" | 1 | XILINX_QEMU_VERSION = "v8.1.0" |
| 2 | BRANCH = "master" | 2 | BRANCH = "master" |
| 3 | SRCREV = "0b383fe2b61439655429f4d7a3bd79a8c82d6f66" | 3 | SRCREV = "0b57a0590b6da4b0f84f987ac559a6462321f27d" |
