Merge remote-tracking branch 'github/rel-v2023.2' into master-next

Signed-off-by: Mark Hatle <mark.hatle@amd.com>

6 files changed, 174 insertions, 4 deletions

diff --git a/meta-xilinx-core/classes/amd_spi_image.bbclass b/meta-xilinx-core/classes/amd_spi_image.bbclass
new file mode 100644
index 00000000..ed4c1f87
--- /dev/null
+++ b/meta-xilinx-core/classes/amd_spi_image.bbclass
@@ -0,0 +1,142 @@
+#
+# Copyright (C) 2023, Advanced Micro Devices, Inc.  All rights reserved.
+#
+# SPDX-License-Identifier: MIT
+#
+
+QSPI_SIZE ?= "0x2280000"
+
+# Register values
+IDN_REG ?= "0x4D554241"
+VERSION_REG ?= "0x1"
+LENGTH_REG ?= "0x4"
+PERSISTENT_REG ?= "0x01010000"
+
+# QSPI Offsets
+IMAGE_SELECTOR_OFFSET ?= "0x0"
+IMAGE_SELECTOR_BACKUP_OFFSET ?= "0x80000"
+PERSISTENT_REG_OFFSET ?= "0x100000"
+PERSISTENT_REG_BACKUP_OFFSET ?= "0x120000"
+IMAGE_A_OFFSET ?= "0x200000"
+IMAGE_A_IMGSEL_OFFSET ?= "0xF00000"
+IMAGE_B_OFFSET ?= "0xF80000"
+IMAGE_B_IMGSEL_OFFSET ?= "0x1C80000"
+IMAGE_RCVRY_OFFSET ?= "0x1E00000"
+IMAGE_RCVRY_BACKUP_OFFSET ?= "0x2000000"
+VERSION_OFFSET ?= "0x2240000"
+CHECKSUM_OFFSET ?= "0x2250000"
+
+def generate_spi_image(d):
+
+    import io
+    import hashlib
+    import time
+
+    qspi_size = int(d.getVar("QSPI_SIZE") or '0', 0)
+    int(d.getVar("QSPI_SIZE") or '0', 0)
+
+    # Register values
+    idn_reg = int(d.getVar("IDN_REG") or '0', 0)
+    version_reg = int(d.getVar("VERSION_REG") or '0', 0)
+    length_reg = int(d.getVar("LENGTH_REG") or '0', 0)
+    persistent_reg = int(d.getVar("PERSISTENT_REG") or '0', 0)
+
+    # QSPI Offsets
+    image_selector_offset = int(d.getVar("IMAGE_SELECTOR_OFFSET") or '0', 0)
+    image_selector_backup_offset = int(d.getVar("IMAGE_SELECTOR_BACKUP_OFFSET") or '0', 0)
+    persistent_reg_offset = int(d.getVar("PERSISTENT_REG_OFFSET") or '0', 0)
+    persistent_reg_backup_offset = int(d.getVar("PERSISTENT_REG_BACKUP_OFFSET") or '0', 0)
+    image_a_offset = int(d.getVar("IMAGE_A_OFFSET") or '0', 0)
+    image_a_imgsel_offset = int(d.getVar("IMAGE_A_IMGSEL_OFFSET") or '0', 0)
+    image_b_offset = int(d.getVar("IMAGE_B_OFFSET") or '0', 0)
+    image_b_imgsel_offset = int(d.getVar("IMAGE_B_IMGSEL_OFFSET") or '0', 0)
+    image_rcvry_offset = int(d.getVar("IMAGE_RCVRY_OFFSET") or '0', 0)
+    image_rcvry_backup_offset = int(d.getVar("IMAGE_RCVRY_BACKUP_OFFSET") or '0', 0)
+    version_offset = int(d.getVar("VERSION_OFFSET") or '0', 0)
+    checksum_offset = int(d.getVar("CHECKSUM_OFFSET") or '0', 0)
+
+    # QSPI data
+    qspi_data = io.BytesIO()
+    qspi_data.write(b'\xFF' * qspi_size)
+
+    # Image Selector - Primary, Backup, Image A and Image B
+    imgsel_file = d.getVar("DEPLOY_DIR_IMAGE")+"/imgsel-"+d.getVar("MACHINE")+".bin"
+    try:
+        with open(imgsel_file, "rb") as il:
+            imgsel = il.read(-1)
+    except OSError as err:
+        bb.fatal("Unable to open imgsel file: " + str(err))
+
+    qspi_data.seek(image_selector_offset)
+    qspi_data.write(imgsel)
+    qspi_data.seek(image_selector_backup_offset)
+    qspi_data.write(imgsel)
+    qspi_data.seek(image_a_imgsel_offset)
+    qspi_data.write(imgsel)
+    qspi_data.seek(image_b_imgsel_offset)
+    qspi_data.write(imgsel)
+
+    # Persistent Registers - Primary and Backup
+    p_reg = [idn_reg, version_reg, length_reg, persistent_reg, \
+            image_a_offset, image_b_offset, image_rcvry_offset]
+    checksum = 0xffffffff - (0xffffffff & sum(p_reg))
+    p_reg.insert(3, checksum)
+
+    qspi_data.seek(persistent_reg_offset)
+    for value in p_reg:
+        qspi_data.write(value.to_bytes(4, byteorder="little"))
+
+    qspi_data.seek(persistent_reg_backup_offset)
+    for value in p_reg:
+        qspi_data.write(value.to_bytes(4, byteorder="little"))
+
+    # Image A and B - boot.bin
+    try:
+        with open(d.getVar("DEPLOY_DIR_IMAGE")+"/boot.bin", "rb") as bo:
+            bootbin = bo.read(-1)
+    except OSError as err:
+        bb.fatal("Unable to open boot.bin file: " + str(err))
+
+    qspi_data.seek(image_a_offset)
+    qspi_data.write(bootbin)
+    qspi_data.seek(image_b_offset)
+    qspi_data.write(bootbin)
+
+    # Recovery Image & Recovery Image Backup
+    imgrcry_file = d.getVar("DEPLOY_DIR_IMAGE")+"/imgrcry-"+d.getVar("MACHINE")+".bin"
+    try:
+        with open(imgrcry_file, "rb") as iy:
+            imgrcry = iy.read(-1)
+    except OSError as err:
+        bb.fatal("Unable to open imgrcry file: " + str(err))
+
+    qspi_data.seek(image_rcvry_offset)
+    qspi_data.write(imgrcry)
+    qspi_data.seek(image_rcvry_backup_offset)
+    qspi_data.write(imgrcry)
+
+    # Version string and checksum
+    version = d.getVar("QSPI_IMAGE_VERSION")
+    date = time.strftime("%m%d%H%M")
+    machine = d.getVar("MACHINE")[:3]
+    image_name = d.getVar("QSPI_IMAGE_NAME")
+
+    qspi_version = f"{image_name}-{machine}-v{version}-{date}\x00"
+    qspi_data.seek(version_offset)
+    qspi_data.write(qspi_version.encode())
+
+    qspi_sha = hashlib.sha256(qspi_data.getbuffer())
+    qspi_data.seek(checksum_offset)
+    qspi_data.write(qspi_sha.digest())
+
+    # Write the QSPI data to file
+    with open(d.getVar("B") + "/" + d.getVar("IMAGE_NAME") + ".bin", "wb") as sq:
+        sq.write(qspi_data.getbuffer())
+
+do_compile[depends] += "virtual/boot-bin:do_deploy virtual/imgsel:do_deploy virtual/imgrcry:do_deploy"
+
+python amd_spi_image_do_compile() {
+    generate_spi_image(d)
+}
+
+EXPORT_FUNCTIONS do_compile
diff --git a/meta-xilinx-core/recipes-apps/image-update/image-update_1.0.bb b/meta-xilinx-core/recipes-apps/image-update/image-update_1.0.bb
new file mode 100644
index 00000000..8a707df4
--- /dev/null
+++ b/meta-xilinx-core/recipes-apps/image-update/image-update_1.0.bb
@@ -0,0 +1,28 @@
+DESCRIPTION = "Image update is used to update alternate images on compatible firmware."
+SUMMARY = "Image update is used to update alternate image on compatible firmware. \
+        If the current image is ImageA, ImageB will get updated and vice versa. \
+        Usage: image_update <Input Image File>"
+
+LICENSE = "MIT"
+LIC_FILES_CHKSUM = "file://${WORKDIR}/git/LICENSES/MIT;md5=2ac09a7a37dd6ee0ba23ce497d57d09b"
+
+BRANCH = "xlnx_rel_v2023.2"
+SRC_URI = "git://github.com/Xilinx/linux-image_update.git;branch=${BRANCH};protocol=https"
+SRCREV = "4f0b7b1b20933ddc454124fc3472f1b8894ddf08"
+
+RDEPENDS:${PN} += "freeipmi"
+
+S = "${WORKDIR}/git"
+
+COMPATIBLE_MACHINE = "^$"
+COMPATIBLE_MACHINE:zynqmp = "zynqmp"
+
+PACKAGE_ARCH:zynqmp = "${SOC_FAMILY_ARCH}"
+
+# Force the make system to use the flags we want!
+EXTRA_OEMAKE = 'CC="${CC} ${TARGET_CFLAGS} ${TARGET_LDFLAGS}" all'
+
+do_install () {
+    install -d ${D}${bindir}
+    install -m 0755 ${S}/image_update ${D}${bindir}/
+}
diff --git a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb
index 0d24c9fc..d09ab51e 100644
--- a/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb
+++ b/meta-xilinx-core/recipes-bsp/dfx-mgr/dfx-mgr_2023.2.bb
@@ -9,7 +9,7 @@ BRANCHARG = "${@['nobranch=1', 'branch=${BRANCH}'][d.getVar('BRANCH', True) != '
 SRC_URI = "${REPO};${BRANCHARG}"
 
 BRANCH = "xlnx_rel_v2023.2"
-SRCREV = "4dbd33accb043bd92ecbec2a3507f85a22045c51"
+SRCREV = "898fe38023d15d54402c788bcbca67a29eb2dc3d"
 SOMAJOR = "1"
 SOMINOR = "0"
 SOVERSION = "${SOMAJOR}.${SOMINOR}"
@@ -22,7 +22,7 @@ S = "${WORKDIR}/git"
 
 inherit cmake update-rc.d systemd
 
-DEPENDS += " libwebsockets inotify-tools libdfx zocl libdrm"
+DEPENDS += " libwebsockets inotify-tools libdfx zocl libdrm systemd"
 RDEPENDS:${PN} += " freeipmi"
 EXTRA_OECMAKE += " \
                -DCMAKE_SYSROOT:PATH=${RECIPE_SYSROOT} \
diff --git a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc
index 0cfbd846..0a813d69 100644
--- a/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc
+++ b/meta-xilinx-core/recipes-bsp/u-boot/u-boot-xlnx-2023.2.inc
@@ -2,7 +2,7 @@ UBOOT_VERSION = "v2023.01"
 
 UBRANCH = "xlnx_rebase_v2023.01"
 
-SRCREV = "0fc19cad5a07a09958443e7a5b6f11e420ef195c"
+SRCREV = "4da834fc7644b4124f7417e0e2789c7afcb40352"
 
 LICENSE = "GPL-2.0-or-later"
 LIC_FILES_CHKSUM = "file://README;beginline=1;endline=4;md5=744e7e3bb0c94b4b9f6b3db3bf893897"
diff --git a/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.1.bb b/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.1.bb
index 419dd681..419dd681 100755..100644
--- a/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.1.bb
+++ b/meta-xilinx-core/recipes-multimedia/vdu/vdu-firmware_2023.1.bb
diff --git a/meta-xilinx-core/recipes-support/freeipmi/freeipmi_1.6.10.bb b/meta-xilinx-core/recipes-support/freeipmi/freeipmi_1.6.10.bb
index a9d60465..db4f25b4 100644
--- a/meta-xilinx-core/recipes-support/freeipmi/freeipmi_1.6.10.bb
+++ b/meta-xilinx-core/recipes-support/freeipmi/freeipmi_1.6.10.bb
@@ -30,7 +30,7 @@ LIC_FILES_CHKSUM = " \
 
 BRANCH ?= "freeipmi-1-6-0-stable"
 SRC_URI = " \
-        git://git.savannah.gnu.org/freeipmi.git;iprotocol=https;branch=${BRANCH} \
+        git://git.savannah.gnu.org/git/freeipmi.git;protocol=https;branch=${BRANCH} \
         file://0001-Add-initial-support-for-Xilinx-OEM-FRU-records.patch \
         file://0002-ipmi-fru-fix-compilation-for-non-C99-compilation.patch \
         "