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| author | Sivaprasad Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-25 12:53:07 +0530 |
|---|---|---|
| committer | Siva Addepalli <sivaprasad.addepalli@xilinx.com> | 2023-09-25 13:47:24 +0530 |
| commit | ae34e7bcdad506013a1212609e55dadea0dfe150 (patch) | |
| tree | d5d8058d039ad7ac88155944f75d49214297d24f /.gitmodules | |
| parent | 55e94b3042398422a2034b1c3ed4db6472eb48bb (diff) | |
| download | meta-xilinx-ae34e7bcdad506013a1212609e55dadea0dfe150.tar.gz | |
linux-xlnx : Updated SRCREV for 2023.2_1715
net: macb: Set MDIO clock divisor for pclk higher than 160MHz
mtd: rawnand: arasan: Avoid overwriting valid data while checking for bitflips during HW-ECC read
Revert "mtd: rawnand: arasan: Use on-host ecc engine in hw-ecc mode"
Signed-off-by: Siva Addepalli <sivaprasad.addepalli@xilinx.com>
Diffstat (limited to '.gitmodules')
0 files changed, 0 insertions, 0 deletions