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| author | Djordje Senicic <x0157990@ti.com> | 2018-08-21 02:32:41 +0000 |
|---|---|---|
| committer | Denys Dmytriyenko <denys@ti.com> | 2018-08-21 17:09:41 +0000 |
| commit | 9b33394ac9377b402a494bbbbdb6cd7dfee3beee (patch) | |
| tree | 606c29827f4b1b56f32b4e95e780b923410b5b73 | |
| parent | 50cf6f09ebc7267ae529a0eaa14d1d29c08b54c9 (diff) | |
| download | meta-ti-9b33394ac9377b402a494bbbbdb6cd7dfee3beee.tar.gz | |
linux-ti-staging: Increase CMEM for am574x only
* CMEM increased to 384MB is required by TIDL to run both DSP and EVEs concurrently
Signed-off-by: Djordje Senicic <x0157990@ti.com>
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
| -rw-r--r-- | recipes-kernel/linux/cmem.inc | 1 | ||||
| -rw-r--r-- | recipes-kernel/linux/files/dra7xx/cmem-am574x.dtsi | 29 |
2 files changed, 30 insertions, 0 deletions
diff --git a/recipes-kernel/linux/cmem.inc b/recipes-kernel/linux/cmem.inc index 8325c00f..b17ca9dd 100644 --- a/recipes-kernel/linux/cmem.inc +++ b/recipes-kernel/linux/cmem.inc | |||
| @@ -10,6 +10,7 @@ CMEM_MACHINE_dra7xx-hs-evm = "dra71x dra72x dra74x" | |||
| 10 | # Set cmem.dtsi per machine or machine variant | 10 | # Set cmem.dtsi per machine or machine variant |
| 11 | CMEM_DTSI = "cmem.dtsi" | 11 | CMEM_DTSI = "cmem.dtsi" |
| 12 | CMEM_DTSI_am571x = "cmem-am571x.dtsi" | 12 | CMEM_DTSI_am571x = "cmem-am571x.dtsi" |
| 13 | CMEM_DTSI_am574x = "cmem-am574x.dtsi" | ||
| 13 | CMEM_DTSI_dra71x = "cmem-dra71x.dtsi" | 14 | CMEM_DTSI_dra71x = "cmem-dra71x.dtsi" |
| 14 | CMEM_DTSI_dra72x = "cmem-dra72x.dtsi" | 15 | CMEM_DTSI_dra72x = "cmem-dra72x.dtsi" |
| 15 | 16 | ||
diff --git a/recipes-kernel/linux/files/dra7xx/cmem-am574x.dtsi b/recipes-kernel/linux/files/dra7xx/cmem-am574x.dtsi new file mode 100644 index 00000000..9d207db5 --- /dev/null +++ b/recipes-kernel/linux/files/dra7xx/cmem-am574x.dtsi | |||
| @@ -0,0 +1,29 @@ | |||
| 1 | / { | ||
| 2 | reserved-memory { | ||
| 3 | #address-cells = <2>; | ||
| 4 | #size-cells = <2>; | ||
| 5 | ranges; | ||
| 6 | |||
| 7 | cmem_block_mem_0: cmem_block_mem@a0000000 { | ||
| 8 | reg = <0x0 0xa0000000 0x0 0x18000000>; | ||
| 9 | no-map; | ||
| 10 | status = "okay"; | ||
| 11 | }; | ||
| 12 | }; | ||
| 13 | |||
| 14 | cmem { | ||
| 15 | compatible = "ti,cmem"; | ||
| 16 | #address-cells = <1>; | ||
| 17 | #size-cells = <0>; | ||
| 18 | |||
| 19 | #pool-size-cells = <2>; | ||
| 20 | |||
| 21 | status = "okay"; | ||
| 22 | |||
| 23 | cmem_block_0: cmem_block@0 { | ||
| 24 | reg = <0>; | ||
| 25 | memory-region = <&cmem_block_mem_0>; | ||
| 26 | cmem-buf-pools = <1 0x0 0x18000000>; | ||
| 27 | }; | ||
| 28 | }; | ||
| 29 | }; | ||
