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| author | Wang Mingyu <wangmy@fujitsu.com> | 2025-03-25 17:01:50 +0800 |
|---|---|---|
| committer | Khem Raj <raj.khem@gmail.com> | 2025-03-25 14:57:20 -0700 |
| commit | aa4c35b421a74cb35375c3af04ba116f4322e431 (patch) | |
| tree | f01ce8fa415760b72716e4837e94fcf1be30e3fd /meta-oe/dynamic-layers | |
| parent | 471596836a4d0a242ddda7805c69877567dc8187 (diff) | |
| download | meta-openembedded-aa4c35b421a74cb35375c3af04ba116f4322e431.tar.gz | |
rasdaemon: upgrade 0.8.2 -> 0.8.3
Changelog:
===========
- fix checkpatch warnings
- Use the right dev_t decoding for diskerror handler
- Add new modules supported by HiSilicon common section
- Fix some static check warning
- Fix few compilation warnings in non standard hisilicon code
- Fix some compilation alarms in ras-record.h.
- ras-mc-ctl: Update logging of CXL memory module data to align with CXL spec rev 3.1
- ras-mc-ctl: Update logging of CXL DRAM event data to align with CXL spec rev 3.1
- ras-mc-ctl: Update logging of CXL general media event data to align with CXL spec rev 3.1
- ras-mc-ctl: Update logging of common event data to align with CXL spec rev 3.1
- ras-mc-ctl: Fix logging of memory event type in CXL DRAM error table
- cxl: Update memory module event to CXL spec rev 3.1
- cxl: Update CXL DRAM event to CXL spec rev 3.1
- cxl: Update CXL general media event to CXL spec rev 3.1
- cxl: Add Component Identifier formatting for CXL spec rev 3.1
- cxl: Update common event to CXL spec rev 3.1
- cxl: Add automatic indexing for storing CXL fields in SQLite database
- cxl: Fix mismatch in region field's name with kernel DRAM trace event
- cxl: Fix logging of memory event type of DRAM trace event
- Fix for parsing error when trace event's format file is larger than PAGE_SIZE
- Add page offline support for cxl memory
- for ASRock X370 Taichi
- for ASRock X570 Creator
- for ASRock X570S PG Riptide
- mce: decode io port for bus error
- arm: do not print error msg if field not found
- add DE error type for AMD
- Fix the display format of JaguarMicro vendor no standard errors
Signed-off-by: Wang Mingyu <wangmy@fujitsu.com>
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Diffstat (limited to 'meta-oe/dynamic-layers')
| -rw-r--r-- | meta-oe/dynamic-layers/perl-layer/recipes-support/rasdaemon/rasdaemon_0.8.3.bb (renamed from meta-oe/dynamic-layers/perl-layer/recipes-support/rasdaemon/rasdaemon_0.8.2.bb) | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/meta-oe/dynamic-layers/perl-layer/recipes-support/rasdaemon/rasdaemon_0.8.2.bb b/meta-oe/dynamic-layers/perl-layer/recipes-support/rasdaemon/rasdaemon_0.8.3.bb index 333d75a4f5..f21a3216af 100644 --- a/meta-oe/dynamic-layers/perl-layer/recipes-support/rasdaemon/rasdaemon_0.8.2.bb +++ b/meta-oe/dynamic-layers/perl-layer/recipes-support/rasdaemon/rasdaemon_0.8.3.bb | |||
| @@ -7,7 +7,7 @@ SRC_URI = "git://github.com/mchehab/rasdaemon.git;branch=master;protocol=https \ | |||
| 7 | file://rasdaemon.service \ | 7 | file://rasdaemon.service \ |
| 8 | file://init" | 8 | file://init" |
| 9 | 9 | ||
| 10 | SRCREV = "e6cc13e37a17843a2a82313928cd6deed9918649" | 10 | SRCREV = "db0870edd2919f4f4d0101843136bcae92ab0743" |
| 11 | 11 | ||
| 12 | S = "${WORKDIR}/git" | 12 | S = "${WORKDIR}/git" |
| 13 | 13 | ||
