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authorKhem Raj <raj.khem@gmail.com>2020-11-15 11:53:47 -0800
committerKhem Raj <raj.khem@gmail.com>2020-11-15 12:26:38 -0800
commitfbc28b50e9f38be2565c06c00ad2b3d9a74c8985 (patch)
tree6edd952e022477dbbbee554e9be2202930321d86
parent05d7f36548eab4fade0f0e202310027b8e4340ec (diff)
downloadmeta-openembedded-fbc28b50e9f38be2565c06c00ad2b3d9a74c8985.tar.gz
poco: Add riscv32 support
Signed-off-by: Khem Raj <raj.khem@gmail.com>
-rw-r--r--meta-oe/recipes-support/poco/poco/0001-Add-support-of-arch-riscv32.patch47
-rw-r--r--meta-oe/recipes-support/poco/poco_1.10.1.bb1
2 files changed, 48 insertions, 0 deletions
diff --git a/meta-oe/recipes-support/poco/poco/0001-Add-support-of-arch-riscv32.patch b/meta-oe/recipes-support/poco/poco/0001-Add-support-of-arch-riscv32.patch
new file mode 100644
index 0000000000..e6b673b11d
--- /dev/null
+++ b/meta-oe/recipes-support/poco/poco/0001-Add-support-of-arch-riscv32.patch
@@ -0,0 +1,47 @@
1From 98d277655e411f56fba705c0bf2efc6562c23807 Mon Sep 17 00:00:00 2001
2From: Khem Raj <raj.khem@gmail.com>
3Date: Sun, 15 Nov 2020 11:37:33 -0800
4Subject: [PATCH] Add support of arch riscv32
5
6Upstream-Status: Submitted [https://github.com/pocoproject/poco/pull/3138]
7Signed-off-by: Khem Raj <raj.khem@gmail.com>
8---
9 Foundation/include/Poco/Platform.h | 13 +++++++++----
10 1 file changed, 9 insertions(+), 4 deletions(-)
11
12diff --git a/Foundation/include/Poco/Platform.h b/Foundation/include/Poco/Platform.h
13index 799db417e..b8506a248 100644
14--- a/Foundation/include/Poco/Platform.h
15+++ b/Foundation/include/Poco/Platform.h
16@@ -135,6 +135,7 @@
17 #define POCO_ARCH_AARCH64 0x0f
18 #define POCO_ARCH_ARM64 0x0f // same as POCO_ARCH_AARCH64
19 #define POCO_ARCH_RISCV64 0x10
20+#define POCO_ARCH_RISCV32 0x11
21
22
23 #if defined(__ALPHA) || defined(__alpha) || defined(__alpha__) || defined(_M_ALPHA)
24@@ -225,12 +226,16 @@
25 #elif defined(__AARCH64EB__)
26 #define POCO_ARCH POCO_ARCH_AARCH64
27 #define POCO_ARCH_BIG_ENDIAN 1
28-#elif defined(__riscv) && (__riscv_xlen == 64)
29- #define POCO_ARCH POCO_ARCH_RISCV64
30- #define POCO_ARCH_LITTLE_ENDIAN 1
31+#elif defined(__riscv)
32+ #if (__riscv_xlen == 64)
33+ #define POCO_ARCH POCO_ARCH_RISCV64
34+ #define POCO_ARCH_LITTLE_ENDIAN 1
35+ #elif(__riscv_xlen == 32)
36+ #define POCO_ARCH POCO_ARCH_RISCV32
37+ #define POCO_ARCH_LITTLE_ENDIAN 1
38+ #endif
39 #endif
40
41-
42 #if defined(__clang__)
43 #define POCO_COMPILER_CLANG
44 #elif defined(_MSC_VER)
45--
462.29.2
47
diff --git a/meta-oe/recipes-support/poco/poco_1.10.1.bb b/meta-oe/recipes-support/poco/poco_1.10.1.bb
index 3f51e61187..48b31dd3f3 100644
--- a/meta-oe/recipes-support/poco/poco_1.10.1.bb
+++ b/meta-oe/recipes-support/poco/poco_1.10.1.bb
@@ -10,6 +10,7 @@ DEPENDS = "libpcre zlib"
10 10
11SRC_URI = " \ 11SRC_URI = " \
12 git://github.com/pocoproject/poco.git;branch=poco-${PV} \ 12 git://github.com/pocoproject/poco.git;branch=poco-${PV} \
13 file://0001-Add-support-of-arch-riscv32.patch \
13 file://run-ptest \ 14 file://run-ptest \
14 " 15 "
15SRCREV = "a3d827d80eb7f3329c58e73eb2906cb7ba829019" 16SRCREV = "a3d827d80eb7f3329c58e73eb2906cb7ba829019"