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authorAnuj Mittal <anuj.mittal@intel.com>2022-09-15 13:53:09 (GMT)
committerAnuj Mittal <anuj.mittal@intel.com>2022-09-19 07:19:13 (GMT)
commitad81baa4f5016f585e303cf373e347379368406c (patch)
tree55a5ead4c1a65f9a96483818113cef326e1c7d42
parent3b6b2b88255116ed993cfea5c03cfc46876d9e0a (diff)
downloadmeta-intel-ad81baa4f5016f585e303cf373e347379368406c.tar.gz
ispc: fix build with LLVM 15
Backport patches to fix build with LLVM 15 which is now the default version in meta-clang master. Signed-off-by: Anuj Mittal <anuj.mittal@intel.com>
-rw-r--r--dynamic-layers/clang-layer/recipes-core/ispc/ispc/6a1b2ffae0cc12467838bc671e3b089924de90a6.patch33
-rw-r--r--dynamic-layers/clang-layer/recipes-core/ispc/ispc/ec35a6f8e60ba77e59a6f2bfec27011e0ab34dda.patch63
-rw-r--r--dynamic-layers/clang-layer/recipes-core/ispc/ispc_1.18.0.bb2
3 files changed, 98 insertions, 0 deletions
diff --git a/dynamic-layers/clang-layer/recipes-core/ispc/ispc/6a1b2ffae0cc12467838bc671e3b089924de90a6.patch b/dynamic-layers/clang-layer/recipes-core/ispc/ispc/6a1b2ffae0cc12467838bc671e3b089924de90a6.patch
new file mode 100644
index 0000000..6aac0c7
--- /dev/null
+++ b/dynamic-layers/clang-layer/recipes-core/ispc/ispc/6a1b2ffae0cc12467838bc671e3b089924de90a6.patch
@@ -0,0 +1,33 @@
1From 6a1b2ffae0cc12467838bc671e3b089924de90a6 Mon Sep 17 00:00:00 2001
2From: Dmitry Babokin <dmitry.y.babokin@intel.com>
3Date: Thu, 5 May 2022 16:34:34 -0700
4Subject: [PATCH] Bump ISPC version v1.19.0dev
5
6Upstream-Status: Backport
7
8Include only the LLVM specific bits and not the ispc version bump.
9
10Signed-off-by: Anuj Mittal <anuj.mittal@intel.com>
11---
12diff --git a/src/ispc_version.h b/src/ispc_version.h
13index 0e28dfcfa..2b9d9b0cc 100644
14--- a/src/ispc_version.h
15+++ b/src/ispc_version.h
16@@ -51,7 +51,7 @@
17 #define ISPC_LLVM_15_0 150000
18
19 #define OLDEST_SUPPORTED_LLVM ISPC_LLVM_10_0
20-#define LATEST_SUPPORTED_LLVM ISPC_LLVM_14_0
21+#define LATEST_SUPPORTED_LLVM ISPC_LLVM_15_0
22
23 #ifdef __ispc__xstr
24 #undef __ispc__xstr
25@@ -63,7 +63,7 @@
26 __ispc__xstr(LLVM_VERSION_MAJOR) "." __ispc__xstr(LLVM_VERSION_MINOR) "." __ispc__xstr(LLVM_VERSION_PATCH)
27
28 #if ISPC_LLVM_VERSION < OLDEST_SUPPORTED_LLVM || ISPC_LLVM_VERSION > LATEST_SUPPORTED_LLVM
29-#error "Only LLVM 11.0 - 14.0 are supported"
30+#error "Only LLVM 11.0 - 14.0 and 15.0 development branch are supported"
31 #endif
32
33 #define ISPC_VERSION_STRING \
diff --git a/dynamic-layers/clang-layer/recipes-core/ispc/ispc/ec35a6f8e60ba77e59a6f2bfec27011e0ab34dda.patch b/dynamic-layers/clang-layer/recipes-core/ispc/ispc/ec35a6f8e60ba77e59a6f2bfec27011e0ab34dda.patch
new file mode 100644
index 0000000..a5ab8c1
--- /dev/null
+++ b/dynamic-layers/clang-layer/recipes-core/ispc/ispc/ec35a6f8e60ba77e59a6f2bfec27011e0ab34dda.patch
@@ -0,0 +1,63 @@
1From ec35a6f8e60ba77e59a6f2bfec27011e0ab34dda Mon Sep 17 00:00:00 2001
2From: Arina Neshlyaeva <arina.neshlyaeva@intel.com>
3Date: Tue, 23 Aug 2022 15:21:50 -0700
4Subject: [PATCH] Adjust opt passes for LLVM 15
5
6Upstream-Status: Backport
7Signed-off-by: Anuj Mittal <anuj.mittal@intel.com>
8---
9 src/opt.cpp | 17 +++++++++++++++++
10 1 file changed, 17 insertions(+)
11
12diff --git a/src/opt.cpp b/src/opt.cpp
13index 910821e26..86219f384 100644
14--- a/src/opt.cpp
15+++ b/src/opt.cpp
16@@ -84,6 +84,9 @@
17 #include <llvm/Transforms/Scalar.h>
18 #include <llvm/Transforms/Scalar/GVN.h>
19 #include <llvm/Transforms/Scalar/InstSimplifyPass.h>
20+#if ISPC_LLVM_VERSION >= ISPC_LLVM_15_0
21+#include <llvm/Transforms/Scalar/SimpleLoopUnswitch.h>
22+#endif
23 #include <llvm/Transforms/Utils.h>
24 #include <llvm/Transforms/Utils/BasicBlockUtils.h>
25
26@@ -647,7 +650,11 @@ void ispc::Optimize(llvm::Module *module, int optLevel) {
27 optPM.add(llvm::createCFGSimplificationPass());
28 #endif
29
30+#if ISPC_LLVM_VERSION < ISPC_LLVM_15_0
31+ // Starting LLVM 15.0 this pass is supported with new pass manager only (217e857)
32+ // TODO: switch ISPC to new pass manager: https://github.com/ispc/ispc/issues/2359
33 optPM.add(llvm::createArgumentPromotionPass());
34+#endif
35
36 optPM.add(llvm::createAggressiveDCEPass());
37 optPM.add(llvm::createInstructionCombiningPass(), 241);
38@@ -722,7 +729,11 @@ void ispc::Optimize(llvm::Module *module, int optLevel) {
39 optPM.add(CreateInstructionSimplifyPass());
40
41 optPM.add(llvm::createFunctionInliningPass());
42+#if ISPC_LLVM_VERSION < ISPC_LLVM_15_0
43+ // Starting LLVM 15.0 this pass is supported with new pass manager only (217e857)
44+ // TODO: switch ISPC to new pass manager: https://github.com/ispc/ispc/issues/2359
45 optPM.add(llvm::createArgumentPromotionPass());
46+#endif
47
48 optPM.add(llvm::createSROAPass());
49
50@@ -736,7 +747,13 @@ void ispc::Optimize(llvm::Module *module, int optLevel) {
51 optPM.add(llvm::createReassociatePass());
52 optPM.add(llvm::createLoopRotatePass());
53 optPM.add(llvm::createLICMPass());
54+ // Loop unswitch pass was removed in LLVM 15.0 (fb4113).
55+ // Recommended replacement: createSimpleLoopUnswitchLegacyPass
56+#if ISPC_LLVM_VERSION < ISPC_LLVM_15_0
57 optPM.add(llvm::createLoopUnswitchPass(false));
58+#else
59+ optPM.add(llvm::createSimpleLoopUnswitchLegacyPass(false));
60+#endif
61 optPM.add(llvm::createInstructionCombiningPass());
62 optPM.add(CreateInstructionSimplifyPass());
63 optPM.add(llvm::createIndVarSimplifyPass());
diff --git a/dynamic-layers/clang-layer/recipes-core/ispc/ispc_1.18.0.bb b/dynamic-layers/clang-layer/recipes-core/ispc/ispc_1.18.0.bb
index db67417..24b0988 100644
--- a/dynamic-layers/clang-layer/recipes-core/ispc/ispc_1.18.0.bb
+++ b/dynamic-layers/clang-layer/recipes-core/ispc/ispc_1.18.0.bb
@@ -15,6 +15,8 @@ SRC_URI = "git://github.com/ispc/ispc.git;protocol=https;branch=main \
15 file://0001-CMakeLists.txt-link-with-libclang-cpp-library-instea.patch \ 15 file://0001-CMakeLists.txt-link-with-libclang-cpp-library-instea.patch \
16 file://0002-cmake-don-t-build-for-32-bit-targets.patch \ 16 file://0002-cmake-don-t-build-for-32-bit-targets.patch \
17 file://0001-Fix-QA-Issues.patch \ 17 file://0001-Fix-QA-Issues.patch \
18 file://6a1b2ffae0cc12467838bc671e3b089924de90a6.patch \
19 file://ec35a6f8e60ba77e59a6f2bfec27011e0ab34dda.patch \
18 " 20 "
19SRCREV = "f7ec3aa173c816377c215d83196b5c7c3a88db1c" 21SRCREV = "f7ec3aa173c816377c215d83196b5c7c3a88db1c"
20 22