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| author | Adrian Calianu <adrian.calianu@enea.com> | 2017-09-27 10:37:36 +0200 |
|---|---|---|
| committer | Adrian Calianu <adrian.calianu@enea.com> | 2017-09-27 10:37:36 +0200 |
| commit | ad4d4e5cbad3ad875eaa59e0a919c014dfb6a39e (patch) | |
| tree | 9f4ec55e714e2be67dab4b775775b704af454f74 /patches/boot_time_opt_guest/0109-perf.patch | |
| parent | 7579efbdb49529f36652b69d4630c6c43907f77b (diff) | |
| download | enea-kernel-cache-ad4d4e5cbad3ad875eaa59e0a919c014dfb6a39e.tar.gz | |
add guest features from yocto branch
Signed-off-by: Adrian Calianu <adrian.calianu@enea.com>
Diffstat (limited to 'patches/boot_time_opt_guest/0109-perf.patch')
| -rw-r--r-- | patches/boot_time_opt_guest/0109-perf.patch | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/patches/boot_time_opt_guest/0109-perf.patch b/patches/boot_time_opt_guest/0109-perf.patch new file mode 100644 index 0000000..75f50f6 --- /dev/null +++ b/patches/boot_time_opt_guest/0109-perf.patch | |||
| @@ -0,0 +1,28 @@ | |||
| 1 | From cce700dfbd5fdbf72b96e6479ca539ab4d880ce2 Mon Sep 17 00:00:00 2001 | ||
| 2 | From: Arjan van de Ven <arjan@linux.intel.com> | ||
| 3 | Date: Wed, 4 Nov 2015 15:17:10 -0600 | ||
| 4 | Subject: [PATCH 109/114] perf | ||
| 5 | |||
| 6 | Author: Arjan van de Ven <arjan@linux.intel.com> | ||
| 7 | |||
| 8 | Signed-off-by: Miguel Bernal Marin <miguel.bernal.marin@linux.intel.com> | ||
| 9 | --- | ||
| 10 | arch/x86/events/intel/core.c | 2 +- | ||
| 11 | 1 file changed, 1 insertion(+), 1 deletion(-) | ||
| 12 | |||
| 13 | diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c | ||
| 14 | index eb1484c86bb4..c13ea26ac066 100644 | ||
| 15 | --- a/arch/x86/events/intel/core.c | ||
| 16 | +++ b/arch/x86/events/intel/core.c | ||
| 17 | @@ -4040,7 +4040,7 @@ __init int intel_pmu_init(void) | ||
| 18 | */ | ||
| 19 | if (x86_pmu.extra_regs) { | ||
| 20 | for (er = x86_pmu.extra_regs; er->msr; er++) { | ||
| 21 | - er->extra_msr_access = check_msr(er->msr, 0x11UL); | ||
| 22 | + er->extra_msr_access = false; | ||
| 23 | /* Disable LBR select mapping */ | ||
| 24 | if ((er->idx == EXTRA_REG_LBR) && !er->extra_msr_access) | ||
| 25 | x86_pmu.lbr_sel_map = NULL; | ||
| 26 | -- | ||
| 27 | 2.11.1 | ||
| 28 | |||
