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Dexuan Cui <dexuan.cui@intel.com>: I got the following patch from lttng dev
mailing list:
http://lists.casi.polymtl.ca/pipermail/ltt-dev/2011-February/003903.html
The patch looks good and I think it would be in next release. At present,
let's add it into SRC_URI.
-----------------------------------------------------------------
The PPC version of the trace_clock_read64 was using the TB register
which is not constant accross implementations. The currently
measured time base on PPC was not accurate.
So, for now, we rely on the CLOCK_MONOTONIC.
This patch remove a bunch of #ifdef for x86 and PPC, since we now rely on
the same base clock. It also fix the build on PPC that was currently broken
Signed-off-by: Yannick Brosseau <yannick.brosseau@gmail.com>
-----------------------------------------------------------------
--- a/include/ust/clock.h
+++ b/include/ust/clock.h
@@ -39,7 +39,6 @@
precision and monotonicity.
*/
-#if __i386__ || __x86_64__
/* Only available for x86 arch */
#define CLOCK_TRACE_FREQ 14
#define CLOCK_TRACE 15
@@ -47,36 +46,10 @@
struct timespec ts;
u64 lttng_ts;
};
-#endif /* __i386__ || __x86_64__ */
extern int ust_clock_source;
/* Choosing correct trace clock */
-#if __PPC__
-static __inline__ u64 trace_clock_read64(void)
-{
- unsigned long tb_l;
- unsigned long tb_h;
- unsigned long tb_h2;
- u64 tb;
-
- __asm__ (
- "1:\n\t"
- "mftbu %[rhigh]\n\t"
- "mftb %[rlow]\n\t"
- "mftbu %[rhigh2]\n\t"
- "cmpw %[rhigh],%[rhigh2]\n\t"
- "bne 1b\n\t"
- : [rhigh] "=r" (tb_h), [rhigh2] "=r" (tb_h2), [rlow] "=r" (tb_l));
-
- tb = tb_h;
- tb <<= 32;
- tb |= tb_l;
-
- return tb;
-}
-
-#else /* !__PPC__ */
static __inline__ u64 trace_clock_read64(void)
{
@@ -101,17 +74,17 @@
return retval;
}
-#endif /* __PPC__ */
-
static __inline__ u64 trace_clock_frequency(void)
{
struct timespec ts;
union lttng_timespec *lts = (union lttng_timespec *) &ts;
+#if __i386__ || __x86_64__
if (likely(ust_clock_source == CLOCK_TRACE)) {
clock_gettime(CLOCK_TRACE_FREQ, &ts);
return lts->lttng_ts;
}
+#endif
return 1000000000LL;
}
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