| Commit message (Collapse) | Author | Age | Files | Lines |
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This causes the default timeout to be set to infinity, it will still report out
every 5000 milliseconds
(From OE-Core rev: fd9e1ba8f70402bd3c4b873d349057f96f5bcb19)
Signed-off-by: Saul Wold <sgw@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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All qemu boards should be able to boot by runqemu.
(From OE-Core rev: 5174889d59a5d6da29b4290376010dd176767e1f)
Signed-off-by: Robert Yang <liezhi.yang@windriver.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Add qemuboot-mips.inc to reduce duplicated code, the various mips bsps
which can be boot by runqemu can require qemuboot-mips.inc
(From OE-Core rev: cb28128477e98ed7dc7a90dd197f6dd04cf75be0)
Signed-off-by: Robert Yang <liezhi.yang@windriver.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Add qemuboot-x86.inc to reduce duplicated code, the x86/x86_64 bsps
which can be boot by runqemu can require qemuboot-x86.inc.
(From OE-Core rev: b5ff3dda2a576ba7e5d68198ea6c6eb49cf80eb8)
Signed-off-by: Robert Yang <liezhi.yang@windriver.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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QEMU usermode doesn't support n32 binaries, erroring with "Invalid
ELF image for this architecture".
(From OE-Core rev: 66aa39a959bd41f7063fe64a9225eb9fd6c3293b)
Signed-off-by: Alexander Kanavin <alexander.kanavin@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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The core emulated by default by qemu-mips(el) just crashes with
illegal instruction when encountering DSP and/or MIPS16e
instructions - we have to specify a CPU that supports the extra
instructions.
This is an issue when generating a rootfs and e.g. running some
of the package postinstall scriptlets.
The patch to qemu to add 24KEc as a CPU has been accepted
upstream, so let's use that CPU here as well as needed.
(From OE-Core rev: 8af17075f56241dd8f3ea86c609adbd73f248218)
Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Currently the -mcpu parameter is not passed to cross gcc when assembling
kernel .S file, the implicit -mcpu option that defaults to the latest
server cpu might casuse incorrect assembling.
A existent case is that wait instruction of ppce500mc is incorrectly assembled
to power9 version with default -mcpu setting, accordingly kernel boot calltrace
happend when wait instruction is executed on ppce500mc targets.
(From OE-Core rev: b17f91ed06a604e3d356fe17756bfe2ca61594b7)
Signed-off-by: Zhenhua Luo <zhenhua.luo@nxp.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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- add 24kc big and little endian, which is based on mips32r2 w/o FPU
- add 24kec which is 24kc + DSP
- both can have the MIPS16e ASE enabled in their tunes
(From OE-Core rev: cccd8b09523d8f0c1df97d08181737681db13f37)
Signed-off-by: André Draszik <adraszik@tycoint.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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The MIPS16e instruction set still has to be enabled by setting
MIPS_INSTRUCTION_SET = 'mips16e'
in e.g. distro.conf and can be disabled on a per-recipe basis as
needed.
This is a similar approach as is available on ARM for Thumb support.
Note that contrary to the ARM Thumb support in OE, we do add a new
OVERRIDE (mips16e), as there are some recipes in OE that need to be
compiled slightly differently if mips16e mode is requested.
(From OE-Core rev: e9d8b02a42eb08802e202770409cb5378b79b281)
Signed-off-by: André Draszik <adraszik@tycoint.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Since commit 972b4fc (feature-arm-neon.inc: restore vfpv3-d16 support)
we're replacing _all_ dashes (-) in ARMPKGSFX_FPU, which is causing
problems for all legitimate uses of the dash as TUNE_PKGARCH doesn't
have the right value anymore:
E.g. on raspberrypi2:
ERROR: OE-core's config sanity checker detected a potential misconfiguration.
Either fix the cause of this error or at your own risk disable the checker (see sanity.conf).
Following is the list of potential problems / advisories:
Error, the PACKAGE_ARCHS variable (all any noarch armv5hf-vfp armv5thf-vfp
armv5ehf-vfp armv5tehf-vfp armv6hf-vfp armv6thf-vfp armv7ahf-vfp
armv7at2hf-vfp armv7vehf-vfp armv7vet2hf-vfp armv7vehf-neon armv7vet2hf-neon
armv7vehf-neon-vfpv4 armv7vet2hf-neon-vfpv4 cortexa7hf-vfp cortexa7hf-neon
cortexa7hf-neon-vfpv4 cortexa7t2hf-vfp cortexa7t2hf-neon
cortexa7t2hf-neon-vfpv4 raspberrypi3) for DEFAULTTUNE (cortexa7thf-neon-vfpv4)
does not contain TUNE_PKGARCH (cortexa7hf-neonvfpv4).
Fix this by being more explicit about what we're modifying.
Reported-by: Khem Raj <raj.khem@gmail.com>
(From OE-Core rev: cf82db2ba732031f392760e4f363e8b608e6fae3)
Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Commit 6661718 (feature-arm-{neon,vfp}.inc: refactor and fix issues)
effectively changed the gcc -mfpu= option from -mfpu=vfpv3-d16 to
-mfpu=vfpv3d16, which gcc doesn't understand.
Restore the original value.
After doing that, we also need to adjust ARMPKGSFX_FPU which should
contain the same value without dash '-' as it is used that way
throughout.
(From OE-Core rev: 972b4fc459258572eeaad8af91e48ee9f0acade7)
Signed-off-by: André Draszik <git@andred.net>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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(From OE-Core rev: 739da8b205067588419303ec2bbb1d92a82cdae9)
Signed-off-by: André Draszik <adraszik@tycoint.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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It simply does not work at all:
https://lists.yoctoproject.org/pipermail/yocto/2016-April/029698.html
(From OE-Core rev: d044743cdc415745e68f3e26a3a7e2c94caecd93)
Signed-off-by: Alexander Kanavin <alexander.kanavin@linux.intel.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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armv7a is a subset of armv7ve:
https://gcc.gnu.org/onlinedocs/gcc/ARM-Options.html
-march=armv7ve is the armv7-a architecture with virtualization extensions.
By inheriting armv7a from armv7ve it's possible for e.g. Cortex-A15 machines
to include tune-cortexa15.inc and have a full range of optimizations, but
set DEFAULTTUNE as "armv7a" to produce binaries compatible with Cortex-A8
machines, etc.
(From OE-Core rev: 5bf5e68e540dc4e034288702094d306ebd19fef9)
Signed-off-by: Denys Dmytriyenko <denys@ti.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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'qemu-usermode'
The new value is more general and better reflects what having the feature really means.
Introspection data, then, is built only if 'gobject-introspection-data' is in
DISTRO_FEATURES and 'qemu-usermode' is in MACHINE_FEATURES.
(From OE-Core rev: 9927a3d72e2272d8e3dc4785ba02e27802ee1c6c)
Signed-off-by: Alexander Kanavin <alexander.kanavin@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Use latest 4.x kernel instead of 3.x version
(From OE-Core rev: 138a03308fb24936466beb082b350d872ad423a6)
Signed-off-by: Maxin B. John <maxin.john@intel.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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When enabling tune for arm926ejs, poky optionally appends suffixes for
thumb and dsp support. Since sometimes arm926ejse (ARM code) and sometime
arm926ejste (thumb code) is used in PACKAGE_ARCH, allow both.
(From OE-Core rev: dbd7fd1cbbc3e7003a48542642acdc80dca3f514)
Signed-off-by: Jens Rehsack <sno@netbsd.org>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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x32 isn't supported by user mode qemu so we can't build
gobject-introspection-data, so disable it in this case.
(From OE-Core rev: 4ee1eb8ddd3fbe144fbaeb32e07b66e191aa7548)
(From OE-Core rev: 04ecebd4a79f80c5bb054a8b21df6f555631ed8b)
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
Signed-off-by: Alexander Kanavin <alexander.kanavin@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Change the name to core2-32 from core2.
There's no AVAILTUNES with the name core2. Make sure that we specify
the correct TUNE name so PACKAGE_EXTRA_ARCHS is expanded correctly.
[ YOCTO #9197 ]
(From OE-Core rev: 0903d6f0098f112d4263812df109e0c44c166db8)
Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com>
Signed-off-by: Anuj Mittal <anujx.mittal@intel.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Apply the same sort of changes to the Cortex-A17 tune as were done in commit
35392025f3236f5e5393f9cf0857732da9a2e503.
(From OE-Core rev: fb981f1a5be2277ae4966527fdebe196022d3826)
Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Fix the quotes in the bb.utils.contains feature check so that the call
results in a boolean value instead of a string, which allows the warning
check to occur.
(From OE-Core rev: aac3919f538a5608ffcc3af5bd8f121e3c2c3469)
Signed-off-by: Nathan Rossi <nathan@nathanrossi.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Define tunnings to enable 32 register VFPv3 for cortexa9 processor cores
More details: http://www.arm.com/products/processors/technologies/vector-floating-point.php
(From OE-Core rev: d9635cc96ad1ddeb944bba375b5b55149867966c)
Signed-off-by: Richard Tollerton <rich.tollerton@ni.com>
Signed-off-by: Ioan-Adrian Ratiu <adrian.ratiu@ni.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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This patch adds rng-tools to MACHINE_EXTRA_RRECOMMENDS so that can be
used to provide the additional entropy to prevent hangs in getrandom()
for qemu images
[YOCTO #8681]
[YOCTO #8816]
(From OE-Core rev: cb512c0c189f5a1196da233042113a708243daa0)
Signed-off-by: Saul Wold <sgw@linux.intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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If tune-corei7 is in use then the target binaries may contain instructions that
qemu-x86-64 can't execute by default, resulting in errors on rootfs construction:
NOTE: Running intercept scripts:
NOTE: > Executing update_font_cache intercept ...
qemu: uncaught target signal 4 (Illegal instruction) - core dumped
In this case the instruction is popcnt, part of SSE4.2, so tell Qemu to emulate
the CPU that the tune targets (in this case, Nehalem). Also pass check=false as
the Nehalem machine supports VME but user-space qemu doesn't, which produces a
warning unless CPUID checking is disabled.
[ YOCTO #8888 ]
(From OE-Core rev: fef106b9b97ec48bad2b9a084357b884f653d6c8)
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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The Cortex M1, M3 and R4 CPU tuning files are poorly tested (if at
all). They have no obvious users either inside or outside oe-core.
Until OE officially gains support for CPUs without an MMU, these
tuning files are probably better maintained outside of oe-core (e.g.
in a separate meta-nommu layer).
(From OE-Core rev: 7a1445c55de904115b950c8e50432a9f11f02208)
Signed-off-by: Andre McCurdy <armccurdy@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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G4 does not have SPE, so we make that explicit in the tune files and
since we emulate G4 when building Qemu, we ensure it for qemuppc as
well.
GCC config for powerpc-linux is made to include SPE by default which is
equivalent if the tripet was powerpc-linux*spe, this forces gcc to
configure assembler to enable -mspe by default, when we do that then the
kernel fails to compile with binutils 2.26, since newer assembler is
smart to detect the tlbia instructions are not compatible with SPE and
hence the kernel build breaks rightly. We configure the kernel for G4 as
well where it enables tlbia instrucitons rightly so because it thinks
its being configured for power4. So we keep the options but do not force
-mspe down to assembler as default.
(From OE-Core rev: 7a51776a830167e43cbd185505f62f328704e271)
Signed-off-by: Khem Raj <raj.khem@gmail.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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* since:
commit cffda9a821a3b83a8529d643c567859e091c6846
Author: Martin Jansa <Martin.Jansa@gmail.com>
Date: Tue Sep 11 17:05:45 2012 +0000
arch-arm: define different ARMPKGARCH when different CCARGS are used
we don't need to worry about e.g. cortexa7 device upgrading
binary package from armv7a feed which would be built with
-mcpu=cortexa15, so we can use -mcpu instead of -mtune, because
we won't share the binary feed with MACHINEs built with different
tune.
(From OE-Core rev: f7bb2d4cf18ca8d2a90b4b3b5c6c48dad106ca28)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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cortexa15
* be aware that this -march value is available only in gcc-4.9 and
newer:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=57907
* -mcpu=cortex15 and -mcpu=cortexa7 conflict with -march=armv7a
We either have to stop putting -march in default CCARGS or at
least set it compatible one like this patch does.
(From OE-Core rev: 35392025f3236f5e5393f9cf0857732da9a2e503)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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* it was added only to hf cortexa7 in:
commit e97d152ca13556b41a236c1a4cfb11e77ff857d7
Author: Kristof Robot <krirobo@gmail.com>
Date: Sun Jan 26 10:03:56 2014 +0100
Add Cortex A7 support for NEONv2 & FPv4
* add it to softfp cortexa7 and both versions for cortexa15 and
cortexa17 tunes
(From OE-Core rev: 109c26d99b6324c1412f440fef85f090518f6da0)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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* add TUNE_CCARGS_MFLOAT variable which is used to set -mfloat-abi
parameter as well as ARMPKGSFX_EABI suffix in TUNE_PKGARCH and
TARGET_FPU
* TARGET_FPU was using ARMPKGSFX_FPU, but in most cases we use it
only to distinguish between hard and soft abi, not various -mfpu
variants which can appear in ARMPKGSFX_FPU
(From OE-Core rev: 10bece310ca6e0bbae28665f873f907d751d1057)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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* respect all 4 vfp options ('vfp', 'vfpv3d16', 'vfpv3', 'vfpv4') when
setting -mfloat-abi and ARMPKGSFX_EABI, without this change it wasn't
possible to use call-convention hard together with vfpv4
* move 'vfpv3d16', 'vfpv3', 'vfpv4' support from
feature-arm-vfp.inc
to
feature-arm-neon.inc
the main difference is that feature-arm-vfp.inc is included in
arch-armv5.inc while feature-arm-neon.inc only in armv7*.inc, so
these options should be added to TUNEVALID also only for armv7*
MACHINEs.
* support vfpv4 with or without neon
when both vfpv4 and neon are in TUNE_FEATURES we want to set only one
-mfpu parameter and to neon-vfpv4
* prevent multiple appends to ARMPKGSFX_FPU, we don't want to include
e.g. -vfp as well as -vfpv4 when both "vfp" and "vfpv4" are in
TUNE_FEATURES
* add -mfpu=vfp for tunes with "vfp" in TUNE_FEATURES - before that we
were only adding -vfp to ARMPKGSFX_FPU
* add TUNE_CCARGS_MFPU variable which is used to set -mfpu parameter as
well as ARMPKGSFX_FPU suffix in TUNE_PKGARCH, all enabled values are
appended to it based on TUNE_FEATURES and then the last one is used
in the actual param and suffix
* this prevents multiple -mfpu options in TUNE_CCARGS
* !!!
This means we need to change TUNE_PKGARCH and PACKAGE_EXTRA_ARCHS for
vfpv4, vfpv3d16, vfpv3 tunes, because the -vfp* isn't prependend
multiple times. If you're using one of these new DEFAULTTUNES (which
were at least partially broken anyway) and depend on working binary
package feed upgrade-path, then don't forget to migrate PR service
database to new TUNE_PKGARCH.
(From OE-Core rev: 6661718158f8fdcdf63b0d48e8fe72d3ac4778f2)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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(From OE-Core rev: b4e90a15e6b1e5639b2039adeae26f2c780a7864)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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tune-armv7atb-vfpv3d16, cortexa7thf-neon-vfpv4
(From OE-Core rev: 8c12a71e41fb53a014b8357ae9b30bfd422f86ec)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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PACKAGE_EXTRA_ARCHS_tune-armv5tehf-vfp
* both belong and already are in arch-armv5-dsp.inc
(From OE-Core rev: 791f52d3b58ce1fd4bfd159deb83a1917d6267f2)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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(From OE-Core rev: 5e685647733294315e6c2ce76733c9b9a5ee554b)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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powerpac/arch-powerpc64.inc: Use normal assignment
* some tunes were using weak assignment for TUNE_FEATURES, unify
all tunes to use normal assignment so it behaves consistently
(From OE-Core rev: 0a52bd3ed23e66200401d0836aad783095e7c7a0)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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* indent the assignments, so that it's easier to see the algoritm how these
values are modified and do less errors, see fixes in next commit
(From OE-Core rev: f774b44fa007a2a756ada892ede832b1251d940c)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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* the section bellow the comment adds only HF variants, VFP is already
mixed in the softfp sections above (unlike armv5, armv6 tune files
where it really was above VFP/DSP section)
(From OE-Core rev: 0c60d744f6ec3b77f044ac7d66e30c00d00fea81)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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(From OE-Core rev: e4502063aae68b8dc31160fb418c74e4f0412cb6)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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* PACKAGE_ARCHS were missing TUNE_PKGARCH armv7rt2-vfp because thumb is enabled
in TUNE_FEATURES
(From OE-Core rev: 51a99e28d0d15e227fc05f43974f54f6d8e62ef5)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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(From OE-Core rev: 3911fcb1504f435409501544c908c1704a6fc7b9)
Signed-off-by: Andre McCurdy <armccurdy@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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(From OE-Core rev: ed60460459e746ca91b8884526cdb1fc6a3fd640)
Signed-off-by: Andre McCurdy <armccurdy@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Interworking is required for ARM EABI, so attempting to disable it
via a tuning feature no longer makes sense (support for ARM OABI was
deprecated in gcc 4.7). We can drop '-mthumb-interwork' from
TUNE_CCARGS for the same reason.
(From OE-Core rev: d942f94de8966c839209e8c9a632351d108852c4)
Signed-off-by: Andre McCurdy <armccurdy@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Bitbake over-rides for _thumb and _thumb-interwork are undocumented
and are not used anywhere in oe-core or meta-oe. The logic setting up
the thumb-interwork over-ride even seems to be reversed and nobody
noticed, so it seems safe to assume that these over-rides are not
used.
(From OE-Core rev: 351443d71eb246a946b41f12b54d57b36fe1574e)
Signed-off-by: Andre McCurdy <armccurdy@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Comments are old and specific to thumb1. Since oe-core CPU tuning
files aren't really the right place to fully document ARM -vs- thumb,
drop the comments instead of trying to update them.
(From OE-Core rev: 06225600d4d3041da0d28c79058e5b8ceb4874bf)
Signed-off-by: Andre McCurdy <armccurdy@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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(From OE-Core rev: 924ccf202a6d89de32fc34a140bf9e35e8e43b4e)
Signed-off-by: Martin Jansa <Martin.Jansa@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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* The Xorg server needs to load the GLX extension in order to
enable proper OpenGL support.
* Before this patch, glxinfo aborted with:
root@qemux86:~# glxinfo
name of display: :0.0
Error: couldn't find RGB GLX visual or fbconfig
* After this patch, it works as expected:
root@qemux86:~# glxinfo | grep " render"
direct rendering: Yes
OpenGL renderer string: Software Rasterizer
(From OE-Core rev: 8f33627684755899c5b1fd7eeefdd89c42e68fec)
Signed-off-by: Carlos Alberto Lopez Perez <clopez@igalia.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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changed upper case "X" to lower case "x"
(From OE-Core rev: ff8bf4907ff3b1a9c479fe158c31607da07f9b55)
Signed-off-by: Armin Kuster <akuster@mvista.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Provide BASE_LIB settings for octeon* tunes that follow the practice of
mips64/mips64-n32 tunes (lib64 for N64 ABI, lib32 for N32 ABI).
(From OE-Core rev: 2b52312174e52886b0a978ece41f66b4fb455604)
(From OE-Core rev: 9531dbe2106d5ba5a9e7d66b3c640a98e4fb6ec4)
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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Octeon II/III binaries can contain instructions that are not compatible
with MIPS64 processors. Thus Octeon II/III packages should go to
separate directories. Set MIPSPKGSFX_VARIANT_tune-* to Octeon-specific
values and update PACKAGE_EXTRA_ARCHS_tune-* accordingly.
(From OE-Core rev: 69798449a8c1049728674dd352cf828063974cd0)
(From OE-Core rev: 3f16f76868105aae7c82ae33831d3317903b58ac)
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Ross Burton <ross.burton@intel.com>
Signed-off-by: Richard Purdie <richard.purdie@linuxfoundation.org>
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