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-rw-r--r--meta/recipes-devtools/gcc/gcc/0002-CVE-2021-35465.patch39
1 files changed, 0 insertions, 39 deletions
diff --git a/meta/recipes-devtools/gcc/gcc/0002-CVE-2021-35465.patch b/meta/recipes-devtools/gcc/gcc/0002-CVE-2021-35465.patch
deleted file mode 100644
index e09818fecf..0000000000
--- a/meta/recipes-devtools/gcc/gcc/0002-CVE-2021-35465.patch
+++ /dev/null
@@ -1,39 +0,0 @@
1From 574e7950bd6b34e9e2cacce18c802b45505d1d0a Mon Sep 17 00:00:00 2001
2From: Richard Earnshaw <rearnsha@arm.com>
3Date: Fri, 18 Jun 2021 17:16:25 +0100
4Subject: [PATCH] arm: add erratum mitigation to __gnu_cmse_nonsecure_call
5 [PR102035]
6
7Add the recommended erratum mitigation sequence to
8__gnu_cmse_nonsecure_call for use on Armv8-m.main devices. Since this
9is in the library code we cannot know in advance whether the core we
10are running on will be affected by this, so always enable it.
11
12libgcc:
13 PR target/102035
14 * config/arm/cmse_nonsecure_call.S (__gnu_cmse_nonsecure_call):
15 Add vlldm erratum work-around.
16
17CVE: CVE-2021-35465
18Upstream-Status: Backport [https://gcc.gnu.org/git/gitweb.cgi?p=gcc.git;h=574e7950bd6b34e9e2cacce18c802b45505d1d0a]
19Signed-off-by: Pgowda <pgowda.cve@gmail.com>
20
21---
22 libgcc/config/arm/cmse_nonsecure_call.S | 5 +++++
23 1 file changed, 5 insertions(+)
24
25diff --git a/libgcc/config/arm/cmse_nonsecure_call.S b/libgcc/config/arm/cmse_nonsecure_call.S
26--- a/libgcc/config/arm/cmse_nonsecure_call.S
27+++ b/libgcc/config/arm/cmse_nonsecure_call.S
28@@ -102,6 +102,11 @@ blxns r4
29 #ifdef __ARM_PCS_VFP
30 vpop.f64 {d8-d15}
31 #else
32+/* VLLDM erratum mitigation sequence. */
33+mrs r5, control
34+tst r5, #8 /* CONTROL_S.SFPA */
35+it ne
36+.inst.w 0xeeb00a40 /* vmovne s0, s0 */
37 vlldm sp /* Lazy restore of d0-d16 and FPSCR. */
38 add sp, sp, #0x88 /* Free space used to save floating point registers. */
39 #endif /* __ARM_PCS_VFP */