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-rw-r--r--meta/recipes-devtools/elfutils/elfutils-0.155/arm_backend.diff450
1 files changed, 450 insertions, 0 deletions
diff --git a/meta/recipes-devtools/elfutils/elfutils-0.155/arm_backend.diff b/meta/recipes-devtools/elfutils/elfutils-0.155/arm_backend.diff
new file mode 100644
index 0000000..46d42fa
--- /dev/null
+++ b/meta/recipes-devtools/elfutils/elfutils-0.155/arm_backend.diff
@@ -0,0 +1,450 @@
1Upstream-Status: Backport
2
3Index: elfutils-0.155/backends/arm_init.c
4===================================================================
5--- elfutils-0.155.orig/backends/arm_init.c
6+++ elfutils-0.155/backends/arm_init.c
7@@ -35,21 +35,32 @@
8 #define RELOC_PREFIX R_ARM_
9 #include "libebl_CPU.h"
10
11+#include "libebl_arm.h"
12+
13 /* This defines the common reloc hooks based on arm_reloc.def. */
14 #include "common-reloc.c"
15
16
17 const char *
18 arm_init (elf, machine, eh, ehlen)
19- Elf *elf __attribute__ ((unused));
20+ Elf *elf;
21 GElf_Half machine __attribute__ ((unused));
22 Ebl *eh;
23 size_t ehlen;
24 {
25+ int soft_float = 0;
26+
27 /* Check whether the Elf_BH object has a sufficent size. */
28 if (ehlen < sizeof (Ebl))
29 return NULL;
30
31+ if (elf) {
32+ GElf_Ehdr ehdr_mem;
33+ GElf_Ehdr *ehdr = gelf_getehdr (elf, &ehdr_mem);
34+ if (ehdr && (ehdr->e_flags & EF_ARM_SOFT_FLOAT))
35+ soft_float = 1;
36+ }
37+
38 /* We handle it. */
39 eh->name = "ARM";
40 arm_init_reloc (eh);
41@@ -61,7 +72,10 @@ arm_init (elf, machine, eh, ehlen)
42 HOOK (eh, core_note);
43 HOOK (eh, auxv_info);
44 HOOK (eh, check_object_attribute);
45- HOOK (eh, return_value_location);
46+ if (soft_float)
47+ eh->return_value_location = arm_return_value_location_soft;
48+ else
49+ eh->return_value_location = arm_return_value_location_hard;
50
51 return MODVERSION;
52 }
53Index: elfutils-0.155/backends/arm_regs.c
54===================================================================
55--- elfutils-0.155.orig/backends/arm_regs.c
56+++ elfutils-0.155/backends/arm_regs.c
57@@ -31,6 +31,7 @@
58 #endif
59
60 #include <string.h>
61+#include <stdio.h>
62 #include <dwarf.h>
63
64 #define BACKEND arm_
65@@ -61,7 +62,15 @@ arm_register_info (Ebl *ebl __attribute_
66 namelen = 2;
67 break;
68
69- case 10 ... 12:
70+ case 10 ... 11:
71+ name[0] = 'r';
72+ name[1] = '1';
73+ name[2] = regno % 10 + '0';
74+ namelen = 3;
75+ break;
76+
77+ case 12:
78+ *type = DW_ATE_unsigned;
79 name[0] = 'r';
80 name[1] = '1';
81 name[2] = regno % 10 + '0';
82@@ -76,6 +85,9 @@ arm_register_info (Ebl *ebl __attribute_
83 break;
84
85 case 16 + 0 ... 16 + 7:
86+ /* AADWARF says that there are no registers in that range,
87+ * but gcc maps FPA registers here
88+ */
89 regno += 96 - 16;
90 /* Fall through. */
91 case 96 + 0 ... 96 + 7:
92@@ -87,11 +99,139 @@ arm_register_info (Ebl *ebl __attribute_
93 namelen = 2;
94 break;
95
96+ case 64 + 0 ... 64 + 9:
97+ *setname = "VFP";
98+ *bits = 32;
99+ *type = DW_ATE_float;
100+ name[0] = 's';
101+ name[1] = regno - 64 + '0';
102+ namelen = 2;
103+ break;
104+
105+ case 64 + 10 ... 64 + 31:
106+ *setname = "VFP";
107+ *bits = 32;
108+ *type = DW_ATE_float;
109+ name[0] = 's';
110+ name[1] = (regno - 64) / 10 + '0';
111+ name[2] = (regno - 64) % 10 + '0';
112+ namelen = 3;
113+ break;
114+
115+ case 104 + 0 ... 104 + 7:
116+ /* XXX TODO:
117+ * This can be either intel wireless MMX general purpose/control
118+ * registers or xscale accumulator, which have different usage.
119+ * We only have the intel wireless MMX here now.
120+ * The name needs to be changed for the xscale accumulator too. */
121+ *setname = "MMX";
122+ *type = DW_ATE_unsigned;
123+ *bits = 32;
124+ memcpy(name, "wcgr", 4);
125+ name[4] = regno - 104 + '0';
126+ namelen = 5;
127+ break;
128+
129+ case 112 + 0 ... 112 + 9:
130+ *setname = "MMX";
131+ *type = DW_ATE_unsigned;
132+ *bits = 64;
133+ name[0] = 'w';
134+ name[1] = 'r';
135+ name[2] = regno - 112 + '0';
136+ namelen = 3;
137+ break;
138+
139+ case 112 + 10 ... 112 + 15:
140+ *setname = "MMX";
141+ *type = DW_ATE_unsigned;
142+ *bits = 64;
143+ name[0] = 'w';
144+ name[1] = 'r';
145+ name[2] = '1';
146+ name[3] = regno - 112 - 10 + '0';
147+ namelen = 4;
148+ break;
149+
150 case 128:
151+ *setname = "special";
152 *type = DW_ATE_unsigned;
153 return stpcpy (name, "spsr") + 1 - name;
154
155+ case 129:
156+ *setname = "special";
157+ *type = DW_ATE_unsigned;
158+ return stpcpy(name, "spsr_fiq") + 1 - name;
159+
160+ case 130:
161+ *setname = "special";
162+ *type = DW_ATE_unsigned;
163+ return stpcpy(name, "spsr_irq") + 1 - name;
164+
165+ case 131:
166+ *setname = "special";
167+ *type = DW_ATE_unsigned;
168+ return stpcpy(name, "spsr_abt") + 1 - name;
169+
170+ case 132:
171+ *setname = "special";
172+ *type = DW_ATE_unsigned;
173+ return stpcpy(name, "spsr_und") + 1 - name;
174+
175+ case 133:
176+ *setname = "special";
177+ *type = DW_ATE_unsigned;
178+ return stpcpy(name, "spsr_svc") + 1 - name;
179+
180+ case 144 ... 150:
181+ *setname = "integer";
182+ *type = DW_ATE_signed;
183+ *bits = 32;
184+ return sprintf(name, "r%d_usr", regno - 144 + 8) + 1;
185+
186+ case 151 ... 157:
187+ *setname = "integer";
188+ *type = DW_ATE_signed;
189+ *bits = 32;
190+ return sprintf(name, "r%d_fiq", regno - 151 + 8) + 1;
191+
192+ case 158 ... 159:
193+ *setname = "integer";
194+ *type = DW_ATE_signed;
195+ *bits = 32;
196+ return sprintf(name, "r%d_irq", regno - 158 + 13) + 1;
197+
198+ case 160 ... 161:
199+ *setname = "integer";
200+ *type = DW_ATE_signed;
201+ *bits = 32;
202+ return sprintf(name, "r%d_abt", regno - 160 + 13) + 1;
203+
204+ case 162 ... 163:
205+ *setname = "integer";
206+ *type = DW_ATE_signed;
207+ *bits = 32;
208+ return sprintf(name, "r%d_und", regno - 162 + 13) + 1;
209+
210+ case 164 ... 165:
211+ *setname = "integer";
212+ *type = DW_ATE_signed;
213+ *bits = 32;
214+ return sprintf(name, "r%d_svc", regno - 164 + 13) + 1;
215+
216+ case 192 ... 199:
217+ *setname = "MMX";
218+ *bits = 32;
219+ *type = DW_ATE_unsigned;
220+ name[0] = 'w';
221+ name[1] = 'c';
222+ name[2] = regno - 192 + '0';
223+ namelen = 3;
224+ break;
225+
226 case 256 + 0 ... 256 + 9:
227+ /* XXX TODO: Neon also uses those registers and can contain
228+ * both float and integers */
229 *setname = "VFP";
230 *type = DW_ATE_float;
231 *bits = 64;
232Index: elfutils-0.155/backends/arm_retval.c
233===================================================================
234--- elfutils-0.155.orig/backends/arm_retval.c
235+++ elfutils-0.155/backends/arm_retval.c
236@@ -48,6 +48,13 @@ static const Dwarf_Op loc_intreg[] =
237 #define nloc_intreg 1
238 #define nloc_intregs(n) (2 * (n))
239
240+/* f1 */ /* XXX TODO: f0 can also have number 96 if program was compiled with -mabi=aapcs */
241+static const Dwarf_Op loc_fpreg[] =
242+ {
243+ { .atom = DW_OP_reg16 },
244+ };
245+#define nloc_fpreg 1
246+
247 /* The return value is a structure and is actually stored in stack space
248 passed in a hidden argument by the caller. But, the compiler
249 helpfully returns the address of that space in r0. */
250@@ -58,8 +65,9 @@ static const Dwarf_Op loc_aggregate[] =
251 #define nloc_aggregate 1
252
253
254-int
255-arm_return_value_location (Dwarf_Die *functypedie, const Dwarf_Op **locp)
256+static int
257+arm_return_value_location_ (Dwarf_Die *functypedie, const Dwarf_Op **locp,
258+ int soft_float)
259 {
260 /* Start with the function's type, and get the DW_AT_type attribute,
261 which is the type of the return value. */
262@@ -112,14 +120,31 @@ arm_return_value_location (Dwarf_Die *fu
263 else
264 return -1;
265 }
266+ if (tag == DW_TAG_base_type)
267+ {
268+ Dwarf_Word encoding;
269+ if (dwarf_formudata (dwarf_attr_integrate (typedie, DW_AT_encoding,
270+ &attr_mem), &encoding) != 0)
271+ return -1;
272+
273+ if ((encoding == DW_ATE_float) && !soft_float)
274+ {
275+ *locp = loc_fpreg;
276+ if (size <= 8)
277+ return nloc_fpreg;
278+ goto aggregate;
279+ }
280+ }
281 if (size <= 16)
282 {
283 intreg:
284 *locp = loc_intreg;
285 return size <= 4 ? nloc_intreg : nloc_intregs ((size + 3) / 4);
286 }
287+ /* fall through. */
288
289 aggregate:
290+ /* XXX TODO sometimes aggregates are returned in r0 (-mabi=aapcs) */
291 *locp = loc_aggregate;
292 return nloc_aggregate;
293
294@@ -138,3 +163,18 @@ arm_return_value_location (Dwarf_Die *fu
295 DWARF and might be valid. */
296 return -2;
297 }
298+
299+/* return location for -mabi=apcs-gnu -msoft-float */
300+int
301+arm_return_value_location_soft (Dwarf_Die *functypedie, const Dwarf_Op **locp)
302+{
303+ return arm_return_value_location_ (functypedie, locp, 1);
304+}
305+
306+/* return location for -mabi=apcs-gnu -mhard-float (current default) */
307+int
308+arm_return_value_location_hard (Dwarf_Die *functypedie, const Dwarf_Op **locp)
309+{
310+ return arm_return_value_location_ (functypedie, locp, 0);
311+}
312+
313Index: elfutils-0.155/libelf/elf.h
314===================================================================
315--- elfutils-0.155.orig/libelf/elf.h
316+++ elfutils-0.155/libelf/elf.h
317@@ -2281,6 +2281,9 @@ typedef Elf32_Addr Elf32_Conflict;
318 #define EF_ARM_EABI_VER4 0x04000000
319 #define EF_ARM_EABI_VER5 0x05000000
320
321+/* EI_OSABI values */
322+#define ELFOSABI_ARM_AEABI 64 /* Contains symbol versioning. */
323+
324 /* Additional symbol types for Thumb. */
325 #define STT_ARM_TFUNC STT_LOPROC /* A Thumb function. */
326 #define STT_ARM_16BIT STT_HIPROC /* A Thumb label. */
327@@ -2298,12 +2301,19 @@ typedef Elf32_Addr Elf32_Conflict;
328
329 /* Processor specific values for the Phdr p_type field. */
330 #define PT_ARM_EXIDX (PT_LOPROC + 1) /* ARM unwind segment. */
331+#define PT_ARM_UNWIND PT_ARM_EXIDX
332
333 /* Processor specific values for the Shdr sh_type field. */
334 #define SHT_ARM_EXIDX (SHT_LOPROC + 1) /* ARM unwind section. */
335 #define SHT_ARM_PREEMPTMAP (SHT_LOPROC + 2) /* Preemption details. */
336 #define SHT_ARM_ATTRIBUTES (SHT_LOPROC + 3) /* ARM attributes section. */
337
338+/* Processor specific values for the Dyn d_tag field. */
339+#define DT_ARM_RESERVED1 (DT_LOPROC + 0)
340+#define DT_ARM_SYMTABSZ (DT_LOPROC + 1)
341+#define DT_ARM_PREEMTMAB (DT_LOPROC + 2)
342+#define DT_ARM_RESERVED2 (DT_LOPROC + 3)
343+#define DT_ARM_NUM 4
344
345 /* ARM relocs. */
346
347@@ -2336,12 +2346,75 @@ typedef Elf32_Addr Elf32_Conflict;
348 #define R_ARM_GOTPC 25 /* 32 bit PC relative offset to GOT */
349 #define R_ARM_GOT32 26 /* 32 bit GOT entry */
350 #define R_ARM_PLT32 27 /* 32 bit PLT address */
351+#define R_ARM_CALL 28
352+#define R_ARM_JUMP24 29
353+#define R_ARM_THM_JUMP24 30
354+#define R_ARM_BASE_ABS 31
355 #define R_ARM_ALU_PCREL_7_0 32
356 #define R_ARM_ALU_PCREL_15_8 33
357 #define R_ARM_ALU_PCREL_23_15 34
358 #define R_ARM_LDR_SBREL_11_0 35
359 #define R_ARM_ALU_SBREL_19_12 36
360 #define R_ARM_ALU_SBREL_27_20 37
361+#define R_ARM_TARGET1 38
362+#define R_ARM_SBREL31 39
363+#define R_ARM_V4BX 40
364+#define R_ARM_TARGET2 41
365+#define R_ARM_PREL31 42
366+#define R_ARM_MOVW_ABS_NC 43
367+#define R_ARM_MOVT_ABS 44
368+#define R_ARM_MOVW_PREL_NC 45
369+#define R_ARM_MOVT_PREL 46
370+#define R_ARM_THM_MOVW_ABS_NC 47
371+#define R_ARM_THM_MOVT_ABS 48
372+#define R_ARM_THM_MOVW_PREL_NC 49
373+#define R_ARM_THM_MOVT_PREL 50
374+#define R_ARM_THM_JUMP19 51
375+#define R_ARM_THM_JUMP6 52
376+#define R_ARM_THM_ALU_PREL_11_0 53
377+#define R_ARM_THM_PC12 54
378+#define R_ARM_ABS32_NO 55
379+#define R_ARM_REL32_NO 56
380+#define R_ARM_ALU_PC_G0_NC 57
381+#define R_ARM_ALU_PC_G0 58
382+#define R_ARM_ALU_PC_G1_NC 59
383+#define R_ARM_ALU_PC_G1 60
384+#define R_ARM_ALU_PC_G2 61
385+#define R_ARM_LDR_PC_G1 62
386+#define R_ARM_LDR_PC_G2 63
387+#define R_ARM_LDRS_PC_G0 64
388+#define R_ARM_LDRS_PC_G1 65
389+#define R_ARM_LDRS_PC_G2 66
390+#define R_ARM_LDC_PC_G0 67
391+#define R_ARM_LDC_PC_G1 68
392+#define R_ARM_LDC_PC_G2 69
393+#define R_ARM_ALU_SB_G0_NC 70
394+#define R_ARM_ALU_SB_G0 71
395+#define R_ARM_ALU_SB_G1_NC 72
396+#define R_ARM_ALU_SB_G1 73
397+#define R_ARM_ALU_SB_G2 74
398+#define R_ARM_LDR_SB_G0 75
399+#define R_ARM_LDR_SB_G1 76
400+#define R_ARM_LDR_SB_G2 77
401+#define R_ARM_LDRS_SB_G0 78
402+#define R_ARM_LDRS_SB_G1 79
403+#define R_ARM_LDRS_SB_G2 80
404+#define R_ARM_LDC_G0 81
405+#define R_ARM_LDC_G1 82
406+#define R_ARM_LDC_G2 83
407+#define R_ARM_MOVW_BREL_NC 84
408+#define R_ARM_MOVT_BREL 85
409+#define R_ARM_MOVW_BREL 86
410+#define R_ARM_THM_MOVW_BREL_NC 87
411+#define R_ARM_THM_MOVT_BREL 88
412+#define R_ARM_THM_MOVW_BREL 89
413+/* 90-93 unallocated */
414+#define R_ARM_PLT32_ABS 94
415+#define R_ARM_GOT_ABS 95
416+#define R_ARM_GOT_PREL 96
417+#define R_ARM_GOT_BREL12 97
418+#define R_ARM_GOTOFF12 98
419+#define R_ARM_GOTRELAX 99
420 #define R_ARM_TLS_GOTDESC 90
421 #define R_ARM_TLS_CALL 91
422 #define R_ARM_TLS_DESCSEQ 92
423@@ -2360,6 +2433,13 @@ typedef Elf32_Addr Elf32_Conflict;
424 static TLS block offset */
425 #define R_ARM_TLS_LE32 108 /* 32 bit offset relative to static
426 TLS block */
427+#define R_ARM_TLS_LDO12 109
428+#define R_ARM_TLS_LE12 110
429+#define R_ARM_TLS_IE12GP 111
430+/* 112 - 127 private range */
431+#define R_ARM_ME_TOO 128|/* obsolete */
432+
433+
434 #define R_ARM_THM_TLS_DESCSEQ 129
435 #define R_ARM_IRELATIVE 160
436 #define R_ARM_RXPC25 249
437Index: elfutils-0.155/backends/libebl_arm.h
438===================================================================
439--- /dev/null
440+++ elfutils-0.155/backends/libebl_arm.h
441@@ -0,0 +1,9 @@
442+#ifndef _LIBEBL_ARM_H
443+#define _LIBEBL_ARM_H 1
444+
445+#include <libdw.h>
446+
447+extern int arm_return_value_location_soft(Dwarf_Die *, const Dwarf_Op **locp);
448+extern int arm_return_value_location_hard(Dwarf_Die *, const Dwarf_Op **locp);
449+
450+#endif