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-rw-r--r--meta/recipes-devtools/binutils/binutils/0010-Add-support-for-Netlogic-XLP.patch55
1 files changed, 26 insertions, 29 deletions
diff --git a/meta/recipes-devtools/binutils/binutils/0010-Add-support-for-Netlogic-XLP.patch b/meta/recipes-devtools/binutils/binutils/0010-Add-support-for-Netlogic-XLP.patch
index 277db4ec5c..fe2d02f29d 100644
--- a/meta/recipes-devtools/binutils/binutils/0010-Add-support-for-Netlogic-XLP.patch
+++ b/meta/recipes-devtools/binutils/binutils/0010-Add-support-for-Netlogic-XLP.patch
@@ -1,7 +1,7 @@
1From 69ab45c16f80f18fa78121f6e774750b9e9a200b Mon Sep 17 00:00:00 2001 1From c64a5ca02a55b748311032e2c7d9c4f87bd74c63 Mon Sep 17 00:00:00 2001
2From: Khem Raj <raj.khem@gmail.com> 2From: Khem Raj <raj.khem@gmail.com>
3Date: Sun, 14 Feb 2016 17:06:19 +0000 3Date: Sun, 14 Feb 2016 17:06:19 +0000
4Subject: [PATCH 10/17] Add support for Netlogic XLP 4Subject: [PATCH] Add support for Netlogic XLP
5 5
6Patch From: Nebu Philips <nphilips@netlogicmicro.com> 6Patch From: Nebu Philips <nphilips@netlogicmicro.com>
7 7
@@ -35,7 +35,7 @@ Signed-off-by: Mark Hatle <mark.hatle@windriver.com>
35 15 files changed, 65 insertions(+), 21 deletions(-) 35 15 files changed, 65 insertions(+), 21 deletions(-)
36 36
37diff --git a/bfd/aoutx.h b/bfd/aoutx.h 37diff --git a/bfd/aoutx.h b/bfd/aoutx.h
38index d352a1a3e44..2e2c3c1af86 100644 38index 8025b8c5241..cdcb7876896 100644
39--- a/bfd/aoutx.h 39--- a/bfd/aoutx.h
40+++ b/bfd/aoutx.h 40+++ b/bfd/aoutx.h
41@@ -810,6 +810,7 @@ NAME (aout, machine_type) (enum bfd_architecture arch, 41@@ -810,6 +810,7 @@ NAME (aout, machine_type) (enum bfd_architecture arch,
@@ -47,7 +47,7 @@ index d352a1a3e44..2e2c3c1af86 100644
47 arch_flags = M_MIPS2; 47 arch_flags = M_MIPS2;
48 break; 48 break;
49diff --git a/bfd/archures.c b/bfd/archures.c 49diff --git a/bfd/archures.c b/bfd/archures.c
50index 551ec8732f0..2665b378623 100644 50index 8c1d32ca930..b4b2927ebc0 100644
51--- a/bfd/archures.c 51--- a/bfd/archures.c
52+++ b/bfd/archures.c 52+++ b/bfd/archures.c
53@@ -185,6 +185,7 @@ DESCRIPTION 53@@ -185,6 +185,7 @@ DESCRIPTION
@@ -59,10 +59,10 @@ index 551ec8732f0..2665b378623 100644
59 .#define bfd_mach_mipsisa32r2 33 59 .#define bfd_mach_mipsisa32r2 33
60 .#define bfd_mach_mipsisa32r3 34 60 .#define bfd_mach_mipsisa32r3 34
61diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h 61diff --git a/bfd/bfd-in2.h b/bfd/bfd-in2.h
62index 35ef4d755bb..48db00af80b 100644 62index 7eff85b7eaa..6c9eb12865e 100644
63--- a/bfd/bfd-in2.h 63--- a/bfd/bfd-in2.h
64+++ b/bfd/bfd-in2.h 64+++ b/bfd/bfd-in2.h
65@@ -1585,6 +1585,7 @@ enum bfd_architecture 65@@ -1590,6 +1590,7 @@ enum bfd_architecture
66 #define bfd_mach_mips_octeon3 6503 66 #define bfd_mach_mips_octeon3 6503
67 #define bfd_mach_mips_xlr 887682 /* decimal 'XLR'. */ 67 #define bfd_mach_mips_xlr 887682 /* decimal 'XLR'. */
68 #define bfd_mach_mips_interaptiv_mr2 736550 /* decimal 'IA2'. */ 68 #define bfd_mach_mips_interaptiv_mr2 736550 /* decimal 'IA2'. */
@@ -71,10 +71,10 @@ index 35ef4d755bb..48db00af80b 100644
71 #define bfd_mach_mipsisa32r2 33 71 #define bfd_mach_mipsisa32r2 33
72 #define bfd_mach_mipsisa32r3 34 72 #define bfd_mach_mipsisa32r3 34
73diff --git a/bfd/config.bfd b/bfd/config.bfd 73diff --git a/bfd/config.bfd b/bfd/config.bfd
74index e5233cd1f7e..2e4ae6bbdff 100644 74index 2caf492e172..e75417da4d8 100644
75--- a/bfd/config.bfd 75--- a/bfd/config.bfd
76+++ b/bfd/config.bfd 76+++ b/bfd/config.bfd
77@@ -877,6 +877,11 @@ case "${targ}" in 77@@ -879,6 +879,11 @@ case "${targ}" in
78 targ_defvec=mips_elf32_le_vec 78 targ_defvec=mips_elf32_le_vec
79 targ_selvecs="mips_elf32_be_vec mips_elf64_be_vec mips_elf64_le_vec" 79 targ_selvecs="mips_elf32_be_vec mips_elf64_be_vec mips_elf64_le_vec"
80 ;; 80 ;;
@@ -87,7 +87,7 @@ index e5233cd1f7e..2e4ae6bbdff 100644
87 targ_defvec=mips_elf32_be_vec 87 targ_defvec=mips_elf32_be_vec
88 targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec" 88 targ_selvecs="mips_elf32_le_vec mips_elf64_be_vec mips_elf64_le_vec"
89diff --git a/bfd/cpu-mips.c b/bfd/cpu-mips.c 89diff --git a/bfd/cpu-mips.c b/bfd/cpu-mips.c
90index 802acb45f1e..fd9ec4c0ad4 100644 90index 5a944ceee81..c57d12ba3dd 100644
91--- a/bfd/cpu-mips.c 91--- a/bfd/cpu-mips.c
92+++ b/bfd/cpu-mips.c 92+++ b/bfd/cpu-mips.c
93@@ -108,7 +108,8 @@ enum 93@@ -108,7 +108,8 @@ enum
@@ -111,10 +111,10 @@ index 802acb45f1e..fd9ec4c0ad4 100644
111 111
112 /* The default architecture is mips:3000, but with a machine number of 112 /* The default architecture is mips:3000, but with a machine number of
113diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c 113diff --git a/bfd/elfxx-mips.c b/bfd/elfxx-mips.c
114index 160febec94c..4c9499cc2cf 100644 114index 3cbb3cf9495..0c6cd47b40c 100644
115--- a/bfd/elfxx-mips.c 115--- a/bfd/elfxx-mips.c
116+++ b/bfd/elfxx-mips.c 116+++ b/bfd/elfxx-mips.c
117@@ -6982,6 +6982,9 @@ _bfd_elf_mips_mach (flagword flags) 117@@ -6980,6 +6980,9 @@ _bfd_elf_mips_mach (flagword flags)
118 case E_MIPS_MACH_IAMR2: 118 case E_MIPS_MACH_IAMR2:
119 return bfd_mach_mips_interaptiv_mr2; 119 return bfd_mach_mips_interaptiv_mr2;
120 120
@@ -124,7 +124,7 @@ index 160febec94c..4c9499cc2cf 100644
124 default: 124 default:
125 switch (flags & EF_MIPS_ARCH) 125 switch (flags & EF_MIPS_ARCH)
126 { 126 {
127@@ -12356,6 +12359,10 @@ mips_set_isa_flags (bfd *abfd) 127@@ -12335,6 +12338,10 @@ mips_set_isa_flags (bfd *abfd)
128 val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON2; 128 val = E_MIPS_ARCH_64R2 | E_MIPS_MACH_OCTEON2;
129 break; 129 break;
130 130
@@ -135,7 +135,7 @@ index 160febec94c..4c9499cc2cf 100644
135 case bfd_mach_mipsisa32: 135 case bfd_mach_mipsisa32:
136 val = E_MIPS_ARCH_32; 136 val = E_MIPS_ARCH_32;
137 break; 137 break;
138@@ -14373,6 +14380,7 @@ static const struct mips_mach_extension mips_mach_extensions[] = 138@@ -14352,6 +14359,7 @@ static const struct mips_mach_extension mips_mach_extensions[] =
139 { bfd_mach_mips_gs264e, bfd_mach_mips_gs464e }, 139 { bfd_mach_mips_gs264e, bfd_mach_mips_gs464e },
140 { bfd_mach_mips_gs464e, bfd_mach_mips_gs464 }, 140 { bfd_mach_mips_gs464e, bfd_mach_mips_gs464 },
141 { bfd_mach_mips_gs464, bfd_mach_mipsisa64r2 }, 141 { bfd_mach_mips_gs464, bfd_mach_mipsisa64r2 },
@@ -144,10 +144,10 @@ index 160febec94c..4c9499cc2cf 100644
144 /* MIPS64 extensions. */ 144 /* MIPS64 extensions. */
145 { bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 }, 145 { bfd_mach_mipsisa64r2, bfd_mach_mipsisa64 },
146diff --git a/binutils/readelf.c b/binutils/readelf.c 146diff --git a/binutils/readelf.c b/binutils/readelf.c
147index 6057515a89b..ea119b0b254 100644 147index ad16b4571c9..4bf2b732502 100644
148--- a/binutils/readelf.c 148--- a/binutils/readelf.c
149+++ b/binutils/readelf.c 149+++ b/binutils/readelf.c
150@@ -3483,6 +3483,7 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine) 150@@ -3502,6 +3502,7 @@ get_machine_flags (Filedata * filedata, unsigned e_flags, unsigned e_machine)
151 case E_MIPS_MACH_OCTEON3: strcat (buf, ", octeon3"); break; 151 case E_MIPS_MACH_OCTEON3: strcat (buf, ", octeon3"); break;
152 case E_MIPS_MACH_XLR: strcat (buf, ", xlr"); break; 152 case E_MIPS_MACH_XLR: strcat (buf, ", xlr"); break;
153 case E_MIPS_MACH_IAMR2: strcat (buf, ", interaptiv-mr2"); break; 153 case E_MIPS_MACH_IAMR2: strcat (buf, ", interaptiv-mr2"); break;
@@ -156,7 +156,7 @@ index 6057515a89b..ea119b0b254 100644
156 /* We simply ignore the field in this case to avoid confusion: 156 /* We simply ignore the field in this case to avoid confusion:
157 MIPS ELF does not specify EF_MIPS_MACH, it is a GNU 157 MIPS ELF does not specify EF_MIPS_MACH, it is a GNU
158diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c 158diff --git a/gas/config/tc-mips.c b/gas/config/tc-mips.c
159index 31acb77d78a..0ead168d51e 100644 159index 538b69710f5..b021b64f14b 100644
160--- a/gas/config/tc-mips.c 160--- a/gas/config/tc-mips.c
161+++ b/gas/config/tc-mips.c 161+++ b/gas/config/tc-mips.c
162@@ -568,6 +568,7 @@ static int mips_32bitmode = 0; 162@@ -568,6 +568,7 @@ static int mips_32bitmode = 0;
@@ -175,7 +175,7 @@ index 31acb77d78a..0ead168d51e 100644
175 ) 175 )
176 176
177 /* Whether the processor uses hardware interlocks to protect reads 177 /* Whether the processor uses hardware interlocks to protect reads
178@@ -20174,7 +20176,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] = 178@@ -20156,7 +20158,7 @@ static const struct mips_cpu_info mips_cpu_info_table[] =
179 /* Broadcom XLP. 179 /* Broadcom XLP.
180 XLP is mostly like XLR, with the prominent exception that it is 180 XLP is mostly like XLR, with the prominent exception that it is
181 MIPS64R2 rather than MIPS64. */ 181 MIPS64R2 rather than MIPS64. */
@@ -185,10 +185,10 @@ index 31acb77d78a..0ead168d51e 100644
185 /* MIPS 64 Release 6. */ 185 /* MIPS 64 Release 6. */
186 { "i6400", 0, ASE_VIRT | ASE_MSA, ISA_MIPS64R6, CPU_MIPS64R6}, 186 { "i6400", 0, ASE_VIRT | ASE_MSA, ISA_MIPS64R6, CPU_MIPS64R6},
187diff --git a/gas/configure b/gas/configure 187diff --git a/gas/configure b/gas/configure
188index 5bccfd9d1b7..d4b13e6fc8b 100755 188index d03432c6dc6..d5ae54925e9 100755
189--- a/gas/configure 189--- a/gas/configure
190+++ b/gas/configure 190+++ b/gas/configure
191@@ -12722,6 +12722,9 @@ _ACEOF 191@@ -12761,6 +12761,9 @@ _ACEOF
192 mipsisa64r6 | mipsisa64r6el) 192 mipsisa64r6 | mipsisa64r6el)
193 mips_cpu=mips64r6 193 mips_cpu=mips64r6
194 ;; 194 ;;
@@ -199,10 +199,10 @@ index 5bccfd9d1b7..d4b13e6fc8b 100755
199 mips_cpu=r3900 199 mips_cpu=r3900
200 ;; 200 ;;
201diff --git a/gas/configure.ac b/gas/configure.ac 201diff --git a/gas/configure.ac b/gas/configure.ac
202index b65108fecb2..ce1f2dad9bc 100644 202index 82706561886..f1c27bf2878 100644
203--- a/gas/configure.ac 203--- a/gas/configure.ac
204+++ b/gas/configure.ac 204+++ b/gas/configure.ac
205@@ -325,6 +325,9 @@ changequote([,])dnl 205@@ -332,6 +332,9 @@ changequote([,])dnl
206 mipsisa64r6 | mipsisa64r6el) 206 mipsisa64r6 | mipsisa64r6el)
207 mips_cpu=mips64r6 207 mips_cpu=mips64r6
208 ;; 208 ;;
@@ -213,7 +213,7 @@ index b65108fecb2..ce1f2dad9bc 100644
213 mips_cpu=r3900 213 mips_cpu=r3900
214 ;; 214 ;;
215diff --git a/include/elf/mips.h b/include/elf/mips.h 215diff --git a/include/elf/mips.h b/include/elf/mips.h
216index cc08ebd4318..bb518575ce1 100644 216index 4bd86307120..2d7df22abf2 100644
217--- a/include/elf/mips.h 217--- a/include/elf/mips.h
218+++ b/include/elf/mips.h 218+++ b/include/elf/mips.h
219@@ -290,6 +290,7 @@ END_RELOC_NUMBERS (R_MIPS_maxext) 219@@ -290,6 +290,7 @@ END_RELOC_NUMBERS (R_MIPS_maxext)
@@ -225,7 +225,7 @@ index cc08ebd4318..bb518575ce1 100644
225 #define E_MIPS_MACH_OCTEON3 0x008e0000 225 #define E_MIPS_MACH_OCTEON3 0x008e0000
226 #define E_MIPS_MACH_5400 0x00910000 226 #define E_MIPS_MACH_5400 0x00910000
227diff --git a/include/opcode/mips.h b/include/opcode/mips.h 227diff --git a/include/opcode/mips.h b/include/opcode/mips.h
228index fd031f37588..a96a44df840 100644 228index d1b4a2574ac..879c68fcfd4 100644
229--- a/include/opcode/mips.h 229--- a/include/opcode/mips.h
230+++ b/include/opcode/mips.h 230+++ b/include/opcode/mips.h
231@@ -1260,6 +1260,8 @@ static const unsigned int mips_isa_table[] = { 231@@ -1260,6 +1260,8 @@ static const unsigned int mips_isa_table[] = {
@@ -256,7 +256,7 @@ index fd031f37588..a96a44df840 100644
256 return FALSE; 256 return FALSE;
257 } 257 }
258diff --git a/ld/configure.tgt b/ld/configure.tgt 258diff --git a/ld/configure.tgt b/ld/configure.tgt
259index 9b4bf2ca964..f6d7171dff7 100644 259index 47431770a17..f714744eab3 100644
260--- a/ld/configure.tgt 260--- a/ld/configure.tgt
261+++ b/ld/configure.tgt 261+++ b/ld/configure.tgt
262@@ -510,6 +510,9 @@ mips*-sde-elf* | mips*-mti-elf* | mips*-img-elf*) 262@@ -510,6 +510,9 @@ mips*-sde-elf* | mips*-mti-elf* | mips*-img-elf*)
@@ -270,7 +270,7 @@ index 9b4bf2ca964..f6d7171dff7 100644
270 targ_extra_emuls="elf32lr5900" 270 targ_extra_emuls="elf32lr5900"
271 targ_extra_libpath=$targ_extra_emuls 271 targ_extra_libpath=$targ_extra_emuls
272diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c 272diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
273index 755bbe294bd..ce22ef683a6 100644 273index 317ced51204..6869f890656 100644
274--- a/opcodes/mips-dis.c 274--- a/opcodes/mips-dis.c
275+++ b/opcodes/mips-dis.c 275+++ b/opcodes/mips-dis.c
276@@ -674,13 +674,11 @@ const struct mips_arch_choice mips_arch_choices[] = 276@@ -674,13 +674,11 @@ const struct mips_arch_choice mips_arch_choices[] =
@@ -293,7 +293,7 @@ index 755bbe294bd..ce22ef683a6 100644
293 /* This entry, mips16, is here only for ISA/processor selection; do 293 /* This entry, mips16, is here only for ISA/processor selection; do
294 not print its name. */ 294 not print its name. */
295diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c 295diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
296index 5270aeefa80..d17dc78cd71 100644 296index b45eb40bf69..2f4eb5c0354 100644
297--- a/opcodes/mips-opc.c 297--- a/opcodes/mips-opc.c
298+++ b/opcodes/mips-opc.c 298+++ b/opcodes/mips-opc.c
299@@ -328,6 +328,7 @@ decode_mips_operand (const char *p) 299@@ -328,6 +328,7 @@ decode_mips_operand (const char *p)
@@ -404,6 +404,3 @@ index 5270aeefa80..d17dc78cd71 100644
404 {"swc0", "E,o(b)", 0xe0000000, 0xfc000000, RD_3|RD_C0|SM, 0, I1, 0, IOCT|IOCTP|IOCT2|I37 }, 404 {"swc0", "E,o(b)", 0xe0000000, 0xfc000000, RD_3|RD_C0|SM, 0, I1, 0, IOCT|IOCTP|IOCT2|I37 },
405 {"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2|I37 }, 405 {"swc0", "E,A(b)", 0, (int) M_SWC0_AB, INSN_MACRO, 0, I1, 0, IOCT|IOCTP|IOCT2|I37 },
406 {"swc1", "T,o(b)", 0xe4000000, 0xfc000000, RD_1|RD_3|SM|FP_S, 0, I1, 0, 0 }, 406 {"swc1", "T,o(b)", 0xe4000000, 0xfc000000, RD_1|RD_3|SM|FP_S, 0, I1, 0, 0 },
407--
4082.28.0
409