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-rw-r--r--meta/recipes-devtools/binutils/binutils/0007-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch37
1 files changed, 37 insertions, 0 deletions
diff --git a/meta/recipes-devtools/binutils/binutils/0007-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch b/meta/recipes-devtools/binutils/binutils/0007-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch
new file mode 100644
index 0000000000..7101219bf4
--- /dev/null
+++ b/meta/recipes-devtools/binutils/binutils/0007-fix-the-incorrect-assembling-for-ppc-wait-mnemonic.patch
@@ -0,0 +1,37 @@
1From de07998ce2189c329220a76feb073438c4ec88f5 Mon Sep 17 00:00:00 2001
2From: Zhenhua Luo <zhenhua.luo@nxp.com>
3Date: Sat, 11 Jun 2016 22:08:29 -0500
4Subject: [PATCH] fix the incorrect assembling for ppc wait mnemonic
5
6The wait mnemonic for ppc targets is incorrectly assembled into 0x7c00003c due
7to duplicated address definition with waitasec instruction. The issue causes
8kernel boot calltrace for ppc targets when wait instruction is executed.
9
10Upstream-Status: Pending
11Signed-off-by: Zhenhua Luo <zhenhua.luo@nxp.com>
12---
13 opcodes/ppc-opc.c | 4 +---
14 1 file changed, 1 insertion(+), 3 deletions(-)
15
16diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
17index aa4484ef9ab..81b6a4c2db9 100644
18--- a/opcodes/ppc-opc.c
19+++ b/opcodes/ppc-opc.c
20@@ -7138,8 +7138,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
21 {"waitasec", X(31,30), XRTRARB_MASK, POWER8, POWER9, {0}},
22 {"waitrsv", XWCPL(31,30,1,0),0xffffffff, POWER10, EXT, {0}},
23 {"pause_short", XWCPL(31,30,2,0),0xffffffff, POWER10, EXT, {0}},
24-{"wait", X(31,30), XWCPL_MASK, POWER10, 0, {WC, PL}},
25-{"wait", X(31,30), XWC_MASK, POWER9, POWER10, {WC}},
26
27 {"lwepx", X(31,31), X_MASK, E500MC|PPCA2, 0, {RT, RA0, RB}},
28
29@@ -7193,7 +7191,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
30
31 {"waitrsv", X(31,62)|(1<<21), 0xffffffff, E500MC|PPCA2, EXT, {0}},
32 {"waitimpl", X(31,62)|(2<<21), 0xffffffff, E500MC|PPCA2, EXT, {0}},
33-{"wait", X(31,62), XWC_MASK, E500MC|PPCA2, 0, {WC}},
34+{"wait", X(31,62), XWC_MASK, E500MC|PPCA2|POWER9|POWER10, 0, {WC}},
35
36 {"dcbstep", XRT(31,63,0), XRT_MASK, E500MC|PPCA2, 0, {RA0, RB}},
37