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-rw-r--r--meta/recipes-core/glibc/glibc/0016-wordsize.h-Unify-the-header-between-arm-and-aarch64.patch47
-rw-r--r--meta/recipes-core/glibc/glibc/0023-aarch64-configure-Pass-mcpu-along-with-march-to-dete.patch62
-rw-r--r--meta/recipes-core/glibc/glibc/0023-qemu-stale-process.patch (renamed from meta/recipes-core/glibc/glibc/0024-qemu-stale-process.patch)0
3 files changed, 38 insertions, 71 deletions
diff --git a/meta/recipes-core/glibc/glibc/0016-wordsize.h-Unify-the-header-between-arm-and-aarch64.patch b/meta/recipes-core/glibc/glibc/0016-wordsize.h-Unify-the-header-between-arm-and-aarch64.patch
index 066c3b1ea2..9bdfa76318 100644
--- a/meta/recipes-core/glibc/glibc/0016-wordsize.h-Unify-the-header-between-arm-and-aarch64.patch
+++ b/meta/recipes-core/glibc/glibc/0016-wordsize.h-Unify-the-header-between-arm-and-aarch64.patch
@@ -11,16 +11,15 @@ Upstream-Status: Inappropriate [ OE-Specific ]
11 11
12Signed-off-by: Khem Raj <raj.khem@gmail.com> 12Signed-off-by: Khem Raj <raj.khem@gmail.com>
13--- 13---
14 sysdeps/aarch64/bits/wordsize.h | 8 ++++++-- 14 sysdeps/aarch64/bits/wordsize.h | 11 +++++++++--
15 sysdeps/arm/bits/wordsize.h | 1 + 15 sysdeps/arm/bits/wordsize.h | 22 +---------------------
16 2 files changed, 7 insertions(+), 2 deletions(-) 16 2 files changed, 10 insertions(+), 23 deletions(-)
17 create mode 120000 sysdeps/arm/bits/wordsize.h
18 17
19diff --git a/sysdeps/aarch64/bits/wordsize.h b/sysdeps/aarch64/bits/wordsize.h 18diff --git a/sysdeps/aarch64/bits/wordsize.h b/sysdeps/aarch64/bits/wordsize.h
20index 118e59172d..b4b0692eb5 100644 19index 118e59172d..ff86359fe8 100644
21--- a/sysdeps/aarch64/bits/wordsize.h 20--- a/sysdeps/aarch64/bits/wordsize.h
22+++ b/sysdeps/aarch64/bits/wordsize.h 21+++ b/sysdeps/aarch64/bits/wordsize.h
23@@ -17,12 +17,16 @@ 22@@ -17,12 +17,19 @@
24 License along with the GNU C Library; if not, see 23 License along with the GNU C Library; if not, see
25 <https://www.gnu.org/licenses/>. */ 24 <https://www.gnu.org/licenses/>. */
26 25
@@ -33,12 +32,42 @@ index 118e59172d..b4b0692eb5 100644
33 # define __WORDSIZE32_SIZE_ULONG 1 32 # define __WORDSIZE32_SIZE_ULONG 1
34 # define __WORDSIZE32_PTRDIFF_LONG 1 33 # define __WORDSIZE32_PTRDIFF_LONG 1
35+#else 34+#else
36+# define __WORDSIZE 32 35+#define __WORDSIZE 32
37+# define __WORDSIZE32_SIZE_ULONG 0 36+#define __WORDSIZE_TIME64_COMPAT32 1
38+# define __WORDSIZE32_PTRDIFF_LONG 0 37+#define __WORDSIZE32_SIZE_ULONG 0
38+#define __WORDSIZE32_PTRDIFF_LONG 0
39 #endif 39 #endif
40 40
41+#ifdef __aarch64__
41 #define __WORDSIZE_TIME64_COMPAT32 0 42 #define __WORDSIZE_TIME64_COMPAT32 0
43+#endif
44diff --git a/sysdeps/arm/bits/wordsize.h b/sysdeps/arm/bits/wordsize.h
45deleted file mode 100644
46index 6ecbfe7c86..0000000000
47--- a/sysdeps/arm/bits/wordsize.h
48+++ /dev/null
49@@ -1,21 +0,0 @@
50-/* Copyright (C) 1999-2024 Free Software Foundation, Inc.
51- This file is part of the GNU C Library.
52-
53- The GNU C Library is free software; you can redistribute it and/or
54- modify it under the terms of the GNU Lesser General Public
55- License as published by the Free Software Foundation; either
56- version 2.1 of the License, or (at your option) any later version.
57-
58- The GNU C Library is distributed in the hope that it will be useful,
59- but WITHOUT ANY WARRANTY; without even the implied warranty of
60- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
61- Lesser General Public License for more details.
62-
63- You should have received a copy of the GNU Lesser General Public
64- License along with the GNU C Library; if not, see
65- <https://www.gnu.org/licenses/>. */
66-
67-#define __WORDSIZE 32
68-#define __WORDSIZE_TIME64_COMPAT32 1
69-#define __WORDSIZE32_SIZE_ULONG 0
70-#define __WORDSIZE32_PTRDIFF_LONG 0
42diff --git a/sysdeps/arm/bits/wordsize.h b/sysdeps/arm/bits/wordsize.h 71diff --git a/sysdeps/arm/bits/wordsize.h b/sysdeps/arm/bits/wordsize.h
43new file mode 120000 72new file mode 120000
44index 0000000000..4c4a788ec2 73index 0000000000..4c4a788ec2
diff --git a/meta/recipes-core/glibc/glibc/0023-aarch64-configure-Pass-mcpu-along-with-march-to-dete.patch b/meta/recipes-core/glibc/glibc/0023-aarch64-configure-Pass-mcpu-along-with-march-to-dete.patch
deleted file mode 100644
index f6523c5498..0000000000
--- a/meta/recipes-core/glibc/glibc/0023-aarch64-configure-Pass-mcpu-along-with-march-to-dete.patch
+++ /dev/null
@@ -1,62 +0,0 @@
1From 73c26018ed0ecd9c807bb363cc2c2ab4aca66a82 Mon Sep 17 00:00:00 2001
2From: Szabolcs Nagy <szabolcs.nagy@arm.com>
3Date: Wed, 13 Mar 2024 14:34:14 +0000
4Subject: [PATCH] aarch64: fix check for SVE support in assembler
5
6Due to GCC bug 110901 -mcpu can override -march setting when compiling
7asm code and thus a compiler targetting a specific cpu can fail the
8configure check even when binutils gas supports SVE.
9
10The workaround is that explicit .arch directive overrides both -mcpu
11and -march, and since that's what the actual SVE memcpy uses the
12configure check should use that too even if the GCC issue is fixed
13independently.
14
15Upstream-Status: Backport [https://sourceware.org/git/?p=glibc.git;a=commit;h=73c26018ed0ecd9c807bb363cc2c2ab4aca66a82]
16Signed-off-by: Khem Raj <raj.khem@gmail.com>
17Reviewed-by: Florian Weimer <fweimer@redhat.com>
18---
19 sysdeps/aarch64/configure | 5 +++--
20 sysdeps/aarch64/configure.ac | 5 +++--
21 2 files changed, 6 insertions(+), 4 deletions(-)
22 mode change 100644 => 100755 sysdeps/aarch64/configure
23
24diff --git a/sysdeps/aarch64/configure b/sysdeps/aarch64/configure
25old mode 100644
26new mode 100755
27index ca57edce47..9606137e8d
28--- a/sysdeps/aarch64/configure
29+++ b/sysdeps/aarch64/configure
30@@ -325,9 +325,10 @@ then :
31 printf %s "(cached) " >&6
32 else $as_nop
33 cat > conftest.s <<\EOF
34- ptrue p0.b
35+ .arch armv8.2-a+sve
36+ ptrue p0.b
37 EOF
38-if { ac_try='${CC-cc} -c -march=armv8.2-a+sve conftest.s 1>&5'
39+if { ac_try='${CC-cc} -c conftest.s 1>&5'
40 { { eval echo "\"\$as_me\":${as_lineno-$LINENO}: \"$ac_try\""; } >&5
41 (eval $ac_try) 2>&5
42 ac_status=$?
43diff --git a/sysdeps/aarch64/configure.ac b/sysdeps/aarch64/configure.ac
44index 27874eceb4..56d12d661d 100644
45--- a/sysdeps/aarch64/configure.ac
46+++ b/sysdeps/aarch64/configure.ac
47@@ -90,9 +90,10 @@ LIBC_CONFIG_VAR([aarch64-variant-pcs], [$libc_cv_aarch64_variant_pcs])
48 # Check if asm support armv8.2-a+sve
49 AC_CACHE_CHECK([for SVE support in assembler], [libc_cv_aarch64_sve_asm], [dnl
50 cat > conftest.s <<\EOF
51- ptrue p0.b
52+ .arch armv8.2-a+sve
53+ ptrue p0.b
54 EOF
55-if AC_TRY_COMMAND(${CC-cc} -c -march=armv8.2-a+sve conftest.s 1>&AS_MESSAGE_LOG_FD); then
56+if AC_TRY_COMMAND(${CC-cc} -c conftest.s 1>&AS_MESSAGE_LOG_FD); then
57 libc_cv_aarch64_sve_asm=yes
58 else
59 libc_cv_aarch64_sve_asm=no
60--
612.44.0
62
diff --git a/meta/recipes-core/glibc/glibc/0024-qemu-stale-process.patch b/meta/recipes-core/glibc/glibc/0023-qemu-stale-process.patch
index c0a467fcec..c0a467fcec 100644
--- a/meta/recipes-core/glibc/glibc/0024-qemu-stale-process.patch
+++ b/meta/recipes-core/glibc/glibc/0023-qemu-stale-process.patch