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-rw-r--r--meta/recipes-connectivity/openssl/openssl/0001-Implement-riscv_vlen_asm-for-riscv32.patch43
-rw-r--r--meta/recipes-connectivity/openssl/openssl/bti.patch58
2 files changed, 43 insertions, 58 deletions
diff --git a/meta/recipes-connectivity/openssl/openssl/0001-Implement-riscv_vlen_asm-for-riscv32.patch b/meta/recipes-connectivity/openssl/openssl/0001-Implement-riscv_vlen_asm-for-riscv32.patch
new file mode 100644
index 0000000000..e398d1074a
--- /dev/null
+++ b/meta/recipes-connectivity/openssl/openssl/0001-Implement-riscv_vlen_asm-for-riscv32.patch
@@ -0,0 +1,43 @@
1From 725b1530456545e8511adc9cbdd265309dffad53 Mon Sep 17 00:00:00 2001
2From: Hongren Zheng <i@zenithal.me>
3Date: Fri, 26 Apr 2024 06:03:43 +0000
4Subject: [PATCH] Implement riscv_vlen_asm for riscv32
5
6riscvcap.c: undefined reference to 'riscv_vlen_asm'
7
8Upstream-Status: Backport [https://github.com/openssl/openssl/pull/24270]
9Signed-off-by: Khem Raj <raj.khem@gmail.com>
10---
11 crypto/riscv32cpuid.pl | 17 +++++++++++++++++
12 1 file changed, 17 insertions(+)
13
14diff --git a/crypto/riscv32cpuid.pl b/crypto/riscv32cpuid.pl
15index 20694e7..ac1c043 100644
16--- a/crypto/riscv32cpuid.pl
17+++ b/crypto/riscv32cpuid.pl
18@@ -84,5 +84,22 @@ OPENSSL_cleanse:
19 ___
20 }
21
22+{
23+my ($ret) = ('a0');
24+$code .= <<___;
25+################################################################################
26+# size_t riscv_vlen_asm(void)
27+# Return VLEN (i.e. the length of a vector register in bits).
28+.p2align 3
29+.globl riscv_vlen_asm
30+.type riscv_vlen_asm,\@function
31+riscv_vlen_asm:
32+ csrr $ret, vlenb
33+ slli $ret, $ret, 3
34+ ret
35+.size riscv_vlen_asm,.-riscv_vlen_asm
36+___
37+}
38+
39 print $code;
40 close STDOUT or die "error closing STDOUT: $!";
41--
422.45.0
43
diff --git a/meta/recipes-connectivity/openssl/openssl/bti.patch b/meta/recipes-connectivity/openssl/openssl/bti.patch
deleted file mode 100644
index 748576c30c..0000000000
--- a/meta/recipes-connectivity/openssl/openssl/bti.patch
+++ /dev/null
@@ -1,58 +0,0 @@
1From ba8a599395f8b770c76316b5f5b0f3838567014f Mon Sep 17 00:00:00 2001
2From: Tom Cosgrove <tom.cosgrove@arm.com>
3Date: Tue, 26 Mar 2024 13:18:00 +0000
4Subject: [PATCH] aarch64: fix BTI in bsaes assembly code
5
6In Arm systems where BTI is enabled but the Crypto extensions are not (more
7likely in FVPs than in real hardware), the bit-sliced assembler code will
8be used. However, this wasn't annotated with BTI instructions when BTI was
9enabled, so the moment libssl jumps into this code it (correctly) aborts.
10
11Solve this by adding the missing BTI landing pads.
12
13Upstream-Status: Submitted [https://github.com/openssl/openssl/pull/23982]
14Signed-off-by: Ross Burton <ross.burton@arm.com>
15---
16 crypto/aes/asm/bsaes-armv8.pl | 5 ++++-
17 1 file changed, 4 insertions(+), 1 deletion(-)
18
19diff --git a/crypto/aes/asm/bsaes-armv8.pl b/crypto/aes/asm/bsaes-armv8.pl
20index b3c97e439f..c3c5ff3e05 100644
21--- a/crypto/aes/asm/bsaes-armv8.pl
22+++ b/crypto/aes/asm/bsaes-armv8.pl
23@@ -1018,6 +1018,7 @@ _bsaes_key_convert:
24 // Initialisation vector overwritten with last quadword of ciphertext
25 // No output registers, usual AAPCS64 register preservation
26 ossl_bsaes_cbc_encrypt:
27+ AARCH64_VALID_CALL_TARGET
28 cmp x2, #128
29 bhs .Lcbc_do_bsaes
30 b AES_cbc_encrypt
31@@ -1270,7 +1271,7 @@ ossl_bsaes_cbc_encrypt:
32 // Output text filled in
33 // No output registers, usual AAPCS64 register preservation
34 ossl_bsaes_ctr32_encrypt_blocks:
35-
36+ AARCH64_VALID_CALL_TARGET
37 cmp x2, #8 // use plain AES for
38 blo .Lctr_enc_short // small sizes
39
40@@ -1476,6 +1477,7 @@ ossl_bsaes_ctr32_encrypt_blocks:
41 // Output ciphertext filled in
42 // No output registers, usual AAPCS64 register preservation
43 ossl_bsaes_xts_encrypt:
44+ AARCH64_VALID_CALL_TARGET
45 // Stack layout:
46 // sp ->
47 // nrounds*128-96 bytes: key schedule
48@@ -1921,6 +1923,7 @@ ossl_bsaes_xts_encrypt:
49 // Output plaintext filled in
50 // No output registers, usual AAPCS64 register preservation
51 ossl_bsaes_xts_decrypt:
52+ AARCH64_VALID_CALL_TARGET
53 // Stack layout:
54 // sp ->
55 // nrounds*128-96 bytes: key schedule
56--
572.34.1
58